iwlwifi: log CT_CARD_DISABLED flag
[safe/jmp/linux-2.6] / drivers / net / wireless / iwlwifi / iwl-agn.c
1 /******************************************************************************
2  *
3  * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
4  *
5  * Portions of this file are derived from the ipw3945 project, as well
6  * as portions of the ieee80211 subsystem header files.
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms of version 2 of the GNU General Public License as
10  * published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful, but WITHOUT
13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
15  * more details.
16  *
17  * You should have received a copy of the GNU General Public License along with
18  * this program; if not, write to the Free Software Foundation, Inc.,
19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20  *
21  * The full GNU General Public License is included in this distribution in the
22  * file called LICENSE.
23  *
24  * Contact Information:
25  *  Intel Linux Wireless <ilw@linux.intel.com>
26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27  *
28  *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/sched.h>
37 #include <linux/skbuff.h>
38 #include <linux/netdevice.h>
39 #include <linux/wireless.h>
40 #include <linux/firmware.h>
41 #include <linux/etherdevice.h>
42 #include <linux/if_arp.h>
43
44 #include <net/mac80211.h>
45
46 #include <asm/div64.h>
47
48 #define DRV_NAME        "iwlagn"
49
50 #include "iwl-eeprom.h"
51 #include "iwl-dev.h"
52 #include "iwl-core.h"
53 #include "iwl-io.h"
54 #include "iwl-helpers.h"
55 #include "iwl-sta.h"
56 #include "iwl-calib.h"
57
58
59 /******************************************************************************
60  *
61  * module boiler plate
62  *
63  ******************************************************************************/
64
65 /*
66  * module name, copyright, version, etc.
67  */
68 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
69
70 #ifdef CONFIG_IWLWIFI_DEBUG
71 #define VD "d"
72 #else
73 #define VD
74 #endif
75
76 #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
77 #define VS "s"
78 #else
79 #define VS
80 #endif
81
82 #define DRV_VERSION     IWLWIFI_VERSION VD VS
83
84
85 MODULE_DESCRIPTION(DRV_DESCRIPTION);
86 MODULE_VERSION(DRV_VERSION);
87 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
88 MODULE_LICENSE("GPL");
89 MODULE_ALIAS("iwl4965");
90
91 /*************** STATION TABLE MANAGEMENT ****
92  * mac80211 should be examined to determine if sta_info is duplicating
93  * the functionality provided here
94  */
95
96 /**************************************************************/
97
98 /**
99  * iwl_commit_rxon - commit staging_rxon to hardware
100  *
101  * The RXON command in staging_rxon is committed to the hardware and
102  * the active_rxon structure is updated with the new data.  This
103  * function correctly transitions out of the RXON_ASSOC_MSK state if
104  * a HW tune is required based on the RXON structure changes.
105  */
106 int iwl_commit_rxon(struct iwl_priv *priv)
107 {
108         /* cast away the const for active_rxon in this function */
109         struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
110         int ret;
111         bool new_assoc =
112                 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
113
114         if (!iwl_is_alive(priv))
115                 return -EBUSY;
116
117         /* always get timestamp with Rx frame */
118         priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
119
120         ret = iwl_check_rxon_cmd(priv);
121         if (ret) {
122                 IWL_ERR(priv, "Invalid RXON configuration.  Not committing.\n");
123                 return -EINVAL;
124         }
125
126         /*
127          * receive commit_rxon request
128          * abort any previous channel switch if still in process
129          */
130         if (priv->switch_rxon.switch_in_progress &&
131             (priv->switch_rxon.channel != priv->staging_rxon.channel)) {
132                 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
133                       le16_to_cpu(priv->switch_rxon.channel));
134                 priv->switch_rxon.switch_in_progress = false;
135         }
136
137         /* If we don't need to send a full RXON, we can use
138          * iwl_rxon_assoc_cmd which is used to reconfigure filter
139          * and other flags for the current radio configuration. */
140         if (!iwl_full_rxon_required(priv)) {
141                 ret = iwl_send_rxon_assoc(priv);
142                 if (ret) {
143                         IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
144                         return ret;
145                 }
146
147                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
148                 iwl_print_rx_config_cmd(priv);
149                 return 0;
150         }
151
152         /* station table will be cleared */
153         priv->assoc_station_added = 0;
154
155         /* If we are currently associated and the new config requires
156          * an RXON_ASSOC and the new config wants the associated mask enabled,
157          * we must clear the associated from the active configuration
158          * before we apply the new config */
159         if (iwl_is_associated(priv) && new_assoc) {
160                 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
161                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
162
163                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
164                                       sizeof(struct iwl_rxon_cmd),
165                                       &priv->active_rxon);
166
167                 /* If the mask clearing failed then we set
168                  * active_rxon back to what it was previously */
169                 if (ret) {
170                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
171                         IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
172                         return ret;
173                 }
174         }
175
176         IWL_DEBUG_INFO(priv, "Sending RXON\n"
177                        "* with%s RXON_FILTER_ASSOC_MSK\n"
178                        "* channel = %d\n"
179                        "* bssid = %pM\n",
180                        (new_assoc ? "" : "out"),
181                        le16_to_cpu(priv->staging_rxon.channel),
182                        priv->staging_rxon.bssid_addr);
183
184         iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
185
186         /* Apply the new configuration
187          * RXON unassoc clears the station table in uCode, send it before
188          * we add the bcast station. If assoc bit is set, we will send RXON
189          * after having added the bcast and bssid station.
190          */
191         if (!new_assoc) {
192                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
193                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
194                 if (ret) {
195                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
196                         return ret;
197                 }
198                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
199         }
200
201         iwl_clear_stations_table(priv);
202
203         priv->start_calib = 0;
204
205         /* Add the broadcast address so we can send broadcast frames */
206         iwl_add_bcast_station(priv);
207
208         /* If we have set the ASSOC_MSK and we are in BSS mode then
209          * add the IWL_AP_ID to the station rate table */
210         if (new_assoc) {
211                 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
212                         ret = iwl_rxon_add_station(priv,
213                                            priv->active_rxon.bssid_addr, 1);
214                         if (ret == IWL_INVALID_STATION) {
215                                 IWL_ERR(priv,
216                                         "Error adding AP address for TX.\n");
217                                 return -EIO;
218                         }
219                         priv->assoc_station_added = 1;
220                         if (priv->default_wep_key &&
221                             iwl_send_static_wepkey_cmd(priv, 0))
222                                 IWL_ERR(priv,
223                                         "Could not send WEP static key.\n");
224                 }
225
226                 /*
227                  * allow CTS-to-self if possible for new association.
228                  * this is relevant only for 5000 series and up,
229                  * but will not damage 4965
230                  */
231                 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
232
233                 /* Apply the new configuration
234                  * RXON assoc doesn't clear the station table in uCode,
235                  */
236                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
237                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
238                 if (ret) {
239                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
240                         return ret;
241                 }
242                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
243         }
244         iwl_print_rx_config_cmd(priv);
245
246         iwl_init_sensitivity(priv);
247
248         /* If we issue a new RXON command which required a tune then we must
249          * send a new TXPOWER command or we won't be able to Tx any frames */
250         ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
251         if (ret) {
252                 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
253                 return ret;
254         }
255
256         return 0;
257 }
258
259 void iwl_update_chain_flags(struct iwl_priv *priv)
260 {
261
262         if (priv->cfg->ops->hcmd->set_rxon_chain)
263                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
264         iwlcore_commit_rxon(priv);
265 }
266
267 static void iwl_clear_free_frames(struct iwl_priv *priv)
268 {
269         struct list_head *element;
270
271         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
272                        priv->frames_count);
273
274         while (!list_empty(&priv->free_frames)) {
275                 element = priv->free_frames.next;
276                 list_del(element);
277                 kfree(list_entry(element, struct iwl_frame, list));
278                 priv->frames_count--;
279         }
280
281         if (priv->frames_count) {
282                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
283                             priv->frames_count);
284                 priv->frames_count = 0;
285         }
286 }
287
288 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
289 {
290         struct iwl_frame *frame;
291         struct list_head *element;
292         if (list_empty(&priv->free_frames)) {
293                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
294                 if (!frame) {
295                         IWL_ERR(priv, "Could not allocate frame!\n");
296                         return NULL;
297                 }
298
299                 priv->frames_count++;
300                 return frame;
301         }
302
303         element = priv->free_frames.next;
304         list_del(element);
305         return list_entry(element, struct iwl_frame, list);
306 }
307
308 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
309 {
310         memset(frame, 0, sizeof(*frame));
311         list_add(&frame->list, &priv->free_frames);
312 }
313
314 static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
315                                           struct ieee80211_hdr *hdr,
316                                           int left)
317 {
318         if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
319             ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
320              (priv->iw_mode != NL80211_IFTYPE_AP)))
321                 return 0;
322
323         if (priv->ibss_beacon->len > left)
324                 return 0;
325
326         memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
327
328         return priv->ibss_beacon->len;
329 }
330
331 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
332 static void iwl_set_beacon_tim(struct iwl_priv *priv,
333                 struct iwl_tx_beacon_cmd *tx_beacon_cmd,
334                 u8 *beacon, u32 frame_size)
335 {
336         u16 tim_idx;
337         struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
338
339         /*
340          * The index is relative to frame start but we start looking at the
341          * variable-length part of the beacon.
342          */
343         tim_idx = mgmt->u.beacon.variable - beacon;
344
345         /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
346         while ((tim_idx < (frame_size - 2)) &&
347                         (beacon[tim_idx] != WLAN_EID_TIM))
348                 tim_idx += beacon[tim_idx+1] + 2;
349
350         /* If TIM field was found, set variables */
351         if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
352                 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
353                 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
354         } else
355                 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
356 }
357
358 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
359                                        struct iwl_frame *frame)
360 {
361         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
362         u32 frame_size;
363         u32 rate_flags;
364         u32 rate;
365         /*
366          * We have to set up the TX command, the TX Beacon command, and the
367          * beacon contents.
368          */
369
370         /* Initialize memory */
371         tx_beacon_cmd = &frame->u.beacon;
372         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
373
374         /* Set up TX beacon contents */
375         frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
376                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
377         if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
378                 return 0;
379
380         /* Set up TX command fields */
381         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
382         tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
383         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
384         tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
385                 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
386
387         /* Set up TX beacon command fields */
388         iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
389                         frame_size);
390
391         /* Set up packet rate and flags */
392         rate = iwl_rate_get_lowest_plcp(priv);
393         priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant);
394         rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
395         if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
396                 rate_flags |= RATE_MCS_CCK_MSK;
397         tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
398                         rate_flags);
399
400         return sizeof(*tx_beacon_cmd) + frame_size;
401 }
402 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
403 {
404         struct iwl_frame *frame;
405         unsigned int frame_size;
406         int rc;
407
408         frame = iwl_get_free_frame(priv);
409         if (!frame) {
410                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
411                           "command.\n");
412                 return -ENOMEM;
413         }
414
415         frame_size = iwl_hw_get_beacon_cmd(priv, frame);
416         if (!frame_size) {
417                 IWL_ERR(priv, "Error configuring the beacon command\n");
418                 iwl_free_frame(priv, frame);
419                 return -EINVAL;
420         }
421
422         rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
423                               &frame->u.cmd[0]);
424
425         iwl_free_frame(priv, frame);
426
427         return rc;
428 }
429
430 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
431 {
432         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
433
434         dma_addr_t addr = get_unaligned_le32(&tb->lo);
435         if (sizeof(dma_addr_t) > sizeof(u32))
436                 addr |=
437                 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
438
439         return addr;
440 }
441
442 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
443 {
444         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
445
446         return le16_to_cpu(tb->hi_n_len) >> 4;
447 }
448
449 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
450                                   dma_addr_t addr, u16 len)
451 {
452         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
453         u16 hi_n_len = len << 4;
454
455         put_unaligned_le32(addr, &tb->lo);
456         if (sizeof(dma_addr_t) > sizeof(u32))
457                 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
458
459         tb->hi_n_len = cpu_to_le16(hi_n_len);
460
461         tfd->num_tbs = idx + 1;
462 }
463
464 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
465 {
466         return tfd->num_tbs & 0x1f;
467 }
468
469 /**
470  * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
471  * @priv - driver private data
472  * @txq - tx queue
473  *
474  * Does NOT advance any TFD circular buffer read/write indexes
475  * Does NOT free the TFD itself (which is within circular buffer)
476  */
477 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
478 {
479         struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
480         struct iwl_tfd *tfd;
481         struct pci_dev *dev = priv->pci_dev;
482         int index = txq->q.read_ptr;
483         int i;
484         int num_tbs;
485
486         tfd = &tfd_tmp[index];
487
488         /* Sanity check on number of chunks */
489         num_tbs = iwl_tfd_get_num_tbs(tfd);
490
491         if (num_tbs >= IWL_NUM_OF_TBS) {
492                 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
493                 /* @todo issue fatal error, it is quite serious situation */
494                 return;
495         }
496
497         /* Unmap tx_cmd */
498         if (num_tbs)
499                 pci_unmap_single(dev,
500                                 pci_unmap_addr(&txq->meta[index], mapping),
501                                 pci_unmap_len(&txq->meta[index], len),
502                                 PCI_DMA_BIDIRECTIONAL);
503
504         /* Unmap chunks, if any. */
505         for (i = 1; i < num_tbs; i++) {
506                 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
507                                 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
508
509                 if (txq->txb) {
510                         dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
511                         txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
512                 }
513         }
514 }
515
516 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
517                                  struct iwl_tx_queue *txq,
518                                  dma_addr_t addr, u16 len,
519                                  u8 reset, u8 pad)
520 {
521         struct iwl_queue *q;
522         struct iwl_tfd *tfd, *tfd_tmp;
523         u32 num_tbs;
524
525         q = &txq->q;
526         tfd_tmp = (struct iwl_tfd *)txq->tfds;
527         tfd = &tfd_tmp[q->write_ptr];
528
529         if (reset)
530                 memset(tfd, 0, sizeof(*tfd));
531
532         num_tbs = iwl_tfd_get_num_tbs(tfd);
533
534         /* Each TFD can point to a maximum 20 Tx buffers */
535         if (num_tbs >= IWL_NUM_OF_TBS) {
536                 IWL_ERR(priv, "Error can not send more than %d chunks\n",
537                           IWL_NUM_OF_TBS);
538                 return -EINVAL;
539         }
540
541         BUG_ON(addr & ~DMA_BIT_MASK(36));
542         if (unlikely(addr & ~IWL_TX_DMA_MASK))
543                 IWL_ERR(priv, "Unaligned address = %llx\n",
544                           (unsigned long long)addr);
545
546         iwl_tfd_set_tb(tfd, num_tbs, addr, len);
547
548         return 0;
549 }
550
551 /*
552  * Tell nic where to find circular buffer of Tx Frame Descriptors for
553  * given Tx queue, and enable the DMA channel used for that queue.
554  *
555  * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
556  * channels supported in hardware.
557  */
558 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
559                          struct iwl_tx_queue *txq)
560 {
561         int txq_id = txq->q.id;
562
563         /* Circular buffer (TFD queue in DRAM) physical base address */
564         iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
565                              txq->q.dma_addr >> 8);
566
567         return 0;
568 }
569
570 /******************************************************************************
571  *
572  * Generic RX handler implementations
573  *
574  ******************************************************************************/
575 static void iwl_rx_reply_alive(struct iwl_priv *priv,
576                                 struct iwl_rx_mem_buffer *rxb)
577 {
578         struct iwl_rx_packet *pkt = rxb_addr(rxb);
579         struct iwl_alive_resp *palive;
580         struct delayed_work *pwork;
581
582         palive = &pkt->u.alive_frame;
583
584         IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
585                        "0x%01X 0x%01X\n",
586                        palive->is_valid, palive->ver_type,
587                        palive->ver_subtype);
588
589         if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
590                 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
591                 memcpy(&priv->card_alive_init,
592                        &pkt->u.alive_frame,
593                        sizeof(struct iwl_init_alive_resp));
594                 pwork = &priv->init_alive_start;
595         } else {
596                 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
597                 memcpy(&priv->card_alive, &pkt->u.alive_frame,
598                        sizeof(struct iwl_alive_resp));
599                 pwork = &priv->alive_start;
600         }
601
602         /* We delay the ALIVE response by 5ms to
603          * give the HW RF Kill time to activate... */
604         if (palive->is_valid == UCODE_VALID_OK)
605                 queue_delayed_work(priv->workqueue, pwork,
606                                    msecs_to_jiffies(5));
607         else
608                 IWL_WARN(priv, "uCode did not respond OK.\n");
609 }
610
611 static void iwl_bg_beacon_update(struct work_struct *work)
612 {
613         struct iwl_priv *priv =
614                 container_of(work, struct iwl_priv, beacon_update);
615         struct sk_buff *beacon;
616
617         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
618         beacon = ieee80211_beacon_get(priv->hw, priv->vif);
619
620         if (!beacon) {
621                 IWL_ERR(priv, "update beacon failed\n");
622                 return;
623         }
624
625         mutex_lock(&priv->mutex);
626         /* new beacon skb is allocated every time; dispose previous.*/
627         if (priv->ibss_beacon)
628                 dev_kfree_skb(priv->ibss_beacon);
629
630         priv->ibss_beacon = beacon;
631         mutex_unlock(&priv->mutex);
632
633         iwl_send_beacon_cmd(priv);
634 }
635
636 /**
637  * iwl_bg_statistics_periodic - Timer callback to queue statistics
638  *
639  * This callback is provided in order to send a statistics request.
640  *
641  * This timer function is continually reset to execute within
642  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
643  * was received.  We need to ensure we receive the statistics in order
644  * to update the temperature used for calibrating the TXPOWER.
645  */
646 static void iwl_bg_statistics_periodic(unsigned long data)
647 {
648         struct iwl_priv *priv = (struct iwl_priv *)data;
649
650         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
651                 return;
652
653         /* dont send host command if rf-kill is on */
654         if (!iwl_is_ready_rf(priv))
655                 return;
656
657         iwl_send_statistics_request(priv, CMD_ASYNC, false);
658 }
659
660 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
661                                 struct iwl_rx_mem_buffer *rxb)
662 {
663 #ifdef CONFIG_IWLWIFI_DEBUG
664         struct iwl_rx_packet *pkt = rxb_addr(rxb);
665         struct iwl4965_beacon_notif *beacon =
666                 (struct iwl4965_beacon_notif *)pkt->u.raw;
667         u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
668
669         IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
670                 "tsf %d %d rate %d\n",
671                 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
672                 beacon->beacon_notify_hdr.failure_frame,
673                 le32_to_cpu(beacon->ibss_mgr_status),
674                 le32_to_cpu(beacon->high_tsf),
675                 le32_to_cpu(beacon->low_tsf), rate);
676 #endif
677
678         if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
679             (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
680                 queue_work(priv->workqueue, &priv->beacon_update);
681 }
682
683 /* Handle notification from uCode that card's power state is changing
684  * due to software, hardware, or critical temperature RFKILL */
685 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
686                                     struct iwl_rx_mem_buffer *rxb)
687 {
688         struct iwl_rx_packet *pkt = rxb_addr(rxb);
689         u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
690         unsigned long status = priv->status;
691
692         IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s CT:%s\n",
693                           (flags & HW_CARD_DISABLED) ? "Kill" : "On",
694                           (flags & SW_CARD_DISABLED) ? "Kill" : "On",
695                           (flags & CT_CARD_DISABLED) ?
696                           "Reached" : "Not reached");
697
698         if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
699                      CT_CARD_DISABLED)) {
700
701                 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
702                             CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
703
704                 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
705                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
706
707                 if (!(flags & RXON_CARD_DISABLED)) {
708                         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
709                                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
710                         iwl_write_direct32(priv, HBUS_TARG_MBX_C,
711                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
712                 }
713                 if (flags & CT_CARD_DISABLED)
714                         iwl_tt_enter_ct_kill(priv);
715         }
716         if (!(flags & CT_CARD_DISABLED))
717                 iwl_tt_exit_ct_kill(priv);
718
719         if (flags & HW_CARD_DISABLED)
720                 set_bit(STATUS_RF_KILL_HW, &priv->status);
721         else
722                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
723
724
725         if (!(flags & RXON_CARD_DISABLED))
726                 iwl_scan_cancel(priv);
727
728         if ((test_bit(STATUS_RF_KILL_HW, &status) !=
729              test_bit(STATUS_RF_KILL_HW, &priv->status)))
730                 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
731                         test_bit(STATUS_RF_KILL_HW, &priv->status));
732         else
733                 wake_up_interruptible(&priv->wait_command_queue);
734 }
735
736 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
737 {
738         if (src == IWL_PWR_SRC_VAUX) {
739                 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
740                         iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
741                                                APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
742                                                ~APMG_PS_CTRL_MSK_PWR_SRC);
743         } else {
744                 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
745                                        APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
746                                        ~APMG_PS_CTRL_MSK_PWR_SRC);
747         }
748
749         return 0;
750 }
751
752 /**
753  * iwl_setup_rx_handlers - Initialize Rx handler callbacks
754  *
755  * Setup the RX handlers for each of the reply types sent from the uCode
756  * to the host.
757  *
758  * This function chains into the hardware specific files for them to setup
759  * any hardware specific handlers as well.
760  */
761 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
762 {
763         priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
764         priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
765         priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
766         priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
767         priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
768             iwl_rx_pm_debug_statistics_notif;
769         priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
770
771         /*
772          * The same handler is used for both the REPLY to a discrete
773          * statistics request from the host as well as for the periodic
774          * statistics notifications (after received beacons) from the uCode.
775          */
776         priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_reply_statistics;
777         priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
778
779         iwl_setup_spectrum_handlers(priv);
780         iwl_setup_rx_scan_handlers(priv);
781
782         /* status change handler */
783         priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
784
785         priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
786             iwl_rx_missed_beacon_notif;
787         /* Rx handlers */
788         priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
789         priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
790         /* block ack */
791         priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
792         /* Set up hardware specific Rx handlers */
793         priv->cfg->ops->lib->rx_handler_setup(priv);
794 }
795
796 /**
797  * iwl_rx_handle - Main entry function for receiving responses from uCode
798  *
799  * Uses the priv->rx_handlers callback function array to invoke
800  * the appropriate handlers, including command responses,
801  * frame-received notifications, and other notifications.
802  */
803 void iwl_rx_handle(struct iwl_priv *priv)
804 {
805         struct iwl_rx_mem_buffer *rxb;
806         struct iwl_rx_packet *pkt;
807         struct iwl_rx_queue *rxq = &priv->rxq;
808         u32 r, i;
809         int reclaim;
810         unsigned long flags;
811         u8 fill_rx = 0;
812         u32 count = 8;
813         int total_empty;
814
815         /* uCode's read index (stored in shared DRAM) indicates the last Rx
816          * buffer that the driver may process (last buffer filled by ucode). */
817         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
818         i = rxq->read;
819
820         /* Rx interrupt, but nothing sent from uCode */
821         if (i == r)
822                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
823
824         /* calculate total frames need to be restock after handling RX */
825         total_empty = r - rxq->write_actual;
826         if (total_empty < 0)
827                 total_empty += RX_QUEUE_SIZE;
828
829         if (total_empty > (RX_QUEUE_SIZE / 2))
830                 fill_rx = 1;
831
832         while (i != r) {
833                 rxb = rxq->queue[i];
834
835                 /* If an RXB doesn't have a Rx queue slot associated with it,
836                  * then a bug has been introduced in the queue refilling
837                  * routines -- catch it here */
838                 BUG_ON(rxb == NULL);
839
840                 rxq->queue[i] = NULL;
841
842                 pci_unmap_page(priv->pci_dev, rxb->page_dma,
843                                PAGE_SIZE << priv->hw_params.rx_page_order,
844                                PCI_DMA_FROMDEVICE);
845                 pkt = rxb_addr(rxb);
846
847                 trace_iwlwifi_dev_rx(priv, pkt,
848                         le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
849
850                 /* Reclaim a command buffer only if this packet is a response
851                  *   to a (driver-originated) command.
852                  * If the packet (e.g. Rx frame) originated from uCode,
853                  *   there is no command buffer to reclaim.
854                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
855                  *   but apparently a few don't get set; catch them here. */
856                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
857                         (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
858                         (pkt->hdr.cmd != REPLY_RX) &&
859                         (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
860                         (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
861                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
862                         (pkt->hdr.cmd != REPLY_TX);
863
864                 /* Based on type of command response or notification,
865                  *   handle those that need handling via function in
866                  *   rx_handlers table.  See iwl_setup_rx_handlers() */
867                 if (priv->rx_handlers[pkt->hdr.cmd]) {
868                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
869                                 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
870                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
871                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
872                 } else {
873                         /* No handling needed */
874                         IWL_DEBUG_RX(priv,
875                                 "r %d i %d No handler needed for %s, 0x%02x\n",
876                                 r, i, get_cmd_string(pkt->hdr.cmd),
877                                 pkt->hdr.cmd);
878                 }
879
880                 /*
881                  * XXX: After here, we should always check rxb->page
882                  * against NULL before touching it or its virtual
883                  * memory (pkt). Because some rx_handler might have
884                  * already taken or freed the pages.
885                  */
886
887                 if (reclaim) {
888                         /* Invoke any callbacks, transfer the buffer to caller,
889                          * and fire off the (possibly) blocking iwl_send_cmd()
890                          * as we reclaim the driver command queue */
891                         if (rxb->page)
892                                 iwl_tx_cmd_complete(priv, rxb);
893                         else
894                                 IWL_WARN(priv, "Claim null rxb?\n");
895                 }
896
897                 /* Reuse the page if possible. For notification packets and
898                  * SKBs that fail to Rx correctly, add them back into the
899                  * rx_free list for reuse later. */
900                 spin_lock_irqsave(&rxq->lock, flags);
901                 if (rxb->page != NULL) {
902                         rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
903                                 0, PAGE_SIZE << priv->hw_params.rx_page_order,
904                                 PCI_DMA_FROMDEVICE);
905                         list_add_tail(&rxb->list, &rxq->rx_free);
906                         rxq->free_count++;
907                 } else
908                         list_add_tail(&rxb->list, &rxq->rx_used);
909
910                 spin_unlock_irqrestore(&rxq->lock, flags);
911
912                 i = (i + 1) & RX_QUEUE_MASK;
913                 /* If there are a lot of unused frames,
914                  * restock the Rx queue so ucode wont assert. */
915                 if (fill_rx) {
916                         count++;
917                         if (count >= 8) {
918                                 rxq->read = i;
919                                 iwl_rx_replenish_now(priv);
920                                 count = 0;
921                         }
922                 }
923         }
924
925         /* Backtrack one entry */
926         rxq->read = i;
927         if (fill_rx)
928                 iwl_rx_replenish_now(priv);
929         else
930                 iwl_rx_queue_restock(priv);
931 }
932
933 /* call this function to flush any scheduled tasklet */
934 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
935 {
936         /* wait to make sure we flush pending tasklet*/
937         synchronize_irq(priv->pci_dev->irq);
938         tasklet_kill(&priv->irq_tasklet);
939 }
940
941 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
942 {
943         u32 inta, handled = 0;
944         u32 inta_fh;
945         unsigned long flags;
946         u32 i;
947 #ifdef CONFIG_IWLWIFI_DEBUG
948         u32 inta_mask;
949 #endif
950
951         spin_lock_irqsave(&priv->lock, flags);
952
953         /* Ack/clear/reset pending uCode interrupts.
954          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
955          *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
956         inta = iwl_read32(priv, CSR_INT);
957         iwl_write32(priv, CSR_INT, inta);
958
959         /* Ack/clear/reset pending flow-handler (DMA) interrupts.
960          * Any new interrupts that happen after this, either while we're
961          * in this tasklet, or later, will show up in next ISR/tasklet. */
962         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
963         iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
964
965 #ifdef CONFIG_IWLWIFI_DEBUG
966         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
967                 /* just for debug */
968                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
969                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
970                               inta, inta_mask, inta_fh);
971         }
972 #endif
973
974         spin_unlock_irqrestore(&priv->lock, flags);
975
976         /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
977          * atomic, make sure that inta covers all the interrupts that
978          * we've discovered, even if FH interrupt came in just after
979          * reading CSR_INT. */
980         if (inta_fh & CSR49_FH_INT_RX_MASK)
981                 inta |= CSR_INT_BIT_FH_RX;
982         if (inta_fh & CSR49_FH_INT_TX_MASK)
983                 inta |= CSR_INT_BIT_FH_TX;
984
985         /* Now service all interrupt bits discovered above. */
986         if (inta & CSR_INT_BIT_HW_ERR) {
987                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
988
989                 /* Tell the device to stop sending interrupts */
990                 iwl_disable_interrupts(priv);
991
992                 priv->isr_stats.hw++;
993                 iwl_irq_handle_error(priv);
994
995                 handled |= CSR_INT_BIT_HW_ERR;
996
997                 return;
998         }
999
1000 #ifdef CONFIG_IWLWIFI_DEBUG
1001         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1002                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1003                 if (inta & CSR_INT_BIT_SCD) {
1004                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1005                                       "the frame/frames.\n");
1006                         priv->isr_stats.sch++;
1007                 }
1008
1009                 /* Alive notification via Rx interrupt will do the real work */
1010                 if (inta & CSR_INT_BIT_ALIVE) {
1011                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1012                         priv->isr_stats.alive++;
1013                 }
1014         }
1015 #endif
1016         /* Safely ignore these bits for debug checks below */
1017         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1018
1019         /* HW RF KILL switch toggled */
1020         if (inta & CSR_INT_BIT_RF_KILL) {
1021                 int hw_rf_kill = 0;
1022                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1023                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1024                         hw_rf_kill = 1;
1025
1026                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1027                                 hw_rf_kill ? "disable radio" : "enable radio");
1028
1029                 priv->isr_stats.rfkill++;
1030
1031                 /* driver only loads ucode once setting the interface up.
1032                  * the driver allows loading the ucode even if the radio
1033                  * is killed. Hence update the killswitch state here. The
1034                  * rfkill handler will care about restarting if needed.
1035                  */
1036                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1037                         if (hw_rf_kill)
1038                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1039                         else
1040                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1041                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1042                 }
1043
1044                 handled |= CSR_INT_BIT_RF_KILL;
1045         }
1046
1047         /* Chip got too hot and stopped itself */
1048         if (inta & CSR_INT_BIT_CT_KILL) {
1049                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1050                 priv->isr_stats.ctkill++;
1051                 handled |= CSR_INT_BIT_CT_KILL;
1052         }
1053
1054         /* Error detected by uCode */
1055         if (inta & CSR_INT_BIT_SW_ERR) {
1056                 IWL_ERR(priv, "Microcode SW error detected. "
1057                         " Restarting 0x%X.\n", inta);
1058                 priv->isr_stats.sw++;
1059                 priv->isr_stats.sw_err = inta;
1060                 iwl_irq_handle_error(priv);
1061                 handled |= CSR_INT_BIT_SW_ERR;
1062         }
1063
1064         /*
1065          * uCode wakes up after power-down sleep.
1066          * Tell device about any new tx or host commands enqueued,
1067          * and about any Rx buffers made available while asleep.
1068          */
1069         if (inta & CSR_INT_BIT_WAKEUP) {
1070                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1071                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1072                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1073                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1074                 priv->isr_stats.wakeup++;
1075                 handled |= CSR_INT_BIT_WAKEUP;
1076         }
1077
1078         /* All uCode command responses, including Tx command responses,
1079          * Rx "responses" (frame-received notification), and other
1080          * notifications from uCode come through here*/
1081         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1082                 iwl_rx_handle(priv);
1083                 priv->isr_stats.rx++;
1084                 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1085         }
1086
1087         /* This "Tx" DMA channel is used only for loading uCode */
1088         if (inta & CSR_INT_BIT_FH_TX) {
1089                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1090                 priv->isr_stats.tx++;
1091                 handled |= CSR_INT_BIT_FH_TX;
1092                 /* Wake up uCode load routine, now that load is complete */
1093                 priv->ucode_write_complete = 1;
1094                 wake_up_interruptible(&priv->wait_command_queue);
1095         }
1096
1097         if (inta & ~handled) {
1098                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1099                 priv->isr_stats.unhandled++;
1100         }
1101
1102         if (inta & ~(priv->inta_mask)) {
1103                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1104                          inta & ~priv->inta_mask);
1105                 IWL_WARN(priv, "   with FH_INT = 0x%08x\n", inta_fh);
1106         }
1107
1108         /* Re-enable all interrupts */
1109         /* only Re-enable if diabled by irq */
1110         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1111                 iwl_enable_interrupts(priv);
1112
1113 #ifdef CONFIG_IWLWIFI_DEBUG
1114         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1115                 inta = iwl_read32(priv, CSR_INT);
1116                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1117                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1118                 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1119                         "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1120         }
1121 #endif
1122 }
1123
1124 /* tasklet for iwlagn interrupt */
1125 static void iwl_irq_tasklet(struct iwl_priv *priv)
1126 {
1127         u32 inta = 0;
1128         u32 handled = 0;
1129         unsigned long flags;
1130         u32 i;
1131 #ifdef CONFIG_IWLWIFI_DEBUG
1132         u32 inta_mask;
1133 #endif
1134
1135         spin_lock_irqsave(&priv->lock, flags);
1136
1137         /* Ack/clear/reset pending uCode interrupts.
1138          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1139          */
1140         iwl_write32(priv, CSR_INT, priv->inta);
1141
1142         inta = priv->inta;
1143
1144 #ifdef CONFIG_IWLWIFI_DEBUG
1145         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1146                 /* just for debug */
1147                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1148                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1149                                 inta, inta_mask);
1150         }
1151 #endif
1152
1153         spin_unlock_irqrestore(&priv->lock, flags);
1154
1155         /* saved interrupt in inta variable now we can reset priv->inta */
1156         priv->inta = 0;
1157
1158         /* Now service all interrupt bits discovered above. */
1159         if (inta & CSR_INT_BIT_HW_ERR) {
1160                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1161
1162                 /* Tell the device to stop sending interrupts */
1163                 iwl_disable_interrupts(priv);
1164
1165                 priv->isr_stats.hw++;
1166                 iwl_irq_handle_error(priv);
1167
1168                 handled |= CSR_INT_BIT_HW_ERR;
1169
1170                 return;
1171         }
1172
1173 #ifdef CONFIG_IWLWIFI_DEBUG
1174         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1175                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1176                 if (inta & CSR_INT_BIT_SCD) {
1177                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1178                                       "the frame/frames.\n");
1179                         priv->isr_stats.sch++;
1180                 }
1181
1182                 /* Alive notification via Rx interrupt will do the real work */
1183                 if (inta & CSR_INT_BIT_ALIVE) {
1184                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1185                         priv->isr_stats.alive++;
1186                 }
1187         }
1188 #endif
1189         /* Safely ignore these bits for debug checks below */
1190         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1191
1192         /* HW RF KILL switch toggled */
1193         if (inta & CSR_INT_BIT_RF_KILL) {
1194                 int hw_rf_kill = 0;
1195                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1196                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1197                         hw_rf_kill = 1;
1198
1199                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1200                                 hw_rf_kill ? "disable radio" : "enable radio");
1201
1202                 priv->isr_stats.rfkill++;
1203
1204                 /* driver only loads ucode once setting the interface up.
1205                  * the driver allows loading the ucode even if the radio
1206                  * is killed. Hence update the killswitch state here. The
1207                  * rfkill handler will care about restarting if needed.
1208                  */
1209                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1210                         if (hw_rf_kill)
1211                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1212                         else
1213                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1214                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1215                 }
1216
1217                 handled |= CSR_INT_BIT_RF_KILL;
1218         }
1219
1220         /* Chip got too hot and stopped itself */
1221         if (inta & CSR_INT_BIT_CT_KILL) {
1222                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1223                 priv->isr_stats.ctkill++;
1224                 handled |= CSR_INT_BIT_CT_KILL;
1225         }
1226
1227         /* Error detected by uCode */
1228         if (inta & CSR_INT_BIT_SW_ERR) {
1229                 IWL_ERR(priv, "Microcode SW error detected. "
1230                         " Restarting 0x%X.\n", inta);
1231                 priv->isr_stats.sw++;
1232                 priv->isr_stats.sw_err = inta;
1233                 iwl_irq_handle_error(priv);
1234                 handled |= CSR_INT_BIT_SW_ERR;
1235         }
1236
1237         /* uCode wakes up after power-down sleep */
1238         if (inta & CSR_INT_BIT_WAKEUP) {
1239                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1240                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1241                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1242                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1243
1244                 priv->isr_stats.wakeup++;
1245
1246                 handled |= CSR_INT_BIT_WAKEUP;
1247         }
1248
1249         /* All uCode command responses, including Tx command responses,
1250          * Rx "responses" (frame-received notification), and other
1251          * notifications from uCode come through here*/
1252         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1253                         CSR_INT_BIT_RX_PERIODIC)) {
1254                 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1255                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1256                         handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1257                         iwl_write32(priv, CSR_FH_INT_STATUS,
1258                                         CSR49_FH_INT_RX_MASK);
1259                 }
1260                 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1261                         handled |= CSR_INT_BIT_RX_PERIODIC;
1262                         iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1263                 }
1264                 /* Sending RX interrupt require many steps to be done in the
1265                  * the device:
1266                  * 1- write interrupt to current index in ICT table.
1267                  * 2- dma RX frame.
1268                  * 3- update RX shared data to indicate last write index.
1269                  * 4- send interrupt.
1270                  * This could lead to RX race, driver could receive RX interrupt
1271                  * but the shared data changes does not reflect this;
1272                  * periodic interrupt will detect any dangling Rx activity.
1273                  */
1274
1275                 /* Disable periodic interrupt; we use it as just a one-shot. */
1276                 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1277                             CSR_INT_PERIODIC_DIS);
1278                 iwl_rx_handle(priv);
1279
1280                 /*
1281                  * Enable periodic interrupt in 8 msec only if we received
1282                  * real RX interrupt (instead of just periodic int), to catch
1283                  * any dangling Rx interrupt.  If it was just the periodic
1284                  * interrupt, there was no dangling Rx activity, and no need
1285                  * to extend the periodic interrupt; one-shot is enough.
1286                  */
1287                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1288                         iwl_write8(priv, CSR_INT_PERIODIC_REG,
1289                                     CSR_INT_PERIODIC_ENA);
1290
1291                 priv->isr_stats.rx++;
1292         }
1293
1294         /* This "Tx" DMA channel is used only for loading uCode */
1295         if (inta & CSR_INT_BIT_FH_TX) {
1296                 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1297                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1298                 priv->isr_stats.tx++;
1299                 handled |= CSR_INT_BIT_FH_TX;
1300                 /* Wake up uCode load routine, now that load is complete */
1301                 priv->ucode_write_complete = 1;
1302                 wake_up_interruptible(&priv->wait_command_queue);
1303         }
1304
1305         if (inta & ~handled) {
1306                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1307                 priv->isr_stats.unhandled++;
1308         }
1309
1310         if (inta & ~(priv->inta_mask)) {
1311                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1312                          inta & ~priv->inta_mask);
1313         }
1314
1315         /* Re-enable all interrupts */
1316         /* only Re-enable if diabled by irq */
1317         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1318                 iwl_enable_interrupts(priv);
1319 }
1320
1321
1322 /******************************************************************************
1323  *
1324  * uCode download functions
1325  *
1326  ******************************************************************************/
1327
1328 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1329 {
1330         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1331         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1332         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1333         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1334         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1335         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1336 }
1337
1338 static void iwl_nic_start(struct iwl_priv *priv)
1339 {
1340         /* Remove all resets to allow NIC to operate */
1341         iwl_write32(priv, CSR_RESET, 0);
1342 }
1343
1344
1345 /**
1346  * iwl_read_ucode - Read uCode images from disk file.
1347  *
1348  * Copy into buffers for card to fetch via bus-mastering
1349  */
1350 static int iwl_read_ucode(struct iwl_priv *priv)
1351 {
1352         struct iwl_ucode_header *ucode;
1353         int ret = -EINVAL, index;
1354         const struct firmware *ucode_raw;
1355         const char *name_pre = priv->cfg->fw_name_pre;
1356         const unsigned int api_max = priv->cfg->ucode_api_max;
1357         const unsigned int api_min = priv->cfg->ucode_api_min;
1358         char buf[25];
1359         u8 *src;
1360         size_t len;
1361         u32 api_ver, build;
1362         u32 inst_size, data_size, init_size, init_data_size, boot_size;
1363         u16 eeprom_ver;
1364
1365         /* Ask kernel firmware_class module to get the boot firmware off disk.
1366          * request_firmware() is synchronous, file is in memory on return. */
1367         for (index = api_max; index >= api_min; index--) {
1368                 sprintf(buf, "%s%d%s", name_pre, index, ".ucode");
1369                 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
1370                 if (ret < 0) {
1371                         IWL_ERR(priv, "%s firmware file req failed: %d\n",
1372                                   buf, ret);
1373                         if (ret == -ENOENT)
1374                                 continue;
1375                         else
1376                                 goto error;
1377                 } else {
1378                         if (index < api_max)
1379                                 IWL_ERR(priv, "Loaded firmware %s, "
1380                                         "which is deprecated. "
1381                                         "Please use API v%u instead.\n",
1382                                           buf, api_max);
1383
1384                         IWL_DEBUG_INFO(priv, "Got firmware '%s' file (%zd bytes) from disk\n",
1385                                        buf, ucode_raw->size);
1386                         break;
1387                 }
1388         }
1389
1390         if (ret < 0)
1391                 goto error;
1392
1393         /* Make sure that we got at least the v1 header! */
1394         if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
1395                 IWL_ERR(priv, "File size way too small!\n");
1396                 ret = -EINVAL;
1397                 goto err_release;
1398         }
1399
1400         /* Data from ucode file:  header followed by uCode images */
1401         ucode = (struct iwl_ucode_header *)ucode_raw->data;
1402
1403         priv->ucode_ver = le32_to_cpu(ucode->ver);
1404         api_ver = IWL_UCODE_API(priv->ucode_ver);
1405         build = priv->cfg->ops->ucode->get_build(ucode, api_ver);
1406         inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
1407         data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
1408         init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
1409         init_data_size =
1410                 priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
1411         boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
1412         src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
1413
1414         /* api_ver should match the api version forming part of the
1415          * firmware filename ... but we don't check for that and only rely
1416          * on the API version read from firmware header from here on forward */
1417
1418         if (api_ver < api_min || api_ver > api_max) {
1419                 IWL_ERR(priv, "Driver unable to support your firmware API. "
1420                           "Driver supports v%u, firmware is v%u.\n",
1421                           api_max, api_ver);
1422                 priv->ucode_ver = 0;
1423                 ret = -EINVAL;
1424                 goto err_release;
1425         }
1426         if (api_ver != api_max)
1427                 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1428                           "got v%u. New firmware can be obtained "
1429                           "from http://www.intellinuxwireless.org.\n",
1430                           api_max, api_ver);
1431
1432         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1433                IWL_UCODE_MAJOR(priv->ucode_ver),
1434                IWL_UCODE_MINOR(priv->ucode_ver),
1435                IWL_UCODE_API(priv->ucode_ver),
1436                IWL_UCODE_SERIAL(priv->ucode_ver));
1437
1438         snprintf(priv->hw->wiphy->fw_version,
1439                  sizeof(priv->hw->wiphy->fw_version),
1440                  "%u.%u.%u.%u",
1441                  IWL_UCODE_MAJOR(priv->ucode_ver),
1442                  IWL_UCODE_MINOR(priv->ucode_ver),
1443                  IWL_UCODE_API(priv->ucode_ver),
1444                  IWL_UCODE_SERIAL(priv->ucode_ver));
1445
1446         if (build)
1447                 IWL_DEBUG_INFO(priv, "Build %u\n", build);
1448
1449         eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
1450         IWL_DEBUG_INFO(priv, "NVM Type: %s, version: 0x%x\n",
1451                        (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
1452                        ? "OTP" : "EEPROM", eeprom_ver);
1453
1454         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1455                        priv->ucode_ver);
1456         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
1457                        inst_size);
1458         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
1459                        data_size);
1460         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
1461                        init_size);
1462         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
1463                        init_data_size);
1464         IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
1465                        boot_size);
1466
1467         /* Verify size of file vs. image size info in file's header */
1468         if (ucode_raw->size !=
1469                 priv->cfg->ops->ucode->get_header_size(api_ver) +
1470                 inst_size + data_size + init_size +
1471                 init_data_size + boot_size) {
1472
1473                 IWL_DEBUG_INFO(priv,
1474                         "uCode file size %d does not match expected size\n",
1475                         (int)ucode_raw->size);
1476                 ret = -EINVAL;
1477                 goto err_release;
1478         }
1479
1480         /* Verify that uCode images will fit in card's SRAM */
1481         if (inst_size > priv->hw_params.max_inst_size) {
1482                 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
1483                                inst_size);
1484                 ret = -EINVAL;
1485                 goto err_release;
1486         }
1487
1488         if (data_size > priv->hw_params.max_data_size) {
1489                 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
1490                                 data_size);
1491                 ret = -EINVAL;
1492                 goto err_release;
1493         }
1494         if (init_size > priv->hw_params.max_inst_size) {
1495                 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1496                         init_size);
1497                 ret = -EINVAL;
1498                 goto err_release;
1499         }
1500         if (init_data_size > priv->hw_params.max_data_size) {
1501                 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
1502                       init_data_size);
1503                 ret = -EINVAL;
1504                 goto err_release;
1505         }
1506         if (boot_size > priv->hw_params.max_bsm_size) {
1507                 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1508                         boot_size);
1509                 ret = -EINVAL;
1510                 goto err_release;
1511         }
1512
1513         /* Allocate ucode buffers for card's bus-master loading ... */
1514
1515         /* Runtime instructions and 2 copies of data:
1516          * 1) unmodified from disk
1517          * 2) backup cache for save/restore during power-downs */
1518         priv->ucode_code.len = inst_size;
1519         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1520
1521         priv->ucode_data.len = data_size;
1522         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1523
1524         priv->ucode_data_backup.len = data_size;
1525         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1526
1527         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1528             !priv->ucode_data_backup.v_addr)
1529                 goto err_pci_alloc;
1530
1531         /* Initialization instructions and data */
1532         if (init_size && init_data_size) {
1533                 priv->ucode_init.len = init_size;
1534                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1535
1536                 priv->ucode_init_data.len = init_data_size;
1537                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1538
1539                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1540                         goto err_pci_alloc;
1541         }
1542
1543         /* Bootstrap (instructions only, no data) */
1544         if (boot_size) {
1545                 priv->ucode_boot.len = boot_size;
1546                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1547
1548                 if (!priv->ucode_boot.v_addr)
1549                         goto err_pci_alloc;
1550         }
1551
1552         /* Copy images into buffers for card's bus-master reads ... */
1553
1554         /* Runtime instructions (first block of data in file) */
1555         len = inst_size;
1556         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len);
1557         memcpy(priv->ucode_code.v_addr, src, len);
1558         src += len;
1559
1560         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1561                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1562
1563         /* Runtime data (2nd block)
1564          * NOTE:  Copy into backup buffer will be done in iwl_up()  */
1565         len = data_size;
1566         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len);
1567         memcpy(priv->ucode_data.v_addr, src, len);
1568         memcpy(priv->ucode_data_backup.v_addr, src, len);
1569         src += len;
1570
1571         /* Initialization instructions (3rd block) */
1572         if (init_size) {
1573                 len = init_size;
1574                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1575                                 len);
1576                 memcpy(priv->ucode_init.v_addr, src, len);
1577                 src += len;
1578         }
1579
1580         /* Initialization data (4th block) */
1581         if (init_data_size) {
1582                 len = init_data_size;
1583                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1584                                len);
1585                 memcpy(priv->ucode_init_data.v_addr, src, len);
1586                 src += len;
1587         }
1588
1589         /* Bootstrap instructions (5th block) */
1590         len = boot_size;
1591         IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
1592         memcpy(priv->ucode_boot.v_addr, src, len);
1593
1594         /* We have our copies now, allow OS release its copies */
1595         release_firmware(ucode_raw);
1596         return 0;
1597
1598  err_pci_alloc:
1599         IWL_ERR(priv, "failed to allocate pci memory\n");
1600         ret = -ENOMEM;
1601         iwl_dealloc_ucode_pci(priv);
1602
1603  err_release:
1604         release_firmware(ucode_raw);
1605
1606  error:
1607         return ret;
1608 }
1609
1610 static const char *desc_lookup_text[] = {
1611         "OK",
1612         "FAIL",
1613         "BAD_PARAM",
1614         "BAD_CHECKSUM",
1615         "NMI_INTERRUPT_WDG",
1616         "SYSASSERT",
1617         "FATAL_ERROR",
1618         "BAD_COMMAND",
1619         "HW_ERROR_TUNE_LOCK",
1620         "HW_ERROR_TEMPERATURE",
1621         "ILLEGAL_CHAN_FREQ",
1622         "VCC_NOT_STABLE",
1623         "FH_ERROR",
1624         "NMI_INTERRUPT_HOST",
1625         "NMI_INTERRUPT_ACTION_PT",
1626         "NMI_INTERRUPT_UNKNOWN",
1627         "UCODE_VERSION_MISMATCH",
1628         "HW_ERROR_ABS_LOCK",
1629         "HW_ERROR_CAL_LOCK_FAIL",
1630         "NMI_INTERRUPT_INST_ACTION_PT",
1631         "NMI_INTERRUPT_DATA_ACTION_PT",
1632         "NMI_TRM_HW_ER",
1633         "NMI_INTERRUPT_TRM",
1634         "NMI_INTERRUPT_BREAK_POINT"
1635         "DEBUG_0",
1636         "DEBUG_1",
1637         "DEBUG_2",
1638         "DEBUG_3",
1639         "UNKNOWN"
1640 };
1641
1642 static const char *desc_lookup(int i)
1643 {
1644         int max = ARRAY_SIZE(desc_lookup_text) - 1;
1645
1646         if (i < 0 || i > max)
1647                 i = max;
1648
1649         return desc_lookup_text[i];
1650 }
1651
1652 #define ERROR_START_OFFSET  (1 * sizeof(u32))
1653 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
1654
1655 void iwl_dump_nic_error_log(struct iwl_priv *priv)
1656 {
1657         u32 data2, line;
1658         u32 desc, time, count, base, data1;
1659         u32 blink1, blink2, ilink1, ilink2;
1660
1661         if (priv->ucode_type == UCODE_INIT)
1662                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
1663         else
1664                 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1665
1666         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1667                 IWL_ERR(priv,
1668                         "Not valid error log pointer 0x%08X for %s uCode\n",
1669                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
1670                 return;
1671         }
1672
1673         count = iwl_read_targ_mem(priv, base);
1674
1675         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1676                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1677                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1678                         priv->status, count);
1679         }
1680
1681         desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
1682         blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
1683         blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
1684         ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
1685         ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
1686         data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
1687         data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
1688         line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1689         time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1690
1691         trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
1692                                       blink1, blink2, ilink1, ilink2);
1693
1694         IWL_ERR(priv, "Desc                               Time       "
1695                 "data1      data2      line\n");
1696         IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
1697                 desc_lookup(desc), desc, time, data1, data2, line);
1698         IWL_ERR(priv, "blink1  blink2  ilink1  ilink2\n");
1699         IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
1700                 ilink1, ilink2);
1701
1702 }
1703
1704 #define EVENT_START_OFFSET  (4 * sizeof(u32))
1705
1706 /**
1707  * iwl_print_event_log - Dump error event log to syslog
1708  *
1709  */
1710 static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1711                                 u32 num_events, u32 mode)
1712 {
1713         u32 i;
1714         u32 base;       /* SRAM byte address of event log header */
1715         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1716         u32 ptr;        /* SRAM byte address of log data */
1717         u32 ev, time, data; /* event log data */
1718         unsigned long reg_flags;
1719
1720         if (num_events == 0)
1721                 return;
1722         if (priv->ucode_type == UCODE_INIT)
1723                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1724         else
1725                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1726
1727         if (mode == 0)
1728                 event_size = 2 * sizeof(u32);
1729         else
1730                 event_size = 3 * sizeof(u32);
1731
1732         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1733
1734         /* Make sure device is powered up for SRAM reads */
1735         spin_lock_irqsave(&priv->reg_lock, reg_flags);
1736         iwl_grab_nic_access(priv);
1737
1738         /* Set starting address; reads will auto-increment */
1739         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
1740         rmb();
1741
1742         /* "time" is actually "data" for mode 0 (no timestamp).
1743         * place event id # at far right for easier visual parsing. */
1744         for (i = 0; i < num_events; i++) {
1745                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1746                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1747                 if (mode == 0) {
1748                         /* data, ev */
1749                         trace_iwlwifi_dev_ucode_event(priv, 0, time, ev);
1750                         IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n", time, ev);
1751                 } else {
1752                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1753                         IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1754                                         time, data, ev);
1755                         trace_iwlwifi_dev_ucode_event(priv, time, data, ev);
1756                 }
1757         }
1758
1759         /* Allow device to power down */
1760         iwl_release_nic_access(priv);
1761         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
1762 }
1763
1764 /**
1765  * iwl_print_last_event_logs - Dump the newest # of event log to syslog
1766  */
1767 static void iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
1768                                       u32 num_wraps, u32 next_entry,
1769                                       u32 size, u32 mode)
1770 {
1771         /*
1772          * display the newest DEFAULT_LOG_ENTRIES entries
1773          * i.e the entries just before the next ont that uCode would fill.
1774          */
1775         if (num_wraps) {
1776                 if (next_entry < size) {
1777                         iwl_print_event_log(priv,
1778                                         capacity - (size - next_entry),
1779                                         size - next_entry, mode);
1780                         iwl_print_event_log(priv, 0,
1781                                     next_entry, mode);
1782                 } else
1783                         iwl_print_event_log(priv, next_entry - size,
1784                                     size, mode);
1785         } else {
1786                 if (next_entry < size)
1787                         iwl_print_event_log(priv, 0, next_entry, mode);
1788                 else
1789                         iwl_print_event_log(priv, next_entry - size,
1790                                             size, mode);
1791         }
1792 }
1793
1794 /* For sanity check only.  Actual size is determined by uCode, typ. 512 */
1795 #define MAX_EVENT_LOG_SIZE (512)
1796
1797 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
1798
1799 void iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log)
1800 {
1801         u32 base;       /* SRAM byte address of event log header */
1802         u32 capacity;   /* event log capacity in # entries */
1803         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
1804         u32 num_wraps;  /* # times uCode wrapped to top of log */
1805         u32 next_entry; /* index of next entry to be written by uCode */
1806         u32 size;       /* # entries that we'll print */
1807
1808         if (priv->ucode_type == UCODE_INIT)
1809                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1810         else
1811                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1812
1813         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1814                 IWL_ERR(priv,
1815                         "Invalid event log pointer 0x%08X for %s uCode\n",
1816                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
1817                 return;
1818         }
1819
1820         /* event log header */
1821         capacity = iwl_read_targ_mem(priv, base);
1822         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1823         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1824         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1825
1826         if (capacity > MAX_EVENT_LOG_SIZE) {
1827                 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
1828                         capacity, MAX_EVENT_LOG_SIZE);
1829                 capacity = MAX_EVENT_LOG_SIZE;
1830         }
1831
1832         if (next_entry > MAX_EVENT_LOG_SIZE) {
1833                 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
1834                         next_entry, MAX_EVENT_LOG_SIZE);
1835                 next_entry = MAX_EVENT_LOG_SIZE;
1836         }
1837
1838         size = num_wraps ? capacity : next_entry;
1839
1840         /* bail out if nothing in log */
1841         if (size == 0) {
1842                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1843                 return;
1844         }
1845
1846 #ifdef CONFIG_IWLWIFI_DEBUG
1847         if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS))
1848                 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
1849                         ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
1850 #else
1851         size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
1852                 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
1853 #endif
1854         IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
1855                 size);
1856
1857 #ifdef CONFIG_IWLWIFI_DEBUG
1858         if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
1859                 /*
1860                  * if uCode has wrapped back to top of log,
1861                  * start at the oldest entry,
1862                  * i.e the next one that uCode would fill.
1863                  */
1864                 if (num_wraps)
1865                         iwl_print_event_log(priv, next_entry,
1866                                             capacity - next_entry, mode);
1867                 /* (then/else) start at top of log */
1868                 iwl_print_event_log(priv, 0, next_entry, mode);
1869         } else
1870                 iwl_print_last_event_logs(priv, capacity, num_wraps,
1871                                         next_entry, size, mode);
1872 #else
1873         iwl_print_last_event_logs(priv, capacity, num_wraps,
1874                                 next_entry, size, mode);
1875 #endif
1876 }
1877
1878 /**
1879  * iwl_alive_start - called after REPLY_ALIVE notification received
1880  *                   from protocol/runtime uCode (initialization uCode's
1881  *                   Alive gets handled by iwl_init_alive_start()).
1882  */
1883 static void iwl_alive_start(struct iwl_priv *priv)
1884 {
1885         int ret = 0;
1886
1887         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
1888
1889         if (priv->card_alive.is_valid != UCODE_VALID_OK) {
1890                 /* We had an error bringing up the hardware, so take it
1891                  * all the way back down so we can try again */
1892                 IWL_DEBUG_INFO(priv, "Alive failed.\n");
1893                 goto restart;
1894         }
1895
1896         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
1897          * This is a paranoid check, because we would not have gotten the
1898          * "runtime" alive if code weren't properly loaded.  */
1899         if (iwl_verify_ucode(priv)) {
1900                 /* Runtime instruction load was bad;
1901                  * take it all the way back down so we can try again */
1902                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
1903                 goto restart;
1904         }
1905
1906         iwl_clear_stations_table(priv);
1907         ret = priv->cfg->ops->lib->alive_notify(priv);
1908         if (ret) {
1909                 IWL_WARN(priv,
1910                         "Could not complete ALIVE transition [ntf]: %d\n", ret);
1911                 goto restart;
1912         }
1913
1914         /* After the ALIVE response, we can send host commands to the uCode */
1915         set_bit(STATUS_ALIVE, &priv->status);
1916
1917         if (iwl_is_rfkill(priv))
1918                 return;
1919
1920         ieee80211_wake_queues(priv->hw);
1921
1922         priv->active_rate = priv->rates_mask;
1923         priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1924
1925         /* Configure Tx antenna selection based on H/W config */
1926         if (priv->cfg->ops->hcmd->set_tx_ant)
1927                 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
1928
1929         if (iwl_is_associated(priv)) {
1930                 struct iwl_rxon_cmd *active_rxon =
1931                                 (struct iwl_rxon_cmd *)&priv->active_rxon;
1932                 /* apply any changes in staging */
1933                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
1934                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1935         } else {
1936                 /* Initialize our rx_config data */
1937                 iwl_connection_init_rx_config(priv, priv->iw_mode);
1938
1939                 if (priv->cfg->ops->hcmd->set_rxon_chain)
1940                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
1941
1942                 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1943         }
1944
1945         /* Configure Bluetooth device coexistence support */
1946         iwl_send_bt_config(priv);
1947
1948         iwl_reset_run_time_calib(priv);
1949
1950         /* Configure the adapter for unassociated operation */
1951         iwlcore_commit_rxon(priv);
1952
1953         /* At this point, the NIC is initialized and operational */
1954         iwl_rf_kill_ct_config(priv);
1955
1956         iwl_leds_init(priv);
1957
1958         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
1959         set_bit(STATUS_READY, &priv->status);
1960         wake_up_interruptible(&priv->wait_command_queue);
1961
1962         iwl_power_update_mode(priv, true);
1963
1964         /* reassociate for ADHOC mode */
1965         if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
1966                 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
1967                                                                 priv->vif);
1968                 if (beacon)
1969                         iwl_mac_beacon_update(priv->hw, beacon);
1970         }
1971
1972
1973         if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
1974                 iwl_set_mode(priv, priv->iw_mode);
1975
1976         return;
1977
1978  restart:
1979         queue_work(priv->workqueue, &priv->restart);
1980 }
1981
1982 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
1983
1984 static void __iwl_down(struct iwl_priv *priv)
1985 {
1986         unsigned long flags;
1987         int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
1988
1989         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
1990
1991         if (!exit_pending)
1992                 set_bit(STATUS_EXIT_PENDING, &priv->status);
1993
1994         iwl_clear_stations_table(priv);
1995
1996         /* Unblock any waiting calls */
1997         wake_up_interruptible_all(&priv->wait_command_queue);
1998
1999         /* Wipe out the EXIT_PENDING status bit if we are not actually
2000          * exiting the module */
2001         if (!exit_pending)
2002                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2003
2004         /* stop and reset the on-board processor */
2005         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2006
2007         /* tell the device to stop sending interrupts */
2008         spin_lock_irqsave(&priv->lock, flags);
2009         iwl_disable_interrupts(priv);
2010         spin_unlock_irqrestore(&priv->lock, flags);
2011         iwl_synchronize_irq(priv);
2012
2013         if (priv->mac80211_registered)
2014                 ieee80211_stop_queues(priv->hw);
2015
2016         /* If we have not previously called iwl_init() then
2017          * clear all bits but the RF Kill bit and return */
2018         if (!iwl_is_init(priv)) {
2019                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2020                                         STATUS_RF_KILL_HW |
2021                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2022                                         STATUS_GEO_CONFIGURED |
2023                                test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2024                                         STATUS_EXIT_PENDING;
2025                 goto exit;
2026         }
2027
2028         /* ...otherwise clear out all the status bits but the RF Kill
2029          * bit and continue taking the NIC down. */
2030         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2031                                 STATUS_RF_KILL_HW |
2032                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2033                                 STATUS_GEO_CONFIGURED |
2034                         test_bit(STATUS_FW_ERROR, &priv->status) <<
2035                                 STATUS_FW_ERROR |
2036                        test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2037                                 STATUS_EXIT_PENDING;
2038
2039         /* device going down, Stop using ICT table */
2040         iwl_disable_ict(priv);
2041
2042         iwl_txq_ctx_stop(priv);
2043         iwl_rxq_stop(priv);
2044
2045         /* Power-down device's busmaster DMA clocks */
2046         iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2047         udelay(5);
2048
2049         /* Make sure (redundant) we've released our request to stay awake */
2050         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2051
2052         /* Stop the device, and put it in low power state */
2053         priv->cfg->ops->lib->apm_ops.stop(priv);
2054
2055  exit:
2056         memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2057
2058         if (priv->ibss_beacon)
2059                 dev_kfree_skb(priv->ibss_beacon);
2060         priv->ibss_beacon = NULL;
2061
2062         /* clear out any free frames */
2063         iwl_clear_free_frames(priv);
2064 }
2065
2066 static void iwl_down(struct iwl_priv *priv)
2067 {
2068         mutex_lock(&priv->mutex);
2069         __iwl_down(priv);
2070         mutex_unlock(&priv->mutex);
2071
2072         iwl_cancel_deferred_work(priv);
2073 }
2074
2075 #define HW_READY_TIMEOUT (50)
2076
2077 static int iwl_set_hw_ready(struct iwl_priv *priv)
2078 {
2079         int ret = 0;
2080
2081         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2082                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2083
2084         /* See if we got it */
2085         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2086                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2087                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2088                                 HW_READY_TIMEOUT);
2089         if (ret != -ETIMEDOUT)
2090                 priv->hw_ready = true;
2091         else
2092                 priv->hw_ready = false;
2093
2094         IWL_DEBUG_INFO(priv, "hardware %s\n",
2095                       (priv->hw_ready == 1) ? "ready" : "not ready");
2096         return ret;
2097 }
2098
2099 static int iwl_prepare_card_hw(struct iwl_priv *priv)
2100 {
2101         int ret = 0;
2102
2103         IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter \n");
2104
2105         ret = iwl_set_hw_ready(priv);
2106         if (priv->hw_ready)
2107                 return ret;
2108
2109         /* If HW is not ready, prepare the conditions to check again */
2110         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2111                         CSR_HW_IF_CONFIG_REG_PREPARE);
2112
2113         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2114                         ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2115                         CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2116
2117         /* HW should be ready by now, check again. */
2118         if (ret != -ETIMEDOUT)
2119                 iwl_set_hw_ready(priv);
2120
2121         return ret;
2122 }
2123
2124 #define MAX_HW_RESTARTS 5
2125
2126 static int __iwl_up(struct iwl_priv *priv)
2127 {
2128         int i;
2129         int ret;
2130
2131         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2132                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2133                 return -EIO;
2134         }
2135
2136         if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2137                 IWL_ERR(priv, "ucode not available for device bringup\n");
2138                 return -EIO;
2139         }
2140
2141         iwl_prepare_card_hw(priv);
2142
2143         if (!priv->hw_ready) {
2144                 IWL_WARN(priv, "Exit HW not ready\n");
2145                 return -EIO;
2146         }
2147
2148         /* If platform's RF_KILL switch is NOT set to KILL */
2149         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2150                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2151         else
2152                 set_bit(STATUS_RF_KILL_HW, &priv->status);
2153
2154         if (iwl_is_rfkill(priv)) {
2155                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2156
2157                 iwl_enable_interrupts(priv);
2158                 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2159                 return 0;
2160         }
2161
2162         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2163
2164         ret = iwl_hw_nic_init(priv);
2165         if (ret) {
2166                 IWL_ERR(priv, "Unable to init nic\n");
2167                 return ret;
2168         }
2169
2170         /* make sure rfkill handshake bits are cleared */
2171         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2172         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2173                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2174
2175         /* clear (again), then enable host interrupts */
2176         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2177         iwl_enable_interrupts(priv);
2178
2179         /* really make sure rfkill handshake bits are cleared */
2180         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2181         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2182
2183         /* Copy original ucode data image from disk into backup cache.
2184          * This will be used to initialize the on-board processor's
2185          * data SRAM for a clean start when the runtime program first loads. */
2186         memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2187                priv->ucode_data.len);
2188
2189         for (i = 0; i < MAX_HW_RESTARTS; i++) {
2190
2191                 iwl_clear_stations_table(priv);
2192
2193                 /* load bootstrap state machine,
2194                  * load bootstrap program into processor's memory,
2195                  * prepare to load the "initialize" uCode */
2196                 ret = priv->cfg->ops->lib->load_ucode(priv);
2197
2198                 if (ret) {
2199                         IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2200                                 ret);
2201                         continue;
2202                 }
2203
2204                 /* start card; "initialize" will load runtime ucode */
2205                 iwl_nic_start(priv);
2206
2207                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2208
2209                 return 0;
2210         }
2211
2212         set_bit(STATUS_EXIT_PENDING, &priv->status);
2213         __iwl_down(priv);
2214         clear_bit(STATUS_EXIT_PENDING, &priv->status);
2215
2216         /* tried to restart and config the device for as long as our
2217          * patience could withstand */
2218         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2219         return -EIO;
2220 }
2221
2222
2223 /*****************************************************************************
2224  *
2225  * Workqueue callbacks
2226  *
2227  *****************************************************************************/
2228
2229 static void iwl_bg_init_alive_start(struct work_struct *data)
2230 {
2231         struct iwl_priv *priv =
2232             container_of(data, struct iwl_priv, init_alive_start.work);
2233
2234         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2235                 return;
2236
2237         mutex_lock(&priv->mutex);
2238         priv->cfg->ops->lib->init_alive_start(priv);
2239         mutex_unlock(&priv->mutex);
2240 }
2241
2242 static void iwl_bg_alive_start(struct work_struct *data)
2243 {
2244         struct iwl_priv *priv =
2245             container_of(data, struct iwl_priv, alive_start.work);
2246
2247         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2248                 return;
2249
2250         /* enable dram interrupt */
2251         iwl_reset_ict(priv);
2252
2253         mutex_lock(&priv->mutex);
2254         iwl_alive_start(priv);
2255         mutex_unlock(&priv->mutex);
2256 }
2257
2258 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2259 {
2260         struct iwl_priv *priv = container_of(work, struct iwl_priv,
2261                         run_time_calib_work);
2262
2263         mutex_lock(&priv->mutex);
2264
2265         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2266             test_bit(STATUS_SCANNING, &priv->status)) {
2267                 mutex_unlock(&priv->mutex);
2268                 return;
2269         }
2270
2271         if (priv->start_calib) {
2272                 iwl_chain_noise_calibration(priv, &priv->statistics);
2273
2274                 iwl_sensitivity_calibration(priv, &priv->statistics);
2275         }
2276
2277         mutex_unlock(&priv->mutex);
2278         return;
2279 }
2280
2281 static void iwl_bg_up(struct work_struct *data)
2282 {
2283         struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
2284
2285         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2286                 return;
2287
2288         mutex_lock(&priv->mutex);
2289         __iwl_up(priv);
2290         mutex_unlock(&priv->mutex);
2291 }
2292
2293 static void iwl_bg_restart(struct work_struct *data)
2294 {
2295         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2296
2297         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2298                 return;
2299
2300         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2301                 mutex_lock(&priv->mutex);
2302                 priv->vif = NULL;
2303                 priv->is_open = 0;
2304                 mutex_unlock(&priv->mutex);
2305                 iwl_down(priv);
2306                 ieee80211_restart_hw(priv->hw);
2307         } else {
2308                 iwl_down(priv);
2309                 queue_work(priv->workqueue, &priv->up);
2310         }
2311 }
2312
2313 static void iwl_bg_rx_replenish(struct work_struct *data)
2314 {
2315         struct iwl_priv *priv =
2316             container_of(data, struct iwl_priv, rx_replenish);
2317
2318         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2319                 return;
2320
2321         mutex_lock(&priv->mutex);
2322         iwl_rx_replenish(priv);
2323         mutex_unlock(&priv->mutex);
2324 }
2325
2326 #define IWL_DELAY_NEXT_SCAN (HZ*2)
2327
2328 void iwl_post_associate(struct iwl_priv *priv)
2329 {
2330         struct ieee80211_conf *conf = NULL;
2331         int ret = 0;
2332         unsigned long flags;
2333
2334         if (priv->iw_mode == NL80211_IFTYPE_AP) {
2335                 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
2336                 return;
2337         }
2338
2339         IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2340                         priv->assoc_id, priv->active_rxon.bssid_addr);
2341
2342
2343         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2344                 return;
2345
2346
2347         if (!priv->vif || !priv->is_open)
2348                 return;
2349
2350         iwl_scan_cancel_timeout(priv, 200);
2351
2352         conf = ieee80211_get_hw_conf(priv->hw);
2353
2354         priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2355         iwlcore_commit_rxon(priv);
2356
2357         iwl_setup_rxon_timing(priv);
2358         ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2359                               sizeof(priv->rxon_timing), &priv->rxon_timing);
2360         if (ret)
2361                 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2362                             "Attempting to continue.\n");
2363
2364         priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2365
2366         iwl_set_rxon_ht(priv, &priv->current_ht_config);
2367
2368         if (priv->cfg->ops->hcmd->set_rxon_chain)
2369                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2370
2371         priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2372
2373         IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2374                         priv->assoc_id, priv->beacon_int);
2375
2376         if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2377                 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2378         else
2379                 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2380
2381         if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2382                 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2383                         priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2384                 else
2385                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2386
2387                 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2388                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2389
2390         }
2391
2392         iwlcore_commit_rxon(priv);
2393
2394         switch (priv->iw_mode) {
2395         case NL80211_IFTYPE_STATION:
2396                 break;
2397
2398         case NL80211_IFTYPE_ADHOC:
2399
2400                 /* assume default assoc id */
2401                 priv->assoc_id = 1;
2402
2403                 iwl_rxon_add_station(priv, priv->bssid, 0);
2404                 iwl_send_beacon_cmd(priv);
2405
2406                 break;
2407
2408         default:
2409                 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2410                           __func__, priv->iw_mode);
2411                 break;
2412         }
2413
2414         if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2415                 priv->assoc_station_added = 1;
2416
2417         spin_lock_irqsave(&priv->lock, flags);
2418         iwl_activate_qos(priv, 0);
2419         spin_unlock_irqrestore(&priv->lock, flags);
2420
2421         /* the chain noise calibration will enabled PM upon completion
2422          * If chain noise has already been run, then we need to enable
2423          * power management here */
2424         if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2425                 iwl_power_update_mode(priv, false);
2426
2427         /* Enable Rx differential gain and sensitivity calibrations */
2428         iwl_chain_noise_reset(priv);
2429         priv->start_calib = 1;
2430
2431 }
2432
2433 /*****************************************************************************
2434  *
2435  * mac80211 entry point functions
2436  *
2437  *****************************************************************************/
2438
2439 #define UCODE_READY_TIMEOUT     (4 * HZ)
2440
2441 /*
2442  * Not a mac80211 entry point function, but it fits in with all the
2443  * other mac80211 functions grouped here.
2444  */
2445 static int iwl_setup_mac(struct iwl_priv *priv)
2446 {
2447         int ret;
2448         struct ieee80211_hw *hw = priv->hw;
2449         hw->rate_control_algorithm = "iwl-agn-rs";
2450
2451         /* Tell mac80211 our characteristics */
2452         hw->flags = IEEE80211_HW_SIGNAL_DBM |
2453                     IEEE80211_HW_NOISE_DBM |
2454                     IEEE80211_HW_AMPDU_AGGREGATION |
2455                     IEEE80211_HW_SPECTRUM_MGMT;
2456
2457         if (!priv->cfg->broken_powersave)
2458                 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
2459                              IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
2460
2461         hw->sta_data_size = sizeof(struct iwl_station_priv);
2462         hw->wiphy->interface_modes =
2463                 BIT(NL80211_IFTYPE_STATION) |
2464                 BIT(NL80211_IFTYPE_ADHOC);
2465
2466         hw->wiphy->flags |= WIPHY_FLAG_STRICT_REGULATORY |
2467                             WIPHY_FLAG_DISABLE_BEACON_HINTS;
2468
2469         /*
2470          * For now, disable PS by default because it affects
2471          * RX performance significantly.
2472          */
2473         hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
2474
2475         hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
2476         /* we create the 802.11 header and a zero-length SSID element */
2477         hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
2478
2479         /* Default value; 4 EDCA QOS priorities */
2480         hw->queues = 4;
2481
2482         hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
2483
2484         if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
2485                 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
2486                         &priv->bands[IEEE80211_BAND_2GHZ];
2487         if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
2488                 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
2489                         &priv->bands[IEEE80211_BAND_5GHZ];
2490
2491         ret = ieee80211_register_hw(priv->hw);
2492         if (ret) {
2493                 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
2494                 return ret;
2495         }
2496         priv->mac80211_registered = 1;
2497
2498         return 0;
2499 }
2500
2501
2502 static int iwl_mac_start(struct ieee80211_hw *hw)
2503 {
2504         struct iwl_priv *priv = hw->priv;
2505         int ret;
2506
2507         IWL_DEBUG_MAC80211(priv, "enter\n");
2508
2509         /* we should be verifying the device is ready to be opened */
2510         mutex_lock(&priv->mutex);
2511
2512         /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2513          * ucode filename and max sizes are card-specific. */
2514
2515         if (!priv->ucode_code.len) {
2516                 ret = iwl_read_ucode(priv);
2517                 if (ret) {
2518                         IWL_ERR(priv, "Could not read microcode: %d\n", ret);
2519                         mutex_unlock(&priv->mutex);
2520                         return ret;
2521                 }
2522         }
2523
2524         ret = __iwl_up(priv);
2525
2526         mutex_unlock(&priv->mutex);
2527
2528         if (ret)
2529                 return ret;
2530
2531         if (iwl_is_rfkill(priv))
2532                 goto out;
2533
2534         IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2535
2536         /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2537          * mac80211 will not be run successfully. */
2538         ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2539                         test_bit(STATUS_READY, &priv->status),
2540                         UCODE_READY_TIMEOUT);
2541         if (!ret) {
2542                 if (!test_bit(STATUS_READY, &priv->status)) {
2543                         IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2544                                 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2545                         return -ETIMEDOUT;
2546                 }
2547         }
2548
2549         iwl_led_start(priv);
2550
2551 out:
2552         priv->is_open = 1;
2553         IWL_DEBUG_MAC80211(priv, "leave\n");
2554         return 0;
2555 }
2556
2557 static void iwl_mac_stop(struct ieee80211_hw *hw)
2558 {
2559         struct iwl_priv *priv = hw->priv;
2560
2561         IWL_DEBUG_MAC80211(priv, "enter\n");
2562
2563         if (!priv->is_open)
2564                 return;
2565
2566         priv->is_open = 0;
2567
2568         if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
2569                 /* stop mac, cancel any scan request and clear
2570                  * RXON_FILTER_ASSOC_MSK BIT
2571                  */
2572                 mutex_lock(&priv->mutex);
2573                 iwl_scan_cancel_timeout(priv, 100);
2574                 mutex_unlock(&priv->mutex);
2575         }
2576
2577         iwl_down(priv);
2578
2579         flush_workqueue(priv->workqueue);
2580
2581         /* enable interrupts again in order to receive rfkill changes */
2582         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2583         iwl_enable_interrupts(priv);
2584
2585         IWL_DEBUG_MAC80211(priv, "leave\n");
2586 }
2587
2588 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2589 {
2590         struct iwl_priv *priv = hw->priv;
2591
2592         IWL_DEBUG_MACDUMP(priv, "enter\n");
2593
2594         IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2595                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2596
2597         if (iwl_tx_skb(priv, skb))
2598                 dev_kfree_skb_any(skb);
2599
2600         IWL_DEBUG_MACDUMP(priv, "leave\n");
2601         return NETDEV_TX_OK;
2602 }
2603
2604 void iwl_config_ap(struct iwl_priv *priv)
2605 {
2606         int ret = 0;
2607         unsigned long flags;
2608
2609         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2610                 return;
2611
2612         /* The following should be done only at AP bring up */
2613         if (!iwl_is_associated(priv)) {
2614
2615                 /* RXON - unassoc (to set timing command) */
2616                 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2617                 iwlcore_commit_rxon(priv);
2618
2619                 /* RXON Timing */
2620                 iwl_setup_rxon_timing(priv);
2621                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2622                                 sizeof(priv->rxon_timing), &priv->rxon_timing);
2623                 if (ret)
2624                         IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2625                                         "Attempting to continue.\n");
2626
2627                 /* AP has all antennas */
2628                 priv->chain_noise_data.active_chains =
2629                         priv->hw_params.valid_rx_ant;
2630                 iwl_set_rxon_ht(priv, &priv->current_ht_config);
2631                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2632                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
2633
2634                 /* FIXME: what should be the assoc_id for AP? */
2635                 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2636                 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2637                         priv->staging_rxon.flags |=
2638                                 RXON_FLG_SHORT_PREAMBLE_MSK;
2639                 else
2640                         priv->staging_rxon.flags &=
2641                                 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2642
2643                 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2644                         if (priv->assoc_capability &
2645                                 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2646                                 priv->staging_rxon.flags |=
2647                                         RXON_FLG_SHORT_SLOT_MSK;
2648                         else
2649                                 priv->staging_rxon.flags &=
2650                                         ~RXON_FLG_SHORT_SLOT_MSK;
2651
2652                         if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2653                                 priv->staging_rxon.flags &=
2654                                         ~RXON_FLG_SHORT_SLOT_MSK;
2655                 }
2656                 /* restore RXON assoc */
2657                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2658                 iwlcore_commit_rxon(priv);
2659                 iwl_reset_qos(priv);
2660                 spin_lock_irqsave(&priv->lock, flags);
2661                 iwl_activate_qos(priv, 1);
2662                 spin_unlock_irqrestore(&priv->lock, flags);
2663                 iwl_add_bcast_station(priv);
2664         }
2665         iwl_send_beacon_cmd(priv);
2666
2667         /* FIXME - we need to add code here to detect a totally new
2668          * configuration, reset the AP, unassoc, rxon timing, assoc,
2669          * clear sta table, add BCAST sta... */
2670 }
2671
2672 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
2673                         struct ieee80211_key_conf *keyconf, const u8 *addr,
2674                         u32 iv32, u16 *phase1key)
2675 {
2676
2677         struct iwl_priv *priv = hw->priv;
2678         IWL_DEBUG_MAC80211(priv, "enter\n");
2679
2680         iwl_update_tkip_key(priv, keyconf, addr, iv32, phase1key);
2681
2682         IWL_DEBUG_MAC80211(priv, "leave\n");
2683 }
2684
2685 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2686                            struct ieee80211_vif *vif,
2687                            struct ieee80211_sta *sta,
2688                            struct ieee80211_key_conf *key)
2689 {
2690         struct iwl_priv *priv = hw->priv;
2691         const u8 *addr;
2692         int ret;
2693         u8 sta_id;
2694         bool is_default_wep_key = false;
2695
2696         IWL_DEBUG_MAC80211(priv, "enter\n");
2697
2698         if (priv->cfg->mod_params->sw_crypto) {
2699                 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2700                 return -EOPNOTSUPP;
2701         }
2702         addr = sta ? sta->addr : iwl_bcast_addr;
2703         sta_id = iwl_find_station(priv, addr);
2704         if (sta_id == IWL_INVALID_STATION) {
2705                 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
2706                                    addr);
2707                 return -EINVAL;
2708
2709         }
2710
2711         mutex_lock(&priv->mutex);
2712         iwl_scan_cancel_timeout(priv, 100);
2713         mutex_unlock(&priv->mutex);
2714
2715         /* If we are getting WEP group key and we didn't receive any key mapping
2716          * so far, we are in legacy wep mode (group key only), otherwise we are
2717          * in 1X mode.
2718          * In legacy wep mode, we use another host command to the uCode */
2719         if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
2720                 priv->iw_mode != NL80211_IFTYPE_AP) {
2721                 if (cmd == SET_KEY)
2722                         is_default_wep_key = !priv->key_mapping_key;
2723                 else
2724                         is_default_wep_key =
2725                                         (key->hw_key_idx == HW_KEY_DEFAULT);
2726         }
2727
2728         switch (cmd) {
2729         case SET_KEY:
2730                 if (is_default_wep_key)
2731                         ret = iwl_set_default_wep_key(priv, key);
2732                 else
2733                         ret = iwl_set_dynamic_key(priv, key, sta_id);
2734
2735                 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2736                 break;
2737         case DISABLE_KEY:
2738                 if (is_default_wep_key)
2739                         ret = iwl_remove_default_wep_key(priv, key);
2740                 else
2741                         ret = iwl_remove_dynamic_key(priv, key, sta_id);
2742
2743                 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2744                 break;
2745         default:
2746                 ret = -EINVAL;
2747         }
2748
2749         IWL_DEBUG_MAC80211(priv, "leave\n");
2750
2751         return ret;
2752 }
2753
2754 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2755                                 struct ieee80211_vif *vif,
2756                              enum ieee80211_ampdu_mlme_action action,
2757                              struct ieee80211_sta *sta, u16 tid, u16 *ssn)
2758 {
2759         struct iwl_priv *priv = hw->priv;
2760         int ret;
2761
2762         IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2763                      sta->addr, tid);
2764
2765         if (!(priv->cfg->sku & IWL_SKU_N))
2766                 return -EACCES;
2767
2768         switch (action) {
2769         case IEEE80211_AMPDU_RX_START:
2770                 IWL_DEBUG_HT(priv, "start Rx\n");
2771                 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
2772         case IEEE80211_AMPDU_RX_STOP:
2773                 IWL_DEBUG_HT(priv, "stop Rx\n");
2774                 ret = iwl_sta_rx_agg_stop(priv, sta->addr, tid);
2775                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2776                         return 0;
2777                 else
2778                         return ret;
2779         case IEEE80211_AMPDU_TX_START:
2780                 IWL_DEBUG_HT(priv, "start Tx\n");
2781                 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
2782         case IEEE80211_AMPDU_TX_STOP:
2783                 IWL_DEBUG_HT(priv, "stop Tx\n");
2784                 ret = iwl_tx_agg_stop(priv, sta->addr, tid);
2785                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2786                         return 0;
2787                 else
2788                         return ret;
2789         default:
2790                 IWL_DEBUG_HT(priv, "unknown\n");
2791                 return -EINVAL;
2792                 break;
2793         }
2794         return 0;
2795 }
2796
2797 static int iwl_mac_get_stats(struct ieee80211_hw *hw,
2798                              struct ieee80211_low_level_stats *stats)
2799 {
2800         struct iwl_priv *priv = hw->priv;
2801
2802         priv = hw->priv;
2803         IWL_DEBUG_MAC80211(priv, "enter\n");
2804         IWL_DEBUG_MAC80211(priv, "leave\n");
2805
2806         return 0;
2807 }
2808
2809 static void iwl_mac_sta_notify(struct ieee80211_hw *hw,
2810                                struct ieee80211_vif *vif,
2811                                enum sta_notify_cmd cmd,
2812                                struct ieee80211_sta *sta)
2813 {
2814         struct iwl_priv *priv = hw->priv;
2815         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
2816         int sta_id;
2817
2818         /*
2819          * TODO: We really should use this callback to
2820          *       actually maintain the station table in
2821          *       the device.
2822          */
2823
2824         switch (cmd) {
2825         case STA_NOTIFY_ADD:
2826                 atomic_set(&sta_priv->pending_frames, 0);
2827                 if (vif->type == NL80211_IFTYPE_AP)
2828                         sta_priv->client = true;
2829                 break;
2830         case STA_NOTIFY_SLEEP:
2831                 WARN_ON(!sta_priv->client);
2832                 sta_priv->asleep = true;
2833                 if (atomic_read(&sta_priv->pending_frames) > 0)
2834                         ieee80211_sta_block_awake(hw, sta, true);
2835                 break;
2836         case STA_NOTIFY_AWAKE:
2837                 WARN_ON(!sta_priv->client);
2838                 sta_priv->asleep = false;
2839                 sta_id = iwl_find_station(priv, sta->addr);
2840                 if (sta_id != IWL_INVALID_STATION)
2841                         iwl_sta_modify_ps_wake(priv, sta_id);
2842                 break;
2843         default:
2844                 break;
2845         }
2846 }
2847
2848 /*****************************************************************************
2849  *
2850  * sysfs attributes
2851  *
2852  *****************************************************************************/
2853
2854 #ifdef CONFIG_IWLWIFI_DEBUG
2855
2856 /*
2857  * The following adds a new attribute to the sysfs representation
2858  * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
2859  * used for controlling the debug level.
2860  *
2861  * See the level definitions in iwl for details.
2862  *
2863  * The debug_level being managed using sysfs below is a per device debug
2864  * level that is used instead of the global debug level if it (the per
2865  * device debug level) is set.
2866  */
2867 static ssize_t show_debug_level(struct device *d,
2868                                 struct device_attribute *attr, char *buf)
2869 {
2870         struct iwl_priv *priv = dev_get_drvdata(d);
2871         return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
2872 }
2873 static ssize_t store_debug_level(struct device *d,
2874                                 struct device_attribute *attr,
2875                                  const char *buf, size_t count)
2876 {
2877         struct iwl_priv *priv = dev_get_drvdata(d);
2878         unsigned long val;
2879         int ret;
2880
2881         ret = strict_strtoul(buf, 0, &val);
2882         if (ret)
2883                 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
2884         else {
2885                 priv->debug_level = val;
2886                 if (iwl_alloc_traffic_mem(priv))
2887                         IWL_ERR(priv,
2888                                 "Not enough memory to generate traffic log\n");
2889         }
2890         return strnlen(buf, count);
2891 }
2892
2893 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
2894                         show_debug_level, store_debug_level);
2895
2896
2897 #endif /* CONFIG_IWLWIFI_DEBUG */
2898
2899
2900 static ssize_t show_temperature(struct device *d,
2901                                 struct device_attribute *attr, char *buf)
2902 {
2903         struct iwl_priv *priv = dev_get_drvdata(d);
2904
2905         if (!iwl_is_alive(priv))
2906                 return -EAGAIN;
2907
2908         return sprintf(buf, "%d\n", priv->temperature);
2909 }
2910
2911 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
2912
2913 static ssize_t show_tx_power(struct device *d,
2914                              struct device_attribute *attr, char *buf)
2915 {
2916         struct iwl_priv *priv = dev_get_drvdata(d);
2917
2918         if (!iwl_is_ready_rf(priv))
2919                 return sprintf(buf, "off\n");
2920         else
2921                 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
2922 }
2923
2924 static ssize_t store_tx_power(struct device *d,
2925                               struct device_attribute *attr,
2926                               const char *buf, size_t count)
2927 {
2928         struct iwl_priv *priv = dev_get_drvdata(d);
2929         unsigned long val;
2930         int ret;
2931
2932         ret = strict_strtoul(buf, 10, &val);
2933         if (ret)
2934                 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
2935         else {
2936                 ret = iwl_set_tx_power(priv, val, false);
2937                 if (ret)
2938                         IWL_ERR(priv, "failed setting tx power (0x%d).\n",
2939                                 ret);
2940                 else
2941                         ret = count;
2942         }
2943         return ret;
2944 }
2945
2946 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
2947
2948 static ssize_t show_flags(struct device *d,
2949                           struct device_attribute *attr, char *buf)
2950 {
2951         struct iwl_priv *priv = dev_get_drvdata(d);
2952
2953         return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
2954 }
2955
2956 static ssize_t store_flags(struct device *d,
2957                            struct device_attribute *attr,
2958                            const char *buf, size_t count)
2959 {
2960         struct iwl_priv *priv = dev_get_drvdata(d);
2961         unsigned long val;
2962         u32 flags;
2963         int ret = strict_strtoul(buf, 0, &val);
2964         if (ret)
2965                 return ret;
2966         flags = (u32)val;
2967
2968         mutex_lock(&priv->mutex);
2969         if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
2970                 /* Cancel any currently running scans... */
2971                 if (iwl_scan_cancel_timeout(priv, 100))
2972                         IWL_WARN(priv, "Could not cancel scan.\n");
2973                 else {
2974                         IWL_DEBUG_INFO(priv, "Commit rxon.flags = 0x%04X\n", flags);
2975                         priv->staging_rxon.flags = cpu_to_le32(flags);
2976                         iwlcore_commit_rxon(priv);
2977                 }
2978         }
2979         mutex_unlock(&priv->mutex);
2980
2981         return count;
2982 }
2983
2984 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
2985
2986 static ssize_t show_filter_flags(struct device *d,
2987                                  struct device_attribute *attr, char *buf)
2988 {
2989         struct iwl_priv *priv = dev_get_drvdata(d);
2990
2991         return sprintf(buf, "0x%04X\n",
2992                 le32_to_cpu(priv->active_rxon.filter_flags));
2993 }
2994
2995 static ssize_t store_filter_flags(struct device *d,
2996                                   struct device_attribute *attr,
2997                                   const char *buf, size_t count)
2998 {
2999         struct iwl_priv *priv = dev_get_drvdata(d);
3000         unsigned long val;
3001         u32 filter_flags;
3002         int ret = strict_strtoul(buf, 0, &val);
3003         if (ret)
3004                 return ret;
3005         filter_flags = (u32)val;
3006
3007         mutex_lock(&priv->mutex);
3008         if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
3009                 /* Cancel any currently running scans... */
3010                 if (iwl_scan_cancel_timeout(priv, 100))
3011                         IWL_WARN(priv, "Could not cancel scan.\n");
3012                 else {
3013                         IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
3014                                        "0x%04X\n", filter_flags);
3015                         priv->staging_rxon.filter_flags =
3016                                 cpu_to_le32(filter_flags);
3017                         iwlcore_commit_rxon(priv);
3018                 }
3019         }
3020         mutex_unlock(&priv->mutex);
3021
3022         return count;
3023 }
3024
3025 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
3026                    store_filter_flags);
3027
3028
3029 static ssize_t show_statistics(struct device *d,
3030                                struct device_attribute *attr, char *buf)
3031 {
3032         struct iwl_priv *priv = dev_get_drvdata(d);
3033         u32 size = sizeof(struct iwl_notif_statistics);
3034         u32 len = 0, ofs = 0;
3035         u8 *data = (u8 *)&priv->statistics;
3036         int rc = 0;
3037
3038         if (!iwl_is_alive(priv))
3039                 return -EAGAIN;
3040
3041         mutex_lock(&priv->mutex);
3042         rc = iwl_send_statistics_request(priv, CMD_SYNC, false);
3043         mutex_unlock(&priv->mutex);
3044
3045         if (rc) {
3046                 len = sprintf(buf,
3047                               "Error sending statistics request: 0x%08X\n", rc);
3048                 return len;
3049         }
3050
3051         while (size && (PAGE_SIZE - len)) {
3052                 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3053                                    PAGE_SIZE - len, 1);
3054                 len = strlen(buf);
3055                 if (PAGE_SIZE - len)
3056                         buf[len++] = '\n';
3057
3058                 ofs += 16;
3059                 size -= min(size, 16U);
3060         }
3061
3062         return len;
3063 }
3064
3065 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
3066
3067 static ssize_t show_rts_ht_protection(struct device *d,
3068                              struct device_attribute *attr, char *buf)
3069 {
3070         struct iwl_priv *priv = dev_get_drvdata(d);
3071
3072         return sprintf(buf, "%s\n",
3073                 priv->cfg->use_rts_for_ht ? "RTS/CTS" : "CTS-to-self");
3074 }
3075
3076 static ssize_t store_rts_ht_protection(struct device *d,
3077                               struct device_attribute *attr,
3078                               const char *buf, size_t count)
3079 {
3080         struct iwl_priv *priv = dev_get_drvdata(d);
3081         unsigned long val;
3082         int ret;
3083
3084         ret = strict_strtoul(buf, 10, &val);
3085         if (ret)
3086                 IWL_INFO(priv, "Input is not in decimal form.\n");
3087         else {
3088                 if (!iwl_is_associated(priv))
3089                         priv->cfg->use_rts_for_ht = val ? true : false;
3090                 else
3091                         IWL_ERR(priv, "Sta associated with AP - "
3092                                 "Change protection mechanism is not allowed\n");
3093                 ret = count;
3094         }
3095         return ret;
3096 }
3097
3098 static DEVICE_ATTR(rts_ht_protection, S_IWUSR | S_IRUGO,
3099                         show_rts_ht_protection, store_rts_ht_protection);
3100
3101
3102 /*****************************************************************************
3103  *
3104  * driver setup and teardown
3105  *
3106  *****************************************************************************/
3107
3108 static void iwl_setup_deferred_work(struct iwl_priv *priv)
3109 {
3110         priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3111
3112         init_waitqueue_head(&priv->wait_command_queue);
3113
3114         INIT_WORK(&priv->up, iwl_bg_up);
3115         INIT_WORK(&priv->restart, iwl_bg_restart);
3116         INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3117         INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3118         INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3119         INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3120         INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
3121
3122         iwl_setup_scan_deferred_work(priv);
3123
3124         if (priv->cfg->ops->lib->setup_deferred_work)
3125                 priv->cfg->ops->lib->setup_deferred_work(priv);
3126
3127         init_timer(&priv->statistics_periodic);
3128         priv->statistics_periodic.data = (unsigned long)priv;
3129         priv->statistics_periodic.function = iwl_bg_statistics_periodic;
3130
3131         if (!priv->cfg->use_isr_legacy)
3132                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3133                         iwl_irq_tasklet, (unsigned long)priv);
3134         else
3135                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3136                         iwl_irq_tasklet_legacy, (unsigned long)priv);
3137 }
3138
3139 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3140 {
3141         if (priv->cfg->ops->lib->cancel_deferred_work)
3142                 priv->cfg->ops->lib->cancel_deferred_work(priv);
3143
3144         cancel_delayed_work_sync(&priv->init_alive_start);
3145         cancel_delayed_work(&priv->scan_check);
3146         cancel_delayed_work(&priv->alive_start);
3147         cancel_work_sync(&priv->beacon_update);
3148         del_timer_sync(&priv->statistics_periodic);
3149 }
3150
3151 static void iwl_init_hw_rates(struct iwl_priv *priv,
3152                               struct ieee80211_rate *rates)
3153 {
3154         int i;
3155
3156         for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3157                 rates[i].bitrate = iwl_rates[i].ieee * 5;
3158                 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3159                 rates[i].hw_value_short = i;
3160                 rates[i].flags = 0;
3161                 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3162                         /*
3163                          * If CCK != 1M then set short preamble rate flag.
3164                          */
3165                         rates[i].flags |=
3166                                 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3167                                         0 : IEEE80211_RATE_SHORT_PREAMBLE;
3168                 }
3169         }
3170 }
3171
3172 static int iwl_init_drv(struct iwl_priv *priv)
3173 {
3174         int ret;
3175
3176         priv->ibss_beacon = NULL;
3177
3178         spin_lock_init(&priv->lock);
3179         spin_lock_init(&priv->sta_lock);
3180         spin_lock_init(&priv->hcmd_lock);
3181
3182         INIT_LIST_HEAD(&priv->free_frames);
3183
3184         mutex_init(&priv->mutex);
3185
3186         /* Clear the driver's (not device's) station table */
3187         iwl_clear_stations_table(priv);
3188
3189         priv->ieee_channels = NULL;
3190         priv->ieee_rates = NULL;
3191         priv->band = IEEE80211_BAND_2GHZ;
3192
3193         priv->iw_mode = NL80211_IFTYPE_STATION;
3194
3195         /* Choose which receivers/antennas to use */
3196         if (priv->cfg->ops->hcmd->set_rxon_chain)
3197                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3198
3199         iwl_init_scan_params(priv);
3200
3201         iwl_reset_qos(priv);
3202
3203         priv->qos_data.qos_active = 0;
3204         priv->qos_data.qos_cap.val = 0;
3205
3206         priv->rates_mask = IWL_RATES_MASK;
3207         /* Set the tx_power_user_lmt to the lowest power level
3208          * this value will get overwritten by channel max power avg
3209          * from eeprom */
3210         priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MIN;
3211
3212         ret = iwl_init_channel_map(priv);
3213         if (ret) {
3214                 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3215                 goto err;
3216         }
3217
3218         ret = iwlcore_init_geos(priv);
3219         if (ret) {
3220                 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3221                 goto err_free_channel_map;
3222         }
3223         iwl_init_hw_rates(priv, priv->ieee_rates);
3224
3225         return 0;
3226
3227 err_free_channel_map:
3228         iwl_free_channel_map(priv);
3229 err:
3230         return ret;
3231 }
3232
3233 static void iwl_uninit_drv(struct iwl_priv *priv)
3234 {
3235         iwl_calib_free_results(priv);
3236         iwlcore_free_geos(priv);
3237         iwl_free_channel_map(priv);
3238         kfree(priv->scan);
3239 }
3240
3241 static struct attribute *iwl_sysfs_entries[] = {
3242         &dev_attr_flags.attr,
3243         &dev_attr_filter_flags.attr,
3244         &dev_attr_statistics.attr,
3245         &dev_attr_temperature.attr,
3246         &dev_attr_tx_power.attr,
3247         &dev_attr_rts_ht_protection.attr,
3248 #ifdef CONFIG_IWLWIFI_DEBUG
3249         &dev_attr_debug_level.attr,
3250 #endif
3251         NULL
3252 };
3253
3254 static struct attribute_group iwl_attribute_group = {
3255         .name = NULL,           /* put in device directory */
3256         .attrs = iwl_sysfs_entries,
3257 };
3258
3259 static struct ieee80211_ops iwl_hw_ops = {
3260         .tx = iwl_mac_tx,
3261         .start = iwl_mac_start,
3262         .stop = iwl_mac_stop,
3263         .add_interface = iwl_mac_add_interface,
3264         .remove_interface = iwl_mac_remove_interface,
3265         .config = iwl_mac_config,
3266         .configure_filter = iwl_configure_filter,
3267         .set_key = iwl_mac_set_key,
3268         .update_tkip_key = iwl_mac_update_tkip_key,
3269         .get_stats = iwl_mac_get_stats,
3270         .get_tx_stats = iwl_mac_get_tx_stats,
3271         .conf_tx = iwl_mac_conf_tx,
3272         .reset_tsf = iwl_mac_reset_tsf,
3273         .bss_info_changed = iwl_bss_info_changed,
3274         .ampdu_action = iwl_mac_ampdu_action,
3275         .hw_scan = iwl_mac_hw_scan,
3276         .sta_notify = iwl_mac_sta_notify,
3277 };
3278
3279 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3280 {
3281         int err = 0;
3282         struct iwl_priv *priv;
3283         struct ieee80211_hw *hw;
3284         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3285         unsigned long flags;
3286         u16 pci_cmd;
3287
3288         /************************
3289          * 1. Allocating HW data
3290          ************************/
3291
3292         /* Disabling hardware scan means that mac80211 will perform scans
3293          * "the hard way", rather than using device's scan. */
3294         if (cfg->mod_params->disable_hw_scan) {
3295                 if (iwl_debug_level & IWL_DL_INFO)
3296                         dev_printk(KERN_DEBUG, &(pdev->dev),
3297                                    "Disabling hw_scan\n");
3298                 iwl_hw_ops.hw_scan = NULL;
3299         }
3300
3301         hw = iwl_alloc_all(cfg, &iwl_hw_ops);
3302         if (!hw) {
3303                 err = -ENOMEM;
3304                 goto out;
3305         }
3306         priv = hw->priv;
3307         /* At this point both hw and priv are allocated. */
3308
3309         SET_IEEE80211_DEV(hw, &pdev->dev);
3310
3311         IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3312         priv->cfg = cfg;
3313         priv->pci_dev = pdev;
3314         priv->inta_mask = CSR_INI_SET_MASK;
3315
3316 #ifdef CONFIG_IWLWIFI_DEBUG
3317         atomic_set(&priv->restrict_refcnt, 0);
3318 #endif
3319         if (iwl_alloc_traffic_mem(priv))
3320                 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3321
3322         /**************************
3323          * 2. Initializing PCI bus
3324          **************************/
3325         if (pci_enable_device(pdev)) {
3326                 err = -ENODEV;
3327                 goto out_ieee80211_free_hw;
3328         }
3329
3330         pci_set_master(pdev);
3331
3332         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
3333         if (!err)
3334                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
3335         if (err) {
3336                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3337                 if (!err)
3338                         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3339                 /* both attempts failed: */
3340                 if (err) {
3341                         IWL_WARN(priv, "No suitable DMA available.\n");
3342                         goto out_pci_disable_device;
3343                 }
3344         }
3345
3346         err = pci_request_regions(pdev, DRV_NAME);
3347         if (err)
3348                 goto out_pci_disable_device;
3349
3350         pci_set_drvdata(pdev, priv);
3351
3352
3353         /***********************
3354          * 3. Read REV register
3355          ***********************/
3356         priv->hw_base = pci_iomap(pdev, 0, 0);
3357         if (!priv->hw_base) {
3358                 err = -ENODEV;
3359                 goto out_pci_release_regions;
3360         }
3361
3362         IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3363                 (unsigned long long) pci_resource_len(pdev, 0));
3364         IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3365
3366         /* this spin lock will be used in apm_ops.init and EEPROM access
3367          * we should init now
3368          */
3369         spin_lock_init(&priv->reg_lock);
3370         iwl_hw_detect(priv);
3371         IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n",
3372                 priv->cfg->name, priv->hw_rev);
3373
3374         /* We disable the RETRY_TIMEOUT register (0x41) to keep
3375          * PCI Tx retries from interfering with C3 CPU state */
3376         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3377
3378         iwl_prepare_card_hw(priv);
3379         if (!priv->hw_ready) {
3380                 IWL_WARN(priv, "Failed, HW not ready\n");
3381                 goto out_iounmap;
3382         }
3383
3384         /*****************
3385          * 4. Read EEPROM
3386          *****************/
3387         /* Read the EEPROM */
3388         err = iwl_eeprom_init(priv);
3389         if (err) {
3390                 IWL_ERR(priv, "Unable to init EEPROM\n");
3391                 goto out_iounmap;
3392         }
3393         err = iwl_eeprom_check_version(priv);
3394         if (err)
3395                 goto out_free_eeprom;
3396
3397         /* extract MAC Address */
3398         iwl_eeprom_get_mac(priv, priv->mac_addr);
3399         IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
3400         SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
3401
3402         /************************
3403          * 5. Setup HW constants
3404          ************************/
3405         if (iwl_set_hw_params(priv)) {
3406                 IWL_ERR(priv, "failed to set hw parameters\n");
3407                 goto out_free_eeprom;
3408         }
3409
3410         /*******************
3411          * 6. Setup priv
3412          *******************/
3413
3414         err = iwl_init_drv(priv);
3415         if (err)
3416                 goto out_free_eeprom;
3417         /* At this point both hw and priv are initialized. */
3418
3419         /********************
3420          * 7. Setup services
3421          ********************/
3422         spin_lock_irqsave(&priv->lock, flags);
3423         iwl_disable_interrupts(priv);
3424         spin_unlock_irqrestore(&priv->lock, flags);
3425
3426         pci_enable_msi(priv->pci_dev);
3427
3428         iwl_alloc_isr_ict(priv);
3429         err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
3430                           IRQF_SHARED, DRV_NAME, priv);
3431         if (err) {
3432                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3433                 goto out_disable_msi;
3434         }
3435         err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
3436         if (err) {
3437                 IWL_ERR(priv, "failed to create sysfs device attributes\n");
3438                 goto out_free_irq;
3439         }
3440
3441         iwl_setup_deferred_work(priv);
3442         iwl_setup_rx_handlers(priv);
3443
3444         /**********************************
3445          * 8. Setup and register mac80211
3446          **********************************/
3447
3448         /* enable interrupts if needed: hw bug w/a */
3449         pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3450         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3451                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3452                 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3453         }
3454
3455         iwl_enable_interrupts(priv);
3456
3457         err = iwl_setup_mac(priv);
3458         if (err)
3459                 goto out_remove_sysfs;
3460
3461         err = iwl_dbgfs_register(priv, DRV_NAME);
3462         if (err)
3463                 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
3464
3465         /* If platform's RF_KILL switch is NOT set to KILL */
3466         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3467                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3468         else
3469                 set_bit(STATUS_RF_KILL_HW, &priv->status);
3470
3471         wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3472                 test_bit(STATUS_RF_KILL_HW, &priv->status));
3473
3474         iwl_power_initialize(priv);
3475         iwl_tt_initialize(priv);
3476         return 0;
3477
3478  out_remove_sysfs:
3479         destroy_workqueue(priv->workqueue);
3480         priv->workqueue = NULL;
3481         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3482  out_free_irq:
3483         free_irq(priv->pci_dev->irq, priv);
3484         iwl_free_isr_ict(priv);
3485  out_disable_msi:
3486         pci_disable_msi(priv->pci_dev);
3487         iwl_uninit_drv(priv);
3488  out_free_eeprom:
3489         iwl_eeprom_free(priv);
3490  out_iounmap:
3491         pci_iounmap(pdev, priv->hw_base);
3492  out_pci_release_regions:
3493         pci_set_drvdata(pdev, NULL);
3494         pci_release_regions(pdev);
3495  out_pci_disable_device:
3496         pci_disable_device(pdev);
3497  out_ieee80211_free_hw:
3498         iwl_free_traffic_mem(priv);
3499         ieee80211_free_hw(priv->hw);
3500  out:
3501         return err;
3502 }
3503
3504 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3505 {
3506         struct iwl_priv *priv = pci_get_drvdata(pdev);
3507         unsigned long flags;
3508
3509         if (!priv)
3510                 return;
3511
3512         IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3513
3514         iwl_dbgfs_unregister(priv);
3515         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3516
3517         /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3518          * to be called and iwl_down since we are removing the device
3519          * we need to set STATUS_EXIT_PENDING bit.
3520          */
3521         set_bit(STATUS_EXIT_PENDING, &priv->status);
3522         if (priv->mac80211_registered) {
3523                 ieee80211_unregister_hw(priv->hw);
3524                 priv->mac80211_registered = 0;
3525         } else {
3526                 iwl_down(priv);
3527         }
3528
3529         /*
3530          * Make sure device is reset to low power before unloading driver.
3531          * This may be redundant with iwl_down(), but there are paths to
3532          * run iwl_down() without calling apm_ops.stop(), and there are
3533          * paths to avoid running iwl_down() at all before leaving driver.
3534          * This (inexpensive) call *makes sure* device is reset.
3535          */
3536         priv->cfg->ops->lib->apm_ops.stop(priv);
3537
3538         iwl_tt_exit(priv);
3539
3540         /* make sure we flush any pending irq or
3541          * tasklet for the driver
3542          */
3543         spin_lock_irqsave(&priv->lock, flags);
3544         iwl_disable_interrupts(priv);
3545         spin_unlock_irqrestore(&priv->lock, flags);
3546
3547         iwl_synchronize_irq(priv);
3548
3549         iwl_dealloc_ucode_pci(priv);
3550
3551         if (priv->rxq.bd)
3552                 iwl_rx_queue_free(priv, &priv->rxq);
3553         iwl_hw_txq_ctx_free(priv);
3554
3555         iwl_clear_stations_table(priv);
3556         iwl_eeprom_free(priv);
3557
3558
3559         /*netif_stop_queue(dev); */
3560         flush_workqueue(priv->workqueue);
3561
3562         /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3563          * priv->workqueue... so we can't take down the workqueue
3564          * until now... */
3565         destroy_workqueue(priv->workqueue);
3566         priv->workqueue = NULL;
3567         iwl_free_traffic_mem(priv);
3568
3569         free_irq(priv->pci_dev->irq, priv);
3570         pci_disable_msi(priv->pci_dev);
3571         pci_iounmap(pdev, priv->hw_base);
3572         pci_release_regions(pdev);
3573         pci_disable_device(pdev);
3574         pci_set_drvdata(pdev, NULL);
3575
3576         iwl_uninit_drv(priv);
3577
3578         iwl_free_isr_ict(priv);
3579
3580         if (priv->ibss_beacon)
3581                 dev_kfree_skb(priv->ibss_beacon);
3582
3583         ieee80211_free_hw(priv->hw);
3584 }
3585
3586
3587 /*****************************************************************************
3588  *
3589  * driver and module entry point
3590  *
3591  *****************************************************************************/
3592
3593 /* Hardware specific file defines the PCI IDs table for that hardware module */
3594 static struct pci_device_id iwl_hw_card_ids[] = {
3595 #ifdef CONFIG_IWL4965
3596         {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3597         {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
3598 #endif /* CONFIG_IWL4965 */
3599 #ifdef CONFIG_IWL5000
3600 /* 5100 Series WiFi */
3601         {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
3602         {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
3603         {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
3604         {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
3605         {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
3606         {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
3607         {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
3608         {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
3609         {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
3610         {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
3611         {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
3612         {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
3613         {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
3614         {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
3615         {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
3616         {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
3617         {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
3618         {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
3619         {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
3620         {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
3621         {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
3622         {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
3623         {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
3624         {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
3625
3626 /* 5300 Series WiFi */
3627         {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
3628         {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
3629         {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
3630         {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
3631         {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
3632         {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
3633         {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
3634         {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
3635         {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
3636         {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
3637         {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
3638         {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
3639
3640 /* 5350 Series WiFi/WiMax */
3641         {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
3642         {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
3643         {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
3644
3645 /* 5150 Series Wifi/WiMax */
3646         {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
3647         {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
3648         {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
3649         {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
3650         {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
3651         {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
3652
3653         {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
3654         {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
3655         {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
3656         {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
3657
3658 /* 6x00 Series */
3659         {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
3660         {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
3661         {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
3662         {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
3663         {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
3664         {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
3665         {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
3666         {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
3667         {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
3668         {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
3669
3670 /* 6x50 WiFi/WiMax Series */
3671         {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
3672         {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
3673         {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
3674         {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
3675         {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
3676         {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
3677
3678 /* 1000 Series WiFi */
3679         {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
3680         {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
3681         {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
3682         {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
3683         {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
3684         {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
3685         {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
3686         {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
3687         {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
3688         {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
3689         {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
3690         {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
3691 #endif /* CONFIG_IWL5000 */
3692
3693         {0}
3694 };
3695 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
3696
3697 static struct pci_driver iwl_driver = {
3698         .name = DRV_NAME,
3699         .id_table = iwl_hw_card_ids,
3700         .probe = iwl_pci_probe,
3701         .remove = __devexit_p(iwl_pci_remove),
3702 #ifdef CONFIG_PM
3703         .suspend = iwl_pci_suspend,
3704         .resume = iwl_pci_resume,
3705 #endif
3706 };
3707
3708 static int __init iwl_init(void)
3709 {
3710
3711         int ret;
3712         printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
3713         printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
3714
3715         ret = iwlagn_rate_control_register();
3716         if (ret) {
3717                 printk(KERN_ERR DRV_NAME
3718                        "Unable to register rate control algorithm: %d\n", ret);
3719                 return ret;
3720         }
3721
3722         ret = pci_register_driver(&iwl_driver);
3723         if (ret) {
3724                 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
3725                 goto error_register;
3726         }
3727
3728         return ret;
3729
3730 error_register:
3731         iwlagn_rate_control_unregister();
3732         return ret;
3733 }
3734
3735 static void __exit iwl_exit(void)
3736 {
3737         pci_unregister_driver(&iwl_driver);
3738         iwlagn_rate_control_unregister();
3739 }
3740
3741 module_exit(iwl_exit);
3742 module_init(iwl_init);
3743
3744 #ifdef CONFIG_IWLWIFI_DEBUG
3745 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
3746 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
3747 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
3748 MODULE_PARM_DESC(debug, "debug output mask");
3749 #endif
3750