SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/net/wireless/iwlwifi/iwl-agn.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
   4  *
   5  * Portions of this file are derived from the ipw3945 project, as well
   6  * as portions of the ieee80211 subsystem header files.
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of version 2 of the GNU General Public License as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program; if not, write to the Free Software Foundation, Inc.,
  19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20  *
  21  * The full GNU General Public License is included in this distribution in the
  22  * file called LICENSE.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #include <linux/kernel.h>
  31 #include <linux/module.h>
  32 #include <linux/init.h>
  33 #include <linux/pci.h>
  34 #include <linux/dma-mapping.h>
  35 #include <linux/delay.h>
  36 #include <linux/sched.h>
  37 #include <linux/skbuff.h>
  38 #include <linux/netdevice.h>
  39 #include <linux/wireless.h>
  40 #include <linux/firmware.h>
  41 #include <linux/etherdevice.h>
  42 #include <linux/if_arp.h>
  43
  44 #include <net/mac80211.h>
  45
  46 #include <asm/div64.h>
  47
  48 #define DRV_NAME        "iwlagn"
  49
  50 #include "iwl-eeprom.h"
  51 #include "iwl-dev.h"
  52 #include "iwl-core.h"
  53 #include "iwl-io.h"
  54 #include "iwl-helpers.h"
  55 #include "iwl-sta.h"
  56 #include "iwl-calib.h"
  57
  58
  59 /******************************************************************************
  60  *
  61  * module boiler plate
  62  *
  63  ******************************************************************************/
  64
  65 /*
  66  * module name, copyright, version, etc.
  67  */
  68 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
  69
  70 #ifdef CONFIG_IWLWIFI_DEBUG
  71 #define VD "d"
  72 #else
  73 #define VD
  74 #endif
  75
  76 #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  77 #define VS "s"
  78 #else
  79 #define VS
  80 #endif
  81
  82 #define DRV_VERSION     IWLWIFI_VERSION VD VS
  83
  84
  85 MODULE_DESCRIPTION(DRV_DESCRIPTION);
  86 MODULE_VERSION(DRV_VERSION);
  87 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  88 MODULE_LICENSE("GPL");
  89 MODULE_ALIAS("iwl4965");
  90
  91 /*************** STATION TABLE MANAGEMENT ****
  92  * mac80211 should be examined to determine if sta_info is duplicating
  93  * the functionality provided here
  94  */
  95
  96 /**************************************************************/
  97
  98 /**
  99  * iwl_commit_rxon - commit staging_rxon to hardware
 100  *
 101  * The RXON command in staging_rxon is committed to the hardware and
 102  * the active_rxon structure is updated with the new data.  This
 103  * function correctly transitions out of the RXON_ASSOC_MSK state if
 104  * a HW tune is required based on the RXON structure changes.
 105  */
 106 int iwl_commit_rxon(struct iwl_priv *priv)
 107 {
 108         /* cast away the const for active_rxon in this function */
 109         struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
 110         int ret;
 111         bool new_assoc =
 112                 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
 113
 114         if (!iwl_is_alive(priv))
 115                 return -EBUSY;
 116
 117         /* always get timestamp with Rx frame */
 118         priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
 119
 120         ret = iwl_check_rxon_cmd(priv);
 121         if (ret) {
 122                 IWL_ERR(priv, "Invalid RXON configuration.  Not committing.\n");
 123                 return -EINVAL;
 124         }
 125
 126         /*
 127          * receive commit_rxon request
 128          * abort any previous channel switch if still in process
 129          */
 130         if (priv->switch_rxon.switch_in_progress &&
 131             (priv->switch_rxon.channel != priv->staging_rxon.channel)) {
 132                 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
 133                       le16_to_cpu(priv->switch_rxon.channel));
 134                 priv->switch_rxon.switch_in_progress = false;
 135         }
 136
 137         /* If we don't need to send a full RXON, we can use
 138          * iwl_rxon_assoc_cmd which is used to reconfigure filter
 139          * and other flags for the current radio configuration. */
 140         if (!iwl_full_rxon_required(priv)) {
 141                 ret = iwl_send_rxon_assoc(priv);
 142                 if (ret) {
 143                         IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
 144                         return ret;
 145                 }
 146
 147                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 148                 iwl_print_rx_config_cmd(priv);
 149                 return 0;
 150         }
 151
 152         /* station table will be cleared */
 153         priv->assoc_station_added = 0;
 154
 155         /* If we are currently associated and the new config requires
 156          * an RXON_ASSOC and the new config wants the associated mask enabled,
 157          * we must clear the associated from the active configuration
 158          * before we apply the new config */
 159         if (iwl_is_associated(priv) && new_assoc) {
 160                 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
 161                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
 162
 163                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 164                                       sizeof(struct iwl_rxon_cmd),
 165                                       &priv->active_rxon);
 166
 167                 /* If the mask clearing failed then we set
 168                  * active_rxon back to what it was previously */
 169                 if (ret) {
 170                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
 171                         IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
 172                         return ret;
 173                 }
 174         }
 175
 176         IWL_DEBUG_INFO(priv, "Sending RXON\n"
 177                        "* with%s RXON_FILTER_ASSOC_MSK\n"
 178                        "* channel = %d\n"
 179                        "* bssid = %pM\n",
 180                        (new_assoc ? "" : "out"),
 181                        le16_to_cpu(priv->staging_rxon.channel),
 182                        priv->staging_rxon.bssid_addr);
 183
 184         iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
 185
 186         /* Apply the new configuration
 187          * RXON unassoc clears the station table in uCode, send it before
 188          * we add the bcast station. If assoc bit is set, we will send RXON
 189          * after having added the bcast and bssid station.
 190          */
 191         if (!new_assoc) {
 192                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 193                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 194                 if (ret) {
 195                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 196                         return ret;
 197                 }
 198                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 199         }
 200
 201         iwl_clear_stations_table(priv);
 202
 203         priv->start_calib = 0;
 204
 205         /* Add the broadcast address so we can send broadcast frames */
 206         iwl_add_bcast_station(priv);
 207
 208         /* If we have set the ASSOC_MSK and we are in BSS mode then
 209          * add the IWL_AP_ID to the station rate table */
 210         if (new_assoc) {
 211                 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
 212                         ret = iwl_rxon_add_station(priv,
 213                                            priv->active_rxon.bssid_addr, 1);
 214                         if (ret == IWL_INVALID_STATION) {
 215                                 IWL_ERR(priv,
 216                                         "Error adding AP address for TX.\n");
 217                                 return -EIO;
 218                         }
 219                         priv->assoc_station_added = 1;
 220                         if (priv->default_wep_key &&
 221                             iwl_send_static_wepkey_cmd(priv, 0))
 222                                 IWL_ERR(priv,
 223                                         "Could not send WEP static key.\n");
 224                 }
 225
 226                 /*
 227                  * allow CTS-to-self if possible for new association.
 228                  * this is relevant only for 5000 series and up,
 229                  * but will not damage 4965
 230                  */
 231                 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
 232
 233                 /* Apply the new configuration
 234                  * RXON assoc doesn't clear the station table in uCode,
 235                  */
 236                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 237                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 238                 if (ret) {
 239                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 240                         return ret;
 241                 }
 242                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 243         }
 244         iwl_print_rx_config_cmd(priv);
 245
 246         iwl_init_sensitivity(priv);
 247
 248         /* If we issue a new RXON command which required a tune then we must
 249          * send a new TXPOWER command or we won't be able to Tx any frames */
 250         ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
 251         if (ret) {
 252                 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
 253                 return ret;
 254         }
 255
 256         return 0;
 257 }
 258
 259 void iwl_update_chain_flags(struct iwl_priv *priv)
 260 {
 261
 262         if (priv->cfg->ops->hcmd->set_rxon_chain)
 263                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
 264         iwlcore_commit_rxon(priv);
 265 }
 266
 267 static void iwl_clear_free_frames(struct iwl_priv *priv)
 268 {
 269         struct list_head *element;
 270
 271         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
 272                        priv->frames_count);
 273
 274         while (!list_empty(&priv->free_frames)) {
 275                 element = priv->free_frames.next;
 276                 list_del(element);
 277                 kfree(list_entry(element, struct iwl_frame, list));
 278                 priv->frames_count--;
 279         }
 280
 281         if (priv->frames_count) {
 282                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
 283                             priv->frames_count);
 284                 priv->frames_count = 0;
 285         }
 286 }
 287
 288 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
 289 {
 290         struct iwl_frame *frame;
 291         struct list_head *element;
 292         if (list_empty(&priv->free_frames)) {
 293                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
 294                 if (!frame) {
 295                         IWL_ERR(priv, "Could not allocate frame!\n");
 296                         return NULL;
 297                 }
 298
 299                 priv->frames_count++;
 300                 return frame;
 301         }
 302
 303         element = priv->free_frames.next;
 304         list_del(element);
 305         return list_entry(element, struct iwl_frame, list);
 306 }
 307
 308 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
 309 {
 310         memset(frame, 0, sizeof(*frame));
 311         list_add(&frame->list, &priv->free_frames);
 312 }
 313
 314 static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
 315                                           struct ieee80211_hdr *hdr,
 316                                           int left)
 317 {
 318         if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
 319             ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
 320              (priv->iw_mode != NL80211_IFTYPE_AP)))
 321                 return 0;
 322
 323         if (priv->ibss_beacon->len > left)
 324                 return 0;
 325
 326         memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
 327
 328         return priv->ibss_beacon->len;
 329 }
 330
 331 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
 332                                        struct iwl_frame *frame, u8 rate)
 333 {
 334         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
 335         unsigned int frame_size;
 336
 337         tx_beacon_cmd = &frame->u.beacon;
 338         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
 339
 340         tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
 341         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
 342
 343         frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
 344                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
 345
 346         BUG_ON(frame_size > MAX_MPDU_SIZE);
 347         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
 348
 349         if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
 350                 tx_beacon_cmd->tx.rate_n_flags =
 351                         iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
 352         else
 353                 tx_beacon_cmd->tx.rate_n_flags =
 354                         iwl_hw_set_rate_n_flags(rate, 0);
 355
 356         tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
 357                                      TX_CMD_FLG_TSF_MSK |
 358                                      TX_CMD_FLG_STA_RATE_MSK;
 359
 360         return sizeof(*tx_beacon_cmd) + frame_size;
 361 }
 362 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
 363 {
 364         struct iwl_frame *frame;
 365         unsigned int frame_size;
 366         int rc;
 367         u8 rate;
 368
 369         frame = iwl_get_free_frame(priv);
 370
 371         if (!frame) {
 372                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
 373                           "command.\n");
 374                 return -ENOMEM;
 375         }
 376
 377         rate = iwl_rate_get_lowest_plcp(priv);
 378
 379         frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate);
 380
 381         rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
 382                               &frame->u.cmd[0]);
 383
 384         iwl_free_frame(priv, frame);
 385
 386         return rc;
 387 }
 388
 389 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
 390 {
 391         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 392
 393         dma_addr_t addr = get_unaligned_le32(&tb->lo);
 394         if (sizeof(dma_addr_t) > sizeof(u32))
 395                 addr |=
 396                 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
 397
 398         return addr;
 399 }
 400
 401 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
 402 {
 403         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 404
 405         return le16_to_cpu(tb->hi_n_len) >> 4;
 406 }
 407
 408 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
 409                                   dma_addr_t addr, u16 len)
 410 {
 411         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 412         u16 hi_n_len = len << 4;
 413
 414         put_unaligned_le32(addr, &tb->lo);
 415         if (sizeof(dma_addr_t) > sizeof(u32))
 416                 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
 417
 418         tb->hi_n_len = cpu_to_le16(hi_n_len);
 419
 420         tfd->num_tbs = idx + 1;
 421 }
 422
 423 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
 424 {
 425         return tfd->num_tbs & 0x1f;
 426 }
 427
 428 /**
 429  * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
 430  * @priv - driver private data
 431  * @txq - tx queue
 432  *
 433  * Does NOT advance any TFD circular buffer read/write indexes
 434  * Does NOT free the TFD itself (which is within circular buffer)
 435  */
 436 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
 437 {
 438         struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
 439         struct iwl_tfd *tfd;
 440         struct pci_dev *dev = priv->pci_dev;
 441         int index = txq->q.read_ptr;
 442         int i;
 443         int num_tbs;
 444
 445         tfd = &tfd_tmp[index];
 446
 447         /* Sanity check on number of chunks */
 448         num_tbs = iwl_tfd_get_num_tbs(tfd);
 449
 450         if (num_tbs >= IWL_NUM_OF_TBS) {
 451                 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
 452                 /* @todo issue fatal error, it is quite serious situation */
 453                 return;
 454         }
 455
 456         /* Unmap tx_cmd */
 457         if (num_tbs)
 458                 pci_unmap_single(dev,
 459                                 pci_unmap_addr(&txq->meta[index], mapping),
 460                                 pci_unmap_len(&txq->meta[index], len),
 461                                 PCI_DMA_BIDIRECTIONAL);
 462
 463         /* Unmap chunks, if any. */
 464         for (i = 1; i < num_tbs; i++) {
 465                 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
 466                                 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
 467
 468                 if (txq->txb) {
 469                         dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
 470                         txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
 471                 }
 472         }
 473 }
 474
 475 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
 476                                  struct iwl_tx_queue *txq,
 477                                  dma_addr_t addr, u16 len,
 478                                  u8 reset, u8 pad)
 479 {
 480         struct iwl_queue *q;
 481         struct iwl_tfd *tfd, *tfd_tmp;
 482         u32 num_tbs;
 483
 484         q = &txq->q;
 485         tfd_tmp = (struct iwl_tfd *)txq->tfds;
 486         tfd = &tfd_tmp[q->write_ptr];
 487
 488         if (reset)
 489                 memset(tfd, 0, sizeof(*tfd));
 490
 491         num_tbs = iwl_tfd_get_num_tbs(tfd);
 492
 493         /* Each TFD can point to a maximum 20 Tx buffers */
 494         if (num_tbs >= IWL_NUM_OF_TBS) {
 495                 IWL_ERR(priv, "Error can not send more than %d chunks\n",
 496                           IWL_NUM_OF_TBS);
 497                 return -EINVAL;
 498         }
 499
 500         BUG_ON(addr & ~DMA_BIT_MASK(36));
 501         if (unlikely(addr & ~IWL_TX_DMA_MASK))
 502                 IWL_ERR(priv, "Unaligned address = %llx\n",
 503                           (unsigned long long)addr);
 504
 505         iwl_tfd_set_tb(tfd, num_tbs, addr, len);
 506
 507         return 0;
 508 }
 509
 510 /*
 511  * Tell nic where to find circular buffer of Tx Frame Descriptors for
 512  * given Tx queue, and enable the DMA channel used for that queue.
 513  *
 514  * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
 515  * channels supported in hardware.
 516  */
 517 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
 518                          struct iwl_tx_queue *txq)
 519 {
 520         int txq_id = txq->q.id;
 521
 522         /* Circular buffer (TFD queue in DRAM) physical base address */
 523         iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
 524                              txq->q.dma_addr >> 8);
 525
 526         return 0;
 527 }
 528
 529 /******************************************************************************
 530  *
 531  * Generic RX handler implementations
 532  *
 533  ******************************************************************************/
 534 static void iwl_rx_reply_alive(struct iwl_priv *priv,
 535                                 struct iwl_rx_mem_buffer *rxb)
 536 {
 537         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 538         struct iwl_alive_resp *palive;
 539         struct delayed_work *pwork;
 540
 541         palive = &pkt->u.alive_frame;
 542
 543         IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
 544                        "0x%01X 0x%01X\n",
 545                        palive->is_valid, palive->ver_type,
 546                        palive->ver_subtype);
 547
 548         if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
 549                 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
 550                 memcpy(&priv->card_alive_init,
 551                        &pkt->u.alive_frame,
 552                        sizeof(struct iwl_init_alive_resp));
 553                 pwork = &priv->init_alive_start;
 554         } else {
 555                 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
 556                 memcpy(&priv->card_alive, &pkt->u.alive_frame,
 557                        sizeof(struct iwl_alive_resp));
 558                 pwork = &priv->alive_start;
 559         }
 560
 561         /* We delay the ALIVE response by 5ms to
 562          * give the HW RF Kill time to activate... */
 563         if (palive->is_valid == UCODE_VALID_OK)
 564                 queue_delayed_work(priv->workqueue, pwork,
 565                                    msecs_to_jiffies(5));
 566         else
 567                 IWL_WARN(priv, "uCode did not respond OK.\n");
 568 }
 569
 570 static void iwl_bg_beacon_update(struct work_struct *work)
 571 {
 572         struct iwl_priv *priv =
 573                 container_of(work, struct iwl_priv, beacon_update);
 574         struct sk_buff *beacon;
 575
 576         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
 577         beacon = ieee80211_beacon_get(priv->hw, priv->vif);
 578
 579         if (!beacon) {
 580                 IWL_ERR(priv, "update beacon failed\n");
 581                 return;
 582         }
 583
 584         mutex_lock(&priv->mutex);
 585         /* new beacon skb is allocated every time; dispose previous.*/
 586         if (priv->ibss_beacon)
 587                 dev_kfree_skb(priv->ibss_beacon);
 588
 589         priv->ibss_beacon = beacon;
 590         mutex_unlock(&priv->mutex);
 591
 592         iwl_send_beacon_cmd(priv);
 593 }
 594
 595 /**
 596  * iwl_bg_statistics_periodic - Timer callback to queue statistics
 597  *
 598  * This callback is provided in order to send a statistics request.
 599  *
 600  * This timer function is continually reset to execute within
 601  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
 602  * was received.  We need to ensure we receive the statistics in order
 603  * to update the temperature used for calibrating the TXPOWER.
 604  */
 605 static void iwl_bg_statistics_periodic(unsigned long data)
 606 {
 607         struct iwl_priv *priv = (struct iwl_priv *)data;
 608
 609         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 610                 return;
 611
 612         /* dont send host command if rf-kill is on */
 613         if (!iwl_is_ready_rf(priv))
 614                 return;
 615
 616         iwl_send_statistics_request(priv, CMD_ASYNC);
 617 }
 618
 619 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
 620                                 struct iwl_rx_mem_buffer *rxb)
 621 {
 622 #ifdef CONFIG_IWLWIFI_DEBUG
 623         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 624         struct iwl4965_beacon_notif *beacon =
 625                 (struct iwl4965_beacon_notif *)pkt->u.raw;
 626         u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
 627
 628         IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
 629                 "tsf %d %d rate %d\n",
 630                 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
 631                 beacon->beacon_notify_hdr.failure_frame,
 632                 le32_to_cpu(beacon->ibss_mgr_status),
 633                 le32_to_cpu(beacon->high_tsf),
 634                 le32_to_cpu(beacon->low_tsf), rate);
 635 #endif
 636
 637         if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
 638             (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
 639                 queue_work(priv->workqueue, &priv->beacon_update);
 640 }
 641
 642 /* Handle notification from uCode that card's power state is changing
 643  * due to software, hardware, or critical temperature RFKILL */
 644 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
 645                                     struct iwl_rx_mem_buffer *rxb)
 646 {
 647         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 648         u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
 649         unsigned long status = priv->status;
 650
 651         IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
 652                           (flags & HW_CARD_DISABLED) ? "Kill" : "On",
 653                           (flags & SW_CARD_DISABLED) ? "Kill" : "On");
 654
 655         if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
 656                      RF_CARD_DISABLED)) {
 657
 658                 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
 659                             CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 660
 661                 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 662                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 663
 664                 if (!(flags & RXON_CARD_DISABLED)) {
 665                         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
 666                                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 667                         iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 668                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 669                 }
 670                 if (flags & RF_CARD_DISABLED)
 671                         iwl_tt_enter_ct_kill(priv);
 672         }
 673         if (!(flags & RF_CARD_DISABLED))
 674                 iwl_tt_exit_ct_kill(priv);
 675
 676         if (flags & HW_CARD_DISABLED)
 677                 set_bit(STATUS_RF_KILL_HW, &priv->status);
 678         else
 679                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
 680
 681
 682         if (!(flags & RXON_CARD_DISABLED))
 683                 iwl_scan_cancel(priv);
 684
 685         if ((test_bit(STATUS_RF_KILL_HW, &status) !=
 686              test_bit(STATUS_RF_KILL_HW, &priv->status)))
 687                 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
 688                         test_bit(STATUS_RF_KILL_HW, &priv->status));
 689         else
 690                 wake_up_interruptible(&priv->wait_command_queue);
 691 }
 692
 693 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
 694 {
 695         if (src == IWL_PWR_SRC_VAUX) {
 696                 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
 697                         iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 698                                                APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 699                                                ~APMG_PS_CTRL_MSK_PWR_SRC);
 700         } else {
 701                 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 702                                        APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 703                                        ~APMG_PS_CTRL_MSK_PWR_SRC);
 704         }
 705
 706         return 0;
 707 }
 708
 709 /**
 710  * iwl_setup_rx_handlers - Initialize Rx handler callbacks
 711  *
 712  * Setup the RX handlers for each of the reply types sent from the uCode
 713  * to the host.
 714  *
 715  * This function chains into the hardware specific files for them to setup
 716  * any hardware specific handlers as well.
 717  */
 718 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
 719 {
 720         priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
 721         priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
 722         priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
 723         priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
 724         priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
 725             iwl_rx_pm_debug_statistics_notif;
 726         priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
 727
 728         /*
 729          * The same handler is used for both the REPLY to a discrete
 730          * statistics request from the host as well as for the periodic
 731          * statistics notifications (after received beacons) from the uCode.
 732          */
 733         priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics;
 734         priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
 735
 736         iwl_setup_spectrum_handlers(priv);
 737         iwl_setup_rx_scan_handlers(priv);
 738
 739         /* status change handler */
 740         priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
 741
 742         priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
 743             iwl_rx_missed_beacon_notif;
 744         /* Rx handlers */
 745         priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
 746         priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
 747         /* block ack */
 748         priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
 749         /* Set up hardware specific Rx handlers */
 750         priv->cfg->ops->lib->rx_handler_setup(priv);
 751 }
 752
 753 /**
 754  * iwl_rx_handle - Main entry function for receiving responses from uCode
 755  *
 756  * Uses the priv->rx_handlers callback function array to invoke
 757  * the appropriate handlers, including command responses,
 758  * frame-received notifications, and other notifications.
 759  */
 760 void iwl_rx_handle(struct iwl_priv *priv)
 761 {
 762         struct iwl_rx_mem_buffer *rxb;
 763         struct iwl_rx_packet *pkt;
 764         struct iwl_rx_queue *rxq = &priv->rxq;
 765         u32 r, i;
 766         int reclaim;
 767         unsigned long flags;
 768         u8 fill_rx = 0;
 769         u32 count = 8;
 770         int total_empty;
 771
 772         /* uCode's read index (stored in shared DRAM) indicates the last Rx
 773          * buffer that the driver may process (last buffer filled by ucode). */
 774         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
 775         i = rxq->read;
 776
 777         /* Rx interrupt, but nothing sent from uCode */
 778         if (i == r)
 779                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
 780
 781         /* calculate total frames need to be restock after handling RX */
 782         total_empty = r - rxq->write_actual;
 783         if (total_empty < 0)
 784                 total_empty += RX_QUEUE_SIZE;
 785
 786         if (total_empty > (RX_QUEUE_SIZE / 2))
 787                 fill_rx = 1;
 788
 789         while (i != r) {
 790                 rxb = rxq->queue[i];
 791
 792                 /* If an RXB doesn't have a Rx queue slot associated with it,
 793                  * then a bug has been introduced in the queue refilling
 794                  * routines -- catch it here */
 795                 BUG_ON(rxb == NULL);
 796
 797                 rxq->queue[i] = NULL;
 798
 799                 pci_unmap_page(priv->pci_dev, rxb->page_dma,
 800                                PAGE_SIZE << priv->hw_params.rx_page_order,
 801                                PCI_DMA_FROMDEVICE);
 802                 pkt = rxb_addr(rxb);
 803
 804                 trace_iwlwifi_dev_rx(priv, pkt,
 805                         le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
 806
 807                 /* Reclaim a command buffer only if this packet is a response
 808                  *   to a (driver-originated) command.
 809                  * If the packet (e.g. Rx frame) originated from uCode,
 810                  *   there is no command buffer to reclaim.
 811                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
 812                  *   but apparently a few don't get set; catch them here. */
 813                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
 814                         (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
 815                         (pkt->hdr.cmd != REPLY_RX) &&
 816                         (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
 817                         (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
 818                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
 819                         (pkt->hdr.cmd != REPLY_TX);
 820
 821                 /* Based on type of command response or notification,
 822                  *   handle those that need handling via function in
 823                  *   rx_handlers table.  See iwl_setup_rx_handlers() */
 824                 if (priv->rx_handlers[pkt->hdr.cmd]) {
 825                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
 826                                 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
 827                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
 828                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
 829                 } else {
 830                         /* No handling needed */
 831                         IWL_DEBUG_RX(priv,
 832                                 "r %d i %d No handler needed for %s, 0x%02x\n",
 833                                 r, i, get_cmd_string(pkt->hdr.cmd),
 834                                 pkt->hdr.cmd);
 835                 }
 836
 837                 /*
 838                  * XXX: After here, we should always check rxb->page
 839                  * against NULL before touching it or its virtual
 840                  * memory (pkt). Because some rx_handler might have
 841                  * already taken or freed the pages.
 842                  */
 843
 844                 if (reclaim) {
 845                         /* Invoke any callbacks, transfer the buffer to caller,
 846                          * and fire off the (possibly) blocking iwl_send_cmd()
 847                          * as we reclaim the driver command queue */
 848                         if (rxb->page)
 849                                 iwl_tx_cmd_complete(priv, rxb);
 850                         else
 851                                 IWL_WARN(priv, "Claim null rxb?\n");
 852                 }
 853
 854                 /* Reuse the page if possible. For notification packets and
 855                  * SKBs that fail to Rx correctly, add them back into the
 856                  * rx_free list for reuse later. */
 857                 spin_lock_irqsave(&rxq->lock, flags);
 858                 if (rxb->page != NULL) {
 859                         rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
 860                                 0, PAGE_SIZE << priv->hw_params.rx_page_order,
 861                                 PCI_DMA_FROMDEVICE);
 862                         list_add_tail(&rxb->list, &rxq->rx_free);
 863                         rxq->free_count++;
 864                 } else
 865                         list_add_tail(&rxb->list, &rxq->rx_used);
 866
 867                 spin_unlock_irqrestore(&rxq->lock, flags);
 868
 869                 i = (i + 1) & RX_QUEUE_MASK;
 870                 /* If there are a lot of unused frames,
 871                  * restock the Rx queue so ucode wont assert. */
 872                 if (fill_rx) {
 873                         count++;
 874                         if (count >= 8) {
 875                                 rxq->read = i;
 876                                 iwl_rx_replenish_now(priv);
 877                                 count = 0;
 878                         }
 879                 }
 880         }
 881
 882         /* Backtrack one entry */
 883         rxq->read = i;
 884         if (fill_rx)
 885                 iwl_rx_replenish_now(priv);
 886         else
 887                 iwl_rx_queue_restock(priv);
 888 }
 889
 890 /* call this function to flush any scheduled tasklet */
 891 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
 892 {
 893         /* wait to make sure we flush pending tasklet*/
 894         synchronize_irq(priv->pci_dev->irq);
 895         tasklet_kill(&priv->irq_tasklet);
 896 }
 897
 898 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
 899 {
 900         u32 inta, handled = 0;
 901         u32 inta_fh;
 902         unsigned long flags;
 903         u32 i;
 904 #ifdef CONFIG_IWLWIFI_DEBUG
 905         u32 inta_mask;
 906 #endif
 907
 908         spin_lock_irqsave(&priv->lock, flags);
 909
 910         /* Ack/clear/reset pending uCode interrupts.
 911          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
 912          *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
 913         inta = iwl_read32(priv, CSR_INT);
 914         iwl_write32(priv, CSR_INT, inta);
 915
 916         /* Ack/clear/reset pending flow-handler (DMA) interrupts.
 917          * Any new interrupts that happen after this, either while we're
 918          * in this tasklet, or later, will show up in next ISR/tasklet. */
 919         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
 920         iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
 921
 922 #ifdef CONFIG_IWLWIFI_DEBUG
 923         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
 924                 /* just for debug */
 925                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
 926                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
 927                               inta, inta_mask, inta_fh);
 928         }
 929 #endif
 930
 931         spin_unlock_irqrestore(&priv->lock, flags);
 932
 933         /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
 934          * atomic, make sure that inta covers all the interrupts that
 935          * we've discovered, even if FH interrupt came in just after
 936          * reading CSR_INT. */
 937         if (inta_fh & CSR49_FH_INT_RX_MASK)
 938                 inta |= CSR_INT_BIT_FH_RX;
 939         if (inta_fh & CSR49_FH_INT_TX_MASK)
 940                 inta |= CSR_INT_BIT_FH_TX;
 941
 942         /* Now service all interrupt bits discovered above. */
 943         if (inta & CSR_INT_BIT_HW_ERR) {
 944                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
 945
 946                 /* Tell the device to stop sending interrupts */
 947                 iwl_disable_interrupts(priv);
 948
 949                 priv->isr_stats.hw++;
 950                 iwl_irq_handle_error(priv);
 951
 952                 handled |= CSR_INT_BIT_HW_ERR;
 953
 954                 return;
 955         }
 956
 957 #ifdef CONFIG_IWLWIFI_DEBUG
 958         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
 959                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
 960                 if (inta & CSR_INT_BIT_SCD) {
 961                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
 962                                       "the frame/frames.\n");
 963                         priv->isr_stats.sch++;
 964                 }
 965
 966                 /* Alive notification via Rx interrupt will do the real work */
 967                 if (inta & CSR_INT_BIT_ALIVE) {
 968                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
 969                         priv->isr_stats.alive++;
 970                 }
 971         }
 972 #endif
 973         /* Safely ignore these bits for debug checks below */
 974         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
 975
 976         /* HW RF KILL switch toggled */
 977         if (inta & CSR_INT_BIT_RF_KILL) {
 978                 int hw_rf_kill = 0;
 979                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
 980                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
 981                         hw_rf_kill = 1;
 982
 983                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
 984                                 hw_rf_kill ? "disable radio" : "enable radio");
 985
 986                 priv->isr_stats.rfkill++;
 987
 988                 /* driver only loads ucode once setting the interface up.
 989                  * the driver allows loading the ucode even if the radio
 990                  * is killed. Hence update the killswitch state here. The
 991                  * rfkill handler will care about restarting if needed.
 992                  */
 993                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
 994                         if (hw_rf_kill)
 995                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
 996                         else
 997                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
 998                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
 999                 }
1000
1001                 handled |= CSR_INT_BIT_RF_KILL;
1002         }
1003
1004         /* Chip got too hot and stopped itself */
1005         if (inta & CSR_INT_BIT_CT_KILL) {
1006                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1007                 priv->isr_stats.ctkill++;
1008                 handled |= CSR_INT_BIT_CT_KILL;
1009         }
1010
1011         /* Error detected by uCode */
1012         if (inta & CSR_INT_BIT_SW_ERR) {
1013                 IWL_ERR(priv, "Microcode SW error detected. "
1014                         " Restarting 0x%X.\n", inta);
1015                 priv->isr_stats.sw++;
1016                 priv->isr_stats.sw_err = inta;
1017                 iwl_irq_handle_error(priv);
1018                 handled |= CSR_INT_BIT_SW_ERR;
1019         }
1020
1021         /*
1022          * uCode wakes up after power-down sleep.
1023          * Tell device about any new tx or host commands enqueued,
1024          * and about any Rx buffers made available while asleep.
1025          */
1026         if (inta & CSR_INT_BIT_WAKEUP) {
1027                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1028                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1029                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1030                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1031                 priv->isr_stats.wakeup++;
1032                 handled |= CSR_INT_BIT_WAKEUP;
1033         }
1034
1035         /* All uCode command responses, including Tx command responses,
1036          * Rx "responses" (frame-received notification), and other
1037          * notifications from uCode come through here*/
1038         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1039                 iwl_rx_handle(priv);
1040                 priv->isr_stats.rx++;
1041                 iwl_leds_background(priv);
1042                 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1043         }
1044
1045         /* This "Tx" DMA channel is used only for loading uCode */
1046         if (inta & CSR_INT_BIT_FH_TX) {
1047                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1048                 priv->isr_stats.tx++;
1049                 handled |= CSR_INT_BIT_FH_TX;
1050                 /* Wake up uCode load routine, now that load is complete */
1051                 priv->ucode_write_complete = 1;
1052                 wake_up_interruptible(&priv->wait_command_queue);
1053         }
1054
1055         if (inta & ~handled) {
1056                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1057                 priv->isr_stats.unhandled++;
1058         }
1059
1060         if (inta & ~(priv->inta_mask)) {
1061                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1062                          inta & ~priv->inta_mask);
1063                 IWL_WARN(priv, "   with FH_INT = 0x%08x\n", inta_fh);
1064         }
1065
1066         /* Re-enable all interrupts */
1067         /* only Re-enable if diabled by irq */
1068         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1069                 iwl_enable_interrupts(priv);
1070
1071 #ifdef CONFIG_IWLWIFI_DEBUG
1072         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1073                 inta = iwl_read32(priv, CSR_INT);
1074                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1075                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1076                 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1077                         "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1078         }
1079 #endif
1080 }
1081
1082 /* tasklet for iwlagn interrupt */
1083 static void iwl_irq_tasklet(struct iwl_priv *priv)
1084 {
1085         u32 inta = 0;
1086         u32 handled = 0;
1087         unsigned long flags;
1088         u32 i;
1089 #ifdef CONFIG_IWLWIFI_DEBUG
1090         u32 inta_mask;
1091 #endif
1092
1093         spin_lock_irqsave(&priv->lock, flags);
1094
1095         /* Ack/clear/reset pending uCode interrupts.
1096          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1097          */
1098         iwl_write32(priv, CSR_INT, priv->inta);
1099
1100         inta = priv->inta;
1101
1102 #ifdef CONFIG_IWLWIFI_DEBUG
1103         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1104                 /* just for debug */
1105                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1106                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1107                                 inta, inta_mask);
1108         }
1109 #endif
1110
1111         spin_unlock_irqrestore(&priv->lock, flags);
1112
1113         /* saved interrupt in inta variable now we can reset priv->inta */
1114         priv->inta = 0;
1115
1116         /* Now service all interrupt bits discovered above. */
1117         if (inta & CSR_INT_BIT_HW_ERR) {
1118                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1119
1120                 /* Tell the device to stop sending interrupts */
1121                 iwl_disable_interrupts(priv);
1122
1123                 priv->isr_stats.hw++;
1124                 iwl_irq_handle_error(priv);
1125
1126                 handled |= CSR_INT_BIT_HW_ERR;
1127
1128                 return;
1129         }
1130
1131 #ifdef CONFIG_IWLWIFI_DEBUG
1132         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1133                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1134                 if (inta & CSR_INT_BIT_SCD) {
1135                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1136                                       "the frame/frames.\n");
1137                         priv->isr_stats.sch++;
1138                 }
1139
1140                 /* Alive notification via Rx interrupt will do the real work */
1141                 if (inta & CSR_INT_BIT_ALIVE) {
1142                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1143                         priv->isr_stats.alive++;
1144                 }
1145         }
1146 #endif
1147         /* Safely ignore these bits for debug checks below */
1148         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1149
1150         /* HW RF KILL switch toggled */
1151         if (inta & CSR_INT_BIT_RF_KILL) {
1152                 int hw_rf_kill = 0;
1153                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1154                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1155                         hw_rf_kill = 1;
1156
1157                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1158                                 hw_rf_kill ? "disable radio" : "enable radio");
1159
1160                 priv->isr_stats.rfkill++;
1161
1162                 /* driver only loads ucode once setting the interface up.
1163                  * the driver allows loading the ucode even if the radio
1164                  * is killed. Hence update the killswitch state here. The
1165                  * rfkill handler will care about restarting if needed.
1166                  */
1167                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1168                         if (hw_rf_kill)
1169                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1170                         else
1171                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1172                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1173                 }
1174
1175                 handled |= CSR_INT_BIT_RF_KILL;
1176         }
1177
1178         /* Chip got too hot and stopped itself */
1179         if (inta & CSR_INT_BIT_CT_KILL) {
1180                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1181                 priv->isr_stats.ctkill++;
1182                 handled |= CSR_INT_BIT_CT_KILL;
1183         }
1184
1185         /* Error detected by uCode */
1186         if (inta & CSR_INT_BIT_SW_ERR) {
1187                 IWL_ERR(priv, "Microcode SW error detected. "
1188                         " Restarting 0x%X.\n", inta);
1189                 priv->isr_stats.sw++;
1190                 priv->isr_stats.sw_err = inta;
1191                 iwl_irq_handle_error(priv);
1192                 handled |= CSR_INT_BIT_SW_ERR;
1193         }
1194
1195         /* uCode wakes up after power-down sleep */
1196         if (inta & CSR_INT_BIT_WAKEUP) {
1197                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1198                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1199                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1200                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1201
1202                 priv->isr_stats.wakeup++;
1203
1204                 handled |= CSR_INT_BIT_WAKEUP;
1205         }
1206
1207         /* All uCode command responses, including Tx command responses,
1208          * Rx "responses" (frame-received notification), and other
1209          * notifications from uCode come through here*/
1210         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1211                         CSR_INT_BIT_RX_PERIODIC)) {
1212                 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1213                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1214                         handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1215                         iwl_write32(priv, CSR_FH_INT_STATUS,
1216                                         CSR49_FH_INT_RX_MASK);
1217                 }
1218                 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1219                         handled |= CSR_INT_BIT_RX_PERIODIC;
1220                         iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1221                 }
1222                 /* Sending RX interrupt require many steps to be done in the
1223                  * the device:
1224                  * 1- write interrupt to current index in ICT table.
1225                  * 2- dma RX frame.
1226                  * 3- update RX shared data to indicate last write index.
1227                  * 4- send interrupt.
1228                  * This could lead to RX race, driver could receive RX interrupt
1229                  * but the shared data changes does not reflect this.
1230                  * this could lead to RX race, RX periodic will solve this race
1231                  */
1232                 iwl_write32(priv, CSR_INT_PERIODIC_REG,
1233                             CSR_INT_PERIODIC_DIS);
1234                 iwl_rx_handle(priv);
1235                 /* Only set RX periodic if real RX is received. */
1236                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1237                         iwl_write32(priv, CSR_INT_PERIODIC_REG,
1238                                     CSR_INT_PERIODIC_ENA);
1239
1240                 priv->isr_stats.rx++;
1241                 iwl_leds_background(priv);
1242         }
1243
1244         /* This "Tx" DMA channel is used only for loading uCode */
1245         if (inta & CSR_INT_BIT_FH_TX) {
1246                 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1247                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1248                 priv->isr_stats.tx++;
1249                 handled |= CSR_INT_BIT_FH_TX;
1250                 /* Wake up uCode load routine, now that load is complete */
1251                 priv->ucode_write_complete = 1;
1252                 wake_up_interruptible(&priv->wait_command_queue);
1253         }
1254
1255         if (inta & ~handled) {
1256                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1257                 priv->isr_stats.unhandled++;
1258         }
1259
1260         if (inta & ~(priv->inta_mask)) {
1261                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1262                          inta & ~priv->inta_mask);
1263         }
1264
1265         /* Re-enable all interrupts */
1266         /* only Re-enable if diabled by irq */
1267         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1268                 iwl_enable_interrupts(priv);
1269 }
1270
1271
1272 /******************************************************************************
1273  *
1274  * uCode download functions
1275  *
1276  ******************************************************************************/
1277
1278 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1279 {
1280         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1281         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1282         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1283         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1284         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1285         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1286 }
1287
1288 static void iwl_nic_start(struct iwl_priv *priv)
1289 {
1290         /* Remove all resets to allow NIC to operate */
1291         iwl_write32(priv, CSR_RESET, 0);
1292 }
1293
1294
1295 /**
1296  * iwl_read_ucode - Read uCode images from disk file.
1297  *
1298  * Copy into buffers for card to fetch via bus-mastering
1299  */
1300 static int iwl_read_ucode(struct iwl_priv *priv)
1301 {
1302         struct iwl_ucode_header *ucode;
1303         int ret = -EINVAL, index;
1304         const struct firmware *ucode_raw;
1305         const char *name_pre = priv->cfg->fw_name_pre;
1306         const unsigned int api_max = priv->cfg->ucode_api_max;
1307         const unsigned int api_min = priv->cfg->ucode_api_min;
1308         char buf[25];
1309         u8 *src;
1310         size_t len;
1311         u32 api_ver, build;
1312         u32 inst_size, data_size, init_size, init_data_size, boot_size;
1313         u16 eeprom_ver;
1314
1315         /* Ask kernel firmware_class module to get the boot firmware off disk.
1316          * request_firmware() is synchronous, file is in memory on return. */
1317         for (index = api_max; index >= api_min; index--) {
1318                 sprintf(buf, "%s%d%s", name_pre, index, ".ucode");
1319                 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
1320                 if (ret < 0) {
1321                         IWL_ERR(priv, "%s firmware file req failed: %d\n",
1322                                   buf, ret);
1323                         if (ret == -ENOENT)
1324                                 continue;
1325                         else
1326                                 goto error;
1327                 } else {
1328                         if (index < api_max)
1329                                 IWL_ERR(priv, "Loaded firmware %s, "
1330                                         "which is deprecated. "
1331                                         "Please use API v%u instead.\n",
1332                                           buf, api_max);
1333
1334                         IWL_DEBUG_INFO(priv, "Got firmware '%s' file (%zd bytes) from disk\n",
1335                                        buf, ucode_raw->size);
1336                         break;
1337                 }
1338         }
1339
1340         if (ret < 0)
1341                 goto error;
1342
1343         /* Make sure that we got at least the v1 header! */
1344         if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
1345                 IWL_ERR(priv, "File size way too small!\n");
1346                 ret = -EINVAL;
1347                 goto err_release;
1348         }
1349
1350         /* Data from ucode file:  header followed by uCode images */
1351         ucode = (struct iwl_ucode_header *)ucode_raw->data;
1352
1353         priv->ucode_ver = le32_to_cpu(ucode->ver);
1354         api_ver = IWL_UCODE_API(priv->ucode_ver);
1355         build = priv->cfg->ops->ucode->get_build(ucode, api_ver);
1356         inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
1357         data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
1358         init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
1359         init_data_size =
1360                 priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
1361         boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
1362         src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
1363
1364         /* api_ver should match the api version forming part of the
1365          * firmware filename ... but we don't check for that and only rely
1366          * on the API version read from firmware header from here on forward */
1367
1368         if (api_ver < api_min || api_ver > api_max) {
1369                 IWL_ERR(priv, "Driver unable to support your firmware API. "
1370                           "Driver supports v%u, firmware is v%u.\n",
1371                           api_max, api_ver);
1372                 priv->ucode_ver = 0;
1373                 ret = -EINVAL;
1374                 goto err_release;
1375         }
1376         if (api_ver != api_max)
1377                 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1378                           "got v%u. New firmware can be obtained "
1379                           "from http://www.intellinuxwireless.org.\n",
1380                           api_max, api_ver);
1381
1382         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1383                IWL_UCODE_MAJOR(priv->ucode_ver),
1384                IWL_UCODE_MINOR(priv->ucode_ver),
1385                IWL_UCODE_API(priv->ucode_ver),
1386                IWL_UCODE_SERIAL(priv->ucode_ver));
1387
1388         snprintf(priv->hw->wiphy->fw_version,
1389                  sizeof(priv->hw->wiphy->fw_version),
1390                  "%u.%u.%u.%u",
1391                  IWL_UCODE_MAJOR(priv->ucode_ver),
1392                  IWL_UCODE_MINOR(priv->ucode_ver),
1393                  IWL_UCODE_API(priv->ucode_ver),
1394                  IWL_UCODE_SERIAL(priv->ucode_ver));
1395
1396         if (build)
1397                 IWL_DEBUG_INFO(priv, "Build %u\n", build);
1398
1399         eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
1400         IWL_DEBUG_INFO(priv, "NVM Type: %s, version: 0x%x\n",
1401                        (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
1402                        ? "OTP" : "EEPROM", eeprom_ver);
1403
1404         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1405                        priv->ucode_ver);
1406         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
1407                        inst_size);
1408         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
1409                        data_size);
1410         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
1411                        init_size);
1412         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
1413                        init_data_size);
1414         IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
1415                        boot_size);
1416
1417         /* Verify size of file vs. image size info in file's header */
1418         if (ucode_raw->size !=
1419                 priv->cfg->ops->ucode->get_header_size(api_ver) +
1420                 inst_size + data_size + init_size +
1421                 init_data_size + boot_size) {
1422
1423                 IWL_DEBUG_INFO(priv,
1424                         "uCode file size %d does not match expected size\n",
1425                         (int)ucode_raw->size);
1426                 ret = -EINVAL;
1427                 goto err_release;
1428         }
1429
1430         /* Verify that uCode images will fit in card's SRAM */
1431         if (inst_size > priv->hw_params.max_inst_size) {
1432                 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
1433                                inst_size);
1434                 ret = -EINVAL;
1435                 goto err_release;
1436         }
1437
1438         if (data_size > priv->hw_params.max_data_size) {
1439                 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
1440                                 data_size);
1441                 ret = -EINVAL;
1442                 goto err_release;
1443         }
1444         if (init_size > priv->hw_params.max_inst_size) {
1445                 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1446                         init_size);
1447                 ret = -EINVAL;
1448                 goto err_release;
1449         }
1450         if (init_data_size > priv->hw_params.max_data_size) {
1451                 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
1452                       init_data_size);
1453                 ret = -EINVAL;
1454                 goto err_release;
1455         }
1456         if (boot_size > priv->hw_params.max_bsm_size) {
1457                 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1458                         boot_size);
1459                 ret = -EINVAL;
1460                 goto err_release;
1461         }
1462
1463         /* Allocate ucode buffers for card's bus-master loading ... */
1464
1465         /* Runtime instructions and 2 copies of data:
1466          * 1) unmodified from disk
1467          * 2) backup cache for save/restore during power-downs */
1468         priv->ucode_code.len = inst_size;
1469         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1470
1471         priv->ucode_data.len = data_size;
1472         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1473
1474         priv->ucode_data_backup.len = data_size;
1475         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1476
1477         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1478             !priv->ucode_data_backup.v_addr)
1479                 goto err_pci_alloc;
1480
1481         /* Initialization instructions and data */
1482         if (init_size && init_data_size) {
1483                 priv->ucode_init.len = init_size;
1484                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1485
1486                 priv->ucode_init_data.len = init_data_size;
1487                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1488
1489                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1490                         goto err_pci_alloc;
1491         }
1492
1493         /* Bootstrap (instructions only, no data) */
1494         if (boot_size) {
1495                 priv->ucode_boot.len = boot_size;
1496                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1497
1498                 if (!priv->ucode_boot.v_addr)
1499                         goto err_pci_alloc;
1500         }
1501
1502         /* Copy images into buffers for card's bus-master reads ... */
1503
1504         /* Runtime instructions (first block of data in file) */
1505         len = inst_size;
1506         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len);
1507         memcpy(priv->ucode_code.v_addr, src, len);
1508         src += len;
1509
1510         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1511                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1512
1513         /* Runtime data (2nd block)
1514          * NOTE:  Copy into backup buffer will be done in iwl_up()  */
1515         len = data_size;
1516         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len);
1517         memcpy(priv->ucode_data.v_addr, src, len);
1518         memcpy(priv->ucode_data_backup.v_addr, src, len);
1519         src += len;
1520
1521         /* Initialization instructions (3rd block) */
1522         if (init_size) {
1523                 len = init_size;
1524                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1525                                 len);
1526                 memcpy(priv->ucode_init.v_addr, src, len);
1527                 src += len;
1528         }
1529
1530         /* Initialization data (4th block) */
1531         if (init_data_size) {
1532                 len = init_data_size;
1533                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1534                                len);
1535                 memcpy(priv->ucode_init_data.v_addr, src, len);
1536                 src += len;
1537         }
1538
1539         /* Bootstrap instructions (5th block) */
1540         len = boot_size;
1541         IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
1542         memcpy(priv->ucode_boot.v_addr, src, len);
1543
1544         /* We have our copies now, allow OS release its copies */
1545         release_firmware(ucode_raw);
1546         return 0;
1547
1548  err_pci_alloc:
1549         IWL_ERR(priv, "failed to allocate pci memory\n");
1550         ret = -ENOMEM;
1551         iwl_dealloc_ucode_pci(priv);
1552
1553  err_release:
1554         release_firmware(ucode_raw);
1555
1556  error:
1557         return ret;
1558 }
1559
1560 #ifdef CONFIG_IWLWIFI_DEBUG
1561 static const char *desc_lookup_text[] = {
1562         "OK",
1563         "FAIL",
1564         "BAD_PARAM",
1565         "BAD_CHECKSUM",
1566         "NMI_INTERRUPT_WDG",
1567         "SYSASSERT",
1568         "FATAL_ERROR",
1569         "BAD_COMMAND",
1570         "HW_ERROR_TUNE_LOCK",
1571         "HW_ERROR_TEMPERATURE",
1572         "ILLEGAL_CHAN_FREQ",
1573         "VCC_NOT_STABLE",
1574         "FH_ERROR",
1575         "NMI_INTERRUPT_HOST",
1576         "NMI_INTERRUPT_ACTION_PT",
1577         "NMI_INTERRUPT_UNKNOWN",
1578         "UCODE_VERSION_MISMATCH",
1579         "HW_ERROR_ABS_LOCK",
1580         "HW_ERROR_CAL_LOCK_FAIL",
1581         "NMI_INTERRUPT_INST_ACTION_PT",
1582         "NMI_INTERRUPT_DATA_ACTION_PT",
1583         "NMI_TRM_HW_ER",
1584         "NMI_INTERRUPT_TRM",
1585         "NMI_INTERRUPT_BREAK_POINT"
1586         "DEBUG_0",
1587         "DEBUG_1",
1588         "DEBUG_2",
1589         "DEBUG_3",
1590         "UNKNOWN"
1591 };
1592
1593 static const char *desc_lookup(int i)
1594 {
1595         int max = ARRAY_SIZE(desc_lookup_text) - 1;
1596
1597         if (i < 0 || i > max)
1598                 i = max;
1599
1600         return desc_lookup_text[i];
1601 }
1602
1603 #define ERROR_START_OFFSET  (1 * sizeof(u32))
1604 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
1605
1606 void iwl_dump_nic_error_log(struct iwl_priv *priv)
1607 {
1608         u32 data2, line;
1609         u32 desc, time, count, base, data1;
1610         u32 blink1, blink2, ilink1, ilink2;
1611
1612         if (priv->ucode_type == UCODE_INIT)
1613                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
1614         else
1615                 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1616
1617         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1618                 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
1619                 return;
1620         }
1621
1622         count = iwl_read_targ_mem(priv, base);
1623
1624         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1625                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1626                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1627                         priv->status, count);
1628         }
1629
1630         desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
1631         blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
1632         blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
1633         ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
1634         ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
1635         data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
1636         data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
1637         line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1638         time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1639
1640         trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
1641                                       blink1, blink2, ilink1, ilink2);
1642
1643         IWL_ERR(priv, "Desc                               Time       "
1644                 "data1      data2      line\n");
1645         IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
1646                 desc_lookup(desc), desc, time, data1, data2, line);
1647         IWL_ERR(priv, "blink1  blink2  ilink1  ilink2\n");
1648         IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
1649                 ilink1, ilink2);
1650
1651 }
1652
1653 #define EVENT_START_OFFSET  (4 * sizeof(u32))
1654
1655 /**
1656  * iwl_print_event_log - Dump error event log to syslog
1657  *
1658  */
1659 static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1660                                 u32 num_events, u32 mode)
1661 {
1662         u32 i;
1663         u32 base;       /* SRAM byte address of event log header */
1664         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1665         u32 ptr;        /* SRAM byte address of log data */
1666         u32 ev, time, data; /* event log data */
1667         unsigned long reg_flags;
1668
1669         if (num_events == 0)
1670                 return;
1671         if (priv->ucode_type == UCODE_INIT)
1672                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1673         else
1674                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1675
1676         if (mode == 0)
1677                 event_size = 2 * sizeof(u32);
1678         else
1679                 event_size = 3 * sizeof(u32);
1680
1681         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1682
1683         /* Make sure device is powered up for SRAM reads */
1684         spin_lock_irqsave(&priv->reg_lock, reg_flags);
1685         iwl_grab_nic_access(priv);
1686
1687         /* Set starting address; reads will auto-increment */
1688         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
1689         rmb();
1690
1691         /* "time" is actually "data" for mode 0 (no timestamp).
1692         * place event id # at far right for easier visual parsing. */
1693         for (i = 0; i < num_events; i++) {
1694                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1695                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1696                 if (mode == 0) {
1697                         /* data, ev */
1698                         trace_iwlwifi_dev_ucode_event(priv, 0, time, ev);
1699                         IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n", time, ev);
1700                 } else {
1701                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1702                         IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1703                                         time, data, ev);
1704                         trace_iwlwifi_dev_ucode_event(priv, time, data, ev);
1705                 }
1706         }
1707
1708         /* Allow device to power down */
1709         iwl_release_nic_access(priv);
1710         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
1711 }
1712
1713 /* For sanity check only.  Actual size is determined by uCode, typ. 512 */
1714 #define MAX_EVENT_LOG_SIZE (512)
1715
1716 void iwl_dump_nic_event_log(struct iwl_priv *priv)
1717 {
1718         u32 base;       /* SRAM byte address of event log header */
1719         u32 capacity;   /* event log capacity in # entries */
1720         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
1721         u32 num_wraps;  /* # times uCode wrapped to top of log */
1722         u32 next_entry; /* index of next entry to be written by uCode */
1723         u32 size;       /* # entries that we'll print */
1724
1725         if (priv->ucode_type == UCODE_INIT)
1726                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1727         else
1728                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1729
1730         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1731                 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
1732                 return;
1733         }
1734
1735         /* event log header */
1736         capacity = iwl_read_targ_mem(priv, base);
1737         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1738         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1739         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1740
1741         if (capacity > MAX_EVENT_LOG_SIZE) {
1742                 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
1743                         capacity, MAX_EVENT_LOG_SIZE);
1744                 capacity = MAX_EVENT_LOG_SIZE;
1745         }
1746
1747         if (next_entry > MAX_EVENT_LOG_SIZE) {
1748                 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
1749                         next_entry, MAX_EVENT_LOG_SIZE);
1750                 next_entry = MAX_EVENT_LOG_SIZE;
1751         }
1752
1753         size = num_wraps ? capacity : next_entry;
1754
1755         /* bail out if nothing in log */
1756         if (size == 0) {
1757                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1758                 return;
1759         }
1760
1761         IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
1762                         size, num_wraps);
1763
1764         /* if uCode has wrapped back to top of log, start at the oldest entry,
1765          * i.e the next one that uCode would fill. */
1766         if (num_wraps)
1767                 iwl_print_event_log(priv, next_entry,
1768                                         capacity - next_entry, mode);
1769         /* (then/else) start at top of log */
1770         iwl_print_event_log(priv, 0, next_entry, mode);
1771
1772 }
1773 #endif
1774
1775 /**
1776  * iwl_alive_start - called after REPLY_ALIVE notification received
1777  *                   from protocol/runtime uCode (initialization uCode's
1778  *                   Alive gets handled by iwl_init_alive_start()).
1779  */
1780 static void iwl_alive_start(struct iwl_priv *priv)
1781 {
1782         int ret = 0;
1783
1784         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
1785
1786         if (priv->card_alive.is_valid != UCODE_VALID_OK) {
1787                 /* We had an error bringing up the hardware, so take it
1788                  * all the way back down so we can try again */
1789                 IWL_DEBUG_INFO(priv, "Alive failed.\n");
1790                 goto restart;
1791         }
1792
1793         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
1794          * This is a paranoid check, because we would not have gotten the
1795          * "runtime" alive if code weren't properly loaded.  */
1796         if (iwl_verify_ucode(priv)) {
1797                 /* Runtime instruction load was bad;
1798                  * take it all the way back down so we can try again */
1799                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
1800                 goto restart;
1801         }
1802
1803         iwl_clear_stations_table(priv);
1804         ret = priv->cfg->ops->lib->alive_notify(priv);
1805         if (ret) {
1806                 IWL_WARN(priv,
1807                         "Could not complete ALIVE transition [ntf]: %d\n", ret);
1808                 goto restart;
1809         }
1810
1811         /* After the ALIVE response, we can send host commands to the uCode */
1812         set_bit(STATUS_ALIVE, &priv->status);
1813
1814         if (iwl_is_rfkill(priv))
1815                 return;
1816
1817         ieee80211_wake_queues(priv->hw);
1818
1819         priv->active_rate = priv->rates_mask;
1820         priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1821
1822         /* Configure Tx antenna selection based on H/W config */
1823         if (priv->cfg->ops->hcmd->set_tx_ant)
1824                 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
1825
1826         if (iwl_is_associated(priv)) {
1827                 struct iwl_rxon_cmd *active_rxon =
1828                                 (struct iwl_rxon_cmd *)&priv->active_rxon;
1829                 /* apply any changes in staging */
1830                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
1831                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1832         } else {
1833                 /* Initialize our rx_config data */
1834                 iwl_connection_init_rx_config(priv, priv->iw_mode);
1835
1836                 if (priv->cfg->ops->hcmd->set_rxon_chain)
1837                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
1838
1839                 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1840         }
1841
1842         /* Configure Bluetooth device coexistence support */
1843         iwl_send_bt_config(priv);
1844
1845         iwl_reset_run_time_calib(priv);
1846
1847         /* Configure the adapter for unassociated operation */
1848         iwlcore_commit_rxon(priv);
1849
1850         /* At this point, the NIC is initialized and operational */
1851         iwl_rf_kill_ct_config(priv);
1852
1853         iwl_leds_init(priv);
1854
1855         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
1856         set_bit(STATUS_READY, &priv->status);
1857         wake_up_interruptible(&priv->wait_command_queue);
1858
1859         iwl_power_update_mode(priv, true);
1860
1861         /* reassociate for ADHOC mode */
1862         if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
1863                 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
1864                                                                 priv->vif);
1865                 if (beacon)
1866                         iwl_mac_beacon_update(priv->hw, beacon);
1867         }
1868
1869
1870         if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
1871                 iwl_set_mode(priv, priv->iw_mode);
1872
1873         return;
1874
1875  restart:
1876         queue_work(priv->workqueue, &priv->restart);
1877 }
1878
1879 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
1880
1881 static void __iwl_down(struct iwl_priv *priv)
1882 {
1883         unsigned long flags;
1884         int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
1885
1886         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
1887
1888         if (!exit_pending)
1889                 set_bit(STATUS_EXIT_PENDING, &priv->status);
1890
1891         iwl_clear_stations_table(priv);
1892
1893         /* Unblock any waiting calls */
1894         wake_up_interruptible_all(&priv->wait_command_queue);
1895
1896         /* Wipe out the EXIT_PENDING status bit if we are not actually
1897          * exiting the module */
1898         if (!exit_pending)
1899                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
1900
1901         /* stop and reset the on-board processor */
1902         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
1903
1904         /* tell the device to stop sending interrupts */
1905         spin_lock_irqsave(&priv->lock, flags);
1906         iwl_disable_interrupts(priv);
1907         spin_unlock_irqrestore(&priv->lock, flags);
1908         iwl_synchronize_irq(priv);
1909
1910         if (priv->mac80211_registered)
1911                 ieee80211_stop_queues(priv->hw);
1912
1913         /* If we have not previously called iwl_init() then
1914          * clear all bits but the RF Kill bit and return */
1915         if (!iwl_is_init(priv)) {
1916                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1917                                         STATUS_RF_KILL_HW |
1918                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1919                                         STATUS_GEO_CONFIGURED |
1920                                test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1921                                         STATUS_EXIT_PENDING;
1922                 goto exit;
1923         }
1924
1925         /* ...otherwise clear out all the status bits but the RF Kill
1926          * bit and continue taking the NIC down. */
1927         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1928                                 STATUS_RF_KILL_HW |
1929                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1930                                 STATUS_GEO_CONFIGURED |
1931                         test_bit(STATUS_FW_ERROR, &priv->status) <<
1932                                 STATUS_FW_ERROR |
1933                        test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1934                                 STATUS_EXIT_PENDING;
1935
1936         /* device going down, Stop using ICT table */
1937         iwl_disable_ict(priv);
1938
1939         iwl_txq_ctx_stop(priv);
1940         iwl_rxq_stop(priv);
1941
1942         /* Power-down device's busmaster DMA clocks */
1943         iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
1944         udelay(5);
1945
1946         /* Make sure (redundant) we've released our request to stay awake */
1947         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
1948
1949         /* Stop the device, and put it in low power state */
1950         priv->cfg->ops->lib->apm_ops.stop(priv);
1951
1952  exit:
1953         memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
1954
1955         if (priv->ibss_beacon)
1956                 dev_kfree_skb(priv->ibss_beacon);
1957         priv->ibss_beacon = NULL;
1958
1959         /* clear out any free frames */
1960         iwl_clear_free_frames(priv);
1961 }
1962
1963 static void iwl_down(struct iwl_priv *priv)
1964 {
1965         mutex_lock(&priv->mutex);
1966         __iwl_down(priv);
1967         mutex_unlock(&priv->mutex);
1968
1969         iwl_cancel_deferred_work(priv);
1970 }
1971
1972 #define HW_READY_TIMEOUT (50)
1973
1974 static int iwl_set_hw_ready(struct iwl_priv *priv)
1975 {
1976         int ret = 0;
1977
1978         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1979                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
1980
1981         /* See if we got it */
1982         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
1983                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1984                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1985                                 HW_READY_TIMEOUT);
1986         if (ret != -ETIMEDOUT)
1987                 priv->hw_ready = true;
1988         else
1989                 priv->hw_ready = false;
1990
1991         IWL_DEBUG_INFO(priv, "hardware %s\n",
1992                       (priv->hw_ready == 1) ? "ready" : "not ready");
1993         return ret;
1994 }
1995
1996 static int iwl_prepare_card_hw(struct iwl_priv *priv)
1997 {
1998         int ret = 0;
1999
2000         IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter \n");
2001
2002         ret = iwl_set_hw_ready(priv);
2003         if (priv->hw_ready)
2004                 return ret;
2005
2006         /* If HW is not ready, prepare the conditions to check again */
2007         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2008                         CSR_HW_IF_CONFIG_REG_PREPARE);
2009
2010         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2011                         ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2012                         CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2013
2014         /* HW should be ready by now, check again. */
2015         if (ret != -ETIMEDOUT)
2016                 iwl_set_hw_ready(priv);
2017
2018         return ret;
2019 }
2020
2021 #define MAX_HW_RESTARTS 5
2022
2023 static int __iwl_up(struct iwl_priv *priv)
2024 {
2025         int i;
2026         int ret;
2027
2028         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2029                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2030                 return -EIO;
2031         }
2032
2033         if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2034                 IWL_ERR(priv, "ucode not available for device bringup\n");
2035                 return -EIO;
2036         }
2037
2038         iwl_prepare_card_hw(priv);
2039
2040         if (!priv->hw_ready) {
2041                 IWL_WARN(priv, "Exit HW not ready\n");
2042                 return -EIO;
2043         }
2044
2045         /* If platform's RF_KILL switch is NOT set to KILL */
2046         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2047                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2048         else
2049                 set_bit(STATUS_RF_KILL_HW, &priv->status);
2050
2051         if (iwl_is_rfkill(priv)) {
2052                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2053
2054                 iwl_enable_interrupts(priv);
2055                 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2056                 return 0;
2057         }
2058
2059         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2060
2061         ret = iwl_hw_nic_init(priv);
2062         if (ret) {
2063                 IWL_ERR(priv, "Unable to init nic\n");
2064                 return ret;
2065         }
2066
2067         /* make sure rfkill handshake bits are cleared */
2068         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2069         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2070                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2071
2072         /* clear (again), then enable host interrupts */
2073         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2074         iwl_enable_interrupts(priv);
2075
2076         /* really make sure rfkill handshake bits are cleared */
2077         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2078         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2079
2080         /* Copy original ucode data image from disk into backup cache.
2081          * This will be used to initialize the on-board processor's
2082          * data SRAM for a clean start when the runtime program first loads. */
2083         memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2084                priv->ucode_data.len);
2085
2086         for (i = 0; i < MAX_HW_RESTARTS; i++) {
2087
2088                 iwl_clear_stations_table(priv);
2089
2090                 /* load bootstrap state machine,
2091                  * load bootstrap program into processor's memory,
2092                  * prepare to load the "initialize" uCode */
2093                 ret = priv->cfg->ops->lib->load_ucode(priv);
2094
2095                 if (ret) {
2096                         IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2097                                 ret);
2098                         continue;
2099                 }
2100
2101                 /* start card; "initialize" will load runtime ucode */
2102                 iwl_nic_start(priv);
2103
2104                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2105
2106                 return 0;
2107         }
2108
2109         set_bit(STATUS_EXIT_PENDING, &priv->status);
2110         __iwl_down(priv);
2111         clear_bit(STATUS_EXIT_PENDING, &priv->status);
2112
2113         /* tried to restart and config the device for as long as our
2114          * patience could withstand */
2115         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2116         return -EIO;
2117 }
2118
2119
2120 /*****************************************************************************
2121  *
2122  * Workqueue callbacks
2123  *
2124  *****************************************************************************/
2125
2126 static void iwl_bg_init_alive_start(struct work_struct *data)
2127 {
2128         struct iwl_priv *priv =
2129             container_of(data, struct iwl_priv, init_alive_start.work);
2130
2131         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2132                 return;
2133
2134         mutex_lock(&priv->mutex);
2135         priv->cfg->ops->lib->init_alive_start(priv);
2136         mutex_unlock(&priv->mutex);
2137 }
2138
2139 static void iwl_bg_alive_start(struct work_struct *data)
2140 {
2141         struct iwl_priv *priv =
2142             container_of(data, struct iwl_priv, alive_start.work);
2143
2144         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2145                 return;
2146
2147         /* enable dram interrupt */
2148         iwl_reset_ict(priv);
2149
2150         mutex_lock(&priv->mutex);
2151         iwl_alive_start(priv);
2152         mutex_unlock(&priv->mutex);
2153 }
2154
2155 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2156 {
2157         struct iwl_priv *priv = container_of(work, struct iwl_priv,
2158                         run_time_calib_work);
2159
2160         mutex_lock(&priv->mutex);
2161
2162         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2163             test_bit(STATUS_SCANNING, &priv->status)) {
2164                 mutex_unlock(&priv->mutex);
2165                 return;
2166         }
2167
2168         if (priv->start_calib) {
2169                 iwl_chain_noise_calibration(priv, &priv->statistics);
2170
2171                 iwl_sensitivity_calibration(priv, &priv->statistics);
2172         }
2173
2174         mutex_unlock(&priv->mutex);
2175         return;
2176 }
2177
2178 static void iwl_bg_up(struct work_struct *data)
2179 {
2180         struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
2181
2182         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2183                 return;
2184
2185         mutex_lock(&priv->mutex);
2186         __iwl_up(priv);
2187         mutex_unlock(&priv->mutex);
2188 }
2189
2190 static void iwl_bg_restart(struct work_struct *data)
2191 {
2192         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2193
2194         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2195                 return;
2196
2197         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2198                 mutex_lock(&priv->mutex);
2199                 priv->vif = NULL;
2200                 priv->is_open = 0;
2201                 mutex_unlock(&priv->mutex);
2202                 iwl_down(priv);
2203                 ieee80211_restart_hw(priv->hw);
2204         } else {
2205                 iwl_down(priv);
2206                 queue_work(priv->workqueue, &priv->up);
2207         }
2208 }
2209
2210 static void iwl_bg_rx_replenish(struct work_struct *data)
2211 {
2212         struct iwl_priv *priv =
2213             container_of(data, struct iwl_priv, rx_replenish);
2214
2215         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2216                 return;
2217
2218         mutex_lock(&priv->mutex);
2219         iwl_rx_replenish(priv);
2220         mutex_unlock(&priv->mutex);
2221 }
2222
2223 #define IWL_DELAY_NEXT_SCAN (HZ*2)
2224
2225 void iwl_post_associate(struct iwl_priv *priv)
2226 {
2227         struct ieee80211_conf *conf = NULL;
2228         int ret = 0;
2229         unsigned long flags;
2230
2231         if (priv->iw_mode == NL80211_IFTYPE_AP) {
2232                 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
2233                 return;
2234         }
2235
2236         IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2237                         priv->assoc_id, priv->active_rxon.bssid_addr);
2238
2239
2240         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2241                 return;
2242
2243
2244         if (!priv->vif || !priv->is_open)
2245                 return;
2246
2247         iwl_scan_cancel_timeout(priv, 200);
2248
2249         conf = ieee80211_get_hw_conf(priv->hw);
2250
2251         priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2252         iwlcore_commit_rxon(priv);
2253
2254         iwl_setup_rxon_timing(priv);
2255         ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2256                               sizeof(priv->rxon_timing), &priv->rxon_timing);
2257         if (ret)
2258                 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2259                             "Attempting to continue.\n");
2260
2261         priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2262
2263         iwl_set_rxon_ht(priv, &priv->current_ht_config);
2264
2265         if (priv->cfg->ops->hcmd->set_rxon_chain)
2266                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2267
2268         priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2269
2270         IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2271                         priv->assoc_id, priv->beacon_int);
2272
2273         if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2274                 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2275         else
2276                 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2277
2278         if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2279                 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2280                         priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2281                 else
2282                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2283
2284                 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2285                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2286
2287         }
2288
2289         iwlcore_commit_rxon(priv);
2290
2291         switch (priv->iw_mode) {
2292         case NL80211_IFTYPE_STATION:
2293                 break;
2294
2295         case NL80211_IFTYPE_ADHOC:
2296
2297                 /* assume default assoc id */
2298                 priv->assoc_id = 1;
2299
2300                 iwl_rxon_add_station(priv, priv->bssid, 0);
2301                 iwl_send_beacon_cmd(priv);
2302
2303                 break;
2304
2305         default:
2306                 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2307                           __func__, priv->iw_mode);
2308                 break;
2309         }
2310
2311         if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2312                 priv->assoc_station_added = 1;
2313
2314         spin_lock_irqsave(&priv->lock, flags);
2315         iwl_activate_qos(priv, 0);
2316         spin_unlock_irqrestore(&priv->lock, flags);
2317
2318         /* the chain noise calibration will enabled PM upon completion
2319          * If chain noise has already been run, then we need to enable
2320          * power management here */
2321         if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2322                 iwl_power_update_mode(priv, false);
2323
2324         /* Enable Rx differential gain and sensitivity calibrations */
2325         iwl_chain_noise_reset(priv);
2326         priv->start_calib = 1;
2327
2328 }
2329
2330 /*****************************************************************************
2331  *
2332  * mac80211 entry point functions
2333  *
2334  *****************************************************************************/
2335
2336 #define UCODE_READY_TIMEOUT     (4 * HZ)
2337
2338 /*
2339  * Not a mac80211 entry point function, but it fits in with all the
2340  * other mac80211 functions grouped here.
2341  */
2342 static int iwl_setup_mac(struct iwl_priv *priv)
2343 {
2344         int ret;
2345         struct ieee80211_hw *hw = priv->hw;
2346         hw->rate_control_algorithm = "iwl-agn-rs";
2347
2348         /* Tell mac80211 our characteristics */
2349         hw->flags = IEEE80211_HW_SIGNAL_DBM |
2350                     IEEE80211_HW_NOISE_DBM |
2351                     IEEE80211_HW_AMPDU_AGGREGATION |
2352                     IEEE80211_HW_SPECTRUM_MGMT;
2353
2354         if (!priv->cfg->broken_powersave)
2355                 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
2356                              IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
2357
2358         hw->sta_data_size = sizeof(struct iwl_station_priv);
2359         hw->wiphy->interface_modes =
2360                 BIT(NL80211_IFTYPE_STATION) |
2361                 BIT(NL80211_IFTYPE_ADHOC);
2362
2363         hw->wiphy->custom_regulatory = true;
2364
2365         /* Firmware does not support this */
2366         hw->wiphy->disable_beacon_hints = true;
2367
2368         /*
2369          * For now, disable PS by default because it affects
2370          * RX performance significantly.
2371          */
2372         hw->wiphy->ps_default = false;
2373
2374         hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
2375         /* we create the 802.11 header and a zero-length SSID element */
2376         hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
2377
2378         /* Default value; 4 EDCA QOS priorities */
2379         hw->queues = 4;
2380
2381         hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
2382
2383         if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
2384                 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
2385                         &priv->bands[IEEE80211_BAND_2GHZ];
2386         if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
2387                 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
2388                         &priv->bands[IEEE80211_BAND_5GHZ];
2389
2390         ret = ieee80211_register_hw(priv->hw);
2391         if (ret) {
2392                 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
2393                 return ret;
2394         }
2395         priv->mac80211_registered = 1;
2396
2397         return 0;
2398 }
2399
2400
2401 static int iwl_mac_start(struct ieee80211_hw *hw)
2402 {
2403         struct iwl_priv *priv = hw->priv;
2404         int ret;
2405
2406         IWL_DEBUG_MAC80211(priv, "enter\n");
2407
2408         /* we should be verifying the device is ready to be opened */
2409         mutex_lock(&priv->mutex);
2410
2411         /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2412          * ucode filename and max sizes are card-specific. */
2413
2414         if (!priv->ucode_code.len) {
2415                 ret = iwl_read_ucode(priv);
2416                 if (ret) {
2417                         IWL_ERR(priv, "Could not read microcode: %d\n", ret);
2418                         mutex_unlock(&priv->mutex);
2419                         return ret;
2420                 }
2421         }
2422
2423         ret = __iwl_up(priv);
2424
2425         mutex_unlock(&priv->mutex);
2426
2427         if (ret)
2428                 return ret;
2429
2430         if (iwl_is_rfkill(priv))
2431                 goto out;
2432
2433         IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2434
2435         /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2436          * mac80211 will not be run successfully. */
2437         ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2438                         test_bit(STATUS_READY, &priv->status),
2439                         UCODE_READY_TIMEOUT);
2440         if (!ret) {
2441                 if (!test_bit(STATUS_READY, &priv->status)) {
2442                         IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2443                                 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2444                         return -ETIMEDOUT;
2445                 }
2446         }
2447
2448         iwl_led_start(priv);
2449
2450 out:
2451         priv->is_open = 1;
2452         IWL_DEBUG_MAC80211(priv, "leave\n");
2453         return 0;
2454 }
2455
2456 static void iwl_mac_stop(struct ieee80211_hw *hw)
2457 {
2458         struct iwl_priv *priv = hw->priv;
2459
2460         IWL_DEBUG_MAC80211(priv, "enter\n");
2461
2462         if (!priv->is_open)
2463                 return;
2464
2465         priv->is_open = 0;
2466
2467         if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
2468                 /* stop mac, cancel any scan request and clear
2469                  * RXON_FILTER_ASSOC_MSK BIT
2470                  */
2471                 mutex_lock(&priv->mutex);
2472                 iwl_scan_cancel_timeout(priv, 100);
2473                 mutex_unlock(&priv->mutex);
2474         }
2475
2476         iwl_down(priv);
2477
2478         flush_workqueue(priv->workqueue);
2479
2480         /* enable interrupts again in order to receive rfkill changes */
2481         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2482         iwl_enable_interrupts(priv);
2483
2484         IWL_DEBUG_MAC80211(priv, "leave\n");
2485 }
2486
2487 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2488 {
2489         struct iwl_priv *priv = hw->priv;
2490
2491         IWL_DEBUG_MACDUMP(priv, "enter\n");
2492
2493         IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2494                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2495
2496         if (iwl_tx_skb(priv, skb))
2497                 dev_kfree_skb_any(skb);
2498
2499         IWL_DEBUG_MACDUMP(priv, "leave\n");
2500         return NETDEV_TX_OK;
2501 }
2502
2503 void iwl_config_ap(struct iwl_priv *priv)
2504 {
2505         int ret = 0;
2506         unsigned long flags;
2507
2508         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2509                 return;
2510
2511         /* The following should be done only at AP bring up */
2512         if (!iwl_is_associated(priv)) {
2513
2514                 /* RXON - unassoc (to set timing command) */
2515                 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2516                 iwlcore_commit_rxon(priv);
2517
2518                 /* RXON Timing */
2519                 iwl_setup_rxon_timing(priv);
2520                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2521                                 sizeof(priv->rxon_timing), &priv->rxon_timing);
2522                 if (ret)
2523                         IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2524                                         "Attempting to continue.\n");
2525
2526                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2527                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
2528
2529                 /* FIXME: what should be the assoc_id for AP? */
2530                 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2531                 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2532                         priv->staging_rxon.flags |=
2533                                 RXON_FLG_SHORT_PREAMBLE_MSK;
2534                 else
2535                         priv->staging_rxon.flags &=
2536                                 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2537
2538                 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2539                         if (priv->assoc_capability &
2540                                 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2541                                 priv->staging_rxon.flags |=
2542                                         RXON_FLG_SHORT_SLOT_MSK;
2543                         else
2544                                 priv->staging_rxon.flags &=
2545                                         ~RXON_FLG_SHORT_SLOT_MSK;
2546
2547                         if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2548                                 priv->staging_rxon.flags &=
2549                                         ~RXON_FLG_SHORT_SLOT_MSK;
2550                 }
2551                 /* restore RXON assoc */
2552                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2553                 iwlcore_commit_rxon(priv);
2554                 spin_lock_irqsave(&priv->lock, flags);
2555                 iwl_activate_qos(priv, 1);
2556                 spin_unlock_irqrestore(&priv->lock, flags);
2557                 iwl_add_bcast_station(priv);
2558         }
2559         iwl_send_beacon_cmd(priv);
2560
2561         /* FIXME - we need to add code here to detect a totally new
2562          * configuration, reset the AP, unassoc, rxon timing, assoc,
2563          * clear sta table, add BCAST sta... */
2564 }
2565
2566 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
2567                         struct ieee80211_key_conf *keyconf, const u8 *addr,
2568                         u32 iv32, u16 *phase1key)
2569 {
2570
2571         struct iwl_priv *priv = hw->priv;
2572         IWL_DEBUG_MAC80211(priv, "enter\n");
2573
2574         iwl_update_tkip_key(priv, keyconf, addr, iv32, phase1key);
2575
2576         IWL_DEBUG_MAC80211(priv, "leave\n");
2577 }
2578
2579 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2580                            struct ieee80211_vif *vif,
2581                            struct ieee80211_sta *sta,
2582                            struct ieee80211_key_conf *key)
2583 {
2584         struct iwl_priv *priv = hw->priv;
2585         const u8 *addr;
2586         int ret;
2587         u8 sta_id;
2588         bool is_default_wep_key = false;
2589
2590         IWL_DEBUG_MAC80211(priv, "enter\n");
2591
2592         if (priv->cfg->mod_params->sw_crypto) {
2593                 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2594                 return -EOPNOTSUPP;
2595         }
2596         addr = sta ? sta->addr : iwl_bcast_addr;
2597         sta_id = iwl_find_station(priv, addr);
2598         if (sta_id == IWL_INVALID_STATION) {
2599                 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
2600                                    addr);
2601                 return -EINVAL;
2602
2603         }
2604
2605         mutex_lock(&priv->mutex);
2606         iwl_scan_cancel_timeout(priv, 100);
2607         mutex_unlock(&priv->mutex);
2608
2609         /* If we are getting WEP group key and we didn't receive any key mapping
2610          * so far, we are in legacy wep mode (group key only), otherwise we are
2611          * in 1X mode.
2612          * In legacy wep mode, we use another host command to the uCode */
2613         if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
2614                 priv->iw_mode != NL80211_IFTYPE_AP) {
2615                 if (cmd == SET_KEY)
2616                         is_default_wep_key = !priv->key_mapping_key;
2617                 else
2618                         is_default_wep_key =
2619                                         (key->hw_key_idx == HW_KEY_DEFAULT);
2620         }
2621
2622         switch (cmd) {
2623         case SET_KEY:
2624                 if (is_default_wep_key)
2625                         ret = iwl_set_default_wep_key(priv, key);
2626                 else
2627                         ret = iwl_set_dynamic_key(priv, key, sta_id);
2628
2629                 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2630                 break;
2631         case DISABLE_KEY:
2632                 if (is_default_wep_key)
2633                         ret = iwl_remove_default_wep_key(priv, key);
2634                 else
2635                         ret = iwl_remove_dynamic_key(priv, key, sta_id);
2636
2637                 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2638                 break;
2639         default:
2640                 ret = -EINVAL;
2641         }
2642
2643         IWL_DEBUG_MAC80211(priv, "leave\n");
2644
2645         return ret;
2646 }
2647
2648 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2649                              enum ieee80211_ampdu_mlme_action action,
2650                              struct ieee80211_sta *sta, u16 tid, u16 *ssn)
2651 {
2652         struct iwl_priv *priv = hw->priv;
2653         int ret;
2654
2655         IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2656                      sta->addr, tid);
2657
2658         if (!(priv->cfg->sku & IWL_SKU_N))
2659                 return -EACCES;
2660
2661         switch (action) {
2662         case IEEE80211_AMPDU_RX_START:
2663                 IWL_DEBUG_HT(priv, "start Rx\n");
2664                 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
2665         case IEEE80211_AMPDU_RX_STOP:
2666                 IWL_DEBUG_HT(priv, "stop Rx\n");
2667                 ret = iwl_sta_rx_agg_stop(priv, sta->addr, tid);
2668                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2669                         return 0;
2670                 else
2671                         return ret;
2672         case IEEE80211_AMPDU_TX_START:
2673                 IWL_DEBUG_HT(priv, "start Tx\n");
2674                 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
2675         case IEEE80211_AMPDU_TX_STOP:
2676                 IWL_DEBUG_HT(priv, "stop Tx\n");
2677                 ret = iwl_tx_agg_stop(priv, sta->addr, tid);
2678                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2679                         return 0;
2680                 else
2681                         return ret;
2682         default:
2683                 IWL_DEBUG_HT(priv, "unknown\n");
2684                 return -EINVAL;
2685                 break;
2686         }
2687         return 0;
2688 }
2689
2690 static int iwl_mac_get_stats(struct ieee80211_hw *hw,
2691                              struct ieee80211_low_level_stats *stats)
2692 {
2693         struct iwl_priv *priv = hw->priv;
2694
2695         priv = hw->priv;
2696         IWL_DEBUG_MAC80211(priv, "enter\n");
2697         IWL_DEBUG_MAC80211(priv, "leave\n");
2698
2699         return 0;
2700 }
2701
2702 /*****************************************************************************
2703  *
2704  * sysfs attributes
2705  *
2706  *****************************************************************************/
2707
2708 #ifdef CONFIG_IWLWIFI_DEBUG
2709
2710 /*
2711  * The following adds a new attribute to the sysfs representation
2712  * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
2713  * used for controlling the debug level.
2714  *
2715  * See the level definitions in iwl for details.
2716  *
2717  * The debug_level being managed using sysfs below is a per device debug
2718  * level that is used instead of the global debug level if it (the per
2719  * device debug level) is set.
2720  */
2721 static ssize_t show_debug_level(struct device *d,
2722                                 struct device_attribute *attr, char *buf)
2723 {
2724         struct iwl_priv *priv = dev_get_drvdata(d);
2725         return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
2726 }
2727 static ssize_t store_debug_level(struct device *d,
2728                                 struct device_attribute *attr,
2729                                  const char *buf, size_t count)
2730 {
2731         struct iwl_priv *priv = dev_get_drvdata(d);
2732         unsigned long val;
2733         int ret;
2734
2735         ret = strict_strtoul(buf, 0, &val);
2736         if (ret)
2737                 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
2738         else {
2739                 priv->debug_level = val;
2740                 if (iwl_alloc_traffic_mem(priv))
2741                         IWL_ERR(priv,
2742                                 "Not enough memory to generate traffic log\n");
2743         }
2744         return strnlen(buf, count);
2745 }
2746
2747 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
2748                         show_debug_level, store_debug_level);
2749
2750
2751 #endif /* CONFIG_IWLWIFI_DEBUG */
2752
2753
2754 static ssize_t show_temperature(struct device *d,
2755                                 struct device_attribute *attr, char *buf)
2756 {
2757         struct iwl_priv *priv = dev_get_drvdata(d);
2758
2759         if (!iwl_is_alive(priv))
2760                 return -EAGAIN;
2761
2762         return sprintf(buf, "%d\n", priv->temperature);
2763 }
2764
2765 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
2766
2767 static ssize_t show_tx_power(struct device *d,
2768                              struct device_attribute *attr, char *buf)
2769 {
2770         struct iwl_priv *priv = dev_get_drvdata(d);
2771
2772         if (!iwl_is_ready_rf(priv))
2773                 return sprintf(buf, "off\n");
2774         else
2775                 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
2776 }
2777
2778 static ssize_t store_tx_power(struct device *d,
2779                               struct device_attribute *attr,
2780                               const char *buf, size_t count)
2781 {
2782         struct iwl_priv *priv = dev_get_drvdata(d);
2783         unsigned long val;
2784         int ret;
2785
2786         ret = strict_strtoul(buf, 10, &val);
2787         if (ret)
2788                 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
2789         else {
2790                 ret = iwl_set_tx_power(priv, val, false);
2791                 if (ret)
2792                         IWL_ERR(priv, "failed setting tx power (0x%d).\n",
2793                                 ret);
2794                 else
2795                         ret = count;
2796         }
2797         return ret;
2798 }
2799
2800 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
2801
2802 static ssize_t show_flags(struct device *d,
2803                           struct device_attribute *attr, char *buf)
2804 {
2805         struct iwl_priv *priv = dev_get_drvdata(d);
2806
2807         return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
2808 }
2809
2810 static ssize_t store_flags(struct device *d,
2811                            struct device_attribute *attr,
2812                            const char *buf, size_t count)
2813 {
2814         struct iwl_priv *priv = dev_get_drvdata(d);
2815         unsigned long val;
2816         u32 flags;
2817         int ret = strict_strtoul(buf, 0, &val);
2818         if (ret)
2819                 return ret;
2820         flags = (u32)val;
2821
2822         mutex_lock(&priv->mutex);
2823         if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
2824                 /* Cancel any currently running scans... */
2825                 if (iwl_scan_cancel_timeout(priv, 100))
2826                         IWL_WARN(priv, "Could not cancel scan.\n");
2827                 else {
2828                         IWL_DEBUG_INFO(priv, "Commit rxon.flags = 0x%04X\n", flags);
2829                         priv->staging_rxon.flags = cpu_to_le32(flags);
2830                         iwlcore_commit_rxon(priv);
2831                 }
2832         }
2833         mutex_unlock(&priv->mutex);
2834
2835         return count;
2836 }
2837
2838 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
2839
2840 static ssize_t show_filter_flags(struct device *d,
2841                                  struct device_attribute *attr, char *buf)
2842 {
2843         struct iwl_priv *priv = dev_get_drvdata(d);
2844
2845         return sprintf(buf, "0x%04X\n",
2846                 le32_to_cpu(priv->active_rxon.filter_flags));
2847 }
2848
2849 static ssize_t store_filter_flags(struct device *d,
2850                                   struct device_attribute *attr,
2851                                   const char *buf, size_t count)
2852 {
2853         struct iwl_priv *priv = dev_get_drvdata(d);
2854         unsigned long val;
2855         u32 filter_flags;
2856         int ret = strict_strtoul(buf, 0, &val);
2857         if (ret)
2858                 return ret;
2859         filter_flags = (u32)val;
2860
2861         mutex_lock(&priv->mutex);
2862         if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
2863                 /* Cancel any currently running scans... */
2864                 if (iwl_scan_cancel_timeout(priv, 100))
2865                         IWL_WARN(priv, "Could not cancel scan.\n");
2866                 else {
2867                         IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
2868                                        "0x%04X\n", filter_flags);
2869                         priv->staging_rxon.filter_flags =
2870                                 cpu_to_le32(filter_flags);
2871                         iwlcore_commit_rxon(priv);
2872                 }
2873         }
2874         mutex_unlock(&priv->mutex);
2875
2876         return count;
2877 }
2878
2879 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
2880                    store_filter_flags);
2881
2882
2883 static ssize_t show_statistics(struct device *d,
2884                                struct device_attribute *attr, char *buf)
2885 {
2886         struct iwl_priv *priv = dev_get_drvdata(d);
2887         u32 size = sizeof(struct iwl_notif_statistics);
2888         u32 len = 0, ofs = 0;
2889         u8 *data = (u8 *)&priv->statistics;
2890         int rc = 0;
2891
2892         if (!iwl_is_alive(priv))
2893                 return -EAGAIN;
2894
2895         mutex_lock(&priv->mutex);
2896         rc = iwl_send_statistics_request(priv, 0);
2897         mutex_unlock(&priv->mutex);
2898
2899         if (rc) {
2900                 len = sprintf(buf,
2901                               "Error sending statistics request: 0x%08X\n", rc);
2902                 return len;
2903         }
2904
2905         while (size && (PAGE_SIZE - len)) {
2906                 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
2907                                    PAGE_SIZE - len, 1);
2908                 len = strlen(buf);
2909                 if (PAGE_SIZE - len)
2910                         buf[len++] = '\n';
2911
2912                 ofs += 16;
2913                 size -= min(size, 16U);
2914         }
2915
2916         return len;
2917 }
2918
2919 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
2920
2921 static ssize_t show_rts_ht_protection(struct device *d,
2922                              struct device_attribute *attr, char *buf)
2923 {
2924         struct iwl_priv *priv = dev_get_drvdata(d);
2925
2926         return sprintf(buf, "%s\n",
2927                 priv->cfg->use_rts_for_ht ? "RTS/CTS" : "CTS-to-self");
2928 }
2929
2930 static ssize_t store_rts_ht_protection(struct device *d,
2931                               struct device_attribute *attr,
2932                               const char *buf, size_t count)
2933 {
2934         struct iwl_priv *priv = dev_get_drvdata(d);
2935         unsigned long val;
2936         int ret;
2937
2938         ret = strict_strtoul(buf, 10, &val);
2939         if (ret)
2940                 IWL_INFO(priv, "Input is not in decimal form.\n");
2941         else {
2942                 if (!iwl_is_associated(priv))
2943                         priv->cfg->use_rts_for_ht = val ? true : false;
2944                 else
2945                         IWL_ERR(priv, "Sta associated with AP - "
2946                                 "Change protection mechanism is not allowed\n");
2947                 ret = count;
2948         }
2949         return ret;
2950 }
2951
2952 static DEVICE_ATTR(rts_ht_protection, S_IWUSR | S_IRUGO,
2953                         show_rts_ht_protection, store_rts_ht_protection);
2954
2955
2956 /*****************************************************************************
2957  *
2958  * driver setup and teardown
2959  *
2960  *****************************************************************************/
2961
2962 static void iwl_setup_deferred_work(struct iwl_priv *priv)
2963 {
2964         priv->workqueue = create_singlethread_workqueue(DRV_NAME);
2965
2966         init_waitqueue_head(&priv->wait_command_queue);
2967
2968         INIT_WORK(&priv->up, iwl_bg_up);
2969         INIT_WORK(&priv->restart, iwl_bg_restart);
2970         INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
2971         INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
2972         INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
2973         INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
2974         INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
2975
2976         iwl_setup_scan_deferred_work(priv);
2977
2978         if (priv->cfg->ops->lib->setup_deferred_work)
2979                 priv->cfg->ops->lib->setup_deferred_work(priv);
2980
2981         init_timer(&priv->statistics_periodic);
2982         priv->statistics_periodic.data = (unsigned long)priv;
2983         priv->statistics_periodic.function = iwl_bg_statistics_periodic;
2984
2985         if (!priv->cfg->use_isr_legacy)
2986                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2987                         iwl_irq_tasklet, (unsigned long)priv);
2988         else
2989                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2990                         iwl_irq_tasklet_legacy, (unsigned long)priv);
2991 }
2992
2993 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
2994 {
2995         if (priv->cfg->ops->lib->cancel_deferred_work)
2996                 priv->cfg->ops->lib->cancel_deferred_work(priv);
2997
2998         cancel_delayed_work_sync(&priv->init_alive_start);
2999         cancel_delayed_work(&priv->scan_check);
3000         cancel_delayed_work(&priv->alive_start);
3001         cancel_work_sync(&priv->beacon_update);
3002         del_timer_sync(&priv->statistics_periodic);
3003 }
3004
3005 static void iwl_init_hw_rates(struct iwl_priv *priv,
3006                               struct ieee80211_rate *rates)
3007 {
3008         int i;
3009
3010         for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3011                 rates[i].bitrate = iwl_rates[i].ieee * 5;
3012                 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3013                 rates[i].hw_value_short = i;
3014                 rates[i].flags = 0;
3015                 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3016                         /*
3017                          * If CCK != 1M then set short preamble rate flag.
3018                          */
3019                         rates[i].flags |=
3020                                 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3021                                         0 : IEEE80211_RATE_SHORT_PREAMBLE;
3022                 }
3023         }
3024 }
3025
3026 static int iwl_init_drv(struct iwl_priv *priv)
3027 {
3028         int ret;
3029
3030         priv->ibss_beacon = NULL;
3031
3032         spin_lock_init(&priv->lock);
3033         spin_lock_init(&priv->sta_lock);
3034         spin_lock_init(&priv->hcmd_lock);
3035
3036         INIT_LIST_HEAD(&priv->free_frames);
3037
3038         mutex_init(&priv->mutex);
3039
3040         /* Clear the driver's (not device's) station table */
3041         iwl_clear_stations_table(priv);
3042
3043         priv->ieee_channels = NULL;
3044         priv->ieee_rates = NULL;
3045         priv->band = IEEE80211_BAND_2GHZ;
3046
3047         priv->iw_mode = NL80211_IFTYPE_STATION;
3048         if (priv->cfg->support_sm_ps)
3049                 priv->current_ht_config.sm_ps = WLAN_HT_CAP_SM_PS_DYNAMIC;
3050         else
3051                 priv->current_ht_config.sm_ps = WLAN_HT_CAP_SM_PS_DISABLED;
3052
3053         /* Choose which receivers/antennas to use */
3054         if (priv->cfg->ops->hcmd->set_rxon_chain)
3055                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3056
3057         iwl_init_scan_params(priv);
3058
3059         iwl_reset_qos(priv);
3060
3061         priv->qos_data.qos_active = 0;
3062         priv->qos_data.qos_cap.val = 0;
3063
3064         priv->rates_mask = IWL_RATES_MASK;
3065         /* Set the tx_power_user_lmt to the lowest power level
3066          * this value will get overwritten by channel max power avg
3067          * from eeprom */
3068         priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MIN;
3069
3070         ret = iwl_init_channel_map(priv);
3071         if (ret) {
3072                 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3073                 goto err;
3074         }
3075
3076         ret = iwlcore_init_geos(priv);
3077         if (ret) {
3078                 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3079                 goto err_free_channel_map;
3080         }
3081         iwl_init_hw_rates(priv, priv->ieee_rates);
3082
3083         return 0;
3084
3085 err_free_channel_map:
3086         iwl_free_channel_map(priv);
3087 err:
3088         return ret;
3089 }
3090
3091 static void iwl_uninit_drv(struct iwl_priv *priv)
3092 {
3093         iwl_calib_free_results(priv);
3094         iwlcore_free_geos(priv);
3095         iwl_free_channel_map(priv);
3096         kfree(priv->scan);
3097 }
3098
3099 static struct attribute *iwl_sysfs_entries[] = {
3100         &dev_attr_flags.attr,
3101         &dev_attr_filter_flags.attr,
3102         &dev_attr_statistics.attr,
3103         &dev_attr_temperature.attr,
3104         &dev_attr_tx_power.attr,
3105         &dev_attr_rts_ht_protection.attr,
3106 #ifdef CONFIG_IWLWIFI_DEBUG
3107         &dev_attr_debug_level.attr,
3108 #endif
3109         NULL
3110 };
3111
3112 static struct attribute_group iwl_attribute_group = {
3113         .name = NULL,           /* put in device directory */
3114         .attrs = iwl_sysfs_entries,
3115 };
3116
3117 static struct ieee80211_ops iwl_hw_ops = {
3118         .tx = iwl_mac_tx,
3119         .start = iwl_mac_start,
3120         .stop = iwl_mac_stop,
3121         .add_interface = iwl_mac_add_interface,
3122         .remove_interface = iwl_mac_remove_interface,
3123         .config = iwl_mac_config,
3124         .configure_filter = iwl_configure_filter,
3125         .set_key = iwl_mac_set_key,
3126         .update_tkip_key = iwl_mac_update_tkip_key,
3127         .get_stats = iwl_mac_get_stats,
3128         .get_tx_stats = iwl_mac_get_tx_stats,
3129         .conf_tx = iwl_mac_conf_tx,
3130         .reset_tsf = iwl_mac_reset_tsf,
3131         .bss_info_changed = iwl_bss_info_changed,
3132         .ampdu_action = iwl_mac_ampdu_action,
3133         .hw_scan = iwl_mac_hw_scan
3134 };
3135
3136 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3137 {
3138         int err = 0;
3139         struct iwl_priv *priv;
3140         struct ieee80211_hw *hw;
3141         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3142         unsigned long flags;
3143         u16 pci_cmd;
3144
3145         /************************
3146          * 1. Allocating HW data
3147          ************************/
3148
3149         /* Disabling hardware scan means that mac80211 will perform scans
3150          * "the hard way", rather than using device's scan. */
3151         if (cfg->mod_params->disable_hw_scan) {
3152                 if (iwl_debug_level & IWL_DL_INFO)
3153                         dev_printk(KERN_DEBUG, &(pdev->dev),
3154                                    "Disabling hw_scan\n");
3155                 iwl_hw_ops.hw_scan = NULL;
3156         }
3157
3158         hw = iwl_alloc_all(cfg, &iwl_hw_ops);
3159         if (!hw) {
3160                 err = -ENOMEM;
3161                 goto out;
3162         }
3163         priv = hw->priv;
3164         /* At this point both hw and priv are allocated. */
3165
3166         SET_IEEE80211_DEV(hw, &pdev->dev);
3167
3168         IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3169         priv->cfg = cfg;
3170         priv->pci_dev = pdev;
3171         priv->inta_mask = CSR_INI_SET_MASK;
3172
3173 #ifdef CONFIG_IWLWIFI_DEBUG
3174         atomic_set(&priv->restrict_refcnt, 0);
3175 #endif
3176         if (iwl_alloc_traffic_mem(priv))
3177                 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3178
3179         /**************************
3180          * 2. Initializing PCI bus
3181          **************************/
3182         if (pci_enable_device(pdev)) {
3183                 err = -ENODEV;
3184                 goto out_ieee80211_free_hw;
3185         }
3186
3187         pci_set_master(pdev);
3188
3189         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
3190         if (!err)
3191                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
3192         if (err) {
3193                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3194                 if (!err)
3195                         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3196                 /* both attempts failed: */
3197                 if (err) {
3198                         IWL_WARN(priv, "No suitable DMA available.\n");
3199                         goto out_pci_disable_device;
3200                 }
3201         }
3202
3203         err = pci_request_regions(pdev, DRV_NAME);
3204         if (err)
3205                 goto out_pci_disable_device;
3206
3207         pci_set_drvdata(pdev, priv);
3208
3209
3210         /***********************
3211          * 3. Read REV register
3212          ***********************/
3213         priv->hw_base = pci_iomap(pdev, 0, 0);
3214         if (!priv->hw_base) {
3215                 err = -ENODEV;
3216                 goto out_pci_release_regions;
3217         }
3218
3219         IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3220                 (unsigned long long) pci_resource_len(pdev, 0));
3221         IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3222
3223         /* this spin lock will be used in apm_ops.init and EEPROM access
3224          * we should init now
3225          */
3226         spin_lock_init(&priv->reg_lock);
3227         iwl_hw_detect(priv);
3228         IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n",
3229                 priv->cfg->name, priv->hw_rev);
3230
3231         /* We disable the RETRY_TIMEOUT register (0x41) to keep
3232          * PCI Tx retries from interfering with C3 CPU state */
3233         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3234
3235         iwl_prepare_card_hw(priv);
3236         if (!priv->hw_ready) {
3237                 IWL_WARN(priv, "Failed, HW not ready\n");
3238                 goto out_iounmap;
3239         }
3240
3241         /*****************
3242          * 4. Read EEPROM
3243          *****************/
3244         /* Read the EEPROM */
3245         err = iwl_eeprom_init(priv);
3246         if (err) {
3247                 IWL_ERR(priv, "Unable to init EEPROM\n");
3248                 goto out_iounmap;
3249         }
3250         err = iwl_eeprom_check_version(priv);
3251         if (err)
3252                 goto out_free_eeprom;
3253
3254         /* extract MAC Address */
3255         iwl_eeprom_get_mac(priv, priv->mac_addr);
3256         IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
3257         SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
3258
3259         /************************
3260          * 5. Setup HW constants
3261          ************************/
3262         if (iwl_set_hw_params(priv)) {
3263                 IWL_ERR(priv, "failed to set hw parameters\n");
3264                 goto out_free_eeprom;
3265         }
3266
3267         /*******************
3268          * 6. Setup priv
3269          *******************/
3270
3271         err = iwl_init_drv(priv);
3272         if (err)
3273                 goto out_free_eeprom;
3274         /* At this point both hw and priv are initialized. */
3275
3276         /********************
3277          * 7. Setup services
3278          ********************/
3279         spin_lock_irqsave(&priv->lock, flags);
3280         iwl_disable_interrupts(priv);
3281         spin_unlock_irqrestore(&priv->lock, flags);
3282
3283         pci_enable_msi(priv->pci_dev);
3284
3285         iwl_alloc_isr_ict(priv);
3286         err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
3287                           IRQF_SHARED, DRV_NAME, priv);
3288         if (err) {
3289                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3290                 goto out_disable_msi;
3291         }
3292         err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
3293         if (err) {
3294                 IWL_ERR(priv, "failed to create sysfs device attributes\n");
3295                 goto out_free_irq;
3296         }
3297
3298         iwl_setup_deferred_work(priv);
3299         iwl_setup_rx_handlers(priv);
3300
3301         /**********************************
3302          * 8. Setup and register mac80211
3303          **********************************/
3304
3305         /* enable interrupts if needed: hw bug w/a */
3306         pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3307         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3308                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3309                 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3310         }
3311
3312         iwl_enable_interrupts(priv);
3313
3314         err = iwl_setup_mac(priv);
3315         if (err)
3316                 goto out_remove_sysfs;
3317
3318         err = iwl_dbgfs_register(priv, DRV_NAME);
3319         if (err)
3320                 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
3321
3322         /* If platform's RF_KILL switch is NOT set to KILL */
3323         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3324                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3325         else
3326                 set_bit(STATUS_RF_KILL_HW, &priv->status);
3327
3328         wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3329                 test_bit(STATUS_RF_KILL_HW, &priv->status));
3330
3331         iwl_power_initialize(priv);
3332         iwl_tt_initialize(priv);
3333         return 0;
3334
3335  out_remove_sysfs:
3336         destroy_workqueue(priv->workqueue);
3337         priv->workqueue = NULL;
3338         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3339  out_free_irq:
3340         free_irq(priv->pci_dev->irq, priv);
3341         iwl_free_isr_ict(priv);
3342  out_disable_msi:
3343         pci_disable_msi(priv->pci_dev);
3344         iwl_uninit_drv(priv);
3345  out_free_eeprom:
3346         iwl_eeprom_free(priv);
3347  out_iounmap:
3348         pci_iounmap(pdev, priv->hw_base);
3349  out_pci_release_regions:
3350         pci_set_drvdata(pdev, NULL);
3351         pci_release_regions(pdev);
3352  out_pci_disable_device:
3353         pci_disable_device(pdev);
3354  out_ieee80211_free_hw:
3355         iwl_free_traffic_mem(priv);
3356         ieee80211_free_hw(priv->hw);
3357  out:
3358         return err;
3359 }
3360
3361 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3362 {
3363         struct iwl_priv *priv = pci_get_drvdata(pdev);
3364         unsigned long flags;
3365
3366         if (!priv)
3367                 return;
3368
3369         IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3370
3371         iwl_dbgfs_unregister(priv);
3372         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3373
3374         /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3375          * to be called and iwl_down since we are removing the device
3376          * we need to set STATUS_EXIT_PENDING bit.
3377          */
3378         set_bit(STATUS_EXIT_PENDING, &priv->status);
3379         if (priv->mac80211_registered) {
3380                 ieee80211_unregister_hw(priv->hw);
3381                 priv->mac80211_registered = 0;
3382         } else {
3383                 iwl_down(priv);
3384         }
3385
3386         /*
3387          * Make sure device is reset to low power before unloading driver.
3388          * This may be redundant with iwl_down(), but there are paths to
3389          * run iwl_down() without calling apm_ops.stop(), and there are
3390          * paths to avoid running iwl_down() at all before leaving driver.
3391          * This (inexpensive) call *makes sure* device is reset.
3392          */
3393         priv->cfg->ops->lib->apm_ops.stop(priv);
3394
3395         iwl_tt_exit(priv);
3396
3397         /* make sure we flush any pending irq or
3398          * tasklet for the driver
3399          */
3400         spin_lock_irqsave(&priv->lock, flags);
3401         iwl_disable_interrupts(priv);
3402         spin_unlock_irqrestore(&priv->lock, flags);
3403
3404         iwl_synchronize_irq(priv);
3405
3406         iwl_dealloc_ucode_pci(priv);
3407
3408         if (priv->rxq.bd)
3409                 iwl_rx_queue_free(priv, &priv->rxq);
3410         iwl_hw_txq_ctx_free(priv);
3411
3412         iwl_clear_stations_table(priv);
3413         iwl_eeprom_free(priv);
3414
3415
3416         /*netif_stop_queue(dev); */
3417         flush_workqueue(priv->workqueue);
3418
3419         /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3420          * priv->workqueue... so we can't take down the workqueue
3421          * until now... */
3422         destroy_workqueue(priv->workqueue);
3423         priv->workqueue = NULL;
3424         iwl_free_traffic_mem(priv);
3425
3426         free_irq(priv->pci_dev->irq, priv);
3427         pci_disable_msi(priv->pci_dev);
3428         pci_iounmap(pdev, priv->hw_base);
3429         pci_release_regions(pdev);
3430         pci_disable_device(pdev);
3431         pci_set_drvdata(pdev, NULL);
3432
3433         iwl_uninit_drv(priv);
3434
3435         iwl_free_isr_ict(priv);
3436
3437         if (priv->ibss_beacon)
3438                 dev_kfree_skb(priv->ibss_beacon);
3439
3440         ieee80211_free_hw(priv->hw);
3441 }
3442
3443
3444 /*****************************************************************************
3445  *
3446  * driver and module entry point
3447  *
3448  *****************************************************************************/
3449
3450 /* Hardware specific file defines the PCI IDs table for that hardware module */
3451 static struct pci_device_id iwl_hw_card_ids[] = {
3452 #ifdef CONFIG_IWL4965
3453         {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3454         {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
3455 #endif /* CONFIG_IWL4965 */
3456 #ifdef CONFIG_IWL5000
3457         {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)},
3458         {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)},
3459         {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)},
3460         {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)},
3461         {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)},
3462         {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)},
3463         {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)},
3464         {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)},
3465         {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)},
3466         {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)},
3467 /* 5350 WiFi/WiMax */
3468         {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)},
3469         {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)},
3470         {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)},
3471 /* 5150 Wifi/WiMax */
3472         {IWL_PCI_DEVICE(0x423C, PCI_ANY_ID, iwl5150_agn_cfg)},
3473         {IWL_PCI_DEVICE(0x423D, PCI_ANY_ID, iwl5150_agn_cfg)},
3474
3475 /* 6x00 Series */
3476         {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
3477         {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
3478         {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
3479         {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
3480         {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
3481         {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
3482         {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
3483         {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
3484         {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
3485         {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
3486
3487 /* 6x50 WiFi/WiMax Series */
3488         {IWL_PCI_DEVICE(0x0086, 0x1101, iwl6050_3agn_cfg)},
3489         {IWL_PCI_DEVICE(0x0086, 0x1121, iwl6050_3agn_cfg)},
3490         {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
3491         {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
3492         {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
3493         {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
3494         {IWL_PCI_DEVICE(0x0088, 0x1111, iwl6050_3agn_cfg)},
3495         {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
3496         {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
3497
3498 /* 1000 Series WiFi */
3499         {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
3500         {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
3501         {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
3502         {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
3503         {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
3504         {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
3505         {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
3506         {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
3507         {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
3508         {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
3509         {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
3510         {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
3511 #endif /* CONFIG_IWL5000 */
3512
3513         {0}
3514 };
3515 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
3516
3517 static struct pci_driver iwl_driver = {
3518         .name = DRV_NAME,
3519         .id_table = iwl_hw_card_ids,
3520         .probe = iwl_pci_probe,
3521         .remove = __devexit_p(iwl_pci_remove),
3522 #ifdef CONFIG_PM
3523         .suspend = iwl_pci_suspend,
3524         .resume = iwl_pci_resume,
3525 #endif
3526 };
3527
3528 static int __init iwl_init(void)
3529 {
3530
3531         int ret;
3532         printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
3533         printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
3534
3535         ret = iwlagn_rate_control_register();
3536         if (ret) {
3537                 printk(KERN_ERR DRV_NAME
3538                        "Unable to register rate control algorithm: %d\n", ret);
3539                 return ret;
3540         }
3541
3542         ret = pci_register_driver(&iwl_driver);
3543         if (ret) {
3544                 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
3545                 goto error_register;
3546         }
3547
3548         return ret;
3549
3550 error_register:
3551         iwlagn_rate_control_unregister();
3552         return ret;
3553 }
3554
3555 static void __exit iwl_exit(void)
3556 {
3557         pci_unregister_driver(&iwl_driver);
3558         iwlagn_rate_control_unregister();
3559 }
3560
3561 module_exit(iwl_exit);
3562 module_init(iwl_init);
3563
3564 #ifdef CONFIG_IWLWIFI_DEBUG
3565 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
3566 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
3567 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
3568 MODULE_PARM_DESC(debug, "debug output mask");
3569 #endif
3570