SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/net/wireless/iwlwifi/iwl-agn.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
   4  *
   5  * Portions of this file are derived from the ipw3945 project, as well
   6  * as portions of the ieee80211 subsystem header files.
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of version 2 of the GNU General Public License as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program; if not, write to the Free Software Foundation, Inc.,
  19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20  *
  21  * The full GNU General Public License is included in this distribution in the
  22  * file called LICENSE.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #include <linux/kernel.h>
  31 #include <linux/module.h>
  32 #include <linux/init.h>
  33 #include <linux/pci.h>
  34 #include <linux/dma-mapping.h>
  35 #include <linux/delay.h>
  36 #include <linux/skbuff.h>
  37 #include <linux/netdevice.h>
  38 #include <linux/wireless.h>
  39 #include <linux/firmware.h>
  40 #include <linux/etherdevice.h>
  41 #include <linux/if_arp.h>
  42
  43 #include <net/mac80211.h>
  44
  45 #include <asm/div64.h>
  46
  47 #define DRV_NAME        "iwlagn"
  48
  49 #include "iwl-eeprom.h"
  50 #include "iwl-dev.h"
  51 #include "iwl-core.h"
  52 #include "iwl-io.h"
  53 #include "iwl-helpers.h"
  54 #include "iwl-sta.h"
  55 #include "iwl-calib.h"
  56
  57
  58 /******************************************************************************
  59  *
  60  * module boiler plate
  61  *
  62  ******************************************************************************/
  63
  64 /*
  65  * module name, copyright, version, etc.
  66  */
  67 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
  68
  69 #ifdef CONFIG_IWLWIFI_DEBUG
  70 #define VD "d"
  71 #else
  72 #define VD
  73 #endif
  74
  75 #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  76 #define VS "s"
  77 #else
  78 #define VS
  79 #endif
  80
  81 #define DRV_VERSION     IWLWIFI_VERSION VD VS
  82
  83
  84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
  85 MODULE_VERSION(DRV_VERSION);
  86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  87 MODULE_LICENSE("GPL");
  88 MODULE_ALIAS("iwl4965");
  89
  90 /*************** STATION TABLE MANAGEMENT ****
  91  * mac80211 should be examined to determine if sta_info is duplicating
  92  * the functionality provided here
  93  */
  94
  95 /**************************************************************/
  96
  97 /**
  98  * iwl_commit_rxon - commit staging_rxon to hardware
  99  *
 100  * The RXON command in staging_rxon is committed to the hardware and
 101  * the active_rxon structure is updated with the new data.  This
 102  * function correctly transitions out of the RXON_ASSOC_MSK state if
 103  * a HW tune is required based on the RXON structure changes.
 104  */
 105 int iwl_commit_rxon(struct iwl_priv *priv)
 106 {
 107         /* cast away the const for active_rxon in this function */
 108         struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
 109         int ret;
 110         bool new_assoc =
 111                 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
 112
 113         if (!iwl_is_alive(priv))
 114                 return -EBUSY;
 115
 116         /* always get timestamp with Rx frame */
 117         priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
 118
 119         ret = iwl_check_rxon_cmd(priv);
 120         if (ret) {
 121                 IWL_ERR(priv, "Invalid RXON configuration.  Not committing.\n");
 122                 return -EINVAL;
 123         }
 124
 125         /* If we don't need to send a full RXON, we can use
 126          * iwl_rxon_assoc_cmd which is used to reconfigure filter
 127          * and other flags for the current radio configuration. */
 128         if (!iwl_full_rxon_required(priv)) {
 129                 ret = iwl_send_rxon_assoc(priv);
 130                 if (ret) {
 131                         IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
 132                         return ret;
 133                 }
 134
 135                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 136                 return 0;
 137         }
 138
 139         /* station table will be cleared */
 140         priv->assoc_station_added = 0;
 141
 142         /* If we are currently associated and the new config requires
 143          * an RXON_ASSOC and the new config wants the associated mask enabled,
 144          * we must clear the associated from the active configuration
 145          * before we apply the new config */
 146         if (iwl_is_associated(priv) && new_assoc) {
 147                 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
 148                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
 149
 150                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 151                                       sizeof(struct iwl_rxon_cmd),
 152                                       &priv->active_rxon);
 153
 154                 /* If the mask clearing failed then we set
 155                  * active_rxon back to what it was previously */
 156                 if (ret) {
 157                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
 158                         IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
 159                         return ret;
 160                 }
 161         }
 162
 163         IWL_DEBUG_INFO(priv, "Sending RXON\n"
 164                        "* with%s RXON_FILTER_ASSOC_MSK\n"
 165                        "* channel = %d\n"
 166                        "* bssid = %pM\n",
 167                        (new_assoc ? "" : "out"),
 168                        le16_to_cpu(priv->staging_rxon.channel),
 169                        priv->staging_rxon.bssid_addr);
 170
 171         iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
 172
 173         /* Apply the new configuration
 174          * RXON unassoc clears the station table in uCode, send it before
 175          * we add the bcast station. If assoc bit is set, we will send RXON
 176          * after having added the bcast and bssid station.
 177          */
 178         if (!new_assoc) {
 179                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 180                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 181                 if (ret) {
 182                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 183                         return ret;
 184                 }
 185                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 186         }
 187
 188         iwl_clear_stations_table(priv);
 189
 190         priv->start_calib = 0;
 191
 192         /* Add the broadcast address so we can send broadcast frames */
 193         if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) ==
 194                                                 IWL_INVALID_STATION) {
 195                 IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
 196                 return -EIO;
 197         }
 198
 199         /* If we have set the ASSOC_MSK and we are in BSS mode then
 200          * add the IWL_AP_ID to the station rate table */
 201         if (new_assoc) {
 202                 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
 203                         ret = iwl_rxon_add_station(priv,
 204                                            priv->active_rxon.bssid_addr, 1);
 205                         if (ret == IWL_INVALID_STATION) {
 206                                 IWL_ERR(priv,
 207                                         "Error adding AP address for TX.\n");
 208                                 return -EIO;
 209                         }
 210                         priv->assoc_station_added = 1;
 211                         if (priv->default_wep_key &&
 212                             iwl_send_static_wepkey_cmd(priv, 0))
 213                                 IWL_ERR(priv,
 214                                         "Could not send WEP static key.\n");
 215                 }
 216
 217                 /*
 218                  * allow CTS-to-self if possible for new association.
 219                  * this is relevant only for 5000 series and up,
 220                  * but will not damage 4965
 221                  */
 222                 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
 223
 224                 /* Apply the new configuration
 225                  * RXON assoc doesn't clear the station table in uCode,
 226                  */
 227                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 228                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 229                 if (ret) {
 230                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 231                         return ret;
 232                 }
 233                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 234         }
 235
 236         iwl_init_sensitivity(priv);
 237
 238         /* If we issue a new RXON command which required a tune then we must
 239          * send a new TXPOWER command or we won't be able to Tx any frames */
 240         ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
 241         if (ret) {
 242                 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
 243                 return ret;
 244         }
 245
 246         return 0;
 247 }
 248
 249 void iwl_update_chain_flags(struct iwl_priv *priv)
 250 {
 251
 252         if (priv->cfg->ops->hcmd->set_rxon_chain)
 253                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
 254         iwlcore_commit_rxon(priv);
 255 }
 256
 257 static void iwl_clear_free_frames(struct iwl_priv *priv)
 258 {
 259         struct list_head *element;
 260
 261         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
 262                        priv->frames_count);
 263
 264         while (!list_empty(&priv->free_frames)) {
 265                 element = priv->free_frames.next;
 266                 list_del(element);
 267                 kfree(list_entry(element, struct iwl_frame, list));
 268                 priv->frames_count--;
 269         }
 270
 271         if (priv->frames_count) {
 272                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
 273                             priv->frames_count);
 274                 priv->frames_count = 0;
 275         }
 276 }
 277
 278 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
 279 {
 280         struct iwl_frame *frame;
 281         struct list_head *element;
 282         if (list_empty(&priv->free_frames)) {
 283                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
 284                 if (!frame) {
 285                         IWL_ERR(priv, "Could not allocate frame!\n");
 286                         return NULL;
 287                 }
 288
 289                 priv->frames_count++;
 290                 return frame;
 291         }
 292
 293         element = priv->free_frames.next;
 294         list_del(element);
 295         return list_entry(element, struct iwl_frame, list);
 296 }
 297
 298 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
 299 {
 300         memset(frame, 0, sizeof(*frame));
 301         list_add(&frame->list, &priv->free_frames);
 302 }
 303
 304 static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
 305                                           struct ieee80211_hdr *hdr,
 306                                           int left)
 307 {
 308         if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
 309             ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
 310              (priv->iw_mode != NL80211_IFTYPE_AP)))
 311                 return 0;
 312
 313         if (priv->ibss_beacon->len > left)
 314                 return 0;
 315
 316         memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
 317
 318         return priv->ibss_beacon->len;
 319 }
 320
 321 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
 322                                        struct iwl_frame *frame, u8 rate)
 323 {
 324         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
 325         unsigned int frame_size;
 326
 327         tx_beacon_cmd = &frame->u.beacon;
 328         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
 329
 330         tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
 331         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
 332
 333         frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
 334                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
 335
 336         BUG_ON(frame_size > MAX_MPDU_SIZE);
 337         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
 338
 339         if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
 340                 tx_beacon_cmd->tx.rate_n_flags =
 341                         iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
 342         else
 343                 tx_beacon_cmd->tx.rate_n_flags =
 344                         iwl_hw_set_rate_n_flags(rate, 0);
 345
 346         tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
 347                                      TX_CMD_FLG_TSF_MSK |
 348                                      TX_CMD_FLG_STA_RATE_MSK;
 349
 350         return sizeof(*tx_beacon_cmd) + frame_size;
 351 }
 352 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
 353 {
 354         struct iwl_frame *frame;
 355         unsigned int frame_size;
 356         int rc;
 357         u8 rate;
 358
 359         frame = iwl_get_free_frame(priv);
 360
 361         if (!frame) {
 362                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
 363                           "command.\n");
 364                 return -ENOMEM;
 365         }
 366
 367         rate = iwl_rate_get_lowest_plcp(priv);
 368
 369         frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate);
 370
 371         rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
 372                               &frame->u.cmd[0]);
 373
 374         iwl_free_frame(priv, frame);
 375
 376         return rc;
 377 }
 378
 379 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
 380 {
 381         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 382
 383         dma_addr_t addr = get_unaligned_le32(&tb->lo);
 384         if (sizeof(dma_addr_t) > sizeof(u32))
 385                 addr |=
 386                 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
 387
 388         return addr;
 389 }
 390
 391 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
 392 {
 393         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 394
 395         return le16_to_cpu(tb->hi_n_len) >> 4;
 396 }
 397
 398 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
 399                                   dma_addr_t addr, u16 len)
 400 {
 401         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 402         u16 hi_n_len = len << 4;
 403
 404         put_unaligned_le32(addr, &tb->lo);
 405         if (sizeof(dma_addr_t) > sizeof(u32))
 406                 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
 407
 408         tb->hi_n_len = cpu_to_le16(hi_n_len);
 409
 410         tfd->num_tbs = idx + 1;
 411 }
 412
 413 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
 414 {
 415         return tfd->num_tbs & 0x1f;
 416 }
 417
 418 /**
 419  * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
 420  * @priv - driver private data
 421  * @txq - tx queue
 422  *
 423  * Does NOT advance any TFD circular buffer read/write indexes
 424  * Does NOT free the TFD itself (which is within circular buffer)
 425  */
 426 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
 427 {
 428         struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
 429         struct iwl_tfd *tfd;
 430         struct pci_dev *dev = priv->pci_dev;
 431         int index = txq->q.read_ptr;
 432         int i;
 433         int num_tbs;
 434
 435         tfd = &tfd_tmp[index];
 436
 437         /* Sanity check on number of chunks */
 438         num_tbs = iwl_tfd_get_num_tbs(tfd);
 439
 440         if (num_tbs >= IWL_NUM_OF_TBS) {
 441                 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
 442                 /* @todo issue fatal error, it is quite serious situation */
 443                 return;
 444         }
 445
 446         /* Unmap tx_cmd */
 447         if (num_tbs)
 448                 pci_unmap_single(dev,
 449                                 pci_unmap_addr(&txq->meta[index], mapping),
 450                                 pci_unmap_len(&txq->meta[index], len),
 451                                 PCI_DMA_BIDIRECTIONAL);
 452
 453         /* Unmap chunks, if any. */
 454         for (i = 1; i < num_tbs; i++) {
 455                 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
 456                                 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
 457
 458                 if (txq->txb) {
 459                         dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
 460                         txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
 461                 }
 462         }
 463 }
 464
 465 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
 466                                  struct iwl_tx_queue *txq,
 467                                  dma_addr_t addr, u16 len,
 468                                  u8 reset, u8 pad)
 469 {
 470         struct iwl_queue *q;
 471         struct iwl_tfd *tfd, *tfd_tmp;
 472         u32 num_tbs;
 473
 474         q = &txq->q;
 475         tfd_tmp = (struct iwl_tfd *)txq->tfds;
 476         tfd = &tfd_tmp[q->write_ptr];
 477
 478         if (reset)
 479                 memset(tfd, 0, sizeof(*tfd));
 480
 481         num_tbs = iwl_tfd_get_num_tbs(tfd);
 482
 483         /* Each TFD can point to a maximum 20 Tx buffers */
 484         if (num_tbs >= IWL_NUM_OF_TBS) {
 485                 IWL_ERR(priv, "Error can not send more than %d chunks\n",
 486                           IWL_NUM_OF_TBS);
 487                 return -EINVAL;
 488         }
 489
 490         BUG_ON(addr & ~DMA_BIT_MASK(36));
 491         if (unlikely(addr & ~IWL_TX_DMA_MASK))
 492                 IWL_ERR(priv, "Unaligned address = %llx\n",
 493                           (unsigned long long)addr);
 494
 495         iwl_tfd_set_tb(tfd, num_tbs, addr, len);
 496
 497         return 0;
 498 }
 499
 500 /*
 501  * Tell nic where to find circular buffer of Tx Frame Descriptors for
 502  * given Tx queue, and enable the DMA channel used for that queue.
 503  *
 504  * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
 505  * channels supported in hardware.
 506  */
 507 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
 508                          struct iwl_tx_queue *txq)
 509 {
 510         int txq_id = txq->q.id;
 511
 512         /* Circular buffer (TFD queue in DRAM) physical base address */
 513         iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
 514                              txq->q.dma_addr >> 8);
 515
 516         return 0;
 517 }
 518
 519 /******************************************************************************
 520  *
 521  * Generic RX handler implementations
 522  *
 523  ******************************************************************************/
 524 static void iwl_rx_reply_alive(struct iwl_priv *priv,
 525                                 struct iwl_rx_mem_buffer *rxb)
 526 {
 527         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 528         struct iwl_alive_resp *palive;
 529         struct delayed_work *pwork;
 530
 531         palive = &pkt->u.alive_frame;
 532
 533         IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
 534                        "0x%01X 0x%01X\n",
 535                        palive->is_valid, palive->ver_type,
 536                        palive->ver_subtype);
 537
 538         if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
 539                 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
 540                 memcpy(&priv->card_alive_init,
 541                        &pkt->u.alive_frame,
 542                        sizeof(struct iwl_init_alive_resp));
 543                 pwork = &priv->init_alive_start;
 544         } else {
 545                 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
 546                 memcpy(&priv->card_alive, &pkt->u.alive_frame,
 547                        sizeof(struct iwl_alive_resp));
 548                 pwork = &priv->alive_start;
 549         }
 550
 551         /* We delay the ALIVE response by 5ms to
 552          * give the HW RF Kill time to activate... */
 553         if (palive->is_valid == UCODE_VALID_OK)
 554                 queue_delayed_work(priv->workqueue, pwork,
 555                                    msecs_to_jiffies(5));
 556         else
 557                 IWL_WARN(priv, "uCode did not respond OK.\n");
 558 }
 559
 560 static void iwl_bg_beacon_update(struct work_struct *work)
 561 {
 562         struct iwl_priv *priv =
 563                 container_of(work, struct iwl_priv, beacon_update);
 564         struct sk_buff *beacon;
 565
 566         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
 567         beacon = ieee80211_beacon_get(priv->hw, priv->vif);
 568
 569         if (!beacon) {
 570                 IWL_ERR(priv, "update beacon failed\n");
 571                 return;
 572         }
 573
 574         mutex_lock(&priv->mutex);
 575         /* new beacon skb is allocated every time; dispose previous.*/
 576         if (priv->ibss_beacon)
 577                 dev_kfree_skb(priv->ibss_beacon);
 578
 579         priv->ibss_beacon = beacon;
 580         mutex_unlock(&priv->mutex);
 581
 582         iwl_send_beacon_cmd(priv);
 583 }
 584
 585 /**
 586  * iwl_bg_statistics_periodic - Timer callback to queue statistics
 587  *
 588  * This callback is provided in order to send a statistics request.
 589  *
 590  * This timer function is continually reset to execute within
 591  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
 592  * was received.  We need to ensure we receive the statistics in order
 593  * to update the temperature used for calibrating the TXPOWER.
 594  */
 595 static void iwl_bg_statistics_periodic(unsigned long data)
 596 {
 597         struct iwl_priv *priv = (struct iwl_priv *)data;
 598
 599         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 600                 return;
 601
 602         /* dont send host command if rf-kill is on */
 603         if (!iwl_is_ready_rf(priv))
 604                 return;
 605
 606         iwl_send_statistics_request(priv, CMD_ASYNC);
 607 }
 608
 609 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
 610                                 struct iwl_rx_mem_buffer *rxb)
 611 {
 612 #ifdef CONFIG_IWLWIFI_DEBUG
 613         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 614         struct iwl4965_beacon_notif *beacon =
 615                 (struct iwl4965_beacon_notif *)pkt->u.raw;
 616         u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
 617
 618         IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
 619                 "tsf %d %d rate %d\n",
 620                 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
 621                 beacon->beacon_notify_hdr.failure_frame,
 622                 le32_to_cpu(beacon->ibss_mgr_status),
 623                 le32_to_cpu(beacon->high_tsf),
 624                 le32_to_cpu(beacon->low_tsf), rate);
 625 #endif
 626
 627         if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
 628             (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
 629                 queue_work(priv->workqueue, &priv->beacon_update);
 630 }
 631
 632 /* Handle notification from uCode that card's power state is changing
 633  * due to software, hardware, or critical temperature RFKILL */
 634 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
 635                                     struct iwl_rx_mem_buffer *rxb)
 636 {
 637         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 638         u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
 639         unsigned long status = priv->status;
 640
 641         IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
 642                           (flags & HW_CARD_DISABLED) ? "Kill" : "On",
 643                           (flags & SW_CARD_DISABLED) ? "Kill" : "On");
 644
 645         if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
 646                      RF_CARD_DISABLED)) {
 647
 648                 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
 649                             CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 650
 651                 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 652                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 653
 654                 if (!(flags & RXON_CARD_DISABLED)) {
 655                         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
 656                                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 657                         iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 658                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 659                 }
 660                 if (flags & RF_CARD_DISABLED)
 661                         iwl_tt_enter_ct_kill(priv);
 662         }
 663         if (!(flags & RF_CARD_DISABLED))
 664                 iwl_tt_exit_ct_kill(priv);
 665
 666         if (flags & HW_CARD_DISABLED)
 667                 set_bit(STATUS_RF_KILL_HW, &priv->status);
 668         else
 669                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
 670
 671
 672         if (!(flags & RXON_CARD_DISABLED))
 673                 iwl_scan_cancel(priv);
 674
 675         if ((test_bit(STATUS_RF_KILL_HW, &status) !=
 676              test_bit(STATUS_RF_KILL_HW, &priv->status)))
 677                 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
 678                         test_bit(STATUS_RF_KILL_HW, &priv->status));
 679         else
 680                 wake_up_interruptible(&priv->wait_command_queue);
 681 }
 682
 683 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
 684 {
 685         if (src == IWL_PWR_SRC_VAUX) {
 686                 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
 687                         iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 688                                                APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 689                                                ~APMG_PS_CTRL_MSK_PWR_SRC);
 690         } else {
 691                 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 692                                        APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 693                                        ~APMG_PS_CTRL_MSK_PWR_SRC);
 694         }
 695
 696         return 0;
 697 }
 698
 699 /**
 700  * iwl_setup_rx_handlers - Initialize Rx handler callbacks
 701  *
 702  * Setup the RX handlers for each of the reply types sent from the uCode
 703  * to the host.
 704  *
 705  * This function chains into the hardware specific files for them to setup
 706  * any hardware specific handlers as well.
 707  */
 708 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
 709 {
 710         priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
 711         priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
 712         priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
 713         priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
 714         priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
 715             iwl_rx_pm_debug_statistics_notif;
 716         priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
 717
 718         /*
 719          * The same handler is used for both the REPLY to a discrete
 720          * statistics request from the host as well as for the periodic
 721          * statistics notifications (after received beacons) from the uCode.
 722          */
 723         priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics;
 724         priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
 725
 726         iwl_setup_spectrum_handlers(priv);
 727         iwl_setup_rx_scan_handlers(priv);
 728
 729         /* status change handler */
 730         priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
 731
 732         priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
 733             iwl_rx_missed_beacon_notif;
 734         /* Rx handlers */
 735         priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
 736         priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
 737         /* block ack */
 738         priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
 739         /* Set up hardware specific Rx handlers */
 740         priv->cfg->ops->lib->rx_handler_setup(priv);
 741 }
 742
 743 /**
 744  * iwl_rx_handle - Main entry function for receiving responses from uCode
 745  *
 746  * Uses the priv->rx_handlers callback function array to invoke
 747  * the appropriate handlers, including command responses,
 748  * frame-received notifications, and other notifications.
 749  */
 750 void iwl_rx_handle(struct iwl_priv *priv)
 751 {
 752         struct iwl_rx_mem_buffer *rxb;
 753         struct iwl_rx_packet *pkt;
 754         struct iwl_rx_queue *rxq = &priv->rxq;
 755         u32 r, i;
 756         int reclaim;
 757         unsigned long flags;
 758         u8 fill_rx = 0;
 759         u32 count = 8;
 760         int total_empty;
 761
 762         /* uCode's read index (stored in shared DRAM) indicates the last Rx
 763          * buffer that the driver may process (last buffer filled by ucode). */
 764         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
 765         i = rxq->read;
 766
 767         /* Rx interrupt, but nothing sent from uCode */
 768         if (i == r)
 769                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
 770
 771         /* calculate total frames need to be restock after handling RX */
 772         total_empty = r - priv->rxq.write_actual;
 773         if (total_empty < 0)
 774                 total_empty += RX_QUEUE_SIZE;
 775
 776         if (total_empty > (RX_QUEUE_SIZE / 2))
 777                 fill_rx = 1;
 778
 779         while (i != r) {
 780                 rxb = rxq->queue[i];
 781
 782                 /* If an RXB doesn't have a Rx queue slot associated with it,
 783                  * then a bug has been introduced in the queue refilling
 784                  * routines -- catch it here */
 785                 BUG_ON(rxb == NULL);
 786
 787                 rxq->queue[i] = NULL;
 788
 789                 pci_unmap_page(priv->pci_dev, rxb->page_dma,
 790                                PAGE_SIZE << priv->hw_params.rx_page_order,
 791                                PCI_DMA_FROMDEVICE);
 792                 pkt = rxb_addr(rxb);
 793
 794                 trace_iwlwifi_dev_rx(priv, pkt,
 795                         le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
 796
 797                 /* Reclaim a command buffer only if this packet is a response
 798                  *   to a (driver-originated) command.
 799                  * If the packet (e.g. Rx frame) originated from uCode,
 800                  *   there is no command buffer to reclaim.
 801                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
 802                  *   but apparently a few don't get set; catch them here. */
 803                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
 804                         (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
 805                         (pkt->hdr.cmd != REPLY_RX) &&
 806                         (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
 807                         (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
 808                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
 809                         (pkt->hdr.cmd != REPLY_TX);
 810
 811                 /* Based on type of command response or notification,
 812                  *   handle those that need handling via function in
 813                  *   rx_handlers table.  See iwl_setup_rx_handlers() */
 814                 if (priv->rx_handlers[pkt->hdr.cmd]) {
 815                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
 816                                 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
 817                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
 818                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
 819                 } else {
 820                         /* No handling needed */
 821                         IWL_DEBUG_RX(priv,
 822                                 "r %d i %d No handler needed for %s, 0x%02x\n",
 823                                 r, i, get_cmd_string(pkt->hdr.cmd),
 824                                 pkt->hdr.cmd);
 825                 }
 826
 827                 /*
 828                  * XXX: After here, we should always check rxb->page
 829                  * against NULL before touching it or its virtual
 830                  * memory (pkt). Because some rx_handler might have
 831                  * already taken or freed the pages.
 832                  */
 833
 834                 if (reclaim) {
 835                         /* Invoke any callbacks, transfer the buffer to caller,
 836                          * and fire off the (possibly) blocking iwl_send_cmd()
 837                          * as we reclaim the driver command queue */
 838                         if (rxb->page)
 839                                 iwl_tx_cmd_complete(priv, rxb);
 840                         else
 841                                 IWL_WARN(priv, "Claim null rxb?\n");
 842                 }
 843
 844                 /* For now we just don't re-use anything.  We can tweak this
 845                  * later to try and re-use notification packets and SKBs that
 846                  * fail to Rx correctly */
 847                 if (rxb->page != NULL) {
 848                         priv->alloc_rxb_page--;
 849                         __free_pages(rxb->page, priv->hw_params.rx_page_order);
 850                         rxb->page = NULL;
 851                 }
 852
 853                 spin_lock_irqsave(&rxq->lock, flags);
 854                 list_add_tail(&rxb->list, &priv->rxq.rx_used);
 855                 spin_unlock_irqrestore(&rxq->lock, flags);
 856                 i = (i + 1) & RX_QUEUE_MASK;
 857                 /* If there are a lot of unused frames,
 858                  * restock the Rx queue so ucode wont assert. */
 859                 if (fill_rx) {
 860                         count++;
 861                         if (count >= 8) {
 862                                 priv->rxq.read = i;
 863                                 iwl_rx_replenish_now(priv);
 864                                 count = 0;
 865                         }
 866                 }
 867         }
 868
 869         /* Backtrack one entry */
 870         priv->rxq.read = i;
 871         if (fill_rx)
 872                 iwl_rx_replenish_now(priv);
 873         else
 874                 iwl_rx_queue_restock(priv);
 875 }
 876
 877 /* call this function to flush any scheduled tasklet */
 878 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
 879 {
 880         /* wait to make sure we flush pending tasklet*/
 881         synchronize_irq(priv->pci_dev->irq);
 882         tasklet_kill(&priv->irq_tasklet);
 883 }
 884
 885 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
 886 {
 887         u32 inta, handled = 0;
 888         u32 inta_fh;
 889         unsigned long flags;
 890 #ifdef CONFIG_IWLWIFI_DEBUG
 891         u32 inta_mask;
 892 #endif
 893
 894         spin_lock_irqsave(&priv->lock, flags);
 895
 896         /* Ack/clear/reset pending uCode interrupts.
 897          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
 898          *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
 899         inta = iwl_read32(priv, CSR_INT);
 900         iwl_write32(priv, CSR_INT, inta);
 901
 902         /* Ack/clear/reset pending flow-handler (DMA) interrupts.
 903          * Any new interrupts that happen after this, either while we're
 904          * in this tasklet, or later, will show up in next ISR/tasklet. */
 905         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
 906         iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
 907
 908 #ifdef CONFIG_IWLWIFI_DEBUG
 909         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
 910                 /* just for debug */
 911                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
 912                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
 913                               inta, inta_mask, inta_fh);
 914         }
 915 #endif
 916
 917         spin_unlock_irqrestore(&priv->lock, flags);
 918
 919         /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
 920          * atomic, make sure that inta covers all the interrupts that
 921          * we've discovered, even if FH interrupt came in just after
 922          * reading CSR_INT. */
 923         if (inta_fh & CSR49_FH_INT_RX_MASK)
 924                 inta |= CSR_INT_BIT_FH_RX;
 925         if (inta_fh & CSR49_FH_INT_TX_MASK)
 926                 inta |= CSR_INT_BIT_FH_TX;
 927
 928         /* Now service all interrupt bits discovered above. */
 929         if (inta & CSR_INT_BIT_HW_ERR) {
 930                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
 931
 932                 /* Tell the device to stop sending interrupts */
 933                 iwl_disable_interrupts(priv);
 934
 935                 priv->isr_stats.hw++;
 936                 iwl_irq_handle_error(priv);
 937
 938                 handled |= CSR_INT_BIT_HW_ERR;
 939
 940                 return;
 941         }
 942
 943 #ifdef CONFIG_IWLWIFI_DEBUG
 944         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
 945                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
 946                 if (inta & CSR_INT_BIT_SCD) {
 947                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
 948                                       "the frame/frames.\n");
 949                         priv->isr_stats.sch++;
 950                 }
 951
 952                 /* Alive notification via Rx interrupt will do the real work */
 953                 if (inta & CSR_INT_BIT_ALIVE) {
 954                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
 955                         priv->isr_stats.alive++;
 956                 }
 957         }
 958 #endif
 959         /* Safely ignore these bits for debug checks below */
 960         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
 961
 962         /* HW RF KILL switch toggled */
 963         if (inta & CSR_INT_BIT_RF_KILL) {
 964                 int hw_rf_kill = 0;
 965                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
 966                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
 967                         hw_rf_kill = 1;
 968
 969                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
 970                                 hw_rf_kill ? "disable radio" : "enable radio");
 971
 972                 priv->isr_stats.rfkill++;
 973
 974                 /* driver only loads ucode once setting the interface up.
 975                  * the driver allows loading the ucode even if the radio
 976                  * is killed. Hence update the killswitch state here. The
 977                  * rfkill handler will care about restarting if needed.
 978                  */
 979                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
 980                         if (hw_rf_kill)
 981                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
 982                         else
 983                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
 984                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
 985                 }
 986
 987                 handled |= CSR_INT_BIT_RF_KILL;
 988         }
 989
 990         /* Chip got too hot and stopped itself */
 991         if (inta & CSR_INT_BIT_CT_KILL) {
 992                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
 993                 priv->isr_stats.ctkill++;
 994                 handled |= CSR_INT_BIT_CT_KILL;
 995         }
 996
 997         /* Error detected by uCode */
 998         if (inta & CSR_INT_BIT_SW_ERR) {
 999                 IWL_ERR(priv, "Microcode SW error detected. "
1000                         " Restarting 0x%X.\n", inta);
1001                 priv->isr_stats.sw++;
1002                 priv->isr_stats.sw_err = inta;
1003                 iwl_irq_handle_error(priv);
1004                 handled |= CSR_INT_BIT_SW_ERR;
1005         }
1006
1007         /* uCode wakes up after power-down sleep */
1008         if (inta & CSR_INT_BIT_WAKEUP) {
1009                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1010                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1011                 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1012                 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1013                 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1014                 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1015                 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1016                 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1017
1018                 priv->isr_stats.wakeup++;
1019
1020                 handled |= CSR_INT_BIT_WAKEUP;
1021         }
1022
1023         /* All uCode command responses, including Tx command responses,
1024          * Rx "responses" (frame-received notification), and other
1025          * notifications from uCode come through here*/
1026         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1027                 iwl_rx_handle(priv);
1028                 priv->isr_stats.rx++;
1029                 iwl_leds_background(priv);
1030                 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1031         }
1032
1033         if (inta & CSR_INT_BIT_FH_TX) {
1034                 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1035                 priv->isr_stats.tx++;
1036                 handled |= CSR_INT_BIT_FH_TX;
1037                 /* FH finished to write, send event */
1038                 priv->ucode_write_complete = 1;
1039                 wake_up_interruptible(&priv->wait_command_queue);
1040         }
1041
1042         if (inta & ~handled) {
1043                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1044                 priv->isr_stats.unhandled++;
1045         }
1046
1047         if (inta & ~(priv->inta_mask)) {
1048                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1049                          inta & ~priv->inta_mask);
1050                 IWL_WARN(priv, "   with FH_INT = 0x%08x\n", inta_fh);
1051         }
1052
1053         /* Re-enable all interrupts */
1054         /* only Re-enable if diabled by irq */
1055         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1056                 iwl_enable_interrupts(priv);
1057
1058 #ifdef CONFIG_IWLWIFI_DEBUG
1059         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1060                 inta = iwl_read32(priv, CSR_INT);
1061                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1062                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1063                 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1064                         "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1065         }
1066 #endif
1067 }
1068
1069 /* tasklet for iwlagn interrupt */
1070 static void iwl_irq_tasklet(struct iwl_priv *priv)
1071 {
1072         u32 inta = 0;
1073         u32 handled = 0;
1074         unsigned long flags;
1075 #ifdef CONFIG_IWLWIFI_DEBUG
1076         u32 inta_mask;
1077 #endif
1078
1079         spin_lock_irqsave(&priv->lock, flags);
1080
1081         /* Ack/clear/reset pending uCode interrupts.
1082          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1083          */
1084         iwl_write32(priv, CSR_INT, priv->inta);
1085
1086         inta = priv->inta;
1087
1088 #ifdef CONFIG_IWLWIFI_DEBUG
1089         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1090                 /* just for debug */
1091                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1092                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1093                                 inta, inta_mask);
1094         }
1095 #endif
1096
1097         spin_unlock_irqrestore(&priv->lock, flags);
1098
1099         /* saved interrupt in inta variable now we can reset priv->inta */
1100         priv->inta = 0;
1101
1102         /* Now service all interrupt bits discovered above. */
1103         if (inta & CSR_INT_BIT_HW_ERR) {
1104                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1105
1106                 /* Tell the device to stop sending interrupts */
1107                 iwl_disable_interrupts(priv);
1108
1109                 priv->isr_stats.hw++;
1110                 iwl_irq_handle_error(priv);
1111
1112                 handled |= CSR_INT_BIT_HW_ERR;
1113
1114                 return;
1115         }
1116
1117 #ifdef CONFIG_IWLWIFI_DEBUG
1118         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1119                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1120                 if (inta & CSR_INT_BIT_SCD) {
1121                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1122                                       "the frame/frames.\n");
1123                         priv->isr_stats.sch++;
1124                 }
1125
1126                 /* Alive notification via Rx interrupt will do the real work */
1127                 if (inta & CSR_INT_BIT_ALIVE) {
1128                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1129                         priv->isr_stats.alive++;
1130                 }
1131         }
1132 #endif
1133         /* Safely ignore these bits for debug checks below */
1134         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1135
1136         /* HW RF KILL switch toggled */
1137         if (inta & CSR_INT_BIT_RF_KILL) {
1138                 int hw_rf_kill = 0;
1139                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1140                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1141                         hw_rf_kill = 1;
1142
1143                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1144                                 hw_rf_kill ? "disable radio" : "enable radio");
1145
1146                 priv->isr_stats.rfkill++;
1147
1148                 /* driver only loads ucode once setting the interface up.
1149                  * the driver allows loading the ucode even if the radio
1150                  * is killed. Hence update the killswitch state here. The
1151                  * rfkill handler will care about restarting if needed.
1152                  */
1153                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1154                         if (hw_rf_kill)
1155                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1156                         else
1157                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1158                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1159                 }
1160
1161                 handled |= CSR_INT_BIT_RF_KILL;
1162         }
1163
1164         /* Chip got too hot and stopped itself */
1165         if (inta & CSR_INT_BIT_CT_KILL) {
1166                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1167                 priv->isr_stats.ctkill++;
1168                 handled |= CSR_INT_BIT_CT_KILL;
1169         }
1170
1171         /* Error detected by uCode */
1172         if (inta & CSR_INT_BIT_SW_ERR) {
1173                 IWL_ERR(priv, "Microcode SW error detected. "
1174                         " Restarting 0x%X.\n", inta);
1175                 priv->isr_stats.sw++;
1176                 priv->isr_stats.sw_err = inta;
1177                 iwl_irq_handle_error(priv);
1178                 handled |= CSR_INT_BIT_SW_ERR;
1179         }
1180
1181         /* uCode wakes up after power-down sleep */
1182         if (inta & CSR_INT_BIT_WAKEUP) {
1183                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1184                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1185                 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1186                 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1187                 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1188                 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1189                 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1190                 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1191
1192                 priv->isr_stats.wakeup++;
1193
1194                 handled |= CSR_INT_BIT_WAKEUP;
1195         }
1196
1197         /* All uCode command responses, including Tx command responses,
1198          * Rx "responses" (frame-received notification), and other
1199          * notifications from uCode come through here*/
1200         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1201                         CSR_INT_BIT_RX_PERIODIC)) {
1202                 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1203                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1204                         handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1205                         iwl_write32(priv, CSR_FH_INT_STATUS,
1206                                         CSR49_FH_INT_RX_MASK);
1207                 }
1208                 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1209                         handled |= CSR_INT_BIT_RX_PERIODIC;
1210                         iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1211                 }
1212                 /* Sending RX interrupt require many steps to be done in the
1213                  * the device:
1214                  * 1- write interrupt to current index in ICT table.
1215                  * 2- dma RX frame.
1216                  * 3- update RX shared data to indicate last write index.
1217                  * 4- send interrupt.
1218                  * This could lead to RX race, driver could receive RX interrupt
1219                  * but the shared data changes does not reflect this.
1220                  * this could lead to RX race, RX periodic will solve this race
1221                  */
1222                 iwl_write32(priv, CSR_INT_PERIODIC_REG,
1223                             CSR_INT_PERIODIC_DIS);
1224                 iwl_rx_handle(priv);
1225                 /* Only set RX periodic if real RX is received. */
1226                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1227                         iwl_write32(priv, CSR_INT_PERIODIC_REG,
1228                                     CSR_INT_PERIODIC_ENA);
1229
1230                 priv->isr_stats.rx++;
1231                 iwl_leds_background(priv);
1232         }
1233
1234         if (inta & CSR_INT_BIT_FH_TX) {
1235                 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1236                 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1237                 priv->isr_stats.tx++;
1238                 handled |= CSR_INT_BIT_FH_TX;
1239                 /* FH finished to write, send event */
1240                 priv->ucode_write_complete = 1;
1241                 wake_up_interruptible(&priv->wait_command_queue);
1242         }
1243
1244         if (inta & ~handled) {
1245                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1246                 priv->isr_stats.unhandled++;
1247         }
1248
1249         if (inta & ~(priv->inta_mask)) {
1250                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1251                          inta & ~priv->inta_mask);
1252         }
1253
1254         /* Re-enable all interrupts */
1255         /* only Re-enable if diabled by irq */
1256         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1257                 iwl_enable_interrupts(priv);
1258 }
1259
1260
1261 /******************************************************************************
1262  *
1263  * uCode download functions
1264  *
1265  ******************************************************************************/
1266
1267 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1268 {
1269         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1270         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1271         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1272         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1273         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1274         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1275 }
1276
1277 static void iwl_nic_start(struct iwl_priv *priv)
1278 {
1279         /* Remove all resets to allow NIC to operate */
1280         iwl_write32(priv, CSR_RESET, 0);
1281 }
1282
1283
1284 /**
1285  * iwl_read_ucode - Read uCode images from disk file.
1286  *
1287  * Copy into buffers for card to fetch via bus-mastering
1288  */
1289 static int iwl_read_ucode(struct iwl_priv *priv)
1290 {
1291         struct iwl_ucode_header *ucode;
1292         int ret = -EINVAL, index;
1293         const struct firmware *ucode_raw;
1294         const char *name_pre = priv->cfg->fw_name_pre;
1295         const unsigned int api_max = priv->cfg->ucode_api_max;
1296         const unsigned int api_min = priv->cfg->ucode_api_min;
1297         char buf[25];
1298         u8 *src;
1299         size_t len;
1300         u32 api_ver, build;
1301         u32 inst_size, data_size, init_size, init_data_size, boot_size;
1302         u16 eeprom_ver;
1303
1304         /* Ask kernel firmware_class module to get the boot firmware off disk.
1305          * request_firmware() is synchronous, file is in memory on return. */
1306         for (index = api_max; index >= api_min; index--) {
1307                 sprintf(buf, "%s%d%s", name_pre, index, ".ucode");
1308                 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
1309                 if (ret < 0) {
1310                         IWL_ERR(priv, "%s firmware file req failed: %d\n",
1311                                   buf, ret);
1312                         if (ret == -ENOENT)
1313                                 continue;
1314                         else
1315                                 goto error;
1316                 } else {
1317                         if (index < api_max)
1318                                 IWL_ERR(priv, "Loaded firmware %s, "
1319                                         "which is deprecated. "
1320                                         "Please use API v%u instead.\n",
1321                                           buf, api_max);
1322
1323                         IWL_DEBUG_INFO(priv, "Got firmware '%s' file (%zd bytes) from disk\n",
1324                                        buf, ucode_raw->size);
1325                         break;
1326                 }
1327         }
1328
1329         if (ret < 0)
1330                 goto error;
1331
1332         /* Make sure that we got at least the v1 header! */
1333         if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
1334                 IWL_ERR(priv, "File size way too small!\n");
1335                 ret = -EINVAL;
1336                 goto err_release;
1337         }
1338
1339         /* Data from ucode file:  header followed by uCode images */
1340         ucode = (struct iwl_ucode_header *)ucode_raw->data;
1341
1342         priv->ucode_ver = le32_to_cpu(ucode->ver);
1343         api_ver = IWL_UCODE_API(priv->ucode_ver);
1344         build = priv->cfg->ops->ucode->get_build(ucode, api_ver);
1345         inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
1346         data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
1347         init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
1348         init_data_size =
1349                 priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
1350         boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
1351         src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
1352
1353         /* api_ver should match the api version forming part of the
1354          * firmware filename ... but we don't check for that and only rely
1355          * on the API version read from firmware header from here on forward */
1356
1357         if (api_ver < api_min || api_ver > api_max) {
1358                 IWL_ERR(priv, "Driver unable to support your firmware API. "
1359                           "Driver supports v%u, firmware is v%u.\n",
1360                           api_max, api_ver);
1361                 priv->ucode_ver = 0;
1362                 ret = -EINVAL;
1363                 goto err_release;
1364         }
1365         if (api_ver != api_max)
1366                 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1367                           "got v%u. New firmware can be obtained "
1368                           "from http://www.intellinuxwireless.org.\n",
1369                           api_max, api_ver);
1370
1371         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1372                IWL_UCODE_MAJOR(priv->ucode_ver),
1373                IWL_UCODE_MINOR(priv->ucode_ver),
1374                IWL_UCODE_API(priv->ucode_ver),
1375                IWL_UCODE_SERIAL(priv->ucode_ver));
1376
1377         if (build)
1378                 IWL_DEBUG_INFO(priv, "Build %u\n", build);
1379
1380         eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
1381         IWL_DEBUG_INFO(priv, "NVM Type: %s, version: 0x%x\n",
1382                        (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
1383                        ? "OTP" : "EEPROM", eeprom_ver);
1384
1385         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1386                        priv->ucode_ver);
1387         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
1388                        inst_size);
1389         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
1390                        data_size);
1391         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
1392                        init_size);
1393         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
1394                        init_data_size);
1395         IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
1396                        boot_size);
1397
1398         /* Verify size of file vs. image size info in file's header */
1399         if (ucode_raw->size !=
1400                 priv->cfg->ops->ucode->get_header_size(api_ver) +
1401                 inst_size + data_size + init_size +
1402                 init_data_size + boot_size) {
1403
1404                 IWL_DEBUG_INFO(priv,
1405                         "uCode file size %d does not match expected size\n",
1406                         (int)ucode_raw->size);
1407                 ret = -EINVAL;
1408                 goto err_release;
1409         }
1410
1411         /* Verify that uCode images will fit in card's SRAM */
1412         if (inst_size > priv->hw_params.max_inst_size) {
1413                 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
1414                                inst_size);
1415                 ret = -EINVAL;
1416                 goto err_release;
1417         }
1418
1419         if (data_size > priv->hw_params.max_data_size) {
1420                 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
1421                                 data_size);
1422                 ret = -EINVAL;
1423                 goto err_release;
1424         }
1425         if (init_size > priv->hw_params.max_inst_size) {
1426                 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1427                         init_size);
1428                 ret = -EINVAL;
1429                 goto err_release;
1430         }
1431         if (init_data_size > priv->hw_params.max_data_size) {
1432                 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
1433                       init_data_size);
1434                 ret = -EINVAL;
1435                 goto err_release;
1436         }
1437         if (boot_size > priv->hw_params.max_bsm_size) {
1438                 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1439                         boot_size);
1440                 ret = -EINVAL;
1441                 goto err_release;
1442         }
1443
1444         /* Allocate ucode buffers for card's bus-master loading ... */
1445
1446         /* Runtime instructions and 2 copies of data:
1447          * 1) unmodified from disk
1448          * 2) backup cache for save/restore during power-downs */
1449         priv->ucode_code.len = inst_size;
1450         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1451
1452         priv->ucode_data.len = data_size;
1453         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1454
1455         priv->ucode_data_backup.len = data_size;
1456         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1457
1458         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1459             !priv->ucode_data_backup.v_addr)
1460                 goto err_pci_alloc;
1461
1462         /* Initialization instructions and data */
1463         if (init_size && init_data_size) {
1464                 priv->ucode_init.len = init_size;
1465                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1466
1467                 priv->ucode_init_data.len = init_data_size;
1468                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1469
1470                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1471                         goto err_pci_alloc;
1472         }
1473
1474         /* Bootstrap (instructions only, no data) */
1475         if (boot_size) {
1476                 priv->ucode_boot.len = boot_size;
1477                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1478
1479                 if (!priv->ucode_boot.v_addr)
1480                         goto err_pci_alloc;
1481         }
1482
1483         /* Copy images into buffers for card's bus-master reads ... */
1484
1485         /* Runtime instructions (first block of data in file) */
1486         len = inst_size;
1487         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len);
1488         memcpy(priv->ucode_code.v_addr, src, len);
1489         src += len;
1490
1491         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1492                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1493
1494         /* Runtime data (2nd block)
1495          * NOTE:  Copy into backup buffer will be done in iwl_up()  */
1496         len = data_size;
1497         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len);
1498         memcpy(priv->ucode_data.v_addr, src, len);
1499         memcpy(priv->ucode_data_backup.v_addr, src, len);
1500         src += len;
1501
1502         /* Initialization instructions (3rd block) */
1503         if (init_size) {
1504                 len = init_size;
1505                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1506                                 len);
1507                 memcpy(priv->ucode_init.v_addr, src, len);
1508                 src += len;
1509         }
1510
1511         /* Initialization data (4th block) */
1512         if (init_data_size) {
1513                 len = init_data_size;
1514                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1515                                len);
1516                 memcpy(priv->ucode_init_data.v_addr, src, len);
1517                 src += len;
1518         }
1519
1520         /* Bootstrap instructions (5th block) */
1521         len = boot_size;
1522         IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
1523         memcpy(priv->ucode_boot.v_addr, src, len);
1524
1525         /* We have our copies now, allow OS release its copies */
1526         release_firmware(ucode_raw);
1527         return 0;
1528
1529  err_pci_alloc:
1530         IWL_ERR(priv, "failed to allocate pci memory\n");
1531         ret = -ENOMEM;
1532         iwl_dealloc_ucode_pci(priv);
1533
1534  err_release:
1535         release_firmware(ucode_raw);
1536
1537  error:
1538         return ret;
1539 }
1540
1541 #ifdef CONFIG_IWLWIFI_DEBUG
1542 static const char *desc_lookup_text[] = {
1543         "OK",
1544         "FAIL",
1545         "BAD_PARAM",
1546         "BAD_CHECKSUM",
1547         "NMI_INTERRUPT_WDG",
1548         "SYSASSERT",
1549         "FATAL_ERROR",
1550         "BAD_COMMAND",
1551         "HW_ERROR_TUNE_LOCK",
1552         "HW_ERROR_TEMPERATURE",
1553         "ILLEGAL_CHAN_FREQ",
1554         "VCC_NOT_STABLE",
1555         "FH_ERROR",
1556         "NMI_INTERRUPT_HOST",
1557         "NMI_INTERRUPT_ACTION_PT",
1558         "NMI_INTERRUPT_UNKNOWN",
1559         "UCODE_VERSION_MISMATCH",
1560         "HW_ERROR_ABS_LOCK",
1561         "HW_ERROR_CAL_LOCK_FAIL",
1562         "NMI_INTERRUPT_INST_ACTION_PT",
1563         "NMI_INTERRUPT_DATA_ACTION_PT",
1564         "NMI_TRM_HW_ER",
1565         "NMI_INTERRUPT_TRM",
1566         "NMI_INTERRUPT_BREAK_POINT"
1567         "DEBUG_0",
1568         "DEBUG_1",
1569         "DEBUG_2",
1570         "DEBUG_3",
1571         "UNKNOWN"
1572 };
1573
1574 static const char *desc_lookup(int i)
1575 {
1576         int max = ARRAY_SIZE(desc_lookup_text) - 1;
1577
1578         if (i < 0 || i > max)
1579                 i = max;
1580
1581         return desc_lookup_text[i];
1582 }
1583
1584 #define ERROR_START_OFFSET  (1 * sizeof(u32))
1585 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
1586
1587 void iwl_dump_nic_error_log(struct iwl_priv *priv)
1588 {
1589         u32 data2, line;
1590         u32 desc, time, count, base, data1;
1591         u32 blink1, blink2, ilink1, ilink2;
1592
1593         if (priv->ucode_type == UCODE_INIT)
1594                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
1595         else
1596                 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1597
1598         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1599                 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
1600                 return;
1601         }
1602
1603         count = iwl_read_targ_mem(priv, base);
1604
1605         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1606                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1607                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1608                         priv->status, count);
1609         }
1610
1611         desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
1612         blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
1613         blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
1614         ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
1615         ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
1616         data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
1617         data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
1618         line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1619         time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1620
1621         trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
1622                                       blink1, blink2, ilink1, ilink2);
1623
1624         IWL_ERR(priv, "Desc                               Time       "
1625                 "data1      data2      line\n");
1626         IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
1627                 desc_lookup(desc), desc, time, data1, data2, line);
1628         IWL_ERR(priv, "blink1  blink2  ilink1  ilink2\n");
1629         IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
1630                 ilink1, ilink2);
1631
1632 }
1633
1634 #define EVENT_START_OFFSET  (4 * sizeof(u32))
1635
1636 /**
1637  * iwl_print_event_log - Dump error event log to syslog
1638  *
1639  */
1640 static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1641                                 u32 num_events, u32 mode)
1642 {
1643         u32 i;
1644         u32 base;       /* SRAM byte address of event log header */
1645         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1646         u32 ptr;        /* SRAM byte address of log data */
1647         u32 ev, time, data; /* event log data */
1648
1649         if (num_events == 0)
1650                 return;
1651         if (priv->ucode_type == UCODE_INIT)
1652                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1653         else
1654                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1655
1656         if (mode == 0)
1657                 event_size = 2 * sizeof(u32);
1658         else
1659                 event_size = 3 * sizeof(u32);
1660
1661         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1662
1663         /* "time" is actually "data" for mode 0 (no timestamp).
1664         * place event id # at far right for easier visual parsing. */
1665         for (i = 0; i < num_events; i++) {
1666                 ev = iwl_read_targ_mem(priv, ptr);
1667                 ptr += sizeof(u32);
1668                 time = iwl_read_targ_mem(priv, ptr);
1669                 ptr += sizeof(u32);
1670                 if (mode == 0) {
1671                         /* data, ev */
1672                         trace_iwlwifi_dev_ucode_event(priv, 0, time, ev);
1673                         IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n", time, ev);
1674                 } else {
1675                         data = iwl_read_targ_mem(priv, ptr);
1676                         ptr += sizeof(u32);
1677                         IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1678                                         time, data, ev);
1679                         trace_iwlwifi_dev_ucode_event(priv, time, data, ev);
1680                 }
1681         }
1682 }
1683
1684 void iwl_dump_nic_event_log(struct iwl_priv *priv)
1685 {
1686         u32 base;       /* SRAM byte address of event log header */
1687         u32 capacity;   /* event log capacity in # entries */
1688         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
1689         u32 num_wraps;  /* # times uCode wrapped to top of log */
1690         u32 next_entry; /* index of next entry to be written by uCode */
1691         u32 size;       /* # entries that we'll print */
1692
1693         if (priv->ucode_type == UCODE_INIT)
1694                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1695         else
1696                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1697
1698         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1699                 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
1700                 return;
1701         }
1702
1703         /* event log header */
1704         capacity = iwl_read_targ_mem(priv, base);
1705         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1706         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1707         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1708
1709         size = num_wraps ? capacity : next_entry;
1710
1711         /* bail out if nothing in log */
1712         if (size == 0) {
1713                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1714                 return;
1715         }
1716
1717         IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
1718                         size, num_wraps);
1719
1720         /* if uCode has wrapped back to top of log, start at the oldest entry,
1721          * i.e the next one that uCode would fill. */
1722         if (num_wraps)
1723                 iwl_print_event_log(priv, next_entry,
1724                                         capacity - next_entry, mode);
1725         /* (then/else) start at top of log */
1726         iwl_print_event_log(priv, 0, next_entry, mode);
1727
1728 }
1729 #endif
1730
1731 /**
1732  * iwl_alive_start - called after REPLY_ALIVE notification received
1733  *                   from protocol/runtime uCode (initialization uCode's
1734  *                   Alive gets handled by iwl_init_alive_start()).
1735  */
1736 static void iwl_alive_start(struct iwl_priv *priv)
1737 {
1738         int ret = 0;
1739
1740         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
1741
1742         if (priv->card_alive.is_valid != UCODE_VALID_OK) {
1743                 /* We had an error bringing up the hardware, so take it
1744                  * all the way back down so we can try again */
1745                 IWL_DEBUG_INFO(priv, "Alive failed.\n");
1746                 goto restart;
1747         }
1748
1749         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
1750          * This is a paranoid check, because we would not have gotten the
1751          * "runtime" alive if code weren't properly loaded.  */
1752         if (iwl_verify_ucode(priv)) {
1753                 /* Runtime instruction load was bad;
1754                  * take it all the way back down so we can try again */
1755                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
1756                 goto restart;
1757         }
1758
1759         iwl_clear_stations_table(priv);
1760         ret = priv->cfg->ops->lib->alive_notify(priv);
1761         if (ret) {
1762                 IWL_WARN(priv,
1763                         "Could not complete ALIVE transition [ntf]: %d\n", ret);
1764                 goto restart;
1765         }
1766
1767         /* After the ALIVE response, we can send host commands to the uCode */
1768         set_bit(STATUS_ALIVE, &priv->status);
1769
1770         if (iwl_is_rfkill(priv))
1771                 return;
1772
1773         ieee80211_wake_queues(priv->hw);
1774
1775         priv->active_rate = priv->rates_mask;
1776         priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1777
1778         /* Configure Tx antenna selection based on H/W config */
1779         if (priv->cfg->ops->hcmd->set_tx_ant)
1780                 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
1781
1782         if (iwl_is_associated(priv)) {
1783                 struct iwl_rxon_cmd *active_rxon =
1784                                 (struct iwl_rxon_cmd *)&priv->active_rxon;
1785                 /* apply any changes in staging */
1786                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
1787                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1788         } else {
1789                 /* Initialize our rx_config data */
1790                 iwl_connection_init_rx_config(priv, priv->iw_mode);
1791
1792                 if (priv->cfg->ops->hcmd->set_rxon_chain)
1793                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
1794
1795                 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1796         }
1797
1798         /* Configure Bluetooth device coexistence support */
1799         iwl_send_bt_config(priv);
1800
1801         iwl_reset_run_time_calib(priv);
1802
1803         /* Configure the adapter for unassociated operation */
1804         iwlcore_commit_rxon(priv);
1805
1806         /* At this point, the NIC is initialized and operational */
1807         iwl_rf_kill_ct_config(priv);
1808
1809         iwl_leds_init(priv);
1810
1811         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
1812         set_bit(STATUS_READY, &priv->status);
1813         wake_up_interruptible(&priv->wait_command_queue);
1814
1815         iwl_power_update_mode(priv, true);
1816
1817         /* reassociate for ADHOC mode */
1818         if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
1819                 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
1820                                                                 priv->vif);
1821                 if (beacon)
1822                         iwl_mac_beacon_update(priv->hw, beacon);
1823         }
1824
1825
1826         if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
1827                 iwl_set_mode(priv, priv->iw_mode);
1828
1829         return;
1830
1831  restart:
1832         queue_work(priv->workqueue, &priv->restart);
1833 }
1834
1835 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
1836
1837 static void __iwl_down(struct iwl_priv *priv)
1838 {
1839         unsigned long flags;
1840         int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
1841
1842         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
1843
1844         if (!exit_pending)
1845                 set_bit(STATUS_EXIT_PENDING, &priv->status);
1846
1847         iwl_clear_stations_table(priv);
1848
1849         /* Unblock any waiting calls */
1850         wake_up_interruptible_all(&priv->wait_command_queue);
1851
1852         /* Wipe out the EXIT_PENDING status bit if we are not actually
1853          * exiting the module */
1854         if (!exit_pending)
1855                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
1856
1857         /* stop and reset the on-board processor */
1858         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
1859
1860         /* tell the device to stop sending interrupts */
1861         spin_lock_irqsave(&priv->lock, flags);
1862         iwl_disable_interrupts(priv);
1863         spin_unlock_irqrestore(&priv->lock, flags);
1864         iwl_synchronize_irq(priv);
1865
1866         if (priv->mac80211_registered)
1867                 ieee80211_stop_queues(priv->hw);
1868
1869         /* If we have not previously called iwl_init() then
1870          * clear all bits but the RF Kill bit and return */
1871         if (!iwl_is_init(priv)) {
1872                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1873                                         STATUS_RF_KILL_HW |
1874                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1875                                         STATUS_GEO_CONFIGURED |
1876                                test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1877                                         STATUS_EXIT_PENDING;
1878                 goto exit;
1879         }
1880
1881         /* ...otherwise clear out all the status bits but the RF Kill
1882          * bit and continue taking the NIC down. */
1883         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1884                                 STATUS_RF_KILL_HW |
1885                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1886                                 STATUS_GEO_CONFIGURED |
1887                         test_bit(STATUS_FW_ERROR, &priv->status) <<
1888                                 STATUS_FW_ERROR |
1889                        test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1890                                 STATUS_EXIT_PENDING;
1891
1892         /* device going down, Stop using ICT table */
1893         iwl_disable_ict(priv);
1894         spin_lock_irqsave(&priv->lock, flags);
1895         iwl_clear_bit(priv, CSR_GP_CNTRL,
1896                          CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
1897         spin_unlock_irqrestore(&priv->lock, flags);
1898
1899         iwl_txq_ctx_stop(priv);
1900         iwl_rxq_stop(priv);
1901
1902         iwl_write_prph(priv, APMG_CLK_DIS_REG,
1903                                 APMG_CLK_VAL_DMA_CLK_RQT);
1904
1905         udelay(5);
1906
1907         /* Stop the device, and put it in low power state */
1908         priv->cfg->ops->lib->apm_ops.stop(priv);
1909
1910  exit:
1911         memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
1912
1913         if (priv->ibss_beacon)
1914                 dev_kfree_skb(priv->ibss_beacon);
1915         priv->ibss_beacon = NULL;
1916
1917         /* clear out any free frames */
1918         iwl_clear_free_frames(priv);
1919 }
1920
1921 static void iwl_down(struct iwl_priv *priv)
1922 {
1923         mutex_lock(&priv->mutex);
1924         __iwl_down(priv);
1925         mutex_unlock(&priv->mutex);
1926
1927         iwl_cancel_deferred_work(priv);
1928 }
1929
1930 #define HW_READY_TIMEOUT (50)
1931
1932 static int iwl_set_hw_ready(struct iwl_priv *priv)
1933 {
1934         int ret = 0;
1935
1936         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1937                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
1938
1939         /* See if we got it */
1940         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
1941                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1942                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1943                                 HW_READY_TIMEOUT);
1944         if (ret != -ETIMEDOUT)
1945                 priv->hw_ready = true;
1946         else
1947                 priv->hw_ready = false;
1948
1949         IWL_DEBUG_INFO(priv, "hardware %s\n",
1950                       (priv->hw_ready == 1) ? "ready" : "not ready");
1951         return ret;
1952 }
1953
1954 static int iwl_prepare_card_hw(struct iwl_priv *priv)
1955 {
1956         int ret = 0;
1957
1958         IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter \n");
1959
1960         ret = iwl_set_hw_ready(priv);
1961         if (priv->hw_ready)
1962                 return ret;
1963
1964         /* If HW is not ready, prepare the conditions to check again */
1965         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1966                         CSR_HW_IF_CONFIG_REG_PREPARE);
1967
1968         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
1969                         ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
1970                         CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
1971
1972         /* HW should be ready by now, check again. */
1973         if (ret != -ETIMEDOUT)
1974                 iwl_set_hw_ready(priv);
1975
1976         return ret;
1977 }
1978
1979 #define MAX_HW_RESTARTS 5
1980
1981 static int __iwl_up(struct iwl_priv *priv)
1982 {
1983         int i;
1984         int ret;
1985
1986         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
1987                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
1988                 return -EIO;
1989         }
1990
1991         if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
1992                 IWL_ERR(priv, "ucode not available for device bringup\n");
1993                 return -EIO;
1994         }
1995
1996         iwl_prepare_card_hw(priv);
1997
1998         if (!priv->hw_ready) {
1999                 IWL_WARN(priv, "Exit HW not ready\n");
2000                 return -EIO;
2001         }
2002
2003         /* If platform's RF_KILL switch is NOT set to KILL */
2004         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2005                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2006         else
2007                 set_bit(STATUS_RF_KILL_HW, &priv->status);
2008
2009         if (iwl_is_rfkill(priv)) {
2010                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2011
2012                 iwl_enable_interrupts(priv);
2013                 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2014                 return 0;
2015         }
2016
2017         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2018
2019         ret = iwl_hw_nic_init(priv);
2020         if (ret) {
2021                 IWL_ERR(priv, "Unable to init nic\n");
2022                 return ret;
2023         }
2024
2025         /* make sure rfkill handshake bits are cleared */
2026         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2027         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2028                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2029
2030         /* clear (again), then enable host interrupts */
2031         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2032         iwl_enable_interrupts(priv);
2033
2034         /* really make sure rfkill handshake bits are cleared */
2035         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2036         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2037
2038         /* Copy original ucode data image from disk into backup cache.
2039          * This will be used to initialize the on-board processor's
2040          * data SRAM for a clean start when the runtime program first loads. */
2041         memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2042                priv->ucode_data.len);
2043
2044         for (i = 0; i < MAX_HW_RESTARTS; i++) {
2045
2046                 iwl_clear_stations_table(priv);
2047
2048                 /* load bootstrap state machine,
2049                  * load bootstrap program into processor's memory,
2050                  * prepare to load the "initialize" uCode */
2051                 ret = priv->cfg->ops->lib->load_ucode(priv);
2052
2053                 if (ret) {
2054                         IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2055                                 ret);
2056                         continue;
2057                 }
2058
2059                 /* start card; "initialize" will load runtime ucode */
2060                 iwl_nic_start(priv);
2061
2062                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2063
2064                 return 0;
2065         }
2066
2067         set_bit(STATUS_EXIT_PENDING, &priv->status);
2068         __iwl_down(priv);
2069         clear_bit(STATUS_EXIT_PENDING, &priv->status);
2070
2071         /* tried to restart and config the device for as long as our
2072          * patience could withstand */
2073         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2074         return -EIO;
2075 }
2076
2077
2078 /*****************************************************************************
2079  *
2080  * Workqueue callbacks
2081  *
2082  *****************************************************************************/
2083
2084 static void iwl_bg_init_alive_start(struct work_struct *data)
2085 {
2086         struct iwl_priv *priv =
2087             container_of(data, struct iwl_priv, init_alive_start.work);
2088
2089         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2090                 return;
2091
2092         mutex_lock(&priv->mutex);
2093         priv->cfg->ops->lib->init_alive_start(priv);
2094         mutex_unlock(&priv->mutex);
2095 }
2096
2097 static void iwl_bg_alive_start(struct work_struct *data)
2098 {
2099         struct iwl_priv *priv =
2100             container_of(data, struct iwl_priv, alive_start.work);
2101
2102         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2103                 return;
2104
2105         /* enable dram interrupt */
2106         iwl_reset_ict(priv);
2107
2108         mutex_lock(&priv->mutex);
2109         iwl_alive_start(priv);
2110         mutex_unlock(&priv->mutex);
2111 }
2112
2113 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2114 {
2115         struct iwl_priv *priv = container_of(work, struct iwl_priv,
2116                         run_time_calib_work);
2117
2118         mutex_lock(&priv->mutex);
2119
2120         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2121             test_bit(STATUS_SCANNING, &priv->status)) {
2122                 mutex_unlock(&priv->mutex);
2123                 return;
2124         }
2125
2126         if (priv->start_calib) {
2127                 iwl_chain_noise_calibration(priv, &priv->statistics);
2128
2129                 iwl_sensitivity_calibration(priv, &priv->statistics);
2130         }
2131
2132         mutex_unlock(&priv->mutex);
2133         return;
2134 }
2135
2136 static void iwl_bg_up(struct work_struct *data)
2137 {
2138         struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
2139
2140         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2141                 return;
2142
2143         mutex_lock(&priv->mutex);
2144         __iwl_up(priv);
2145         mutex_unlock(&priv->mutex);
2146 }
2147
2148 static void iwl_bg_restart(struct work_struct *data)
2149 {
2150         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2151
2152         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2153                 return;
2154
2155         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2156                 mutex_lock(&priv->mutex);
2157                 priv->vif = NULL;
2158                 priv->is_open = 0;
2159                 mutex_unlock(&priv->mutex);
2160                 iwl_down(priv);
2161                 ieee80211_restart_hw(priv->hw);
2162         } else {
2163                 iwl_down(priv);
2164                 queue_work(priv->workqueue, &priv->up);
2165         }
2166 }
2167
2168 static void iwl_bg_rx_replenish(struct work_struct *data)
2169 {
2170         struct iwl_priv *priv =
2171             container_of(data, struct iwl_priv, rx_replenish);
2172
2173         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2174                 return;
2175
2176         mutex_lock(&priv->mutex);
2177         iwl_rx_replenish(priv);
2178         mutex_unlock(&priv->mutex);
2179 }
2180
2181 #define IWL_DELAY_NEXT_SCAN (HZ*2)
2182
2183 void iwl_post_associate(struct iwl_priv *priv)
2184 {
2185         struct ieee80211_conf *conf = NULL;
2186         int ret = 0;
2187         unsigned long flags;
2188
2189         if (priv->iw_mode == NL80211_IFTYPE_AP) {
2190                 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
2191                 return;
2192         }
2193
2194         IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2195                         priv->assoc_id, priv->active_rxon.bssid_addr);
2196
2197
2198         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2199                 return;
2200
2201
2202         if (!priv->vif || !priv->is_open)
2203                 return;
2204
2205         iwl_scan_cancel_timeout(priv, 200);
2206
2207         conf = ieee80211_get_hw_conf(priv->hw);
2208
2209         priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2210         iwlcore_commit_rxon(priv);
2211
2212         iwl_setup_rxon_timing(priv);
2213         ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2214                               sizeof(priv->rxon_timing), &priv->rxon_timing);
2215         if (ret)
2216                 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2217                             "Attempting to continue.\n");
2218
2219         priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2220
2221         iwl_set_rxon_ht(priv, &priv->current_ht_config);
2222
2223         if (priv->cfg->ops->hcmd->set_rxon_chain)
2224                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2225
2226         priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2227
2228         IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2229                         priv->assoc_id, priv->beacon_int);
2230
2231         if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2232                 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2233         else
2234                 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2235
2236         if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2237                 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2238                         priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2239                 else
2240                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2241
2242                 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2243                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2244
2245         }
2246
2247         iwlcore_commit_rxon(priv);
2248
2249         switch (priv->iw_mode) {
2250         case NL80211_IFTYPE_STATION:
2251                 break;
2252
2253         case NL80211_IFTYPE_ADHOC:
2254
2255                 /* assume default assoc id */
2256                 priv->assoc_id = 1;
2257
2258                 iwl_rxon_add_station(priv, priv->bssid, 0);
2259                 iwl_send_beacon_cmd(priv);
2260
2261                 break;
2262
2263         default:
2264                 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2265                           __func__, priv->iw_mode);
2266                 break;
2267         }
2268
2269         if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2270                 priv->assoc_station_added = 1;
2271
2272         spin_lock_irqsave(&priv->lock, flags);
2273         iwl_activate_qos(priv, 0);
2274         spin_unlock_irqrestore(&priv->lock, flags);
2275
2276         /* the chain noise calibration will enabled PM upon completion
2277          * If chain noise has already been run, then we need to enable
2278          * power management here */
2279         if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2280                 iwl_power_update_mode(priv, false);
2281
2282         /* Enable Rx differential gain and sensitivity calibrations */
2283         iwl_chain_noise_reset(priv);
2284         priv->start_calib = 1;
2285
2286 }
2287
2288 /*****************************************************************************
2289  *
2290  * mac80211 entry point functions
2291  *
2292  *****************************************************************************/
2293
2294 #define UCODE_READY_TIMEOUT     (4 * HZ)
2295
2296 /*
2297  * Not a mac80211 entry point function, but it fits in with all the
2298  * other mac80211 functions grouped here.
2299  */
2300 static int iwl_setup_mac(struct iwl_priv *priv)
2301 {
2302         int ret;
2303         struct ieee80211_hw *hw = priv->hw;
2304         hw->rate_control_algorithm = "iwl-agn-rs";
2305
2306         /* Tell mac80211 our characteristics */
2307         hw->flags = IEEE80211_HW_SIGNAL_DBM |
2308                     IEEE80211_HW_NOISE_DBM |
2309                     IEEE80211_HW_AMPDU_AGGREGATION |
2310                     IEEE80211_HW_SPECTRUM_MGMT;
2311
2312         if (!priv->cfg->broken_powersave)
2313                 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
2314                              IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
2315
2316         hw->sta_data_size = sizeof(struct iwl_station_priv);
2317         hw->wiphy->interface_modes =
2318                 BIT(NL80211_IFTYPE_STATION) |
2319                 BIT(NL80211_IFTYPE_ADHOC);
2320
2321         hw->wiphy->custom_regulatory = true;
2322
2323         /* Firmware does not support this */
2324         hw->wiphy->disable_beacon_hints = true;
2325
2326         /*
2327          * For now, disable PS by default because it affects
2328          * RX performance significantly.
2329          */
2330         hw->wiphy->ps_default = false;
2331
2332         hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
2333         /* we create the 802.11 header and a zero-length SSID element */
2334         hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
2335
2336         /* Default value; 4 EDCA QOS priorities */
2337         hw->queues = 4;
2338
2339         hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
2340
2341         if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
2342                 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
2343                         &priv->bands[IEEE80211_BAND_2GHZ];
2344         if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
2345                 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
2346                         &priv->bands[IEEE80211_BAND_5GHZ];
2347
2348         ret = ieee80211_register_hw(priv->hw);
2349         if (ret) {
2350                 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
2351                 return ret;
2352         }
2353         priv->mac80211_registered = 1;
2354
2355         return 0;
2356 }
2357
2358
2359 static int iwl_mac_start(struct ieee80211_hw *hw)
2360 {
2361         struct iwl_priv *priv = hw->priv;
2362         int ret;
2363
2364         IWL_DEBUG_MAC80211(priv, "enter\n");
2365
2366         /* we should be verifying the device is ready to be opened */
2367         mutex_lock(&priv->mutex);
2368
2369         /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2370          * ucode filename and max sizes are card-specific. */
2371
2372         if (!priv->ucode_code.len) {
2373                 ret = iwl_read_ucode(priv);
2374                 if (ret) {
2375                         IWL_ERR(priv, "Could not read microcode: %d\n", ret);
2376                         mutex_unlock(&priv->mutex);
2377                         return ret;
2378                 }
2379         }
2380
2381         ret = __iwl_up(priv);
2382
2383         mutex_unlock(&priv->mutex);
2384
2385         if (ret)
2386                 return ret;
2387
2388         if (iwl_is_rfkill(priv))
2389                 goto out;
2390
2391         IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2392
2393         /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2394          * mac80211 will not be run successfully. */
2395         ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2396                         test_bit(STATUS_READY, &priv->status),
2397                         UCODE_READY_TIMEOUT);
2398         if (!ret) {
2399                 if (!test_bit(STATUS_READY, &priv->status)) {
2400                         IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2401                                 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2402                         return -ETIMEDOUT;
2403                 }
2404         }
2405
2406         iwl_led_start(priv);
2407
2408 out:
2409         priv->is_open = 1;
2410         IWL_DEBUG_MAC80211(priv, "leave\n");
2411         return 0;
2412 }
2413
2414 static void iwl_mac_stop(struct ieee80211_hw *hw)
2415 {
2416         struct iwl_priv *priv = hw->priv;
2417
2418         IWL_DEBUG_MAC80211(priv, "enter\n");
2419
2420         if (!priv->is_open)
2421                 return;
2422
2423         priv->is_open = 0;
2424
2425         if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
2426                 /* stop mac, cancel any scan request and clear
2427                  * RXON_FILTER_ASSOC_MSK BIT
2428                  */
2429                 mutex_lock(&priv->mutex);
2430                 iwl_scan_cancel_timeout(priv, 100);
2431                 mutex_unlock(&priv->mutex);
2432         }
2433
2434         iwl_down(priv);
2435
2436         flush_workqueue(priv->workqueue);
2437
2438         /* enable interrupts again in order to receive rfkill changes */
2439         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2440         iwl_enable_interrupts(priv);
2441
2442         IWL_DEBUG_MAC80211(priv, "leave\n");
2443 }
2444
2445 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2446 {
2447         struct iwl_priv *priv = hw->priv;
2448
2449         IWL_DEBUG_MACDUMP(priv, "enter\n");
2450
2451         IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2452                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2453
2454         if (iwl_tx_skb(priv, skb))
2455                 dev_kfree_skb_any(skb);
2456
2457         IWL_DEBUG_MACDUMP(priv, "leave\n");
2458         return NETDEV_TX_OK;
2459 }
2460
2461 void iwl_config_ap(struct iwl_priv *priv)
2462 {
2463         int ret = 0;
2464         unsigned long flags;
2465
2466         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2467                 return;
2468
2469         /* The following should be done only at AP bring up */
2470         if (!iwl_is_associated(priv)) {
2471
2472                 /* RXON - unassoc (to set timing command) */
2473                 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2474                 iwlcore_commit_rxon(priv);
2475
2476                 /* RXON Timing */
2477                 iwl_setup_rxon_timing(priv);
2478                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2479                                 sizeof(priv->rxon_timing), &priv->rxon_timing);
2480                 if (ret)
2481                         IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2482                                         "Attempting to continue.\n");
2483
2484                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2485                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
2486
2487                 /* FIXME: what should be the assoc_id for AP? */
2488                 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2489                 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2490                         priv->staging_rxon.flags |=
2491                                 RXON_FLG_SHORT_PREAMBLE_MSK;
2492                 else
2493                         priv->staging_rxon.flags &=
2494                                 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2495
2496                 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2497                         if (priv->assoc_capability &
2498                                 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2499                                 priv->staging_rxon.flags |=
2500                                         RXON_FLG_SHORT_SLOT_MSK;
2501                         else
2502                                 priv->staging_rxon.flags &=
2503                                         ~RXON_FLG_SHORT_SLOT_MSK;
2504
2505                         if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2506                                 priv->staging_rxon.flags &=
2507                                         ~RXON_FLG_SHORT_SLOT_MSK;
2508                 }
2509                 /* restore RXON assoc */
2510                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2511                 iwlcore_commit_rxon(priv);
2512                 spin_lock_irqsave(&priv->lock, flags);
2513                 iwl_activate_qos(priv, 1);
2514                 spin_unlock_irqrestore(&priv->lock, flags);
2515                 iwl_rxon_add_station(priv, iwl_bcast_addr, 0);
2516         }
2517         iwl_send_beacon_cmd(priv);
2518
2519         /* FIXME - we need to add code here to detect a totally new
2520          * configuration, reset the AP, unassoc, rxon timing, assoc,
2521          * clear sta table, add BCAST sta... */
2522 }
2523
2524 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
2525                         struct ieee80211_key_conf *keyconf, const u8 *addr,
2526                         u32 iv32, u16 *phase1key)
2527 {
2528
2529         struct iwl_priv *priv = hw->priv;
2530         IWL_DEBUG_MAC80211(priv, "enter\n");
2531
2532         iwl_update_tkip_key(priv, keyconf, addr, iv32, phase1key);
2533
2534         IWL_DEBUG_MAC80211(priv, "leave\n");
2535 }
2536
2537 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2538                            struct ieee80211_vif *vif,
2539                            struct ieee80211_sta *sta,
2540                            struct ieee80211_key_conf *key)
2541 {
2542         struct iwl_priv *priv = hw->priv;
2543         const u8 *addr;
2544         int ret;
2545         u8 sta_id;
2546         bool is_default_wep_key = false;
2547
2548         IWL_DEBUG_MAC80211(priv, "enter\n");
2549
2550         if (priv->cfg->mod_params->sw_crypto) {
2551                 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2552                 return -EOPNOTSUPP;
2553         }
2554         addr = sta ? sta->addr : iwl_bcast_addr;
2555         sta_id = iwl_find_station(priv, addr);
2556         if (sta_id == IWL_INVALID_STATION) {
2557                 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
2558                                    addr);
2559                 return -EINVAL;
2560
2561         }
2562
2563         mutex_lock(&priv->mutex);
2564         iwl_scan_cancel_timeout(priv, 100);
2565         mutex_unlock(&priv->mutex);
2566
2567         /* If we are getting WEP group key and we didn't receive any key mapping
2568          * so far, we are in legacy wep mode (group key only), otherwise we are
2569          * in 1X mode.
2570          * In legacy wep mode, we use another host command to the uCode */
2571         if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
2572                 priv->iw_mode != NL80211_IFTYPE_AP) {
2573                 if (cmd == SET_KEY)
2574                         is_default_wep_key = !priv->key_mapping_key;
2575                 else
2576                         is_default_wep_key =
2577                                         (key->hw_key_idx == HW_KEY_DEFAULT);
2578         }
2579
2580         switch (cmd) {
2581         case SET_KEY:
2582                 if (is_default_wep_key)
2583                         ret = iwl_set_default_wep_key(priv, key);
2584                 else
2585                         ret = iwl_set_dynamic_key(priv, key, sta_id);
2586
2587                 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2588                 break;
2589         case DISABLE_KEY:
2590                 if (is_default_wep_key)
2591                         ret = iwl_remove_default_wep_key(priv, key);
2592                 else
2593                         ret = iwl_remove_dynamic_key(priv, key, sta_id);
2594
2595                 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2596                 break;
2597         default:
2598                 ret = -EINVAL;
2599         }
2600
2601         IWL_DEBUG_MAC80211(priv, "leave\n");
2602
2603         return ret;
2604 }
2605
2606 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2607                              enum ieee80211_ampdu_mlme_action action,
2608                              struct ieee80211_sta *sta, u16 tid, u16 *ssn)
2609 {
2610         struct iwl_priv *priv = hw->priv;
2611         int ret;
2612
2613         IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2614                      sta->addr, tid);
2615
2616         if (!(priv->cfg->sku & IWL_SKU_N))
2617                 return -EACCES;
2618
2619         switch (action) {
2620         case IEEE80211_AMPDU_RX_START:
2621                 IWL_DEBUG_HT(priv, "start Rx\n");
2622                 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
2623         case IEEE80211_AMPDU_RX_STOP:
2624                 IWL_DEBUG_HT(priv, "stop Rx\n");
2625                 ret = iwl_sta_rx_agg_stop(priv, sta->addr, tid);
2626                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2627                         return 0;
2628                 else
2629                         return ret;
2630         case IEEE80211_AMPDU_TX_START:
2631                 IWL_DEBUG_HT(priv, "start Tx\n");
2632                 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
2633         case IEEE80211_AMPDU_TX_STOP:
2634                 IWL_DEBUG_HT(priv, "stop Tx\n");
2635                 ret = iwl_tx_agg_stop(priv, sta->addr, tid);
2636                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2637                         return 0;
2638                 else
2639                         return ret;
2640         default:
2641                 IWL_DEBUG_HT(priv, "unknown\n");
2642                 return -EINVAL;
2643                 break;
2644         }
2645         return 0;
2646 }
2647
2648 static int iwl_mac_get_stats(struct ieee80211_hw *hw,
2649                              struct ieee80211_low_level_stats *stats)
2650 {
2651         struct iwl_priv *priv = hw->priv;
2652
2653         priv = hw->priv;
2654         IWL_DEBUG_MAC80211(priv, "enter\n");
2655         IWL_DEBUG_MAC80211(priv, "leave\n");
2656
2657         return 0;
2658 }
2659
2660 /*****************************************************************************
2661  *
2662  * sysfs attributes
2663  *
2664  *****************************************************************************/
2665
2666 #ifdef CONFIG_IWLWIFI_DEBUG
2667
2668 /*
2669  * The following adds a new attribute to the sysfs representation
2670  * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
2671  * used for controlling the debug level.
2672  *
2673  * See the level definitions in iwl for details.
2674  *
2675  * The debug_level being managed using sysfs below is a per device debug
2676  * level that is used instead of the global debug level if it (the per
2677  * device debug level) is set.
2678  */
2679 static ssize_t show_debug_level(struct device *d,
2680                                 struct device_attribute *attr, char *buf)
2681 {
2682         struct iwl_priv *priv = dev_get_drvdata(d);
2683         return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
2684 }
2685 static ssize_t store_debug_level(struct device *d,
2686                                 struct device_attribute *attr,
2687                                  const char *buf, size_t count)
2688 {
2689         struct iwl_priv *priv = dev_get_drvdata(d);
2690         unsigned long val;
2691         int ret;
2692
2693         ret = strict_strtoul(buf, 0, &val);
2694         if (ret)
2695                 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
2696         else {
2697                 priv->debug_level = val;
2698                 if (iwl_alloc_traffic_mem(priv))
2699                         IWL_ERR(priv,
2700                                 "Not enough memory to generate traffic log\n");
2701         }
2702         return strnlen(buf, count);
2703 }
2704
2705 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
2706                         show_debug_level, store_debug_level);
2707
2708
2709 #endif /* CONFIG_IWLWIFI_DEBUG */
2710
2711
2712 static ssize_t show_temperature(struct device *d,
2713                                 struct device_attribute *attr, char *buf)
2714 {
2715         struct iwl_priv *priv = dev_get_drvdata(d);
2716
2717         if (!iwl_is_alive(priv))
2718                 return -EAGAIN;
2719
2720         return sprintf(buf, "%d\n", priv->temperature);
2721 }
2722
2723 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
2724
2725 static ssize_t show_tx_power(struct device *d,
2726                              struct device_attribute *attr, char *buf)
2727 {
2728         struct iwl_priv *priv = dev_get_drvdata(d);
2729
2730         if (!iwl_is_ready_rf(priv))
2731                 return sprintf(buf, "off\n");
2732         else
2733                 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
2734 }
2735
2736 static ssize_t store_tx_power(struct device *d,
2737                               struct device_attribute *attr,
2738                               const char *buf, size_t count)
2739 {
2740         struct iwl_priv *priv = dev_get_drvdata(d);
2741         unsigned long val;
2742         int ret;
2743
2744         ret = strict_strtoul(buf, 10, &val);
2745         if (ret)
2746                 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
2747         else {
2748                 ret = iwl_set_tx_power(priv, val, false);
2749                 if (ret)
2750                         IWL_ERR(priv, "failed setting tx power (0x%d).\n",
2751                                 ret);
2752                 else
2753                         ret = count;
2754         }
2755         return ret;
2756 }
2757
2758 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
2759
2760 static ssize_t show_flags(struct device *d,
2761                           struct device_attribute *attr, char *buf)
2762 {
2763         struct iwl_priv *priv = dev_get_drvdata(d);
2764
2765         return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
2766 }
2767
2768 static ssize_t store_flags(struct device *d,
2769                            struct device_attribute *attr,
2770                            const char *buf, size_t count)
2771 {
2772         struct iwl_priv *priv = dev_get_drvdata(d);
2773         unsigned long val;
2774         u32 flags;
2775         int ret = strict_strtoul(buf, 0, &val);
2776         if (ret)
2777                 return ret;
2778         flags = (u32)val;
2779
2780         mutex_lock(&priv->mutex);
2781         if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
2782                 /* Cancel any currently running scans... */
2783                 if (iwl_scan_cancel_timeout(priv, 100))
2784                         IWL_WARN(priv, "Could not cancel scan.\n");
2785                 else {
2786                         IWL_DEBUG_INFO(priv, "Commit rxon.flags = 0x%04X\n", flags);
2787                         priv->staging_rxon.flags = cpu_to_le32(flags);
2788                         iwlcore_commit_rxon(priv);
2789                 }
2790         }
2791         mutex_unlock(&priv->mutex);
2792
2793         return count;
2794 }
2795
2796 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
2797
2798 static ssize_t show_filter_flags(struct device *d,
2799                                  struct device_attribute *attr, char *buf)
2800 {
2801         struct iwl_priv *priv = dev_get_drvdata(d);
2802
2803         return sprintf(buf, "0x%04X\n",
2804                 le32_to_cpu(priv->active_rxon.filter_flags));
2805 }
2806
2807 static ssize_t store_filter_flags(struct device *d,
2808                                   struct device_attribute *attr,
2809                                   const char *buf, size_t count)
2810 {
2811         struct iwl_priv *priv = dev_get_drvdata(d);
2812         unsigned long val;
2813         u32 filter_flags;
2814         int ret = strict_strtoul(buf, 0, &val);
2815         if (ret)
2816                 return ret;
2817         filter_flags = (u32)val;
2818
2819         mutex_lock(&priv->mutex);
2820         if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
2821                 /* Cancel any currently running scans... */
2822                 if (iwl_scan_cancel_timeout(priv, 100))
2823                         IWL_WARN(priv, "Could not cancel scan.\n");
2824                 else {
2825                         IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
2826                                        "0x%04X\n", filter_flags);
2827                         priv->staging_rxon.filter_flags =
2828                                 cpu_to_le32(filter_flags);
2829                         iwlcore_commit_rxon(priv);
2830                 }
2831         }
2832         mutex_unlock(&priv->mutex);
2833
2834         return count;
2835 }
2836
2837 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
2838                    store_filter_flags);
2839
2840
2841 static ssize_t show_statistics(struct device *d,
2842                                struct device_attribute *attr, char *buf)
2843 {
2844         struct iwl_priv *priv = dev_get_drvdata(d);
2845         u32 size = sizeof(struct iwl_notif_statistics);
2846         u32 len = 0, ofs = 0;
2847         u8 *data = (u8 *)&priv->statistics;
2848         int rc = 0;
2849
2850         if (!iwl_is_alive(priv))
2851                 return -EAGAIN;
2852
2853         mutex_lock(&priv->mutex);
2854         rc = iwl_send_statistics_request(priv, 0);
2855         mutex_unlock(&priv->mutex);
2856
2857         if (rc) {
2858                 len = sprintf(buf,
2859                               "Error sending statistics request: 0x%08X\n", rc);
2860                 return len;
2861         }
2862
2863         while (size && (PAGE_SIZE - len)) {
2864                 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
2865                                    PAGE_SIZE - len, 1);
2866                 len = strlen(buf);
2867                 if (PAGE_SIZE - len)
2868                         buf[len++] = '\n';
2869
2870                 ofs += 16;
2871                 size -= min(size, 16U);
2872         }
2873
2874         return len;
2875 }
2876
2877 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
2878
2879 static ssize_t show_rts_ht_protection(struct device *d,
2880                              struct device_attribute *attr, char *buf)
2881 {
2882         struct iwl_priv *priv = dev_get_drvdata(d);
2883
2884         return sprintf(buf, "%s\n",
2885                 priv->cfg->use_rts_for_ht ? "RTS/CTS" : "CTS-to-self");
2886 }
2887
2888 static ssize_t store_rts_ht_protection(struct device *d,
2889                               struct device_attribute *attr,
2890                               const char *buf, size_t count)
2891 {
2892         struct iwl_priv *priv = dev_get_drvdata(d);
2893         unsigned long val;
2894         int ret;
2895
2896         ret = strict_strtoul(buf, 10, &val);
2897         if (ret)
2898                 IWL_INFO(priv, "Input is not in decimal form.\n");
2899         else {
2900                 if (!iwl_is_associated(priv))
2901                         priv->cfg->use_rts_for_ht = val ? true : false;
2902                 else
2903                         IWL_ERR(priv, "Sta associated with AP - "
2904                                 "Change protection mechanism is not allowed\n");
2905                 ret = count;
2906         }
2907         return ret;
2908 }
2909
2910 static DEVICE_ATTR(rts_ht_protection, S_IWUSR | S_IRUGO,
2911                         show_rts_ht_protection, store_rts_ht_protection);
2912
2913
2914 /*****************************************************************************
2915  *
2916  * driver setup and teardown
2917  *
2918  *****************************************************************************/
2919
2920 static void iwl_setup_deferred_work(struct iwl_priv *priv)
2921 {
2922         priv->workqueue = create_singlethread_workqueue(DRV_NAME);
2923
2924         init_waitqueue_head(&priv->wait_command_queue);
2925
2926         INIT_WORK(&priv->up, iwl_bg_up);
2927         INIT_WORK(&priv->restart, iwl_bg_restart);
2928         INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
2929         INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
2930         INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
2931         INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
2932         INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
2933
2934         iwl_setup_scan_deferred_work(priv);
2935
2936         if (priv->cfg->ops->lib->setup_deferred_work)
2937                 priv->cfg->ops->lib->setup_deferred_work(priv);
2938
2939         init_timer(&priv->statistics_periodic);
2940         priv->statistics_periodic.data = (unsigned long)priv;
2941         priv->statistics_periodic.function = iwl_bg_statistics_periodic;
2942
2943         if (!priv->cfg->use_isr_legacy)
2944                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2945                         iwl_irq_tasklet, (unsigned long)priv);
2946         else
2947                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2948                         iwl_irq_tasklet_legacy, (unsigned long)priv);
2949 }
2950
2951 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
2952 {
2953         if (priv->cfg->ops->lib->cancel_deferred_work)
2954                 priv->cfg->ops->lib->cancel_deferred_work(priv);
2955
2956         cancel_delayed_work_sync(&priv->init_alive_start);
2957         cancel_delayed_work(&priv->scan_check);
2958         cancel_delayed_work(&priv->alive_start);
2959         cancel_work_sync(&priv->beacon_update);
2960         del_timer_sync(&priv->statistics_periodic);
2961 }
2962
2963 static struct attribute *iwl_sysfs_entries[] = {
2964         &dev_attr_flags.attr,
2965         &dev_attr_filter_flags.attr,
2966         &dev_attr_statistics.attr,
2967         &dev_attr_temperature.attr,
2968         &dev_attr_tx_power.attr,
2969         &dev_attr_rts_ht_protection.attr,
2970 #ifdef CONFIG_IWLWIFI_DEBUG
2971         &dev_attr_debug_level.attr,
2972 #endif
2973         NULL
2974 };
2975
2976 static struct attribute_group iwl_attribute_group = {
2977         .name = NULL,           /* put in device directory */
2978         .attrs = iwl_sysfs_entries,
2979 };
2980
2981 static struct ieee80211_ops iwl_hw_ops = {
2982         .tx = iwl_mac_tx,
2983         .start = iwl_mac_start,
2984         .stop = iwl_mac_stop,
2985         .add_interface = iwl_mac_add_interface,
2986         .remove_interface = iwl_mac_remove_interface,
2987         .config = iwl_mac_config,
2988         .configure_filter = iwl_configure_filter,
2989         .set_key = iwl_mac_set_key,
2990         .update_tkip_key = iwl_mac_update_tkip_key,
2991         .get_stats = iwl_mac_get_stats,
2992         .get_tx_stats = iwl_mac_get_tx_stats,
2993         .conf_tx = iwl_mac_conf_tx,
2994         .reset_tsf = iwl_mac_reset_tsf,
2995         .bss_info_changed = iwl_bss_info_changed,
2996         .ampdu_action = iwl_mac_ampdu_action,
2997         .hw_scan = iwl_mac_hw_scan
2998 };
2999
3000 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3001 {
3002         int err = 0;
3003         struct iwl_priv *priv;
3004         struct ieee80211_hw *hw;
3005         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3006         unsigned long flags;
3007         u16 pci_cmd;
3008
3009         /************************
3010          * 1. Allocating HW data
3011          ************************/
3012
3013         /* Disabling hardware scan means that mac80211 will perform scans
3014          * "the hard way", rather than using device's scan. */
3015         if (cfg->mod_params->disable_hw_scan) {
3016                 if (iwl_debug_level & IWL_DL_INFO)
3017                         dev_printk(KERN_DEBUG, &(pdev->dev),
3018                                    "Disabling hw_scan\n");
3019                 iwl_hw_ops.hw_scan = NULL;
3020         }
3021
3022         hw = iwl_alloc_all(cfg, &iwl_hw_ops);
3023         if (!hw) {
3024                 err = -ENOMEM;
3025                 goto out;
3026         }
3027         priv = hw->priv;
3028         /* At this point both hw and priv are allocated. */
3029
3030         SET_IEEE80211_DEV(hw, &pdev->dev);
3031
3032         IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3033         priv->cfg = cfg;
3034         priv->pci_dev = pdev;
3035         priv->inta_mask = CSR_INI_SET_MASK;
3036
3037 #ifdef CONFIG_IWLWIFI_DEBUG
3038         atomic_set(&priv->restrict_refcnt, 0);
3039 #endif
3040         if (iwl_alloc_traffic_mem(priv))
3041                 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3042
3043         /**************************
3044          * 2. Initializing PCI bus
3045          **************************/
3046         if (pci_enable_device(pdev)) {
3047                 err = -ENODEV;
3048                 goto out_ieee80211_free_hw;
3049         }
3050
3051         pci_set_master(pdev);
3052
3053         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
3054         if (!err)
3055                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
3056         if (err) {
3057                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3058                 if (!err)
3059                         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3060                 /* both attempts failed: */
3061                 if (err) {
3062                         IWL_WARN(priv, "No suitable DMA available.\n");
3063                         goto out_pci_disable_device;
3064                 }
3065         }
3066
3067         err = pci_request_regions(pdev, DRV_NAME);
3068         if (err)
3069                 goto out_pci_disable_device;
3070
3071         pci_set_drvdata(pdev, priv);
3072
3073
3074         /***********************
3075          * 3. Read REV register
3076          ***********************/
3077         priv->hw_base = pci_iomap(pdev, 0, 0);
3078         if (!priv->hw_base) {
3079                 err = -ENODEV;
3080                 goto out_pci_release_regions;
3081         }
3082
3083         IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3084                 (unsigned long long) pci_resource_len(pdev, 0));
3085         IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3086
3087         /* this spin lock will be used in apm_ops.init and EEPROM access
3088          * we should init now
3089          */
3090         spin_lock_init(&priv->reg_lock);
3091         iwl_hw_detect(priv);
3092         IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n",
3093                 priv->cfg->name, priv->hw_rev);
3094
3095         /* We disable the RETRY_TIMEOUT register (0x41) to keep
3096          * PCI Tx retries from interfering with C3 CPU state */
3097         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3098
3099         iwl_prepare_card_hw(priv);
3100         if (!priv->hw_ready) {
3101                 IWL_WARN(priv, "Failed, HW not ready\n");
3102                 goto out_iounmap;
3103         }
3104
3105         /* amp init */
3106         err = priv->cfg->ops->lib->apm_ops.init(priv);
3107         if (err < 0) {
3108                 IWL_ERR(priv, "Failed to init APMG\n");
3109                 goto out_iounmap;
3110         }
3111         /*****************
3112          * 4. Read EEPROM
3113          *****************/
3114         /* Read the EEPROM */
3115         err = iwl_eeprom_init(priv);
3116         if (err) {
3117                 IWL_ERR(priv, "Unable to init EEPROM\n");
3118                 goto out_iounmap;
3119         }
3120         err = iwl_eeprom_check_version(priv);
3121         if (err)
3122                 goto out_free_eeprom;
3123
3124         /* extract MAC Address */
3125         iwl_eeprom_get_mac(priv, priv->mac_addr);
3126         IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
3127         SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
3128
3129         /************************
3130          * 5. Setup HW constants
3131          ************************/
3132         if (iwl_set_hw_params(priv)) {
3133                 IWL_ERR(priv, "failed to set hw parameters\n");
3134                 goto out_free_eeprom;
3135         }
3136
3137         /*******************
3138          * 6. Setup priv
3139          *******************/
3140
3141         err = iwl_init_drv(priv);
3142         if (err)
3143                 goto out_free_eeprom;
3144         /* At this point both hw and priv are initialized. */
3145
3146         /********************
3147          * 7. Setup services
3148          ********************/
3149         spin_lock_irqsave(&priv->lock, flags);
3150         iwl_disable_interrupts(priv);
3151         spin_unlock_irqrestore(&priv->lock, flags);
3152
3153         pci_enable_msi(priv->pci_dev);
3154
3155         iwl_alloc_isr_ict(priv);
3156         err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
3157                           IRQF_SHARED, DRV_NAME, priv);
3158         if (err) {
3159                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3160                 goto out_disable_msi;
3161         }
3162         err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
3163         if (err) {
3164                 IWL_ERR(priv, "failed to create sysfs device attributes\n");
3165                 goto out_free_irq;
3166         }
3167
3168         iwl_setup_deferred_work(priv);
3169         iwl_setup_rx_handlers(priv);
3170
3171         /**********************************
3172          * 8. Setup and register mac80211
3173          **********************************/
3174
3175         /* enable interrupts if needed: hw bug w/a */
3176         pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3177         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3178                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3179                 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3180         }
3181
3182         iwl_enable_interrupts(priv);
3183
3184         err = iwl_setup_mac(priv);
3185         if (err)
3186                 goto out_remove_sysfs;
3187
3188         err = iwl_dbgfs_register(priv, DRV_NAME);
3189         if (err)
3190                 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
3191
3192         /* If platform's RF_KILL switch is NOT set to KILL */
3193         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3194                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3195         else
3196                 set_bit(STATUS_RF_KILL_HW, &priv->status);
3197
3198         wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3199                 test_bit(STATUS_RF_KILL_HW, &priv->status));
3200
3201         iwl_power_initialize(priv);
3202         iwl_tt_initialize(priv);
3203         return 0;
3204
3205  out_remove_sysfs:
3206         destroy_workqueue(priv->workqueue);
3207         priv->workqueue = NULL;
3208         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3209  out_free_irq:
3210         free_irq(priv->pci_dev->irq, priv);
3211         iwl_free_isr_ict(priv);
3212  out_disable_msi:
3213         pci_disable_msi(priv->pci_dev);
3214         iwl_uninit_drv(priv);
3215  out_free_eeprom:
3216         iwl_eeprom_free(priv);
3217  out_iounmap:
3218         pci_iounmap(pdev, priv->hw_base);
3219  out_pci_release_regions:
3220         pci_set_drvdata(pdev, NULL);
3221         pci_release_regions(pdev);
3222  out_pci_disable_device:
3223         pci_disable_device(pdev);
3224  out_ieee80211_free_hw:
3225         iwl_free_traffic_mem(priv);
3226         ieee80211_free_hw(priv->hw);
3227  out:
3228         return err;
3229 }
3230
3231 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3232 {
3233         struct iwl_priv *priv = pci_get_drvdata(pdev);
3234         unsigned long flags;
3235
3236         if (!priv)
3237                 return;
3238
3239         IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3240
3241         iwl_dbgfs_unregister(priv);
3242         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3243
3244         /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3245          * to be called and iwl_down since we are removing the device
3246          * we need to set STATUS_EXIT_PENDING bit.
3247          */
3248         set_bit(STATUS_EXIT_PENDING, &priv->status);
3249         if (priv->mac80211_registered) {
3250                 ieee80211_unregister_hw(priv->hw);
3251                 priv->mac80211_registered = 0;
3252         } else {
3253                 iwl_down(priv);
3254         }
3255
3256         iwl_tt_exit(priv);
3257
3258         /* make sure we flush any pending irq or
3259          * tasklet for the driver
3260          */
3261         spin_lock_irqsave(&priv->lock, flags);
3262         iwl_disable_interrupts(priv);
3263         spin_unlock_irqrestore(&priv->lock, flags);
3264
3265         iwl_synchronize_irq(priv);
3266
3267         iwl_dealloc_ucode_pci(priv);
3268
3269         if (priv->rxq.bd)
3270                 iwl_rx_queue_free(priv, &priv->rxq);
3271         iwl_hw_txq_ctx_free(priv);
3272
3273         iwl_clear_stations_table(priv);
3274         iwl_eeprom_free(priv);
3275
3276
3277         /*netif_stop_queue(dev); */
3278         flush_workqueue(priv->workqueue);
3279
3280         /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3281          * priv->workqueue... so we can't take down the workqueue
3282          * until now... */
3283         destroy_workqueue(priv->workqueue);
3284         priv->workqueue = NULL;
3285         iwl_free_traffic_mem(priv);
3286
3287         free_irq(priv->pci_dev->irq, priv);
3288         pci_disable_msi(priv->pci_dev);
3289         pci_iounmap(pdev, priv->hw_base);
3290         pci_release_regions(pdev);
3291         pci_disable_device(pdev);
3292         pci_set_drvdata(pdev, NULL);
3293
3294         iwl_uninit_drv(priv);
3295
3296         iwl_free_isr_ict(priv);
3297
3298         if (priv->ibss_beacon)
3299                 dev_kfree_skb(priv->ibss_beacon);
3300
3301         ieee80211_free_hw(priv->hw);
3302 }
3303
3304
3305 /*****************************************************************************
3306  *
3307  * driver and module entry point
3308  *
3309  *****************************************************************************/
3310
3311 /* Hardware specific file defines the PCI IDs table for that hardware module */
3312 static struct pci_device_id iwl_hw_card_ids[] = {
3313 #ifdef CONFIG_IWL4965
3314         {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3315         {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
3316 #endif /* CONFIG_IWL4965 */
3317 #ifdef CONFIG_IWL5000
3318         {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)},
3319         {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)},
3320         {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)},
3321         {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)},
3322         {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)},
3323         {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)},
3324         {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)},
3325         {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)},
3326         {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)},
3327         {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)},
3328 /* 5350 WiFi/WiMax */
3329         {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)},
3330         {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)},
3331         {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)},
3332 /* 5150 Wifi/WiMax */
3333         {IWL_PCI_DEVICE(0x423C, PCI_ANY_ID, iwl5150_agn_cfg)},
3334         {IWL_PCI_DEVICE(0x423D, PCI_ANY_ID, iwl5150_agn_cfg)},
3335
3336 /* 6x00 Series */
3337         {IWL_PCI_DEVICE(0x008D, 0x1301, iwl6000h_2agn_cfg)},
3338         {IWL_PCI_DEVICE(0x008D, 0x1321, iwl6000h_2agn_cfg)},
3339         {IWL_PCI_DEVICE(0x008D, 0x1326, iwl6000h_2abg_cfg)},
3340         {IWL_PCI_DEVICE(0x008D, 0x1306, iwl6000h_2abg_cfg)},
3341         {IWL_PCI_DEVICE(0x008D, 0x1307, iwl6000h_2bg_cfg)},
3342         {IWL_PCI_DEVICE(0x008E, 0x1311, iwl6000h_2agn_cfg)},
3343         {IWL_PCI_DEVICE(0x008E, 0x1316, iwl6000h_2abg_cfg)},
3344
3345         {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
3346         {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
3347         {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
3348         {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
3349         {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
3350         {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
3351         {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
3352         {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
3353         {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
3354         {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
3355
3356 /* 6x50 WiFi/WiMax Series */
3357         {IWL_PCI_DEVICE(0x0086, 0x1101, iwl6050_3agn_cfg)},
3358         {IWL_PCI_DEVICE(0x0086, 0x1121, iwl6050_3agn_cfg)},
3359         {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
3360         {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
3361         {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
3362         {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
3363         {IWL_PCI_DEVICE(0x0088, 0x1111, iwl6050_3agn_cfg)},
3364         {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
3365         {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
3366
3367 /* 1000 Series WiFi */
3368         {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
3369         {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
3370         {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
3371         {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
3372         {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
3373         {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
3374         {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
3375         {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
3376         {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
3377         {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
3378         {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
3379         {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
3380 #endif /* CONFIG_IWL5000 */
3381
3382         {0}
3383 };
3384 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
3385
3386 static struct pci_driver iwl_driver = {
3387         .name = DRV_NAME,
3388         .id_table = iwl_hw_card_ids,
3389         .probe = iwl_pci_probe,
3390         .remove = __devexit_p(iwl_pci_remove),
3391 #ifdef CONFIG_PM
3392         .suspend = iwl_pci_suspend,
3393         .resume = iwl_pci_resume,
3394 #endif
3395 };
3396
3397 static int __init iwl_init(void)
3398 {
3399
3400         int ret;
3401         printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
3402         printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
3403
3404         ret = iwlagn_rate_control_register();
3405         if (ret) {
3406                 printk(KERN_ERR DRV_NAME
3407                        "Unable to register rate control algorithm: %d\n", ret);
3408                 return ret;
3409         }
3410
3411         ret = pci_register_driver(&iwl_driver);
3412         if (ret) {
3413                 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
3414                 goto error_register;
3415         }
3416
3417         return ret;
3418
3419 error_register:
3420         iwlagn_rate_control_unregister();
3421         return ret;
3422 }
3423
3424 static void __exit iwl_exit(void)
3425 {
3426         pci_unregister_driver(&iwl_driver);
3427         iwlagn_rate_control_unregister();
3428 }
3429
3430 module_exit(iwl_exit);
3431 module_init(iwl_init);
3432
3433 #ifdef CONFIG_IWLWIFI_DEBUG
3434 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
3435 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
3436 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
3437 MODULE_PARM_DESC(debug, "debug output mask");
3438 #endif
3439