SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/net/wireless/iwlwifi/iwl-agn.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
   4  *
   5  * Portions of this file are derived from the ipw3945 project, as well
   6  * as portions of the ieee80211 subsystem header files.
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of version 2 of the GNU General Public License as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program; if not, write to the Free Software Foundation, Inc.,
  19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20  *
  21  * The full GNU General Public License is included in this distribution in the
  22  * file called LICENSE.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #include <linux/kernel.h>
  31 #include <linux/module.h>
  32 #include <linux/init.h>
  33 #include <linux/pci.h>
  34 #include <linux/dma-mapping.h>
  35 #include <linux/delay.h>
  36 #include <linux/skbuff.h>
  37 #include <linux/netdevice.h>
  38 #include <linux/wireless.h>
  39 #include <linux/firmware.h>
  40 #include <linux/etherdevice.h>
  41 #include <linux/if_arp.h>
  42
  43 #include <net/mac80211.h>
  44
  45 #include <asm/div64.h>
  46
  47 #define DRV_NAME        "iwlagn"
  48
  49 #include "iwl-eeprom.h"
  50 #include "iwl-dev.h"
  51 #include "iwl-core.h"
  52 #include "iwl-io.h"
  53 #include "iwl-helpers.h"
  54 #include "iwl-sta.h"
  55 #include "iwl-calib.h"
  56
  57
  58 /******************************************************************************
  59  *
  60  * module boiler plate
  61  *
  62  ******************************************************************************/
  63
  64 /*
  65  * module name, copyright, version, etc.
  66  */
  67 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
  68
  69 #ifdef CONFIG_IWLWIFI_DEBUG
  70 #define VD "d"
  71 #else
  72 #define VD
  73 #endif
  74
  75 #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  76 #define VS "s"
  77 #else
  78 #define VS
  79 #endif
  80
  81 #define DRV_VERSION     IWLWIFI_VERSION VD VS
  82
  83
  84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
  85 MODULE_VERSION(DRV_VERSION);
  86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  87 MODULE_LICENSE("GPL");
  88 MODULE_ALIAS("iwl4965");
  89
  90 /*************** STATION TABLE MANAGEMENT ****
  91  * mac80211 should be examined to determine if sta_info is duplicating
  92  * the functionality provided here
  93  */
  94
  95 /**************************************************************/
  96
  97 /**
  98  * iwl_commit_rxon - commit staging_rxon to hardware
  99  *
 100  * The RXON command in staging_rxon is committed to the hardware and
 101  * the active_rxon structure is updated with the new data.  This
 102  * function correctly transitions out of the RXON_ASSOC_MSK state if
 103  * a HW tune is required based on the RXON structure changes.
 104  */
 105 int iwl_commit_rxon(struct iwl_priv *priv)
 106 {
 107         /* cast away the const for active_rxon in this function */
 108         struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
 109         int ret;
 110         bool new_assoc =
 111                 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
 112
 113         if (!iwl_is_alive(priv))
 114                 return -EBUSY;
 115
 116         /* always get timestamp with Rx frame */
 117         priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
 118
 119         ret = iwl_check_rxon_cmd(priv);
 120         if (ret) {
 121                 IWL_ERR(priv, "Invalid RXON configuration.  Not committing.\n");
 122                 return -EINVAL;
 123         }
 124
 125         /*
 126          * receive commit_rxon request
 127          * abort any previous channel switch if still in process
 128          */
 129         if (priv->switch_rxon.switch_in_progress &&
 130             (priv->switch_rxon.channel != priv->staging_rxon.channel)) {
 131                 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
 132                       le16_to_cpu(priv->switch_rxon.channel));
 133                 priv->switch_rxon.switch_in_progress = false;
 134         }
 135
 136         /* If we don't need to send a full RXON, we can use
 137          * iwl_rxon_assoc_cmd which is used to reconfigure filter
 138          * and other flags for the current radio configuration. */
 139         if (!iwl_full_rxon_required(priv)) {
 140                 ret = iwl_send_rxon_assoc(priv);
 141                 if (ret) {
 142                         IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
 143                         return ret;
 144                 }
 145
 146                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 147                 iwl_print_rx_config_cmd(priv);
 148                 return 0;
 149         }
 150
 151         /* station table will be cleared */
 152         priv->assoc_station_added = 0;
 153
 154         /* If we are currently associated and the new config requires
 155          * an RXON_ASSOC and the new config wants the associated mask enabled,
 156          * we must clear the associated from the active configuration
 157          * before we apply the new config */
 158         if (iwl_is_associated(priv) && new_assoc) {
 159                 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
 160                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
 161
 162                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 163                                       sizeof(struct iwl_rxon_cmd),
 164                                       &priv->active_rxon);
 165
 166                 /* If the mask clearing failed then we set
 167                  * active_rxon back to what it was previously */
 168                 if (ret) {
 169                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
 170                         IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
 171                         return ret;
 172                 }
 173         }
 174
 175         IWL_DEBUG_INFO(priv, "Sending RXON\n"
 176                        "* with%s RXON_FILTER_ASSOC_MSK\n"
 177                        "* channel = %d\n"
 178                        "* bssid = %pM\n",
 179                        (new_assoc ? "" : "out"),
 180                        le16_to_cpu(priv->staging_rxon.channel),
 181                        priv->staging_rxon.bssid_addr);
 182
 183         iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
 184
 185         /* Apply the new configuration
 186          * RXON unassoc clears the station table in uCode, send it before
 187          * we add the bcast station. If assoc bit is set, we will send RXON
 188          * after having added the bcast and bssid station.
 189          */
 190         if (!new_assoc) {
 191                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 192                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 193                 if (ret) {
 194                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 195                         return ret;
 196                 }
 197                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 198         }
 199
 200         iwl_clear_stations_table(priv);
 201
 202         priv->start_calib = 0;
 203
 204         /* Add the broadcast address so we can send broadcast frames */
 205         iwl_add_bcast_station(priv);
 206
 207         /* If we have set the ASSOC_MSK and we are in BSS mode then
 208          * add the IWL_AP_ID to the station rate table */
 209         if (new_assoc) {
 210                 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
 211                         ret = iwl_rxon_add_station(priv,
 212                                            priv->active_rxon.bssid_addr, 1);
 213                         if (ret == IWL_INVALID_STATION) {
 214                                 IWL_ERR(priv,
 215                                         "Error adding AP address for TX.\n");
 216                                 return -EIO;
 217                         }
 218                         priv->assoc_station_added = 1;
 219                         if (priv->default_wep_key &&
 220                             iwl_send_static_wepkey_cmd(priv, 0))
 221                                 IWL_ERR(priv,
 222                                         "Could not send WEP static key.\n");
 223                 }
 224
 225                 /*
 226                  * allow CTS-to-self if possible for new association.
 227                  * this is relevant only for 5000 series and up,
 228                  * but will not damage 4965
 229                  */
 230                 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
 231
 232                 /* Apply the new configuration
 233                  * RXON assoc doesn't clear the station table in uCode,
 234                  */
 235                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 236                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 237                 if (ret) {
 238                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 239                         return ret;
 240                 }
 241                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 242         }
 243         iwl_print_rx_config_cmd(priv);
 244
 245         iwl_init_sensitivity(priv);
 246
 247         /* If we issue a new RXON command which required a tune then we must
 248          * send a new TXPOWER command or we won't be able to Tx any frames */
 249         ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
 250         if (ret) {
 251                 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
 252                 return ret;
 253         }
 254
 255         return 0;
 256 }
 257
 258 void iwl_update_chain_flags(struct iwl_priv *priv)
 259 {
 260
 261         if (priv->cfg->ops->hcmd->set_rxon_chain)
 262                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
 263         iwlcore_commit_rxon(priv);
 264 }
 265
 266 static void iwl_clear_free_frames(struct iwl_priv *priv)
 267 {
 268         struct list_head *element;
 269
 270         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
 271                        priv->frames_count);
 272
 273         while (!list_empty(&priv->free_frames)) {
 274                 element = priv->free_frames.next;
 275                 list_del(element);
 276                 kfree(list_entry(element, struct iwl_frame, list));
 277                 priv->frames_count--;
 278         }
 279
 280         if (priv->frames_count) {
 281                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
 282                             priv->frames_count);
 283                 priv->frames_count = 0;
 284         }
 285 }
 286
 287 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
 288 {
 289         struct iwl_frame *frame;
 290         struct list_head *element;
 291         if (list_empty(&priv->free_frames)) {
 292                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
 293                 if (!frame) {
 294                         IWL_ERR(priv, "Could not allocate frame!\n");
 295                         return NULL;
 296                 }
 297
 298                 priv->frames_count++;
 299                 return frame;
 300         }
 301
 302         element = priv->free_frames.next;
 303         list_del(element);
 304         return list_entry(element, struct iwl_frame, list);
 305 }
 306
 307 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
 308 {
 309         memset(frame, 0, sizeof(*frame));
 310         list_add(&frame->list, &priv->free_frames);
 311 }
 312
 313 static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
 314                                           struct ieee80211_hdr *hdr,
 315                                           int left)
 316 {
 317         if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
 318             ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
 319              (priv->iw_mode != NL80211_IFTYPE_AP)))
 320                 return 0;
 321
 322         if (priv->ibss_beacon->len > left)
 323                 return 0;
 324
 325         memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
 326
 327         return priv->ibss_beacon->len;
 328 }
 329
 330 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
 331                                        struct iwl_frame *frame, u8 rate)
 332 {
 333         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
 334         unsigned int frame_size;
 335
 336         tx_beacon_cmd = &frame->u.beacon;
 337         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
 338
 339         tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
 340         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
 341
 342         frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
 343                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
 344
 345         BUG_ON(frame_size > MAX_MPDU_SIZE);
 346         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
 347
 348         if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
 349                 tx_beacon_cmd->tx.rate_n_flags =
 350                         iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
 351         else
 352                 tx_beacon_cmd->tx.rate_n_flags =
 353                         iwl_hw_set_rate_n_flags(rate, 0);
 354
 355         tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
 356                                      TX_CMD_FLG_TSF_MSK |
 357                                      TX_CMD_FLG_STA_RATE_MSK;
 358
 359         return sizeof(*tx_beacon_cmd) + frame_size;
 360 }
 361 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
 362 {
 363         struct iwl_frame *frame;
 364         unsigned int frame_size;
 365         int rc;
 366         u8 rate;
 367
 368         frame = iwl_get_free_frame(priv);
 369
 370         if (!frame) {
 371                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
 372                           "command.\n");
 373                 return -ENOMEM;
 374         }
 375
 376         rate = iwl_rate_get_lowest_plcp(priv);
 377
 378         frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate);
 379
 380         rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
 381                               &frame->u.cmd[0]);
 382
 383         iwl_free_frame(priv, frame);
 384
 385         return rc;
 386 }
 387
 388 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
 389 {
 390         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 391
 392         dma_addr_t addr = get_unaligned_le32(&tb->lo);
 393         if (sizeof(dma_addr_t) > sizeof(u32))
 394                 addr |=
 395                 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
 396
 397         return addr;
 398 }
 399
 400 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
 401 {
 402         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 403
 404         return le16_to_cpu(tb->hi_n_len) >> 4;
 405 }
 406
 407 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
 408                                   dma_addr_t addr, u16 len)
 409 {
 410         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 411         u16 hi_n_len = len << 4;
 412
 413         put_unaligned_le32(addr, &tb->lo);
 414         if (sizeof(dma_addr_t) > sizeof(u32))
 415                 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
 416
 417         tb->hi_n_len = cpu_to_le16(hi_n_len);
 418
 419         tfd->num_tbs = idx + 1;
 420 }
 421
 422 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
 423 {
 424         return tfd->num_tbs & 0x1f;
 425 }
 426
 427 /**
 428  * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
 429  * @priv - driver private data
 430  * @txq - tx queue
 431  *
 432  * Does NOT advance any TFD circular buffer read/write indexes
 433  * Does NOT free the TFD itself (which is within circular buffer)
 434  */
 435 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
 436 {
 437         struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
 438         struct iwl_tfd *tfd;
 439         struct pci_dev *dev = priv->pci_dev;
 440         int index = txq->q.read_ptr;
 441         int i;
 442         int num_tbs;
 443
 444         tfd = &tfd_tmp[index];
 445
 446         /* Sanity check on number of chunks */
 447         num_tbs = iwl_tfd_get_num_tbs(tfd);
 448
 449         if (num_tbs >= IWL_NUM_OF_TBS) {
 450                 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
 451                 /* @todo issue fatal error, it is quite serious situation */
 452                 return;
 453         }
 454
 455         /* Unmap tx_cmd */
 456         if (num_tbs)
 457                 pci_unmap_single(dev,
 458                                 pci_unmap_addr(&txq->meta[index], mapping),
 459                                 pci_unmap_len(&txq->meta[index], len),
 460                                 PCI_DMA_BIDIRECTIONAL);
 461
 462         /* Unmap chunks, if any. */
 463         for (i = 1; i < num_tbs; i++) {
 464                 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
 465                                 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
 466
 467                 if (txq->txb) {
 468                         dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
 469                         txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
 470                 }
 471         }
 472 }
 473
 474 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
 475                                  struct iwl_tx_queue *txq,
 476                                  dma_addr_t addr, u16 len,
 477                                  u8 reset, u8 pad)
 478 {
 479         struct iwl_queue *q;
 480         struct iwl_tfd *tfd, *tfd_tmp;
 481         u32 num_tbs;
 482
 483         q = &txq->q;
 484         tfd_tmp = (struct iwl_tfd *)txq->tfds;
 485         tfd = &tfd_tmp[q->write_ptr];
 486
 487         if (reset)
 488                 memset(tfd, 0, sizeof(*tfd));
 489
 490         num_tbs = iwl_tfd_get_num_tbs(tfd);
 491
 492         /* Each TFD can point to a maximum 20 Tx buffers */
 493         if (num_tbs >= IWL_NUM_OF_TBS) {
 494                 IWL_ERR(priv, "Error can not send more than %d chunks\n",
 495                           IWL_NUM_OF_TBS);
 496                 return -EINVAL;
 497         }
 498
 499         BUG_ON(addr & ~DMA_BIT_MASK(36));
 500         if (unlikely(addr & ~IWL_TX_DMA_MASK))
 501                 IWL_ERR(priv, "Unaligned address = %llx\n",
 502                           (unsigned long long)addr);
 503
 504         iwl_tfd_set_tb(tfd, num_tbs, addr, len);
 505
 506         return 0;
 507 }
 508
 509 /*
 510  * Tell nic where to find circular buffer of Tx Frame Descriptors for
 511  * given Tx queue, and enable the DMA channel used for that queue.
 512  *
 513  * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
 514  * channels supported in hardware.
 515  */
 516 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
 517                          struct iwl_tx_queue *txq)
 518 {
 519         int txq_id = txq->q.id;
 520
 521         /* Circular buffer (TFD queue in DRAM) physical base address */
 522         iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
 523                              txq->q.dma_addr >> 8);
 524
 525         return 0;
 526 }
 527
 528 /******************************************************************************
 529  *
 530  * Generic RX handler implementations
 531  *
 532  ******************************************************************************/
 533 static void iwl_rx_reply_alive(struct iwl_priv *priv,
 534                                 struct iwl_rx_mem_buffer *rxb)
 535 {
 536         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 537         struct iwl_alive_resp *palive;
 538         struct delayed_work *pwork;
 539
 540         palive = &pkt->u.alive_frame;
 541
 542         IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
 543                        "0x%01X 0x%01X\n",
 544                        palive->is_valid, palive->ver_type,
 545                        palive->ver_subtype);
 546
 547         if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
 548                 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
 549                 memcpy(&priv->card_alive_init,
 550                        &pkt->u.alive_frame,
 551                        sizeof(struct iwl_init_alive_resp));
 552                 pwork = &priv->init_alive_start;
 553         } else {
 554                 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
 555                 memcpy(&priv->card_alive, &pkt->u.alive_frame,
 556                        sizeof(struct iwl_alive_resp));
 557                 pwork = &priv->alive_start;
 558         }
 559
 560         /* We delay the ALIVE response by 5ms to
 561          * give the HW RF Kill time to activate... */
 562         if (palive->is_valid == UCODE_VALID_OK)
 563                 queue_delayed_work(priv->workqueue, pwork,
 564                                    msecs_to_jiffies(5));
 565         else
 566                 IWL_WARN(priv, "uCode did not respond OK.\n");
 567 }
 568
 569 static void iwl_bg_beacon_update(struct work_struct *work)
 570 {
 571         struct iwl_priv *priv =
 572                 container_of(work, struct iwl_priv, beacon_update);
 573         struct sk_buff *beacon;
 574
 575         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
 576         beacon = ieee80211_beacon_get(priv->hw, priv->vif);
 577
 578         if (!beacon) {
 579                 IWL_ERR(priv, "update beacon failed\n");
 580                 return;
 581         }
 582
 583         mutex_lock(&priv->mutex);
 584         /* new beacon skb is allocated every time; dispose previous.*/
 585         if (priv->ibss_beacon)
 586                 dev_kfree_skb(priv->ibss_beacon);
 587
 588         priv->ibss_beacon = beacon;
 589         mutex_unlock(&priv->mutex);
 590
 591         iwl_send_beacon_cmd(priv);
 592 }
 593
 594 /**
 595  * iwl_bg_statistics_periodic - Timer callback to queue statistics
 596  *
 597  * This callback is provided in order to send a statistics request.
 598  *
 599  * This timer function is continually reset to execute within
 600  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
 601  * was received.  We need to ensure we receive the statistics in order
 602  * to update the temperature used for calibrating the TXPOWER.
 603  */
 604 static void iwl_bg_statistics_periodic(unsigned long data)
 605 {
 606         struct iwl_priv *priv = (struct iwl_priv *)data;
 607
 608         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 609                 return;
 610
 611         /* dont send host command if rf-kill is on */
 612         if (!iwl_is_ready_rf(priv))
 613                 return;
 614
 615         iwl_send_statistics_request(priv, CMD_ASYNC);
 616 }
 617
 618 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
 619                                 struct iwl_rx_mem_buffer *rxb)
 620 {
 621 #ifdef CONFIG_IWLWIFI_DEBUG
 622         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 623         struct iwl4965_beacon_notif *beacon =
 624                 (struct iwl4965_beacon_notif *)pkt->u.raw;
 625         u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
 626
 627         IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
 628                 "tsf %d %d rate %d\n",
 629                 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
 630                 beacon->beacon_notify_hdr.failure_frame,
 631                 le32_to_cpu(beacon->ibss_mgr_status),
 632                 le32_to_cpu(beacon->high_tsf),
 633                 le32_to_cpu(beacon->low_tsf), rate);
 634 #endif
 635
 636         if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
 637             (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
 638                 queue_work(priv->workqueue, &priv->beacon_update);
 639 }
 640
 641 /* Handle notification from uCode that card's power state is changing
 642  * due to software, hardware, or critical temperature RFKILL */
 643 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
 644                                     struct iwl_rx_mem_buffer *rxb)
 645 {
 646         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 647         u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
 648         unsigned long status = priv->status;
 649
 650         IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
 651                           (flags & HW_CARD_DISABLED) ? "Kill" : "On",
 652                           (flags & SW_CARD_DISABLED) ? "Kill" : "On");
 653
 654         if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
 655                      RF_CARD_DISABLED)) {
 656
 657                 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
 658                             CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 659
 660                 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 661                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 662
 663                 if (!(flags & RXON_CARD_DISABLED)) {
 664                         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
 665                                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 666                         iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 667                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 668                 }
 669                 if (flags & RF_CARD_DISABLED)
 670                         iwl_tt_enter_ct_kill(priv);
 671         }
 672         if (!(flags & RF_CARD_DISABLED))
 673                 iwl_tt_exit_ct_kill(priv);
 674
 675         if (flags & HW_CARD_DISABLED)
 676                 set_bit(STATUS_RF_KILL_HW, &priv->status);
 677         else
 678                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
 679
 680
 681         if (!(flags & RXON_CARD_DISABLED))
 682                 iwl_scan_cancel(priv);
 683
 684         if ((test_bit(STATUS_RF_KILL_HW, &status) !=
 685              test_bit(STATUS_RF_KILL_HW, &priv->status)))
 686                 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
 687                         test_bit(STATUS_RF_KILL_HW, &priv->status));
 688         else
 689                 wake_up_interruptible(&priv->wait_command_queue);
 690 }
 691
 692 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
 693 {
 694         if (src == IWL_PWR_SRC_VAUX) {
 695                 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
 696                         iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 697                                                APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 698                                                ~APMG_PS_CTRL_MSK_PWR_SRC);
 699         } else {
 700                 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 701                                        APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 702                                        ~APMG_PS_CTRL_MSK_PWR_SRC);
 703         }
 704
 705         return 0;
 706 }
 707
 708 /**
 709  * iwl_setup_rx_handlers - Initialize Rx handler callbacks
 710  *
 711  * Setup the RX handlers for each of the reply types sent from the uCode
 712  * to the host.
 713  *
 714  * This function chains into the hardware specific files for them to setup
 715  * any hardware specific handlers as well.
 716  */
 717 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
 718 {
 719         priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
 720         priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
 721         priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
 722         priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
 723         priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
 724             iwl_rx_pm_debug_statistics_notif;
 725         priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
 726
 727         /*
 728          * The same handler is used for both the REPLY to a discrete
 729          * statistics request from the host as well as for the periodic
 730          * statistics notifications (after received beacons) from the uCode.
 731          */
 732         priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics;
 733         priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
 734
 735         iwl_setup_spectrum_handlers(priv);
 736         iwl_setup_rx_scan_handlers(priv);
 737
 738         /* status change handler */
 739         priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
 740
 741         priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
 742             iwl_rx_missed_beacon_notif;
 743         /* Rx handlers */
 744         priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
 745         priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
 746         /* block ack */
 747         priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
 748         /* Set up hardware specific Rx handlers */
 749         priv->cfg->ops->lib->rx_handler_setup(priv);
 750 }
 751
 752 /**
 753  * iwl_rx_handle - Main entry function for receiving responses from uCode
 754  *
 755  * Uses the priv->rx_handlers callback function array to invoke
 756  * the appropriate handlers, including command responses,
 757  * frame-received notifications, and other notifications.
 758  */
 759 void iwl_rx_handle(struct iwl_priv *priv)
 760 {
 761         struct iwl_rx_mem_buffer *rxb;
 762         struct iwl_rx_packet *pkt;
 763         struct iwl_rx_queue *rxq = &priv->rxq;
 764         u32 r, i;
 765         int reclaim;
 766         unsigned long flags;
 767         u8 fill_rx = 0;
 768         u32 count = 8;
 769         int total_empty;
 770
 771         /* uCode's read index (stored in shared DRAM) indicates the last Rx
 772          * buffer that the driver may process (last buffer filled by ucode). */
 773         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
 774         i = rxq->read;
 775
 776         /* Rx interrupt, but nothing sent from uCode */
 777         if (i == r)
 778                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
 779
 780         /* calculate total frames need to be restock after handling RX */
 781         total_empty = r - rxq->write_actual;
 782         if (total_empty < 0)
 783                 total_empty += RX_QUEUE_SIZE;
 784
 785         if (total_empty > (RX_QUEUE_SIZE / 2))
 786                 fill_rx = 1;
 787
 788         while (i != r) {
 789                 rxb = rxq->queue[i];
 790
 791                 /* If an RXB doesn't have a Rx queue slot associated with it,
 792                  * then a bug has been introduced in the queue refilling
 793                  * routines -- catch it here */
 794                 BUG_ON(rxb == NULL);
 795
 796                 rxq->queue[i] = NULL;
 797
 798                 pci_unmap_page(priv->pci_dev, rxb->page_dma,
 799                                PAGE_SIZE << priv->hw_params.rx_page_order,
 800                                PCI_DMA_FROMDEVICE);
 801                 pkt = rxb_addr(rxb);
 802
 803                 trace_iwlwifi_dev_rx(priv, pkt,
 804                         le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
 805
 806                 /* Reclaim a command buffer only if this packet is a response
 807                  *   to a (driver-originated) command.
 808                  * If the packet (e.g. Rx frame) originated from uCode,
 809                  *   there is no command buffer to reclaim.
 810                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
 811                  *   but apparently a few don't get set; catch them here. */
 812                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
 813                         (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
 814                         (pkt->hdr.cmd != REPLY_RX) &&
 815                         (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
 816                         (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
 817                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
 818                         (pkt->hdr.cmd != REPLY_TX);
 819
 820                 /* Based on type of command response or notification,
 821                  *   handle those that need handling via function in
 822                  *   rx_handlers table.  See iwl_setup_rx_handlers() */
 823                 if (priv->rx_handlers[pkt->hdr.cmd]) {
 824                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
 825                                 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
 826                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
 827                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
 828                 } else {
 829                         /* No handling needed */
 830                         IWL_DEBUG_RX(priv,
 831                                 "r %d i %d No handler needed for %s, 0x%02x\n",
 832                                 r, i, get_cmd_string(pkt->hdr.cmd),
 833                                 pkt->hdr.cmd);
 834                 }
 835
 836                 /*
 837                  * XXX: After here, we should always check rxb->page
 838                  * against NULL before touching it or its virtual
 839                  * memory (pkt). Because some rx_handler might have
 840                  * already taken or freed the pages.
 841                  */
 842
 843                 if (reclaim) {
 844                         /* Invoke any callbacks, transfer the buffer to caller,
 845                          * and fire off the (possibly) blocking iwl_send_cmd()
 846                          * as we reclaim the driver command queue */
 847                         if (rxb->page)
 848                                 iwl_tx_cmd_complete(priv, rxb);
 849                         else
 850                                 IWL_WARN(priv, "Claim null rxb?\n");
 851                 }
 852
 853                 /* Reuse the page if possible. For notification packets and
 854                  * SKBs that fail to Rx correctly, add them back into the
 855                  * rx_free list for reuse later. */
 856                 spin_lock_irqsave(&rxq->lock, flags);
 857                 if (rxb->page != NULL) {
 858                         rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
 859                                 0, PAGE_SIZE << priv->hw_params.rx_page_order,
 860                                 PCI_DMA_FROMDEVICE);
 861                         list_add_tail(&rxb->list, &rxq->rx_free);
 862                         rxq->free_count++;
 863                 } else
 864                         list_add_tail(&rxb->list, &rxq->rx_used);
 865
 866                 spin_unlock_irqrestore(&rxq->lock, flags);
 867
 868                 i = (i + 1) & RX_QUEUE_MASK;
 869                 /* If there are a lot of unused frames,
 870                  * restock the Rx queue so ucode wont assert. */
 871                 if (fill_rx) {
 872                         count++;
 873                         if (count >= 8) {
 874                                 rxq->read = i;
 875                                 iwl_rx_replenish_now(priv);
 876                                 count = 0;
 877                         }
 878                 }
 879         }
 880
 881         /* Backtrack one entry */
 882         rxq->read = i;
 883         if (fill_rx)
 884                 iwl_rx_replenish_now(priv);
 885         else
 886                 iwl_rx_queue_restock(priv);
 887 }
 888
 889 /* call this function to flush any scheduled tasklet */
 890 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
 891 {
 892         /* wait to make sure we flush pending tasklet*/
 893         synchronize_irq(priv->pci_dev->irq);
 894         tasklet_kill(&priv->irq_tasklet);
 895 }
 896
 897 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
 898 {
 899         u32 inta, handled = 0;
 900         u32 inta_fh;
 901         unsigned long flags;
 902         u32 i;
 903 #ifdef CONFIG_IWLWIFI_DEBUG
 904         u32 inta_mask;
 905 #endif
 906
 907         spin_lock_irqsave(&priv->lock, flags);
 908
 909         /* Ack/clear/reset pending uCode interrupts.
 910          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
 911          *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
 912         inta = iwl_read32(priv, CSR_INT);
 913         iwl_write32(priv, CSR_INT, inta);
 914
 915         /* Ack/clear/reset pending flow-handler (DMA) interrupts.
 916          * Any new interrupts that happen after this, either while we're
 917          * in this tasklet, or later, will show up in next ISR/tasklet. */
 918         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
 919         iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
 920
 921 #ifdef CONFIG_IWLWIFI_DEBUG
 922         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
 923                 /* just for debug */
 924                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
 925                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
 926                               inta, inta_mask, inta_fh);
 927         }
 928 #endif
 929
 930         spin_unlock_irqrestore(&priv->lock, flags);
 931
 932         /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
 933          * atomic, make sure that inta covers all the interrupts that
 934          * we've discovered, even if FH interrupt came in just after
 935          * reading CSR_INT. */
 936         if (inta_fh & CSR49_FH_INT_RX_MASK)
 937                 inta |= CSR_INT_BIT_FH_RX;
 938         if (inta_fh & CSR49_FH_INT_TX_MASK)
 939                 inta |= CSR_INT_BIT_FH_TX;
 940
 941         /* Now service all interrupt bits discovered above. */
 942         if (inta & CSR_INT_BIT_HW_ERR) {
 943                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
 944
 945                 /* Tell the device to stop sending interrupts */
 946                 iwl_disable_interrupts(priv);
 947
 948                 priv->isr_stats.hw++;
 949                 iwl_irq_handle_error(priv);
 950
 951                 handled |= CSR_INT_BIT_HW_ERR;
 952
 953                 return;
 954         }
 955
 956 #ifdef CONFIG_IWLWIFI_DEBUG
 957         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
 958                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
 959                 if (inta & CSR_INT_BIT_SCD) {
 960                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
 961                                       "the frame/frames.\n");
 962                         priv->isr_stats.sch++;
 963                 }
 964
 965                 /* Alive notification via Rx interrupt will do the real work */
 966                 if (inta & CSR_INT_BIT_ALIVE) {
 967                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
 968                         priv->isr_stats.alive++;
 969                 }
 970         }
 971 #endif
 972         /* Safely ignore these bits for debug checks below */
 973         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
 974
 975         /* HW RF KILL switch toggled */
 976         if (inta & CSR_INT_BIT_RF_KILL) {
 977                 int hw_rf_kill = 0;
 978                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
 979                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
 980                         hw_rf_kill = 1;
 981
 982                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
 983                                 hw_rf_kill ? "disable radio" : "enable radio");
 984
 985                 priv->isr_stats.rfkill++;
 986
 987                 /* driver only loads ucode once setting the interface up.
 988                  * the driver allows loading the ucode even if the radio
 989                  * is killed. Hence update the killswitch state here. The
 990                  * rfkill handler will care about restarting if needed.
 991                  */
 992                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
 993                         if (hw_rf_kill)
 994                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
 995                         else
 996                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
 997                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
 998                 }
 999
1000                 handled |= CSR_INT_BIT_RF_KILL;
1001         }
1002
1003         /* Chip got too hot and stopped itself */
1004         if (inta & CSR_INT_BIT_CT_KILL) {
1005                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1006                 priv->isr_stats.ctkill++;
1007                 handled |= CSR_INT_BIT_CT_KILL;
1008         }
1009
1010         /* Error detected by uCode */
1011         if (inta & CSR_INT_BIT_SW_ERR) {
1012                 IWL_ERR(priv, "Microcode SW error detected. "
1013                         " Restarting 0x%X.\n", inta);
1014                 priv->isr_stats.sw++;
1015                 priv->isr_stats.sw_err = inta;
1016                 iwl_irq_handle_error(priv);
1017                 handled |= CSR_INT_BIT_SW_ERR;
1018         }
1019
1020         /*
1021          * uCode wakes up after power-down sleep.
1022          * Tell device about any new tx or host commands enqueued,
1023          * and about any Rx buffers made available while asleep.
1024          */
1025         if (inta & CSR_INT_BIT_WAKEUP) {
1026                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1027                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1028                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1029                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1030                 priv->isr_stats.wakeup++;
1031                 handled |= CSR_INT_BIT_WAKEUP;
1032         }
1033
1034         /* All uCode command responses, including Tx command responses,
1035          * Rx "responses" (frame-received notification), and other
1036          * notifications from uCode come through here*/
1037         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1038                 iwl_rx_handle(priv);
1039                 priv->isr_stats.rx++;
1040                 iwl_leds_background(priv);
1041                 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1042         }
1043
1044         /* This "Tx" DMA channel is used only for loading uCode */
1045         if (inta & CSR_INT_BIT_FH_TX) {
1046                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1047                 priv->isr_stats.tx++;
1048                 handled |= CSR_INT_BIT_FH_TX;
1049                 /* Wake up uCode load routine, now that load is complete */
1050                 priv->ucode_write_complete = 1;
1051                 wake_up_interruptible(&priv->wait_command_queue);
1052         }
1053
1054         if (inta & ~handled) {
1055                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1056                 priv->isr_stats.unhandled++;
1057         }
1058
1059         if (inta & ~(priv->inta_mask)) {
1060                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1061                          inta & ~priv->inta_mask);
1062                 IWL_WARN(priv, "   with FH_INT = 0x%08x\n", inta_fh);
1063         }
1064
1065         /* Re-enable all interrupts */
1066         /* only Re-enable if diabled by irq */
1067         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1068                 iwl_enable_interrupts(priv);
1069
1070 #ifdef CONFIG_IWLWIFI_DEBUG
1071         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1072                 inta = iwl_read32(priv, CSR_INT);
1073                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1074                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1075                 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1076                         "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1077         }
1078 #endif
1079 }
1080
1081 /* tasklet for iwlagn interrupt */
1082 static void iwl_irq_tasklet(struct iwl_priv *priv)
1083 {
1084         u32 inta = 0;
1085         u32 handled = 0;
1086         unsigned long flags;
1087 #ifdef CONFIG_IWLWIFI_DEBUG
1088         u32 inta_mask;
1089 #endif
1090
1091         spin_lock_irqsave(&priv->lock, flags);
1092
1093         /* Ack/clear/reset pending uCode interrupts.
1094          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1095          */
1096         iwl_write32(priv, CSR_INT, priv->inta);
1097
1098         inta = priv->inta;
1099
1100 #ifdef CONFIG_IWLWIFI_DEBUG
1101         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1102                 /* just for debug */
1103                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1104                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1105                                 inta, inta_mask);
1106         }
1107 #endif
1108
1109         spin_unlock_irqrestore(&priv->lock, flags);
1110
1111         /* saved interrupt in inta variable now we can reset priv->inta */
1112         priv->inta = 0;
1113
1114         /* Now service all interrupt bits discovered above. */
1115         if (inta & CSR_INT_BIT_HW_ERR) {
1116                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1117
1118                 /* Tell the device to stop sending interrupts */
1119                 iwl_disable_interrupts(priv);
1120
1121                 priv->isr_stats.hw++;
1122                 iwl_irq_handle_error(priv);
1123
1124                 handled |= CSR_INT_BIT_HW_ERR;
1125
1126                 return;
1127         }
1128
1129 #ifdef CONFIG_IWLWIFI_DEBUG
1130         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1131                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1132                 if (inta & CSR_INT_BIT_SCD) {
1133                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1134                                       "the frame/frames.\n");
1135                         priv->isr_stats.sch++;
1136                 }
1137
1138                 /* Alive notification via Rx interrupt will do the real work */
1139                 if (inta & CSR_INT_BIT_ALIVE) {
1140                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1141                         priv->isr_stats.alive++;
1142                 }
1143         }
1144 #endif
1145         /* Safely ignore these bits for debug checks below */
1146         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1147
1148         /* HW RF KILL switch toggled */
1149         if (inta & CSR_INT_BIT_RF_KILL) {
1150                 int hw_rf_kill = 0;
1151                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1152                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1153                         hw_rf_kill = 1;
1154
1155                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1156                                 hw_rf_kill ? "disable radio" : "enable radio");
1157
1158                 priv->isr_stats.rfkill++;
1159
1160                 /* driver only loads ucode once setting the interface up.
1161                  * the driver allows loading the ucode even if the radio
1162                  * is killed. Hence update the killswitch state here. The
1163                  * rfkill handler will care about restarting if needed.
1164                  */
1165                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1166                         if (hw_rf_kill)
1167                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1168                         else
1169                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1170                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1171                 }
1172
1173                 handled |= CSR_INT_BIT_RF_KILL;
1174         }
1175
1176         /* Chip got too hot and stopped itself */
1177         if (inta & CSR_INT_BIT_CT_KILL) {
1178                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1179                 priv->isr_stats.ctkill++;
1180                 handled |= CSR_INT_BIT_CT_KILL;
1181         }
1182
1183         /* Error detected by uCode */
1184         if (inta & CSR_INT_BIT_SW_ERR) {
1185                 IWL_ERR(priv, "Microcode SW error detected. "
1186                         " Restarting 0x%X.\n", inta);
1187                 priv->isr_stats.sw++;
1188                 priv->isr_stats.sw_err = inta;
1189                 iwl_irq_handle_error(priv);
1190                 handled |= CSR_INT_BIT_SW_ERR;
1191         }
1192
1193         /* uCode wakes up after power-down sleep */
1194         if (inta & CSR_INT_BIT_WAKEUP) {
1195                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1196                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1197                 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1198                 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1199                 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1200                 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1201                 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1202                 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1203
1204                 priv->isr_stats.wakeup++;
1205
1206                 handled |= CSR_INT_BIT_WAKEUP;
1207         }
1208
1209         /* All uCode command responses, including Tx command responses,
1210          * Rx "responses" (frame-received notification), and other
1211          * notifications from uCode come through here*/
1212         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1213                         CSR_INT_BIT_RX_PERIODIC)) {
1214                 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1215                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1216                         handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1217                         iwl_write32(priv, CSR_FH_INT_STATUS,
1218                                         CSR49_FH_INT_RX_MASK);
1219                 }
1220                 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1221                         handled |= CSR_INT_BIT_RX_PERIODIC;
1222                         iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1223                 }
1224                 /* Sending RX interrupt require many steps to be done in the
1225                  * the device:
1226                  * 1- write interrupt to current index in ICT table.
1227                  * 2- dma RX frame.
1228                  * 3- update RX shared data to indicate last write index.
1229                  * 4- send interrupt.
1230                  * This could lead to RX race, driver could receive RX interrupt
1231                  * but the shared data changes does not reflect this.
1232                  * this could lead to RX race, RX periodic will solve this race
1233                  */
1234                 iwl_write32(priv, CSR_INT_PERIODIC_REG,
1235                             CSR_INT_PERIODIC_DIS);
1236                 iwl_rx_handle(priv);
1237                 /* Only set RX periodic if real RX is received. */
1238                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1239                         iwl_write32(priv, CSR_INT_PERIODIC_REG,
1240                                     CSR_INT_PERIODIC_ENA);
1241
1242                 priv->isr_stats.rx++;
1243                 iwl_leds_background(priv);
1244         }
1245
1246         /* This "Tx" DMA channel is used only for loading uCode */
1247         if (inta & CSR_INT_BIT_FH_TX) {
1248                 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1249                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1250                 priv->isr_stats.tx++;
1251                 handled |= CSR_INT_BIT_FH_TX;
1252                 /* Wake up uCode load routine, now that load is complete */
1253                 priv->ucode_write_complete = 1;
1254                 wake_up_interruptible(&priv->wait_command_queue);
1255         }
1256
1257         if (inta & ~handled) {
1258                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1259                 priv->isr_stats.unhandled++;
1260         }
1261
1262         if (inta & ~(priv->inta_mask)) {
1263                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1264                          inta & ~priv->inta_mask);
1265         }
1266
1267         /* Re-enable all interrupts */
1268         /* only Re-enable if diabled by irq */
1269         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1270                 iwl_enable_interrupts(priv);
1271 }
1272
1273
1274 /******************************************************************************
1275  *
1276  * uCode download functions
1277  *
1278  ******************************************************************************/
1279
1280 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1281 {
1282         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1283         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1284         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1285         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1286         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1287         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1288 }
1289
1290 static void iwl_nic_start(struct iwl_priv *priv)
1291 {
1292         /* Remove all resets to allow NIC to operate */
1293         iwl_write32(priv, CSR_RESET, 0);
1294 }
1295
1296
1297 /**
1298  * iwl_read_ucode - Read uCode images from disk file.
1299  *
1300  * Copy into buffers for card to fetch via bus-mastering
1301  */
1302 static int iwl_read_ucode(struct iwl_priv *priv)
1303 {
1304         struct iwl_ucode_header *ucode;
1305         int ret = -EINVAL, index;
1306         const struct firmware *ucode_raw;
1307         const char *name_pre = priv->cfg->fw_name_pre;
1308         const unsigned int api_max = priv->cfg->ucode_api_max;
1309         const unsigned int api_min = priv->cfg->ucode_api_min;
1310         char buf[25];
1311         u8 *src;
1312         size_t len;
1313         u32 api_ver, build;
1314         u32 inst_size, data_size, init_size, init_data_size, boot_size;
1315         u16 eeprom_ver;
1316
1317         /* Ask kernel firmware_class module to get the boot firmware off disk.
1318          * request_firmware() is synchronous, file is in memory on return. */
1319         for (index = api_max; index >= api_min; index--) {
1320                 sprintf(buf, "%s%d%s", name_pre, index, ".ucode");
1321                 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
1322                 if (ret < 0) {
1323                         IWL_ERR(priv, "%s firmware file req failed: %d\n",
1324                                   buf, ret);
1325                         if (ret == -ENOENT)
1326                                 continue;
1327                         else
1328                                 goto error;
1329                 } else {
1330                         if (index < api_max)
1331                                 IWL_ERR(priv, "Loaded firmware %s, "
1332                                         "which is deprecated. "
1333                                         "Please use API v%u instead.\n",
1334                                           buf, api_max);
1335
1336                         IWL_DEBUG_INFO(priv, "Got firmware '%s' file (%zd bytes) from disk\n",
1337                                        buf, ucode_raw->size);
1338                         break;
1339                 }
1340         }
1341
1342         if (ret < 0)
1343                 goto error;
1344
1345         /* Make sure that we got at least the v1 header! */
1346         if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
1347                 IWL_ERR(priv, "File size way too small!\n");
1348                 ret = -EINVAL;
1349                 goto err_release;
1350         }
1351
1352         /* Data from ucode file:  header followed by uCode images */
1353         ucode = (struct iwl_ucode_header *)ucode_raw->data;
1354
1355         priv->ucode_ver = le32_to_cpu(ucode->ver);
1356         api_ver = IWL_UCODE_API(priv->ucode_ver);
1357         build = priv->cfg->ops->ucode->get_build(ucode, api_ver);
1358         inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
1359         data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
1360         init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
1361         init_data_size =
1362                 priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
1363         boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
1364         src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
1365
1366         /* api_ver should match the api version forming part of the
1367          * firmware filename ... but we don't check for that and only rely
1368          * on the API version read from firmware header from here on forward */
1369
1370         if (api_ver < api_min || api_ver > api_max) {
1371                 IWL_ERR(priv, "Driver unable to support your firmware API. "
1372                           "Driver supports v%u, firmware is v%u.\n",
1373                           api_max, api_ver);
1374                 priv->ucode_ver = 0;
1375                 ret = -EINVAL;
1376                 goto err_release;
1377         }
1378         if (api_ver != api_max)
1379                 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1380                           "got v%u. New firmware can be obtained "
1381                           "from http://www.intellinuxwireless.org.\n",
1382                           api_max, api_ver);
1383
1384         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1385                IWL_UCODE_MAJOR(priv->ucode_ver),
1386                IWL_UCODE_MINOR(priv->ucode_ver),
1387                IWL_UCODE_API(priv->ucode_ver),
1388                IWL_UCODE_SERIAL(priv->ucode_ver));
1389
1390         snprintf(priv->hw->wiphy->fw_version,
1391                  sizeof(priv->hw->wiphy->fw_version),
1392                  "%u.%u.%u.%u",
1393                  IWL_UCODE_MAJOR(priv->ucode_ver),
1394                  IWL_UCODE_MINOR(priv->ucode_ver),
1395                  IWL_UCODE_API(priv->ucode_ver),
1396                  IWL_UCODE_SERIAL(priv->ucode_ver));
1397
1398         if (build)
1399                 IWL_DEBUG_INFO(priv, "Build %u\n", build);
1400
1401         eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
1402         IWL_DEBUG_INFO(priv, "NVM Type: %s, version: 0x%x\n",
1403                        (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
1404                        ? "OTP" : "EEPROM", eeprom_ver);
1405
1406         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1407                        priv->ucode_ver);
1408         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
1409                        inst_size);
1410         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
1411                        data_size);
1412         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
1413                        init_size);
1414         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
1415                        init_data_size);
1416         IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
1417                        boot_size);
1418
1419         /* Verify size of file vs. image size info in file's header */
1420         if (ucode_raw->size !=
1421                 priv->cfg->ops->ucode->get_header_size(api_ver) +
1422                 inst_size + data_size + init_size +
1423                 init_data_size + boot_size) {
1424
1425                 IWL_DEBUG_INFO(priv,
1426                         "uCode file size %d does not match expected size\n",
1427                         (int)ucode_raw->size);
1428                 ret = -EINVAL;
1429                 goto err_release;
1430         }
1431
1432         /* Verify that uCode images will fit in card's SRAM */
1433         if (inst_size > priv->hw_params.max_inst_size) {
1434                 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
1435                                inst_size);
1436                 ret = -EINVAL;
1437                 goto err_release;
1438         }
1439
1440         if (data_size > priv->hw_params.max_data_size) {
1441                 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
1442                                 data_size);
1443                 ret = -EINVAL;
1444                 goto err_release;
1445         }
1446         if (init_size > priv->hw_params.max_inst_size) {
1447                 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1448                         init_size);
1449                 ret = -EINVAL;
1450                 goto err_release;
1451         }
1452         if (init_data_size > priv->hw_params.max_data_size) {
1453                 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
1454                       init_data_size);
1455                 ret = -EINVAL;
1456                 goto err_release;
1457         }
1458         if (boot_size > priv->hw_params.max_bsm_size) {
1459                 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1460                         boot_size);
1461                 ret = -EINVAL;
1462                 goto err_release;
1463         }
1464
1465         /* Allocate ucode buffers for card's bus-master loading ... */
1466
1467         /* Runtime instructions and 2 copies of data:
1468          * 1) unmodified from disk
1469          * 2) backup cache for save/restore during power-downs */
1470         priv->ucode_code.len = inst_size;
1471         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1472
1473         priv->ucode_data.len = data_size;
1474         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1475
1476         priv->ucode_data_backup.len = data_size;
1477         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1478
1479         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1480             !priv->ucode_data_backup.v_addr)
1481                 goto err_pci_alloc;
1482
1483         /* Initialization instructions and data */
1484         if (init_size && init_data_size) {
1485                 priv->ucode_init.len = init_size;
1486                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1487
1488                 priv->ucode_init_data.len = init_data_size;
1489                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1490
1491                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1492                         goto err_pci_alloc;
1493         }
1494
1495         /* Bootstrap (instructions only, no data) */
1496         if (boot_size) {
1497                 priv->ucode_boot.len = boot_size;
1498                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1499
1500                 if (!priv->ucode_boot.v_addr)
1501                         goto err_pci_alloc;
1502         }
1503
1504         /* Copy images into buffers for card's bus-master reads ... */
1505
1506         /* Runtime instructions (first block of data in file) */
1507         len = inst_size;
1508         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len);
1509         memcpy(priv->ucode_code.v_addr, src, len);
1510         src += len;
1511
1512         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1513                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1514
1515         /* Runtime data (2nd block)
1516          * NOTE:  Copy into backup buffer will be done in iwl_up()  */
1517         len = data_size;
1518         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len);
1519         memcpy(priv->ucode_data.v_addr, src, len);
1520         memcpy(priv->ucode_data_backup.v_addr, src, len);
1521         src += len;
1522
1523         /* Initialization instructions (3rd block) */
1524         if (init_size) {
1525                 len = init_size;
1526                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1527                                 len);
1528                 memcpy(priv->ucode_init.v_addr, src, len);
1529                 src += len;
1530         }
1531
1532         /* Initialization data (4th block) */
1533         if (init_data_size) {
1534                 len = init_data_size;
1535                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1536                                len);
1537                 memcpy(priv->ucode_init_data.v_addr, src, len);
1538                 src += len;
1539         }
1540
1541         /* Bootstrap instructions (5th block) */
1542         len = boot_size;
1543         IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
1544         memcpy(priv->ucode_boot.v_addr, src, len);
1545
1546         /* We have our copies now, allow OS release its copies */
1547         release_firmware(ucode_raw);
1548         return 0;
1549
1550  err_pci_alloc:
1551         IWL_ERR(priv, "failed to allocate pci memory\n");
1552         ret = -ENOMEM;
1553         iwl_dealloc_ucode_pci(priv);
1554
1555  err_release:
1556         release_firmware(ucode_raw);
1557
1558  error:
1559         return ret;
1560 }
1561
1562 #ifdef CONFIG_IWLWIFI_DEBUG
1563 static const char *desc_lookup_text[] = {
1564         "OK",
1565         "FAIL",
1566         "BAD_PARAM",
1567         "BAD_CHECKSUM",
1568         "NMI_INTERRUPT_WDG",
1569         "SYSASSERT",
1570         "FATAL_ERROR",
1571         "BAD_COMMAND",
1572         "HW_ERROR_TUNE_LOCK",
1573         "HW_ERROR_TEMPERATURE",
1574         "ILLEGAL_CHAN_FREQ",
1575         "VCC_NOT_STABLE",
1576         "FH_ERROR",
1577         "NMI_INTERRUPT_HOST",
1578         "NMI_INTERRUPT_ACTION_PT",
1579         "NMI_INTERRUPT_UNKNOWN",
1580         "UCODE_VERSION_MISMATCH",
1581         "HW_ERROR_ABS_LOCK",
1582         "HW_ERROR_CAL_LOCK_FAIL",
1583         "NMI_INTERRUPT_INST_ACTION_PT",
1584         "NMI_INTERRUPT_DATA_ACTION_PT",
1585         "NMI_TRM_HW_ER",
1586         "NMI_INTERRUPT_TRM",
1587         "NMI_INTERRUPT_BREAK_POINT"
1588         "DEBUG_0",
1589         "DEBUG_1",
1590         "DEBUG_2",
1591         "DEBUG_3",
1592         "UNKNOWN"
1593 };
1594
1595 static const char *desc_lookup(int i)
1596 {
1597         int max = ARRAY_SIZE(desc_lookup_text) - 1;
1598
1599         if (i < 0 || i > max)
1600                 i = max;
1601
1602         return desc_lookup_text[i];
1603 }
1604
1605 #define ERROR_START_OFFSET  (1 * sizeof(u32))
1606 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
1607
1608 void iwl_dump_nic_error_log(struct iwl_priv *priv)
1609 {
1610         u32 data2, line;
1611         u32 desc, time, count, base, data1;
1612         u32 blink1, blink2, ilink1, ilink2;
1613
1614         if (priv->ucode_type == UCODE_INIT)
1615                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
1616         else
1617                 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1618
1619         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1620                 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
1621                 return;
1622         }
1623
1624         count = iwl_read_targ_mem(priv, base);
1625
1626         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1627                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1628                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1629                         priv->status, count);
1630         }
1631
1632         desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
1633         blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
1634         blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
1635         ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
1636         ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
1637         data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
1638         data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
1639         line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1640         time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1641
1642         trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
1643                                       blink1, blink2, ilink1, ilink2);
1644
1645         IWL_ERR(priv, "Desc                               Time       "
1646                 "data1      data2      line\n");
1647         IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
1648                 desc_lookup(desc), desc, time, data1, data2, line);
1649         IWL_ERR(priv, "blink1  blink2  ilink1  ilink2\n");
1650         IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
1651                 ilink1, ilink2);
1652
1653 }
1654
1655 #define EVENT_START_OFFSET  (4 * sizeof(u32))
1656
1657 /**
1658  * iwl_print_event_log - Dump error event log to syslog
1659  *
1660  */
1661 static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1662                                 u32 num_events, u32 mode)
1663 {
1664         u32 i;
1665         u32 base;       /* SRAM byte address of event log header */
1666         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1667         u32 ptr;        /* SRAM byte address of log data */
1668         u32 ev, time, data; /* event log data */
1669
1670         if (num_events == 0)
1671                 return;
1672         if (priv->ucode_type == UCODE_INIT)
1673                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1674         else
1675                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1676
1677         if (mode == 0)
1678                 event_size = 2 * sizeof(u32);
1679         else
1680                 event_size = 3 * sizeof(u32);
1681
1682         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1683
1684         /* "time" is actually "data" for mode 0 (no timestamp).
1685         * place event id # at far right for easier visual parsing. */
1686         for (i = 0; i < num_events; i++) {
1687                 ev = iwl_read_targ_mem(priv, ptr);
1688                 ptr += sizeof(u32);
1689                 time = iwl_read_targ_mem(priv, ptr);
1690                 ptr += sizeof(u32);
1691                 if (mode == 0) {
1692                         /* data, ev */
1693                         trace_iwlwifi_dev_ucode_event(priv, 0, time, ev);
1694                         IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n", time, ev);
1695                 } else {
1696                         data = iwl_read_targ_mem(priv, ptr);
1697                         ptr += sizeof(u32);
1698                         IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1699                                         time, data, ev);
1700                         trace_iwlwifi_dev_ucode_event(priv, time, data, ev);
1701                 }
1702         }
1703 }
1704
1705 void iwl_dump_nic_event_log(struct iwl_priv *priv)
1706 {
1707         u32 base;       /* SRAM byte address of event log header */
1708         u32 capacity;   /* event log capacity in # entries */
1709         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
1710         u32 num_wraps;  /* # times uCode wrapped to top of log */
1711         u32 next_entry; /* index of next entry to be written by uCode */
1712         u32 size;       /* # entries that we'll print */
1713
1714         if (priv->ucode_type == UCODE_INIT)
1715                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1716         else
1717                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1718
1719         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1720                 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
1721                 return;
1722         }
1723
1724         /* event log header */
1725         capacity = iwl_read_targ_mem(priv, base);
1726         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1727         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1728         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1729
1730         size = num_wraps ? capacity : next_entry;
1731
1732         /* bail out if nothing in log */
1733         if (size == 0) {
1734                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1735                 return;
1736         }
1737
1738         IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
1739                         size, num_wraps);
1740
1741         /* if uCode has wrapped back to top of log, start at the oldest entry,
1742          * i.e the next one that uCode would fill. */
1743         if (num_wraps)
1744                 iwl_print_event_log(priv, next_entry,
1745                                         capacity - next_entry, mode);
1746         /* (then/else) start at top of log */
1747         iwl_print_event_log(priv, 0, next_entry, mode);
1748
1749 }
1750 #endif
1751
1752 /**
1753  * iwl_alive_start - called after REPLY_ALIVE notification received
1754  *                   from protocol/runtime uCode (initialization uCode's
1755  *                   Alive gets handled by iwl_init_alive_start()).
1756  */
1757 static void iwl_alive_start(struct iwl_priv *priv)
1758 {
1759         int ret = 0;
1760
1761         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
1762
1763         if (priv->card_alive.is_valid != UCODE_VALID_OK) {
1764                 /* We had an error bringing up the hardware, so take it
1765                  * all the way back down so we can try again */
1766                 IWL_DEBUG_INFO(priv, "Alive failed.\n");
1767                 goto restart;
1768         }
1769
1770         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
1771          * This is a paranoid check, because we would not have gotten the
1772          * "runtime" alive if code weren't properly loaded.  */
1773         if (iwl_verify_ucode(priv)) {
1774                 /* Runtime instruction load was bad;
1775                  * take it all the way back down so we can try again */
1776                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
1777                 goto restart;
1778         }
1779
1780         iwl_clear_stations_table(priv);
1781         ret = priv->cfg->ops->lib->alive_notify(priv);
1782         if (ret) {
1783                 IWL_WARN(priv,
1784                         "Could not complete ALIVE transition [ntf]: %d\n", ret);
1785                 goto restart;
1786         }
1787
1788         /* After the ALIVE response, we can send host commands to the uCode */
1789         set_bit(STATUS_ALIVE, &priv->status);
1790
1791         if (iwl_is_rfkill(priv))
1792                 return;
1793
1794         ieee80211_wake_queues(priv->hw);
1795
1796         priv->active_rate = priv->rates_mask;
1797         priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1798
1799         /* Configure Tx antenna selection based on H/W config */
1800         if (priv->cfg->ops->hcmd->set_tx_ant)
1801                 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
1802
1803         if (iwl_is_associated(priv)) {
1804                 struct iwl_rxon_cmd *active_rxon =
1805                                 (struct iwl_rxon_cmd *)&priv->active_rxon;
1806                 /* apply any changes in staging */
1807                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
1808                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1809         } else {
1810                 /* Initialize our rx_config data */
1811                 iwl_connection_init_rx_config(priv, priv->iw_mode);
1812
1813                 if (priv->cfg->ops->hcmd->set_rxon_chain)
1814                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
1815
1816                 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1817         }
1818
1819         /* Configure Bluetooth device coexistence support */
1820         iwl_send_bt_config(priv);
1821
1822         iwl_reset_run_time_calib(priv);
1823
1824         /* Configure the adapter for unassociated operation */
1825         iwlcore_commit_rxon(priv);
1826
1827         /* At this point, the NIC is initialized and operational */
1828         iwl_rf_kill_ct_config(priv);
1829
1830         iwl_leds_init(priv);
1831
1832         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
1833         set_bit(STATUS_READY, &priv->status);
1834         wake_up_interruptible(&priv->wait_command_queue);
1835
1836         iwl_power_update_mode(priv, true);
1837
1838         /* reassociate for ADHOC mode */
1839         if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
1840                 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
1841                                                                 priv->vif);
1842                 if (beacon)
1843                         iwl_mac_beacon_update(priv->hw, beacon);
1844         }
1845
1846
1847         if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
1848                 iwl_set_mode(priv, priv->iw_mode);
1849
1850         return;
1851
1852  restart:
1853         queue_work(priv->workqueue, &priv->restart);
1854 }
1855
1856 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
1857
1858 static void __iwl_down(struct iwl_priv *priv)
1859 {
1860         unsigned long flags;
1861         int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
1862
1863         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
1864
1865         if (!exit_pending)
1866                 set_bit(STATUS_EXIT_PENDING, &priv->status);
1867
1868         iwl_clear_stations_table(priv);
1869
1870         /* Unblock any waiting calls */
1871         wake_up_interruptible_all(&priv->wait_command_queue);
1872
1873         /* Wipe out the EXIT_PENDING status bit if we are not actually
1874          * exiting the module */
1875         if (!exit_pending)
1876                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
1877
1878         /* stop and reset the on-board processor */
1879         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
1880
1881         /* tell the device to stop sending interrupts */
1882         spin_lock_irqsave(&priv->lock, flags);
1883         iwl_disable_interrupts(priv);
1884         spin_unlock_irqrestore(&priv->lock, flags);
1885         iwl_synchronize_irq(priv);
1886
1887         if (priv->mac80211_registered)
1888                 ieee80211_stop_queues(priv->hw);
1889
1890         /* If we have not previously called iwl_init() then
1891          * clear all bits but the RF Kill bit and return */
1892         if (!iwl_is_init(priv)) {
1893                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1894                                         STATUS_RF_KILL_HW |
1895                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1896                                         STATUS_GEO_CONFIGURED |
1897                                test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1898                                         STATUS_EXIT_PENDING;
1899                 goto exit;
1900         }
1901
1902         /* ...otherwise clear out all the status bits but the RF Kill
1903          * bit and continue taking the NIC down. */
1904         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1905                                 STATUS_RF_KILL_HW |
1906                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1907                                 STATUS_GEO_CONFIGURED |
1908                         test_bit(STATUS_FW_ERROR, &priv->status) <<
1909                                 STATUS_FW_ERROR |
1910                        test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1911                                 STATUS_EXIT_PENDING;
1912
1913         /* device going down, Stop using ICT table */
1914         iwl_disable_ict(priv);
1915         spin_lock_irqsave(&priv->lock, flags);
1916         iwl_clear_bit(priv, CSR_GP_CNTRL,
1917                          CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
1918         spin_unlock_irqrestore(&priv->lock, flags);
1919
1920         iwl_txq_ctx_stop(priv);
1921         iwl_rxq_stop(priv);
1922
1923         iwl_write_prph(priv, APMG_CLK_DIS_REG,
1924                                 APMG_CLK_VAL_DMA_CLK_RQT);
1925
1926         udelay(5);
1927
1928         /* Stop the device, and put it in low power state */
1929         priv->cfg->ops->lib->apm_ops.stop(priv);
1930
1931  exit:
1932         memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
1933
1934         if (priv->ibss_beacon)
1935                 dev_kfree_skb(priv->ibss_beacon);
1936         priv->ibss_beacon = NULL;
1937
1938         /* clear out any free frames */
1939         iwl_clear_free_frames(priv);
1940 }
1941
1942 static void iwl_down(struct iwl_priv *priv)
1943 {
1944         mutex_lock(&priv->mutex);
1945         __iwl_down(priv);
1946         mutex_unlock(&priv->mutex);
1947
1948         iwl_cancel_deferred_work(priv);
1949 }
1950
1951 #define HW_READY_TIMEOUT (50)
1952
1953 static int iwl_set_hw_ready(struct iwl_priv *priv)
1954 {
1955         int ret = 0;
1956
1957         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1958                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
1959
1960         /* See if we got it */
1961         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
1962                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1963                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1964                                 HW_READY_TIMEOUT);
1965         if (ret != -ETIMEDOUT)
1966                 priv->hw_ready = true;
1967         else
1968                 priv->hw_ready = false;
1969
1970         IWL_DEBUG_INFO(priv, "hardware %s\n",
1971                       (priv->hw_ready == 1) ? "ready" : "not ready");
1972         return ret;
1973 }
1974
1975 static int iwl_prepare_card_hw(struct iwl_priv *priv)
1976 {
1977         int ret = 0;
1978
1979         IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter \n");
1980
1981         ret = iwl_set_hw_ready(priv);
1982         if (priv->hw_ready)
1983                 return ret;
1984
1985         /* If HW is not ready, prepare the conditions to check again */
1986         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1987                         CSR_HW_IF_CONFIG_REG_PREPARE);
1988
1989         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
1990                         ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
1991                         CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
1992
1993         /* HW should be ready by now, check again. */
1994         if (ret != -ETIMEDOUT)
1995                 iwl_set_hw_ready(priv);
1996
1997         return ret;
1998 }
1999
2000 #define MAX_HW_RESTARTS 5
2001
2002 static int __iwl_up(struct iwl_priv *priv)
2003 {
2004         int i;
2005         int ret;
2006
2007         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2008                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2009                 return -EIO;
2010         }
2011
2012         if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2013                 IWL_ERR(priv, "ucode not available for device bringup\n");
2014                 return -EIO;
2015         }
2016
2017         iwl_prepare_card_hw(priv);
2018
2019         if (!priv->hw_ready) {
2020                 IWL_WARN(priv, "Exit HW not ready\n");
2021                 return -EIO;
2022         }
2023
2024         /* If platform's RF_KILL switch is NOT set to KILL */
2025         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2026                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2027         else
2028                 set_bit(STATUS_RF_KILL_HW, &priv->status);
2029
2030         if (iwl_is_rfkill(priv)) {
2031                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2032
2033                 iwl_enable_interrupts(priv);
2034                 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2035                 return 0;
2036         }
2037
2038         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2039
2040         ret = iwl_hw_nic_init(priv);
2041         if (ret) {
2042                 IWL_ERR(priv, "Unable to init nic\n");
2043                 return ret;
2044         }
2045
2046         /* make sure rfkill handshake bits are cleared */
2047         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2048         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2049                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2050
2051         /* clear (again), then enable host interrupts */
2052         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2053         iwl_enable_interrupts(priv);
2054
2055         /* really make sure rfkill handshake bits are cleared */
2056         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2057         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2058
2059         /* Copy original ucode data image from disk into backup cache.
2060          * This will be used to initialize the on-board processor's
2061          * data SRAM for a clean start when the runtime program first loads. */
2062         memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2063                priv->ucode_data.len);
2064
2065         for (i = 0; i < MAX_HW_RESTARTS; i++) {
2066
2067                 iwl_clear_stations_table(priv);
2068
2069                 /* load bootstrap state machine,
2070                  * load bootstrap program into processor's memory,
2071                  * prepare to load the "initialize" uCode */
2072                 ret = priv->cfg->ops->lib->load_ucode(priv);
2073
2074                 if (ret) {
2075                         IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2076                                 ret);
2077                         continue;
2078                 }
2079
2080                 /* start card; "initialize" will load runtime ucode */
2081                 iwl_nic_start(priv);
2082
2083                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2084
2085                 return 0;
2086         }
2087
2088         set_bit(STATUS_EXIT_PENDING, &priv->status);
2089         __iwl_down(priv);
2090         clear_bit(STATUS_EXIT_PENDING, &priv->status);
2091
2092         /* tried to restart and config the device for as long as our
2093          * patience could withstand */
2094         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2095         return -EIO;
2096 }
2097
2098
2099 /*****************************************************************************
2100  *
2101  * Workqueue callbacks
2102  *
2103  *****************************************************************************/
2104
2105 static void iwl_bg_init_alive_start(struct work_struct *data)
2106 {
2107         struct iwl_priv *priv =
2108             container_of(data, struct iwl_priv, init_alive_start.work);
2109
2110         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2111                 return;
2112
2113         mutex_lock(&priv->mutex);
2114         priv->cfg->ops->lib->init_alive_start(priv);
2115         mutex_unlock(&priv->mutex);
2116 }
2117
2118 static void iwl_bg_alive_start(struct work_struct *data)
2119 {
2120         struct iwl_priv *priv =
2121             container_of(data, struct iwl_priv, alive_start.work);
2122
2123         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2124                 return;
2125
2126         /* enable dram interrupt */
2127         iwl_reset_ict(priv);
2128
2129         mutex_lock(&priv->mutex);
2130         iwl_alive_start(priv);
2131         mutex_unlock(&priv->mutex);
2132 }
2133
2134 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2135 {
2136         struct iwl_priv *priv = container_of(work, struct iwl_priv,
2137                         run_time_calib_work);
2138
2139         mutex_lock(&priv->mutex);
2140
2141         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2142             test_bit(STATUS_SCANNING, &priv->status)) {
2143                 mutex_unlock(&priv->mutex);
2144                 return;
2145         }
2146
2147         if (priv->start_calib) {
2148                 iwl_chain_noise_calibration(priv, &priv->statistics);
2149
2150                 iwl_sensitivity_calibration(priv, &priv->statistics);
2151         }
2152
2153         mutex_unlock(&priv->mutex);
2154         return;
2155 }
2156
2157 static void iwl_bg_up(struct work_struct *data)
2158 {
2159         struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
2160
2161         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2162                 return;
2163
2164         mutex_lock(&priv->mutex);
2165         __iwl_up(priv);
2166         mutex_unlock(&priv->mutex);
2167 }
2168
2169 static void iwl_bg_restart(struct work_struct *data)
2170 {
2171         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2172
2173         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2174                 return;
2175
2176         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2177                 mutex_lock(&priv->mutex);
2178                 priv->vif = NULL;
2179                 priv->is_open = 0;
2180                 mutex_unlock(&priv->mutex);
2181                 iwl_down(priv);
2182                 ieee80211_restart_hw(priv->hw);
2183         } else {
2184                 iwl_down(priv);
2185                 queue_work(priv->workqueue, &priv->up);
2186         }
2187 }
2188
2189 static void iwl_bg_rx_replenish(struct work_struct *data)
2190 {
2191         struct iwl_priv *priv =
2192             container_of(data, struct iwl_priv, rx_replenish);
2193
2194         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2195                 return;
2196
2197         mutex_lock(&priv->mutex);
2198         iwl_rx_replenish(priv);
2199         mutex_unlock(&priv->mutex);
2200 }
2201
2202 #define IWL_DELAY_NEXT_SCAN (HZ*2)
2203
2204 void iwl_post_associate(struct iwl_priv *priv)
2205 {
2206         struct ieee80211_conf *conf = NULL;
2207         int ret = 0;
2208         unsigned long flags;
2209
2210         if (priv->iw_mode == NL80211_IFTYPE_AP) {
2211                 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
2212                 return;
2213         }
2214
2215         IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2216                         priv->assoc_id, priv->active_rxon.bssid_addr);
2217
2218
2219         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2220                 return;
2221
2222
2223         if (!priv->vif || !priv->is_open)
2224                 return;
2225
2226         iwl_scan_cancel_timeout(priv, 200);
2227
2228         conf = ieee80211_get_hw_conf(priv->hw);
2229
2230         priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2231         iwlcore_commit_rxon(priv);
2232
2233         iwl_setup_rxon_timing(priv);
2234         ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2235                               sizeof(priv->rxon_timing), &priv->rxon_timing);
2236         if (ret)
2237                 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2238                             "Attempting to continue.\n");
2239
2240         priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2241
2242         iwl_set_rxon_ht(priv, &priv->current_ht_config);
2243
2244         if (priv->cfg->ops->hcmd->set_rxon_chain)
2245                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2246
2247         priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2248
2249         IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2250                         priv->assoc_id, priv->beacon_int);
2251
2252         if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2253                 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2254         else
2255                 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2256
2257         if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2258                 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2259                         priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2260                 else
2261                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2262
2263                 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2264                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2265
2266         }
2267
2268         iwlcore_commit_rxon(priv);
2269
2270         switch (priv->iw_mode) {
2271         case NL80211_IFTYPE_STATION:
2272                 break;
2273
2274         case NL80211_IFTYPE_ADHOC:
2275
2276                 /* assume default assoc id */
2277                 priv->assoc_id = 1;
2278
2279                 iwl_rxon_add_station(priv, priv->bssid, 0);
2280                 iwl_send_beacon_cmd(priv);
2281
2282                 break;
2283
2284         default:
2285                 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2286                           __func__, priv->iw_mode);
2287                 break;
2288         }
2289
2290         if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2291                 priv->assoc_station_added = 1;
2292
2293         spin_lock_irqsave(&priv->lock, flags);
2294         iwl_activate_qos(priv, 0);
2295         spin_unlock_irqrestore(&priv->lock, flags);
2296
2297         /* the chain noise calibration will enabled PM upon completion
2298          * If chain noise has already been run, then we need to enable
2299          * power management here */
2300         if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2301                 iwl_power_update_mode(priv, false);
2302
2303         /* Enable Rx differential gain and sensitivity calibrations */
2304         iwl_chain_noise_reset(priv);
2305         priv->start_calib = 1;
2306
2307 }
2308
2309 /*****************************************************************************
2310  *
2311  * mac80211 entry point functions
2312  *
2313  *****************************************************************************/
2314
2315 #define UCODE_READY_TIMEOUT     (4 * HZ)
2316
2317 /*
2318  * Not a mac80211 entry point function, but it fits in with all the
2319  * other mac80211 functions grouped here.
2320  */
2321 static int iwl_setup_mac(struct iwl_priv *priv)
2322 {
2323         int ret;
2324         struct ieee80211_hw *hw = priv->hw;
2325         hw->rate_control_algorithm = "iwl-agn-rs";
2326
2327         /* Tell mac80211 our characteristics */
2328         hw->flags = IEEE80211_HW_SIGNAL_DBM |
2329                     IEEE80211_HW_NOISE_DBM |
2330                     IEEE80211_HW_AMPDU_AGGREGATION |
2331                     IEEE80211_HW_SPECTRUM_MGMT;
2332
2333         if (!priv->cfg->broken_powersave)
2334                 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
2335                              IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
2336
2337         hw->sta_data_size = sizeof(struct iwl_station_priv);
2338         hw->wiphy->interface_modes =
2339                 BIT(NL80211_IFTYPE_STATION) |
2340                 BIT(NL80211_IFTYPE_ADHOC);
2341
2342         hw->wiphy->custom_regulatory = true;
2343
2344         /* Firmware does not support this */
2345         hw->wiphy->disable_beacon_hints = true;
2346
2347         /*
2348          * For now, disable PS by default because it affects
2349          * RX performance significantly.
2350          */
2351         hw->wiphy->ps_default = false;
2352
2353         hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
2354         /* we create the 802.11 header and a zero-length SSID element */
2355         hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
2356
2357         /* Default value; 4 EDCA QOS priorities */
2358         hw->queues = 4;
2359
2360         hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
2361
2362         if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
2363                 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
2364                         &priv->bands[IEEE80211_BAND_2GHZ];
2365         if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
2366                 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
2367                         &priv->bands[IEEE80211_BAND_5GHZ];
2368
2369         ret = ieee80211_register_hw(priv->hw);
2370         if (ret) {
2371                 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
2372                 return ret;
2373         }
2374         priv->mac80211_registered = 1;
2375
2376         return 0;
2377 }
2378
2379
2380 static int iwl_mac_start(struct ieee80211_hw *hw)
2381 {
2382         struct iwl_priv *priv = hw->priv;
2383         int ret;
2384
2385         IWL_DEBUG_MAC80211(priv, "enter\n");
2386
2387         /* we should be verifying the device is ready to be opened */
2388         mutex_lock(&priv->mutex);
2389
2390         /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2391          * ucode filename and max sizes are card-specific. */
2392
2393         if (!priv->ucode_code.len) {
2394                 ret = iwl_read_ucode(priv);
2395                 if (ret) {
2396                         IWL_ERR(priv, "Could not read microcode: %d\n", ret);
2397                         mutex_unlock(&priv->mutex);
2398                         return ret;
2399                 }
2400         }
2401
2402         ret = __iwl_up(priv);
2403
2404         mutex_unlock(&priv->mutex);
2405
2406         if (ret)
2407                 return ret;
2408
2409         if (iwl_is_rfkill(priv))
2410                 goto out;
2411
2412         IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2413
2414         /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2415          * mac80211 will not be run successfully. */
2416         ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2417                         test_bit(STATUS_READY, &priv->status),
2418                         UCODE_READY_TIMEOUT);
2419         if (!ret) {
2420                 if (!test_bit(STATUS_READY, &priv->status)) {
2421                         IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2422                                 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2423                         return -ETIMEDOUT;
2424                 }
2425         }
2426
2427         iwl_led_start(priv);
2428
2429 out:
2430         priv->is_open = 1;
2431         IWL_DEBUG_MAC80211(priv, "leave\n");
2432         return 0;
2433 }
2434
2435 static void iwl_mac_stop(struct ieee80211_hw *hw)
2436 {
2437         struct iwl_priv *priv = hw->priv;
2438
2439         IWL_DEBUG_MAC80211(priv, "enter\n");
2440
2441         if (!priv->is_open)
2442                 return;
2443
2444         priv->is_open = 0;
2445
2446         if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
2447                 /* stop mac, cancel any scan request and clear
2448                  * RXON_FILTER_ASSOC_MSK BIT
2449                  */
2450                 mutex_lock(&priv->mutex);
2451                 iwl_scan_cancel_timeout(priv, 100);
2452                 mutex_unlock(&priv->mutex);
2453         }
2454
2455         iwl_down(priv);
2456
2457         flush_workqueue(priv->workqueue);
2458
2459         /* enable interrupts again in order to receive rfkill changes */
2460         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2461         iwl_enable_interrupts(priv);
2462
2463         IWL_DEBUG_MAC80211(priv, "leave\n");
2464 }
2465
2466 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2467 {
2468         struct iwl_priv *priv = hw->priv;
2469
2470         IWL_DEBUG_MACDUMP(priv, "enter\n");
2471
2472         IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2473                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2474
2475         if (iwl_tx_skb(priv, skb))
2476                 dev_kfree_skb_any(skb);
2477
2478         IWL_DEBUG_MACDUMP(priv, "leave\n");
2479         return NETDEV_TX_OK;
2480 }
2481
2482 void iwl_config_ap(struct iwl_priv *priv)
2483 {
2484         int ret = 0;
2485         unsigned long flags;
2486
2487         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2488                 return;
2489
2490         /* The following should be done only at AP bring up */
2491         if (!iwl_is_associated(priv)) {
2492
2493                 /* RXON - unassoc (to set timing command) */
2494                 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2495                 iwlcore_commit_rxon(priv);
2496
2497                 /* RXON Timing */
2498                 iwl_setup_rxon_timing(priv);
2499                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2500                                 sizeof(priv->rxon_timing), &priv->rxon_timing);
2501                 if (ret)
2502                         IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2503                                         "Attempting to continue.\n");
2504
2505                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2506                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
2507
2508                 /* FIXME: what should be the assoc_id for AP? */
2509                 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2510                 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2511                         priv->staging_rxon.flags |=
2512                                 RXON_FLG_SHORT_PREAMBLE_MSK;
2513                 else
2514                         priv->staging_rxon.flags &=
2515                                 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2516
2517                 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2518                         if (priv->assoc_capability &
2519                                 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2520                                 priv->staging_rxon.flags |=
2521                                         RXON_FLG_SHORT_SLOT_MSK;
2522                         else
2523                                 priv->staging_rxon.flags &=
2524                                         ~RXON_FLG_SHORT_SLOT_MSK;
2525
2526                         if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2527                                 priv->staging_rxon.flags &=
2528                                         ~RXON_FLG_SHORT_SLOT_MSK;
2529                 }
2530                 /* restore RXON assoc */
2531                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2532                 iwlcore_commit_rxon(priv);
2533                 spin_lock_irqsave(&priv->lock, flags);
2534                 iwl_activate_qos(priv, 1);
2535                 spin_unlock_irqrestore(&priv->lock, flags);
2536                 iwl_add_bcast_station(priv);
2537         }
2538         iwl_send_beacon_cmd(priv);
2539
2540         /* FIXME - we need to add code here to detect a totally new
2541          * configuration, reset the AP, unassoc, rxon timing, assoc,
2542          * clear sta table, add BCAST sta... */
2543 }
2544
2545 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
2546                         struct ieee80211_key_conf *keyconf, const u8 *addr,
2547                         u32 iv32, u16 *phase1key)
2548 {
2549
2550         struct iwl_priv *priv = hw->priv;
2551         IWL_DEBUG_MAC80211(priv, "enter\n");
2552
2553         iwl_update_tkip_key(priv, keyconf, addr, iv32, phase1key);
2554
2555         IWL_DEBUG_MAC80211(priv, "leave\n");
2556 }
2557
2558 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2559                            struct ieee80211_vif *vif,
2560                            struct ieee80211_sta *sta,
2561                            struct ieee80211_key_conf *key)
2562 {
2563         struct iwl_priv *priv = hw->priv;
2564         const u8 *addr;
2565         int ret;
2566         u8 sta_id;
2567         bool is_default_wep_key = false;
2568
2569         IWL_DEBUG_MAC80211(priv, "enter\n");
2570
2571         if (priv->cfg->mod_params->sw_crypto) {
2572                 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2573                 return -EOPNOTSUPP;
2574         }
2575         addr = sta ? sta->addr : iwl_bcast_addr;
2576         sta_id = iwl_find_station(priv, addr);
2577         if (sta_id == IWL_INVALID_STATION) {
2578                 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
2579                                    addr);
2580                 return -EINVAL;
2581
2582         }
2583
2584         mutex_lock(&priv->mutex);
2585         iwl_scan_cancel_timeout(priv, 100);
2586         mutex_unlock(&priv->mutex);
2587
2588         /* If we are getting WEP group key and we didn't receive any key mapping
2589          * so far, we are in legacy wep mode (group key only), otherwise we are
2590          * in 1X mode.
2591          * In legacy wep mode, we use another host command to the uCode */
2592         if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
2593                 priv->iw_mode != NL80211_IFTYPE_AP) {
2594                 if (cmd == SET_KEY)
2595                         is_default_wep_key = !priv->key_mapping_key;
2596                 else
2597                         is_default_wep_key =
2598                                         (key->hw_key_idx == HW_KEY_DEFAULT);
2599         }
2600
2601         switch (cmd) {
2602         case SET_KEY:
2603                 if (is_default_wep_key)
2604                         ret = iwl_set_default_wep_key(priv, key);
2605                 else
2606                         ret = iwl_set_dynamic_key(priv, key, sta_id);
2607
2608                 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2609                 break;
2610         case DISABLE_KEY:
2611                 if (is_default_wep_key)
2612                         ret = iwl_remove_default_wep_key(priv, key);
2613                 else
2614                         ret = iwl_remove_dynamic_key(priv, key, sta_id);
2615
2616                 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2617                 break;
2618         default:
2619                 ret = -EINVAL;
2620         }
2621
2622         IWL_DEBUG_MAC80211(priv, "leave\n");
2623
2624         return ret;
2625 }
2626
2627 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2628                              enum ieee80211_ampdu_mlme_action action,
2629                              struct ieee80211_sta *sta, u16 tid, u16 *ssn)
2630 {
2631         struct iwl_priv *priv = hw->priv;
2632         int ret;
2633
2634         IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2635                      sta->addr, tid);
2636
2637         if (!(priv->cfg->sku & IWL_SKU_N))
2638                 return -EACCES;
2639
2640         switch (action) {
2641         case IEEE80211_AMPDU_RX_START:
2642                 IWL_DEBUG_HT(priv, "start Rx\n");
2643                 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
2644         case IEEE80211_AMPDU_RX_STOP:
2645                 IWL_DEBUG_HT(priv, "stop Rx\n");
2646                 ret = iwl_sta_rx_agg_stop(priv, sta->addr, tid);
2647                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2648                         return 0;
2649                 else
2650                         return ret;
2651         case IEEE80211_AMPDU_TX_START:
2652                 IWL_DEBUG_HT(priv, "start Tx\n");
2653                 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
2654         case IEEE80211_AMPDU_TX_STOP:
2655                 IWL_DEBUG_HT(priv, "stop Tx\n");
2656                 ret = iwl_tx_agg_stop(priv, sta->addr, tid);
2657                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2658                         return 0;
2659                 else
2660                         return ret;
2661         default:
2662                 IWL_DEBUG_HT(priv, "unknown\n");
2663                 return -EINVAL;
2664                 break;
2665         }
2666         return 0;
2667 }
2668
2669 static int iwl_mac_get_stats(struct ieee80211_hw *hw,
2670                              struct ieee80211_low_level_stats *stats)
2671 {
2672         struct iwl_priv *priv = hw->priv;
2673
2674         priv = hw->priv;
2675         IWL_DEBUG_MAC80211(priv, "enter\n");
2676         IWL_DEBUG_MAC80211(priv, "leave\n");
2677
2678         return 0;
2679 }
2680
2681 /*****************************************************************************
2682  *
2683  * sysfs attributes
2684  *
2685  *****************************************************************************/
2686
2687 #ifdef CONFIG_IWLWIFI_DEBUG
2688
2689 /*
2690  * The following adds a new attribute to the sysfs representation
2691  * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
2692  * used for controlling the debug level.
2693  *
2694  * See the level definitions in iwl for details.
2695  *
2696  * The debug_level being managed using sysfs below is a per device debug
2697  * level that is used instead of the global debug level if it (the per
2698  * device debug level) is set.
2699  */
2700 static ssize_t show_debug_level(struct device *d,
2701                                 struct device_attribute *attr, char *buf)
2702 {
2703         struct iwl_priv *priv = dev_get_drvdata(d);
2704         return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
2705 }
2706 static ssize_t store_debug_level(struct device *d,
2707                                 struct device_attribute *attr,
2708                                  const char *buf, size_t count)
2709 {
2710         struct iwl_priv *priv = dev_get_drvdata(d);
2711         unsigned long val;
2712         int ret;
2713
2714         ret = strict_strtoul(buf, 0, &val);
2715         if (ret)
2716                 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
2717         else {
2718                 priv->debug_level = val;
2719                 if (iwl_alloc_traffic_mem(priv))
2720                         IWL_ERR(priv,
2721                                 "Not enough memory to generate traffic log\n");
2722         }
2723         return strnlen(buf, count);
2724 }
2725
2726 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
2727                         show_debug_level, store_debug_level);
2728
2729
2730 #endif /* CONFIG_IWLWIFI_DEBUG */
2731
2732
2733 static ssize_t show_temperature(struct device *d,
2734                                 struct device_attribute *attr, char *buf)
2735 {
2736         struct iwl_priv *priv = dev_get_drvdata(d);
2737
2738         if (!iwl_is_alive(priv))
2739                 return -EAGAIN;
2740
2741         return sprintf(buf, "%d\n", priv->temperature);
2742 }
2743
2744 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
2745
2746 static ssize_t show_tx_power(struct device *d,
2747                              struct device_attribute *attr, char *buf)
2748 {
2749         struct iwl_priv *priv = dev_get_drvdata(d);
2750
2751         if (!iwl_is_ready_rf(priv))
2752                 return sprintf(buf, "off\n");
2753         else
2754                 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
2755 }
2756
2757 static ssize_t store_tx_power(struct device *d,
2758                               struct device_attribute *attr,
2759                               const char *buf, size_t count)
2760 {
2761         struct iwl_priv *priv = dev_get_drvdata(d);
2762         unsigned long val;
2763         int ret;
2764
2765         ret = strict_strtoul(buf, 10, &val);
2766         if (ret)
2767                 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
2768         else {
2769                 ret = iwl_set_tx_power(priv, val, false);
2770                 if (ret)
2771                         IWL_ERR(priv, "failed setting tx power (0x%d).\n",
2772                                 ret);
2773                 else
2774                         ret = count;
2775         }
2776         return ret;
2777 }
2778
2779 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
2780
2781 static ssize_t show_flags(struct device *d,
2782                           struct device_attribute *attr, char *buf)
2783 {
2784         struct iwl_priv *priv = dev_get_drvdata(d);
2785
2786         return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
2787 }
2788
2789 static ssize_t store_flags(struct device *d,
2790                            struct device_attribute *attr,
2791                            const char *buf, size_t count)
2792 {
2793         struct iwl_priv *priv = dev_get_drvdata(d);
2794         unsigned long val;
2795         u32 flags;
2796         int ret = strict_strtoul(buf, 0, &val);
2797         if (ret)
2798                 return ret;
2799         flags = (u32)val;
2800
2801         mutex_lock(&priv->mutex);
2802         if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
2803                 /* Cancel any currently running scans... */
2804                 if (iwl_scan_cancel_timeout(priv, 100))
2805                         IWL_WARN(priv, "Could not cancel scan.\n");
2806                 else {
2807                         IWL_DEBUG_INFO(priv, "Commit rxon.flags = 0x%04X\n", flags);
2808                         priv->staging_rxon.flags = cpu_to_le32(flags);
2809                         iwlcore_commit_rxon(priv);
2810                 }
2811         }
2812         mutex_unlock(&priv->mutex);
2813
2814         return count;
2815 }
2816
2817 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
2818
2819 static ssize_t show_filter_flags(struct device *d,
2820                                  struct device_attribute *attr, char *buf)
2821 {
2822         struct iwl_priv *priv = dev_get_drvdata(d);
2823
2824         return sprintf(buf, "0x%04X\n",
2825                 le32_to_cpu(priv->active_rxon.filter_flags));
2826 }
2827
2828 static ssize_t store_filter_flags(struct device *d,
2829                                   struct device_attribute *attr,
2830                                   const char *buf, size_t count)
2831 {
2832         struct iwl_priv *priv = dev_get_drvdata(d);
2833         unsigned long val;
2834         u32 filter_flags;
2835         int ret = strict_strtoul(buf, 0, &val);
2836         if (ret)
2837                 return ret;
2838         filter_flags = (u32)val;
2839
2840         mutex_lock(&priv->mutex);
2841         if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
2842                 /* Cancel any currently running scans... */
2843                 if (iwl_scan_cancel_timeout(priv, 100))
2844                         IWL_WARN(priv, "Could not cancel scan.\n");
2845                 else {
2846                         IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
2847                                        "0x%04X\n", filter_flags);
2848                         priv->staging_rxon.filter_flags =
2849                                 cpu_to_le32(filter_flags);
2850                         iwlcore_commit_rxon(priv);
2851                 }
2852         }
2853         mutex_unlock(&priv->mutex);
2854
2855         return count;
2856 }
2857
2858 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
2859                    store_filter_flags);
2860
2861
2862 static ssize_t show_statistics(struct device *d,
2863                                struct device_attribute *attr, char *buf)
2864 {
2865         struct iwl_priv *priv = dev_get_drvdata(d);
2866         u32 size = sizeof(struct iwl_notif_statistics);
2867         u32 len = 0, ofs = 0;
2868         u8 *data = (u8 *)&priv->statistics;
2869         int rc = 0;
2870
2871         if (!iwl_is_alive(priv))
2872                 return -EAGAIN;
2873
2874         mutex_lock(&priv->mutex);
2875         rc = iwl_send_statistics_request(priv, 0);
2876         mutex_unlock(&priv->mutex);
2877
2878         if (rc) {
2879                 len = sprintf(buf,
2880                               "Error sending statistics request: 0x%08X\n", rc);
2881                 return len;
2882         }
2883
2884         while (size && (PAGE_SIZE - len)) {
2885                 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
2886                                    PAGE_SIZE - len, 1);
2887                 len = strlen(buf);
2888                 if (PAGE_SIZE - len)
2889                         buf[len++] = '\n';
2890
2891                 ofs += 16;
2892                 size -= min(size, 16U);
2893         }
2894
2895         return len;
2896 }
2897
2898 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
2899
2900 static ssize_t show_rts_ht_protection(struct device *d,
2901                              struct device_attribute *attr, char *buf)
2902 {
2903         struct iwl_priv *priv = dev_get_drvdata(d);
2904
2905         return sprintf(buf, "%s\n",
2906                 priv->cfg->use_rts_for_ht ? "RTS/CTS" : "CTS-to-self");
2907 }
2908
2909 static ssize_t store_rts_ht_protection(struct device *d,
2910                               struct device_attribute *attr,
2911                               const char *buf, size_t count)
2912 {
2913         struct iwl_priv *priv = dev_get_drvdata(d);
2914         unsigned long val;
2915         int ret;
2916
2917         ret = strict_strtoul(buf, 10, &val);
2918         if (ret)
2919                 IWL_INFO(priv, "Input is not in decimal form.\n");
2920         else {
2921                 if (!iwl_is_associated(priv))
2922                         priv->cfg->use_rts_for_ht = val ? true : false;
2923                 else
2924                         IWL_ERR(priv, "Sta associated with AP - "
2925                                 "Change protection mechanism is not allowed\n");
2926                 ret = count;
2927         }
2928         return ret;
2929 }
2930
2931 static DEVICE_ATTR(rts_ht_protection, S_IWUSR | S_IRUGO,
2932                         show_rts_ht_protection, store_rts_ht_protection);
2933
2934
2935 /*****************************************************************************
2936  *
2937  * driver setup and teardown
2938  *
2939  *****************************************************************************/
2940
2941 static void iwl_setup_deferred_work(struct iwl_priv *priv)
2942 {
2943         priv->workqueue = create_singlethread_workqueue(DRV_NAME);
2944
2945         init_waitqueue_head(&priv->wait_command_queue);
2946
2947         INIT_WORK(&priv->up, iwl_bg_up);
2948         INIT_WORK(&priv->restart, iwl_bg_restart);
2949         INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
2950         INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
2951         INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
2952         INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
2953         INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
2954
2955         iwl_setup_scan_deferred_work(priv);
2956
2957         if (priv->cfg->ops->lib->setup_deferred_work)
2958                 priv->cfg->ops->lib->setup_deferred_work(priv);
2959
2960         init_timer(&priv->statistics_periodic);
2961         priv->statistics_periodic.data = (unsigned long)priv;
2962         priv->statistics_periodic.function = iwl_bg_statistics_periodic;
2963
2964         if (!priv->cfg->use_isr_legacy)
2965                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2966                         iwl_irq_tasklet, (unsigned long)priv);
2967         else
2968                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2969                         iwl_irq_tasklet_legacy, (unsigned long)priv);
2970 }
2971
2972 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
2973 {
2974         if (priv->cfg->ops->lib->cancel_deferred_work)
2975                 priv->cfg->ops->lib->cancel_deferred_work(priv);
2976
2977         cancel_delayed_work_sync(&priv->init_alive_start);
2978         cancel_delayed_work(&priv->scan_check);
2979         cancel_delayed_work(&priv->alive_start);
2980         cancel_work_sync(&priv->beacon_update);
2981         del_timer_sync(&priv->statistics_periodic);
2982 }
2983
2984 static void iwl_init_hw_rates(struct iwl_priv *priv,
2985                               struct ieee80211_rate *rates)
2986 {
2987         int i;
2988
2989         for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
2990                 rates[i].bitrate = iwl_rates[i].ieee * 5;
2991                 rates[i].hw_value = i; /* Rate scaling will work on indexes */
2992                 rates[i].hw_value_short = i;
2993                 rates[i].flags = 0;
2994                 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
2995                         /*
2996                          * If CCK != 1M then set short preamble rate flag.
2997                          */
2998                         rates[i].flags |=
2999                                 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3000                                         0 : IEEE80211_RATE_SHORT_PREAMBLE;
3001                 }
3002         }
3003 }
3004
3005 static int iwl_init_drv(struct iwl_priv *priv)
3006 {
3007         int ret;
3008
3009         priv->ibss_beacon = NULL;
3010
3011         spin_lock_init(&priv->lock);
3012         spin_lock_init(&priv->sta_lock);
3013         spin_lock_init(&priv->hcmd_lock);
3014
3015         INIT_LIST_HEAD(&priv->free_frames);
3016
3017         mutex_init(&priv->mutex);
3018
3019         /* Clear the driver's (not device's) station table */
3020         iwl_clear_stations_table(priv);
3021
3022         priv->ieee_channels = NULL;
3023         priv->ieee_rates = NULL;
3024         priv->band = IEEE80211_BAND_2GHZ;
3025
3026         priv->iw_mode = NL80211_IFTYPE_STATION;
3027         if (priv->cfg->support_sm_ps)
3028                 priv->current_ht_config.sm_ps = WLAN_HT_CAP_SM_PS_DYNAMIC;
3029         else
3030                 priv->current_ht_config.sm_ps = WLAN_HT_CAP_SM_PS_DISABLED;
3031
3032         /* Choose which receivers/antennas to use */
3033         if (priv->cfg->ops->hcmd->set_rxon_chain)
3034                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3035
3036         iwl_init_scan_params(priv);
3037
3038         iwl_reset_qos(priv);
3039
3040         priv->qos_data.qos_active = 0;
3041         priv->qos_data.qos_cap.val = 0;
3042
3043         priv->rates_mask = IWL_RATES_MASK;
3044         /* Set the tx_power_user_lmt to the lowest power level
3045          * this value will get overwritten by channel max power avg
3046          * from eeprom */
3047         priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MIN;
3048
3049         ret = iwl_init_channel_map(priv);
3050         if (ret) {
3051                 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3052                 goto err;
3053         }
3054
3055         ret = iwlcore_init_geos(priv);
3056         if (ret) {
3057                 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3058                 goto err_free_channel_map;
3059         }
3060         iwl_init_hw_rates(priv, priv->ieee_rates);
3061
3062         return 0;
3063
3064 err_free_channel_map:
3065         iwl_free_channel_map(priv);
3066 err:
3067         return ret;
3068 }
3069
3070 static void iwl_uninit_drv(struct iwl_priv *priv)
3071 {
3072         iwl_calib_free_results(priv);
3073         iwlcore_free_geos(priv);
3074         iwl_free_channel_map(priv);
3075         kfree(priv->scan);
3076 }
3077
3078 static struct attribute *iwl_sysfs_entries[] = {
3079         &dev_attr_flags.attr,
3080         &dev_attr_filter_flags.attr,
3081         &dev_attr_statistics.attr,
3082         &dev_attr_temperature.attr,
3083         &dev_attr_tx_power.attr,
3084         &dev_attr_rts_ht_protection.attr,
3085 #ifdef CONFIG_IWLWIFI_DEBUG
3086         &dev_attr_debug_level.attr,
3087 #endif
3088         NULL
3089 };
3090
3091 static struct attribute_group iwl_attribute_group = {
3092         .name = NULL,           /* put in device directory */
3093         .attrs = iwl_sysfs_entries,
3094 };
3095
3096 static struct ieee80211_ops iwl_hw_ops = {
3097         .tx = iwl_mac_tx,
3098         .start = iwl_mac_start,
3099         .stop = iwl_mac_stop,
3100         .add_interface = iwl_mac_add_interface,
3101         .remove_interface = iwl_mac_remove_interface,
3102         .config = iwl_mac_config,
3103         .configure_filter = iwl_configure_filter,
3104         .set_key = iwl_mac_set_key,
3105         .update_tkip_key = iwl_mac_update_tkip_key,
3106         .get_stats = iwl_mac_get_stats,
3107         .get_tx_stats = iwl_mac_get_tx_stats,
3108         .conf_tx = iwl_mac_conf_tx,
3109         .reset_tsf = iwl_mac_reset_tsf,
3110         .bss_info_changed = iwl_bss_info_changed,
3111         .ampdu_action = iwl_mac_ampdu_action,
3112         .hw_scan = iwl_mac_hw_scan
3113 };
3114
3115 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3116 {
3117         int err = 0;
3118         struct iwl_priv *priv;
3119         struct ieee80211_hw *hw;
3120         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3121         unsigned long flags;
3122         u16 pci_cmd;
3123
3124         /************************
3125          * 1. Allocating HW data
3126          ************************/
3127
3128         /* Disabling hardware scan means that mac80211 will perform scans
3129          * "the hard way", rather than using device's scan. */
3130         if (cfg->mod_params->disable_hw_scan) {
3131                 if (iwl_debug_level & IWL_DL_INFO)
3132                         dev_printk(KERN_DEBUG, &(pdev->dev),
3133                                    "Disabling hw_scan\n");
3134                 iwl_hw_ops.hw_scan = NULL;
3135         }
3136
3137         hw = iwl_alloc_all(cfg, &iwl_hw_ops);
3138         if (!hw) {
3139                 err = -ENOMEM;
3140                 goto out;
3141         }
3142         priv = hw->priv;
3143         /* At this point both hw and priv are allocated. */
3144
3145         SET_IEEE80211_DEV(hw, &pdev->dev);
3146
3147         IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3148         priv->cfg = cfg;
3149         priv->pci_dev = pdev;
3150         priv->inta_mask = CSR_INI_SET_MASK;
3151
3152 #ifdef CONFIG_IWLWIFI_DEBUG
3153         atomic_set(&priv->restrict_refcnt, 0);
3154 #endif
3155         if (iwl_alloc_traffic_mem(priv))
3156                 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3157
3158         /**************************
3159          * 2. Initializing PCI bus
3160          **************************/
3161         if (pci_enable_device(pdev)) {
3162                 err = -ENODEV;
3163                 goto out_ieee80211_free_hw;
3164         }
3165
3166         pci_set_master(pdev);
3167
3168         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
3169         if (!err)
3170                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
3171         if (err) {
3172                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3173                 if (!err)
3174                         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3175                 /* both attempts failed: */
3176                 if (err) {
3177                         IWL_WARN(priv, "No suitable DMA available.\n");
3178                         goto out_pci_disable_device;
3179                 }
3180         }
3181
3182         err = pci_request_regions(pdev, DRV_NAME);
3183         if (err)
3184                 goto out_pci_disable_device;
3185
3186         pci_set_drvdata(pdev, priv);
3187
3188
3189         /***********************
3190          * 3. Read REV register
3191          ***********************/
3192         priv->hw_base = pci_iomap(pdev, 0, 0);
3193         if (!priv->hw_base) {
3194                 err = -ENODEV;
3195                 goto out_pci_release_regions;
3196         }
3197
3198         IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3199                 (unsigned long long) pci_resource_len(pdev, 0));
3200         IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3201
3202         /* this spin lock will be used in apm_ops.init and EEPROM access
3203          * we should init now
3204          */
3205         spin_lock_init(&priv->reg_lock);
3206         iwl_hw_detect(priv);
3207         IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n",
3208                 priv->cfg->name, priv->hw_rev);
3209
3210         /* We disable the RETRY_TIMEOUT register (0x41) to keep
3211          * PCI Tx retries from interfering with C3 CPU state */
3212         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3213
3214         iwl_prepare_card_hw(priv);
3215         if (!priv->hw_ready) {
3216                 IWL_WARN(priv, "Failed, HW not ready\n");
3217                 goto out_iounmap;
3218         }
3219
3220         /*****************
3221          * 4. Read EEPROM
3222          *****************/
3223         /* Read the EEPROM */
3224         err = iwl_eeprom_init(priv);
3225         if (err) {
3226                 IWL_ERR(priv, "Unable to init EEPROM\n");
3227                 goto out_iounmap;
3228         }
3229         err = iwl_eeprom_check_version(priv);
3230         if (err)
3231                 goto out_free_eeprom;
3232
3233         /* extract MAC Address */
3234         iwl_eeprom_get_mac(priv, priv->mac_addr);
3235         IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
3236         SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
3237
3238         /************************
3239          * 5. Setup HW constants
3240          ************************/
3241         if (iwl_set_hw_params(priv)) {
3242                 IWL_ERR(priv, "failed to set hw parameters\n");
3243                 goto out_free_eeprom;
3244         }
3245
3246         /*******************
3247          * 6. Setup priv
3248          *******************/
3249
3250         err = iwl_init_drv(priv);
3251         if (err)
3252                 goto out_free_eeprom;
3253         /* At this point both hw and priv are initialized. */
3254
3255         /********************
3256          * 7. Setup services
3257          ********************/
3258         spin_lock_irqsave(&priv->lock, flags);
3259         iwl_disable_interrupts(priv);
3260         spin_unlock_irqrestore(&priv->lock, flags);
3261
3262         pci_enable_msi(priv->pci_dev);
3263
3264         iwl_alloc_isr_ict(priv);
3265         err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
3266                           IRQF_SHARED, DRV_NAME, priv);
3267         if (err) {
3268                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3269                 goto out_disable_msi;
3270         }
3271         err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
3272         if (err) {
3273                 IWL_ERR(priv, "failed to create sysfs device attributes\n");
3274                 goto out_free_irq;
3275         }
3276
3277         iwl_setup_deferred_work(priv);
3278         iwl_setup_rx_handlers(priv);
3279
3280         /**********************************
3281          * 8. Setup and register mac80211
3282          **********************************/
3283
3284         /* enable interrupts if needed: hw bug w/a */
3285         pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3286         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3287                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3288                 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3289         }
3290
3291         iwl_enable_interrupts(priv);
3292
3293         err = iwl_setup_mac(priv);
3294         if (err)
3295                 goto out_remove_sysfs;
3296
3297         err = iwl_dbgfs_register(priv, DRV_NAME);
3298         if (err)
3299                 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
3300
3301         /* If platform's RF_KILL switch is NOT set to KILL */
3302         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3303                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3304         else
3305                 set_bit(STATUS_RF_KILL_HW, &priv->status);
3306
3307         wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3308                 test_bit(STATUS_RF_KILL_HW, &priv->status));
3309
3310         iwl_power_initialize(priv);
3311         iwl_tt_initialize(priv);
3312         return 0;
3313
3314  out_remove_sysfs:
3315         destroy_workqueue(priv->workqueue);
3316         priv->workqueue = NULL;
3317         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3318  out_free_irq:
3319         free_irq(priv->pci_dev->irq, priv);
3320         iwl_free_isr_ict(priv);
3321  out_disable_msi:
3322         pci_disable_msi(priv->pci_dev);
3323         iwl_uninit_drv(priv);
3324  out_free_eeprom:
3325         iwl_eeprom_free(priv);
3326  out_iounmap:
3327         pci_iounmap(pdev, priv->hw_base);
3328  out_pci_release_regions:
3329         pci_set_drvdata(pdev, NULL);
3330         pci_release_regions(pdev);
3331  out_pci_disable_device:
3332         pci_disable_device(pdev);
3333  out_ieee80211_free_hw:
3334         iwl_free_traffic_mem(priv);
3335         ieee80211_free_hw(priv->hw);
3336  out:
3337         return err;
3338 }
3339
3340 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3341 {
3342         struct iwl_priv *priv = pci_get_drvdata(pdev);
3343         unsigned long flags;
3344
3345         if (!priv)
3346                 return;
3347
3348         IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3349
3350         iwl_dbgfs_unregister(priv);
3351         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3352
3353         /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3354          * to be called and iwl_down since we are removing the device
3355          * we need to set STATUS_EXIT_PENDING bit.
3356          */
3357         set_bit(STATUS_EXIT_PENDING, &priv->status);
3358         if (priv->mac80211_registered) {
3359                 ieee80211_unregister_hw(priv->hw);
3360                 priv->mac80211_registered = 0;
3361         } else {
3362                 iwl_down(priv);
3363         }
3364
3365         /*
3366          * Make sure device is reset to low power before unloading driver.
3367          * This may be redundant with iwl_down(), but there are paths to
3368          * run iwl_down() without calling apm_ops.stop(), and there are
3369          * paths to avoid running iwl_down() at all before leaving driver.
3370          * This (inexpensive) call *makes sure* device is reset.
3371          */
3372         priv->cfg->ops->lib->apm_ops.stop(priv);
3373
3374         iwl_tt_exit(priv);
3375
3376         /* make sure we flush any pending irq or
3377          * tasklet for the driver
3378          */
3379         spin_lock_irqsave(&priv->lock, flags);
3380         iwl_disable_interrupts(priv);
3381         spin_unlock_irqrestore(&priv->lock, flags);
3382
3383         iwl_synchronize_irq(priv);
3384
3385         iwl_dealloc_ucode_pci(priv);
3386
3387         if (priv->rxq.bd)
3388                 iwl_rx_queue_free(priv, &priv->rxq);
3389         iwl_hw_txq_ctx_free(priv);
3390
3391         iwl_clear_stations_table(priv);
3392         iwl_eeprom_free(priv);
3393
3394
3395         /*netif_stop_queue(dev); */
3396         flush_workqueue(priv->workqueue);
3397
3398         /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3399          * priv->workqueue... so we can't take down the workqueue
3400          * until now... */
3401         destroy_workqueue(priv->workqueue);
3402         priv->workqueue = NULL;
3403         iwl_free_traffic_mem(priv);
3404
3405         free_irq(priv->pci_dev->irq, priv);
3406         pci_disable_msi(priv->pci_dev);
3407         pci_iounmap(pdev, priv->hw_base);
3408         pci_release_regions(pdev);
3409         pci_disable_device(pdev);
3410         pci_set_drvdata(pdev, NULL);
3411
3412         iwl_uninit_drv(priv);
3413
3414         iwl_free_isr_ict(priv);
3415
3416         if (priv->ibss_beacon)
3417                 dev_kfree_skb(priv->ibss_beacon);
3418
3419         ieee80211_free_hw(priv->hw);
3420 }
3421
3422
3423 /*****************************************************************************
3424  *
3425  * driver and module entry point
3426  *
3427  *****************************************************************************/
3428
3429 /* Hardware specific file defines the PCI IDs table for that hardware module */
3430 static struct pci_device_id iwl_hw_card_ids[] = {
3431 #ifdef CONFIG_IWL4965
3432         {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3433         {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
3434 #endif /* CONFIG_IWL4965 */
3435 #ifdef CONFIG_IWL5000
3436         {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)},
3437         {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)},
3438         {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)},
3439         {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)},
3440         {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)},
3441         {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)},
3442         {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)},
3443         {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)},
3444         {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)},
3445         {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)},
3446 /* 5350 WiFi/WiMax */
3447         {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)},
3448         {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)},
3449         {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)},
3450 /* 5150 Wifi/WiMax */
3451         {IWL_PCI_DEVICE(0x423C, PCI_ANY_ID, iwl5150_agn_cfg)},
3452         {IWL_PCI_DEVICE(0x423D, PCI_ANY_ID, iwl5150_agn_cfg)},
3453
3454 /* 6x00 Series */
3455         {IWL_PCI_DEVICE(0x008D, 0x1301, iwl6000h_2agn_cfg)},
3456         {IWL_PCI_DEVICE(0x008D, 0x1321, iwl6000h_2agn_cfg)},
3457         {IWL_PCI_DEVICE(0x008D, 0x1326, iwl6000h_2abg_cfg)},
3458         {IWL_PCI_DEVICE(0x008D, 0x1306, iwl6000h_2abg_cfg)},
3459         {IWL_PCI_DEVICE(0x008D, 0x1307, iwl6000h_2bg_cfg)},
3460         {IWL_PCI_DEVICE(0x008E, 0x1311, iwl6000h_2agn_cfg)},
3461         {IWL_PCI_DEVICE(0x008E, 0x1316, iwl6000h_2abg_cfg)},
3462
3463         {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
3464         {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
3465         {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
3466         {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
3467         {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
3468         {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
3469         {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
3470         {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
3471         {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
3472         {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
3473
3474 /* 6x50 WiFi/WiMax Series */
3475         {IWL_PCI_DEVICE(0x0086, 0x1101, iwl6050_3agn_cfg)},
3476         {IWL_PCI_DEVICE(0x0086, 0x1121, iwl6050_3agn_cfg)},
3477         {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
3478         {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
3479         {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
3480         {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
3481         {IWL_PCI_DEVICE(0x0088, 0x1111, iwl6050_3agn_cfg)},
3482         {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
3483         {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
3484
3485 /* 1000 Series WiFi */
3486         {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
3487         {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
3488         {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
3489         {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
3490         {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
3491         {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
3492         {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
3493         {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
3494         {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
3495         {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
3496         {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
3497         {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
3498 #endif /* CONFIG_IWL5000 */
3499
3500         {0}
3501 };
3502 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
3503
3504 static struct pci_driver iwl_driver = {
3505         .name = DRV_NAME,
3506         .id_table = iwl_hw_card_ids,
3507         .probe = iwl_pci_probe,
3508         .remove = __devexit_p(iwl_pci_remove),
3509 #ifdef CONFIG_PM
3510         .suspend = iwl_pci_suspend,
3511         .resume = iwl_pci_resume,
3512 #endif
3513 };
3514
3515 static int __init iwl_init(void)
3516 {
3517
3518         int ret;
3519         printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
3520         printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
3521
3522         ret = iwlagn_rate_control_register();
3523         if (ret) {
3524                 printk(KERN_ERR DRV_NAME
3525                        "Unable to register rate control algorithm: %d\n", ret);
3526                 return ret;
3527         }
3528
3529         ret = pci_register_driver(&iwl_driver);
3530         if (ret) {
3531                 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
3532                 goto error_register;
3533         }
3534
3535         return ret;
3536
3537 error_register:
3538         iwlagn_rate_control_unregister();
3539         return ret;
3540 }
3541
3542 static void __exit iwl_exit(void)
3543 {
3544         pci_unregister_driver(&iwl_driver);
3545         iwlagn_rate_control_unregister();
3546 }
3547
3548 module_exit(iwl_exit);
3549 module_init(iwl_init);
3550
3551 #ifdef CONFIG_IWLWIFI_DEBUG
3552 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
3553 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
3554 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
3555 MODULE_PARM_DESC(debug, "debug output mask");
3556 #endif
3557