1 /******************************************************************************
3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
21 * Contact Information:
22 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 *****************************************************************************/
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/init.h>
30 #include <linux/pci.h>
31 #include <linux/dma-mapping.h>
32 #include <linux/delay.h>
33 #include <linux/skbuff.h>
34 #include <linux/netdevice.h>
35 #include <linux/wireless.h>
36 #include <net/mac80211.h>
37 #include <linux/etherdevice.h>
38 #include <asm/unaligned.h>
40 #include "iwl-eeprom.h"
44 #include "iwl-helpers.h"
45 #include "iwl-calib.h"
48 static int iwl4965_send_tx_power(struct iwl_priv *priv);
49 static int iwl4965_hw_get_temperature(const struct iwl_priv *priv);
51 /* Change firmware file name, using "-" and incrementing number,
52 * *only* when uCode interface or architecture changes so that it
53 * is not compatible with earlier drivers.
54 * This number will also appear in << 8 position of 1st dword of uCode file */
55 #define IWL4965_UCODE_API "-2"
58 /* module parameters */
59 static struct iwl_mod_params iwl4965_mod_params = {
60 .num_of_queues = IWL49_NUM_QUEUES,
61 .num_of_ampdu_queues = IWL49_NUM_AMPDU_QUEUES,
65 /* the rest are 0 by default */
68 /* check contents of special bootstrap uCode SRAM */
69 static int iwl4965_verify_bsm(struct iwl_priv *priv)
71 __le32 *image = priv->ucode_boot.v_addr;
72 u32 len = priv->ucode_boot.len;
76 IWL_DEBUG_INFO("Begin verify bsm\n");
78 /* verify BSM SRAM contents */
79 val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
80 for (reg = BSM_SRAM_LOWER_BOUND;
81 reg < BSM_SRAM_LOWER_BOUND + len;
82 reg += sizeof(u32), image++) {
83 val = iwl_read_prph(priv, reg);
84 if (val != le32_to_cpu(*image)) {
85 IWL_ERROR("BSM uCode verification failed at "
86 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
88 reg - BSM_SRAM_LOWER_BOUND, len,
89 val, le32_to_cpu(*image));
94 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
100 * iwl4965_load_bsm - Load bootstrap instructions
104 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
105 * in special SRAM that does not power down during RFKILL. When powering back
106 * up after power-saving sleeps (or during initial uCode load), the BSM loads
107 * the bootstrap program into the on-board processor, and starts it.
109 * The bootstrap program loads (via DMA) instructions and data for a new
110 * program from host DRAM locations indicated by the host driver in the
111 * BSM_DRAM_* registers. Once the new program is loaded, it starts
114 * When initializing the NIC, the host driver points the BSM to the
115 * "initialize" uCode image. This uCode sets up some internal data, then
116 * notifies host via "initialize alive" that it is complete.
118 * The host then replaces the BSM_DRAM_* pointer values to point to the
119 * normal runtime uCode instructions and a backup uCode data cache buffer
120 * (filled initially with starting data values for the on-board processor),
121 * then triggers the "initialize" uCode to load and launch the runtime uCode,
122 * which begins normal operation.
124 * When doing a power-save shutdown, runtime uCode saves data SRAM into
125 * the backup data cache in DRAM before SRAM is powered down.
127 * When powering back up, the BSM loads the bootstrap program. This reloads
128 * the runtime uCode instructions and the backup data cache into SRAM,
129 * and re-launches the runtime uCode from where it left off.
131 static int iwl4965_load_bsm(struct iwl_priv *priv)
133 __le32 *image = priv->ucode_boot.v_addr;
134 u32 len = priv->ucode_boot.len;
144 IWL_DEBUG_INFO("Begin load bsm\n");
146 priv->ucode_type = UCODE_RT;
148 /* make sure bootstrap program is no larger than BSM's SRAM size */
149 if (len > IWL_MAX_BSM_SIZE)
152 /* Tell bootstrap uCode where to find the "Initialize" uCode
153 * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
154 * NOTE: iwl_init_alive_start() will replace these values,
155 * after the "initialize" uCode has run, to point to
156 * runtime/protocol instructions and backup data cache.
158 pinst = priv->ucode_init.p_addr >> 4;
159 pdata = priv->ucode_init_data.p_addr >> 4;
160 inst_len = priv->ucode_init.len;
161 data_len = priv->ucode_init_data.len;
163 ret = iwl_grab_nic_access(priv);
167 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
168 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
169 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
170 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
172 /* Fill BSM memory with bootstrap instructions */
173 for (reg_offset = BSM_SRAM_LOWER_BOUND;
174 reg_offset < BSM_SRAM_LOWER_BOUND + len;
175 reg_offset += sizeof(u32), image++)
176 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
178 ret = iwl4965_verify_bsm(priv);
180 iwl_release_nic_access(priv);
184 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
185 iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
186 iwl_write_prph(priv, BSM_WR_MEM_DST_REG, RTC_INST_LOWER_BOUND);
187 iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
189 /* Load bootstrap code into instruction SRAM now,
190 * to prepare to load "initialize" uCode */
191 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
193 /* Wait for load of bootstrap uCode to finish */
194 for (i = 0; i < 100; i++) {
195 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
196 if (!(done & BSM_WR_CTRL_REG_BIT_START))
201 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
203 IWL_ERROR("BSM write did not complete!\n");
207 /* Enable future boot loads whenever power management unit triggers it
208 * (e.g. when powering back up after power-save shutdown) */
209 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
211 iwl_release_nic_access(priv);
217 * iwl4965_set_ucode_ptrs - Set uCode address location
219 * Tell initialization uCode where to find runtime uCode.
221 * BSM registers initially contain pointers to initialization uCode.
222 * We need to replace them to load runtime uCode inst and data,
223 * and to save runtime data when powering down.
225 static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
232 /* bits 35:4 for 4965 */
233 pinst = priv->ucode_code.p_addr >> 4;
234 pdata = priv->ucode_data_backup.p_addr >> 4;
236 spin_lock_irqsave(&priv->lock, flags);
237 ret = iwl_grab_nic_access(priv);
239 spin_unlock_irqrestore(&priv->lock, flags);
243 /* Tell bootstrap uCode where to find image to load */
244 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
245 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
246 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
247 priv->ucode_data.len);
249 /* Inst byte count must be last to set up, bit 31 signals uCode
250 * that all new ptr/size info is in place */
251 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
252 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
253 iwl_release_nic_access(priv);
255 spin_unlock_irqrestore(&priv->lock, flags);
257 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
263 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
265 * Called after REPLY_ALIVE notification received from "initialize" uCode.
267 * The 4965 "initialize" ALIVE reply contains calibration data for:
268 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
269 * (3945 does not contain this data).
271 * Tell "initialize" uCode to go ahead and load the runtime uCode.
273 static void iwl4965_init_alive_start(struct iwl_priv *priv)
275 /* Check alive response for "valid" sign from uCode */
276 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
277 /* We had an error bringing up the hardware, so take it
278 * all the way back down so we can try again */
279 IWL_DEBUG_INFO("Initialize Alive failed.\n");
283 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
284 * This is a paranoid check, because we would not have gotten the
285 * "initialize" alive if code weren't properly loaded. */
286 if (iwl_verify_ucode(priv)) {
287 /* Runtime instruction load was bad;
288 * take it all the way back down so we can try again */
289 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
293 /* Calculate temperature */
294 priv->temperature = iwl4965_hw_get_temperature(priv);
296 /* Send pointers to protocol/runtime uCode image ... init code will
297 * load and launch runtime uCode, which will send us another "Alive"
299 IWL_DEBUG_INFO("Initialization Alive received.\n");
300 if (iwl4965_set_ucode_ptrs(priv)) {
301 /* Runtime instruction load won't happen;
302 * take it all the way back down so we can try again */
303 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
309 queue_work(priv->workqueue, &priv->restart);
312 static int is_fat_channel(__le32 rxon_flags)
314 return (rxon_flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) ||
315 (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK);
321 static u16 iwl4965_eeprom_calib_version(struct iwl_priv *priv)
323 return iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
327 * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
328 * must be called under priv->lock and mac access
330 static void iwl4965_txq_set_sched(struct iwl_priv *priv, u32 mask)
332 iwl_write_prph(priv, IWL49_SCD_TXFACT, mask);
335 static int iwl4965_apm_init(struct iwl_priv *priv)
339 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
340 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
342 /* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */
343 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
344 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
346 /* set "initialization complete" bit to move adapter
347 * D0U* --> D0A* state */
348 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
350 /* wait for clock stabilization */
351 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
352 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
353 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
355 IWL_DEBUG_INFO("Failed to init the card\n");
359 ret = iwl_grab_nic_access(priv);
364 iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT |
365 APMG_CLK_VAL_BSM_CLK_RQT);
369 /* disable L1-Active */
370 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
371 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
373 iwl_release_nic_access(priv);
379 static void iwl4965_nic_config(struct iwl_priv *priv)
386 spin_lock_irqsave(&priv->lock, flags);
388 if ((priv->rev_id & 0x80) == 0x80 && (priv->rev_id & 0x7f) < 8) {
389 pci_read_config_dword(priv->pci_dev, PCI_REG_WUM8, &val);
390 /* Enable No Snoop field */
391 pci_write_config_dword(priv->pci_dev, PCI_REG_WUM8,
395 pci_read_config_word(priv->pci_dev, PCI_CFG_LINK_CTRL, &link);
397 /* L1 is enabled by BIOS */
398 if ((link & PCI_CFG_LINK_CTRL_VAL_L1_EN) == PCI_CFG_LINK_CTRL_VAL_L1_EN)
399 /* disable L0S disabled L1A enabled */
400 iwl_set_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
402 /* L0S enabled L1A disabled */
403 iwl_clear_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
405 radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
407 /* write radio config values to register */
408 if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
409 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
410 EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
411 EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
412 EEPROM_RF_CFG_DASH_MSK(radio_cfg));
414 /* set CSR_HW_CONFIG_REG for uCode use */
415 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
416 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
417 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
419 priv->calib_info = (struct iwl_eeprom_calib_info *)
420 iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
422 spin_unlock_irqrestore(&priv->lock, flags);
425 static int iwl4965_apm_stop_master(struct iwl_priv *priv)
430 spin_lock_irqsave(&priv->lock, flags);
432 /* set stop master bit */
433 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
435 ret = iwl_poll_bit(priv, CSR_RESET,
436 CSR_RESET_REG_FLAG_MASTER_DISABLED,
437 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
442 spin_unlock_irqrestore(&priv->lock, flags);
443 IWL_DEBUG_INFO("stop master\n");
448 static void iwl4965_apm_stop(struct iwl_priv *priv)
452 iwl4965_apm_stop_master(priv);
454 spin_lock_irqsave(&priv->lock, flags);
456 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
459 /* clear "init complete" move adapter D0A* --> D0U state */
460 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
461 spin_unlock_irqrestore(&priv->lock, flags);
464 static int iwl4965_apm_reset(struct iwl_priv *priv)
469 iwl4965_apm_stop_master(priv);
471 spin_lock_irqsave(&priv->lock, flags);
473 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
477 /* FIXME: put here L1A -L0S w/a */
479 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
481 ret = iwl_poll_bit(priv, CSR_RESET,
482 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
483 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25);
490 ret = iwl_grab_nic_access(priv);
493 /* Enable DMA and BSM Clock */
494 iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT |
495 APMG_CLK_VAL_BSM_CLK_RQT);
500 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
501 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
503 iwl_release_nic_access(priv);
505 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
506 wake_up_interruptible(&priv->wait_command_queue);
509 spin_unlock_irqrestore(&priv->lock, flags);
514 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
515 * Called after every association, but this runs only once!
516 * ... once chain noise is calibrated the first time, it's good forever. */
517 static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
519 struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
521 if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
522 struct iwl_calib_diff_gain_cmd cmd;
524 memset(&cmd, 0, sizeof(cmd));
525 cmd.opCode = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
529 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
531 IWL_ERROR("Could not send REPLY_PHY_CALIBRATION_CMD\n");
532 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
533 IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
537 static void iwl4965_gain_computation(struct iwl_priv *priv,
539 u16 min_average_noise_antenna_i,
540 u32 min_average_noise)
543 struct iwl_chain_noise_data *data = &priv->chain_noise_data;
545 data->delta_gain_code[min_average_noise_antenna_i] = 0;
547 for (i = 0; i < NUM_RX_CHAINS; i++) {
550 if (!(data->disconn_array[i]) &&
551 (data->delta_gain_code[i] ==
552 CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
553 delta_g = average_noise[i] - min_average_noise;
554 data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
555 data->delta_gain_code[i] =
556 min(data->delta_gain_code[i],
557 (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
559 data->delta_gain_code[i] =
560 (data->delta_gain_code[i] | (1 << 2));
562 data->delta_gain_code[i] = 0;
565 IWL_DEBUG_CALIB("delta_gain_codes: a %d b %d c %d\n",
566 data->delta_gain_code[0],
567 data->delta_gain_code[1],
568 data->delta_gain_code[2]);
570 /* Differential gain gets sent to uCode only once */
571 if (!data->radio_write) {
572 struct iwl_calib_diff_gain_cmd cmd;
573 data->radio_write = 1;
575 memset(&cmd, 0, sizeof(cmd));
576 cmd.opCode = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
577 cmd.diff_gain_a = data->delta_gain_code[0];
578 cmd.diff_gain_b = data->delta_gain_code[1];
579 cmd.diff_gain_c = data->delta_gain_code[2];
580 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
583 IWL_DEBUG_CALIB("fail sending cmd "
584 "REPLY_PHY_CALIBRATION_CMD \n");
586 /* TODO we might want recalculate
587 * rx_chain in rxon cmd */
589 /* Mark so we run this algo only once! */
590 data->state = IWL_CHAIN_NOISE_CALIBRATED;
592 data->chain_noise_a = 0;
593 data->chain_noise_b = 0;
594 data->chain_noise_c = 0;
595 data->chain_signal_a = 0;
596 data->chain_signal_b = 0;
597 data->chain_signal_c = 0;
598 data->beacon_count = 0;
601 static void iwl4965_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
604 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
605 *tx_flags |= TX_CMD_FLG_RTS_MSK;
606 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
607 } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
608 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
609 *tx_flags |= TX_CMD_FLG_CTS_MSK;
613 static void iwl4965_bg_txpower_work(struct work_struct *work)
615 struct iwl_priv *priv = container_of(work, struct iwl_priv,
618 /* If a scan happened to start before we got here
619 * then just return; the statistics notification will
620 * kick off another scheduled work to compensate for
621 * any temperature delta we missed here. */
622 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
623 test_bit(STATUS_SCANNING, &priv->status))
626 mutex_lock(&priv->mutex);
628 /* Regardless of if we are associated, we must reconfigure the
629 * TX power since frames can be sent on non-radar channels while
631 iwl4965_send_tx_power(priv);
633 /* Update last_temperature to keep is_calib_needed from running
634 * when it isn't needed... */
635 priv->last_temperature = priv->temperature;
637 mutex_unlock(&priv->mutex);
641 * Acquire priv->lock before calling this function !
643 static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
645 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
646 (index & 0xff) | (txq_id << 8));
647 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
651 * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
652 * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
653 * @scd_retry: (1) Indicates queue will be used in aggregation mode
655 * NOTE: Acquire priv->lock before calling this function !
657 static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
658 struct iwl_tx_queue *txq,
659 int tx_fifo_id, int scd_retry)
661 int txq_id = txq->q.id;
663 /* Find out whether to activate Tx queue */
664 int active = test_bit(txq_id, &priv->txq_ctx_active_msk)?1:0;
666 /* Set up and activate */
667 iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
668 (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
669 (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
670 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
671 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
672 IWL49_SCD_QUEUE_STTS_REG_MSK);
674 txq->sched_retry = scd_retry;
676 IWL_DEBUG_INFO("%s %s Queue %d on AC %d\n",
677 active ? "Activate" : "Deactivate",
678 scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
681 static const u16 default_queue_to_tx_fifo[] = {
691 static int iwl4965_alive_notify(struct iwl_priv *priv)
698 spin_lock_irqsave(&priv->lock, flags);
700 ret = iwl_grab_nic_access(priv);
702 spin_unlock_irqrestore(&priv->lock, flags);
706 /* Clear 4965's internal Tx Scheduler data base */
707 priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
708 a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
709 for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
710 iwl_write_targ_mem(priv, a, 0);
711 for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
712 iwl_write_targ_mem(priv, a, 0);
713 for (; a < sizeof(u16) * priv->hw_params.max_txq_num; a += 4)
714 iwl_write_targ_mem(priv, a, 0);
716 /* Tel 4965 where to find Tx byte count tables */
717 iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
719 offsetof(struct iwl4965_shared, queues_bc_tbls)) >> 10);
721 /* Disable chain mode for all queues */
722 iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
724 /* Initialize each Tx queue (including the command queue) */
725 for (i = 0; i < priv->hw_params.max_txq_num; i++) {
727 /* TFD circular buffer read/write indexes */
728 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
729 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
731 /* Max Tx Window size for Scheduler-ACK mode */
732 iwl_write_targ_mem(priv, priv->scd_base_addr +
733 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
735 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
736 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
739 iwl_write_targ_mem(priv, priv->scd_base_addr +
740 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
743 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
744 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
747 iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
748 (1 << priv->hw_params.max_txq_num) - 1);
750 /* Activate all Tx DMA/FIFO channels */
751 priv->cfg->ops->lib->txq_set_sched(priv, IWL_MASK(0, 7));
753 iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
755 /* Map each Tx/cmd queue to its corresponding fifo */
756 for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
757 int ac = default_queue_to_tx_fifo[i];
758 iwl_txq_ctx_activate(priv, i);
759 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
762 iwl_release_nic_access(priv);
763 spin_unlock_irqrestore(&priv->lock, flags);
768 static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
772 .auto_corr_min_ofdm = 85,
773 .auto_corr_min_ofdm_mrc = 170,
774 .auto_corr_min_ofdm_x1 = 105,
775 .auto_corr_min_ofdm_mrc_x1 = 220,
777 .auto_corr_max_ofdm = 120,
778 .auto_corr_max_ofdm_mrc = 210,
779 .auto_corr_max_ofdm_x1 = 140,
780 .auto_corr_max_ofdm_mrc_x1 = 270,
782 .auto_corr_min_cck = 125,
783 .auto_corr_max_cck = 200,
784 .auto_corr_min_cck_mrc = 200,
785 .auto_corr_max_cck_mrc = 400,
792 * iwl4965_hw_set_hw_params
794 * Called when initializing driver
796 static int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
799 if ((priv->cfg->mod_params->num_of_queues > IWL49_NUM_QUEUES) ||
800 (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) {
801 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
802 IWL_MIN_NUM_QUEUES, IWL49_NUM_QUEUES);
806 priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues;
807 priv->hw_params.max_stations = IWL4965_STATION_COUNT;
808 priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
809 priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
810 priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
811 priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
812 priv->hw_params.fat_channel = BIT(IEEE80211_BAND_5GHZ);
814 priv->hw_params.tx_chains_num = 2;
815 priv->hw_params.rx_chains_num = 2;
816 priv->hw_params.valid_tx_ant = ANT_A | ANT_B;
817 priv->hw_params.valid_rx_ant = ANT_A | ANT_B;
818 priv->hw_params.ct_kill_threshold = CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD);
820 priv->hw_params.sens = &iwl4965_sensitivity;
825 static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
838 *res = ((num * 2 + denom) / (denom * 2)) * sign;
844 * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
846 * Determines power supply voltage compensation for txpower calculations.
847 * Returns number of 1/2-dB steps to subtract from gain table index,
848 * to compensate for difference between power supply voltage during
849 * factory measurements, vs. current power supply voltage.
851 * Voltage indication is higher for lower voltage.
852 * Lower voltage requires more gain (lower gain table index).
854 static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
859 if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
860 (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
863 iwl4965_math_div_round(current_voltage - eeprom_voltage,
864 TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
866 if (current_voltage > eeprom_voltage)
868 if ((comp < -2) || (comp > 2))
874 static s32 iwl4965_get_tx_atten_grp(u16 channel)
876 if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
877 channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
878 return CALIB_CH_GROUP_5;
880 if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
881 channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
882 return CALIB_CH_GROUP_1;
884 if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
885 channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
886 return CALIB_CH_GROUP_2;
888 if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
889 channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
890 return CALIB_CH_GROUP_3;
892 if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
893 channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
894 return CALIB_CH_GROUP_4;
896 IWL_ERROR("Can't find txatten group for channel %d.\n", channel);
900 static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
904 for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
905 if (priv->calib_info->band_info[b].ch_from == 0)
908 if ((channel >= priv->calib_info->band_info[b].ch_from)
909 && (channel <= priv->calib_info->band_info[b].ch_to))
916 static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
923 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
929 * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
931 * Interpolates factory measurements from the two sample channels within a
932 * sub-band, to apply to channel of interest. Interpolation is proportional to
933 * differences in channel frequencies, which is proportional to differences
936 static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
937 struct iwl_eeprom_calib_ch_info *chan_info)
942 const struct iwl_eeprom_calib_measure *m1;
943 const struct iwl_eeprom_calib_measure *m2;
944 struct iwl_eeprom_calib_measure *omeas;
948 s = iwl4965_get_sub_band(priv, channel);
949 if (s >= EEPROM_TX_POWER_BANDS) {
950 IWL_ERROR("Tx Power can not find channel %d\n", channel);
954 ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
955 ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
956 chan_info->ch_num = (u8) channel;
958 IWL_DEBUG_TXPOWER("channel %d subband %d factory cal ch %d & %d\n",
959 channel, s, ch_i1, ch_i2);
961 for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
962 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
963 m1 = &(priv->calib_info->band_info[s].ch1.
965 m2 = &(priv->calib_info->band_info[s].ch2.
967 omeas = &(chan_info->measurements[c][m]);
970 (u8) iwl4965_interpolate_value(channel, ch_i1,
975 (u8) iwl4965_interpolate_value(channel, ch_i1,
979 (u8) iwl4965_interpolate_value(channel, ch_i1,
984 (s8) iwl4965_interpolate_value(channel, ch_i1,
989 ("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
990 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
992 ("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
993 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
995 ("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
996 m1->pa_det, m2->pa_det, omeas->pa_det);
998 ("chain %d meas %d T1=%d T2=%d T=%d\n", c, m,
999 m1->temperature, m2->temperature,
1000 omeas->temperature);
1007 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
1008 * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
1009 static s32 back_off_table[] = {
1010 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
1011 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
1012 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
1013 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
1017 /* Thermal compensation values for txpower for various frequency ranges ...
1018 * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
1019 static struct iwl4965_txpower_comp_entry {
1020 s32 degrees_per_05db_a;
1021 s32 degrees_per_05db_a_denom;
1022 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
1023 {9, 2}, /* group 0 5.2, ch 34-43 */
1024 {4, 1}, /* group 1 5.2, ch 44-70 */
1025 {4, 1}, /* group 2 5.2, ch 71-124 */
1026 {4, 1}, /* group 3 5.2, ch 125-200 */
1027 {3, 1} /* group 4 2.4, ch all */
1030 static s32 get_min_power_index(s32 rate_power_index, u32 band)
1033 if ((rate_power_index & 7) <= 4)
1034 return MIN_TX_GAIN_INDEX_52GHZ_EXT;
1036 return MIN_TX_GAIN_INDEX;
1044 static const struct gain_entry gain_table[2][108] = {
1045 /* 5.2GHz power gain index table */
1047 {123, 0x3F}, /* highest txpower */
1156 /* 2.4GHz power gain index table */
1158 {110, 0x3f}, /* highest txpower */
1269 static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
1270 u8 is_fat, u8 ctrl_chan_high,
1271 struct iwl4965_tx_power_db *tx_power_tbl)
1273 u8 saturation_power;
1275 s32 user_target_power;
1279 s32 current_regulatory;
1280 s32 txatten_grp = CALIB_CH_GROUP_MAX;
1283 const struct iwl_channel_info *ch_info = NULL;
1284 struct iwl_eeprom_calib_ch_info ch_eeprom_info;
1285 const struct iwl_eeprom_calib_measure *measurement;
1288 s32 voltage_compensation;
1289 s32 degrees_per_05db_num;
1290 s32 degrees_per_05db_denom;
1292 s32 temperature_comp[2];
1293 s32 factory_gain_index[2];
1294 s32 factory_actual_pwr[2];
1297 /* user_txpower_limit is in dBm, convert to half-dBm (half-dB units
1298 * are used for indexing into txpower table) */
1299 user_target_power = 2 * priv->tx_power_user_lmt;
1301 /* Get current (RXON) channel, band, width */
1302 IWL_DEBUG_TXPOWER("chan %d band %d is_fat %d\n", channel, band,
1305 ch_info = iwl_get_channel_info(priv, priv->band, channel);
1307 if (!is_channel_valid(ch_info))
1310 /* get txatten group, used to select 1) thermal txpower adjustment
1311 * and 2) mimo txpower balance between Tx chains. */
1312 txatten_grp = iwl4965_get_tx_atten_grp(channel);
1313 if (txatten_grp < 0)
1316 IWL_DEBUG_TXPOWER("channel %d belongs to txatten group %d\n",
1317 channel, txatten_grp);
1326 /* hardware txpower limits ...
1327 * saturation (clipping distortion) txpowers are in half-dBm */
1329 saturation_power = priv->calib_info->saturation_power24;
1331 saturation_power = priv->calib_info->saturation_power52;
1333 if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
1334 saturation_power > IWL_TX_POWER_SATURATION_MAX) {
1336 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
1338 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
1341 /* regulatory txpower limits ... reg_limit values are in half-dBm,
1342 * max_power_avg values are in dBm, convert * 2 */
1344 reg_limit = ch_info->fat_max_power_avg * 2;
1346 reg_limit = ch_info->max_power_avg * 2;
1348 if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
1349 (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
1351 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
1353 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
1356 /* Interpolate txpower calibration values for this channel,
1357 * based on factory calibration tests on spaced channels. */
1358 iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1360 /* calculate tx gain adjustment based on power supply voltage */
1361 voltage = priv->calib_info->voltage;
1362 init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1363 voltage_compensation =
1364 iwl4965_get_voltage_compensation(voltage, init_voltage);
1366 IWL_DEBUG_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n",
1368 voltage, voltage_compensation);
1370 /* get current temperature (Celsius) */
1371 current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
1372 current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
1373 current_temp = KELVIN_TO_CELSIUS(current_temp);
1375 /* select thermal txpower adjustment params, based on channel group
1376 * (same frequency group used for mimo txatten adjustment) */
1377 degrees_per_05db_num =
1378 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1379 degrees_per_05db_denom =
1380 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1382 /* get per-chain txpower values from factory measurements */
1383 for (c = 0; c < 2; c++) {
1384 measurement = &ch_eeprom_info.measurements[c][1];
1386 /* txgain adjustment (in half-dB steps) based on difference
1387 * between factory and current temperature */
1388 factory_temp = measurement->temperature;
1389 iwl4965_math_div_round((current_temp - factory_temp) *
1390 degrees_per_05db_denom,
1391 degrees_per_05db_num,
1392 &temperature_comp[c]);
1394 factory_gain_index[c] = measurement->gain_idx;
1395 factory_actual_pwr[c] = measurement->actual_pow;
1397 IWL_DEBUG_TXPOWER("chain = %d\n", c);
1398 IWL_DEBUG_TXPOWER("fctry tmp %d, "
1399 "curr tmp %d, comp %d steps\n",
1400 factory_temp, current_temp,
1401 temperature_comp[c]);
1403 IWL_DEBUG_TXPOWER("fctry idx %d, fctry pwr %d\n",
1404 factory_gain_index[c],
1405 factory_actual_pwr[c]);
1408 /* for each of 33 bit-rates (including 1 for CCK) */
1409 for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
1411 union iwl4965_tx_power_dual_stream tx_power;
1413 /* for mimo, reduce each chain's txpower by half
1414 * (3dB, 6 steps), so total output power is regulatory
1417 current_regulatory = reg_limit -
1418 IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1421 current_regulatory = reg_limit;
1425 /* find txpower limit, either hardware or regulatory */
1426 power_limit = saturation_power - back_off_table[i];
1427 if (power_limit > current_regulatory)
1428 power_limit = current_regulatory;
1430 /* reduce user's txpower request if necessary
1431 * for this rate on this channel */
1432 target_power = user_target_power;
1433 if (target_power > power_limit)
1434 target_power = power_limit;
1436 IWL_DEBUG_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n",
1437 i, saturation_power - back_off_table[i],
1438 current_regulatory, user_target_power,
1441 /* for each of 2 Tx chains (radio transmitters) */
1442 for (c = 0; c < 2; c++) {
1447 (s32)le32_to_cpu(priv->card_alive_init.
1448 tx_atten[txatten_grp][c]);
1452 /* calculate index; higher index means lower txpower */
1453 power_index = (u8) (factory_gain_index[c] -
1455 factory_actual_pwr[c]) -
1456 temperature_comp[c] -
1457 voltage_compensation +
1460 /* IWL_DEBUG_TXPOWER("calculated txpower index %d\n",
1463 if (power_index < get_min_power_index(i, band))
1464 power_index = get_min_power_index(i, band);
1466 /* adjust 5 GHz index to support negative indexes */
1470 /* CCK, rate 32, reduce txpower for CCK */
1471 if (i == POWER_TABLE_CCK_ENTRY)
1473 IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
1475 /* stay within the table! */
1476 if (power_index > 107) {
1477 IWL_WARNING("txpower index %d > 107\n",
1481 if (power_index < 0) {
1482 IWL_WARNING("txpower index %d < 0\n",
1487 /* fill txpower command for this rate/chain */
1488 tx_power.s.radio_tx_gain[c] =
1489 gain_table[band][power_index].radio;
1490 tx_power.s.dsp_predis_atten[c] =
1491 gain_table[band][power_index].dsp;
1493 IWL_DEBUG_TXPOWER("chain %d mimo %d index %d "
1494 "gain 0x%02x dsp %d\n",
1495 c, atten_value, power_index,
1496 tx_power.s.radio_tx_gain[c],
1497 tx_power.s.dsp_predis_atten[c]);
1498 } /* for each chain */
1500 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1502 } /* for each rate */
1508 * iwl4965_send_tx_power - Configure the TXPOWER level user limit
1510 * Uses the active RXON for channel, band, and characteristics (fat, high)
1511 * The power limit is taken from priv->tx_power_user_lmt.
1513 static int iwl4965_send_tx_power(struct iwl_priv *priv)
1515 struct iwl4965_txpowertable_cmd cmd = { 0 };
1519 u8 ctrl_chan_high = 0;
1521 if (test_bit(STATUS_SCANNING, &priv->status)) {
1522 /* If this gets hit a lot, switch it to a BUG() and catch
1523 * the stack trace to find out who is calling this during
1525 IWL_WARNING("TX Power requested while scanning!\n");
1529 band = priv->band == IEEE80211_BAND_2GHZ;
1531 is_fat = is_fat_channel(priv->active_rxon.flags);
1534 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1538 cmd.channel = priv->active_rxon.channel;
1540 ret = iwl4965_fill_txpower_tbl(priv, band,
1541 le16_to_cpu(priv->active_rxon.channel),
1542 is_fat, ctrl_chan_high, &cmd.tx_power);
1546 ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
1552 static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
1555 struct iwl4965_rxon_assoc_cmd rxon_assoc;
1556 const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
1557 const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
1559 if ((rxon1->flags == rxon2->flags) &&
1560 (rxon1->filter_flags == rxon2->filter_flags) &&
1561 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1562 (rxon1->ofdm_ht_single_stream_basic_rates ==
1563 rxon2->ofdm_ht_single_stream_basic_rates) &&
1564 (rxon1->ofdm_ht_dual_stream_basic_rates ==
1565 rxon2->ofdm_ht_dual_stream_basic_rates) &&
1566 (rxon1->rx_chain == rxon2->rx_chain) &&
1567 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1568 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1572 rxon_assoc.flags = priv->staging_rxon.flags;
1573 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1574 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1575 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1576 rxon_assoc.reserved = 0;
1577 rxon_assoc.ofdm_ht_single_stream_basic_rates =
1578 priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1579 rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1580 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1581 rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1583 ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
1584 sizeof(rxon_assoc), &rxon_assoc, NULL);
1591 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
1592 static int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1597 u8 ctrl_chan_high = 0;
1598 struct iwl4965_channel_switch_cmd cmd = { 0 };
1599 const struct iwl_channel_info *ch_info;
1601 band = priv->band == IEEE80211_BAND_2GHZ;
1603 ch_info = iwl_get_channel_info(priv, priv->band, channel);
1605 is_fat = is_fat_channel(priv->staging_rxon.flags);
1608 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1612 cmd.expect_beacon = 0;
1613 cmd.channel = cpu_to_le16(channel);
1614 cmd.rxon_flags = priv->active_rxon.flags;
1615 cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
1616 cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1618 cmd.expect_beacon = is_channel_radar(ch_info);
1620 cmd.expect_beacon = 1;
1622 rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_fat,
1623 ctrl_chan_high, &cmd.tx_power);
1625 IWL_DEBUG_11H("error:%d fill txpower_tbl\n", rc);
1629 rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1634 static int iwl4965_shared_mem_rx_idx(struct iwl_priv *priv)
1636 struct iwl4965_shared *s = priv->shared_virt;
1637 return le32_to_cpu(s->rb_closed) & 0xFFF;
1640 static int iwl4965_alloc_shared_mem(struct iwl_priv *priv)
1642 priv->shared_virt = pci_alloc_consistent(priv->pci_dev,
1643 sizeof(struct iwl4965_shared),
1644 &priv->shared_phys);
1645 if (!priv->shared_virt)
1648 memset(priv->shared_virt, 0, sizeof(struct iwl4965_shared));
1650 priv->rb_closed_offset = offsetof(struct iwl4965_shared, rb_closed);
1655 static void iwl4965_free_shared_mem(struct iwl_priv *priv)
1657 if (priv->shared_virt)
1658 pci_free_consistent(priv->pci_dev,
1659 sizeof(struct iwl4965_shared),
1665 * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1667 static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
1668 struct iwl_tx_queue *txq,
1671 struct iwl4965_shared *shared_data = priv->shared_virt;
1672 int txq_id = txq->q.id;
1673 int write_ptr = txq->q.write_ptr;
1674 int len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
1677 WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
1679 bc_ent = cpu_to_le16(len & 0xFFF);
1680 /* Set up byte count within first 256 entries */
1681 shared_data->queues_bc_tbls[txq_id].tfd_offset[write_ptr] = bc_ent;
1683 /* If within first 64 entries, duplicate at end */
1684 if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
1685 shared_data->queues_bc_tbls[txq_id].
1686 tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent;
1690 * sign_extend - Sign extend a value using specified bit as sign-bit
1692 * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
1693 * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
1695 * @param oper value to sign extend
1696 * @param index 0 based bit index (0<=index<32) to sign bit
1698 static s32 sign_extend(u32 oper, int index)
1700 u8 shift = 31 - index;
1702 return (s32)(oper << shift) >> shift;
1706 * iwl4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
1707 * @statistics: Provides the temperature reading from the uCode
1709 * A return of <0 indicates bogus data in the statistics
1711 static int iwl4965_hw_get_temperature(const struct iwl_priv *priv)
1718 if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
1719 (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)) {
1720 IWL_DEBUG_TEMP("Running FAT temperature calibration\n");
1721 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
1722 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
1723 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
1724 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
1726 IWL_DEBUG_TEMP("Running temperature calibration\n");
1727 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
1728 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
1729 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
1730 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
1734 * Temperature is only 23 bits, so sign extend out to 32.
1736 * NOTE If we haven't received a statistics notification yet
1737 * with an updated temperature, use R4 provided to us in the
1738 * "initialize" ALIVE response.
1740 if (!test_bit(STATUS_TEMPERATURE, &priv->status))
1741 vt = sign_extend(R4, 23);
1744 le32_to_cpu(priv->statistics.general.temperature), 23);
1746 IWL_DEBUG_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
1749 IWL_ERROR("Calibration conflict R1 == R3\n");
1753 /* Calculate temperature in degrees Kelvin, adjust by 97%.
1754 * Add offset to center the adjustment around 0 degrees Centigrade. */
1755 temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
1756 temperature /= (R3 - R1);
1757 temperature = (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET;
1759 IWL_DEBUG_TEMP("Calibrated temperature: %dK, %dC\n",
1760 temperature, KELVIN_TO_CELSIUS(temperature));
1765 /* Adjust Txpower only if temperature variance is greater than threshold. */
1766 #define IWL_TEMPERATURE_THRESHOLD 3
1769 * iwl4965_is_temp_calib_needed - determines if new calibration is needed
1771 * If the temperature changed has changed sufficiently, then a recalibration
1774 * Assumes caller will replace priv->last_temperature once calibration
1777 static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
1781 if (!test_bit(STATUS_STATISTICS, &priv->status)) {
1782 IWL_DEBUG_TEMP("Temperature not updated -- no statistics.\n");
1786 temp_diff = priv->temperature - priv->last_temperature;
1788 /* get absolute value */
1789 if (temp_diff < 0) {
1790 IWL_DEBUG_POWER("Getting cooler, delta %d, \n", temp_diff);
1791 temp_diff = -temp_diff;
1792 } else if (temp_diff == 0)
1793 IWL_DEBUG_POWER("Same temp, \n");
1795 IWL_DEBUG_POWER("Getting warmer, delta %d, \n", temp_diff);
1797 if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
1798 IWL_DEBUG_POWER("Thermal txpower calib not needed\n");
1802 IWL_DEBUG_POWER("Thermal txpower calib needed\n");
1807 static void iwl4965_temperature_calib(struct iwl_priv *priv)
1811 temp = iwl4965_hw_get_temperature(priv);
1815 if (priv->temperature != temp) {
1816 if (priv->temperature)
1817 IWL_DEBUG_TEMP("Temperature changed "
1818 "from %dC to %dC\n",
1819 KELVIN_TO_CELSIUS(priv->temperature),
1820 KELVIN_TO_CELSIUS(temp));
1822 IWL_DEBUG_TEMP("Temperature "
1823 "initialized to %dC\n",
1824 KELVIN_TO_CELSIUS(temp));
1827 priv->temperature = temp;
1828 set_bit(STATUS_TEMPERATURE, &priv->status);
1830 if (!priv->disable_tx_power_cal &&
1831 unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
1832 iwl4965_is_temp_calib_needed(priv))
1833 queue_work(priv->workqueue, &priv->txpower_work);
1837 * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
1839 static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
1842 /* Simply stop the queue, but don't change any configuration;
1843 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
1844 iwl_write_prph(priv,
1845 IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
1846 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
1847 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
1851 * txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE
1852 * priv->lock must be held by the caller
1854 static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
1855 u16 ssn_idx, u8 tx_fifo)
1859 if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1860 (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) {
1861 IWL_WARNING("queue number out of range: %d, must be %d to %d\n",
1862 txq_id, IWL49_FIRST_AMPDU_QUEUE,
1863 IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1);
1867 ret = iwl_grab_nic_access(priv);
1871 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1873 iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1875 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1876 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1877 /* supposes that ssn_idx is valid (!= 0xFFF) */
1878 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1880 iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1881 iwl_txq_ctx_deactivate(priv, txq_id);
1882 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
1884 iwl_release_nic_access(priv);
1890 * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
1892 static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
1899 scd_q2ratid = ra_tid & IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
1901 tbl_dw_addr = priv->scd_base_addr +
1902 IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
1904 tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
1907 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
1909 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
1911 iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
1918 * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
1920 * NOTE: txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE,
1921 * i.e. it must be one of the higher queues used for aggregation
1923 static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id,
1924 int tx_fifo, int sta_id, int tid, u16 ssn_idx)
1926 unsigned long flags;
1930 if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1931 (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) {
1932 IWL_WARNING("queue number out of range: %d, must be %d to %d\n",
1933 txq_id, IWL49_FIRST_AMPDU_QUEUE,
1934 IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1);
1938 ra_tid = BUILD_RAxTID(sta_id, tid);
1940 /* Modify device's station table to Tx this TID */
1941 iwl_sta_modify_enable_tid_tx(priv, sta_id, tid);
1943 spin_lock_irqsave(&priv->lock, flags);
1944 ret = iwl_grab_nic_access(priv);
1946 spin_unlock_irqrestore(&priv->lock, flags);
1950 /* Stop this Tx queue before configuring it */
1951 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1953 /* Map receiver-address / traffic-ID to this queue */
1954 iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
1956 /* Set this queue as a chain-building queue */
1957 iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1959 /* Place first TFD at index corresponding to start sequence number.
1960 * Assumes that ssn_idx is valid (!= 0xFFF) */
1961 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1962 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1963 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1965 /* Set up Tx window size and frame limit for this queue */
1966 iwl_write_targ_mem(priv,
1967 priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
1968 (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
1969 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
1971 iwl_write_targ_mem(priv, priv->scd_base_addr +
1972 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
1973 (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
1974 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
1976 iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1978 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
1979 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
1981 iwl_release_nic_access(priv);
1982 spin_unlock_irqrestore(&priv->lock, flags);
1988 static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len)
1992 return (u16) sizeof(struct iwl4965_rxon_cmd);
1998 static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
2000 struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
2001 addsta->mode = cmd->mode;
2002 memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
2003 memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
2004 addsta->station_flags = cmd->station_flags;
2005 addsta->station_flags_msk = cmd->station_flags_msk;
2006 addsta->tid_disable_tx = cmd->tid_disable_tx;
2007 addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
2008 addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
2009 addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
2010 addsta->reserved1 = __constant_cpu_to_le16(0);
2011 addsta->reserved2 = __constant_cpu_to_le32(0);
2013 return (u16)sizeof(struct iwl4965_addsta_cmd);
2016 static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
2018 return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
2022 * iwl4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
2024 static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
2025 struct iwl_ht_agg *agg,
2026 struct iwl4965_tx_resp *tx_resp,
2027 int txq_id, u16 start_idx)
2030 struct agg_tx_status *frame_status = tx_resp->u.agg_status;
2031 struct ieee80211_tx_info *info = NULL;
2032 struct ieee80211_hdr *hdr = NULL;
2033 u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
2036 if (agg->wait_for_ba)
2037 IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
2039 agg->frame_count = tx_resp->frame_count;
2040 agg->start_idx = start_idx;
2041 agg->rate_n_flags = rate_n_flags;
2044 /* num frames attempted by Tx command */
2045 if (agg->frame_count == 1) {
2046 /* Only one frame was attempted; no block-ack will arrive */
2047 status = le16_to_cpu(frame_status[0].status);
2050 /* FIXME: code repetition */
2051 IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
2052 agg->frame_count, agg->start_idx, idx);
2054 info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]);
2055 info->status.rates[0].count = tx_resp->failure_frame + 1;
2056 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
2057 info->flags |= iwl_is_tx_success(status)?
2058 IEEE80211_TX_STAT_ACK : 0;
2059 iwl_hwrate_to_tx_control(priv, rate_n_flags, info);
2060 /* FIXME: code repetition end */
2062 IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
2063 status & 0xff, tx_resp->failure_frame);
2064 IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n", rate_n_flags);
2066 agg->wait_for_ba = 0;
2068 /* Two or more frames were attempted; expect block-ack */
2070 int start = agg->start_idx;
2072 /* Construct bit-map of pending frames within Tx window */
2073 for (i = 0; i < agg->frame_count; i++) {
2075 status = le16_to_cpu(frame_status[i].status);
2076 seq = le16_to_cpu(frame_status[i].sequence);
2077 idx = SEQ_TO_INDEX(seq);
2078 txq_id = SEQ_TO_QUEUE(seq);
2080 if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
2081 AGG_TX_STATE_ABORT_MSK))
2084 IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
2085 agg->frame_count, txq_id, idx);
2087 hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
2089 sc = le16_to_cpu(hdr->seq_ctrl);
2090 if (idx != (SEQ_TO_SN(sc) & 0xff)) {
2091 IWL_ERROR("BUG_ON idx doesn't match seq control"
2092 " idx=%d, seq_idx=%d, seq=%d\n",
2098 IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
2099 i, idx, SEQ_TO_SN(sc));
2103 sh = (start - idx) + 0xff;
2104 bitmap = bitmap << sh;
2107 } else if (sh < -64)
2108 sh = 0xff - (start - idx);
2112 bitmap = bitmap << sh;
2115 bitmap |= 1ULL << sh;
2116 IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%llx\n",
2117 start, (unsigned long long)bitmap);
2120 agg->bitmap = bitmap;
2121 agg->start_idx = start;
2122 IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
2123 agg->frame_count, agg->start_idx,
2124 (unsigned long long)agg->bitmap);
2127 agg->wait_for_ba = 1;
2133 * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
2135 static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
2136 struct iwl_rx_mem_buffer *rxb)
2138 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2139 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
2140 int txq_id = SEQ_TO_QUEUE(sequence);
2141 int index = SEQ_TO_INDEX(sequence);
2142 struct iwl_tx_queue *txq = &priv->txq[txq_id];
2143 struct ieee80211_hdr *hdr;
2144 struct ieee80211_tx_info *info;
2145 struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
2146 u32 status = le32_to_cpu(tx_resp->u.status);
2147 int tid = MAX_TID_COUNT;
2152 if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
2153 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
2154 "is out of range [0-%d] %d %d\n", txq_id,
2155 index, txq->q.n_bd, txq->q.write_ptr,
2160 info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
2161 memset(&info->status, 0, sizeof(info->status));
2163 hdr = iwl_tx_queue_get_hdr(priv, txq_id, index);
2164 if (ieee80211_is_data_qos(hdr->frame_control)) {
2165 qc = ieee80211_get_qos_ctl(hdr);
2169 sta_id = iwl_get_ra_sta_id(priv, hdr);
2170 if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
2171 IWL_ERROR("Station not known\n");
2175 if (txq->sched_retry) {
2176 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
2177 struct iwl_ht_agg *agg = NULL;
2181 agg = &priv->stations[sta_id].tid[tid].agg;
2183 iwl4965_tx_status_reply_tx(priv, agg, tx_resp, txq_id, index);
2185 /* check if BAR is needed */
2186 if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status))
2187 info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
2189 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
2190 index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
2191 IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
2192 "%d index %d\n", scd_ssn , index);
2193 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2194 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2196 if (priv->mac80211_registered &&
2197 (iwl_queue_space(&txq->q) > txq->q.low_mark) &&
2198 (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)) {
2199 if (agg->state == IWL_AGG_OFF)
2200 ieee80211_wake_queue(priv->hw, txq_id);
2202 ieee80211_wake_queue(priv->hw,
2207 info->status.rates[0].count = tx_resp->failure_frame + 1;
2208 info->flags |= iwl_is_tx_success(status) ?
2209 IEEE80211_TX_STAT_ACK : 0;
2210 iwl_hwrate_to_tx_control(priv,
2211 le32_to_cpu(tx_resp->rate_n_flags),
2214 IWL_DEBUG_TX_REPLY("TXQ %d status %s (0x%08x) "
2215 "rate_n_flags 0x%x retries %d\n",
2217 iwl_get_tx_fail_reason(status), status,
2218 le32_to_cpu(tx_resp->rate_n_flags),
2219 tx_resp->failure_frame);
2221 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2222 if (qc && likely(sta_id != IWL_INVALID_STATION))
2223 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2225 if (priv->mac80211_registered &&
2226 (iwl_queue_space(&txq->q) > txq->q.low_mark))
2227 ieee80211_wake_queue(priv->hw, txq_id);
2230 if (qc && likely(sta_id != IWL_INVALID_STATION))
2231 iwl_txq_check_empty(priv, sta_id, tid, txq_id);
2233 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
2234 IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
2237 static int iwl4965_calc_rssi(struct iwl_priv *priv,
2238 struct iwl_rx_phy_res *rx_resp)
2240 /* data from PHY/DSP regarding signal strength, etc.,
2241 * contents are always there, not configurable by host. */
2242 struct iwl4965_rx_non_cfg_phy *ncphy =
2243 (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy_buf;
2244 u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL49_AGC_DB_MASK)
2245 >> IWL49_AGC_DB_POS;
2247 u32 valid_antennae =
2248 (le16_to_cpu(rx_resp->phy_flags) & IWL49_RX_PHY_FLAGS_ANTENNAE_MASK)
2249 >> IWL49_RX_PHY_FLAGS_ANTENNAE_OFFSET;
2253 /* Find max rssi among 3 possible receivers.
2254 * These values are measured by the digital signal processor (DSP).
2255 * They should stay fairly constant even as the signal strength varies,
2256 * if the radio's automatic gain control (AGC) is working right.
2257 * AGC value (see below) will provide the "interesting" info. */
2258 for (i = 0; i < 3; i++)
2259 if (valid_antennae & (1 << i))
2260 max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
2262 IWL_DEBUG_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
2263 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
2266 /* dBm = max_rssi dB - agc dB - constant.
2267 * Higher AGC (higher radio gain) means lower signal. */
2268 return max_rssi - agc - IWL_RSSI_OFFSET;
2272 /* Set up 4965-specific Rx frame reply handlers */
2273 static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
2275 /* Legacy Rx frames */
2276 priv->rx_handlers[REPLY_RX] = iwl_rx_reply_rx;
2278 priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
2281 static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
2283 INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
2286 static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
2288 cancel_work_sync(&priv->txpower_work);
2292 static struct iwl_hcmd_ops iwl4965_hcmd = {
2293 .rxon_assoc = iwl4965_send_rxon_assoc,
2296 static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
2297 .get_hcmd_size = iwl4965_get_hcmd_size,
2298 .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
2299 .chain_noise_reset = iwl4965_chain_noise_reset,
2300 .gain_computation = iwl4965_gain_computation,
2301 .rts_tx_cmd_flag = iwl4965_rts_tx_cmd_flag,
2302 .calc_rssi = iwl4965_calc_rssi,
2305 static struct iwl_lib_ops iwl4965_lib = {
2306 .set_hw_params = iwl4965_hw_set_hw_params,
2307 .alloc_shared_mem = iwl4965_alloc_shared_mem,
2308 .free_shared_mem = iwl4965_free_shared_mem,
2309 .shared_mem_rx_idx = iwl4965_shared_mem_rx_idx,
2310 .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
2311 .txq_set_sched = iwl4965_txq_set_sched,
2312 .txq_agg_enable = iwl4965_txq_agg_enable,
2313 .txq_agg_disable = iwl4965_txq_agg_disable,
2314 .rx_handler_setup = iwl4965_rx_handler_setup,
2315 .setup_deferred_work = iwl4965_setup_deferred_work,
2316 .cancel_deferred_work = iwl4965_cancel_deferred_work,
2317 .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
2318 .alive_notify = iwl4965_alive_notify,
2319 .init_alive_start = iwl4965_init_alive_start,
2320 .load_ucode = iwl4965_load_bsm,
2322 .init = iwl4965_apm_init,
2323 .reset = iwl4965_apm_reset,
2324 .stop = iwl4965_apm_stop,
2325 .config = iwl4965_nic_config,
2326 .set_pwr_src = iwl4965_set_pwr_src,
2329 .regulatory_bands = {
2330 EEPROM_REGULATORY_BAND_1_CHANNELS,
2331 EEPROM_REGULATORY_BAND_2_CHANNELS,
2332 EEPROM_REGULATORY_BAND_3_CHANNELS,
2333 EEPROM_REGULATORY_BAND_4_CHANNELS,
2334 EEPROM_REGULATORY_BAND_5_CHANNELS,
2335 EEPROM_4965_REGULATORY_BAND_24_FAT_CHANNELS,
2336 EEPROM_4965_REGULATORY_BAND_52_FAT_CHANNELS
2338 .verify_signature = iwlcore_eeprom_verify_signature,
2339 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
2340 .release_semaphore = iwlcore_eeprom_release_semaphore,
2341 .calib_version = iwl4965_eeprom_calib_version,
2342 .query_addr = iwlcore_eeprom_query_addr,
2344 .send_tx_power = iwl4965_send_tx_power,
2345 .update_chain_flags = iwl4965_update_chain_flags,
2346 .temperature = iwl4965_temperature_calib,
2349 static struct iwl_ops iwl4965_ops = {
2350 .lib = &iwl4965_lib,
2351 .hcmd = &iwl4965_hcmd,
2352 .utils = &iwl4965_hcmd_utils,
2355 struct iwl_cfg iwl4965_agn_cfg = {
2357 .fw_name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode",
2358 .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
2359 .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
2360 .eeprom_ver = EEPROM_4965_EEPROM_VERSION,
2361 .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION,
2362 .ops = &iwl4965_ops,
2363 .mod_params = &iwl4965_mod_params,
2366 /* Module firmware */
2367 MODULE_FIRMWARE("iwlwifi-4965" IWL4965_UCODE_API ".ucode");
2369 module_param_named(antenna, iwl4965_mod_params.antenna, int, 0444);
2370 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
2371 module_param_named(disable, iwl4965_mod_params.disable, int, 0444);
2372 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
2373 module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, 0444);
2374 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
2375 module_param_named(debug, iwl4965_mod_params.debug, int, 0444);
2376 MODULE_PARM_DESC(debug, "debug output mask");
2378 disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, 0444);
2379 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
2381 module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, 0444);
2382 MODULE_PARM_DESC(queues_num, "number of hw queues.");
2384 module_param_named(qos_enable, iwl4965_mod_params.enable_qos, int, 0444);
2385 MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
2387 module_param_named(11n_disable, iwl4965_mod_params.disable_11n, int, 0444);
2388 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
2389 module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K, int, 0444);
2390 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
2392 module_param_named(fw_restart4965, iwl4965_mod_params.restart_fw, int, 0444);
2393 MODULE_PARM_DESC(fw_restart4965, "restart firmware in case of error");