SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/net/wireless/iwlwifi/iwl-4965.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/init.h>
  30 #include <linux/pci.h>
  31 #include <linux/dma-mapping.h>
  32 #include <linux/delay.h>
  33 #include <linux/skbuff.h>
  34 #include <linux/netdevice.h>
  35 #include <linux/wireless.h>
  36 #include <net/mac80211.h>
  37 #include <linux/etherdevice.h>
  38 #include <asm/unaligned.h>
  39
  40 #include "iwl-eeprom.h"
  41 #include "iwl-dev.h"
  42 #include "iwl-core.h"
  43 #include "iwl-io.h"
  44 #include "iwl-helpers.h"
  45 #include "iwl-calib.h"
  46 #include "iwl-sta.h"
  47
  48 static int iwl4965_send_tx_power(struct iwl_priv *priv);
  49 static int iwl4965_hw_get_temperature(const struct iwl_priv *priv);
  50
  51 /* Change firmware file name, using "-" and incrementing number,
  52  *   *only* when uCode interface or architecture changes so that it
  53  *   is not compatible with earlier drivers.
  54  * This number will also appear in << 8 position of 1st dword of uCode file */
  55 #define IWL4965_UCODE_API "-2"
  56
  57
  58 /* module parameters */
  59 static struct iwl_mod_params iwl4965_mod_params = {
  60         .num_of_queues = IWL49_NUM_QUEUES,
  61         .num_of_ampdu_queues = IWL49_NUM_AMPDU_QUEUES,
  62         .enable_qos = 1,
  63         .amsdu_size_8K = 1,
  64         .restart_fw = 1,
  65         /* the rest are 0 by default */
  66 };
  67
  68 /* check contents of special bootstrap uCode SRAM */
  69 static int iwl4965_verify_bsm(struct iwl_priv *priv)
  70 {
  71         __le32 *image = priv->ucode_boot.v_addr;
  72         u32 len = priv->ucode_boot.len;
  73         u32 reg;
  74         u32 val;
  75
  76         IWL_DEBUG_INFO("Begin verify bsm\n");
  77
  78         /* verify BSM SRAM contents */
  79         val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
  80         for (reg = BSM_SRAM_LOWER_BOUND;
  81              reg < BSM_SRAM_LOWER_BOUND + len;
  82              reg += sizeof(u32), image++) {
  83                 val = iwl_read_prph(priv, reg);
  84                 if (val != le32_to_cpu(*image)) {
  85                         IWL_ERROR("BSM uCode verification failed at "
  86                                   "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  87                                   BSM_SRAM_LOWER_BOUND,
  88                                   reg - BSM_SRAM_LOWER_BOUND, len,
  89                                   val, le32_to_cpu(*image));
  90                         return -EIO;
  91                 }
  92         }
  93
  94         IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  95
  96         return 0;
  97 }
  98
  99 /**
 100  * iwl4965_load_bsm - Load bootstrap instructions
 101  *
 102  * BSM operation:
 103  *
 104  * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
 105  * in special SRAM that does not power down during RFKILL.  When powering back
 106  * up after power-saving sleeps (or during initial uCode load), the BSM loads
 107  * the bootstrap program into the on-board processor, and starts it.
 108  *
 109  * The bootstrap program loads (via DMA) instructions and data for a new
 110  * program from host DRAM locations indicated by the host driver in the
 111  * BSM_DRAM_* registers.  Once the new program is loaded, it starts
 112  * automatically.
 113  *
 114  * When initializing the NIC, the host driver points the BSM to the
 115  * "initialize" uCode image.  This uCode sets up some internal data, then
 116  * notifies host via "initialize alive" that it is complete.
 117  *
 118  * The host then replaces the BSM_DRAM_* pointer values to point to the
 119  * normal runtime uCode instructions and a backup uCode data cache buffer
 120  * (filled initially with starting data values for the on-board processor),
 121  * then triggers the "initialize" uCode to load and launch the runtime uCode,
 122  * which begins normal operation.
 123  *
 124  * When doing a power-save shutdown, runtime uCode saves data SRAM into
 125  * the backup data cache in DRAM before SRAM is powered down.
 126  *
 127  * When powering back up, the BSM loads the bootstrap program.  This reloads
 128  * the runtime uCode instructions and the backup data cache into SRAM,
 129  * and re-launches the runtime uCode from where it left off.
 130  */
 131 static int iwl4965_load_bsm(struct iwl_priv *priv)
 132 {
 133         __le32 *image = priv->ucode_boot.v_addr;
 134         u32 len = priv->ucode_boot.len;
 135         dma_addr_t pinst;
 136         dma_addr_t pdata;
 137         u32 inst_len;
 138         u32 data_len;
 139         int i;
 140         u32 done;
 141         u32 reg_offset;
 142         int ret;
 143
 144         IWL_DEBUG_INFO("Begin load bsm\n");
 145
 146         priv->ucode_type = UCODE_RT;
 147
 148         /* make sure bootstrap program is no larger than BSM's SRAM size */
 149         if (len > IWL_MAX_BSM_SIZE)
 150                 return -EINVAL;
 151
 152         /* Tell bootstrap uCode where to find the "Initialize" uCode
 153          *   in host DRAM ... host DRAM physical address bits 35:4 for 4965.
 154          * NOTE:  iwl_init_alive_start() will replace these values,
 155          *        after the "initialize" uCode has run, to point to
 156          *        runtime/protocol instructions and backup data cache.
 157          */
 158         pinst = priv->ucode_init.p_addr >> 4;
 159         pdata = priv->ucode_init_data.p_addr >> 4;
 160         inst_len = priv->ucode_init.len;
 161         data_len = priv->ucode_init_data.len;
 162
 163         ret = iwl_grab_nic_access(priv);
 164         if (ret)
 165                 return ret;
 166
 167         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
 168         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
 169         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
 170         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
 171
 172         /* Fill BSM memory with bootstrap instructions */
 173         for (reg_offset = BSM_SRAM_LOWER_BOUND;
 174              reg_offset < BSM_SRAM_LOWER_BOUND + len;
 175              reg_offset += sizeof(u32), image++)
 176                 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
 177
 178         ret = iwl4965_verify_bsm(priv);
 179         if (ret) {
 180                 iwl_release_nic_access(priv);
 181                 return ret;
 182         }
 183
 184         /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
 185         iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
 186         iwl_write_prph(priv, BSM_WR_MEM_DST_REG, RTC_INST_LOWER_BOUND);
 187         iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
 188
 189         /* Load bootstrap code into instruction SRAM now,
 190          *   to prepare to load "initialize" uCode */
 191         iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
 192
 193         /* Wait for load of bootstrap uCode to finish */
 194         for (i = 0; i < 100; i++) {
 195                 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
 196                 if (!(done & BSM_WR_CTRL_REG_BIT_START))
 197                         break;
 198                 udelay(10);
 199         }
 200         if (i < 100)
 201                 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
 202         else {
 203                 IWL_ERROR("BSM write did not complete!\n");
 204                 return -EIO;
 205         }
 206
 207         /* Enable future boot loads whenever power management unit triggers it
 208          *   (e.g. when powering back up after power-save shutdown) */
 209         iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
 210
 211         iwl_release_nic_access(priv);
 212
 213         return 0;
 214 }
 215
 216 /**
 217  * iwl4965_set_ucode_ptrs - Set uCode address location
 218  *
 219  * Tell initialization uCode where to find runtime uCode.
 220  *
 221  * BSM registers initially contain pointers to initialization uCode.
 222  * We need to replace them to load runtime uCode inst and data,
 223  * and to save runtime data when powering down.
 224  */
 225 static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
 226 {
 227         dma_addr_t pinst;
 228         dma_addr_t pdata;
 229         unsigned long flags;
 230         int ret = 0;
 231
 232         /* bits 35:4 for 4965 */
 233         pinst = priv->ucode_code.p_addr >> 4;
 234         pdata = priv->ucode_data_backup.p_addr >> 4;
 235
 236         spin_lock_irqsave(&priv->lock, flags);
 237         ret = iwl_grab_nic_access(priv);
 238         if (ret) {
 239                 spin_unlock_irqrestore(&priv->lock, flags);
 240                 return ret;
 241         }
 242
 243         /* Tell bootstrap uCode where to find image to load */
 244         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
 245         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
 246         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
 247                                  priv->ucode_data.len);
 248
 249         /* Inst byte count must be last to set up, bit 31 signals uCode
 250          *   that all new ptr/size info is in place */
 251         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
 252                                  priv->ucode_code.len | BSM_DRAM_INST_LOAD);
 253         iwl_release_nic_access(priv);
 254
 255         spin_unlock_irqrestore(&priv->lock, flags);
 256
 257         IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
 258
 259         return ret;
 260 }
 261
 262 /**
 263  * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
 264  *
 265  * Called after REPLY_ALIVE notification received from "initialize" uCode.
 266  *
 267  * The 4965 "initialize" ALIVE reply contains calibration data for:
 268  *   Voltage, temperature, and MIMO tx gain correction, now stored in priv
 269  *   (3945 does not contain this data).
 270  *
 271  * Tell "initialize" uCode to go ahead and load the runtime uCode.
 272 */
 273 static void iwl4965_init_alive_start(struct iwl_priv *priv)
 274 {
 275         /* Check alive response for "valid" sign from uCode */
 276         if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
 277                 /* We had an error bringing up the hardware, so take it
 278                  * all the way back down so we can try again */
 279                 IWL_DEBUG_INFO("Initialize Alive failed.\n");
 280                 goto restart;
 281         }
 282
 283         /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
 284          * This is a paranoid check, because we would not have gotten the
 285          * "initialize" alive if code weren't properly loaded.  */
 286         if (iwl_verify_ucode(priv)) {
 287                 /* Runtime instruction load was bad;
 288                  * take it all the way back down so we can try again */
 289                 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
 290                 goto restart;
 291         }
 292
 293         /* Calculate temperature */
 294         priv->temperature = iwl4965_hw_get_temperature(priv);
 295
 296         /* Send pointers to protocol/runtime uCode image ... init code will
 297          * load and launch runtime uCode, which will send us another "Alive"
 298          * notification. */
 299         IWL_DEBUG_INFO("Initialization Alive received.\n");
 300         if (iwl4965_set_ucode_ptrs(priv)) {
 301                 /* Runtime instruction load won't happen;
 302                  * take it all the way back down so we can try again */
 303                 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
 304                 goto restart;
 305         }
 306         return;
 307
 308 restart:
 309         queue_work(priv->workqueue, &priv->restart);
 310 }
 311
 312 static int is_fat_channel(__le32 rxon_flags)
 313 {
 314         return (rxon_flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) ||
 315                 (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK);
 316 }
 317
 318 /*
 319  * EEPROM handlers
 320  */
 321 static u16 iwl4965_eeprom_calib_version(struct iwl_priv *priv)
 322 {
 323         return iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
 324 }
 325
 326 /*
 327  * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
 328  * must be called under priv->lock and mac access
 329  */
 330 static void iwl4965_txq_set_sched(struct iwl_priv *priv, u32 mask)
 331 {
 332         iwl_write_prph(priv, IWL49_SCD_TXFACT, mask);
 333 }
 334
 335 static int iwl4965_apm_init(struct iwl_priv *priv)
 336 {
 337         int ret = 0;
 338
 339         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
 340                           CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
 341
 342         /* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */
 343         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
 344                           CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
 345
 346         /* set "initialization complete" bit to move adapter
 347          * D0U* --> D0A* state */
 348         iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 349
 350         /* wait for clock stabilization */
 351         ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
 352                            CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 353                            CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
 354         if (ret < 0) {
 355                 IWL_DEBUG_INFO("Failed to init the card\n");
 356                 goto out;
 357         }
 358
 359         ret = iwl_grab_nic_access(priv);
 360         if (ret)
 361                 goto out;
 362
 363         /* enable DMA */
 364         iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT |
 365                                                 APMG_CLK_VAL_BSM_CLK_RQT);
 366
 367         udelay(20);
 368
 369         /* disable L1-Active */
 370         iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
 371                           APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
 372
 373         iwl_release_nic_access(priv);
 374 out:
 375         return ret;
 376 }
 377
 378
 379 static void iwl4965_nic_config(struct iwl_priv *priv)
 380 {
 381         unsigned long flags;
 382         u32 val;
 383         u16 radio_cfg;
 384         u16 link;
 385
 386         spin_lock_irqsave(&priv->lock, flags);
 387
 388         if ((priv->rev_id & 0x80) == 0x80 && (priv->rev_id & 0x7f) < 8) {
 389                 pci_read_config_dword(priv->pci_dev, PCI_REG_WUM8, &val);
 390                 /* Enable No Snoop field */
 391                 pci_write_config_dword(priv->pci_dev, PCI_REG_WUM8,
 392                                        val & ~(1 << 11));
 393         }
 394
 395         pci_read_config_word(priv->pci_dev, PCI_CFG_LINK_CTRL, &link);
 396
 397         /* L1 is enabled by BIOS */
 398         if ((link & PCI_CFG_LINK_CTRL_VAL_L1_EN) == PCI_CFG_LINK_CTRL_VAL_L1_EN)
 399                 /* disable L0S disabled L1A enabled */
 400                 iwl_set_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
 401         else
 402                 /* L0S enabled L1A disabled */
 403                 iwl_clear_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
 404
 405         radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
 406
 407         /* write radio config values to register */
 408         if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
 409                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 410                             EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
 411                             EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
 412                             EEPROM_RF_CFG_DASH_MSK(radio_cfg));
 413
 414         /* set CSR_HW_CONFIG_REG for uCode use */
 415         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 416                     CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
 417                     CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
 418
 419         priv->calib_info = (struct iwl_eeprom_calib_info *)
 420                 iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
 421
 422         spin_unlock_irqrestore(&priv->lock, flags);
 423 }
 424
 425 static int iwl4965_apm_stop_master(struct iwl_priv *priv)
 426 {
 427         int ret = 0;
 428         unsigned long flags;
 429
 430         spin_lock_irqsave(&priv->lock, flags);
 431
 432         /* set stop master bit */
 433         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
 434
 435         ret = iwl_poll_bit(priv, CSR_RESET,
 436                                   CSR_RESET_REG_FLAG_MASTER_DISABLED,
 437                                   CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
 438         if (ret < 0)
 439                 goto out;
 440
 441 out:
 442         spin_unlock_irqrestore(&priv->lock, flags);
 443         IWL_DEBUG_INFO("stop master\n");
 444
 445         return ret;
 446 }
 447
 448 static void iwl4965_apm_stop(struct iwl_priv *priv)
 449 {
 450         unsigned long flags;
 451
 452         iwl4965_apm_stop_master(priv);
 453
 454         spin_lock_irqsave(&priv->lock, flags);
 455
 456         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
 457
 458         udelay(10);
 459         /* clear "init complete"  move adapter D0A* --> D0U state */
 460         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 461         spin_unlock_irqrestore(&priv->lock, flags);
 462 }
 463
 464 static int iwl4965_apm_reset(struct iwl_priv *priv)
 465 {
 466         int ret = 0;
 467         unsigned long flags;
 468
 469         iwl4965_apm_stop_master(priv);
 470
 471         spin_lock_irqsave(&priv->lock, flags);
 472
 473         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
 474
 475         udelay(10);
 476
 477         /* FIXME: put here L1A -L0S w/a */
 478
 479         iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 480
 481         ret = iwl_poll_bit(priv, CSR_RESET,
 482                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 483                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25);
 484
 485         if (ret)
 486                 goto out;
 487
 488         udelay(10);
 489
 490         ret = iwl_grab_nic_access(priv);
 491         if (ret)
 492                 goto out;
 493         /* Enable DMA and BSM Clock */
 494         iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT |
 495                                               APMG_CLK_VAL_BSM_CLK_RQT);
 496
 497         udelay(10);
 498
 499         /* disable L1A */
 500         iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
 501                           APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
 502
 503         iwl_release_nic_access(priv);
 504
 505         clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
 506         wake_up_interruptible(&priv->wait_command_queue);
 507
 508 out:
 509         spin_unlock_irqrestore(&priv->lock, flags);
 510
 511         return ret;
 512 }
 513
 514 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
 515  * Called after every association, but this runs only once!
 516  *  ... once chain noise is calibrated the first time, it's good forever.  */
 517 static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
 518 {
 519         struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
 520
 521         if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
 522                 struct iwl_calib_diff_gain_cmd cmd;
 523
 524                 memset(&cmd, 0, sizeof(cmd));
 525                 cmd.opCode = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
 526                 cmd.diff_gain_a = 0;
 527                 cmd.diff_gain_b = 0;
 528                 cmd.diff_gain_c = 0;
 529                 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
 530                                  sizeof(cmd), &cmd))
 531                         IWL_ERROR("Could not send REPLY_PHY_CALIBRATION_CMD\n");
 532                 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
 533                 IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
 534         }
 535 }
 536
 537 static void iwl4965_gain_computation(struct iwl_priv *priv,
 538                 u32 *average_noise,
 539                 u16 min_average_noise_antenna_i,
 540                 u32 min_average_noise)
 541 {
 542         int i, ret;
 543         struct iwl_chain_noise_data *data = &priv->chain_noise_data;
 544
 545         data->delta_gain_code[min_average_noise_antenna_i] = 0;
 546
 547         for (i = 0; i < NUM_RX_CHAINS; i++) {
 548                 s32 delta_g = 0;
 549
 550                 if (!(data->disconn_array[i]) &&
 551                     (data->delta_gain_code[i] ==
 552                              CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
 553                         delta_g = average_noise[i] - min_average_noise;
 554                         data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
 555                         data->delta_gain_code[i] =
 556                                 min(data->delta_gain_code[i],
 557                                 (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
 558
 559                         data->delta_gain_code[i] =
 560                                 (data->delta_gain_code[i] | (1 << 2));
 561                 } else {
 562                         data->delta_gain_code[i] = 0;
 563                 }
 564         }
 565         IWL_DEBUG_CALIB("delta_gain_codes: a %d b %d c %d\n",
 566                      data->delta_gain_code[0],
 567                      data->delta_gain_code[1],
 568                      data->delta_gain_code[2]);
 569
 570         /* Differential gain gets sent to uCode only once */
 571         if (!data->radio_write) {
 572                 struct iwl_calib_diff_gain_cmd cmd;
 573                 data->radio_write = 1;
 574
 575                 memset(&cmd, 0, sizeof(cmd));
 576                 cmd.opCode = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
 577                 cmd.diff_gain_a = data->delta_gain_code[0];
 578                 cmd.diff_gain_b = data->delta_gain_code[1];
 579                 cmd.diff_gain_c = data->delta_gain_code[2];
 580                 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
 581                                       sizeof(cmd), &cmd);
 582                 if (ret)
 583                         IWL_DEBUG_CALIB("fail sending cmd "
 584                                      "REPLY_PHY_CALIBRATION_CMD \n");
 585
 586                 /* TODO we might want recalculate
 587                  * rx_chain in rxon cmd */
 588
 589                 /* Mark so we run this algo only once! */
 590                 data->state = IWL_CHAIN_NOISE_CALIBRATED;
 591         }
 592         data->chain_noise_a = 0;
 593         data->chain_noise_b = 0;
 594         data->chain_noise_c = 0;
 595         data->chain_signal_a = 0;
 596         data->chain_signal_b = 0;
 597         data->chain_signal_c = 0;
 598         data->beacon_count = 0;
 599 }
 600
 601 static void iwl4965_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
 602                         __le32 *tx_flags)
 603 {
 604         if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
 605                 *tx_flags |= TX_CMD_FLG_RTS_MSK;
 606                 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
 607         } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
 608                 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
 609                 *tx_flags |= TX_CMD_FLG_CTS_MSK;
 610         }
 611 }
 612
 613 static void iwl4965_bg_txpower_work(struct work_struct *work)
 614 {
 615         struct iwl_priv *priv = container_of(work, struct iwl_priv,
 616                         txpower_work);
 617
 618         /* If a scan happened to start before we got here
 619          * then just return; the statistics notification will
 620          * kick off another scheduled work to compensate for
 621          * any temperature delta we missed here. */
 622         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
 623             test_bit(STATUS_SCANNING, &priv->status))
 624                 return;
 625
 626         mutex_lock(&priv->mutex);
 627
 628         /* Regardless of if we are associated, we must reconfigure the
 629          * TX power since frames can be sent on non-radar channels while
 630          * not associated */
 631         iwl4965_send_tx_power(priv);
 632
 633         /* Update last_temperature to keep is_calib_needed from running
 634          * when it isn't needed... */
 635         priv->last_temperature = priv->temperature;
 636
 637         mutex_unlock(&priv->mutex);
 638 }
 639
 640 /*
 641  * Acquire priv->lock before calling this function !
 642  */
 643 static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
 644 {
 645         iwl_write_direct32(priv, HBUS_TARG_WRPTR,
 646                              (index & 0xff) | (txq_id << 8));
 647         iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
 648 }
 649
 650 /**
 651  * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
 652  * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
 653  * @scd_retry: (1) Indicates queue will be used in aggregation mode
 654  *
 655  * NOTE:  Acquire priv->lock before calling this function !
 656  */
 657 static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
 658                                         struct iwl_tx_queue *txq,
 659                                         int tx_fifo_id, int scd_retry)
 660 {
 661         int txq_id = txq->q.id;
 662
 663         /* Find out whether to activate Tx queue */
 664         int active = test_bit(txq_id, &priv->txq_ctx_active_msk)?1:0;
 665
 666         /* Set up and activate */
 667         iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
 668                          (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
 669                          (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
 670                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
 671                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
 672                          IWL49_SCD_QUEUE_STTS_REG_MSK);
 673
 674         txq->sched_retry = scd_retry;
 675
 676         IWL_DEBUG_INFO("%s %s Queue %d on AC %d\n",
 677                        active ? "Activate" : "Deactivate",
 678                        scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
 679 }
 680
 681 static const u16 default_queue_to_tx_fifo[] = {
 682         IWL_TX_FIFO_AC3,
 683         IWL_TX_FIFO_AC2,
 684         IWL_TX_FIFO_AC1,
 685         IWL_TX_FIFO_AC0,
 686         IWL49_CMD_FIFO_NUM,
 687         IWL_TX_FIFO_HCCA_1,
 688         IWL_TX_FIFO_HCCA_2
 689 };
 690
 691 static int iwl4965_alive_notify(struct iwl_priv *priv)
 692 {
 693         u32 a;
 694         int i = 0;
 695         unsigned long flags;
 696         int ret;
 697
 698         spin_lock_irqsave(&priv->lock, flags);
 699
 700         ret = iwl_grab_nic_access(priv);
 701         if (ret) {
 702                 spin_unlock_irqrestore(&priv->lock, flags);
 703                 return ret;
 704         }
 705
 706         /* Clear 4965's internal Tx Scheduler data base */
 707         priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
 708         a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
 709         for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
 710                 iwl_write_targ_mem(priv, a, 0);
 711         for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
 712                 iwl_write_targ_mem(priv, a, 0);
 713         for (; a < sizeof(u16) * priv->hw_params.max_txq_num; a += 4)
 714                 iwl_write_targ_mem(priv, a, 0);
 715
 716         /* Tel 4965 where to find Tx byte count tables */
 717         iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
 718                         priv->scd_bc_tbls.dma >> 10);
 719
 720         /* Disable chain mode for all queues */
 721         iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
 722
 723         /* Initialize each Tx queue (including the command queue) */
 724         for (i = 0; i < priv->hw_params.max_txq_num; i++) {
 725
 726                 /* TFD circular buffer read/write indexes */
 727                 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
 728                 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
 729
 730                 /* Max Tx Window size for Scheduler-ACK mode */
 731                 iwl_write_targ_mem(priv, priv->scd_base_addr +
 732                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
 733                                 (SCD_WIN_SIZE <<
 734                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
 735                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
 736
 737                 /* Frame limit */
 738                 iwl_write_targ_mem(priv, priv->scd_base_addr +
 739                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
 740                                 sizeof(u32),
 741                                 (SCD_FRAME_LIMIT <<
 742                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
 743                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
 744
 745         }
 746         iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
 747                                  (1 << priv->hw_params.max_txq_num) - 1);
 748
 749         /* Activate all Tx DMA/FIFO channels */
 750         priv->cfg->ops->lib->txq_set_sched(priv, IWL_MASK(0, 7));
 751
 752         iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
 753
 754         /* Map each Tx/cmd queue to its corresponding fifo */
 755         for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
 756                 int ac = default_queue_to_tx_fifo[i];
 757                 iwl_txq_ctx_activate(priv, i);
 758                 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
 759         }
 760
 761         iwl_release_nic_access(priv);
 762         spin_unlock_irqrestore(&priv->lock, flags);
 763
 764         return ret;
 765 }
 766
 767 static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
 768         .min_nrg_cck = 97,
 769         .max_nrg_cck = 0,
 770
 771         .auto_corr_min_ofdm = 85,
 772         .auto_corr_min_ofdm_mrc = 170,
 773         .auto_corr_min_ofdm_x1 = 105,
 774         .auto_corr_min_ofdm_mrc_x1 = 220,
 775
 776         .auto_corr_max_ofdm = 120,
 777         .auto_corr_max_ofdm_mrc = 210,
 778         .auto_corr_max_ofdm_x1 = 140,
 779         .auto_corr_max_ofdm_mrc_x1 = 270,
 780
 781         .auto_corr_min_cck = 125,
 782         .auto_corr_max_cck = 200,
 783         .auto_corr_min_cck_mrc = 200,
 784         .auto_corr_max_cck_mrc = 400,
 785
 786         .nrg_th_cck = 100,
 787         .nrg_th_ofdm = 100,
 788 };
 789
 790 /**
 791  * iwl4965_hw_set_hw_params
 792  *
 793  * Called when initializing driver
 794  */
 795 static int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
 796 {
 797
 798         if ((priv->cfg->mod_params->num_of_queues > IWL49_NUM_QUEUES) ||
 799             (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) {
 800                 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
 801                           IWL_MIN_NUM_QUEUES, IWL49_NUM_QUEUES);
 802                 return -EINVAL;
 803         }
 804
 805         priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues;
 806         priv->hw_params.scd_bc_tbls_size =
 807                         IWL49_NUM_QUEUES * sizeof(struct iwl4965_scd_bc_tbl);
 808         priv->hw_params.max_stations = IWL4965_STATION_COUNT;
 809         priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
 810         priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
 811         priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
 812         priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
 813         priv->hw_params.fat_channel = BIT(IEEE80211_BAND_5GHZ);
 814
 815         priv->hw_params.tx_chains_num = 2;
 816         priv->hw_params.rx_chains_num = 2;
 817         priv->hw_params.valid_tx_ant = ANT_A | ANT_B;
 818         priv->hw_params.valid_rx_ant = ANT_A | ANT_B;
 819         priv->hw_params.ct_kill_threshold = CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD);
 820
 821         priv->hw_params.sens = &iwl4965_sensitivity;
 822
 823         return 0;
 824 }
 825
 826 static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
 827 {
 828         s32 sign = 1;
 829
 830         if (num < 0) {
 831                 sign = -sign;
 832                 num = -num;
 833         }
 834         if (denom < 0) {
 835                 sign = -sign;
 836                 denom = -denom;
 837         }
 838         *res = 1;
 839         *res = ((num * 2 + denom) / (denom * 2)) * sign;
 840
 841         return 1;
 842 }
 843
 844 /**
 845  * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
 846  *
 847  * Determines power supply voltage compensation for txpower calculations.
 848  * Returns number of 1/2-dB steps to subtract from gain table index,
 849  * to compensate for difference between power supply voltage during
 850  * factory measurements, vs. current power supply voltage.
 851  *
 852  * Voltage indication is higher for lower voltage.
 853  * Lower voltage requires more gain (lower gain table index).
 854  */
 855 static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
 856                                             s32 current_voltage)
 857 {
 858         s32 comp = 0;
 859
 860         if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
 861             (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
 862                 return 0;
 863
 864         iwl4965_math_div_round(current_voltage - eeprom_voltage,
 865                                TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
 866
 867         if (current_voltage > eeprom_voltage)
 868                 comp *= 2;
 869         if ((comp < -2) || (comp > 2))
 870                 comp = 0;
 871
 872         return comp;
 873 }
 874
 875 static s32 iwl4965_get_tx_atten_grp(u16 channel)
 876 {
 877         if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
 878             channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
 879                 return CALIB_CH_GROUP_5;
 880
 881         if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
 882             channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
 883                 return CALIB_CH_GROUP_1;
 884
 885         if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
 886             channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
 887                 return CALIB_CH_GROUP_2;
 888
 889         if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
 890             channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
 891                 return CALIB_CH_GROUP_3;
 892
 893         if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
 894             channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
 895                 return CALIB_CH_GROUP_4;
 896
 897         IWL_ERROR("Can't find txatten group for channel %d.\n", channel);
 898         return -1;
 899 }
 900
 901 static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
 902 {
 903         s32 b = -1;
 904
 905         for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
 906                 if (priv->calib_info->band_info[b].ch_from == 0)
 907                         continue;
 908
 909                 if ((channel >= priv->calib_info->band_info[b].ch_from)
 910                     && (channel <= priv->calib_info->band_info[b].ch_to))
 911                         break;
 912         }
 913
 914         return b;
 915 }
 916
 917 static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
 918 {
 919         s32 val;
 920
 921         if (x2 == x1)
 922                 return y1;
 923         else {
 924                 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
 925                 return val + y2;
 926         }
 927 }
 928
 929 /**
 930  * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
 931  *
 932  * Interpolates factory measurements from the two sample channels within a
 933  * sub-band, to apply to channel of interest.  Interpolation is proportional to
 934  * differences in channel frequencies, which is proportional to differences
 935  * in channel number.
 936  */
 937 static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
 938                                     struct iwl_eeprom_calib_ch_info *chan_info)
 939 {
 940         s32 s = -1;
 941         u32 c;
 942         u32 m;
 943         const struct iwl_eeprom_calib_measure *m1;
 944         const struct iwl_eeprom_calib_measure *m2;
 945         struct iwl_eeprom_calib_measure *omeas;
 946         u32 ch_i1;
 947         u32 ch_i2;
 948
 949         s = iwl4965_get_sub_band(priv, channel);
 950         if (s >= EEPROM_TX_POWER_BANDS) {
 951                 IWL_ERROR("Tx Power can not find channel %d\n", channel);
 952                 return -1;
 953         }
 954
 955         ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
 956         ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
 957         chan_info->ch_num = (u8) channel;
 958
 959         IWL_DEBUG_TXPOWER("channel %d subband %d factory cal ch %d & %d\n",
 960                           channel, s, ch_i1, ch_i2);
 961
 962         for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
 963                 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
 964                         m1 = &(priv->calib_info->band_info[s].ch1.
 965                                measurements[c][m]);
 966                         m2 = &(priv->calib_info->band_info[s].ch2.
 967                                measurements[c][m]);
 968                         omeas = &(chan_info->measurements[c][m]);
 969
 970                         omeas->actual_pow =
 971                             (u8) iwl4965_interpolate_value(channel, ch_i1,
 972                                                            m1->actual_pow,
 973                                                            ch_i2,
 974                                                            m2->actual_pow);
 975                         omeas->gain_idx =
 976                             (u8) iwl4965_interpolate_value(channel, ch_i1,
 977                                                            m1->gain_idx, ch_i2,
 978                                                            m2->gain_idx);
 979                         omeas->temperature =
 980                             (u8) iwl4965_interpolate_value(channel, ch_i1,
 981                                                            m1->temperature,
 982                                                            ch_i2,
 983                                                            m2->temperature);
 984                         omeas->pa_det =
 985                             (s8) iwl4965_interpolate_value(channel, ch_i1,
 986                                                            m1->pa_det, ch_i2,
 987                                                            m2->pa_det);
 988
 989                         IWL_DEBUG_TXPOWER
 990                             ("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
 991                              m1->actual_pow, m2->actual_pow, omeas->actual_pow);
 992                         IWL_DEBUG_TXPOWER
 993                             ("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
 994                              m1->gain_idx, m2->gain_idx, omeas->gain_idx);
 995                         IWL_DEBUG_TXPOWER
 996                             ("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
 997                              m1->pa_det, m2->pa_det, omeas->pa_det);
 998                         IWL_DEBUG_TXPOWER
 999                             ("chain %d meas %d  T1=%d  T2=%d  T=%d\n", c, m,
1000                              m1->temperature, m2->temperature,
1001                              omeas->temperature);
1002                 }
1003         }
1004
1005         return 0;
1006 }
1007
1008 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
1009  * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
1010 static s32 back_off_table[] = {
1011         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
1012         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
1013         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
1014         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
1015         10                      /* CCK */
1016 };
1017
1018 /* Thermal compensation values for txpower for various frequency ranges ...
1019  *   ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
1020 static struct iwl4965_txpower_comp_entry {
1021         s32 degrees_per_05db_a;
1022         s32 degrees_per_05db_a_denom;
1023 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
1024         {9, 2},                 /* group 0 5.2, ch  34-43 */
1025         {4, 1},                 /* group 1 5.2, ch  44-70 */
1026         {4, 1},                 /* group 2 5.2, ch  71-124 */
1027         {4, 1},                 /* group 3 5.2, ch 125-200 */
1028         {3, 1}                  /* group 4 2.4, ch   all */
1029 };
1030
1031 static s32 get_min_power_index(s32 rate_power_index, u32 band)
1032 {
1033         if (!band) {
1034                 if ((rate_power_index & 7) <= 4)
1035                         return MIN_TX_GAIN_INDEX_52GHZ_EXT;
1036         }
1037         return MIN_TX_GAIN_INDEX;
1038 }
1039
1040 struct gain_entry {
1041         u8 dsp;
1042         u8 radio;
1043 };
1044
1045 static const struct gain_entry gain_table[2][108] = {
1046         /* 5.2GHz power gain index table */
1047         {
1048          {123, 0x3F},           /* highest txpower */
1049          {117, 0x3F},
1050          {110, 0x3F},
1051          {104, 0x3F},
1052          {98, 0x3F},
1053          {110, 0x3E},
1054          {104, 0x3E},
1055          {98, 0x3E},
1056          {110, 0x3D},
1057          {104, 0x3D},
1058          {98, 0x3D},
1059          {110, 0x3C},
1060          {104, 0x3C},
1061          {98, 0x3C},
1062          {110, 0x3B},
1063          {104, 0x3B},
1064          {98, 0x3B},
1065          {110, 0x3A},
1066          {104, 0x3A},
1067          {98, 0x3A},
1068          {110, 0x39},
1069          {104, 0x39},
1070          {98, 0x39},
1071          {110, 0x38},
1072          {104, 0x38},
1073          {98, 0x38},
1074          {110, 0x37},
1075          {104, 0x37},
1076          {98, 0x37},
1077          {110, 0x36},
1078          {104, 0x36},
1079          {98, 0x36},
1080          {110, 0x35},
1081          {104, 0x35},
1082          {98, 0x35},
1083          {110, 0x34},
1084          {104, 0x34},
1085          {98, 0x34},
1086          {110, 0x33},
1087          {104, 0x33},
1088          {98, 0x33},
1089          {110, 0x32},
1090          {104, 0x32},
1091          {98, 0x32},
1092          {110, 0x31},
1093          {104, 0x31},
1094          {98, 0x31},
1095          {110, 0x30},
1096          {104, 0x30},
1097          {98, 0x30},
1098          {110, 0x25},
1099          {104, 0x25},
1100          {98, 0x25},
1101          {110, 0x24},
1102          {104, 0x24},
1103          {98, 0x24},
1104          {110, 0x23},
1105          {104, 0x23},
1106          {98, 0x23},
1107          {110, 0x22},
1108          {104, 0x18},
1109          {98, 0x18},
1110          {110, 0x17},
1111          {104, 0x17},
1112          {98, 0x17},
1113          {110, 0x16},
1114          {104, 0x16},
1115          {98, 0x16},
1116          {110, 0x15},
1117          {104, 0x15},
1118          {98, 0x15},
1119          {110, 0x14},
1120          {104, 0x14},
1121          {98, 0x14},
1122          {110, 0x13},
1123          {104, 0x13},
1124          {98, 0x13},
1125          {110, 0x12},
1126          {104, 0x08},
1127          {98, 0x08},
1128          {110, 0x07},
1129          {104, 0x07},
1130          {98, 0x07},
1131          {110, 0x06},
1132          {104, 0x06},
1133          {98, 0x06},
1134          {110, 0x05},
1135          {104, 0x05},
1136          {98, 0x05},
1137          {110, 0x04},
1138          {104, 0x04},
1139          {98, 0x04},
1140          {110, 0x03},
1141          {104, 0x03},
1142          {98, 0x03},
1143          {110, 0x02},
1144          {104, 0x02},
1145          {98, 0x02},
1146          {110, 0x01},
1147          {104, 0x01},
1148          {98, 0x01},
1149          {110, 0x00},
1150          {104, 0x00},
1151          {98, 0x00},
1152          {93, 0x00},
1153          {88, 0x00},
1154          {83, 0x00},
1155          {78, 0x00},
1156          },
1157         /* 2.4GHz power gain index table */
1158         {
1159          {110, 0x3f},           /* highest txpower */
1160          {104, 0x3f},
1161          {98, 0x3f},
1162          {110, 0x3e},
1163          {104, 0x3e},
1164          {98, 0x3e},
1165          {110, 0x3d},
1166          {104, 0x3d},
1167          {98, 0x3d},
1168          {110, 0x3c},
1169          {104, 0x3c},
1170          {98, 0x3c},
1171          {110, 0x3b},
1172          {104, 0x3b},
1173          {98, 0x3b},
1174          {110, 0x3a},
1175          {104, 0x3a},
1176          {98, 0x3a},
1177          {110, 0x39},
1178          {104, 0x39},
1179          {98, 0x39},
1180          {110, 0x38},
1181          {104, 0x38},
1182          {98, 0x38},
1183          {110, 0x37},
1184          {104, 0x37},
1185          {98, 0x37},
1186          {110, 0x36},
1187          {104, 0x36},
1188          {98, 0x36},
1189          {110, 0x35},
1190          {104, 0x35},
1191          {98, 0x35},
1192          {110, 0x34},
1193          {104, 0x34},
1194          {98, 0x34},
1195          {110, 0x33},
1196          {104, 0x33},
1197          {98, 0x33},
1198          {110, 0x32},
1199          {104, 0x32},
1200          {98, 0x32},
1201          {110, 0x31},
1202          {104, 0x31},
1203          {98, 0x31},
1204          {110, 0x30},
1205          {104, 0x30},
1206          {98, 0x30},
1207          {110, 0x6},
1208          {104, 0x6},
1209          {98, 0x6},
1210          {110, 0x5},
1211          {104, 0x5},
1212          {98, 0x5},
1213          {110, 0x4},
1214          {104, 0x4},
1215          {98, 0x4},
1216          {110, 0x3},
1217          {104, 0x3},
1218          {98, 0x3},
1219          {110, 0x2},
1220          {104, 0x2},
1221          {98, 0x2},
1222          {110, 0x1},
1223          {104, 0x1},
1224          {98, 0x1},
1225          {110, 0x0},
1226          {104, 0x0},
1227          {98, 0x0},
1228          {97, 0},
1229          {96, 0},
1230          {95, 0},
1231          {94, 0},
1232          {93, 0},
1233          {92, 0},
1234          {91, 0},
1235          {90, 0},
1236          {89, 0},
1237          {88, 0},
1238          {87, 0},
1239          {86, 0},
1240          {85, 0},
1241          {84, 0},
1242          {83, 0},
1243          {82, 0},
1244          {81, 0},
1245          {80, 0},
1246          {79, 0},
1247          {78, 0},
1248          {77, 0},
1249          {76, 0},
1250          {75, 0},
1251          {74, 0},
1252          {73, 0},
1253          {72, 0},
1254          {71, 0},
1255          {70, 0},
1256          {69, 0},
1257          {68, 0},
1258          {67, 0},
1259          {66, 0},
1260          {65, 0},
1261          {64, 0},
1262          {63, 0},
1263          {62, 0},
1264          {61, 0},
1265          {60, 0},
1266          {59, 0},
1267          }
1268 };
1269
1270 static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
1271                                     u8 is_fat, u8 ctrl_chan_high,
1272                                     struct iwl4965_tx_power_db *tx_power_tbl)
1273 {
1274         u8 saturation_power;
1275         s32 target_power;
1276         s32 user_target_power;
1277         s32 power_limit;
1278         s32 current_temp;
1279         s32 reg_limit;
1280         s32 current_regulatory;
1281         s32 txatten_grp = CALIB_CH_GROUP_MAX;
1282         int i;
1283         int c;
1284         const struct iwl_channel_info *ch_info = NULL;
1285         struct iwl_eeprom_calib_ch_info ch_eeprom_info;
1286         const struct iwl_eeprom_calib_measure *measurement;
1287         s16 voltage;
1288         s32 init_voltage;
1289         s32 voltage_compensation;
1290         s32 degrees_per_05db_num;
1291         s32 degrees_per_05db_denom;
1292         s32 factory_temp;
1293         s32 temperature_comp[2];
1294         s32 factory_gain_index[2];
1295         s32 factory_actual_pwr[2];
1296         s32 power_index;
1297
1298         /* user_txpower_limit is in dBm, convert to half-dBm (half-dB units
1299          *   are used for indexing into txpower table) */
1300         user_target_power = 2 * priv->tx_power_user_lmt;
1301
1302         /* Get current (RXON) channel, band, width */
1303         IWL_DEBUG_TXPOWER("chan %d band %d is_fat %d\n", channel, band,
1304                           is_fat);
1305
1306         ch_info = iwl_get_channel_info(priv, priv->band, channel);
1307
1308         if (!is_channel_valid(ch_info))
1309                 return -EINVAL;
1310
1311         /* get txatten group, used to select 1) thermal txpower adjustment
1312          *   and 2) mimo txpower balance between Tx chains. */
1313         txatten_grp = iwl4965_get_tx_atten_grp(channel);
1314         if (txatten_grp < 0)
1315                 return -EINVAL;
1316
1317         IWL_DEBUG_TXPOWER("channel %d belongs to txatten group %d\n",
1318                           channel, txatten_grp);
1319
1320         if (is_fat) {
1321                 if (ctrl_chan_high)
1322                         channel -= 2;
1323                 else
1324                         channel += 2;
1325         }
1326
1327         /* hardware txpower limits ...
1328          * saturation (clipping distortion) txpowers are in half-dBm */
1329         if (band)
1330                 saturation_power = priv->calib_info->saturation_power24;
1331         else
1332                 saturation_power = priv->calib_info->saturation_power52;
1333
1334         if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
1335             saturation_power > IWL_TX_POWER_SATURATION_MAX) {
1336                 if (band)
1337                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
1338                 else
1339                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
1340         }
1341
1342         /* regulatory txpower limits ... reg_limit values are in half-dBm,
1343          *   max_power_avg values are in dBm, convert * 2 */
1344         if (is_fat)
1345                 reg_limit = ch_info->fat_max_power_avg * 2;
1346         else
1347                 reg_limit = ch_info->max_power_avg * 2;
1348
1349         if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
1350             (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
1351                 if (band)
1352                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
1353                 else
1354                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
1355         }
1356
1357         /* Interpolate txpower calibration values for this channel,
1358          *   based on factory calibration tests on spaced channels. */
1359         iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1360
1361         /* calculate tx gain adjustment based on power supply voltage */
1362         voltage = priv->calib_info->voltage;
1363         init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1364         voltage_compensation =
1365             iwl4965_get_voltage_compensation(voltage, init_voltage);
1366
1367         IWL_DEBUG_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n",
1368                           init_voltage,
1369                           voltage, voltage_compensation);
1370
1371         /* get current temperature (Celsius) */
1372         current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
1373         current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
1374         current_temp = KELVIN_TO_CELSIUS(current_temp);
1375
1376         /* select thermal txpower adjustment params, based on channel group
1377          *   (same frequency group used for mimo txatten adjustment) */
1378         degrees_per_05db_num =
1379             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1380         degrees_per_05db_denom =
1381             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1382
1383         /* get per-chain txpower values from factory measurements */
1384         for (c = 0; c < 2; c++) {
1385                 measurement = &ch_eeprom_info.measurements[c][1];
1386
1387                 /* txgain adjustment (in half-dB steps) based on difference
1388                  *   between factory and current temperature */
1389                 factory_temp = measurement->temperature;
1390                 iwl4965_math_div_round((current_temp - factory_temp) *
1391                                        degrees_per_05db_denom,
1392                                        degrees_per_05db_num,
1393                                        &temperature_comp[c]);
1394
1395                 factory_gain_index[c] = measurement->gain_idx;
1396                 factory_actual_pwr[c] = measurement->actual_pow;
1397
1398                 IWL_DEBUG_TXPOWER("chain = %d\n", c);
1399                 IWL_DEBUG_TXPOWER("fctry tmp %d, "
1400                                   "curr tmp %d, comp %d steps\n",
1401                                   factory_temp, current_temp,
1402                                   temperature_comp[c]);
1403
1404                 IWL_DEBUG_TXPOWER("fctry idx %d, fctry pwr %d\n",
1405                                   factory_gain_index[c],
1406                                   factory_actual_pwr[c]);
1407         }
1408
1409         /* for each of 33 bit-rates (including 1 for CCK) */
1410         for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
1411                 u8 is_mimo_rate;
1412                 union iwl4965_tx_power_dual_stream tx_power;
1413
1414                 /* for mimo, reduce each chain's txpower by half
1415                  * (3dB, 6 steps), so total output power is regulatory
1416                  * compliant. */
1417                 if (i & 0x8) {
1418                         current_regulatory = reg_limit -
1419                             IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1420                         is_mimo_rate = 1;
1421                 } else {
1422                         current_regulatory = reg_limit;
1423                         is_mimo_rate = 0;
1424                 }
1425
1426                 /* find txpower limit, either hardware or regulatory */
1427                 power_limit = saturation_power - back_off_table[i];
1428                 if (power_limit > current_regulatory)
1429                         power_limit = current_regulatory;
1430
1431                 /* reduce user's txpower request if necessary
1432                  * for this rate on this channel */
1433                 target_power = user_target_power;
1434                 if (target_power > power_limit)
1435                         target_power = power_limit;
1436
1437                 IWL_DEBUG_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n",
1438                                   i, saturation_power - back_off_table[i],
1439                                   current_regulatory, user_target_power,
1440                                   target_power);
1441
1442                 /* for each of 2 Tx chains (radio transmitters) */
1443                 for (c = 0; c < 2; c++) {
1444                         s32 atten_value;
1445
1446                         if (is_mimo_rate)
1447                                 atten_value =
1448                                     (s32)le32_to_cpu(priv->card_alive_init.
1449                                     tx_atten[txatten_grp][c]);
1450                         else
1451                                 atten_value = 0;
1452
1453                         /* calculate index; higher index means lower txpower */
1454                         power_index = (u8) (factory_gain_index[c] -
1455                                             (target_power -
1456                                              factory_actual_pwr[c]) -
1457                                             temperature_comp[c] -
1458                                             voltage_compensation +
1459                                             atten_value);
1460
1461 /*                      IWL_DEBUG_TXPOWER("calculated txpower index %d\n",
1462                                                 power_index); */
1463
1464                         if (power_index < get_min_power_index(i, band))
1465                                 power_index = get_min_power_index(i, band);
1466
1467                         /* adjust 5 GHz index to support negative indexes */
1468                         if (!band)
1469                                 power_index += 9;
1470
1471                         /* CCK, rate 32, reduce txpower for CCK */
1472                         if (i == POWER_TABLE_CCK_ENTRY)
1473                                 power_index +=
1474                                     IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
1475
1476                         /* stay within the table! */
1477                         if (power_index > 107) {
1478                                 IWL_WARNING("txpower index %d > 107\n",
1479                                             power_index);
1480                                 power_index = 107;
1481                         }
1482                         if (power_index < 0) {
1483                                 IWL_WARNING("txpower index %d < 0\n",
1484                                             power_index);
1485                                 power_index = 0;
1486                         }
1487
1488                         /* fill txpower command for this rate/chain */
1489                         tx_power.s.radio_tx_gain[c] =
1490                                 gain_table[band][power_index].radio;
1491                         tx_power.s.dsp_predis_atten[c] =
1492                                 gain_table[band][power_index].dsp;
1493
1494                         IWL_DEBUG_TXPOWER("chain %d mimo %d index %d "
1495                                           "gain 0x%02x dsp %d\n",
1496                                           c, atten_value, power_index,
1497                                         tx_power.s.radio_tx_gain[c],
1498                                         tx_power.s.dsp_predis_atten[c]);
1499                 } /* for each chain */
1500
1501                 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1502
1503         } /* for each rate */
1504
1505         return 0;
1506 }
1507
1508 /**
1509  * iwl4965_send_tx_power - Configure the TXPOWER level user limit
1510  *
1511  * Uses the active RXON for channel, band, and characteristics (fat, high)
1512  * The power limit is taken from priv->tx_power_user_lmt.
1513  */
1514 static int iwl4965_send_tx_power(struct iwl_priv *priv)
1515 {
1516         struct iwl4965_txpowertable_cmd cmd = { 0 };
1517         int ret;
1518         u8 band = 0;
1519         u8 is_fat = 0;
1520         u8 ctrl_chan_high = 0;
1521
1522         if (test_bit(STATUS_SCANNING, &priv->status)) {
1523                 /* If this gets hit a lot, switch it to a BUG() and catch
1524                  * the stack trace to find out who is calling this during
1525                  * a scan. */
1526                 IWL_WARNING("TX Power requested while scanning!\n");
1527                 return -EAGAIN;
1528         }
1529
1530         band = priv->band == IEEE80211_BAND_2GHZ;
1531
1532         is_fat =  is_fat_channel(priv->active_rxon.flags);
1533
1534         if (is_fat &&
1535             (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1536                 ctrl_chan_high = 1;
1537
1538         cmd.band = band;
1539         cmd.channel = priv->active_rxon.channel;
1540
1541         ret = iwl4965_fill_txpower_tbl(priv, band,
1542                                 le16_to_cpu(priv->active_rxon.channel),
1543                                 is_fat, ctrl_chan_high, &cmd.tx_power);
1544         if (ret)
1545                 goto out;
1546
1547         ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
1548
1549 out:
1550         return ret;
1551 }
1552
1553 static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
1554 {
1555         int ret = 0;
1556         struct iwl4965_rxon_assoc_cmd rxon_assoc;
1557         const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
1558         const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
1559
1560         if ((rxon1->flags == rxon2->flags) &&
1561             (rxon1->filter_flags == rxon2->filter_flags) &&
1562             (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1563             (rxon1->ofdm_ht_single_stream_basic_rates ==
1564              rxon2->ofdm_ht_single_stream_basic_rates) &&
1565             (rxon1->ofdm_ht_dual_stream_basic_rates ==
1566              rxon2->ofdm_ht_dual_stream_basic_rates) &&
1567             (rxon1->rx_chain == rxon2->rx_chain) &&
1568             (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1569                 IWL_DEBUG_INFO("Using current RXON_ASSOC.  Not resending.\n");
1570                 return 0;
1571         }
1572
1573         rxon_assoc.flags = priv->staging_rxon.flags;
1574         rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1575         rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1576         rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1577         rxon_assoc.reserved = 0;
1578         rxon_assoc.ofdm_ht_single_stream_basic_rates =
1579             priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1580         rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1581             priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1582         rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1583
1584         ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
1585                                      sizeof(rxon_assoc), &rxon_assoc, NULL);
1586         if (ret)
1587                 return ret;
1588
1589         return ret;
1590 }
1591
1592 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
1593 static int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1594 {
1595         int rc;
1596         u8 band = 0;
1597         u8 is_fat = 0;
1598         u8 ctrl_chan_high = 0;
1599         struct iwl4965_channel_switch_cmd cmd = { 0 };
1600         const struct iwl_channel_info *ch_info;
1601
1602         band = priv->band == IEEE80211_BAND_2GHZ;
1603
1604         ch_info = iwl_get_channel_info(priv, priv->band, channel);
1605
1606         is_fat = is_fat_channel(priv->staging_rxon.flags);
1607
1608         if (is_fat &&
1609             (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1610                 ctrl_chan_high = 1;
1611
1612         cmd.band = band;
1613         cmd.expect_beacon = 0;
1614         cmd.channel = cpu_to_le16(channel);
1615         cmd.rxon_flags = priv->active_rxon.flags;
1616         cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
1617         cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1618         if (ch_info)
1619                 cmd.expect_beacon = is_channel_radar(ch_info);
1620         else
1621                 cmd.expect_beacon = 1;
1622
1623         rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_fat,
1624                                       ctrl_chan_high, &cmd.tx_power);
1625         if (rc) {
1626                 IWL_DEBUG_11H("error:%d  fill txpower_tbl\n", rc);
1627                 return rc;
1628         }
1629
1630         rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1631         return rc;
1632 }
1633 #endif
1634
1635 /**
1636  * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1637  */
1638 static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
1639                                             struct iwl_tx_queue *txq,
1640                                             u16 byte_cnt)
1641 {
1642         struct iwl4965_scd_bc_tbl *scd_bc_tbl = priv->scd_bc_tbls.addr;
1643         int txq_id = txq->q.id;
1644         int write_ptr = txq->q.write_ptr;
1645         int len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
1646         __le16 bc_ent;
1647
1648         WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
1649
1650         bc_ent = cpu_to_le16(len & 0xFFF);
1651         /* Set up byte count within first 256 entries */
1652         scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent;
1653
1654         /* If within first 64 entries, duplicate at end */
1655         if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
1656                 scd_bc_tbl[txq_id].
1657                         tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent;
1658 }
1659
1660 /**
1661  * sign_extend - Sign extend a value using specified bit as sign-bit
1662  *
1663  * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
1664  * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
1665  *
1666  * @param oper value to sign extend
1667  * @param index 0 based bit index (0<=index<32) to sign bit
1668  */
1669 static s32 sign_extend(u32 oper, int index)
1670 {
1671         u8 shift = 31 - index;
1672
1673         return (s32)(oper << shift) >> shift;
1674 }
1675
1676 /**
1677  * iwl4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
1678  * @statistics: Provides the temperature reading from the uCode
1679  *
1680  * A return of <0 indicates bogus data in the statistics
1681  */
1682 static int iwl4965_hw_get_temperature(const struct iwl_priv *priv)
1683 {
1684         s32 temperature;
1685         s32 vt;
1686         s32 R1, R2, R3;
1687         u32 R4;
1688
1689         if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
1690                 (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)) {
1691                 IWL_DEBUG_TEMP("Running FAT temperature calibration\n");
1692                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
1693                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
1694                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
1695                 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
1696         } else {
1697                 IWL_DEBUG_TEMP("Running temperature calibration\n");
1698                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
1699                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
1700                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
1701                 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
1702         }
1703
1704         /*
1705          * Temperature is only 23 bits, so sign extend out to 32.
1706          *
1707          * NOTE If we haven't received a statistics notification yet
1708          * with an updated temperature, use R4 provided to us in the
1709          * "initialize" ALIVE response.
1710          */
1711         if (!test_bit(STATUS_TEMPERATURE, &priv->status))
1712                 vt = sign_extend(R4, 23);
1713         else
1714                 vt = sign_extend(
1715                         le32_to_cpu(priv->statistics.general.temperature), 23);
1716
1717         IWL_DEBUG_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
1718
1719         if (R3 == R1) {
1720                 IWL_ERROR("Calibration conflict R1 == R3\n");
1721                 return -1;
1722         }
1723
1724         /* Calculate temperature in degrees Kelvin, adjust by 97%.
1725          * Add offset to center the adjustment around 0 degrees Centigrade. */
1726         temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
1727         temperature /= (R3 - R1);
1728         temperature = (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET;
1729
1730         IWL_DEBUG_TEMP("Calibrated temperature: %dK, %dC\n",
1731                         temperature, KELVIN_TO_CELSIUS(temperature));
1732
1733         return temperature;
1734 }
1735
1736 /* Adjust Txpower only if temperature variance is greater than threshold. */
1737 #define IWL_TEMPERATURE_THRESHOLD   3
1738
1739 /**
1740  * iwl4965_is_temp_calib_needed - determines if new calibration is needed
1741  *
1742  * If the temperature changed has changed sufficiently, then a recalibration
1743  * is needed.
1744  *
1745  * Assumes caller will replace priv->last_temperature once calibration
1746  * executed.
1747  */
1748 static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
1749 {
1750         int temp_diff;
1751
1752         if (!test_bit(STATUS_STATISTICS, &priv->status)) {
1753                 IWL_DEBUG_TEMP("Temperature not updated -- no statistics.\n");
1754                 return 0;
1755         }
1756
1757         temp_diff = priv->temperature - priv->last_temperature;
1758
1759         /* get absolute value */
1760         if (temp_diff < 0) {
1761                 IWL_DEBUG_POWER("Getting cooler, delta %d, \n", temp_diff);
1762                 temp_diff = -temp_diff;
1763         } else if (temp_diff == 0)
1764                 IWL_DEBUG_POWER("Same temp, \n");
1765         else
1766                 IWL_DEBUG_POWER("Getting warmer, delta %d, \n", temp_diff);
1767
1768         if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
1769                 IWL_DEBUG_POWER("Thermal txpower calib not needed\n");
1770                 return 0;
1771         }
1772
1773         IWL_DEBUG_POWER("Thermal txpower calib needed\n");
1774
1775         return 1;
1776 }
1777
1778 static void iwl4965_temperature_calib(struct iwl_priv *priv)
1779 {
1780         s32 temp;
1781
1782         temp = iwl4965_hw_get_temperature(priv);
1783         if (temp < 0)
1784                 return;
1785
1786         if (priv->temperature != temp) {
1787                 if (priv->temperature)
1788                         IWL_DEBUG_TEMP("Temperature changed "
1789                                        "from %dC to %dC\n",
1790                                        KELVIN_TO_CELSIUS(priv->temperature),
1791                                        KELVIN_TO_CELSIUS(temp));
1792                 else
1793                         IWL_DEBUG_TEMP("Temperature "
1794                                        "initialized to %dC\n",
1795                                        KELVIN_TO_CELSIUS(temp));
1796         }
1797
1798         priv->temperature = temp;
1799         set_bit(STATUS_TEMPERATURE, &priv->status);
1800
1801         if (!priv->disable_tx_power_cal &&
1802              unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
1803              iwl4965_is_temp_calib_needed(priv))
1804                 queue_work(priv->workqueue, &priv->txpower_work);
1805 }
1806
1807 /**
1808  * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
1809  */
1810 static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
1811                                             u16 txq_id)
1812 {
1813         /* Simply stop the queue, but don't change any configuration;
1814          * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
1815         iwl_write_prph(priv,
1816                 IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
1817                 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
1818                 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
1819 }
1820
1821 /**
1822  * txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE
1823  * priv->lock must be held by the caller
1824  */
1825 static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
1826                                    u16 ssn_idx, u8 tx_fifo)
1827 {
1828         int ret = 0;
1829
1830         if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1831             (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) {
1832                 IWL_WARNING("queue number out of range: %d, must be %d to %d\n",
1833                         txq_id, IWL49_FIRST_AMPDU_QUEUE,
1834                         IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1);
1835                 return -EINVAL;
1836         }
1837
1838         ret = iwl_grab_nic_access(priv);
1839         if (ret)
1840                 return ret;
1841
1842         iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1843
1844         iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1845
1846         priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1847         priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1848         /* supposes that ssn_idx is valid (!= 0xFFF) */
1849         iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1850
1851         iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1852         iwl_txq_ctx_deactivate(priv, txq_id);
1853         iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
1854
1855         iwl_release_nic_access(priv);
1856
1857         return 0;
1858 }
1859
1860 /**
1861  * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
1862  */
1863 static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
1864                                         u16 txq_id)
1865 {
1866         u32 tbl_dw_addr;
1867         u32 tbl_dw;
1868         u16 scd_q2ratid;
1869
1870         scd_q2ratid = ra_tid & IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
1871
1872         tbl_dw_addr = priv->scd_base_addr +
1873                         IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
1874
1875         tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
1876
1877         if (txq_id & 0x1)
1878                 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
1879         else
1880                 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
1881
1882         iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
1883
1884         return 0;
1885 }
1886
1887
1888 /**
1889  * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
1890  *
1891  * NOTE:  txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE,
1892  *        i.e. it must be one of the higher queues used for aggregation
1893  */
1894 static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id,
1895                                   int tx_fifo, int sta_id, int tid, u16 ssn_idx)
1896 {
1897         unsigned long flags;
1898         int ret;
1899         u16 ra_tid;
1900
1901         if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1902             (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) {
1903                 IWL_WARNING("queue number out of range: %d, must be %d to %d\n",
1904                         txq_id, IWL49_FIRST_AMPDU_QUEUE,
1905                         IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1);
1906                 return -EINVAL;
1907         }
1908
1909         ra_tid = BUILD_RAxTID(sta_id, tid);
1910
1911         /* Modify device's station table to Tx this TID */
1912         iwl_sta_tx_modify_enable_tid(priv, sta_id, tid);
1913
1914         spin_lock_irqsave(&priv->lock, flags);
1915         ret = iwl_grab_nic_access(priv);
1916         if (ret) {
1917                 spin_unlock_irqrestore(&priv->lock, flags);
1918                 return ret;
1919         }
1920
1921         /* Stop this Tx queue before configuring it */
1922         iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1923
1924         /* Map receiver-address / traffic-ID to this queue */
1925         iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
1926
1927         /* Set this queue as a chain-building queue */
1928         iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1929
1930         /* Place first TFD at index corresponding to start sequence number.
1931          * Assumes that ssn_idx is valid (!= 0xFFF) */
1932         priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1933         priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1934         iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1935
1936         /* Set up Tx window size and frame limit for this queue */
1937         iwl_write_targ_mem(priv,
1938                 priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
1939                 (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
1940                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
1941
1942         iwl_write_targ_mem(priv, priv->scd_base_addr +
1943                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
1944                 (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
1945                 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
1946
1947         iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1948
1949         /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
1950         iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
1951
1952         iwl_release_nic_access(priv);
1953         spin_unlock_irqrestore(&priv->lock, flags);
1954
1955         return 0;
1956 }
1957
1958
1959 static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len)
1960 {
1961         switch (cmd_id) {
1962         case REPLY_RXON:
1963                 return (u16) sizeof(struct iwl4965_rxon_cmd);
1964         default:
1965                 return len;
1966         }
1967 }
1968
1969 static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
1970 {
1971         struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
1972         addsta->mode = cmd->mode;
1973         memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
1974         memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
1975         addsta->station_flags = cmd->station_flags;
1976         addsta->station_flags_msk = cmd->station_flags_msk;
1977         addsta->tid_disable_tx = cmd->tid_disable_tx;
1978         addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
1979         addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
1980         addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
1981         addsta->reserved1 = __constant_cpu_to_le16(0);
1982         addsta->reserved2 = __constant_cpu_to_le32(0);
1983
1984         return (u16)sizeof(struct iwl4965_addsta_cmd);
1985 }
1986
1987 static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
1988 {
1989         return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
1990 }
1991
1992 /**
1993  * iwl4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
1994  */
1995 static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
1996                                       struct iwl_ht_agg *agg,
1997                                       struct iwl4965_tx_resp *tx_resp,
1998                                       int txq_id, u16 start_idx)
1999 {
2000         u16 status;
2001         struct agg_tx_status *frame_status = tx_resp->u.agg_status;
2002         struct ieee80211_tx_info *info = NULL;
2003         struct ieee80211_hdr *hdr = NULL;
2004         u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
2005         int i, sh, idx;
2006         u16 seq;
2007         if (agg->wait_for_ba)
2008                 IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
2009
2010         agg->frame_count = tx_resp->frame_count;
2011         agg->start_idx = start_idx;
2012         agg->rate_n_flags = rate_n_flags;
2013         agg->bitmap = 0;
2014
2015         /* num frames attempted by Tx command */
2016         if (agg->frame_count == 1) {
2017                 /* Only one frame was attempted; no block-ack will arrive */
2018                 status = le16_to_cpu(frame_status[0].status);
2019                 idx = start_idx;
2020
2021                 /* FIXME: code repetition */
2022                 IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
2023                                    agg->frame_count, agg->start_idx, idx);
2024
2025                 info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]);
2026                 info->status.rates[0].count = tx_resp->failure_frame + 1;
2027                 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
2028                 info->flags |= iwl_is_tx_success(status)?
2029                         IEEE80211_TX_STAT_ACK : 0;
2030                 iwl_hwrate_to_tx_control(priv, rate_n_flags, info);
2031                 /* FIXME: code repetition end */
2032
2033                 IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
2034                                     status & 0xff, tx_resp->failure_frame);
2035                 IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n", rate_n_flags);
2036
2037                 agg->wait_for_ba = 0;
2038         } else {
2039                 /* Two or more frames were attempted; expect block-ack */
2040                 u64 bitmap = 0;
2041                 int start = agg->start_idx;
2042
2043                 /* Construct bit-map of pending frames within Tx window */
2044                 for (i = 0; i < agg->frame_count; i++) {
2045                         u16 sc;
2046                         status = le16_to_cpu(frame_status[i].status);
2047                         seq  = le16_to_cpu(frame_status[i].sequence);
2048                         idx = SEQ_TO_INDEX(seq);
2049                         txq_id = SEQ_TO_QUEUE(seq);
2050
2051                         if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
2052                                       AGG_TX_STATE_ABORT_MSK))
2053                                 continue;
2054
2055                         IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
2056                                            agg->frame_count, txq_id, idx);
2057
2058                         hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
2059
2060                         sc = le16_to_cpu(hdr->seq_ctrl);
2061                         if (idx != (SEQ_TO_SN(sc) & 0xff)) {
2062                                 IWL_ERROR("BUG_ON idx doesn't match seq control"
2063                                           " idx=%d, seq_idx=%d, seq=%d\n",
2064                                           idx, SEQ_TO_SN(sc),
2065                                           hdr->seq_ctrl);
2066                                 return -1;
2067                         }
2068
2069                         IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
2070                                            i, idx, SEQ_TO_SN(sc));
2071
2072                         sh = idx - start;
2073                         if (sh > 64) {
2074                                 sh = (start - idx) + 0xff;
2075                                 bitmap = bitmap << sh;
2076                                 sh = 0;
2077                                 start = idx;
2078                         } else if (sh < -64)
2079                                 sh  = 0xff - (start - idx);
2080                         else if (sh < 0) {
2081                                 sh = start - idx;
2082                                 start = idx;
2083                                 bitmap = bitmap << sh;
2084                                 sh = 0;
2085                         }
2086                         bitmap |= 1ULL << sh;
2087                         IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%llx\n",
2088                                            start, (unsigned long long)bitmap);
2089                 }
2090
2091                 agg->bitmap = bitmap;
2092                 agg->start_idx = start;
2093                 IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
2094                                    agg->frame_count, agg->start_idx,
2095                                    (unsigned long long)agg->bitmap);
2096
2097                 if (bitmap)
2098                         agg->wait_for_ba = 1;
2099         }
2100         return 0;
2101 }
2102
2103 /**
2104  * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
2105  */
2106 static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
2107                                 struct iwl_rx_mem_buffer *rxb)
2108 {
2109         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2110         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
2111         int txq_id = SEQ_TO_QUEUE(sequence);
2112         int index = SEQ_TO_INDEX(sequence);
2113         struct iwl_tx_queue *txq = &priv->txq[txq_id];
2114         struct ieee80211_hdr *hdr;
2115         struct ieee80211_tx_info *info;
2116         struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
2117         u32  status = le32_to_cpu(tx_resp->u.status);
2118         int tid = MAX_TID_COUNT;
2119         int sta_id;
2120         int freed;
2121         u8 *qc = NULL;
2122
2123         if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
2124                 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
2125                           "is out of range [0-%d] %d %d\n", txq_id,
2126                           index, txq->q.n_bd, txq->q.write_ptr,
2127                           txq->q.read_ptr);
2128                 return;
2129         }
2130
2131         info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
2132         memset(&info->status, 0, sizeof(info->status));
2133
2134         hdr = iwl_tx_queue_get_hdr(priv, txq_id, index);
2135         if (ieee80211_is_data_qos(hdr->frame_control)) {
2136                 qc = ieee80211_get_qos_ctl(hdr);
2137                 tid = qc[0] & 0xf;
2138         }
2139
2140         sta_id = iwl_get_ra_sta_id(priv, hdr);
2141         if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
2142                 IWL_ERROR("Station not known\n");
2143                 return;
2144         }
2145
2146         if (txq->sched_retry) {
2147                 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
2148                 struct iwl_ht_agg *agg = NULL;
2149
2150                 WARN_ON(!qc);
2151
2152                 agg = &priv->stations[sta_id].tid[tid].agg;
2153
2154                 iwl4965_tx_status_reply_tx(priv, agg, tx_resp, txq_id, index);
2155
2156                 /* check if BAR is needed */
2157                 if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status))
2158                         info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
2159
2160                 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
2161                         index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
2162                         IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
2163                                            "%d index %d\n", scd_ssn , index);
2164                         freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2165                         priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2166
2167                         if (priv->mac80211_registered &&
2168                             (iwl_queue_space(&txq->q) > txq->q.low_mark) &&
2169                             (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)) {
2170                                 if (agg->state == IWL_AGG_OFF)
2171                                         ieee80211_wake_queue(priv->hw, txq_id);
2172                                 else
2173                                         ieee80211_wake_queue(priv->hw,
2174                                                              txq->swq_id);
2175                         }
2176                 }
2177         } else {
2178                 info->status.rates[0].count = tx_resp->failure_frame + 1;
2179                 info->flags |= iwl_is_tx_success(status) ?
2180                                         IEEE80211_TX_STAT_ACK : 0;
2181                 iwl_hwrate_to_tx_control(priv,
2182                                         le32_to_cpu(tx_resp->rate_n_flags),
2183                                         info);
2184
2185                 IWL_DEBUG_TX_REPLY("TXQ %d status %s (0x%08x) "
2186                                    "rate_n_flags 0x%x retries %d\n",
2187                                    txq_id,
2188                                    iwl_get_tx_fail_reason(status), status,
2189                                    le32_to_cpu(tx_resp->rate_n_flags),
2190                                    tx_resp->failure_frame);
2191
2192                 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2193                 if (qc && likely(sta_id != IWL_INVALID_STATION))
2194                         priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2195
2196                 if (priv->mac80211_registered &&
2197                     (iwl_queue_space(&txq->q) > txq->q.low_mark))
2198                         ieee80211_wake_queue(priv->hw, txq_id);
2199         }
2200
2201         if (qc && likely(sta_id != IWL_INVALID_STATION))
2202                 iwl_txq_check_empty(priv, sta_id, tid, txq_id);
2203
2204         if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
2205                 IWL_ERROR("TODO:  Implement Tx ABORT REQUIRED!!!\n");
2206 }
2207
2208 static int iwl4965_calc_rssi(struct iwl_priv *priv,
2209                              struct iwl_rx_phy_res *rx_resp)
2210 {
2211         /* data from PHY/DSP regarding signal strength, etc.,
2212          *   contents are always there, not configurable by host.  */
2213         struct iwl4965_rx_non_cfg_phy *ncphy =
2214             (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy_buf;
2215         u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL49_AGC_DB_MASK)
2216                         >> IWL49_AGC_DB_POS;
2217
2218         u32 valid_antennae =
2219             (le16_to_cpu(rx_resp->phy_flags) & IWL49_RX_PHY_FLAGS_ANTENNAE_MASK)
2220                         >> IWL49_RX_PHY_FLAGS_ANTENNAE_OFFSET;
2221         u8 max_rssi = 0;
2222         u32 i;
2223
2224         /* Find max rssi among 3 possible receivers.
2225          * These values are measured by the digital signal processor (DSP).
2226          * They should stay fairly constant even as the signal strength varies,
2227          *   if the radio's automatic gain control (AGC) is working right.
2228          * AGC value (see below) will provide the "interesting" info. */
2229         for (i = 0; i < 3; i++)
2230                 if (valid_antennae & (1 << i))
2231                         max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
2232
2233         IWL_DEBUG_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
2234                 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
2235                 max_rssi, agc);
2236
2237         /* dBm = max_rssi dB - agc dB - constant.
2238          * Higher AGC (higher radio gain) means lower signal. */
2239         return max_rssi - agc - IWL_RSSI_OFFSET;
2240 }
2241
2242
2243 /* Set up 4965-specific Rx frame reply handlers */
2244 static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
2245 {
2246         /* Legacy Rx frames */
2247         priv->rx_handlers[REPLY_RX] = iwl_rx_reply_rx;
2248         /* Tx response */
2249         priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
2250 }
2251
2252 static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
2253 {
2254         INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
2255 }
2256
2257 static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
2258 {
2259         cancel_work_sync(&priv->txpower_work);
2260 }
2261
2262
2263 static struct iwl_hcmd_ops iwl4965_hcmd = {
2264         .rxon_assoc = iwl4965_send_rxon_assoc,
2265 };
2266
2267 static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
2268         .get_hcmd_size = iwl4965_get_hcmd_size,
2269         .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
2270         .chain_noise_reset = iwl4965_chain_noise_reset,
2271         .gain_computation = iwl4965_gain_computation,
2272         .rts_tx_cmd_flag = iwl4965_rts_tx_cmd_flag,
2273         .calc_rssi = iwl4965_calc_rssi,
2274 };
2275
2276 static struct iwl_lib_ops iwl4965_lib = {
2277         .set_hw_params = iwl4965_hw_set_hw_params,
2278         .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
2279         .txq_set_sched = iwl4965_txq_set_sched,
2280         .txq_agg_enable = iwl4965_txq_agg_enable,
2281         .txq_agg_disable = iwl4965_txq_agg_disable,
2282         .rx_handler_setup = iwl4965_rx_handler_setup,
2283         .setup_deferred_work = iwl4965_setup_deferred_work,
2284         .cancel_deferred_work = iwl4965_cancel_deferred_work,
2285         .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
2286         .alive_notify = iwl4965_alive_notify,
2287         .init_alive_start = iwl4965_init_alive_start,
2288         .load_ucode = iwl4965_load_bsm,
2289         .apm_ops = {
2290                 .init = iwl4965_apm_init,
2291                 .reset = iwl4965_apm_reset,
2292                 .stop = iwl4965_apm_stop,
2293                 .config = iwl4965_nic_config,
2294                 .set_pwr_src = iwl_set_pwr_src,
2295         },
2296         .eeprom_ops = {
2297                 .regulatory_bands = {
2298                         EEPROM_REGULATORY_BAND_1_CHANNELS,
2299                         EEPROM_REGULATORY_BAND_2_CHANNELS,
2300                         EEPROM_REGULATORY_BAND_3_CHANNELS,
2301                         EEPROM_REGULATORY_BAND_4_CHANNELS,
2302                         EEPROM_REGULATORY_BAND_5_CHANNELS,
2303                         EEPROM_4965_REGULATORY_BAND_24_FAT_CHANNELS,
2304                         EEPROM_4965_REGULATORY_BAND_52_FAT_CHANNELS
2305                 },
2306                 .verify_signature  = iwlcore_eeprom_verify_signature,
2307                 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
2308                 .release_semaphore = iwlcore_eeprom_release_semaphore,
2309                 .calib_version = iwl4965_eeprom_calib_version,
2310                 .query_addr = iwlcore_eeprom_query_addr,
2311         },
2312         .send_tx_power  = iwl4965_send_tx_power,
2313         .update_chain_flags = iwl_update_chain_flags,
2314         .temperature = iwl4965_temperature_calib,
2315 };
2316
2317 static struct iwl_ops iwl4965_ops = {
2318         .lib = &iwl4965_lib,
2319         .hcmd = &iwl4965_hcmd,
2320         .utils = &iwl4965_hcmd_utils,
2321 };
2322
2323 struct iwl_cfg iwl4965_agn_cfg = {
2324         .name = "4965AGN",
2325         .fw_name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode",
2326         .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
2327         .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
2328         .eeprom_ver = EEPROM_4965_EEPROM_VERSION,
2329         .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION,
2330         .ops = &iwl4965_ops,
2331         .mod_params = &iwl4965_mod_params,
2332 };
2333
2334 /* Module firmware */
2335 MODULE_FIRMWARE("iwlwifi-4965" IWL4965_UCODE_API ".ucode");
2336
2337 module_param_named(antenna, iwl4965_mod_params.antenna, int, 0444);
2338 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
2339 module_param_named(disable, iwl4965_mod_params.disable, int, 0444);
2340 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
2341 module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, 0444);
2342 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
2343 module_param_named(debug, iwl4965_mod_params.debug, int, 0444);
2344 MODULE_PARM_DESC(debug, "debug output mask");
2345 module_param_named(
2346         disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, 0444);
2347 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
2348
2349 module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, 0444);
2350 MODULE_PARM_DESC(queues_num, "number of hw queues.");
2351 /* QoS */
2352 module_param_named(qos_enable, iwl4965_mod_params.enable_qos, int, 0444);
2353 MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
2354 /* 11n */
2355 module_param_named(11n_disable, iwl4965_mod_params.disable_11n, int, 0444);
2356 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
2357 module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K, int, 0444);
2358 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
2359
2360 module_param_named(fw_restart4965, iwl4965_mod_params.restart_fw, int, 0444);
2361 MODULE_PARM_DESC(fw_restart4965, "restart firmware in case of error");