SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/net/wireless/iwlwifi/iwl-4965.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  *  Intel Linux Wireless <ilw@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/init.h>
  30 #include <linux/pci.h>
  31 #include <linux/dma-mapping.h>
  32 #include <linux/delay.h>
  33 #include <linux/skbuff.h>
  34 #include <linux/netdevice.h>
  35 #include <linux/wireless.h>
  36 #include <net/mac80211.h>
  37 #include <linux/etherdevice.h>
  38 #include <asm/unaligned.h>
  39
  40 #include "iwl-eeprom.h"
  41 #include "iwl-dev.h"
  42 #include "iwl-core.h"
  43 #include "iwl-io.h"
  44 #include "iwl-helpers.h"
  45 #include "iwl-calib.h"
  46 #include "iwl-sta.h"
  47
  48 static int iwl4965_send_tx_power(struct iwl_priv *priv);
  49 static int iwl4965_hw_get_temperature(const struct iwl_priv *priv);
  50
  51 /* Highest firmware API version supported */
  52 #define IWL4965_UCODE_API_MAX 2
  53
  54 /* Lowest firmware API version supported */
  55 #define IWL4965_UCODE_API_MIN 2
  56
  57 #define IWL4965_FW_PRE "iwlwifi-4965-"
  58 #define _IWL4965_MODULE_FIRMWARE(api) IWL4965_FW_PRE #api ".ucode"
  59 #define IWL4965_MODULE_FIRMWARE(api) _IWL4965_MODULE_FIRMWARE(api)
  60
  61
  62 /* module parameters */
  63 static struct iwl_mod_params iwl4965_mod_params = {
  64         .num_of_queues = IWL49_NUM_QUEUES,
  65         .num_of_ampdu_queues = IWL49_NUM_AMPDU_QUEUES,
  66         .amsdu_size_8K = 1,
  67         .restart_fw = 1,
  68         /* the rest are 0 by default */
  69 };
  70
  71 /* check contents of special bootstrap uCode SRAM */
  72 static int iwl4965_verify_bsm(struct iwl_priv *priv)
  73 {
  74         __le32 *image = priv->ucode_boot.v_addr;
  75         u32 len = priv->ucode_boot.len;
  76         u32 reg;
  77         u32 val;
  78
  79         IWL_DEBUG_INFO(priv, "Begin verify bsm\n");
  80
  81         /* verify BSM SRAM contents */
  82         val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
  83         for (reg = BSM_SRAM_LOWER_BOUND;
  84              reg < BSM_SRAM_LOWER_BOUND + len;
  85              reg += sizeof(u32), image++) {
  86                 val = iwl_read_prph(priv, reg);
  87                 if (val != le32_to_cpu(*image)) {
  88                         IWL_ERR(priv, "BSM uCode verification failed at "
  89                                   "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  90                                   BSM_SRAM_LOWER_BOUND,
  91                                   reg - BSM_SRAM_LOWER_BOUND, len,
  92                                   val, le32_to_cpu(*image));
  93                         return -EIO;
  94                 }
  95         }
  96
  97         IWL_DEBUG_INFO(priv, "BSM bootstrap uCode image OK\n");
  98
  99         return 0;
 100 }
 101
 102 /**
 103  * iwl4965_load_bsm - Load bootstrap instructions
 104  *
 105  * BSM operation:
 106  *
 107  * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
 108  * in special SRAM that does not power down during RFKILL.  When powering back
 109  * up after power-saving sleeps (or during initial uCode load), the BSM loads
 110  * the bootstrap program into the on-board processor, and starts it.
 111  *
 112  * The bootstrap program loads (via DMA) instructions and data for a new
 113  * program from host DRAM locations indicated by the host driver in the
 114  * BSM_DRAM_* registers.  Once the new program is loaded, it starts
 115  * automatically.
 116  *
 117  * When initializing the NIC, the host driver points the BSM to the
 118  * "initialize" uCode image.  This uCode sets up some internal data, then
 119  * notifies host via "initialize alive" that it is complete.
 120  *
 121  * The host then replaces the BSM_DRAM_* pointer values to point to the
 122  * normal runtime uCode instructions and a backup uCode data cache buffer
 123  * (filled initially with starting data values for the on-board processor),
 124  * then triggers the "initialize" uCode to load and launch the runtime uCode,
 125  * which begins normal operation.
 126  *
 127  * When doing a power-save shutdown, runtime uCode saves data SRAM into
 128  * the backup data cache in DRAM before SRAM is powered down.
 129  *
 130  * When powering back up, the BSM loads the bootstrap program.  This reloads
 131  * the runtime uCode instructions and the backup data cache into SRAM,
 132  * and re-launches the runtime uCode from where it left off.
 133  */
 134 static int iwl4965_load_bsm(struct iwl_priv *priv)
 135 {
 136         __le32 *image = priv->ucode_boot.v_addr;
 137         u32 len = priv->ucode_boot.len;
 138         dma_addr_t pinst;
 139         dma_addr_t pdata;
 140         u32 inst_len;
 141         u32 data_len;
 142         int i;
 143         u32 done;
 144         u32 reg_offset;
 145         int ret;
 146
 147         IWL_DEBUG_INFO(priv, "Begin load bsm\n");
 148
 149         priv->ucode_type = UCODE_RT;
 150
 151         /* make sure bootstrap program is no larger than BSM's SRAM size */
 152         if (len > IWL49_MAX_BSM_SIZE)
 153                 return -EINVAL;
 154
 155         /* Tell bootstrap uCode where to find the "Initialize" uCode
 156          *   in host DRAM ... host DRAM physical address bits 35:4 for 4965.
 157          * NOTE:  iwl_init_alive_start() will replace these values,
 158          *        after the "initialize" uCode has run, to point to
 159          *        runtime/protocol instructions and backup data cache.
 160          */
 161         pinst = priv->ucode_init.p_addr >> 4;
 162         pdata = priv->ucode_init_data.p_addr >> 4;
 163         inst_len = priv->ucode_init.len;
 164         data_len = priv->ucode_init_data.len;
 165
 166         ret = iwl_grab_nic_access(priv);
 167         if (ret)
 168                 return ret;
 169
 170         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
 171         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
 172         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
 173         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
 174
 175         /* Fill BSM memory with bootstrap instructions */
 176         for (reg_offset = BSM_SRAM_LOWER_BOUND;
 177              reg_offset < BSM_SRAM_LOWER_BOUND + len;
 178              reg_offset += sizeof(u32), image++)
 179                 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
 180
 181         ret = iwl4965_verify_bsm(priv);
 182         if (ret) {
 183                 iwl_release_nic_access(priv);
 184                 return ret;
 185         }
 186
 187         /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
 188         iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
 189         iwl_write_prph(priv, BSM_WR_MEM_DST_REG, IWL49_RTC_INST_LOWER_BOUND);
 190         iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
 191
 192         /* Load bootstrap code into instruction SRAM now,
 193          *   to prepare to load "initialize" uCode */
 194         iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
 195
 196         /* Wait for load of bootstrap uCode to finish */
 197         for (i = 0; i < 100; i++) {
 198                 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
 199                 if (!(done & BSM_WR_CTRL_REG_BIT_START))
 200                         break;
 201                 udelay(10);
 202         }
 203         if (i < 100)
 204                 IWL_DEBUG_INFO(priv, "BSM write complete, poll %d iterations\n", i);
 205         else {
 206                 IWL_ERR(priv, "BSM write did not complete!\n");
 207                 return -EIO;
 208         }
 209
 210         /* Enable future boot loads whenever power management unit triggers it
 211          *   (e.g. when powering back up after power-save shutdown) */
 212         iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
 213
 214         iwl_release_nic_access(priv);
 215
 216         return 0;
 217 }
 218
 219 /**
 220  * iwl4965_set_ucode_ptrs - Set uCode address location
 221  *
 222  * Tell initialization uCode where to find runtime uCode.
 223  *
 224  * BSM registers initially contain pointers to initialization uCode.
 225  * We need to replace them to load runtime uCode inst and data,
 226  * and to save runtime data when powering down.
 227  */
 228 static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
 229 {
 230         dma_addr_t pinst;
 231         dma_addr_t pdata;
 232         unsigned long flags;
 233         int ret = 0;
 234
 235         /* bits 35:4 for 4965 */
 236         pinst = priv->ucode_code.p_addr >> 4;
 237         pdata = priv->ucode_data_backup.p_addr >> 4;
 238
 239         spin_lock_irqsave(&priv->lock, flags);
 240         ret = iwl_grab_nic_access(priv);
 241         if (ret) {
 242                 spin_unlock_irqrestore(&priv->lock, flags);
 243                 return ret;
 244         }
 245
 246         /* Tell bootstrap uCode where to find image to load */
 247         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
 248         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
 249         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
 250                                  priv->ucode_data.len);
 251
 252         /* Inst byte count must be last to set up, bit 31 signals uCode
 253          *   that all new ptr/size info is in place */
 254         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
 255                                  priv->ucode_code.len | BSM_DRAM_INST_LOAD);
 256         iwl_release_nic_access(priv);
 257
 258         spin_unlock_irqrestore(&priv->lock, flags);
 259
 260         IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
 261
 262         return ret;
 263 }
 264
 265 /**
 266  * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
 267  *
 268  * Called after REPLY_ALIVE notification received from "initialize" uCode.
 269  *
 270  * The 4965 "initialize" ALIVE reply contains calibration data for:
 271  *   Voltage, temperature, and MIMO tx gain correction, now stored in priv
 272  *   (3945 does not contain this data).
 273  *
 274  * Tell "initialize" uCode to go ahead and load the runtime uCode.
 275 */
 276 static void iwl4965_init_alive_start(struct iwl_priv *priv)
 277 {
 278         /* Check alive response for "valid" sign from uCode */
 279         if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
 280                 /* We had an error bringing up the hardware, so take it
 281                  * all the way back down so we can try again */
 282                 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
 283                 goto restart;
 284         }
 285
 286         /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
 287          * This is a paranoid check, because we would not have gotten the
 288          * "initialize" alive if code weren't properly loaded.  */
 289         if (iwl_verify_ucode(priv)) {
 290                 /* Runtime instruction load was bad;
 291                  * take it all the way back down so we can try again */
 292                 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
 293                 goto restart;
 294         }
 295
 296         /* Calculate temperature */
 297         priv->temperature = iwl4965_hw_get_temperature(priv);
 298
 299         /* Send pointers to protocol/runtime uCode image ... init code will
 300          * load and launch runtime uCode, which will send us another "Alive"
 301          * notification. */
 302         IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
 303         if (iwl4965_set_ucode_ptrs(priv)) {
 304                 /* Runtime instruction load won't happen;
 305                  * take it all the way back down so we can try again */
 306                 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
 307                 goto restart;
 308         }
 309         return;
 310
 311 restart:
 312         queue_work(priv->workqueue, &priv->restart);
 313 }
 314
 315 static int is_fat_channel(__le32 rxon_flags)
 316 {
 317         return (rxon_flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) ||
 318                 (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK);
 319 }
 320
 321 /*
 322  * EEPROM handlers
 323  */
 324 static u16 iwl4965_eeprom_calib_version(struct iwl_priv *priv)
 325 {
 326         return iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
 327 }
 328
 329 /*
 330  * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
 331  * must be called under priv->lock and mac access
 332  */
 333 static void iwl4965_txq_set_sched(struct iwl_priv *priv, u32 mask)
 334 {
 335         iwl_write_prph(priv, IWL49_SCD_TXFACT, mask);
 336 }
 337
 338 static int iwl4965_apm_init(struct iwl_priv *priv)
 339 {
 340         int ret = 0;
 341
 342         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
 343                           CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
 344
 345         /* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */
 346         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
 347                           CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
 348
 349         /* set "initialization complete" bit to move adapter
 350          * D0U* --> D0A* state */
 351         iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 352
 353         /* wait for clock stabilization */
 354         ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
 355                         CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
 356         if (ret < 0) {
 357                 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
 358                 goto out;
 359         }
 360
 361         ret = iwl_grab_nic_access(priv);
 362         if (ret)
 363                 goto out;
 364
 365         /* enable DMA */
 366         iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT |
 367                                                 APMG_CLK_VAL_BSM_CLK_RQT);
 368
 369         udelay(20);
 370
 371         /* disable L1-Active */
 372         iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
 373                           APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
 374
 375         iwl_release_nic_access(priv);
 376 out:
 377         return ret;
 378 }
 379
 380
 381 static void iwl4965_nic_config(struct iwl_priv *priv)
 382 {
 383         unsigned long flags;
 384         u16 dctl;
 385         u16 radio_cfg;
 386         u16 lctl;
 387
 388         spin_lock_irqsave(&priv->lock, flags);
 389
 390         if ((priv->rev_id & 0x80) == 0x80 && (priv->rev_id & 0x7f) < 8) {
 391                 int pos = pci_find_capability(priv->pci_dev, PCI_CAP_ID_EXP);
 392                 pci_read_config_word(priv->pci_dev, pos + PCI_EXP_DEVCTL, &dctl);
 393
 394                 /* Enable No Snoop field */
 395                 pci_write_config_word(priv->pci_dev, pos + PCI_EXP_DEVCTL,
 396                                         dctl & ~PCI_EXP_DEVCTL_NOSNOOP_EN);
 397         }
 398
 399         lctl = iwl_pcie_link_ctl(priv);
 400
 401         /* HW bug W/A - negligible power consumption */
 402         /* L1-ASPM is enabled by BIOS */
 403         if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) == PCI_CFG_LINK_CTRL_VAL_L1_EN)
 404                 /* L1-ASPM enabled: disable L0S  */
 405                 iwl_set_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
 406         else
 407                 /* L1-ASPM disabled: enable L0S */
 408                 iwl_clear_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
 409
 410         radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
 411
 412         /* write radio config values to register */
 413         if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
 414                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 415                             EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
 416                             EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
 417                             EEPROM_RF_CFG_DASH_MSK(radio_cfg));
 418
 419         /* set CSR_HW_CONFIG_REG for uCode use */
 420         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 421                     CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
 422                     CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
 423
 424         priv->calib_info = (struct iwl_eeprom_calib_info *)
 425                 iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
 426
 427         spin_unlock_irqrestore(&priv->lock, flags);
 428 }
 429
 430 static int iwl4965_apm_stop_master(struct iwl_priv *priv)
 431 {
 432         unsigned long flags;
 433
 434         spin_lock_irqsave(&priv->lock, flags);
 435
 436         /* set stop master bit */
 437         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
 438
 439         iwl_poll_direct_bit(priv, CSR_RESET,
 440                         CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
 441
 442         spin_unlock_irqrestore(&priv->lock, flags);
 443         IWL_DEBUG_INFO(priv, "stop master\n");
 444
 445         return 0;
 446 }
 447
 448 static void iwl4965_apm_stop(struct iwl_priv *priv)
 449 {
 450         unsigned long flags;
 451
 452         iwl4965_apm_stop_master(priv);
 453
 454         spin_lock_irqsave(&priv->lock, flags);
 455
 456         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
 457
 458         udelay(10);
 459         /* clear "init complete"  move adapter D0A* --> D0U state */
 460         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 461         spin_unlock_irqrestore(&priv->lock, flags);
 462 }
 463
 464 static int iwl4965_apm_reset(struct iwl_priv *priv)
 465 {
 466         int ret = 0;
 467         unsigned long flags;
 468
 469         iwl4965_apm_stop_master(priv);
 470
 471         spin_lock_irqsave(&priv->lock, flags);
 472
 473         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
 474
 475         udelay(10);
 476
 477         /* FIXME: put here L1A -L0S w/a */
 478
 479         iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 480
 481         ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
 482                         CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
 483         if (ret < 0)
 484                 goto out;
 485
 486         udelay(10);
 487
 488         ret = iwl_grab_nic_access(priv);
 489         if (ret)
 490                 goto out;
 491         /* Enable DMA and BSM Clock */
 492         iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT |
 493                                               APMG_CLK_VAL_BSM_CLK_RQT);
 494
 495         udelay(10);
 496
 497         /* disable L1A */
 498         iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
 499                           APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
 500
 501         iwl_release_nic_access(priv);
 502
 503         clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
 504         wake_up_interruptible(&priv->wait_command_queue);
 505
 506 out:
 507         spin_unlock_irqrestore(&priv->lock, flags);
 508
 509         return ret;
 510 }
 511
 512 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
 513  * Called after every association, but this runs only once!
 514  *  ... once chain noise is calibrated the first time, it's good forever.  */
 515 static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
 516 {
 517         struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
 518
 519         if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
 520                 struct iwl_calib_diff_gain_cmd cmd;
 521
 522                 memset(&cmd, 0, sizeof(cmd));
 523                 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
 524                 cmd.diff_gain_a = 0;
 525                 cmd.diff_gain_b = 0;
 526                 cmd.diff_gain_c = 0;
 527                 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
 528                                  sizeof(cmd), &cmd))
 529                         IWL_ERR(priv,
 530                                 "Could not send REPLY_PHY_CALIBRATION_CMD\n");
 531                 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
 532                 IWL_DEBUG_CALIB(priv, "Run chain_noise_calibrate\n");
 533         }
 534 }
 535
 536 static void iwl4965_gain_computation(struct iwl_priv *priv,
 537                 u32 *average_noise,
 538                 u16 min_average_noise_antenna_i,
 539                 u32 min_average_noise)
 540 {
 541         int i, ret;
 542         struct iwl_chain_noise_data *data = &priv->chain_noise_data;
 543
 544         data->delta_gain_code[min_average_noise_antenna_i] = 0;
 545
 546         for (i = 0; i < NUM_RX_CHAINS; i++) {
 547                 s32 delta_g = 0;
 548
 549                 if (!(data->disconn_array[i]) &&
 550                     (data->delta_gain_code[i] ==
 551                              CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
 552                         delta_g = average_noise[i] - min_average_noise;
 553                         data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
 554                         data->delta_gain_code[i] =
 555                                 min(data->delta_gain_code[i],
 556                                 (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
 557
 558                         data->delta_gain_code[i] =
 559                                 (data->delta_gain_code[i] | (1 << 2));
 560                 } else {
 561                         data->delta_gain_code[i] = 0;
 562                 }
 563         }
 564         IWL_DEBUG_CALIB(priv, "delta_gain_codes: a %d b %d c %d\n",
 565                      data->delta_gain_code[0],
 566                      data->delta_gain_code[1],
 567                      data->delta_gain_code[2]);
 568
 569         /* Differential gain gets sent to uCode only once */
 570         if (!data->radio_write) {
 571                 struct iwl_calib_diff_gain_cmd cmd;
 572                 data->radio_write = 1;
 573
 574                 memset(&cmd, 0, sizeof(cmd));
 575                 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
 576                 cmd.diff_gain_a = data->delta_gain_code[0];
 577                 cmd.diff_gain_b = data->delta_gain_code[1];
 578                 cmd.diff_gain_c = data->delta_gain_code[2];
 579                 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
 580                                       sizeof(cmd), &cmd);
 581                 if (ret)
 582                         IWL_DEBUG_CALIB(priv, "fail sending cmd "
 583                                      "REPLY_PHY_CALIBRATION_CMD \n");
 584
 585                 /* TODO we might want recalculate
 586                  * rx_chain in rxon cmd */
 587
 588                 /* Mark so we run this algo only once! */
 589                 data->state = IWL_CHAIN_NOISE_CALIBRATED;
 590         }
 591         data->chain_noise_a = 0;
 592         data->chain_noise_b = 0;
 593         data->chain_noise_c = 0;
 594         data->chain_signal_a = 0;
 595         data->chain_signal_b = 0;
 596         data->chain_signal_c = 0;
 597         data->beacon_count = 0;
 598 }
 599
 600 static void iwl4965_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
 601                         __le32 *tx_flags)
 602 {
 603         if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
 604                 *tx_flags |= TX_CMD_FLG_RTS_MSK;
 605                 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
 606         } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
 607                 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
 608                 *tx_flags |= TX_CMD_FLG_CTS_MSK;
 609         }
 610 }
 611
 612 static void iwl4965_bg_txpower_work(struct work_struct *work)
 613 {
 614         struct iwl_priv *priv = container_of(work, struct iwl_priv,
 615                         txpower_work);
 616
 617         /* If a scan happened to start before we got here
 618          * then just return; the statistics notification will
 619          * kick off another scheduled work to compensate for
 620          * any temperature delta we missed here. */
 621         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
 622             test_bit(STATUS_SCANNING, &priv->status))
 623                 return;
 624
 625         mutex_lock(&priv->mutex);
 626
 627         /* Regardless of if we are associated, we must reconfigure the
 628          * TX power since frames can be sent on non-radar channels while
 629          * not associated */
 630         iwl4965_send_tx_power(priv);
 631
 632         /* Update last_temperature to keep is_calib_needed from running
 633          * when it isn't needed... */
 634         priv->last_temperature = priv->temperature;
 635
 636         mutex_unlock(&priv->mutex);
 637 }
 638
 639 /*
 640  * Acquire priv->lock before calling this function !
 641  */
 642 static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
 643 {
 644         iwl_write_direct32(priv, HBUS_TARG_WRPTR,
 645                              (index & 0xff) | (txq_id << 8));
 646         iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
 647 }
 648
 649 /**
 650  * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
 651  * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
 652  * @scd_retry: (1) Indicates queue will be used in aggregation mode
 653  *
 654  * NOTE:  Acquire priv->lock before calling this function !
 655  */
 656 static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
 657                                         struct iwl_tx_queue *txq,
 658                                         int tx_fifo_id, int scd_retry)
 659 {
 660         int txq_id = txq->q.id;
 661
 662         /* Find out whether to activate Tx queue */
 663         int active = test_bit(txq_id, &priv->txq_ctx_active_msk) ? 1 : 0;
 664
 665         /* Set up and activate */
 666         iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
 667                          (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
 668                          (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
 669                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
 670                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
 671                          IWL49_SCD_QUEUE_STTS_REG_MSK);
 672
 673         txq->sched_retry = scd_retry;
 674
 675         IWL_DEBUG_INFO(priv, "%s %s Queue %d on AC %d\n",
 676                        active ? "Activate" : "Deactivate",
 677                        scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
 678 }
 679
 680 static const u16 default_queue_to_tx_fifo[] = {
 681         IWL_TX_FIFO_AC3,
 682         IWL_TX_FIFO_AC2,
 683         IWL_TX_FIFO_AC1,
 684         IWL_TX_FIFO_AC0,
 685         IWL49_CMD_FIFO_NUM,
 686         IWL_TX_FIFO_HCCA_1,
 687         IWL_TX_FIFO_HCCA_2
 688 };
 689
 690 static int iwl4965_alive_notify(struct iwl_priv *priv)
 691 {
 692         u32 a;
 693         unsigned long flags;
 694         int ret;
 695         int i, chan;
 696         u32 reg_val;
 697
 698         spin_lock_irqsave(&priv->lock, flags);
 699
 700         ret = iwl_grab_nic_access(priv);
 701         if (ret) {
 702                 spin_unlock_irqrestore(&priv->lock, flags);
 703                 return ret;
 704         }
 705
 706         /* Clear 4965's internal Tx Scheduler data base */
 707         priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
 708         a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
 709         for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
 710                 iwl_write_targ_mem(priv, a, 0);
 711         for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
 712                 iwl_write_targ_mem(priv, a, 0);
 713         for (; a < sizeof(u16) * priv->hw_params.max_txq_num; a += 4)
 714                 iwl_write_targ_mem(priv, a, 0);
 715
 716         /* Tel 4965 where to find Tx byte count tables */
 717         iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
 718                         priv->scd_bc_tbls.dma >> 10);
 719
 720         /* Enable DMA channel */
 721         for (chan = 0; chan < FH49_TCSR_CHNL_NUM ; chan++)
 722                 iwl_write_direct32(priv, FH_TCSR_CHNL_TX_CONFIG_REG(chan),
 723                                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
 724                                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
 725
 726         /* Update FH chicken bits */
 727         reg_val = iwl_read_direct32(priv, FH_TX_CHICKEN_BITS_REG);
 728         iwl_write_direct32(priv, FH_TX_CHICKEN_BITS_REG,
 729                            reg_val | FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);
 730
 731         /* Disable chain mode for all queues */
 732         iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
 733
 734         /* Initialize each Tx queue (including the command queue) */
 735         for (i = 0; i < priv->hw_params.max_txq_num; i++) {
 736
 737                 /* TFD circular buffer read/write indexes */
 738                 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
 739                 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
 740
 741                 /* Max Tx Window size for Scheduler-ACK mode */
 742                 iwl_write_targ_mem(priv, priv->scd_base_addr +
 743                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
 744                                 (SCD_WIN_SIZE <<
 745                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
 746                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
 747
 748                 /* Frame limit */
 749                 iwl_write_targ_mem(priv, priv->scd_base_addr +
 750                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
 751                                 sizeof(u32),
 752                                 (SCD_FRAME_LIMIT <<
 753                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
 754                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
 755
 756         }
 757         iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
 758                                  (1 << priv->hw_params.max_txq_num) - 1);
 759
 760         /* Activate all Tx DMA/FIFO channels */
 761         priv->cfg->ops->lib->txq_set_sched(priv, IWL_MASK(0, 6));
 762
 763         iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
 764
 765         /* Map each Tx/cmd queue to its corresponding fifo */
 766         for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
 767                 int ac = default_queue_to_tx_fifo[i];
 768                 iwl_txq_ctx_activate(priv, i);
 769                 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
 770         }
 771
 772         iwl_release_nic_access(priv);
 773         spin_unlock_irqrestore(&priv->lock, flags);
 774
 775         return ret;
 776 }
 777
 778 static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
 779         .min_nrg_cck = 97,
 780         .max_nrg_cck = 0,
 781
 782         .auto_corr_min_ofdm = 85,
 783         .auto_corr_min_ofdm_mrc = 170,
 784         .auto_corr_min_ofdm_x1 = 105,
 785         .auto_corr_min_ofdm_mrc_x1 = 220,
 786
 787         .auto_corr_max_ofdm = 120,
 788         .auto_corr_max_ofdm_mrc = 210,
 789         .auto_corr_max_ofdm_x1 = 140,
 790         .auto_corr_max_ofdm_mrc_x1 = 270,
 791
 792         .auto_corr_min_cck = 125,
 793         .auto_corr_max_cck = 200,
 794         .auto_corr_min_cck_mrc = 200,
 795         .auto_corr_max_cck_mrc = 400,
 796
 797         .nrg_th_cck = 100,
 798         .nrg_th_ofdm = 100,
 799 };
 800
 801 /**
 802  * iwl4965_hw_set_hw_params
 803  *
 804  * Called when initializing driver
 805  */
 806 static int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
 807 {
 808
 809         if ((priv->cfg->mod_params->num_of_queues > IWL49_NUM_QUEUES) ||
 810             (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) {
 811                 IWL_ERR(priv,
 812                         "invalid queues_num, should be between %d and %d\n",
 813                         IWL_MIN_NUM_QUEUES, IWL49_NUM_QUEUES);
 814                 return -EINVAL;
 815         }
 816
 817         priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues;
 818         priv->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM;
 819         priv->hw_params.scd_bc_tbls_size =
 820                         IWL49_NUM_QUEUES * sizeof(struct iwl4965_scd_bc_tbl);
 821         priv->hw_params.tfd_size = sizeof(struct iwl_tfd);
 822         priv->hw_params.max_stations = IWL4965_STATION_COUNT;
 823         priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
 824         priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
 825         priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
 826         priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
 827         priv->hw_params.fat_channel = BIT(IEEE80211_BAND_5GHZ);
 828
 829         priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR;
 830
 831         priv->hw_params.tx_chains_num = 2;
 832         priv->hw_params.rx_chains_num = 2;
 833         priv->hw_params.valid_tx_ant = ANT_A | ANT_B;
 834         priv->hw_params.valid_rx_ant = ANT_A | ANT_B;
 835         priv->hw_params.ct_kill_threshold = CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD);
 836
 837         priv->hw_params.sens = &iwl4965_sensitivity;
 838
 839         return 0;
 840 }
 841
 842 static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
 843 {
 844         s32 sign = 1;
 845
 846         if (num < 0) {
 847                 sign = -sign;
 848                 num = -num;
 849         }
 850         if (denom < 0) {
 851                 sign = -sign;
 852                 denom = -denom;
 853         }
 854         *res = 1;
 855         *res = ((num * 2 + denom) / (denom * 2)) * sign;
 856
 857         return 1;
 858 }
 859
 860 /**
 861  * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
 862  *
 863  * Determines power supply voltage compensation for txpower calculations.
 864  * Returns number of 1/2-dB steps to subtract from gain table index,
 865  * to compensate for difference between power supply voltage during
 866  * factory measurements, vs. current power supply voltage.
 867  *
 868  * Voltage indication is higher for lower voltage.
 869  * Lower voltage requires more gain (lower gain table index).
 870  */
 871 static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
 872                                             s32 current_voltage)
 873 {
 874         s32 comp = 0;
 875
 876         if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
 877             (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
 878                 return 0;
 879
 880         iwl4965_math_div_round(current_voltage - eeprom_voltage,
 881                                TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
 882
 883         if (current_voltage > eeprom_voltage)
 884                 comp *= 2;
 885         if ((comp < -2) || (comp > 2))
 886                 comp = 0;
 887
 888         return comp;
 889 }
 890
 891 static s32 iwl4965_get_tx_atten_grp(u16 channel)
 892 {
 893         if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
 894             channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
 895                 return CALIB_CH_GROUP_5;
 896
 897         if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
 898             channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
 899                 return CALIB_CH_GROUP_1;
 900
 901         if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
 902             channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
 903                 return CALIB_CH_GROUP_2;
 904
 905         if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
 906             channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
 907                 return CALIB_CH_GROUP_3;
 908
 909         if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
 910             channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
 911                 return CALIB_CH_GROUP_4;
 912
 913         return -1;
 914 }
 915
 916 static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
 917 {
 918         s32 b = -1;
 919
 920         for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
 921                 if (priv->calib_info->band_info[b].ch_from == 0)
 922                         continue;
 923
 924                 if ((channel >= priv->calib_info->band_info[b].ch_from)
 925                     && (channel <= priv->calib_info->band_info[b].ch_to))
 926                         break;
 927         }
 928
 929         return b;
 930 }
 931
 932 static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
 933 {
 934         s32 val;
 935
 936         if (x2 == x1)
 937                 return y1;
 938         else {
 939                 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
 940                 return val + y2;
 941         }
 942 }
 943
 944 /**
 945  * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
 946  *
 947  * Interpolates factory measurements from the two sample channels within a
 948  * sub-band, to apply to channel of interest.  Interpolation is proportional to
 949  * differences in channel frequencies, which is proportional to differences
 950  * in channel number.
 951  */
 952 static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
 953                                     struct iwl_eeprom_calib_ch_info *chan_info)
 954 {
 955         s32 s = -1;
 956         u32 c;
 957         u32 m;
 958         const struct iwl_eeprom_calib_measure *m1;
 959         const struct iwl_eeprom_calib_measure *m2;
 960         struct iwl_eeprom_calib_measure *omeas;
 961         u32 ch_i1;
 962         u32 ch_i2;
 963
 964         s = iwl4965_get_sub_band(priv, channel);
 965         if (s >= EEPROM_TX_POWER_BANDS) {
 966                 IWL_ERR(priv, "Tx Power can not find channel %d\n", channel);
 967                 return -1;
 968         }
 969
 970         ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
 971         ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
 972         chan_info->ch_num = (u8) channel;
 973
 974         IWL_DEBUG_TXPOWER(priv, "channel %d subband %d factory cal ch %d & %d\n",
 975                           channel, s, ch_i1, ch_i2);
 976
 977         for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
 978                 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
 979                         m1 = &(priv->calib_info->band_info[s].ch1.
 980                                measurements[c][m]);
 981                         m2 = &(priv->calib_info->band_info[s].ch2.
 982                                measurements[c][m]);
 983                         omeas = &(chan_info->measurements[c][m]);
 984
 985                         omeas->actual_pow =
 986                             (u8) iwl4965_interpolate_value(channel, ch_i1,
 987                                                            m1->actual_pow,
 988                                                            ch_i2,
 989                                                            m2->actual_pow);
 990                         omeas->gain_idx =
 991                             (u8) iwl4965_interpolate_value(channel, ch_i1,
 992                                                            m1->gain_idx, ch_i2,
 993                                                            m2->gain_idx);
 994                         omeas->temperature =
 995                             (u8) iwl4965_interpolate_value(channel, ch_i1,
 996                                                            m1->temperature,
 997                                                            ch_i2,
 998                                                            m2->temperature);
 999                         omeas->pa_det =
1000                             (s8) iwl4965_interpolate_value(channel, ch_i1,
1001                                                            m1->pa_det, ch_i2,
1002                                                            m2->pa_det);
1003
1004                         IWL_DEBUG_TXPOWER(priv,
1005                                 "chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
1006                                 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
1007                         IWL_DEBUG_TXPOWER(priv,
1008                                 "chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
1009                                 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
1010                         IWL_DEBUG_TXPOWER(priv,
1011                                 "chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
1012                                 m1->pa_det, m2->pa_det, omeas->pa_det);
1013                         IWL_DEBUG_TXPOWER(priv,
1014                                 "chain %d meas %d  T1=%d  T2=%d  T=%d\n", c, m,
1015                                 m1->temperature, m2->temperature,
1016                                 omeas->temperature);
1017                 }
1018         }
1019
1020         return 0;
1021 }
1022
1023 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
1024  * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
1025 static s32 back_off_table[] = {
1026         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
1027         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
1028         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
1029         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
1030         10                      /* CCK */
1031 };
1032
1033 /* Thermal compensation values for txpower for various frequency ranges ...
1034  *   ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
1035 static struct iwl4965_txpower_comp_entry {
1036         s32 degrees_per_05db_a;
1037         s32 degrees_per_05db_a_denom;
1038 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
1039         {9, 2},                 /* group 0 5.2, ch  34-43 */
1040         {4, 1},                 /* group 1 5.2, ch  44-70 */
1041         {4, 1},                 /* group 2 5.2, ch  71-124 */
1042         {4, 1},                 /* group 3 5.2, ch 125-200 */
1043         {3, 1}                  /* group 4 2.4, ch   all */
1044 };
1045
1046 static s32 get_min_power_index(s32 rate_power_index, u32 band)
1047 {
1048         if (!band) {
1049                 if ((rate_power_index & 7) <= 4)
1050                         return MIN_TX_GAIN_INDEX_52GHZ_EXT;
1051         }
1052         return MIN_TX_GAIN_INDEX;
1053 }
1054
1055 struct gain_entry {
1056         u8 dsp;
1057         u8 radio;
1058 };
1059
1060 static const struct gain_entry gain_table[2][108] = {
1061         /* 5.2GHz power gain index table */
1062         {
1063          {123, 0x3F},           /* highest txpower */
1064          {117, 0x3F},
1065          {110, 0x3F},
1066          {104, 0x3F},
1067          {98, 0x3F},
1068          {110, 0x3E},
1069          {104, 0x3E},
1070          {98, 0x3E},
1071          {110, 0x3D},
1072          {104, 0x3D},
1073          {98, 0x3D},
1074          {110, 0x3C},
1075          {104, 0x3C},
1076          {98, 0x3C},
1077          {110, 0x3B},
1078          {104, 0x3B},
1079          {98, 0x3B},
1080          {110, 0x3A},
1081          {104, 0x3A},
1082          {98, 0x3A},
1083          {110, 0x39},
1084          {104, 0x39},
1085          {98, 0x39},
1086          {110, 0x38},
1087          {104, 0x38},
1088          {98, 0x38},
1089          {110, 0x37},
1090          {104, 0x37},
1091          {98, 0x37},
1092          {110, 0x36},
1093          {104, 0x36},
1094          {98, 0x36},
1095          {110, 0x35},
1096          {104, 0x35},
1097          {98, 0x35},
1098          {110, 0x34},
1099          {104, 0x34},
1100          {98, 0x34},
1101          {110, 0x33},
1102          {104, 0x33},
1103          {98, 0x33},
1104          {110, 0x32},
1105          {104, 0x32},
1106          {98, 0x32},
1107          {110, 0x31},
1108          {104, 0x31},
1109          {98, 0x31},
1110          {110, 0x30},
1111          {104, 0x30},
1112          {98, 0x30},
1113          {110, 0x25},
1114          {104, 0x25},
1115          {98, 0x25},
1116          {110, 0x24},
1117          {104, 0x24},
1118          {98, 0x24},
1119          {110, 0x23},
1120          {104, 0x23},
1121          {98, 0x23},
1122          {110, 0x22},
1123          {104, 0x18},
1124          {98, 0x18},
1125          {110, 0x17},
1126          {104, 0x17},
1127          {98, 0x17},
1128          {110, 0x16},
1129          {104, 0x16},
1130          {98, 0x16},
1131          {110, 0x15},
1132          {104, 0x15},
1133          {98, 0x15},
1134          {110, 0x14},
1135          {104, 0x14},
1136          {98, 0x14},
1137          {110, 0x13},
1138          {104, 0x13},
1139          {98, 0x13},
1140          {110, 0x12},
1141          {104, 0x08},
1142          {98, 0x08},
1143          {110, 0x07},
1144          {104, 0x07},
1145          {98, 0x07},
1146          {110, 0x06},
1147          {104, 0x06},
1148          {98, 0x06},
1149          {110, 0x05},
1150          {104, 0x05},
1151          {98, 0x05},
1152          {110, 0x04},
1153          {104, 0x04},
1154          {98, 0x04},
1155          {110, 0x03},
1156          {104, 0x03},
1157          {98, 0x03},
1158          {110, 0x02},
1159          {104, 0x02},
1160          {98, 0x02},
1161          {110, 0x01},
1162          {104, 0x01},
1163          {98, 0x01},
1164          {110, 0x00},
1165          {104, 0x00},
1166          {98, 0x00},
1167          {93, 0x00},
1168          {88, 0x00},
1169          {83, 0x00},
1170          {78, 0x00},
1171          },
1172         /* 2.4GHz power gain index table */
1173         {
1174          {110, 0x3f},           /* highest txpower */
1175          {104, 0x3f},
1176          {98, 0x3f},
1177          {110, 0x3e},
1178          {104, 0x3e},
1179          {98, 0x3e},
1180          {110, 0x3d},
1181          {104, 0x3d},
1182          {98, 0x3d},
1183          {110, 0x3c},
1184          {104, 0x3c},
1185          {98, 0x3c},
1186          {110, 0x3b},
1187          {104, 0x3b},
1188          {98, 0x3b},
1189          {110, 0x3a},
1190          {104, 0x3a},
1191          {98, 0x3a},
1192          {110, 0x39},
1193          {104, 0x39},
1194          {98, 0x39},
1195          {110, 0x38},
1196          {104, 0x38},
1197          {98, 0x38},
1198          {110, 0x37},
1199          {104, 0x37},
1200          {98, 0x37},
1201          {110, 0x36},
1202          {104, 0x36},
1203          {98, 0x36},
1204          {110, 0x35},
1205          {104, 0x35},
1206          {98, 0x35},
1207          {110, 0x34},
1208          {104, 0x34},
1209          {98, 0x34},
1210          {110, 0x33},
1211          {104, 0x33},
1212          {98, 0x33},
1213          {110, 0x32},
1214          {104, 0x32},
1215          {98, 0x32},
1216          {110, 0x31},
1217          {104, 0x31},
1218          {98, 0x31},
1219          {110, 0x30},
1220          {104, 0x30},
1221          {98, 0x30},
1222          {110, 0x6},
1223          {104, 0x6},
1224          {98, 0x6},
1225          {110, 0x5},
1226          {104, 0x5},
1227          {98, 0x5},
1228          {110, 0x4},
1229          {104, 0x4},
1230          {98, 0x4},
1231          {110, 0x3},
1232          {104, 0x3},
1233          {98, 0x3},
1234          {110, 0x2},
1235          {104, 0x2},
1236          {98, 0x2},
1237          {110, 0x1},
1238          {104, 0x1},
1239          {98, 0x1},
1240          {110, 0x0},
1241          {104, 0x0},
1242          {98, 0x0},
1243          {97, 0},
1244          {96, 0},
1245          {95, 0},
1246          {94, 0},
1247          {93, 0},
1248          {92, 0},
1249          {91, 0},
1250          {90, 0},
1251          {89, 0},
1252          {88, 0},
1253          {87, 0},
1254          {86, 0},
1255          {85, 0},
1256          {84, 0},
1257          {83, 0},
1258          {82, 0},
1259          {81, 0},
1260          {80, 0},
1261          {79, 0},
1262          {78, 0},
1263          {77, 0},
1264          {76, 0},
1265          {75, 0},
1266          {74, 0},
1267          {73, 0},
1268          {72, 0},
1269          {71, 0},
1270          {70, 0},
1271          {69, 0},
1272          {68, 0},
1273          {67, 0},
1274          {66, 0},
1275          {65, 0},
1276          {64, 0},
1277          {63, 0},
1278          {62, 0},
1279          {61, 0},
1280          {60, 0},
1281          {59, 0},
1282          }
1283 };
1284
1285 static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
1286                                     u8 is_fat, u8 ctrl_chan_high,
1287                                     struct iwl4965_tx_power_db *tx_power_tbl)
1288 {
1289         u8 saturation_power;
1290         s32 target_power;
1291         s32 user_target_power;
1292         s32 power_limit;
1293         s32 current_temp;
1294         s32 reg_limit;
1295         s32 current_regulatory;
1296         s32 txatten_grp = CALIB_CH_GROUP_MAX;
1297         int i;
1298         int c;
1299         const struct iwl_channel_info *ch_info = NULL;
1300         struct iwl_eeprom_calib_ch_info ch_eeprom_info;
1301         const struct iwl_eeprom_calib_measure *measurement;
1302         s16 voltage;
1303         s32 init_voltage;
1304         s32 voltage_compensation;
1305         s32 degrees_per_05db_num;
1306         s32 degrees_per_05db_denom;
1307         s32 factory_temp;
1308         s32 temperature_comp[2];
1309         s32 factory_gain_index[2];
1310         s32 factory_actual_pwr[2];
1311         s32 power_index;
1312
1313         /* tx_power_user_lmt is in dBm, convert to half-dBm (half-dB units
1314          *   are used for indexing into txpower table) */
1315         user_target_power = 2 * priv->tx_power_user_lmt;
1316
1317         /* Get current (RXON) channel, band, width */
1318         IWL_DEBUG_TXPOWER(priv, "chan %d band %d is_fat %d\n", channel, band,
1319                           is_fat);
1320
1321         ch_info = iwl_get_channel_info(priv, priv->band, channel);
1322
1323         if (!is_channel_valid(ch_info))
1324                 return -EINVAL;
1325
1326         /* get txatten group, used to select 1) thermal txpower adjustment
1327          *   and 2) mimo txpower balance between Tx chains. */
1328         txatten_grp = iwl4965_get_tx_atten_grp(channel);
1329         if (txatten_grp < 0) {
1330                 IWL_ERR(priv, "Can't find txatten group for channel %d.\n",
1331                           channel);
1332                 return -EINVAL;
1333         }
1334
1335         IWL_DEBUG_TXPOWER(priv, "channel %d belongs to txatten group %d\n",
1336                           channel, txatten_grp);
1337
1338         if (is_fat) {
1339                 if (ctrl_chan_high)
1340                         channel -= 2;
1341                 else
1342                         channel += 2;
1343         }
1344
1345         /* hardware txpower limits ...
1346          * saturation (clipping distortion) txpowers are in half-dBm */
1347         if (band)
1348                 saturation_power = priv->calib_info->saturation_power24;
1349         else
1350                 saturation_power = priv->calib_info->saturation_power52;
1351
1352         if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
1353             saturation_power > IWL_TX_POWER_SATURATION_MAX) {
1354                 if (band)
1355                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
1356                 else
1357                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
1358         }
1359
1360         /* regulatory txpower limits ... reg_limit values are in half-dBm,
1361          *   max_power_avg values are in dBm, convert * 2 */
1362         if (is_fat)
1363                 reg_limit = ch_info->fat_max_power_avg * 2;
1364         else
1365                 reg_limit = ch_info->max_power_avg * 2;
1366
1367         if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
1368             (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
1369                 if (band)
1370                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
1371                 else
1372                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
1373         }
1374
1375         /* Interpolate txpower calibration values for this channel,
1376          *   based on factory calibration tests on spaced channels. */
1377         iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1378
1379         /* calculate tx gain adjustment based on power supply voltage */
1380         voltage = priv->calib_info->voltage;
1381         init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1382         voltage_compensation =
1383             iwl4965_get_voltage_compensation(voltage, init_voltage);
1384
1385         IWL_DEBUG_TXPOWER(priv, "curr volt %d eeprom volt %d volt comp %d\n",
1386                           init_voltage,
1387                           voltage, voltage_compensation);
1388
1389         /* get current temperature (Celsius) */
1390         current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
1391         current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
1392         current_temp = KELVIN_TO_CELSIUS(current_temp);
1393
1394         /* select thermal txpower adjustment params, based on channel group
1395          *   (same frequency group used for mimo txatten adjustment) */
1396         degrees_per_05db_num =
1397             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1398         degrees_per_05db_denom =
1399             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1400
1401         /* get per-chain txpower values from factory measurements */
1402         for (c = 0; c < 2; c++) {
1403                 measurement = &ch_eeprom_info.measurements[c][1];
1404
1405                 /* txgain adjustment (in half-dB steps) based on difference
1406                  *   between factory and current temperature */
1407                 factory_temp = measurement->temperature;
1408                 iwl4965_math_div_round((current_temp - factory_temp) *
1409                                        degrees_per_05db_denom,
1410                                        degrees_per_05db_num,
1411                                        &temperature_comp[c]);
1412
1413                 factory_gain_index[c] = measurement->gain_idx;
1414                 factory_actual_pwr[c] = measurement->actual_pow;
1415
1416                 IWL_DEBUG_TXPOWER(priv, "chain = %d\n", c);
1417                 IWL_DEBUG_TXPOWER(priv, "fctry tmp %d, "
1418                                   "curr tmp %d, comp %d steps\n",
1419                                   factory_temp, current_temp,
1420                                   temperature_comp[c]);
1421
1422                 IWL_DEBUG_TXPOWER(priv, "fctry idx %d, fctry pwr %d\n",
1423                                   factory_gain_index[c],
1424                                   factory_actual_pwr[c]);
1425         }
1426
1427         /* for each of 33 bit-rates (including 1 for CCK) */
1428         for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
1429                 u8 is_mimo_rate;
1430                 union iwl4965_tx_power_dual_stream tx_power;
1431
1432                 /* for mimo, reduce each chain's txpower by half
1433                  * (3dB, 6 steps), so total output power is regulatory
1434                  * compliant. */
1435                 if (i & 0x8) {
1436                         current_regulatory = reg_limit -
1437                             IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1438                         is_mimo_rate = 1;
1439                 } else {
1440                         current_regulatory = reg_limit;
1441                         is_mimo_rate = 0;
1442                 }
1443
1444                 /* find txpower limit, either hardware or regulatory */
1445                 power_limit = saturation_power - back_off_table[i];
1446                 if (power_limit > current_regulatory)
1447                         power_limit = current_regulatory;
1448
1449                 /* reduce user's txpower request if necessary
1450                  * for this rate on this channel */
1451                 target_power = user_target_power;
1452                 if (target_power > power_limit)
1453                         target_power = power_limit;
1454
1455                 IWL_DEBUG_TXPOWER(priv, "rate %d sat %d reg %d usr %d tgt %d\n",
1456                                   i, saturation_power - back_off_table[i],
1457                                   current_regulatory, user_target_power,
1458                                   target_power);
1459
1460                 /* for each of 2 Tx chains (radio transmitters) */
1461                 for (c = 0; c < 2; c++) {
1462                         s32 atten_value;
1463
1464                         if (is_mimo_rate)
1465                                 atten_value =
1466                                     (s32)le32_to_cpu(priv->card_alive_init.
1467                                     tx_atten[txatten_grp][c]);
1468                         else
1469                                 atten_value = 0;
1470
1471                         /* calculate index; higher index means lower txpower */
1472                         power_index = (u8) (factory_gain_index[c] -
1473                                             (target_power -
1474                                              factory_actual_pwr[c]) -
1475                                             temperature_comp[c] -
1476                                             voltage_compensation +
1477                                             atten_value);
1478
1479 /*                      IWL_DEBUG_TXPOWER(priv, "calculated txpower index %d\n",
1480                                                 power_index); */
1481
1482                         if (power_index < get_min_power_index(i, band))
1483                                 power_index = get_min_power_index(i, band);
1484
1485                         /* adjust 5 GHz index to support negative indexes */
1486                         if (!band)
1487                                 power_index += 9;
1488
1489                         /* CCK, rate 32, reduce txpower for CCK */
1490                         if (i == POWER_TABLE_CCK_ENTRY)
1491                                 power_index +=
1492                                     IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
1493
1494                         /* stay within the table! */
1495                         if (power_index > 107) {
1496                                 IWL_WARN(priv, "txpower index %d > 107\n",
1497                                             power_index);
1498                                 power_index = 107;
1499                         }
1500                         if (power_index < 0) {
1501                                 IWL_WARN(priv, "txpower index %d < 0\n",
1502                                             power_index);
1503                                 power_index = 0;
1504                         }
1505
1506                         /* fill txpower command for this rate/chain */
1507                         tx_power.s.radio_tx_gain[c] =
1508                                 gain_table[band][power_index].radio;
1509                         tx_power.s.dsp_predis_atten[c] =
1510                                 gain_table[band][power_index].dsp;
1511
1512                         IWL_DEBUG_TXPOWER(priv, "chain %d mimo %d index %d "
1513                                           "gain 0x%02x dsp %d\n",
1514                                           c, atten_value, power_index,
1515                                         tx_power.s.radio_tx_gain[c],
1516                                         tx_power.s.dsp_predis_atten[c]);
1517                 } /* for each chain */
1518
1519                 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1520
1521         } /* for each rate */
1522
1523         return 0;
1524 }
1525
1526 /**
1527  * iwl4965_send_tx_power - Configure the TXPOWER level user limit
1528  *
1529  * Uses the active RXON for channel, band, and characteristics (fat, high)
1530  * The power limit is taken from priv->tx_power_user_lmt.
1531  */
1532 static int iwl4965_send_tx_power(struct iwl_priv *priv)
1533 {
1534         struct iwl4965_txpowertable_cmd cmd = { 0 };
1535         int ret;
1536         u8 band = 0;
1537         u8 is_fat = 0;
1538         u8 ctrl_chan_high = 0;
1539
1540         if (test_bit(STATUS_SCANNING, &priv->status)) {
1541                 /* If this gets hit a lot, switch it to a BUG() and catch
1542                  * the stack trace to find out who is calling this during
1543                  * a scan. */
1544                 IWL_WARN(priv, "TX Power requested while scanning!\n");
1545                 return -EAGAIN;
1546         }
1547
1548         band = priv->band == IEEE80211_BAND_2GHZ;
1549
1550         is_fat =  is_fat_channel(priv->active_rxon.flags);
1551
1552         if (is_fat &&
1553             (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1554                 ctrl_chan_high = 1;
1555
1556         cmd.band = band;
1557         cmd.channel = priv->active_rxon.channel;
1558
1559         ret = iwl4965_fill_txpower_tbl(priv, band,
1560                                 le16_to_cpu(priv->active_rxon.channel),
1561                                 is_fat, ctrl_chan_high, &cmd.tx_power);
1562         if (ret)
1563                 goto out;
1564
1565         ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
1566
1567 out:
1568         return ret;
1569 }
1570
1571 static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
1572 {
1573         int ret = 0;
1574         struct iwl4965_rxon_assoc_cmd rxon_assoc;
1575         const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
1576         const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
1577
1578         if ((rxon1->flags == rxon2->flags) &&
1579             (rxon1->filter_flags == rxon2->filter_flags) &&
1580             (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1581             (rxon1->ofdm_ht_single_stream_basic_rates ==
1582              rxon2->ofdm_ht_single_stream_basic_rates) &&
1583             (rxon1->ofdm_ht_dual_stream_basic_rates ==
1584              rxon2->ofdm_ht_dual_stream_basic_rates) &&
1585             (rxon1->rx_chain == rxon2->rx_chain) &&
1586             (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1587                 IWL_DEBUG_INFO(priv, "Using current RXON_ASSOC.  Not resending.\n");
1588                 return 0;
1589         }
1590
1591         rxon_assoc.flags = priv->staging_rxon.flags;
1592         rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1593         rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1594         rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1595         rxon_assoc.reserved = 0;
1596         rxon_assoc.ofdm_ht_single_stream_basic_rates =
1597             priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1598         rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1599             priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1600         rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1601
1602         ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
1603                                      sizeof(rxon_assoc), &rxon_assoc, NULL);
1604         if (ret)
1605                 return ret;
1606
1607         return ret;
1608 }
1609
1610 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
1611 static int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1612 {
1613         int rc;
1614         u8 band = 0;
1615         u8 is_fat = 0;
1616         u8 ctrl_chan_high = 0;
1617         struct iwl4965_channel_switch_cmd cmd = { 0 };
1618         const struct iwl_channel_info *ch_info;
1619
1620         band = priv->band == IEEE80211_BAND_2GHZ;
1621
1622         ch_info = iwl_get_channel_info(priv, priv->band, channel);
1623
1624         is_fat = is_fat_channel(priv->staging_rxon.flags);
1625
1626         if (is_fat &&
1627             (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1628                 ctrl_chan_high = 1;
1629
1630         cmd.band = band;
1631         cmd.expect_beacon = 0;
1632         cmd.channel = cpu_to_le16(channel);
1633         cmd.rxon_flags = priv->active_rxon.flags;
1634         cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
1635         cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1636         if (ch_info)
1637                 cmd.expect_beacon = is_channel_radar(ch_info);
1638         else
1639                 cmd.expect_beacon = 1;
1640
1641         rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_fat,
1642                                       ctrl_chan_high, &cmd.tx_power);
1643         if (rc) {
1644                 IWL_DEBUG_11H(priv, "error:%d  fill txpower_tbl\n", rc);
1645                 return rc;
1646         }
1647
1648         rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1649         return rc;
1650 }
1651 #endif
1652
1653 /**
1654  * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1655  */
1656 static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
1657                                             struct iwl_tx_queue *txq,
1658                                             u16 byte_cnt)
1659 {
1660         struct iwl4965_scd_bc_tbl *scd_bc_tbl = priv->scd_bc_tbls.addr;
1661         int txq_id = txq->q.id;
1662         int write_ptr = txq->q.write_ptr;
1663         int len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
1664         __le16 bc_ent;
1665
1666         WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
1667
1668         bc_ent = cpu_to_le16(len & 0xFFF);
1669         /* Set up byte count within first 256 entries */
1670         scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent;
1671
1672         /* If within first 64 entries, duplicate at end */
1673         if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
1674                 scd_bc_tbl[txq_id].
1675                         tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent;
1676 }
1677
1678 /**
1679  * sign_extend - Sign extend a value using specified bit as sign-bit
1680  *
1681  * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
1682  * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
1683  *
1684  * @param oper value to sign extend
1685  * @param index 0 based bit index (0<=index<32) to sign bit
1686  */
1687 static s32 sign_extend(u32 oper, int index)
1688 {
1689         u8 shift = 31 - index;
1690
1691         return (s32)(oper << shift) >> shift;
1692 }
1693
1694 /**
1695  * iwl4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
1696  * @statistics: Provides the temperature reading from the uCode
1697  *
1698  * A return of <0 indicates bogus data in the statistics
1699  */
1700 static int iwl4965_hw_get_temperature(const struct iwl_priv *priv)
1701 {
1702         s32 temperature;
1703         s32 vt;
1704         s32 R1, R2, R3;
1705         u32 R4;
1706
1707         if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
1708                 (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)) {
1709                 IWL_DEBUG_TEMP(priv, "Running FAT temperature calibration\n");
1710                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
1711                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
1712                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
1713                 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
1714         } else {
1715                 IWL_DEBUG_TEMP(priv, "Running temperature calibration\n");
1716                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
1717                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
1718                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
1719                 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
1720         }
1721
1722         /*
1723          * Temperature is only 23 bits, so sign extend out to 32.
1724          *
1725          * NOTE If we haven't received a statistics notification yet
1726          * with an updated temperature, use R4 provided to us in the
1727          * "initialize" ALIVE response.
1728          */
1729         if (!test_bit(STATUS_TEMPERATURE, &priv->status))
1730                 vt = sign_extend(R4, 23);
1731         else
1732                 vt = sign_extend(
1733                         le32_to_cpu(priv->statistics.general.temperature), 23);
1734
1735         IWL_DEBUG_TEMP(priv, "Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
1736
1737         if (R3 == R1) {
1738                 IWL_ERR(priv, "Calibration conflict R1 == R3\n");
1739                 return -1;
1740         }
1741
1742         /* Calculate temperature in degrees Kelvin, adjust by 97%.
1743          * Add offset to center the adjustment around 0 degrees Centigrade. */
1744         temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
1745         temperature /= (R3 - R1);
1746         temperature = (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET;
1747
1748         IWL_DEBUG_TEMP(priv, "Calibrated temperature: %dK, %dC\n",
1749                         temperature, KELVIN_TO_CELSIUS(temperature));
1750
1751         return temperature;
1752 }
1753
1754 /* Adjust Txpower only if temperature variance is greater than threshold. */
1755 #define IWL_TEMPERATURE_THRESHOLD   3
1756
1757 /**
1758  * iwl4965_is_temp_calib_needed - determines if new calibration is needed
1759  *
1760  * If the temperature changed has changed sufficiently, then a recalibration
1761  * is needed.
1762  *
1763  * Assumes caller will replace priv->last_temperature once calibration
1764  * executed.
1765  */
1766 static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
1767 {
1768         int temp_diff;
1769
1770         if (!test_bit(STATUS_STATISTICS, &priv->status)) {
1771                 IWL_DEBUG_TEMP(priv, "Temperature not updated -- no statistics.\n");
1772                 return 0;
1773         }
1774
1775         temp_diff = priv->temperature - priv->last_temperature;
1776
1777         /* get absolute value */
1778         if (temp_diff < 0) {
1779                 IWL_DEBUG_POWER(priv, "Getting cooler, delta %d, \n", temp_diff);
1780                 temp_diff = -temp_diff;
1781         } else if (temp_diff == 0)
1782                 IWL_DEBUG_POWER(priv, "Same temp, \n");
1783         else
1784                 IWL_DEBUG_POWER(priv, "Getting warmer, delta %d, \n", temp_diff);
1785
1786         if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
1787                 IWL_DEBUG_POWER(priv, "Thermal txpower calib not needed\n");
1788                 return 0;
1789         }
1790
1791         IWL_DEBUG_POWER(priv, "Thermal txpower calib needed\n");
1792
1793         return 1;
1794 }
1795
1796 static void iwl4965_temperature_calib(struct iwl_priv *priv)
1797 {
1798         s32 temp;
1799
1800         temp = iwl4965_hw_get_temperature(priv);
1801         if (temp < 0)
1802                 return;
1803
1804         if (priv->temperature != temp) {
1805                 if (priv->temperature)
1806                         IWL_DEBUG_TEMP(priv, "Temperature changed "
1807                                        "from %dC to %dC\n",
1808                                        KELVIN_TO_CELSIUS(priv->temperature),
1809                                        KELVIN_TO_CELSIUS(temp));
1810                 else
1811                         IWL_DEBUG_TEMP(priv, "Temperature "
1812                                        "initialized to %dC\n",
1813                                        KELVIN_TO_CELSIUS(temp));
1814         }
1815
1816         priv->temperature = temp;
1817         set_bit(STATUS_TEMPERATURE, &priv->status);
1818
1819         if (!priv->disable_tx_power_cal &&
1820              unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
1821              iwl4965_is_temp_calib_needed(priv))
1822                 queue_work(priv->workqueue, &priv->txpower_work);
1823 }
1824
1825 /**
1826  * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
1827  */
1828 static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
1829                                             u16 txq_id)
1830 {
1831         /* Simply stop the queue, but don't change any configuration;
1832          * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
1833         iwl_write_prph(priv,
1834                 IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
1835                 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
1836                 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
1837 }
1838
1839 /**
1840  * txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE
1841  * priv->lock must be held by the caller
1842  */
1843 static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
1844                                    u16 ssn_idx, u8 tx_fifo)
1845 {
1846         int ret = 0;
1847
1848         if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1849             (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) {
1850                 IWL_WARN(priv,
1851                         "queue number out of range: %d, must be %d to %d\n",
1852                         txq_id, IWL49_FIRST_AMPDU_QUEUE,
1853                         IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1);
1854                 return -EINVAL;
1855         }
1856
1857         ret = iwl_grab_nic_access(priv);
1858         if (ret)
1859                 return ret;
1860
1861         iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1862
1863         iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1864
1865         priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1866         priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1867         /* supposes that ssn_idx is valid (!= 0xFFF) */
1868         iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1869
1870         iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1871         iwl_txq_ctx_deactivate(priv, txq_id);
1872         iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
1873
1874         iwl_release_nic_access(priv);
1875
1876         return 0;
1877 }
1878
1879 /**
1880  * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
1881  */
1882 static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
1883                                         u16 txq_id)
1884 {
1885         u32 tbl_dw_addr;
1886         u32 tbl_dw;
1887         u16 scd_q2ratid;
1888
1889         scd_q2ratid = ra_tid & IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
1890
1891         tbl_dw_addr = priv->scd_base_addr +
1892                         IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
1893
1894         tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
1895
1896         if (txq_id & 0x1)
1897                 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
1898         else
1899                 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
1900
1901         iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
1902
1903         return 0;
1904 }
1905
1906
1907 /**
1908  * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
1909  *
1910  * NOTE:  txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE,
1911  *        i.e. it must be one of the higher queues used for aggregation
1912  */
1913 static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id,
1914                                   int tx_fifo, int sta_id, int tid, u16 ssn_idx)
1915 {
1916         unsigned long flags;
1917         int ret;
1918         u16 ra_tid;
1919
1920         if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1921             (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) {
1922                 IWL_WARN(priv,
1923                         "queue number out of range: %d, must be %d to %d\n",
1924                         txq_id, IWL49_FIRST_AMPDU_QUEUE,
1925                         IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1);
1926                 return -EINVAL;
1927         }
1928
1929         ra_tid = BUILD_RAxTID(sta_id, tid);
1930
1931         /* Modify device's station table to Tx this TID */
1932         iwl_sta_tx_modify_enable_tid(priv, sta_id, tid);
1933
1934         spin_lock_irqsave(&priv->lock, flags);
1935         ret = iwl_grab_nic_access(priv);
1936         if (ret) {
1937                 spin_unlock_irqrestore(&priv->lock, flags);
1938                 return ret;
1939         }
1940
1941         /* Stop this Tx queue before configuring it */
1942         iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1943
1944         /* Map receiver-address / traffic-ID to this queue */
1945         iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
1946
1947         /* Set this queue as a chain-building queue */
1948         iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1949
1950         /* Place first TFD at index corresponding to start sequence number.
1951          * Assumes that ssn_idx is valid (!= 0xFFF) */
1952         priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1953         priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1954         iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1955
1956         /* Set up Tx window size and frame limit for this queue */
1957         iwl_write_targ_mem(priv,
1958                 priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
1959                 (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
1960                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
1961
1962         iwl_write_targ_mem(priv, priv->scd_base_addr +
1963                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
1964                 (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
1965                 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
1966
1967         iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1968
1969         /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
1970         iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
1971
1972         iwl_release_nic_access(priv);
1973         spin_unlock_irqrestore(&priv->lock, flags);
1974
1975         return 0;
1976 }
1977
1978
1979 static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len)
1980 {
1981         switch (cmd_id) {
1982         case REPLY_RXON:
1983                 return (u16) sizeof(struct iwl4965_rxon_cmd);
1984         default:
1985                 return len;
1986         }
1987 }
1988
1989 static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
1990 {
1991         struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
1992         addsta->mode = cmd->mode;
1993         memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
1994         memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
1995         addsta->station_flags = cmd->station_flags;
1996         addsta->station_flags_msk = cmd->station_flags_msk;
1997         addsta->tid_disable_tx = cmd->tid_disable_tx;
1998         addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
1999         addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
2000         addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
2001         addsta->reserved1 = cpu_to_le16(0);
2002         addsta->reserved2 = cpu_to_le32(0);
2003
2004         return (u16)sizeof(struct iwl4965_addsta_cmd);
2005 }
2006
2007 static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
2008 {
2009         return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
2010 }
2011
2012 /**
2013  * iwl4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
2014  */
2015 static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
2016                                       struct iwl_ht_agg *agg,
2017                                       struct iwl4965_tx_resp *tx_resp,
2018                                       int txq_id, u16 start_idx)
2019 {
2020         u16 status;
2021         struct agg_tx_status *frame_status = tx_resp->u.agg_status;
2022         struct ieee80211_tx_info *info = NULL;
2023         struct ieee80211_hdr *hdr = NULL;
2024         u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
2025         int i, sh, idx;
2026         u16 seq;
2027         if (agg->wait_for_ba)
2028                 IWL_DEBUG_TX_REPLY(priv, "got tx response w/o block-ack\n");
2029
2030         agg->frame_count = tx_resp->frame_count;
2031         agg->start_idx = start_idx;
2032         agg->rate_n_flags = rate_n_flags;
2033         agg->bitmap = 0;
2034
2035         /* num frames attempted by Tx command */
2036         if (agg->frame_count == 1) {
2037                 /* Only one frame was attempted; no block-ack will arrive */
2038                 status = le16_to_cpu(frame_status[0].status);
2039                 idx = start_idx;
2040
2041                 /* FIXME: code repetition */
2042                 IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, StartIdx=%d idx=%d\n",
2043                                    agg->frame_count, agg->start_idx, idx);
2044
2045                 info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]);
2046                 info->status.rates[0].count = tx_resp->failure_frame + 1;
2047                 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
2048                 info->flags |= iwl_is_tx_success(status) ?
2049                         IEEE80211_TX_STAT_ACK : 0;
2050                 iwl_hwrate_to_tx_control(priv, rate_n_flags, info);
2051                 /* FIXME: code repetition end */
2052
2053                 IWL_DEBUG_TX_REPLY(priv, "1 Frame 0x%x failure :%d\n",
2054                                     status & 0xff, tx_resp->failure_frame);
2055                 IWL_DEBUG_TX_REPLY(priv, "Rate Info rate_n_flags=%x\n", rate_n_flags);
2056
2057                 agg->wait_for_ba = 0;
2058         } else {
2059                 /* Two or more frames were attempted; expect block-ack */
2060                 u64 bitmap = 0;
2061                 int start = agg->start_idx;
2062
2063                 /* Construct bit-map of pending frames within Tx window */
2064                 for (i = 0; i < agg->frame_count; i++) {
2065                         u16 sc;
2066                         status = le16_to_cpu(frame_status[i].status);
2067                         seq  = le16_to_cpu(frame_status[i].sequence);
2068                         idx = SEQ_TO_INDEX(seq);
2069                         txq_id = SEQ_TO_QUEUE(seq);
2070
2071                         if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
2072                                       AGG_TX_STATE_ABORT_MSK))
2073                                 continue;
2074
2075                         IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, txq_id=%d idx=%d\n",
2076                                            agg->frame_count, txq_id, idx);
2077
2078                         hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
2079
2080                         sc = le16_to_cpu(hdr->seq_ctrl);
2081                         if (idx != (SEQ_TO_SN(sc) & 0xff)) {
2082                                 IWL_ERR(priv,
2083                                         "BUG_ON idx doesn't match seq control"
2084                                         " idx=%d, seq_idx=%d, seq=%d\n",
2085                                         idx, SEQ_TO_SN(sc), hdr->seq_ctrl);
2086                                 return -1;
2087                         }
2088
2089                         IWL_DEBUG_TX_REPLY(priv, "AGG Frame i=%d idx %d seq=%d\n",
2090                                            i, idx, SEQ_TO_SN(sc));
2091
2092                         sh = idx - start;
2093                         if (sh > 64) {
2094                                 sh = (start - idx) + 0xff;
2095                                 bitmap = bitmap << sh;
2096                                 sh = 0;
2097                                 start = idx;
2098                         } else if (sh < -64)
2099                                 sh  = 0xff - (start - idx);
2100                         else if (sh < 0) {
2101                                 sh = start - idx;
2102                                 start = idx;
2103                                 bitmap = bitmap << sh;
2104                                 sh = 0;
2105                         }
2106                         bitmap |= 1ULL << sh;
2107                         IWL_DEBUG_TX_REPLY(priv, "start=%d bitmap=0x%llx\n",
2108                                            start, (unsigned long long)bitmap);
2109                 }
2110
2111                 agg->bitmap = bitmap;
2112                 agg->start_idx = start;
2113                 IWL_DEBUG_TX_REPLY(priv, "Frames %d start_idx=%d bitmap=0x%llx\n",
2114                                    agg->frame_count, agg->start_idx,
2115                                    (unsigned long long)agg->bitmap);
2116
2117                 if (bitmap)
2118                         agg->wait_for_ba = 1;
2119         }
2120         return 0;
2121 }
2122
2123 /**
2124  * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
2125  */
2126 static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
2127                                 struct iwl_rx_mem_buffer *rxb)
2128 {
2129         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2130         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
2131         int txq_id = SEQ_TO_QUEUE(sequence);
2132         int index = SEQ_TO_INDEX(sequence);
2133         struct iwl_tx_queue *txq = &priv->txq[txq_id];
2134         struct ieee80211_hdr *hdr;
2135         struct ieee80211_tx_info *info;
2136         struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
2137         u32  status = le32_to_cpu(tx_resp->u.status);
2138         int tid = MAX_TID_COUNT;
2139         int sta_id;
2140         int freed;
2141         u8 *qc = NULL;
2142
2143         if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
2144                 IWL_ERR(priv, "Read index for DMA queue txq_id (%d) index %d "
2145                           "is out of range [0-%d] %d %d\n", txq_id,
2146                           index, txq->q.n_bd, txq->q.write_ptr,
2147                           txq->q.read_ptr);
2148                 return;
2149         }
2150
2151         info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
2152         memset(&info->status, 0, sizeof(info->status));
2153
2154         hdr = iwl_tx_queue_get_hdr(priv, txq_id, index);
2155         if (ieee80211_is_data_qos(hdr->frame_control)) {
2156                 qc = ieee80211_get_qos_ctl(hdr);
2157                 tid = qc[0] & 0xf;
2158         }
2159
2160         sta_id = iwl_get_ra_sta_id(priv, hdr);
2161         if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
2162                 IWL_ERR(priv, "Station not known\n");
2163                 return;
2164         }
2165
2166         if (txq->sched_retry) {
2167                 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
2168                 struct iwl_ht_agg *agg = NULL;
2169
2170                 WARN_ON(!qc);
2171
2172                 agg = &priv->stations[sta_id].tid[tid].agg;
2173
2174                 iwl4965_tx_status_reply_tx(priv, agg, tx_resp, txq_id, index);
2175
2176                 /* check if BAR is needed */
2177                 if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status))
2178                         info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
2179
2180                 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
2181                         index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
2182                         IWL_DEBUG_TX_REPLY(priv, "Retry scheduler reclaim scd_ssn "
2183                                            "%d index %d\n", scd_ssn , index);
2184                         freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2185                         priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2186
2187                         if (priv->mac80211_registered &&
2188                             (iwl_queue_space(&txq->q) > txq->q.low_mark) &&
2189                             (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)) {
2190                                 if (agg->state == IWL_AGG_OFF)
2191                                         ieee80211_wake_queue(priv->hw, txq_id);
2192                                 else
2193                                         ieee80211_wake_queue(priv->hw,
2194                                                              txq->swq_id);
2195                         }
2196                 }
2197         } else {
2198                 info->status.rates[0].count = tx_resp->failure_frame + 1;
2199                 info->flags |= iwl_is_tx_success(status) ?
2200                                         IEEE80211_TX_STAT_ACK : 0;
2201                 iwl_hwrate_to_tx_control(priv,
2202                                         le32_to_cpu(tx_resp->rate_n_flags),
2203                                         info);
2204
2205                 IWL_DEBUG_TX_REPLY(priv, "TXQ %d status %s (0x%08x) "
2206                                    "rate_n_flags 0x%x retries %d\n",
2207                                    txq_id,
2208                                    iwl_get_tx_fail_reason(status), status,
2209                                    le32_to_cpu(tx_resp->rate_n_flags),
2210                                    tx_resp->failure_frame);
2211
2212                 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2213                 if (qc && likely(sta_id != IWL_INVALID_STATION))
2214                         priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2215
2216                 if (priv->mac80211_registered &&
2217                     (iwl_queue_space(&txq->q) > txq->q.low_mark))
2218                         ieee80211_wake_queue(priv->hw, txq_id);
2219         }
2220
2221         if (qc && likely(sta_id != IWL_INVALID_STATION))
2222                 iwl_txq_check_empty(priv, sta_id, tid, txq_id);
2223
2224         if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
2225                 IWL_ERR(priv, "TODO:  Implement Tx ABORT REQUIRED!!!\n");
2226 }
2227
2228 static int iwl4965_calc_rssi(struct iwl_priv *priv,
2229                              struct iwl_rx_phy_res *rx_resp)
2230 {
2231         /* data from PHY/DSP regarding signal strength, etc.,
2232          *   contents are always there, not configurable by host.  */
2233         struct iwl4965_rx_non_cfg_phy *ncphy =
2234             (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy_buf;
2235         u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL49_AGC_DB_MASK)
2236                         >> IWL49_AGC_DB_POS;
2237
2238         u32 valid_antennae =
2239             (le16_to_cpu(rx_resp->phy_flags) & IWL49_RX_PHY_FLAGS_ANTENNAE_MASK)
2240                         >> IWL49_RX_PHY_FLAGS_ANTENNAE_OFFSET;
2241         u8 max_rssi = 0;
2242         u32 i;
2243
2244         /* Find max rssi among 3 possible receivers.
2245          * These values are measured by the digital signal processor (DSP).
2246          * They should stay fairly constant even as the signal strength varies,
2247          *   if the radio's automatic gain control (AGC) is working right.
2248          * AGC value (see below) will provide the "interesting" info. */
2249         for (i = 0; i < 3; i++)
2250                 if (valid_antennae & (1 << i))
2251                         max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
2252
2253         IWL_DEBUG_STATS(priv, "Rssi In A %d B %d C %d Max %d AGC dB %d\n",
2254                 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
2255                 max_rssi, agc);
2256
2257         /* dBm = max_rssi dB - agc dB - constant.
2258          * Higher AGC (higher radio gain) means lower signal. */
2259         return max_rssi - agc - IWL49_RSSI_OFFSET;
2260 }
2261
2262
2263 /* Set up 4965-specific Rx frame reply handlers */
2264 static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
2265 {
2266         /* Legacy Rx frames */
2267         priv->rx_handlers[REPLY_RX] = iwl_rx_reply_rx;
2268         /* Tx response */
2269         priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
2270 }
2271
2272 static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
2273 {
2274         INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
2275 }
2276
2277 static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
2278 {
2279         cancel_work_sync(&priv->txpower_work);
2280 }
2281
2282
2283 static struct iwl_hcmd_ops iwl4965_hcmd = {
2284         .rxon_assoc = iwl4965_send_rxon_assoc,
2285 };
2286
2287 static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
2288         .get_hcmd_size = iwl4965_get_hcmd_size,
2289         .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
2290         .chain_noise_reset = iwl4965_chain_noise_reset,
2291         .gain_computation = iwl4965_gain_computation,
2292         .rts_tx_cmd_flag = iwl4965_rts_tx_cmd_flag,
2293         .calc_rssi = iwl4965_calc_rssi,
2294 };
2295
2296 static struct iwl_lib_ops iwl4965_lib = {
2297         .set_hw_params = iwl4965_hw_set_hw_params,
2298         .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
2299         .txq_set_sched = iwl4965_txq_set_sched,
2300         .txq_agg_enable = iwl4965_txq_agg_enable,
2301         .txq_agg_disable = iwl4965_txq_agg_disable,
2302         .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd,
2303         .txq_free_tfd = iwl_hw_txq_free_tfd,
2304         .txq_init = iwl_hw_tx_queue_init,
2305         .rx_handler_setup = iwl4965_rx_handler_setup,
2306         .setup_deferred_work = iwl4965_setup_deferred_work,
2307         .cancel_deferred_work = iwl4965_cancel_deferred_work,
2308         .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
2309         .alive_notify = iwl4965_alive_notify,
2310         .init_alive_start = iwl4965_init_alive_start,
2311         .load_ucode = iwl4965_load_bsm,
2312         .apm_ops = {
2313                 .init = iwl4965_apm_init,
2314                 .reset = iwl4965_apm_reset,
2315                 .stop = iwl4965_apm_stop,
2316                 .config = iwl4965_nic_config,
2317                 .set_pwr_src = iwl_set_pwr_src,
2318         },
2319         .eeprom_ops = {
2320                 .regulatory_bands = {
2321                         EEPROM_REGULATORY_BAND_1_CHANNELS,
2322                         EEPROM_REGULATORY_BAND_2_CHANNELS,
2323                         EEPROM_REGULATORY_BAND_3_CHANNELS,
2324                         EEPROM_REGULATORY_BAND_4_CHANNELS,
2325                         EEPROM_REGULATORY_BAND_5_CHANNELS,
2326                         EEPROM_4965_REGULATORY_BAND_24_FAT_CHANNELS,
2327                         EEPROM_4965_REGULATORY_BAND_52_FAT_CHANNELS
2328                 },
2329                 .verify_signature  = iwlcore_eeprom_verify_signature,
2330                 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
2331                 .release_semaphore = iwlcore_eeprom_release_semaphore,
2332                 .calib_version = iwl4965_eeprom_calib_version,
2333                 .query_addr = iwlcore_eeprom_query_addr,
2334         },
2335         .send_tx_power  = iwl4965_send_tx_power,
2336         .update_chain_flags = iwl_update_chain_flags,
2337         .temperature = iwl4965_temperature_calib,
2338 };
2339
2340 static struct iwl_ops iwl4965_ops = {
2341         .lib = &iwl4965_lib,
2342         .hcmd = &iwl4965_hcmd,
2343         .utils = &iwl4965_hcmd_utils,
2344 };
2345
2346 struct iwl_cfg iwl4965_agn_cfg = {
2347         .name = "4965AGN",
2348         .fw_name_pre = IWL4965_FW_PRE,
2349         .ucode_api_max = IWL4965_UCODE_API_MAX,
2350         .ucode_api_min = IWL4965_UCODE_API_MIN,
2351         .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
2352         .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
2353         .eeprom_ver = EEPROM_4965_EEPROM_VERSION,
2354         .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION,
2355         .ops = &iwl4965_ops,
2356         .mod_params = &iwl4965_mod_params,
2357 };
2358
2359 /* Module firmware */
2360 MODULE_FIRMWARE(IWL4965_MODULE_FIRMWARE(IWL4965_UCODE_API_MAX));
2361
2362 module_param_named(antenna, iwl4965_mod_params.antenna, int, 0444);
2363 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
2364 module_param_named(disable, iwl4965_mod_params.disable, int, 0444);
2365 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
2366 module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, 0444);
2367 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
2368 module_param_named(debug, iwl4965_mod_params.debug, uint, 0444);
2369 MODULE_PARM_DESC(debug, "debug output mask");
2370 module_param_named(
2371         disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, 0444);
2372 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
2373
2374 module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, 0444);
2375 MODULE_PARM_DESC(queues_num, "number of hw queues.");
2376 /* 11n */
2377 module_param_named(11n_disable, iwl4965_mod_params.disable_11n, int, 0444);
2378 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
2379 module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K, int, 0444);
2380 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
2381
2382 module_param_named(fw_restart4965, iwl4965_mod_params.restart_fw, int, 0444);
2383 MODULE_PARM_DESC(fw_restart4965, "restart firmware in case of error");