1 /******************************************************************************
3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
21 * Contact Information:
22 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 *****************************************************************************/
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/version.h>
30 #include <linux/init.h>
31 #include <linux/pci.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/delay.h>
34 #include <linux/skbuff.h>
35 #include <linux/netdevice.h>
36 #include <linux/wireless.h>
37 #include <net/mac80211.h>
38 #include <linux/etherdevice.h>
39 #include <asm/unaligned.h>
41 #include "iwl-eeprom.h"
45 #include "iwl-helpers.h"
46 #include "iwl-calib.h"
49 static int iwl4965_send_tx_power(struct iwl_priv *priv);
51 /* module parameters */
52 static struct iwl_mod_params iwl4965_mod_params = {
53 .num_of_queues = IWL49_NUM_QUEUES,
57 /* the rest are 0 by default */
60 /* check contents of special bootstrap uCode SRAM */
61 static int iwl4965_verify_bsm(struct iwl_priv *priv)
63 __le32 *image = priv->ucode_boot.v_addr;
64 u32 len = priv->ucode_boot.len;
68 IWL_DEBUG_INFO("Begin verify bsm\n");
70 /* verify BSM SRAM contents */
71 val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
72 for (reg = BSM_SRAM_LOWER_BOUND;
73 reg < BSM_SRAM_LOWER_BOUND + len;
74 reg += sizeof(u32), image++) {
75 val = iwl_read_prph(priv, reg);
76 if (val != le32_to_cpu(*image)) {
77 IWL_ERROR("BSM uCode verification failed at "
78 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
80 reg - BSM_SRAM_LOWER_BOUND, len,
81 val, le32_to_cpu(*image));
86 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
92 * iwl4965_load_bsm - Load bootstrap instructions
96 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
97 * in special SRAM that does not power down during RFKILL. When powering back
98 * up after power-saving sleeps (or during initial uCode load), the BSM loads
99 * the bootstrap program into the on-board processor, and starts it.
101 * The bootstrap program loads (via DMA) instructions and data for a new
102 * program from host DRAM locations indicated by the host driver in the
103 * BSM_DRAM_* registers. Once the new program is loaded, it starts
106 * When initializing the NIC, the host driver points the BSM to the
107 * "initialize" uCode image. This uCode sets up some internal data, then
108 * notifies host via "initialize alive" that it is complete.
110 * The host then replaces the BSM_DRAM_* pointer values to point to the
111 * normal runtime uCode instructions and a backup uCode data cache buffer
112 * (filled initially with starting data values for the on-board processor),
113 * then triggers the "initialize" uCode to load and launch the runtime uCode,
114 * which begins normal operation.
116 * When doing a power-save shutdown, runtime uCode saves data SRAM into
117 * the backup data cache in DRAM before SRAM is powered down.
119 * When powering back up, the BSM loads the bootstrap program. This reloads
120 * the runtime uCode instructions and the backup data cache into SRAM,
121 * and re-launches the runtime uCode from where it left off.
123 static int iwl4965_load_bsm(struct iwl_priv *priv)
125 __le32 *image = priv->ucode_boot.v_addr;
126 u32 len = priv->ucode_boot.len;
136 IWL_DEBUG_INFO("Begin load bsm\n");
138 priv->ucode_type = UCODE_RT;
140 /* make sure bootstrap program is no larger than BSM's SRAM size */
141 if (len > IWL_MAX_BSM_SIZE)
144 /* Tell bootstrap uCode where to find the "Initialize" uCode
145 * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
146 * NOTE: iwl_init_alive_start() will replace these values,
147 * after the "initialize" uCode has run, to point to
148 * runtime/protocol instructions and backup data cache.
150 pinst = priv->ucode_init.p_addr >> 4;
151 pdata = priv->ucode_init_data.p_addr >> 4;
152 inst_len = priv->ucode_init.len;
153 data_len = priv->ucode_init_data.len;
155 ret = iwl_grab_nic_access(priv);
159 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
160 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
161 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
162 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
164 /* Fill BSM memory with bootstrap instructions */
165 for (reg_offset = BSM_SRAM_LOWER_BOUND;
166 reg_offset < BSM_SRAM_LOWER_BOUND + len;
167 reg_offset += sizeof(u32), image++)
168 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
170 ret = iwl4965_verify_bsm(priv);
172 iwl_release_nic_access(priv);
176 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
177 iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
178 iwl_write_prph(priv, BSM_WR_MEM_DST_REG, RTC_INST_LOWER_BOUND);
179 iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
181 /* Load bootstrap code into instruction SRAM now,
182 * to prepare to load "initialize" uCode */
183 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
185 /* Wait for load of bootstrap uCode to finish */
186 for (i = 0; i < 100; i++) {
187 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
188 if (!(done & BSM_WR_CTRL_REG_BIT_START))
193 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
195 IWL_ERROR("BSM write did not complete!\n");
199 /* Enable future boot loads whenever power management unit triggers it
200 * (e.g. when powering back up after power-save shutdown) */
201 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
203 iwl_release_nic_access(priv);
209 * iwl4965_set_ucode_ptrs - Set uCode address location
211 * Tell initialization uCode where to find runtime uCode.
213 * BSM registers initially contain pointers to initialization uCode.
214 * We need to replace them to load runtime uCode inst and data,
215 * and to save runtime data when powering down.
217 static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
224 /* bits 35:4 for 4965 */
225 pinst = priv->ucode_code.p_addr >> 4;
226 pdata = priv->ucode_data_backup.p_addr >> 4;
228 spin_lock_irqsave(&priv->lock, flags);
229 ret = iwl_grab_nic_access(priv);
231 spin_unlock_irqrestore(&priv->lock, flags);
235 /* Tell bootstrap uCode where to find image to load */
236 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
237 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
238 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
239 priv->ucode_data.len);
241 /* Inst bytecount must be last to set up, bit 31 signals uCode
242 * that all new ptr/size info is in place */
243 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
244 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
245 iwl_release_nic_access(priv);
247 spin_unlock_irqrestore(&priv->lock, flags);
249 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
255 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
257 * Called after REPLY_ALIVE notification received from "initialize" uCode.
259 * The 4965 "initialize" ALIVE reply contains calibration data for:
260 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
261 * (3945 does not contain this data).
263 * Tell "initialize" uCode to go ahead and load the runtime uCode.
265 static void iwl4965_init_alive_start(struct iwl_priv *priv)
267 /* Check alive response for "valid" sign from uCode */
268 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
269 /* We had an error bringing up the hardware, so take it
270 * all the way back down so we can try again */
271 IWL_DEBUG_INFO("Initialize Alive failed.\n");
275 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
276 * This is a paranoid check, because we would not have gotten the
277 * "initialize" alive if code weren't properly loaded. */
278 if (iwl_verify_ucode(priv)) {
279 /* Runtime instruction load was bad;
280 * take it all the way back down so we can try again */
281 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
285 /* Calculate temperature */
286 priv->temperature = iwl4965_get_temperature(priv);
288 /* Send pointers to protocol/runtime uCode image ... init code will
289 * load and launch runtime uCode, which will send us another "Alive"
291 IWL_DEBUG_INFO("Initialization Alive received.\n");
292 if (iwl4965_set_ucode_ptrs(priv)) {
293 /* Runtime instruction load won't happen;
294 * take it all the way back down so we can try again */
295 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
301 queue_work(priv->workqueue, &priv->restart);
304 static int is_fat_channel(__le32 rxon_flags)
306 return (rxon_flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) ||
307 (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK);
314 static int iwl4965_eeprom_check_version(struct iwl_priv *priv)
319 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
321 calib_ver = iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
323 if (eeprom_ver < EEPROM_4965_EEPROM_VERSION ||
324 calib_ver < EEPROM_4965_TX_POWER_VERSION)
329 IWL_ERROR("Unsuported EEPROM VER=0x%x < 0x%x CALIB=0x%x < 0x%x\n",
330 eeprom_ver, EEPROM_4965_EEPROM_VERSION,
331 calib_ver, EEPROM_4965_TX_POWER_VERSION);
335 int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
340 spin_lock_irqsave(&priv->lock, flags);
341 ret = iwl_grab_nic_access(priv);
343 spin_unlock_irqrestore(&priv->lock, flags);
347 if (src == IWL_PWR_SRC_VAUX) {
349 ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE,
352 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
353 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
354 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
355 ~APMG_PS_CTRL_MSK_PWR_SRC);
358 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
359 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
360 ~APMG_PS_CTRL_MSK_PWR_SRC);
363 iwl_release_nic_access(priv);
364 spin_unlock_irqrestore(&priv->lock, flags);
370 * Activate/Deactivat Tx DMA/FIFO channels according tx fifos mask
371 * must be called under priv->lock and mac access
373 static void iwl4965_txq_set_sched(struct iwl_priv *priv, u32 mask)
375 iwl_write_prph(priv, IWL49_SCD_TXFACT, mask);
378 static int iwl4965_apm_init(struct iwl_priv *priv)
382 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
383 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
385 /* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */
386 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
387 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
389 /* set "initialization complete" bit to move adapter
390 * D0U* --> D0A* state */
391 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
393 /* wait for clock stabilization */
394 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
395 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
396 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
398 IWL_DEBUG_INFO("Failed to init the card\n");
402 ret = iwl_grab_nic_access(priv);
407 iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT |
408 APMG_CLK_VAL_BSM_CLK_RQT);
412 /* disable L1-Active */
413 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
414 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
416 iwl_release_nic_access(priv);
422 static void iwl4965_nic_config(struct iwl_priv *priv)
429 spin_lock_irqsave(&priv->lock, flags);
431 if ((priv->rev_id & 0x80) == 0x80 && (priv->rev_id & 0x7f) < 8) {
432 pci_read_config_dword(priv->pci_dev, PCI_REG_WUM8, &val);
433 /* Enable No Snoop field */
434 pci_write_config_dword(priv->pci_dev, PCI_REG_WUM8,
438 pci_read_config_byte(priv->pci_dev, PCI_LINK_CTRL, &val_link);
440 /* L1 is enabled by BIOS */
441 if ((val_link & PCI_LINK_VAL_L1_EN) == PCI_LINK_VAL_L1_EN)
442 /* diable L0S disabled L1A enabled */
443 iwl_set_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
445 /* L0S enabled L1A disabled */
446 iwl_clear_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
448 radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
450 /* write radio config values to register */
451 if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
452 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
453 EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
454 EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
455 EEPROM_RF_CFG_DASH_MSK(radio_cfg));
457 /* set CSR_HW_CONFIG_REG for uCode use */
458 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
459 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
460 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
462 priv->calib_info = (struct iwl_eeprom_calib_info *)
463 iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
465 spin_unlock_irqrestore(&priv->lock, flags);
468 static int iwl4965_apm_stop_master(struct iwl_priv *priv)
473 spin_lock_irqsave(&priv->lock, flags);
475 /* set stop master bit */
476 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
478 ret = iwl_poll_bit(priv, CSR_RESET,
479 CSR_RESET_REG_FLAG_MASTER_DISABLED,
480 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
485 spin_unlock_irqrestore(&priv->lock, flags);
486 IWL_DEBUG_INFO("stop master\n");
491 static void iwl4965_apm_stop(struct iwl_priv *priv)
495 iwl4965_apm_stop_master(priv);
497 spin_lock_irqsave(&priv->lock, flags);
499 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
503 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
504 spin_unlock_irqrestore(&priv->lock, flags);
507 static int iwl4965_apm_reset(struct iwl_priv *priv)
512 iwl4965_apm_stop_master(priv);
514 spin_lock_irqsave(&priv->lock, flags);
516 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
520 /* FIXME: put here L1A -L0S w/a */
522 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
524 ret = iwl_poll_bit(priv, CSR_RESET,
525 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
526 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25);
533 ret = iwl_grab_nic_access(priv);
536 /* Enable DMA and BSM Clock */
537 iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT |
538 APMG_CLK_VAL_BSM_CLK_RQT);
543 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
544 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
546 iwl_release_nic_access(priv);
548 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
549 wake_up_interruptible(&priv->wait_command_queue);
552 spin_unlock_irqrestore(&priv->lock, flags);
557 #define REG_RECALIB_PERIOD (60)
559 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
560 * Called after every association, but this runs only once!
561 * ... once chain noise is calibrated the first time, it's good forever. */
562 static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
564 struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
566 if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
567 struct iwl4965_calibration_cmd cmd;
569 memset(&cmd, 0, sizeof(cmd));
570 cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
574 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
576 IWL_ERROR("Could not send REPLY_PHY_CALIBRATION_CMD\n");
577 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
578 IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
582 static void iwl4965_gain_computation(struct iwl_priv *priv,
584 u16 min_average_noise_antenna_i,
585 u32 min_average_noise)
588 struct iwl_chain_noise_data *data = &priv->chain_noise_data;
590 data->delta_gain_code[min_average_noise_antenna_i] = 0;
592 for (i = 0; i < NUM_RX_CHAINS; i++) {
595 if (!(data->disconn_array[i]) &&
596 (data->delta_gain_code[i] ==
597 CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
598 delta_g = average_noise[i] - min_average_noise;
599 data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
600 data->delta_gain_code[i] =
601 min(data->delta_gain_code[i],
602 (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
604 data->delta_gain_code[i] =
605 (data->delta_gain_code[i] | (1 << 2));
607 data->delta_gain_code[i] = 0;
610 IWL_DEBUG_CALIB("delta_gain_codes: a %d b %d c %d\n",
611 data->delta_gain_code[0],
612 data->delta_gain_code[1],
613 data->delta_gain_code[2]);
615 /* Differential gain gets sent to uCode only once */
616 if (!data->radio_write) {
617 struct iwl4965_calibration_cmd cmd;
618 data->radio_write = 1;
620 memset(&cmd, 0, sizeof(cmd));
621 cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
622 cmd.diff_gain_a = data->delta_gain_code[0];
623 cmd.diff_gain_b = data->delta_gain_code[1];
624 cmd.diff_gain_c = data->delta_gain_code[2];
625 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
628 IWL_DEBUG_CALIB("fail sending cmd "
629 "REPLY_PHY_CALIBRATION_CMD \n");
631 /* TODO we might want recalculate
632 * rx_chain in rxon cmd */
634 /* Mark so we run this algo only once! */
635 data->state = IWL_CHAIN_NOISE_CALIBRATED;
637 data->chain_noise_a = 0;
638 data->chain_noise_b = 0;
639 data->chain_noise_c = 0;
640 data->chain_signal_a = 0;
641 data->chain_signal_b = 0;
642 data->chain_signal_c = 0;
643 data->beacon_count = 0;
646 static void iwl4965_bg_txpower_work(struct work_struct *work)
648 struct iwl_priv *priv = container_of(work, struct iwl_priv,
651 /* If a scan happened to start before we got here
652 * then just return; the statistics notification will
653 * kick off another scheduled work to compensate for
654 * any temperature delta we missed here. */
655 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
656 test_bit(STATUS_SCANNING, &priv->status))
659 mutex_lock(&priv->mutex);
661 /* Regardless of if we are assocaited, we must reconfigure the
662 * TX power since frames can be sent on non-radar channels while
664 iwl4965_send_tx_power(priv);
666 /* Update last_temperature to keep is_calib_needed from running
667 * when it isn't needed... */
668 priv->last_temperature = priv->temperature;
670 mutex_unlock(&priv->mutex);
674 * Acquire priv->lock before calling this function !
676 static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
678 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
679 (index & 0xff) | (txq_id << 8));
680 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
684 * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
685 * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
686 * @scd_retry: (1) Indicates queue will be used in aggregation mode
688 * NOTE: Acquire priv->lock before calling this function !
690 static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
691 struct iwl_tx_queue *txq,
692 int tx_fifo_id, int scd_retry)
694 int txq_id = txq->q.id;
696 /* Find out whether to activate Tx queue */
697 int active = test_bit(txq_id, &priv->txq_ctx_active_msk)?1:0;
699 /* Set up and activate */
700 iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
701 (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
702 (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
703 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
704 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
705 IWL49_SCD_QUEUE_STTS_REG_MSK);
707 txq->sched_retry = scd_retry;
709 IWL_DEBUG_INFO("%s %s Queue %d on AC %d\n",
710 active ? "Activate" : "Deactivate",
711 scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
714 static const u16 default_queue_to_tx_fifo[] = {
724 int iwl4965_alive_notify(struct iwl_priv *priv)
731 spin_lock_irqsave(&priv->lock, flags);
733 ret = iwl_grab_nic_access(priv);
735 spin_unlock_irqrestore(&priv->lock, flags);
739 /* Clear 4965's internal Tx Scheduler data base */
740 priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
741 a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
742 for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
743 iwl_write_targ_mem(priv, a, 0);
744 for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
745 iwl_write_targ_mem(priv, a, 0);
746 for (; a < sizeof(u16) * priv->hw_params.max_txq_num; a += 4)
747 iwl_write_targ_mem(priv, a, 0);
749 /* Tel 4965 where to find Tx byte count tables */
750 iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
752 offsetof(struct iwl4965_shared, queues_byte_cnt_tbls)) >> 10);
754 /* Disable chain mode for all queues */
755 iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
757 /* Initialize each Tx queue (including the command queue) */
758 for (i = 0; i < priv->hw_params.max_txq_num; i++) {
760 /* TFD circular buffer read/write indexes */
761 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
762 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
764 /* Max Tx Window size for Scheduler-ACK mode */
765 iwl_write_targ_mem(priv, priv->scd_base_addr +
766 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
768 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
769 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
772 iwl_write_targ_mem(priv, priv->scd_base_addr +
773 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
776 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
777 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
780 iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
781 (1 << priv->hw_params.max_txq_num) - 1);
783 /* Activate all Tx DMA/FIFO channels */
784 priv->cfg->ops->lib->txq_set_sched(priv, IWL_MASK(0, 7));
786 iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
788 /* Map each Tx/cmd queue to its corresponding fifo */
789 for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
790 int ac = default_queue_to_tx_fifo[i];
791 iwl_txq_ctx_activate(priv, i);
792 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
795 iwl_release_nic_access(priv);
796 spin_unlock_irqrestore(&priv->lock, flags);
801 static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
805 .auto_corr_min_ofdm = 85,
806 .auto_corr_min_ofdm_mrc = 170,
807 .auto_corr_min_ofdm_x1 = 105,
808 .auto_corr_min_ofdm_mrc_x1 = 220,
810 .auto_corr_max_ofdm = 120,
811 .auto_corr_max_ofdm_mrc = 210,
812 .auto_corr_max_ofdm_x1 = 140,
813 .auto_corr_max_ofdm_mrc_x1 = 270,
815 .auto_corr_min_cck = 125,
816 .auto_corr_max_cck = 200,
817 .auto_corr_min_cck_mrc = 200,
818 .auto_corr_max_cck_mrc = 400,
825 * iwl4965_hw_set_hw_params
827 * Called when initializing driver
829 int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
832 if ((priv->cfg->mod_params->num_of_queues > IWL49_NUM_QUEUES) ||
833 (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) {
834 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
835 IWL_MIN_NUM_QUEUES, IWL49_NUM_QUEUES);
839 priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues;
840 priv->hw_params.first_ampdu_q = IWL49_FIRST_AMPDU_QUEUE;
841 priv->hw_params.sw_crypto = priv->cfg->mod_params->sw_crypto;
842 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
843 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
844 if (priv->cfg->mod_params->amsdu_size_8K)
845 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_8K;
847 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_4K;
848 priv->hw_params.max_pkt_size = priv->hw_params.rx_buf_size - 256;
849 priv->hw_params.max_stations = IWL4965_STATION_COUNT;
850 priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
852 priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
853 priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
854 priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
855 priv->hw_params.fat_channel = BIT(IEEE80211_BAND_5GHZ);
857 priv->hw_params.tx_chains_num = 2;
858 priv->hw_params.rx_chains_num = 2;
859 priv->hw_params.valid_tx_ant = ANT_A | ANT_B;
860 priv->hw_params.valid_rx_ant = ANT_A | ANT_B;
861 priv->hw_params.ct_kill_threshold = CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD);
863 priv->hw_params.sens = &iwl4965_sensitivity;
868 /* set card power command */
869 static int iwl4965_set_power(struct iwl_priv *priv,
874 ret = iwl_send_cmd_pdu_async(priv, POWER_TABLE_CMD,
875 sizeof(struct iwl4965_powertable_cmd),
880 static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
893 *res = ((num * 2 + denom) / (denom * 2)) * sign;
899 * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
901 * Determines power supply voltage compensation for txpower calculations.
902 * Returns number of 1/2-dB steps to subtract from gain table index,
903 * to compensate for difference between power supply voltage during
904 * factory measurements, vs. current power supply voltage.
906 * Voltage indication is higher for lower voltage.
907 * Lower voltage requires more gain (lower gain table index).
909 static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
914 if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
915 (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
918 iwl4965_math_div_round(current_voltage - eeprom_voltage,
919 TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
921 if (current_voltage > eeprom_voltage)
923 if ((comp < -2) || (comp > 2))
929 static s32 iwl4965_get_tx_atten_grp(u16 channel)
931 if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
932 channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
933 return CALIB_CH_GROUP_5;
935 if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
936 channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
937 return CALIB_CH_GROUP_1;
939 if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
940 channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
941 return CALIB_CH_GROUP_2;
943 if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
944 channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
945 return CALIB_CH_GROUP_3;
947 if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
948 channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
949 return CALIB_CH_GROUP_4;
951 IWL_ERROR("Can't find txatten group for channel %d.\n", channel);
955 static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
959 for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
960 if (priv->calib_info->band_info[b].ch_from == 0)
963 if ((channel >= priv->calib_info->band_info[b].ch_from)
964 && (channel <= priv->calib_info->band_info[b].ch_to))
971 static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
978 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
984 * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
986 * Interpolates factory measurements from the two sample channels within a
987 * sub-band, to apply to channel of interest. Interpolation is proportional to
988 * differences in channel frequencies, which is proportional to differences
991 static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
992 struct iwl_eeprom_calib_ch_info *chan_info)
997 const struct iwl_eeprom_calib_measure *m1;
998 const struct iwl_eeprom_calib_measure *m2;
999 struct iwl_eeprom_calib_measure *omeas;
1003 s = iwl4965_get_sub_band(priv, channel);
1004 if (s >= EEPROM_TX_POWER_BANDS) {
1005 IWL_ERROR("Tx Power can not find channel %d ", channel);
1009 ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
1010 ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
1011 chan_info->ch_num = (u8) channel;
1013 IWL_DEBUG_TXPOWER("channel %d subband %d factory cal ch %d & %d\n",
1014 channel, s, ch_i1, ch_i2);
1016 for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
1017 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
1018 m1 = &(priv->calib_info->band_info[s].ch1.
1019 measurements[c][m]);
1020 m2 = &(priv->calib_info->band_info[s].ch2.
1021 measurements[c][m]);
1022 omeas = &(chan_info->measurements[c][m]);
1025 (u8) iwl4965_interpolate_value(channel, ch_i1,
1030 (u8) iwl4965_interpolate_value(channel, ch_i1,
1031 m1->gain_idx, ch_i2,
1033 omeas->temperature =
1034 (u8) iwl4965_interpolate_value(channel, ch_i1,
1039 (s8) iwl4965_interpolate_value(channel, ch_i1,
1044 ("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
1045 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
1047 ("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
1048 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
1050 ("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
1051 m1->pa_det, m2->pa_det, omeas->pa_det);
1053 ("chain %d meas %d T1=%d T2=%d T=%d\n", c, m,
1054 m1->temperature, m2->temperature,
1055 omeas->temperature);
1062 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
1063 * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
1064 static s32 back_off_table[] = {
1065 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
1066 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
1067 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
1068 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
1072 /* Thermal compensation values for txpower for various frequency ranges ...
1073 * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
1074 static struct iwl4965_txpower_comp_entry {
1075 s32 degrees_per_05db_a;
1076 s32 degrees_per_05db_a_denom;
1077 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
1078 {9, 2}, /* group 0 5.2, ch 34-43 */
1079 {4, 1}, /* group 1 5.2, ch 44-70 */
1080 {4, 1}, /* group 2 5.2, ch 71-124 */
1081 {4, 1}, /* group 3 5.2, ch 125-200 */
1082 {3, 1} /* group 4 2.4, ch all */
1085 static s32 get_min_power_index(s32 rate_power_index, u32 band)
1088 if ((rate_power_index & 7) <= 4)
1089 return MIN_TX_GAIN_INDEX_52GHZ_EXT;
1091 return MIN_TX_GAIN_INDEX;
1099 static const struct gain_entry gain_table[2][108] = {
1100 /* 5.2GHz power gain index table */
1102 {123, 0x3F}, /* highest txpower */
1211 /* 2.4GHz power gain index table */
1213 {110, 0x3f}, /* highest txpower */
1324 static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
1325 u8 is_fat, u8 ctrl_chan_high,
1326 struct iwl4965_tx_power_db *tx_power_tbl)
1328 u8 saturation_power;
1330 s32 user_target_power;
1334 s32 current_regulatory;
1335 s32 txatten_grp = CALIB_CH_GROUP_MAX;
1338 const struct iwl_channel_info *ch_info = NULL;
1339 struct iwl_eeprom_calib_ch_info ch_eeprom_info;
1340 const struct iwl_eeprom_calib_measure *measurement;
1343 s32 voltage_compensation;
1344 s32 degrees_per_05db_num;
1345 s32 degrees_per_05db_denom;
1347 s32 temperature_comp[2];
1348 s32 factory_gain_index[2];
1349 s32 factory_actual_pwr[2];
1352 /* user_txpower_limit is in dBm, convert to half-dBm (half-dB units
1353 * are used for indexing into txpower table) */
1354 user_target_power = 2 * priv->tx_power_user_lmt;
1356 /* Get current (RXON) channel, band, width */
1357 IWL_DEBUG_TXPOWER("chan %d band %d is_fat %d\n", channel, band,
1360 ch_info = iwl_get_channel_info(priv, priv->band, channel);
1362 if (!is_channel_valid(ch_info))
1365 /* get txatten group, used to select 1) thermal txpower adjustment
1366 * and 2) mimo txpower balance between Tx chains. */
1367 txatten_grp = iwl4965_get_tx_atten_grp(channel);
1368 if (txatten_grp < 0)
1371 IWL_DEBUG_TXPOWER("channel %d belongs to txatten group %d\n",
1372 channel, txatten_grp);
1381 /* hardware txpower limits ...
1382 * saturation (clipping distortion) txpowers are in half-dBm */
1384 saturation_power = priv->calib_info->saturation_power24;
1386 saturation_power = priv->calib_info->saturation_power52;
1388 if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
1389 saturation_power > IWL_TX_POWER_SATURATION_MAX) {
1391 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
1393 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
1396 /* regulatory txpower limits ... reg_limit values are in half-dBm,
1397 * max_power_avg values are in dBm, convert * 2 */
1399 reg_limit = ch_info->fat_max_power_avg * 2;
1401 reg_limit = ch_info->max_power_avg * 2;
1403 if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
1404 (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
1406 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
1408 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
1411 /* Interpolate txpower calibration values for this channel,
1412 * based on factory calibration tests on spaced channels. */
1413 iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1415 /* calculate tx gain adjustment based on power supply voltage */
1416 voltage = priv->calib_info->voltage;
1417 init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1418 voltage_compensation =
1419 iwl4965_get_voltage_compensation(voltage, init_voltage);
1421 IWL_DEBUG_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n",
1423 voltage, voltage_compensation);
1425 /* get current temperature (Celsius) */
1426 current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
1427 current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
1428 current_temp = KELVIN_TO_CELSIUS(current_temp);
1430 /* select thermal txpower adjustment params, based on channel group
1431 * (same frequency group used for mimo txatten adjustment) */
1432 degrees_per_05db_num =
1433 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1434 degrees_per_05db_denom =
1435 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1437 /* get per-chain txpower values from factory measurements */
1438 for (c = 0; c < 2; c++) {
1439 measurement = &ch_eeprom_info.measurements[c][1];
1441 /* txgain adjustment (in half-dB steps) based on difference
1442 * between factory and current temperature */
1443 factory_temp = measurement->temperature;
1444 iwl4965_math_div_round((current_temp - factory_temp) *
1445 degrees_per_05db_denom,
1446 degrees_per_05db_num,
1447 &temperature_comp[c]);
1449 factory_gain_index[c] = measurement->gain_idx;
1450 factory_actual_pwr[c] = measurement->actual_pow;
1452 IWL_DEBUG_TXPOWER("chain = %d\n", c);
1453 IWL_DEBUG_TXPOWER("fctry tmp %d, "
1454 "curr tmp %d, comp %d steps\n",
1455 factory_temp, current_temp,
1456 temperature_comp[c]);
1458 IWL_DEBUG_TXPOWER("fctry idx %d, fctry pwr %d\n",
1459 factory_gain_index[c],
1460 factory_actual_pwr[c]);
1463 /* for each of 33 bit-rates (including 1 for CCK) */
1464 for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
1466 union iwl4965_tx_power_dual_stream tx_power;
1468 /* for mimo, reduce each chain's txpower by half
1469 * (3dB, 6 steps), so total output power is regulatory
1472 current_regulatory = reg_limit -
1473 IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1476 current_regulatory = reg_limit;
1480 /* find txpower limit, either hardware or regulatory */
1481 power_limit = saturation_power - back_off_table[i];
1482 if (power_limit > current_regulatory)
1483 power_limit = current_regulatory;
1485 /* reduce user's txpower request if necessary
1486 * for this rate on this channel */
1487 target_power = user_target_power;
1488 if (target_power > power_limit)
1489 target_power = power_limit;
1491 IWL_DEBUG_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n",
1492 i, saturation_power - back_off_table[i],
1493 current_regulatory, user_target_power,
1496 /* for each of 2 Tx chains (radio transmitters) */
1497 for (c = 0; c < 2; c++) {
1502 (s32)le32_to_cpu(priv->card_alive_init.
1503 tx_atten[txatten_grp][c]);
1507 /* calculate index; higher index means lower txpower */
1508 power_index = (u8) (factory_gain_index[c] -
1510 factory_actual_pwr[c]) -
1511 temperature_comp[c] -
1512 voltage_compensation +
1515 /* IWL_DEBUG_TXPOWER("calculated txpower index %d\n",
1518 if (power_index < get_min_power_index(i, band))
1519 power_index = get_min_power_index(i, band);
1521 /* adjust 5 GHz index to support negative indexes */
1525 /* CCK, rate 32, reduce txpower for CCK */
1526 if (i == POWER_TABLE_CCK_ENTRY)
1528 IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
1530 /* stay within the table! */
1531 if (power_index > 107) {
1532 IWL_WARNING("txpower index %d > 107\n",
1536 if (power_index < 0) {
1537 IWL_WARNING("txpower index %d < 0\n",
1542 /* fill txpower command for this rate/chain */
1543 tx_power.s.radio_tx_gain[c] =
1544 gain_table[band][power_index].radio;
1545 tx_power.s.dsp_predis_atten[c] =
1546 gain_table[band][power_index].dsp;
1548 IWL_DEBUG_TXPOWER("chain %d mimo %d index %d "
1549 "gain 0x%02x dsp %d\n",
1550 c, atten_value, power_index,
1551 tx_power.s.radio_tx_gain[c],
1552 tx_power.s.dsp_predis_atten[c]);
1553 }/* for each chain */
1555 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1557 }/* for each rate */
1563 * iwl4965_send_tx_power - Configure the TXPOWER level user limit
1565 * Uses the active RXON for channel, band, and characteristics (fat, high)
1566 * The power limit is taken from priv->tx_power_user_lmt.
1568 static int iwl4965_send_tx_power(struct iwl_priv *priv)
1570 struct iwl4965_txpowertable_cmd cmd = { 0 };
1574 u8 ctrl_chan_high = 0;
1576 if (test_bit(STATUS_SCANNING, &priv->status)) {
1577 /* If this gets hit a lot, switch it to a BUG() and catch
1578 * the stack trace to find out who is calling this during
1580 IWL_WARNING("TX Power requested while scanning!\n");
1584 band = priv->band == IEEE80211_BAND_2GHZ;
1586 is_fat = is_fat_channel(priv->active_rxon.flags);
1589 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1593 cmd.channel = priv->active_rxon.channel;
1595 ret = iwl4965_fill_txpower_tbl(priv, band,
1596 le16_to_cpu(priv->active_rxon.channel),
1597 is_fat, ctrl_chan_high, &cmd.tx_power);
1601 ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
1607 static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
1610 struct iwl4965_rxon_assoc_cmd rxon_assoc;
1611 const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
1612 const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
1614 if ((rxon1->flags == rxon2->flags) &&
1615 (rxon1->filter_flags == rxon2->filter_flags) &&
1616 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1617 (rxon1->ofdm_ht_single_stream_basic_rates ==
1618 rxon2->ofdm_ht_single_stream_basic_rates) &&
1619 (rxon1->ofdm_ht_dual_stream_basic_rates ==
1620 rxon2->ofdm_ht_dual_stream_basic_rates) &&
1621 (rxon1->rx_chain == rxon2->rx_chain) &&
1622 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1623 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1627 rxon_assoc.flags = priv->staging_rxon.flags;
1628 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1629 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1630 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1631 rxon_assoc.reserved = 0;
1632 rxon_assoc.ofdm_ht_single_stream_basic_rates =
1633 priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1634 rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1635 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1636 rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1638 ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
1639 sizeof(rxon_assoc), &rxon_assoc, NULL);
1647 int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1652 u8 ctrl_chan_high = 0;
1653 struct iwl4965_channel_switch_cmd cmd = { 0 };
1654 const struct iwl_channel_info *ch_info;
1656 band = priv->band == IEEE80211_BAND_2GHZ;
1658 ch_info = iwl_get_channel_info(priv, priv->band, channel);
1660 is_fat = is_fat_channel(priv->staging_rxon.flags);
1663 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1667 cmd.expect_beacon = 0;
1668 cmd.channel = cpu_to_le16(channel);
1669 cmd.rxon_flags = priv->active_rxon.flags;
1670 cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
1671 cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1673 cmd.expect_beacon = is_channel_radar(ch_info);
1675 cmd.expect_beacon = 1;
1677 rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_fat,
1678 ctrl_chan_high, &cmd.tx_power);
1680 IWL_DEBUG_11H("error:%d fill txpower_tbl\n", rc);
1684 rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1688 static int iwl4965_shared_mem_rx_idx(struct iwl_priv *priv)
1690 struct iwl4965_shared *s = priv->shared_virt;
1691 return le32_to_cpu(s->rb_closed) & 0xFFF;
1694 int iwl4965_hw_get_temperature(struct iwl_priv *priv)
1696 return priv->temperature;
1699 unsigned int iwl4965_hw_get_beacon_cmd(struct iwl_priv *priv,
1700 struct iwl_frame *frame, u8 rate)
1702 struct iwl4965_tx_beacon_cmd *tx_beacon_cmd;
1703 unsigned int frame_size;
1705 tx_beacon_cmd = &frame->u.beacon;
1706 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
1708 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
1709 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
1711 frame_size = iwl4965_fill_beacon_frame(priv,
1712 tx_beacon_cmd->frame,
1714 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
1716 BUG_ON(frame_size > MAX_MPDU_SIZE);
1717 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
1719 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
1720 tx_beacon_cmd->tx.rate_n_flags =
1721 iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
1723 tx_beacon_cmd->tx.rate_n_flags =
1724 iwl_hw_set_rate_n_flags(rate, 0);
1726 tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
1727 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK);
1728 return (sizeof(*tx_beacon_cmd) + frame_size);
1731 static int iwl4965_alloc_shared_mem(struct iwl_priv *priv)
1733 priv->shared_virt = pci_alloc_consistent(priv->pci_dev,
1734 sizeof(struct iwl4965_shared),
1735 &priv->shared_phys);
1736 if (!priv->shared_virt)
1739 memset(priv->shared_virt, 0, sizeof(struct iwl4965_shared));
1741 priv->rb_closed_offset = offsetof(struct iwl4965_shared, rb_closed);
1746 static void iwl4965_free_shared_mem(struct iwl_priv *priv)
1748 if (priv->shared_virt)
1749 pci_free_consistent(priv->pci_dev,
1750 sizeof(struct iwl4965_shared),
1756 * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1758 static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
1759 struct iwl_tx_queue *txq,
1763 int txq_id = txq->q.id;
1764 struct iwl4965_shared *shared_data = priv->shared_virt;
1766 len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
1768 /* Set up byte count within first 256 entries */
1769 IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
1770 tfd_offset[txq->q.write_ptr], byte_cnt, len);
1772 /* If within first 64 entries, duplicate at end */
1773 if (txq->q.write_ptr < IWL49_MAX_WIN_SIZE)
1774 IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
1775 tfd_offset[IWL49_QUEUE_SIZE + txq->q.write_ptr],
1780 * sign_extend - Sign extend a value using specified bit as sign-bit
1782 * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
1783 * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
1785 * @param oper value to sign extend
1786 * @param index 0 based bit index (0<=index<32) to sign bit
1788 static s32 sign_extend(u32 oper, int index)
1790 u8 shift = 31 - index;
1792 return (s32)(oper << shift) >> shift;
1796 * iwl4965_get_temperature - return the calibrated temperature (in Kelvin)
1797 * @statistics: Provides the temperature reading from the uCode
1799 * A return of <0 indicates bogus data in the statistics
1801 int iwl4965_get_temperature(const struct iwl_priv *priv)
1808 if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
1809 (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)) {
1810 IWL_DEBUG_TEMP("Running FAT temperature calibration\n");
1811 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
1812 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
1813 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
1814 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
1816 IWL_DEBUG_TEMP("Running temperature calibration\n");
1817 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
1818 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
1819 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
1820 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
1824 * Temperature is only 23 bits, so sign extend out to 32.
1826 * NOTE If we haven't received a statistics notification yet
1827 * with an updated temperature, use R4 provided to us in the
1828 * "initialize" ALIVE response.
1830 if (!test_bit(STATUS_TEMPERATURE, &priv->status))
1831 vt = sign_extend(R4, 23);
1834 le32_to_cpu(priv->statistics.general.temperature), 23);
1836 IWL_DEBUG_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n",
1840 IWL_ERROR("Calibration conflict R1 == R3\n");
1844 /* Calculate temperature in degrees Kelvin, adjust by 97%.
1845 * Add offset to center the adjustment around 0 degrees Centigrade. */
1846 temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
1847 temperature /= (R3 - R1);
1848 temperature = (temperature * 97) / 100 +
1849 TEMPERATURE_CALIB_KELVIN_OFFSET;
1851 IWL_DEBUG_TEMP("Calibrated temperature: %dK, %dC\n", temperature,
1852 KELVIN_TO_CELSIUS(temperature));
1857 /* Adjust Txpower only if temperature variance is greater than threshold. */
1858 #define IWL_TEMPERATURE_THRESHOLD 3
1861 * iwl4965_is_temp_calib_needed - determines if new calibration is needed
1863 * If the temperature changed has changed sufficiently, then a recalibration
1866 * Assumes caller will replace priv->last_temperature once calibration
1869 static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
1873 if (!test_bit(STATUS_STATISTICS, &priv->status)) {
1874 IWL_DEBUG_TEMP("Temperature not updated -- no statistics.\n");
1878 temp_diff = priv->temperature - priv->last_temperature;
1880 /* get absolute value */
1881 if (temp_diff < 0) {
1882 IWL_DEBUG_POWER("Getting cooler, delta %d, \n", temp_diff);
1883 temp_diff = -temp_diff;
1884 } else if (temp_diff == 0)
1885 IWL_DEBUG_POWER("Same temp, \n");
1887 IWL_DEBUG_POWER("Getting warmer, delta %d, \n", temp_diff);
1889 if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
1890 IWL_DEBUG_POWER("Thermal txpower calib not needed\n");
1894 IWL_DEBUG_POWER("Thermal txpower calib needed\n");
1899 /* Calculate noise level, based on measurements during network silence just
1900 * before arriving beacon. This measurement can be done only if we know
1901 * exactly when to expect beacons, therefore only when we're associated. */
1902 static void iwl4965_rx_calc_noise(struct iwl_priv *priv)
1904 struct statistics_rx_non_phy *rx_info
1905 = &(priv->statistics.rx.general);
1906 int num_active_rx = 0;
1907 int total_silence = 0;
1909 le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
1911 le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
1913 le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
1915 if (bcn_silence_a) {
1916 total_silence += bcn_silence_a;
1919 if (bcn_silence_b) {
1920 total_silence += bcn_silence_b;
1923 if (bcn_silence_c) {
1924 total_silence += bcn_silence_c;
1928 /* Average among active antennas */
1930 priv->last_rx_noise = (total_silence / num_active_rx) - 107;
1932 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
1934 IWL_DEBUG_CALIB("inband silence a %u, b %u, c %u, dBm %d\n",
1935 bcn_silence_a, bcn_silence_b, bcn_silence_c,
1936 priv->last_rx_noise);
1939 void iwl4965_hw_rx_statistics(struct iwl_priv *priv,
1940 struct iwl_rx_mem_buffer *rxb)
1942 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
1946 IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
1947 (int)sizeof(priv->statistics), pkt->len);
1949 change = ((priv->statistics.general.temperature !=
1950 pkt->u.stats.general.temperature) ||
1951 ((priv->statistics.flag &
1952 STATISTICS_REPLY_FLG_FAT_MODE_MSK) !=
1953 (pkt->u.stats.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)));
1955 memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
1957 set_bit(STATUS_STATISTICS, &priv->status);
1959 /* Reschedule the statistics timer to occur in
1960 * REG_RECALIB_PERIOD seconds to ensure we get a
1961 * thermal update even if the uCode doesn't give
1963 mod_timer(&priv->statistics_periodic, jiffies +
1964 msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
1966 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
1967 (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
1968 iwl4965_rx_calc_noise(priv);
1969 queue_work(priv->workqueue, &priv->run_time_calib_work);
1972 iwl_leds_background(priv);
1974 /* If the hardware hasn't reported a change in
1975 * temperature then don't bother computing a
1976 * calibrated temperature value */
1980 temp = iwl4965_get_temperature(priv);
1984 if (priv->temperature != temp) {
1985 if (priv->temperature)
1986 IWL_DEBUG_TEMP("Temperature changed "
1987 "from %dC to %dC\n",
1988 KELVIN_TO_CELSIUS(priv->temperature),
1989 KELVIN_TO_CELSIUS(temp));
1991 IWL_DEBUG_TEMP("Temperature "
1992 "initialized to %dC\n",
1993 KELVIN_TO_CELSIUS(temp));
1996 priv->temperature = temp;
1997 set_bit(STATUS_TEMPERATURE, &priv->status);
1999 if (!priv->disable_tx_power_cal &&
2000 unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
2001 iwl4965_is_temp_calib_needed(priv))
2002 queue_work(priv->workqueue, &priv->txpower_work);
2005 static void iwl4965_add_radiotap(struct iwl_priv *priv,
2006 struct sk_buff *skb,
2007 struct iwl4965_rx_phy_res *rx_start,
2008 struct ieee80211_rx_status *stats,
2011 s8 signal = stats->signal;
2013 int rate = stats->rate_idx;
2014 u64 tsf = stats->mactime;
2016 __le16 phy_flags_hw = rx_start->phy_flags;
2017 struct iwl4965_rt_rx_hdr {
2018 struct ieee80211_radiotap_header rt_hdr;
2019 __le64 rt_tsf; /* TSF */
2020 u8 rt_flags; /* radiotap packet flags */
2021 u8 rt_rate; /* rate in 500kb/s */
2022 __le16 rt_channelMHz; /* channel in MHz */
2023 __le16 rt_chbitmask; /* channel bitfield */
2024 s8 rt_dbmsignal; /* signal in dBm, kluged to signed */
2026 u8 rt_antenna; /* antenna number */
2027 } __attribute__ ((packed)) *iwl4965_rt;
2029 /* TODO: We won't have enough headroom for HT frames. Fix it later. */
2030 if (skb_headroom(skb) < sizeof(*iwl4965_rt)) {
2031 if (net_ratelimit())
2032 printk(KERN_ERR "not enough headroom [%d] for "
2033 "radiotap head [%zd]\n",
2034 skb_headroom(skb), sizeof(*iwl4965_rt));
2038 /* put radiotap header in front of 802.11 header and data */
2039 iwl4965_rt = (void *)skb_push(skb, sizeof(*iwl4965_rt));
2041 /* initialise radiotap header */
2042 iwl4965_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
2043 iwl4965_rt->rt_hdr.it_pad = 0;
2045 /* total header + data */
2046 put_unaligned(cpu_to_le16(sizeof(*iwl4965_rt)),
2047 &iwl4965_rt->rt_hdr.it_len);
2049 /* Indicate all the fields we add to the radiotap header */
2050 put_unaligned(cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
2051 (1 << IEEE80211_RADIOTAP_FLAGS) |
2052 (1 << IEEE80211_RADIOTAP_RATE) |
2053 (1 << IEEE80211_RADIOTAP_CHANNEL) |
2054 (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
2055 (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
2056 (1 << IEEE80211_RADIOTAP_ANTENNA)),
2057 &iwl4965_rt->rt_hdr.it_present);
2059 /* Zero the flags, we'll add to them as we go */
2060 iwl4965_rt->rt_flags = 0;
2062 put_unaligned(cpu_to_le64(tsf), &iwl4965_rt->rt_tsf);
2064 iwl4965_rt->rt_dbmsignal = signal;
2065 iwl4965_rt->rt_dbmnoise = noise;
2067 /* Convert the channel frequency and set the flags */
2068 put_unaligned(cpu_to_le16(stats->freq), &iwl4965_rt->rt_channelMHz);
2069 if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
2070 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
2071 IEEE80211_CHAN_5GHZ),
2072 &iwl4965_rt->rt_chbitmask);
2073 else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
2074 put_unaligned(cpu_to_le16(IEEE80211_CHAN_CCK |
2075 IEEE80211_CHAN_2GHZ),
2076 &iwl4965_rt->rt_chbitmask);
2078 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
2079 IEEE80211_CHAN_2GHZ),
2080 &iwl4965_rt->rt_chbitmask);
2083 iwl4965_rt->rt_rate = 0;
2085 iwl4965_rt->rt_rate = iwl_rates[rate].ieee;
2090 * It seems that the antenna field in the phy flags value
2091 * is actually a bitfield. This is undefined by radiotap,
2092 * it wants an actual antenna number but I always get "7"
2093 * for most legacy frames I receive indicating that the
2094 * same frame was received on all three RX chains.
2096 * I think this field should be removed in favour of a
2097 * new 802.11n radiotap field "RX chains" that is defined
2100 antenna = phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK;
2101 iwl4965_rt->rt_antenna = le16_to_cpu(antenna) >> 4;
2103 /* set the preamble flag if appropriate */
2104 if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
2105 iwl4965_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
2107 stats->flag |= RX_FLAG_RADIOTAP;
2110 static void iwl_update_rx_stats(struct iwl_priv *priv, u16 fc, u16 len)
2112 /* 0 - mgmt, 1 - cnt, 2 - data */
2113 int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
2114 priv->rx_stats[idx].cnt++;
2115 priv->rx_stats[idx].bytes += len;
2119 * returns non-zero if packet should be dropped
2121 static int iwl4965_set_decrypted_flag(struct iwl_priv *priv,
2122 struct ieee80211_hdr *hdr,
2124 struct ieee80211_rx_status *stats)
2126 u16 fc = le16_to_cpu(hdr->frame_control);
2128 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2131 if (!(fc & IEEE80211_FCTL_PROTECTED))
2134 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
2135 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2136 case RX_RES_STATUS_SEC_TYPE_TKIP:
2137 /* The uCode has got a bad phase 1 Key, pushes the packet.
2138 * Decryption will be done in SW. */
2139 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2140 RX_RES_STATUS_BAD_KEY_TTAK)
2143 case RX_RES_STATUS_SEC_TYPE_WEP:
2144 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2145 RX_RES_STATUS_BAD_ICV_MIC) {
2146 /* bad ICV, the packet is destroyed since the
2147 * decryption is inplace, drop it */
2148 IWL_DEBUG_RX("Packet destroyed\n");
2151 case RX_RES_STATUS_SEC_TYPE_CCMP:
2152 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2153 RX_RES_STATUS_DECRYPT_OK) {
2154 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
2155 stats->flag |= RX_FLAG_DECRYPTED;
2165 static u32 iwl4965_translate_rx_status(struct iwl_priv *priv, u32 decrypt_in)
2167 u32 decrypt_out = 0;
2169 if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
2170 RX_RES_STATUS_STATION_FOUND)
2171 decrypt_out |= (RX_RES_STATUS_STATION_FOUND |
2172 RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
2174 decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
2176 /* packet was not encrypted */
2177 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
2178 RX_RES_STATUS_SEC_TYPE_NONE)
2181 /* packet was encrypted with unknown alg */
2182 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
2183 RX_RES_STATUS_SEC_TYPE_ERR)
2186 /* decryption was not done in HW */
2187 if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
2188 RX_MPDU_RES_STATUS_DEC_DONE_MSK)
2191 switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
2193 case RX_RES_STATUS_SEC_TYPE_CCMP:
2194 /* alg is CCM: check MIC only */
2195 if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
2197 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
2199 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
2203 case RX_RES_STATUS_SEC_TYPE_TKIP:
2204 if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
2206 decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
2209 /* fall through if TTAK OK */
2211 if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
2212 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
2214 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
2218 IWL_DEBUG_RX("decrypt_in:0x%x decrypt_out = 0x%x\n",
2219 decrypt_in, decrypt_out);
2224 static void iwl4965_handle_data_packet(struct iwl_priv *priv, int is_data,
2226 struct iwl_rx_mem_buffer *rxb,
2227 struct ieee80211_rx_status *stats)
2229 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2230 struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
2231 (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) : NULL;
2232 struct ieee80211_hdr *hdr;
2235 unsigned int skblen;
2237 u32 ampdu_status_legacy;
2239 if (!include_phy && priv->last_phy_res[0])
2240 rx_start = (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
2243 IWL_ERROR("MPDU frame without a PHY data\n");
2247 hdr = (struct ieee80211_hdr *)((u8 *) & rx_start[1] +
2248 rx_start->cfg_phy_cnt);
2250 len = le16_to_cpu(rx_start->byte_count);
2252 rx_end = (__le32 *) ((u8 *) & pkt->u.raw[0] +
2253 sizeof(struct iwl4965_rx_phy_res) +
2254 rx_start->cfg_phy_cnt + len);
2257 struct iwl4965_rx_mpdu_res_start *amsdu =
2258 (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
2260 hdr = (struct ieee80211_hdr *)(pkt->u.raw +
2261 sizeof(struct iwl4965_rx_mpdu_res_start));
2262 len = le16_to_cpu(amsdu->byte_count);
2263 rx_start->byte_count = amsdu->byte_count;
2264 rx_end = (__le32 *) (((u8 *) hdr) + len);
2266 /* In monitor mode allow 802.11 ACk frames (10 bytes) */
2267 if (len > priv->hw_params.max_pkt_size ||
2268 len < ((priv->iw_mode == IEEE80211_IF_TYPE_MNTR) ? 10 : 16)) {
2269 IWL_WARNING("byte count out of range [16,4K] : %d\n", len);
2273 ampdu_status = le32_to_cpu(*rx_end);
2274 skblen = ((u8 *) rx_end - (u8 *) & pkt->u.raw[0]) + sizeof(u32);
2277 /* New status scheme, need to translate */
2278 ampdu_status_legacy = ampdu_status;
2279 ampdu_status = iwl4965_translate_rx_status(priv, ampdu_status);
2282 /* start from MAC */
2283 skb_reserve(rxb->skb, (void *)hdr - (void *)pkt);
2284 skb_put(rxb->skb, len); /* end where data ends */
2286 /* We only process data packets if the interface is open */
2287 if (unlikely(!priv->is_open)) {
2288 IWL_DEBUG_DROP_LIMIT
2289 ("Dropping packet while interface is not open.\n");
2294 hdr = (struct ieee80211_hdr *)rxb->skb->data;
2296 /* in case of HW accelerated crypto and bad decryption, drop */
2297 if (!priv->hw_params.sw_crypto &&
2298 iwl4965_set_decrypted_flag(priv, hdr, ampdu_status, stats))
2301 if (priv->add_radiotap)
2302 iwl4965_add_radiotap(priv, rxb->skb, rx_start, stats, ampdu_status);
2304 iwl_update_rx_stats(priv, le16_to_cpu(hdr->frame_control), len);
2305 ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
2306 priv->alloc_rxb_skb--;
2310 /* Calc max signal level (dBm) among 3 possible receivers */
2311 static int iwl4965_calc_rssi(struct iwl_priv *priv,
2312 struct iwl4965_rx_phy_res *rx_resp)
2314 /* data from PHY/DSP regarding signal strength, etc.,
2315 * contents are always there, not configurable by host. */
2316 struct iwl4965_rx_non_cfg_phy *ncphy =
2317 (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy;
2318 u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL_AGC_DB_MASK)
2321 u32 valid_antennae =
2322 (le16_to_cpu(rx_resp->phy_flags) & RX_PHY_FLAGS_ANTENNAE_MASK)
2323 >> RX_PHY_FLAGS_ANTENNAE_OFFSET;
2327 /* Find max rssi among 3 possible receivers.
2328 * These values are measured by the digital signal processor (DSP).
2329 * They should stay fairly constant even as the signal strength varies,
2330 * if the radio's automatic gain control (AGC) is working right.
2331 * AGC value (see below) will provide the "interesting" info. */
2332 for (i = 0; i < 3; i++)
2333 if (valid_antennae & (1 << i))
2334 max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
2336 IWL_DEBUG_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
2337 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
2340 /* dBm = max_rssi dB - agc dB - constant.
2341 * Higher AGC (higher radio gain) means lower signal. */
2342 return (max_rssi - agc - IWL_RSSI_OFFSET);
2345 static void iwl4965_sta_modify_ps_wake(struct iwl_priv *priv, int sta_id)
2347 unsigned long flags;
2349 spin_lock_irqsave(&priv->sta_lock, flags);
2350 priv->stations[sta_id].sta.station_flags &= ~STA_FLG_PWR_SAVE_MSK;
2351 priv->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK;
2352 priv->stations[sta_id].sta.sta.modify_mask = 0;
2353 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
2354 spin_unlock_irqrestore(&priv->sta_lock, flags);
2356 iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
2359 static void iwl4965_update_ps_mode(struct iwl_priv *priv, u16 ps_bit, u8 *addr)
2361 /* FIXME: need locking over ps_status ??? */
2362 u8 sta_id = iwl_find_station(priv, addr);
2364 if (sta_id != IWL_INVALID_STATION) {
2365 u8 sta_awake = priv->stations[sta_id].
2366 ps_status == STA_PS_STATUS_WAKE;
2368 if (sta_awake && ps_bit)
2369 priv->stations[sta_id].ps_status = STA_PS_STATUS_SLEEP;
2370 else if (!sta_awake && !ps_bit) {
2371 iwl4965_sta_modify_ps_wake(priv, sta_id);
2372 priv->stations[sta_id].ps_status = STA_PS_STATUS_WAKE;
2376 #ifdef CONFIG_IWLWIFI_DEBUG
2379 * iwl4965_dbg_report_frame - dump frame to syslog during debug sessions
2381 * You may hack this function to show different aspects of received frames,
2382 * including selective frame dumps.
2383 * group100 parameter selects whether to show 1 out of 100 good frames.
2385 * TODO: This was originally written for 3945, need to audit for
2386 * proper operation with 4965.
2388 static void iwl4965_dbg_report_frame(struct iwl_priv *priv,
2389 struct iwl_rx_packet *pkt,
2390 struct ieee80211_hdr *header, int group100)
2393 u32 print_summary = 0;
2394 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
2411 struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
2412 struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
2413 struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
2414 u8 *data = IWL_RX_DATA(pkt);
2416 if (likely(!(priv->debug_level & IWL_DL_RX)))
2420 fc = le16_to_cpu(header->frame_control);
2421 seq_ctl = le16_to_cpu(header->seq_ctrl);
2424 channel = le16_to_cpu(rx_hdr->channel);
2425 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
2426 rate_sym = rx_hdr->rate;
2427 length = le16_to_cpu(rx_hdr->len);
2429 /* end-of-frame status and timestamp */
2430 status = le32_to_cpu(rx_end->status);
2431 bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
2432 tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
2433 tsf = le64_to_cpu(rx_end->timestamp);
2435 /* signal statistics */
2436 rssi = rx_stats->rssi;
2437 agc = rx_stats->agc;
2438 sig_avg = le16_to_cpu(rx_stats->sig_avg);
2439 noise_diff = le16_to_cpu(rx_stats->noise_diff);
2441 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
2443 /* if data frame is to us and all is good,
2444 * (optionally) print summary for only 1 out of every 100 */
2445 if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
2446 (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
2449 print_summary = 1; /* print each frame */
2450 else if (priv->framecnt_to_us < 100) {
2451 priv->framecnt_to_us++;
2454 priv->framecnt_to_us = 0;
2459 /* print summary for all other frames */
2463 if (print_summary) {
2469 title = "100Frames";
2470 else if (fc & IEEE80211_FCTL_RETRY)
2472 else if (ieee80211_is_assoc_response(fc))
2474 else if (ieee80211_is_reassoc_response(fc))
2476 else if (ieee80211_is_probe_response(fc)) {
2478 print_dump = 1; /* dump frame contents */
2479 } else if (ieee80211_is_beacon(fc)) {
2481 print_dump = 1; /* dump frame contents */
2482 } else if (ieee80211_is_atim(fc))
2484 else if (ieee80211_is_auth(fc))
2486 else if (ieee80211_is_deauth(fc))
2488 else if (ieee80211_is_disassoc(fc))
2493 rate_idx = iwl_hwrate_to_plcp_idx(rate_sym);
2494 if (unlikely(rate_idx == -1))
2497 bitrate = iwl_rates[rate_idx].ieee / 2;
2499 /* print frame summary.
2500 * MAC addresses show just the last byte (for brevity),
2501 * but you can hack it to show more, if you'd like to. */
2503 IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
2504 "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
2505 title, fc, header->addr1[5],
2506 length, rssi, channel, bitrate);
2508 /* src/dst addresses assume managed mode */
2509 IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
2510 "src=0x%02x, rssi=%u, tim=%lu usec, "
2511 "phy=0x%02x, chnl=%d\n",
2512 title, fc, header->addr1[5],
2513 header->addr3[5], rssi,
2514 tsf_low - priv->scan_start_tsf,
2515 phy_flags, channel);
2519 iwl_print_hex_dump(priv, IWL_DL_RX, data, length);
2522 static inline void iwl4965_dbg_report_frame(struct iwl_priv *priv,
2523 struct iwl_rx_packet *pkt,
2524 struct ieee80211_hdr *header,
2532 /* Called for REPLY_RX (legacy ABG frames), or
2533 * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
2534 void iwl4965_rx_reply_rx(struct iwl_priv *priv,
2535 struct iwl_rx_mem_buffer *rxb)
2537 struct ieee80211_hdr *header;
2538 struct ieee80211_rx_status rx_status;
2539 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2540 /* Use phy data (Rx signal strength, etc.) contained within
2541 * this rx packet for legacy frames,
2542 * or phy data cached from REPLY_RX_PHY_CMD for HT frames. */
2543 int include_phy = (pkt->hdr.cmd == REPLY_RX);
2544 struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
2545 (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) :
2546 (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
2548 unsigned int len = 0;
2552 rx_status.mactime = le64_to_cpu(rx_start->timestamp);
2554 ieee80211_channel_to_frequency(le16_to_cpu(rx_start->channel));
2555 rx_status.band = (rx_start->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
2556 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
2557 rx_status.rate_idx =
2558 iwl_hwrate_to_plcp_idx(le32_to_cpu(rx_start->rate_n_flags));
2559 if (rx_status.band == IEEE80211_BAND_5GHZ)
2560 rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
2562 rx_status.antenna = 0;
2565 if ((unlikely(rx_start->cfg_phy_cnt > 20))) {
2566 IWL_DEBUG_DROP("dsp size out of range [0,20]: %d/n",
2567 rx_start->cfg_phy_cnt);
2572 if (priv->last_phy_res[0])
2573 rx_start = (struct iwl4965_rx_phy_res *)
2574 &priv->last_phy_res[1];
2580 IWL_ERROR("MPDU frame without a PHY data\n");
2585 header = (struct ieee80211_hdr *)((u8 *) & rx_start[1]
2586 + rx_start->cfg_phy_cnt);
2588 len = le16_to_cpu(rx_start->byte_count);
2589 rx_end = (__le32 *)(pkt->u.raw + rx_start->cfg_phy_cnt +
2590 sizeof(struct iwl4965_rx_phy_res) + len);
2592 struct iwl4965_rx_mpdu_res_start *amsdu =
2593 (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
2595 header = (void *)(pkt->u.raw +
2596 sizeof(struct iwl4965_rx_mpdu_res_start));
2597 len = le16_to_cpu(amsdu->byte_count);
2598 rx_end = (__le32 *) (pkt->u.raw +
2599 sizeof(struct iwl4965_rx_mpdu_res_start) + len);
2602 if (!(*rx_end & RX_RES_STATUS_NO_CRC32_ERROR) ||
2603 !(*rx_end & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
2604 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n",
2605 le32_to_cpu(*rx_end));
2609 priv->ucode_beacon_time = le32_to_cpu(rx_start->beacon_time_stamp);
2611 /* Find max signal strength (dBm) among 3 antenna/receiver chains */
2612 rx_status.signal = iwl4965_calc_rssi(priv, rx_start);
2614 /* Meaningful noise values are available only from beacon statistics,
2615 * which are gathered only when associated, and indicate noise
2616 * only for the associated network channel ...
2617 * Ignore these noise values while scanning (other channels) */
2618 if (iwl_is_associated(priv) &&
2619 !test_bit(STATUS_SCANNING, &priv->status)) {
2620 rx_status.noise = priv->last_rx_noise;
2621 rx_status.qual = iwl4965_calc_sig_qual(rx_status.signal,
2624 rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
2625 rx_status.qual = iwl4965_calc_sig_qual(rx_status.signal, 0);
2628 /* Reset beacon noise level if not associated. */
2629 if (!iwl_is_associated(priv))
2630 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
2632 /* Set "1" to report good data frames in groups of 100 */
2633 /* FIXME: need to optimze the call: */
2634 iwl4965_dbg_report_frame(priv, pkt, header, 1);
2636 IWL_DEBUG_STATS_LIMIT("Rssi %d, noise %d, qual %d, TSF %llu\n",
2637 rx_status.signal, rx_status.noise, rx_status.signal,
2638 (unsigned long long)rx_status.mactime);
2641 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
2642 iwl4965_handle_data_packet(priv, 1, include_phy,
2647 network_packet = iwl4965_is_network_packet(priv, header);
2648 if (network_packet) {
2649 priv->last_rx_rssi = rx_status.signal;
2650 priv->last_beacon_time = priv->ucode_beacon_time;
2651 priv->last_tsf = le64_to_cpu(rx_start->timestamp);
2654 fc = le16_to_cpu(header->frame_control);
2655 switch (fc & IEEE80211_FCTL_FTYPE) {
2656 case IEEE80211_FTYPE_MGMT:
2657 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
2658 iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
2660 iwl4965_handle_data_packet(priv, 0, include_phy, rxb, &rx_status);
2663 case IEEE80211_FTYPE_CTL:
2664 switch (fc & IEEE80211_FCTL_STYPE) {
2665 case IEEE80211_STYPE_BACK_REQ:
2666 IWL_DEBUG_HT("IEEE80211_STYPE_BACK_REQ arrived\n");
2667 iwl4965_handle_data_packet(priv, 0, include_phy,
2675 case IEEE80211_FTYPE_DATA: {
2676 DECLARE_MAC_BUF(mac1);
2677 DECLARE_MAC_BUF(mac2);
2678 DECLARE_MAC_BUF(mac3);
2680 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
2681 iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
2684 if (unlikely(!network_packet))
2685 IWL_DEBUG_DROP("Dropping (non network): "
2687 print_mac(mac1, header->addr1),
2688 print_mac(mac2, header->addr2),
2689 print_mac(mac3, header->addr3));
2690 else if (unlikely(iwl4965_is_duplicate_packet(priv, header)))
2691 IWL_DEBUG_DROP("Dropping (dup): %s, %s, %s\n",
2692 print_mac(mac1, header->addr1),
2693 print_mac(mac2, header->addr2),
2694 print_mac(mac3, header->addr3));
2696 iwl4965_handle_data_packet(priv, 1, include_phy, rxb,
2707 * iwl4965_tx_status_reply_compressed_ba - Update tx status from block-ack
2709 * Go through block-ack's bitmap of ACK'd frames, update driver's record of
2710 * ACK vs. not. This gets sent to mac80211, then to rate scaling algo.
2712 static int iwl4965_tx_status_reply_compressed_ba(struct iwl_priv *priv,
2713 struct iwl_ht_agg *agg,
2714 struct iwl4965_compressed_ba_resp*
2719 u16 seq_ctl = le16_to_cpu(ba_resp->seq_ctl);
2720 u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
2723 struct ieee80211_tx_info *info;
2725 if (unlikely(!agg->wait_for_ba)) {
2726 IWL_ERROR("Received BA when not expected\n");
2730 /* Mark that the expected block-ack response arrived */
2731 agg->wait_for_ba = 0;
2732 IWL_DEBUG_TX_REPLY("BA %d %d\n", agg->start_idx, ba_resp->seq_ctl);
2734 /* Calculate shift to align block-ack bits with our Tx window bits */
2735 sh = agg->start_idx - SEQ_TO_INDEX(seq_ctl>>4);
2736 if (sh < 0) /* tbw something is wrong with indices */
2739 /* don't use 64-bit values for now */
2740 bitmap = le64_to_cpu(ba_resp->bitmap) >> sh;
2742 if (agg->frame_count > (64 - sh)) {
2743 IWL_DEBUG_TX_REPLY("more frames than bitmap size");
2747 /* check for success or failure according to the
2748 * transmitted bitmap and block-ack bitmap */
2749 bitmap &= agg->bitmap;
2751 /* For each frame attempted in aggregation,
2752 * update driver's record of tx frame's status. */
2753 for (i = 0; i < agg->frame_count ; i++) {
2754 ack = bitmap & (1 << i);
2756 IWL_DEBUG_TX_REPLY("%s ON i=%d idx=%d raw=%d\n",
2757 ack? "ACK":"NACK", i, (agg->start_idx + i) & 0xff,
2758 agg->start_idx + i);
2761 info = IEEE80211_SKB_CB(priv->txq[scd_flow].txb[agg->start_idx].skb[0]);
2762 memset(&info->status, 0, sizeof(info->status));
2763 info->flags = IEEE80211_TX_STAT_ACK;
2764 info->flags |= IEEE80211_TX_STAT_AMPDU;
2765 info->status.ampdu_ack_map = successes;
2766 info->status.ampdu_ack_len = agg->frame_count;
2767 iwl_hwrate_to_tx_control(priv, agg->rate_n_flags, info);
2769 IWL_DEBUG_TX_REPLY("Bitmap %llx\n", (unsigned long long)bitmap);
2775 * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
2777 static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
2780 /* Simply stop the queue, but don't change any configuration;
2781 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
2782 iwl_write_prph(priv,
2783 IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
2784 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
2785 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
2789 * txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE
2790 * priv->lock must be held by the caller
2792 static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
2793 u16 ssn_idx, u8 tx_fifo)
2797 if (IWL49_FIRST_AMPDU_QUEUE > txq_id) {
2798 IWL_WARNING("queue number too small: %d, must be > %d\n",
2799 txq_id, IWL49_FIRST_AMPDU_QUEUE);
2803 ret = iwl_grab_nic_access(priv);
2807 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
2809 iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
2811 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
2812 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
2813 /* supposes that ssn_idx is valid (!= 0xFFF) */
2814 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
2816 iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
2817 iwl_txq_ctx_deactivate(priv, txq_id);
2818 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
2820 iwl_release_nic_access(priv);
2827 * iwl4965_rx_reply_compressed_ba - Handler for REPLY_COMPRESSED_BA
2829 * Handles block-acknowledge notification from device, which reports success
2830 * of frames sent via aggregation.
2832 static void iwl4965_rx_reply_compressed_ba(struct iwl_priv *priv,
2833 struct iwl_rx_mem_buffer *rxb)
2835 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2836 struct iwl4965_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba;
2838 struct iwl_tx_queue *txq = NULL;
2839 struct iwl_ht_agg *agg;
2840 DECLARE_MAC_BUF(mac);
2842 /* "flow" corresponds to Tx queue */
2843 u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
2845 /* "ssn" is start of block-ack Tx window, corresponds to index
2846 * (in Tx queue's circular buffer) of first TFD/frame in window */
2847 u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn);
2849 if (scd_flow >= priv->hw_params.max_txq_num) {
2850 IWL_ERROR("BUG_ON scd_flow is bigger than number of queues");
2854 txq = &priv->txq[scd_flow];
2855 agg = &priv->stations[ba_resp->sta_id].tid[ba_resp->tid].agg;
2857 /* Find index just before block-ack window */
2858 index = iwl_queue_dec_wrap(ba_resp_scd_ssn & 0xff, txq->q.n_bd);
2860 /* TODO: Need to get this copy more safely - now good for debug */
2862 IWL_DEBUG_TX_REPLY("REPLY_COMPRESSED_BA [%d]Received from %s, "
2865 print_mac(mac, (u8*) &ba_resp->sta_addr_lo32),
2867 IWL_DEBUG_TX_REPLY("TID = %d, SeqCtl = %d, bitmap = 0x%llx, scd_flow = "
2868 "%d, scd_ssn = %d\n",
2871 (unsigned long long)le64_to_cpu(ba_resp->bitmap),
2874 IWL_DEBUG_TX_REPLY("DAT start_idx = %d, bitmap = 0x%llx \n",
2876 (unsigned long long)agg->bitmap);
2878 /* Update driver's record of ACK vs. not for each frame in window */
2879 iwl4965_tx_status_reply_compressed_ba(priv, agg, ba_resp);
2881 /* Release all TFDs before the SSN, i.e. all TFDs in front of
2882 * block-ack window (we assume that they've been successfully
2883 * transmitted ... if not, it's too late anyway). */
2884 if (txq->q.read_ptr != (ba_resp_scd_ssn & 0xff)) {
2885 /* calculate mac80211 ampdu sw queue to wake */
2887 scd_flow - priv->hw_params.first_ampdu_q + priv->hw->queues;
2888 int freed = iwl_tx_queue_reclaim(priv, scd_flow, index);
2889 priv->stations[ba_resp->sta_id].
2890 tid[ba_resp->tid].tfds_in_queue -= freed;
2891 if (iwl_queue_space(&txq->q) > txq->q.low_mark &&
2892 priv->mac80211_registered &&
2893 agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
2894 ieee80211_wake_queue(priv->hw, ampdu_q);
2896 iwl_txq_check_empty(priv, ba_resp->sta_id,
2897 ba_resp->tid, scd_flow);
2902 * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
2904 static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
2911 scd_q2ratid = ra_tid & IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
2913 tbl_dw_addr = priv->scd_base_addr +
2914 IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
2916 tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
2919 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
2921 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
2923 iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
2930 * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
2932 * NOTE: txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE,
2933 * i.e. it must be one of the higher queues used for aggregation
2935 static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id,
2936 int tx_fifo, int sta_id, int tid, u16 ssn_idx)
2938 unsigned long flags;
2942 if (IWL49_FIRST_AMPDU_QUEUE > txq_id)
2943 IWL_WARNING("queue number too small: %d, must be > %d\n",
2944 txq_id, IWL49_FIRST_AMPDU_QUEUE);
2946 ra_tid = BUILD_RAxTID(sta_id, tid);
2948 /* Modify device's station table to Tx this TID */
2949 iwl_sta_modify_enable_tid_tx(priv, sta_id, tid);
2951 spin_lock_irqsave(&priv->lock, flags);
2952 ret = iwl_grab_nic_access(priv);
2954 spin_unlock_irqrestore(&priv->lock, flags);
2958 /* Stop this Tx queue before configuring it */
2959 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
2961 /* Map receiver-address / traffic-ID to this queue */
2962 iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
2964 /* Set this queue as a chain-building queue */
2965 iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
2967 /* Place first TFD at index corresponding to start sequence number.
2968 * Assumes that ssn_idx is valid (!= 0xFFF) */
2969 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
2970 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
2971 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
2973 /* Set up Tx window size and frame limit for this queue */
2974 iwl_write_targ_mem(priv,
2975 priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
2976 (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
2977 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
2979 iwl_write_targ_mem(priv, priv->scd_base_addr +
2980 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
2981 (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
2982 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
2984 iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
2986 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
2987 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
2989 iwl_release_nic_access(priv);
2990 spin_unlock_irqrestore(&priv->lock, flags);
2995 static int iwl4965_rx_agg_start(struct iwl_priv *priv,
2996 const u8 *addr, int tid, u16 ssn)
2998 unsigned long flags;
3001 sta_id = iwl_find_station(priv, addr);
3002 if (sta_id == IWL_INVALID_STATION)
3005 spin_lock_irqsave(&priv->sta_lock, flags);
3006 priv->stations[sta_id].sta.station_flags_msk = 0;
3007 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_ADDBA_TID_MSK;
3008 priv->stations[sta_id].sta.add_immediate_ba_tid = (u8)tid;
3009 priv->stations[sta_id].sta.add_immediate_ba_ssn = cpu_to_le16(ssn);
3010 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3011 spin_unlock_irqrestore(&priv->sta_lock, flags);
3013 return iwl_send_add_sta(priv, &priv->stations[sta_id].sta,
3017 static int iwl4965_rx_agg_stop(struct iwl_priv *priv,
3018 const u8 *addr, int tid)
3020 unsigned long flags;
3023 sta_id = iwl_find_station(priv, addr);
3024 if (sta_id == IWL_INVALID_STATION)
3027 spin_lock_irqsave(&priv->sta_lock, flags);
3028 priv->stations[sta_id].sta.station_flags_msk = 0;
3029 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK;
3030 priv->stations[sta_id].sta.remove_immediate_ba_tid = (u8)tid;
3031 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3032 spin_unlock_irqrestore(&priv->sta_lock, flags);
3034 return iwl_send_add_sta(priv, &priv->stations[sta_id].sta,
3038 int iwl4965_mac_ampdu_action(struct ieee80211_hw *hw,
3039 enum ieee80211_ampdu_mlme_action action,
3040 const u8 *addr, u16 tid, u16 *ssn)
3042 struct iwl_priv *priv = hw->priv;
3043 DECLARE_MAC_BUF(mac);
3045 IWL_DEBUG_HT("A-MPDU action on addr %s tid %d\n",
3046 print_mac(mac, addr), tid);
3049 case IEEE80211_AMPDU_RX_START:
3050 IWL_DEBUG_HT("start Rx\n");
3051 return iwl4965_rx_agg_start(priv, addr, tid, *ssn);
3052 case IEEE80211_AMPDU_RX_STOP:
3053 IWL_DEBUG_HT("stop Rx\n");
3054 return iwl4965_rx_agg_stop(priv, addr, tid);
3055 case IEEE80211_AMPDU_TX_START:
3056 IWL_DEBUG_HT("start Tx\n");
3057 return iwl_tx_agg_start(priv, addr, tid, ssn);
3058 case IEEE80211_AMPDU_TX_STOP:
3059 IWL_DEBUG_HT("stop Tx\n");
3060 return iwl_tx_agg_stop(priv, addr, tid);
3062 IWL_DEBUG_HT("unknown\n");
3069 static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len)
3073 return (u16) sizeof(struct iwl4965_rxon_cmd);
3079 static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
3081 struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
3082 addsta->mode = cmd->mode;
3083 memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
3084 memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
3085 addsta->station_flags = cmd->station_flags;
3086 addsta->station_flags_msk = cmd->station_flags_msk;
3087 addsta->tid_disable_tx = cmd->tid_disable_tx;
3088 addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
3089 addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
3090 addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
3091 addsta->reserved1 = __constant_cpu_to_le16(0);
3092 addsta->reserved2 = __constant_cpu_to_le32(0);
3094 return (u16)sizeof(struct iwl4965_addsta_cmd);
3097 static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
3099 return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
3103 * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
3105 static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
3106 struct iwl_ht_agg *agg,
3107 struct iwl4965_tx_resp *tx_resp,
3108 int txq_id, u16 start_idx)
3111 struct agg_tx_status *frame_status = tx_resp->u.agg_status;
3112 struct ieee80211_tx_info *info = NULL;
3113 struct ieee80211_hdr *hdr = NULL;
3114 u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
3117 if (agg->wait_for_ba)
3118 IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
3120 agg->frame_count = tx_resp->frame_count;
3121 agg->start_idx = start_idx;
3122 agg->rate_n_flags = rate_n_flags;
3125 /* # frames attempted by Tx command */
3126 if (agg->frame_count == 1) {
3127 /* Only one frame was attempted; no block-ack will arrive */
3128 status = le16_to_cpu(frame_status[0].status);
3131 /* FIXME: code repetition */
3132 IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
3133 agg->frame_count, agg->start_idx, idx);
3135 info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]);
3136 info->status.retry_count = tx_resp->failure_frame;
3137 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
3138 info->flags |= iwl_is_tx_success(status)?
3139 IEEE80211_TX_STAT_ACK : 0;
3140 iwl_hwrate_to_tx_control(priv, rate_n_flags, info);
3141 /* FIXME: code repetition end */
3143 IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
3144 status & 0xff, tx_resp->failure_frame);
3145 IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n", rate_n_flags);
3147 agg->wait_for_ba = 0;
3149 /* Two or more frames were attempted; expect block-ack */
3151 int start = agg->start_idx;
3153 /* Construct bit-map of pending frames within Tx window */
3154 for (i = 0; i < agg->frame_count; i++) {
3156 status = le16_to_cpu(frame_status[i].status);
3157 seq = le16_to_cpu(frame_status[i].sequence);
3158 idx = SEQ_TO_INDEX(seq);
3159 txq_id = SEQ_TO_QUEUE(seq);
3161 if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
3162 AGG_TX_STATE_ABORT_MSK))
3165 IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
3166 agg->frame_count, txq_id, idx);
3168 hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
3170 sc = le16_to_cpu(hdr->seq_ctrl);
3171 if (idx != (SEQ_TO_SN(sc) & 0xff)) {
3172 IWL_ERROR("BUG_ON idx doesn't match seq control"
3173 " idx=%d, seq_idx=%d, seq=%d\n",
3179 IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
3180 i, idx, SEQ_TO_SN(sc));
3184 sh = (start - idx) + 0xff;
3185 bitmap = bitmap << sh;
3188 } else if (sh < -64)
3189 sh = 0xff - (start - idx);
3193 bitmap = bitmap << sh;
3196 bitmap |= (1 << sh);
3197 IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
3198 start, (u32)(bitmap & 0xFFFFFFFF));
3201 agg->bitmap = bitmap;
3202 agg->start_idx = start;
3203 IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
3204 agg->frame_count, agg->start_idx,
3205 (unsigned long long)agg->bitmap);
3208 agg->wait_for_ba = 1;
3214 * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
3216 static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
3217 struct iwl_rx_mem_buffer *rxb)
3219 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
3220 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3221 int txq_id = SEQ_TO_QUEUE(sequence);
3222 int index = SEQ_TO_INDEX(sequence);
3223 struct iwl_tx_queue *txq = &priv->txq[txq_id];
3224 struct ieee80211_tx_info *info;
3225 struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
3226 u32 status = le32_to_cpu(tx_resp->u.status);
3227 int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
3229 struct ieee80211_hdr *hdr;
3232 if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
3233 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
3234 "is out of range [0-%d] %d %d\n", txq_id,
3235 index, txq->q.n_bd, txq->q.write_ptr,
3240 info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
3241 memset(&info->status, 0, sizeof(info->status));
3243 hdr = iwl_tx_queue_get_hdr(priv, txq_id, index);
3244 fc = le16_to_cpu(hdr->frame_control);
3245 if (ieee80211_is_qos_data(fc)) {
3246 qc = ieee80211_get_qos_ctrl(hdr, ieee80211_get_hdrlen(fc));
3250 sta_id = iwl_get_ra_sta_id(priv, hdr);
3251 if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
3252 IWL_ERROR("Station not known\n");
3256 if (txq->sched_retry) {
3257 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
3258 struct iwl_ht_agg *agg = NULL;
3263 agg = &priv->stations[sta_id].tid[tid].agg;
3265 iwl4965_tx_status_reply_tx(priv, agg, tx_resp, txq_id, index);
3267 if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status)) {
3268 /* TODO: send BAR */
3271 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
3273 index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
3274 IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
3275 "%d index %d\n", scd_ssn , index);
3276 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
3277 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
3279 if (iwl_queue_space(&txq->q) > txq->q.low_mark &&
3280 txq_id >= 0 && priv->mac80211_registered &&
3281 agg->state != IWL_EMPTYING_HW_QUEUE_DELBA) {
3282 /* calculate mac80211 ampdu sw queue to wake */
3283 ampdu_q = txq_id - IWL49_FIRST_AMPDU_QUEUE +
3285 if (agg->state == IWL_AGG_OFF)
3286 ieee80211_wake_queue(priv->hw, txq_id);
3288 ieee80211_wake_queue(priv->hw, ampdu_q);
3290 iwl_txq_check_empty(priv, sta_id, tid, txq_id);
3293 info->status.retry_count = tx_resp->failure_frame;
3295 iwl_is_tx_success(status) ? IEEE80211_TX_STAT_ACK : 0;
3296 iwl_hwrate_to_tx_control(priv,
3297 le32_to_cpu(tx_resp->rate_n_flags),
3300 IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags "
3301 "0x%x retries %d\n", txq_id,
3302 iwl_get_tx_fail_reason(status),
3303 status, le32_to_cpu(tx_resp->rate_n_flags),
3304 tx_resp->failure_frame);
3306 IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
3309 int freed = iwl_tx_queue_reclaim(priv, txq_id, index);
3310 if (tid != MAX_TID_COUNT)
3311 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
3312 if (iwl_queue_space(&txq->q) > txq->q.low_mark &&
3313 (txq_id >= 0) && priv->mac80211_registered)
3314 ieee80211_wake_queue(priv->hw, txq_id);
3315 if (tid != MAX_TID_COUNT)
3316 iwl_txq_check_empty(priv, sta_id, tid, txq_id);
3320 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
3321 IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
3325 /* Set up 4965-specific Rx frame reply handlers */
3326 static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
3328 /* Legacy Rx frames */
3329 priv->rx_handlers[REPLY_RX] = iwl4965_rx_reply_rx;
3331 priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
3333 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl4965_rx_reply_compressed_ba;
3336 static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
3338 INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
3341 static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
3343 cancel_work_sync(&priv->txpower_work);
3347 static struct iwl_hcmd_ops iwl4965_hcmd = {
3348 .rxon_assoc = iwl4965_send_rxon_assoc,
3351 static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
3352 .get_hcmd_size = iwl4965_get_hcmd_size,
3353 .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
3354 .chain_noise_reset = iwl4965_chain_noise_reset,
3355 .gain_computation = iwl4965_gain_computation,
3358 static struct iwl_lib_ops iwl4965_lib = {
3359 .set_hw_params = iwl4965_hw_set_hw_params,
3360 .alloc_shared_mem = iwl4965_alloc_shared_mem,
3361 .free_shared_mem = iwl4965_free_shared_mem,
3362 .shared_mem_rx_idx = iwl4965_shared_mem_rx_idx,
3363 .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
3364 .txq_set_sched = iwl4965_txq_set_sched,
3365 .txq_agg_enable = iwl4965_txq_agg_enable,
3366 .txq_agg_disable = iwl4965_txq_agg_disable,
3367 .rx_handler_setup = iwl4965_rx_handler_setup,
3368 .setup_deferred_work = iwl4965_setup_deferred_work,
3369 .cancel_deferred_work = iwl4965_cancel_deferred_work,
3370 .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
3371 .alive_notify = iwl4965_alive_notify,
3372 .init_alive_start = iwl4965_init_alive_start,
3373 .load_ucode = iwl4965_load_bsm,
3375 .init = iwl4965_apm_init,
3376 .reset = iwl4965_apm_reset,
3377 .stop = iwl4965_apm_stop,
3378 .config = iwl4965_nic_config,
3379 .set_pwr_src = iwl4965_set_pwr_src,
3382 .regulatory_bands = {
3383 EEPROM_REGULATORY_BAND_1_CHANNELS,
3384 EEPROM_REGULATORY_BAND_2_CHANNELS,
3385 EEPROM_REGULATORY_BAND_3_CHANNELS,
3386 EEPROM_REGULATORY_BAND_4_CHANNELS,
3387 EEPROM_REGULATORY_BAND_5_CHANNELS,
3388 EEPROM_4965_REGULATORY_BAND_24_FAT_CHANNELS,
3389 EEPROM_4965_REGULATORY_BAND_52_FAT_CHANNELS
3391 .verify_signature = iwlcore_eeprom_verify_signature,
3392 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
3393 .release_semaphore = iwlcore_eeprom_release_semaphore,
3394 .check_version = iwl4965_eeprom_check_version,
3395 .query_addr = iwlcore_eeprom_query_addr,
3397 .radio_kill_sw = iwl4965_radio_kill_sw,
3398 .set_power = iwl4965_set_power,
3399 .send_tx_power = iwl4965_send_tx_power,
3400 .update_chain_flags = iwl4965_update_chain_flags,
3403 static struct iwl_ops iwl4965_ops = {
3404 .lib = &iwl4965_lib,
3405 .hcmd = &iwl4965_hcmd,
3406 .utils = &iwl4965_hcmd_utils,
3409 struct iwl_cfg iwl4965_agn_cfg = {
3411 .fw_name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode",
3412 .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
3413 .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
3414 .ops = &iwl4965_ops,
3415 .mod_params = &iwl4965_mod_params,
3418 module_param_named(antenna, iwl4965_mod_params.antenna, int, 0444);
3419 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
3420 module_param_named(disable, iwl4965_mod_params.disable, int, 0444);
3421 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
3422 module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, 0444);
3423 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])\n");
3424 module_param_named(debug, iwl4965_mod_params.debug, int, 0444);
3425 MODULE_PARM_DESC(debug, "debug output mask");
3427 disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, 0444);
3428 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
3430 module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, 0444);
3431 MODULE_PARM_DESC(queues_num, "number of hw queues.");
3434 module_param_named(qos_enable, iwl4965_mod_params.enable_qos, int, 0444);
3435 MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
3436 module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K, int, 0444);
3437 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
3438 module_param_named(fw_restart4965, iwl4965_mod_params.restart_fw, int, 0444);
3439 MODULE_PARM_DESC(fw_restart4965, "restart firmware in case of error");