SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/net/wireless/iwlwifi/iwl-4965.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  *  Intel Linux Wireless <ilw@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/init.h>
  30 #include <linux/pci.h>
  31 #include <linux/dma-mapping.h>
  32 #include <linux/delay.h>
  33 #include <linux/skbuff.h>
  34 #include <linux/netdevice.h>
  35 #include <linux/wireless.h>
  36 #include <net/mac80211.h>
  37 #include <linux/etherdevice.h>
  38 #include <asm/unaligned.h>
  39
  40 #include "iwl-eeprom.h"
  41 #include "iwl-dev.h"
  42 #include "iwl-core.h"
  43 #include "iwl-io.h"
  44 #include "iwl-helpers.h"
  45 #include "iwl-calib.h"
  46 #include "iwl-sta.h"
  47 #include "iwl-agn-led.h"
  48
  49 static int iwl4965_send_tx_power(struct iwl_priv *priv);
  50 static int iwl4965_hw_get_temperature(struct iwl_priv *priv);
  51
  52 /* Highest firmware API version supported */
  53 #define IWL4965_UCODE_API_MAX 2
  54
  55 /* Lowest firmware API version supported */
  56 #define IWL4965_UCODE_API_MIN 2
  57
  58 #define IWL4965_FW_PRE "iwlwifi-4965-"
  59 #define _IWL4965_MODULE_FIRMWARE(api) IWL4965_FW_PRE #api ".ucode"
  60 #define IWL4965_MODULE_FIRMWARE(api) _IWL4965_MODULE_FIRMWARE(api)
  61
  62
  63 /* module parameters */
  64 static struct iwl_mod_params iwl4965_mod_params = {
  65         .num_of_queues = IWL49_NUM_QUEUES,
  66         .num_of_ampdu_queues = IWL49_NUM_AMPDU_QUEUES,
  67         .amsdu_size_8K = 1,
  68         .restart_fw = 1,
  69         /* the rest are 0 by default */
  70 };
  71
  72 /* check contents of special bootstrap uCode SRAM */
  73 static int iwl4965_verify_bsm(struct iwl_priv *priv)
  74 {
  75         __le32 *image = priv->ucode_boot.v_addr;
  76         u32 len = priv->ucode_boot.len;
  77         u32 reg;
  78         u32 val;
  79
  80         IWL_DEBUG_INFO(priv, "Begin verify bsm\n");
  81
  82         /* verify BSM SRAM contents */
  83         val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
  84         for (reg = BSM_SRAM_LOWER_BOUND;
  85              reg < BSM_SRAM_LOWER_BOUND + len;
  86              reg += sizeof(u32), image++) {
  87                 val = iwl_read_prph(priv, reg);
  88                 if (val != le32_to_cpu(*image)) {
  89                         IWL_ERR(priv, "BSM uCode verification failed at "
  90                                   "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  91                                   BSM_SRAM_LOWER_BOUND,
  92                                   reg - BSM_SRAM_LOWER_BOUND, len,
  93                                   val, le32_to_cpu(*image));
  94                         return -EIO;
  95                 }
  96         }
  97
  98         IWL_DEBUG_INFO(priv, "BSM bootstrap uCode image OK\n");
  99
 100         return 0;
 101 }
 102
 103 /**
 104  * iwl4965_load_bsm - Load bootstrap instructions
 105  *
 106  * BSM operation:
 107  *
 108  * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
 109  * in special SRAM that does not power down during RFKILL.  When powering back
 110  * up after power-saving sleeps (or during initial uCode load), the BSM loads
 111  * the bootstrap program into the on-board processor, and starts it.
 112  *
 113  * The bootstrap program loads (via DMA) instructions and data for a new
 114  * program from host DRAM locations indicated by the host driver in the
 115  * BSM_DRAM_* registers.  Once the new program is loaded, it starts
 116  * automatically.
 117  *
 118  * When initializing the NIC, the host driver points the BSM to the
 119  * "initialize" uCode image.  This uCode sets up some internal data, then
 120  * notifies host via "initialize alive" that it is complete.
 121  *
 122  * The host then replaces the BSM_DRAM_* pointer values to point to the
 123  * normal runtime uCode instructions and a backup uCode data cache buffer
 124  * (filled initially with starting data values for the on-board processor),
 125  * then triggers the "initialize" uCode to load and launch the runtime uCode,
 126  * which begins normal operation.
 127  *
 128  * When doing a power-save shutdown, runtime uCode saves data SRAM into
 129  * the backup data cache in DRAM before SRAM is powered down.
 130  *
 131  * When powering back up, the BSM loads the bootstrap program.  This reloads
 132  * the runtime uCode instructions and the backup data cache into SRAM,
 133  * and re-launches the runtime uCode from where it left off.
 134  */
 135 static int iwl4965_load_bsm(struct iwl_priv *priv)
 136 {
 137         __le32 *image = priv->ucode_boot.v_addr;
 138         u32 len = priv->ucode_boot.len;
 139         dma_addr_t pinst;
 140         dma_addr_t pdata;
 141         u32 inst_len;
 142         u32 data_len;
 143         int i;
 144         u32 done;
 145         u32 reg_offset;
 146         int ret;
 147
 148         IWL_DEBUG_INFO(priv, "Begin load bsm\n");
 149
 150         priv->ucode_type = UCODE_RT;
 151
 152         /* make sure bootstrap program is no larger than BSM's SRAM size */
 153         if (len > IWL49_MAX_BSM_SIZE)
 154                 return -EINVAL;
 155
 156         /* Tell bootstrap uCode where to find the "Initialize" uCode
 157          *   in host DRAM ... host DRAM physical address bits 35:4 for 4965.
 158          * NOTE:  iwl_init_alive_start() will replace these values,
 159          *        after the "initialize" uCode has run, to point to
 160          *        runtime/protocol instructions and backup data cache.
 161          */
 162         pinst = priv->ucode_init.p_addr >> 4;
 163         pdata = priv->ucode_init_data.p_addr >> 4;
 164         inst_len = priv->ucode_init.len;
 165         data_len = priv->ucode_init_data.len;
 166
 167         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
 168         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
 169         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
 170         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
 171
 172         /* Fill BSM memory with bootstrap instructions */
 173         for (reg_offset = BSM_SRAM_LOWER_BOUND;
 174              reg_offset < BSM_SRAM_LOWER_BOUND + len;
 175              reg_offset += sizeof(u32), image++)
 176                 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
 177
 178         ret = iwl4965_verify_bsm(priv);
 179         if (ret)
 180                 return ret;
 181
 182         /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
 183         iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
 184         iwl_write_prph(priv, BSM_WR_MEM_DST_REG, IWL49_RTC_INST_LOWER_BOUND);
 185         iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
 186
 187         /* Load bootstrap code into instruction SRAM now,
 188          *   to prepare to load "initialize" uCode */
 189         iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
 190
 191         /* Wait for load of bootstrap uCode to finish */
 192         for (i = 0; i < 100; i++) {
 193                 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
 194                 if (!(done & BSM_WR_CTRL_REG_BIT_START))
 195                         break;
 196                 udelay(10);
 197         }
 198         if (i < 100)
 199                 IWL_DEBUG_INFO(priv, "BSM write complete, poll %d iterations\n", i);
 200         else {
 201                 IWL_ERR(priv, "BSM write did not complete!\n");
 202                 return -EIO;
 203         }
 204
 205         /* Enable future boot loads whenever power management unit triggers it
 206          *   (e.g. when powering back up after power-save shutdown) */
 207         iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
 208
 209
 210         return 0;
 211 }
 212
 213 /**
 214  * iwl4965_set_ucode_ptrs - Set uCode address location
 215  *
 216  * Tell initialization uCode where to find runtime uCode.
 217  *
 218  * BSM registers initially contain pointers to initialization uCode.
 219  * We need to replace them to load runtime uCode inst and data,
 220  * and to save runtime data when powering down.
 221  */
 222 static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
 223 {
 224         dma_addr_t pinst;
 225         dma_addr_t pdata;
 226         int ret = 0;
 227
 228         /* bits 35:4 for 4965 */
 229         pinst = priv->ucode_code.p_addr >> 4;
 230         pdata = priv->ucode_data_backup.p_addr >> 4;
 231
 232         /* Tell bootstrap uCode where to find image to load */
 233         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
 234         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
 235         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
 236                                  priv->ucode_data.len);
 237
 238         /* Inst byte count must be last to set up, bit 31 signals uCode
 239          *   that all new ptr/size info is in place */
 240         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
 241                                  priv->ucode_code.len | BSM_DRAM_INST_LOAD);
 242         IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
 243
 244         return ret;
 245 }
 246
 247 /**
 248  * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
 249  *
 250  * Called after REPLY_ALIVE notification received from "initialize" uCode.
 251  *
 252  * The 4965 "initialize" ALIVE reply contains calibration data for:
 253  *   Voltage, temperature, and MIMO tx gain correction, now stored in priv
 254  *   (3945 does not contain this data).
 255  *
 256  * Tell "initialize" uCode to go ahead and load the runtime uCode.
 257 */
 258 static void iwl4965_init_alive_start(struct iwl_priv *priv)
 259 {
 260         /* Check alive response for "valid" sign from uCode */
 261         if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
 262                 /* We had an error bringing up the hardware, so take it
 263                  * all the way back down so we can try again */
 264                 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
 265                 goto restart;
 266         }
 267
 268         /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
 269          * This is a paranoid check, because we would not have gotten the
 270          * "initialize" alive if code weren't properly loaded.  */
 271         if (iwl_verify_ucode(priv)) {
 272                 /* Runtime instruction load was bad;
 273                  * take it all the way back down so we can try again */
 274                 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
 275                 goto restart;
 276         }
 277
 278         /* Calculate temperature */
 279         priv->temperature = iwl4965_hw_get_temperature(priv);
 280
 281         /* Send pointers to protocol/runtime uCode image ... init code will
 282          * load and launch runtime uCode, which will send us another "Alive"
 283          * notification. */
 284         IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
 285         if (iwl4965_set_ucode_ptrs(priv)) {
 286                 /* Runtime instruction load won't happen;
 287                  * take it all the way back down so we can try again */
 288                 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
 289                 goto restart;
 290         }
 291         return;
 292
 293 restart:
 294         queue_work(priv->workqueue, &priv->restart);
 295 }
 296
 297 static bool is_ht40_channel(__le32 rxon_flags)
 298 {
 299         int chan_mod = le32_to_cpu(rxon_flags & RXON_FLG_CHANNEL_MODE_MSK)
 300                                     >> RXON_FLG_CHANNEL_MODE_POS;
 301         return ((chan_mod == CHANNEL_MODE_PURE_40) ||
 302                   (chan_mod == CHANNEL_MODE_MIXED));
 303 }
 304
 305 /*
 306  * EEPROM handlers
 307  */
 308 static u16 iwl4965_eeprom_calib_version(struct iwl_priv *priv)
 309 {
 310         return iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
 311 }
 312
 313 /*
 314  * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
 315  * must be called under priv->lock and mac access
 316  */
 317 static void iwl4965_txq_set_sched(struct iwl_priv *priv, u32 mask)
 318 {
 319         iwl_write_prph(priv, IWL49_SCD_TXFACT, mask);
 320 }
 321
 322 static int iwl4965_apm_init(struct iwl_priv *priv)
 323 {
 324         int ret = 0;
 325
 326         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
 327                           CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
 328
 329         /* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */
 330         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
 331                           CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
 332
 333         /* set "initialization complete" bit to move adapter
 334          * D0U* --> D0A* state */
 335         iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 336
 337         /* wait for clock stabilization */
 338         ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
 339                         CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 340                         CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
 341         if (ret < 0) {
 342                 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
 343                 goto out;
 344         }
 345
 346         /* enable DMA */
 347         iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT |
 348                                                 APMG_CLK_VAL_BSM_CLK_RQT);
 349
 350         udelay(20);
 351
 352         /* disable L1-Active */
 353         iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
 354                           APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
 355
 356 out:
 357         return ret;
 358 }
 359
 360
 361 static void iwl4965_nic_config(struct iwl_priv *priv)
 362 {
 363         unsigned long flags;
 364         u16 radio_cfg;
 365         u16 lctl;
 366
 367         spin_lock_irqsave(&priv->lock, flags);
 368
 369         lctl = iwl_pcie_link_ctl(priv);
 370
 371         /* HW bug W/A - negligible power consumption */
 372         /* L1-ASPM is enabled by BIOS */
 373         if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) == PCI_CFG_LINK_CTRL_VAL_L1_EN)
 374                 /* L1-ASPM enabled: disable L0S  */
 375                 iwl_set_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
 376         else
 377                 /* L1-ASPM disabled: enable L0S */
 378                 iwl_clear_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
 379
 380         radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
 381
 382         /* write radio config values to register */
 383         if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
 384                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 385                             EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
 386                             EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
 387                             EEPROM_RF_CFG_DASH_MSK(radio_cfg));
 388
 389         /* set CSR_HW_CONFIG_REG for uCode use */
 390         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 391                     CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
 392                     CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
 393
 394         priv->calib_info = (struct iwl_eeprom_calib_info *)
 395                 iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
 396
 397         spin_unlock_irqrestore(&priv->lock, flags);
 398 }
 399
 400 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
 401  * Called after every association, but this runs only once!
 402  *  ... once chain noise is calibrated the first time, it's good forever.  */
 403 static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
 404 {
 405         struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
 406
 407         if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
 408                 struct iwl_calib_diff_gain_cmd cmd;
 409
 410                 memset(&cmd, 0, sizeof(cmd));
 411                 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
 412                 cmd.diff_gain_a = 0;
 413                 cmd.diff_gain_b = 0;
 414                 cmd.diff_gain_c = 0;
 415                 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
 416                                  sizeof(cmd), &cmd))
 417                         IWL_ERR(priv,
 418                                 "Could not send REPLY_PHY_CALIBRATION_CMD\n");
 419                 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
 420                 IWL_DEBUG_CALIB(priv, "Run chain_noise_calibrate\n");
 421         }
 422 }
 423
 424 static void iwl4965_gain_computation(struct iwl_priv *priv,
 425                 u32 *average_noise,
 426                 u16 min_average_noise_antenna_i,
 427                 u32 min_average_noise,
 428                 u8 default_chain)
 429 {
 430         int i, ret;
 431         struct iwl_chain_noise_data *data = &priv->chain_noise_data;
 432
 433         data->delta_gain_code[min_average_noise_antenna_i] = 0;
 434
 435         for (i = default_chain; i < NUM_RX_CHAINS; i++) {
 436                 s32 delta_g = 0;
 437
 438                 if (!(data->disconn_array[i]) &&
 439                     (data->delta_gain_code[i] ==
 440                              CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
 441                         delta_g = average_noise[i] - min_average_noise;
 442                         data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
 443                         data->delta_gain_code[i] =
 444                                 min(data->delta_gain_code[i],
 445                                 (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
 446
 447                         data->delta_gain_code[i] =
 448                                 (data->delta_gain_code[i] | (1 << 2));
 449                 } else {
 450                         data->delta_gain_code[i] = 0;
 451                 }
 452         }
 453         IWL_DEBUG_CALIB(priv, "delta_gain_codes: a %d b %d c %d\n",
 454                      data->delta_gain_code[0],
 455                      data->delta_gain_code[1],
 456                      data->delta_gain_code[2]);
 457
 458         /* Differential gain gets sent to uCode only once */
 459         if (!data->radio_write) {
 460                 struct iwl_calib_diff_gain_cmd cmd;
 461                 data->radio_write = 1;
 462
 463                 memset(&cmd, 0, sizeof(cmd));
 464                 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
 465                 cmd.diff_gain_a = data->delta_gain_code[0];
 466                 cmd.diff_gain_b = data->delta_gain_code[1];
 467                 cmd.diff_gain_c = data->delta_gain_code[2];
 468                 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
 469                                       sizeof(cmd), &cmd);
 470                 if (ret)
 471                         IWL_DEBUG_CALIB(priv, "fail sending cmd "
 472                                      "REPLY_PHY_CALIBRATION_CMD \n");
 473
 474                 /* TODO we might want recalculate
 475                  * rx_chain in rxon cmd */
 476
 477                 /* Mark so we run this algo only once! */
 478                 data->state = IWL_CHAIN_NOISE_CALIBRATED;
 479         }
 480         data->chain_noise_a = 0;
 481         data->chain_noise_b = 0;
 482         data->chain_noise_c = 0;
 483         data->chain_signal_a = 0;
 484         data->chain_signal_b = 0;
 485         data->chain_signal_c = 0;
 486         data->beacon_count = 0;
 487 }
 488
 489 static void iwl4965_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
 490                         __le32 *tx_flags)
 491 {
 492         if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
 493                 *tx_flags |= TX_CMD_FLG_RTS_MSK;
 494                 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
 495         } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
 496                 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
 497                 *tx_flags |= TX_CMD_FLG_CTS_MSK;
 498         }
 499 }
 500
 501 static void iwl4965_bg_txpower_work(struct work_struct *work)
 502 {
 503         struct iwl_priv *priv = container_of(work, struct iwl_priv,
 504                         txpower_work);
 505
 506         /* If a scan happened to start before we got here
 507          * then just return; the statistics notification will
 508          * kick off another scheduled work to compensate for
 509          * any temperature delta we missed here. */
 510         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
 511             test_bit(STATUS_SCANNING, &priv->status))
 512                 return;
 513
 514         mutex_lock(&priv->mutex);
 515
 516         /* Regardless of if we are associated, we must reconfigure the
 517          * TX power since frames can be sent on non-radar channels while
 518          * not associated */
 519         iwl4965_send_tx_power(priv);
 520
 521         /* Update last_temperature to keep is_calib_needed from running
 522          * when it isn't needed... */
 523         priv->last_temperature = priv->temperature;
 524
 525         mutex_unlock(&priv->mutex);
 526 }
 527
 528 /*
 529  * Acquire priv->lock before calling this function !
 530  */
 531 static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
 532 {
 533         iwl_write_direct32(priv, HBUS_TARG_WRPTR,
 534                              (index & 0xff) | (txq_id << 8));
 535         iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
 536 }
 537
 538 /**
 539  * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
 540  * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
 541  * @scd_retry: (1) Indicates queue will be used in aggregation mode
 542  *
 543  * NOTE:  Acquire priv->lock before calling this function !
 544  */
 545 static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
 546                                         struct iwl_tx_queue *txq,
 547                                         int tx_fifo_id, int scd_retry)
 548 {
 549         int txq_id = txq->q.id;
 550
 551         /* Find out whether to activate Tx queue */
 552         int active = test_bit(txq_id, &priv->txq_ctx_active_msk) ? 1 : 0;
 553
 554         /* Set up and activate */
 555         iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
 556                          (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
 557                          (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
 558                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
 559                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
 560                          IWL49_SCD_QUEUE_STTS_REG_MSK);
 561
 562         txq->sched_retry = scd_retry;
 563
 564         IWL_DEBUG_INFO(priv, "%s %s Queue %d on AC %d\n",
 565                        active ? "Activate" : "Deactivate",
 566                        scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
 567 }
 568
 569 static const u16 default_queue_to_tx_fifo[] = {
 570         IWL_TX_FIFO_AC3,
 571         IWL_TX_FIFO_AC2,
 572         IWL_TX_FIFO_AC1,
 573         IWL_TX_FIFO_AC0,
 574         IWL49_CMD_FIFO_NUM,
 575         IWL_TX_FIFO_HCCA_1,
 576         IWL_TX_FIFO_HCCA_2
 577 };
 578
 579 static int iwl4965_alive_notify(struct iwl_priv *priv)
 580 {
 581         u32 a;
 582         unsigned long flags;
 583         int i, chan;
 584         u32 reg_val;
 585
 586         spin_lock_irqsave(&priv->lock, flags);
 587
 588         /* Clear 4965's internal Tx Scheduler data base */
 589         priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
 590         a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
 591         for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
 592                 iwl_write_targ_mem(priv, a, 0);
 593         for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
 594                 iwl_write_targ_mem(priv, a, 0);
 595         for (; a < priv->scd_base_addr +
 596                IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(priv->hw_params.max_txq_num); a += 4)
 597                 iwl_write_targ_mem(priv, a, 0);
 598
 599         /* Tel 4965 where to find Tx byte count tables */
 600         iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
 601                         priv->scd_bc_tbls.dma >> 10);
 602
 603         /* Enable DMA channel */
 604         for (chan = 0; chan < FH49_TCSR_CHNL_NUM ; chan++)
 605                 iwl_write_direct32(priv, FH_TCSR_CHNL_TX_CONFIG_REG(chan),
 606                                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
 607                                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
 608
 609         /* Update FH chicken bits */
 610         reg_val = iwl_read_direct32(priv, FH_TX_CHICKEN_BITS_REG);
 611         iwl_write_direct32(priv, FH_TX_CHICKEN_BITS_REG,
 612                            reg_val | FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);
 613
 614         /* Disable chain mode for all queues */
 615         iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
 616
 617         /* Initialize each Tx queue (including the command queue) */
 618         for (i = 0; i < priv->hw_params.max_txq_num; i++) {
 619
 620                 /* TFD circular buffer read/write indexes */
 621                 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
 622                 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
 623
 624                 /* Max Tx Window size for Scheduler-ACK mode */
 625                 iwl_write_targ_mem(priv, priv->scd_base_addr +
 626                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
 627                                 (SCD_WIN_SIZE <<
 628                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
 629                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
 630
 631                 /* Frame limit */
 632                 iwl_write_targ_mem(priv, priv->scd_base_addr +
 633                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
 634                                 sizeof(u32),
 635                                 (SCD_FRAME_LIMIT <<
 636                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
 637                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
 638
 639         }
 640         iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
 641                                  (1 << priv->hw_params.max_txq_num) - 1);
 642
 643         /* Activate all Tx DMA/FIFO channels */
 644         priv->cfg->ops->lib->txq_set_sched(priv, IWL_MASK(0, 6));
 645
 646         iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
 647
 648         /* Map each Tx/cmd queue to its corresponding fifo */
 649         for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
 650                 int ac = default_queue_to_tx_fifo[i];
 651                 iwl_txq_ctx_activate(priv, i);
 652                 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
 653         }
 654
 655         spin_unlock_irqrestore(&priv->lock, flags);
 656
 657         return 0;
 658 }
 659
 660 static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
 661         .min_nrg_cck = 97,
 662         .max_nrg_cck = 0, /* not used, set to 0 */
 663
 664         .auto_corr_min_ofdm = 85,
 665         .auto_corr_min_ofdm_mrc = 170,
 666         .auto_corr_min_ofdm_x1 = 105,
 667         .auto_corr_min_ofdm_mrc_x1 = 220,
 668
 669         .auto_corr_max_ofdm = 120,
 670         .auto_corr_max_ofdm_mrc = 210,
 671         .auto_corr_max_ofdm_x1 = 140,
 672         .auto_corr_max_ofdm_mrc_x1 = 270,
 673
 674         .auto_corr_min_cck = 125,
 675         .auto_corr_max_cck = 200,
 676         .auto_corr_min_cck_mrc = 200,
 677         .auto_corr_max_cck_mrc = 400,
 678
 679         .nrg_th_cck = 100,
 680         .nrg_th_ofdm = 100,
 681
 682         .barker_corr_th_min = 190,
 683         .barker_corr_th_min_mrc = 390,
 684         .nrg_th_cca = 62,
 685 };
 686
 687 static void iwl4965_set_ct_threshold(struct iwl_priv *priv)
 688 {
 689         /* want Kelvin */
 690         priv->hw_params.ct_kill_threshold =
 691                 CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD_LEGACY);
 692 }
 693
 694 /**
 695  * iwl4965_hw_set_hw_params
 696  *
 697  * Called when initializing driver
 698  */
 699 static int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
 700 {
 701
 702         if ((priv->cfg->mod_params->num_of_queues > IWL49_NUM_QUEUES) ||
 703             (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) {
 704                 IWL_ERR(priv,
 705                         "invalid queues_num, should be between %d and %d\n",
 706                         IWL_MIN_NUM_QUEUES, IWL49_NUM_QUEUES);
 707                 return -EINVAL;
 708         }
 709
 710         priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues;
 711         priv->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM;
 712         priv->hw_params.scd_bc_tbls_size =
 713                         IWL49_NUM_QUEUES * sizeof(struct iwl4965_scd_bc_tbl);
 714         priv->hw_params.tfd_size = sizeof(struct iwl_tfd);
 715         priv->hw_params.max_stations = IWL4965_STATION_COUNT;
 716         priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
 717         priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
 718         priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
 719         priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
 720         priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_5GHZ);
 721
 722         priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR;
 723
 724         priv->hw_params.tx_chains_num = 2;
 725         priv->hw_params.rx_chains_num = 2;
 726         priv->hw_params.valid_tx_ant = ANT_A | ANT_B;
 727         priv->hw_params.valid_rx_ant = ANT_A | ANT_B;
 728         if (priv->cfg->ops->lib->temp_ops.set_ct_kill)
 729                 priv->cfg->ops->lib->temp_ops.set_ct_kill(priv);
 730
 731         priv->hw_params.sens = &iwl4965_sensitivity;
 732
 733         return 0;
 734 }
 735
 736 static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
 737 {
 738         s32 sign = 1;
 739
 740         if (num < 0) {
 741                 sign = -sign;
 742                 num = -num;
 743         }
 744         if (denom < 0) {
 745                 sign = -sign;
 746                 denom = -denom;
 747         }
 748         *res = 1;
 749         *res = ((num * 2 + denom) / (denom * 2)) * sign;
 750
 751         return 1;
 752 }
 753
 754 /**
 755  * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
 756  *
 757  * Determines power supply voltage compensation for txpower calculations.
 758  * Returns number of 1/2-dB steps to subtract from gain table index,
 759  * to compensate for difference between power supply voltage during
 760  * factory measurements, vs. current power supply voltage.
 761  *
 762  * Voltage indication is higher for lower voltage.
 763  * Lower voltage requires more gain (lower gain table index).
 764  */
 765 static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
 766                                             s32 current_voltage)
 767 {
 768         s32 comp = 0;
 769
 770         if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
 771             (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
 772                 return 0;
 773
 774         iwl4965_math_div_round(current_voltage - eeprom_voltage,
 775                                TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
 776
 777         if (current_voltage > eeprom_voltage)
 778                 comp *= 2;
 779         if ((comp < -2) || (comp > 2))
 780                 comp = 0;
 781
 782         return comp;
 783 }
 784
 785 static s32 iwl4965_get_tx_atten_grp(u16 channel)
 786 {
 787         if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
 788             channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
 789                 return CALIB_CH_GROUP_5;
 790
 791         if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
 792             channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
 793                 return CALIB_CH_GROUP_1;
 794
 795         if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
 796             channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
 797                 return CALIB_CH_GROUP_2;
 798
 799         if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
 800             channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
 801                 return CALIB_CH_GROUP_3;
 802
 803         if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
 804             channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
 805                 return CALIB_CH_GROUP_4;
 806
 807         return -1;
 808 }
 809
 810 static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
 811 {
 812         s32 b = -1;
 813
 814         for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
 815                 if (priv->calib_info->band_info[b].ch_from == 0)
 816                         continue;
 817
 818                 if ((channel >= priv->calib_info->band_info[b].ch_from)
 819                     && (channel <= priv->calib_info->band_info[b].ch_to))
 820                         break;
 821         }
 822
 823         return b;
 824 }
 825
 826 static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
 827 {
 828         s32 val;
 829
 830         if (x2 == x1)
 831                 return y1;
 832         else {
 833                 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
 834                 return val + y2;
 835         }
 836 }
 837
 838 /**
 839  * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
 840  *
 841  * Interpolates factory measurements from the two sample channels within a
 842  * sub-band, to apply to channel of interest.  Interpolation is proportional to
 843  * differences in channel frequencies, which is proportional to differences
 844  * in channel number.
 845  */
 846 static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
 847                                     struct iwl_eeprom_calib_ch_info *chan_info)
 848 {
 849         s32 s = -1;
 850         u32 c;
 851         u32 m;
 852         const struct iwl_eeprom_calib_measure *m1;
 853         const struct iwl_eeprom_calib_measure *m2;
 854         struct iwl_eeprom_calib_measure *omeas;
 855         u32 ch_i1;
 856         u32 ch_i2;
 857
 858         s = iwl4965_get_sub_band(priv, channel);
 859         if (s >= EEPROM_TX_POWER_BANDS) {
 860                 IWL_ERR(priv, "Tx Power can not find channel %d\n", channel);
 861                 return -1;
 862         }
 863
 864         ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
 865         ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
 866         chan_info->ch_num = (u8) channel;
 867
 868         IWL_DEBUG_TXPOWER(priv, "channel %d subband %d factory cal ch %d & %d\n",
 869                           channel, s, ch_i1, ch_i2);
 870
 871         for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
 872                 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
 873                         m1 = &(priv->calib_info->band_info[s].ch1.
 874                                measurements[c][m]);
 875                         m2 = &(priv->calib_info->band_info[s].ch2.
 876                                measurements[c][m]);
 877                         omeas = &(chan_info->measurements[c][m]);
 878
 879                         omeas->actual_pow =
 880                             (u8) iwl4965_interpolate_value(channel, ch_i1,
 881                                                            m1->actual_pow,
 882                                                            ch_i2,
 883                                                            m2->actual_pow);
 884                         omeas->gain_idx =
 885                             (u8) iwl4965_interpolate_value(channel, ch_i1,
 886                                                            m1->gain_idx, ch_i2,
 887                                                            m2->gain_idx);
 888                         omeas->temperature =
 889                             (u8) iwl4965_interpolate_value(channel, ch_i1,
 890                                                            m1->temperature,
 891                                                            ch_i2,
 892                                                            m2->temperature);
 893                         omeas->pa_det =
 894                             (s8) iwl4965_interpolate_value(channel, ch_i1,
 895                                                            m1->pa_det, ch_i2,
 896                                                            m2->pa_det);
 897
 898                         IWL_DEBUG_TXPOWER(priv,
 899                                 "chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
 900                                 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
 901                         IWL_DEBUG_TXPOWER(priv,
 902                                 "chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
 903                                 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
 904                         IWL_DEBUG_TXPOWER(priv,
 905                                 "chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
 906                                 m1->pa_det, m2->pa_det, omeas->pa_det);
 907                         IWL_DEBUG_TXPOWER(priv,
 908                                 "chain %d meas %d  T1=%d  T2=%d  T=%d\n", c, m,
 909                                 m1->temperature, m2->temperature,
 910                                 omeas->temperature);
 911                 }
 912         }
 913
 914         return 0;
 915 }
 916
 917 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
 918  * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
 919 static s32 back_off_table[] = {
 920         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
 921         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
 922         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
 923         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
 924         10                      /* CCK */
 925 };
 926
 927 /* Thermal compensation values for txpower for various frequency ranges ...
 928  *   ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
 929 static struct iwl4965_txpower_comp_entry {
 930         s32 degrees_per_05db_a;
 931         s32 degrees_per_05db_a_denom;
 932 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
 933         {9, 2},                 /* group 0 5.2, ch  34-43 */
 934         {4, 1},                 /* group 1 5.2, ch  44-70 */
 935         {4, 1},                 /* group 2 5.2, ch  71-124 */
 936         {4, 1},                 /* group 3 5.2, ch 125-200 */
 937         {3, 1}                  /* group 4 2.4, ch   all */
 938 };
 939
 940 static s32 get_min_power_index(s32 rate_power_index, u32 band)
 941 {
 942         if (!band) {
 943                 if ((rate_power_index & 7) <= 4)
 944                         return MIN_TX_GAIN_INDEX_52GHZ_EXT;
 945         }
 946         return MIN_TX_GAIN_INDEX;
 947 }
 948
 949 struct gain_entry {
 950         u8 dsp;
 951         u8 radio;
 952 };
 953
 954 static const struct gain_entry gain_table[2][108] = {
 955         /* 5.2GHz power gain index table */
 956         {
 957          {123, 0x3F},           /* highest txpower */
 958          {117, 0x3F},
 959          {110, 0x3F},
 960          {104, 0x3F},
 961          {98, 0x3F},
 962          {110, 0x3E},
 963          {104, 0x3E},
 964          {98, 0x3E},
 965          {110, 0x3D},
 966          {104, 0x3D},
 967          {98, 0x3D},
 968          {110, 0x3C},
 969          {104, 0x3C},
 970          {98, 0x3C},
 971          {110, 0x3B},
 972          {104, 0x3B},
 973          {98, 0x3B},
 974          {110, 0x3A},
 975          {104, 0x3A},
 976          {98, 0x3A},
 977          {110, 0x39},
 978          {104, 0x39},
 979          {98, 0x39},
 980          {110, 0x38},
 981          {104, 0x38},
 982          {98, 0x38},
 983          {110, 0x37},
 984          {104, 0x37},
 985          {98, 0x37},
 986          {110, 0x36},
 987          {104, 0x36},
 988          {98, 0x36},
 989          {110, 0x35},
 990          {104, 0x35},
 991          {98, 0x35},
 992          {110, 0x34},
 993          {104, 0x34},
 994          {98, 0x34},
 995          {110, 0x33},
 996          {104, 0x33},
 997          {98, 0x33},
 998          {110, 0x32},
 999          {104, 0x32},
1000          {98, 0x32},
1001          {110, 0x31},
1002          {104, 0x31},
1003          {98, 0x31},
1004          {110, 0x30},
1005          {104, 0x30},
1006          {98, 0x30},
1007          {110, 0x25},
1008          {104, 0x25},
1009          {98, 0x25},
1010          {110, 0x24},
1011          {104, 0x24},
1012          {98, 0x24},
1013          {110, 0x23},
1014          {104, 0x23},
1015          {98, 0x23},
1016          {110, 0x22},
1017          {104, 0x18},
1018          {98, 0x18},
1019          {110, 0x17},
1020          {104, 0x17},
1021          {98, 0x17},
1022          {110, 0x16},
1023          {104, 0x16},
1024          {98, 0x16},
1025          {110, 0x15},
1026          {104, 0x15},
1027          {98, 0x15},
1028          {110, 0x14},
1029          {104, 0x14},
1030          {98, 0x14},
1031          {110, 0x13},
1032          {104, 0x13},
1033          {98, 0x13},
1034          {110, 0x12},
1035          {104, 0x08},
1036          {98, 0x08},
1037          {110, 0x07},
1038          {104, 0x07},
1039          {98, 0x07},
1040          {110, 0x06},
1041          {104, 0x06},
1042          {98, 0x06},
1043          {110, 0x05},
1044          {104, 0x05},
1045          {98, 0x05},
1046          {110, 0x04},
1047          {104, 0x04},
1048          {98, 0x04},
1049          {110, 0x03},
1050          {104, 0x03},
1051          {98, 0x03},
1052          {110, 0x02},
1053          {104, 0x02},
1054          {98, 0x02},
1055          {110, 0x01},
1056          {104, 0x01},
1057          {98, 0x01},
1058          {110, 0x00},
1059          {104, 0x00},
1060          {98, 0x00},
1061          {93, 0x00},
1062          {88, 0x00},
1063          {83, 0x00},
1064          {78, 0x00},
1065          },
1066         /* 2.4GHz power gain index table */
1067         {
1068          {110, 0x3f},           /* highest txpower */
1069          {104, 0x3f},
1070          {98, 0x3f},
1071          {110, 0x3e},
1072          {104, 0x3e},
1073          {98, 0x3e},
1074          {110, 0x3d},
1075          {104, 0x3d},
1076          {98, 0x3d},
1077          {110, 0x3c},
1078          {104, 0x3c},
1079          {98, 0x3c},
1080          {110, 0x3b},
1081          {104, 0x3b},
1082          {98, 0x3b},
1083          {110, 0x3a},
1084          {104, 0x3a},
1085          {98, 0x3a},
1086          {110, 0x39},
1087          {104, 0x39},
1088          {98, 0x39},
1089          {110, 0x38},
1090          {104, 0x38},
1091          {98, 0x38},
1092          {110, 0x37},
1093          {104, 0x37},
1094          {98, 0x37},
1095          {110, 0x36},
1096          {104, 0x36},
1097          {98, 0x36},
1098          {110, 0x35},
1099          {104, 0x35},
1100          {98, 0x35},
1101          {110, 0x34},
1102          {104, 0x34},
1103          {98, 0x34},
1104          {110, 0x33},
1105          {104, 0x33},
1106          {98, 0x33},
1107          {110, 0x32},
1108          {104, 0x32},
1109          {98, 0x32},
1110          {110, 0x31},
1111          {104, 0x31},
1112          {98, 0x31},
1113          {110, 0x30},
1114          {104, 0x30},
1115          {98, 0x30},
1116          {110, 0x6},
1117          {104, 0x6},
1118          {98, 0x6},
1119          {110, 0x5},
1120          {104, 0x5},
1121          {98, 0x5},
1122          {110, 0x4},
1123          {104, 0x4},
1124          {98, 0x4},
1125          {110, 0x3},
1126          {104, 0x3},
1127          {98, 0x3},
1128          {110, 0x2},
1129          {104, 0x2},
1130          {98, 0x2},
1131          {110, 0x1},
1132          {104, 0x1},
1133          {98, 0x1},
1134          {110, 0x0},
1135          {104, 0x0},
1136          {98, 0x0},
1137          {97, 0},
1138          {96, 0},
1139          {95, 0},
1140          {94, 0},
1141          {93, 0},
1142          {92, 0},
1143          {91, 0},
1144          {90, 0},
1145          {89, 0},
1146          {88, 0},
1147          {87, 0},
1148          {86, 0},
1149          {85, 0},
1150          {84, 0},
1151          {83, 0},
1152          {82, 0},
1153          {81, 0},
1154          {80, 0},
1155          {79, 0},
1156          {78, 0},
1157          {77, 0},
1158          {76, 0},
1159          {75, 0},
1160          {74, 0},
1161          {73, 0},
1162          {72, 0},
1163          {71, 0},
1164          {70, 0},
1165          {69, 0},
1166          {68, 0},
1167          {67, 0},
1168          {66, 0},
1169          {65, 0},
1170          {64, 0},
1171          {63, 0},
1172          {62, 0},
1173          {61, 0},
1174          {60, 0},
1175          {59, 0},
1176          }
1177 };
1178
1179 static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
1180                                     u8 is_ht40, u8 ctrl_chan_high,
1181                                     struct iwl4965_tx_power_db *tx_power_tbl)
1182 {
1183         u8 saturation_power;
1184         s32 target_power;
1185         s32 user_target_power;
1186         s32 power_limit;
1187         s32 current_temp;
1188         s32 reg_limit;
1189         s32 current_regulatory;
1190         s32 txatten_grp = CALIB_CH_GROUP_MAX;
1191         int i;
1192         int c;
1193         const struct iwl_channel_info *ch_info = NULL;
1194         struct iwl_eeprom_calib_ch_info ch_eeprom_info;
1195         const struct iwl_eeprom_calib_measure *measurement;
1196         s16 voltage;
1197         s32 init_voltage;
1198         s32 voltage_compensation;
1199         s32 degrees_per_05db_num;
1200         s32 degrees_per_05db_denom;
1201         s32 factory_temp;
1202         s32 temperature_comp[2];
1203         s32 factory_gain_index[2];
1204         s32 factory_actual_pwr[2];
1205         s32 power_index;
1206
1207         /* tx_power_user_lmt is in dBm, convert to half-dBm (half-dB units
1208          *   are used for indexing into txpower table) */
1209         user_target_power = 2 * priv->tx_power_user_lmt;
1210
1211         /* Get current (RXON) channel, band, width */
1212         IWL_DEBUG_TXPOWER(priv, "chan %d band %d is_ht40 %d\n", channel, band,
1213                           is_ht40);
1214
1215         ch_info = iwl_get_channel_info(priv, priv->band, channel);
1216
1217         if (!is_channel_valid(ch_info))
1218                 return -EINVAL;
1219
1220         /* get txatten group, used to select 1) thermal txpower adjustment
1221          *   and 2) mimo txpower balance between Tx chains. */
1222         txatten_grp = iwl4965_get_tx_atten_grp(channel);
1223         if (txatten_grp < 0) {
1224                 IWL_ERR(priv, "Can't find txatten group for channel %d.\n",
1225                           channel);
1226                 return -EINVAL;
1227         }
1228
1229         IWL_DEBUG_TXPOWER(priv, "channel %d belongs to txatten group %d\n",
1230                           channel, txatten_grp);
1231
1232         if (is_ht40) {
1233                 if (ctrl_chan_high)
1234                         channel -= 2;
1235                 else
1236                         channel += 2;
1237         }
1238
1239         /* hardware txpower limits ...
1240          * saturation (clipping distortion) txpowers are in half-dBm */
1241         if (band)
1242                 saturation_power = priv->calib_info->saturation_power24;
1243         else
1244                 saturation_power = priv->calib_info->saturation_power52;
1245
1246         if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
1247             saturation_power > IWL_TX_POWER_SATURATION_MAX) {
1248                 if (band)
1249                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
1250                 else
1251                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
1252         }
1253
1254         /* regulatory txpower limits ... reg_limit values are in half-dBm,
1255          *   max_power_avg values are in dBm, convert * 2 */
1256         if (is_ht40)
1257                 reg_limit = ch_info->ht40_max_power_avg * 2;
1258         else
1259                 reg_limit = ch_info->max_power_avg * 2;
1260
1261         if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
1262             (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
1263                 if (band)
1264                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
1265                 else
1266                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
1267         }
1268
1269         /* Interpolate txpower calibration values for this channel,
1270          *   based on factory calibration tests on spaced channels. */
1271         iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1272
1273         /* calculate tx gain adjustment based on power supply voltage */
1274         voltage = priv->calib_info->voltage;
1275         init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1276         voltage_compensation =
1277             iwl4965_get_voltage_compensation(voltage, init_voltage);
1278
1279         IWL_DEBUG_TXPOWER(priv, "curr volt %d eeprom volt %d volt comp %d\n",
1280                           init_voltage,
1281                           voltage, voltage_compensation);
1282
1283         /* get current temperature (Celsius) */
1284         current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
1285         current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
1286         current_temp = KELVIN_TO_CELSIUS(current_temp);
1287
1288         /* select thermal txpower adjustment params, based on channel group
1289          *   (same frequency group used for mimo txatten adjustment) */
1290         degrees_per_05db_num =
1291             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1292         degrees_per_05db_denom =
1293             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1294
1295         /* get per-chain txpower values from factory measurements */
1296         for (c = 0; c < 2; c++) {
1297                 measurement = &ch_eeprom_info.measurements[c][1];
1298
1299                 /* txgain adjustment (in half-dB steps) based on difference
1300                  *   between factory and current temperature */
1301                 factory_temp = measurement->temperature;
1302                 iwl4965_math_div_round((current_temp - factory_temp) *
1303                                        degrees_per_05db_denom,
1304                                        degrees_per_05db_num,
1305                                        &temperature_comp[c]);
1306
1307                 factory_gain_index[c] = measurement->gain_idx;
1308                 factory_actual_pwr[c] = measurement->actual_pow;
1309
1310                 IWL_DEBUG_TXPOWER(priv, "chain = %d\n", c);
1311                 IWL_DEBUG_TXPOWER(priv, "fctry tmp %d, "
1312                                   "curr tmp %d, comp %d steps\n",
1313                                   factory_temp, current_temp,
1314                                   temperature_comp[c]);
1315
1316                 IWL_DEBUG_TXPOWER(priv, "fctry idx %d, fctry pwr %d\n",
1317                                   factory_gain_index[c],
1318                                   factory_actual_pwr[c]);
1319         }
1320
1321         /* for each of 33 bit-rates (including 1 for CCK) */
1322         for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
1323                 u8 is_mimo_rate;
1324                 union iwl4965_tx_power_dual_stream tx_power;
1325
1326                 /* for mimo, reduce each chain's txpower by half
1327                  * (3dB, 6 steps), so total output power is regulatory
1328                  * compliant. */
1329                 if (i & 0x8) {
1330                         current_regulatory = reg_limit -
1331                             IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1332                         is_mimo_rate = 1;
1333                 } else {
1334                         current_regulatory = reg_limit;
1335                         is_mimo_rate = 0;
1336                 }
1337
1338                 /* find txpower limit, either hardware or regulatory */
1339                 power_limit = saturation_power - back_off_table[i];
1340                 if (power_limit > current_regulatory)
1341                         power_limit = current_regulatory;
1342
1343                 /* reduce user's txpower request if necessary
1344                  * for this rate on this channel */
1345                 target_power = user_target_power;
1346                 if (target_power > power_limit)
1347                         target_power = power_limit;
1348
1349                 IWL_DEBUG_TXPOWER(priv, "rate %d sat %d reg %d usr %d tgt %d\n",
1350                                   i, saturation_power - back_off_table[i],
1351                                   current_regulatory, user_target_power,
1352                                   target_power);
1353
1354                 /* for each of 2 Tx chains (radio transmitters) */
1355                 for (c = 0; c < 2; c++) {
1356                         s32 atten_value;
1357
1358                         if (is_mimo_rate)
1359                                 atten_value =
1360                                     (s32)le32_to_cpu(priv->card_alive_init.
1361                                     tx_atten[txatten_grp][c]);
1362                         else
1363                                 atten_value = 0;
1364
1365                         /* calculate index; higher index means lower txpower */
1366                         power_index = (u8) (factory_gain_index[c] -
1367                                             (target_power -
1368                                              factory_actual_pwr[c]) -
1369                                             temperature_comp[c] -
1370                                             voltage_compensation +
1371                                             atten_value);
1372
1373 /*                      IWL_DEBUG_TXPOWER(priv, "calculated txpower index %d\n",
1374                                                 power_index); */
1375
1376                         if (power_index < get_min_power_index(i, band))
1377                                 power_index = get_min_power_index(i, band);
1378
1379                         /* adjust 5 GHz index to support negative indexes */
1380                         if (!band)
1381                                 power_index += 9;
1382
1383                         /* CCK, rate 32, reduce txpower for CCK */
1384                         if (i == POWER_TABLE_CCK_ENTRY)
1385                                 power_index +=
1386                                     IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
1387
1388                         /* stay within the table! */
1389                         if (power_index > 107) {
1390                                 IWL_WARN(priv, "txpower index %d > 107\n",
1391                                             power_index);
1392                                 power_index = 107;
1393                         }
1394                         if (power_index < 0) {
1395                                 IWL_WARN(priv, "txpower index %d < 0\n",
1396                                             power_index);
1397                                 power_index = 0;
1398                         }
1399
1400                         /* fill txpower command for this rate/chain */
1401                         tx_power.s.radio_tx_gain[c] =
1402                                 gain_table[band][power_index].radio;
1403                         tx_power.s.dsp_predis_atten[c] =
1404                                 gain_table[band][power_index].dsp;
1405
1406                         IWL_DEBUG_TXPOWER(priv, "chain %d mimo %d index %d "
1407                                           "gain 0x%02x dsp %d\n",
1408                                           c, atten_value, power_index,
1409                                         tx_power.s.radio_tx_gain[c],
1410                                         tx_power.s.dsp_predis_atten[c]);
1411                 } /* for each chain */
1412
1413                 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1414
1415         } /* for each rate */
1416
1417         return 0;
1418 }
1419
1420 /**
1421  * iwl4965_send_tx_power - Configure the TXPOWER level user limit
1422  *
1423  * Uses the active RXON for channel, band, and characteristics (ht40, high)
1424  * The power limit is taken from priv->tx_power_user_lmt.
1425  */
1426 static int iwl4965_send_tx_power(struct iwl_priv *priv)
1427 {
1428         struct iwl4965_txpowertable_cmd cmd = { 0 };
1429         int ret;
1430         u8 band = 0;
1431         bool is_ht40 = false;
1432         u8 ctrl_chan_high = 0;
1433
1434         if (test_bit(STATUS_SCANNING, &priv->status)) {
1435                 /* If this gets hit a lot, switch it to a BUG() and catch
1436                  * the stack trace to find out who is calling this during
1437                  * a scan. */
1438                 IWL_WARN(priv, "TX Power requested while scanning!\n");
1439                 return -EAGAIN;
1440         }
1441
1442         band = priv->band == IEEE80211_BAND_2GHZ;
1443
1444         is_ht40 =  is_ht40_channel(priv->active_rxon.flags);
1445
1446         if (is_ht40 &&
1447             (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1448                 ctrl_chan_high = 1;
1449
1450         cmd.band = band;
1451         cmd.channel = priv->active_rxon.channel;
1452
1453         ret = iwl4965_fill_txpower_tbl(priv, band,
1454                                 le16_to_cpu(priv->active_rxon.channel),
1455                                 is_ht40, ctrl_chan_high, &cmd.tx_power);
1456         if (ret)
1457                 goto out;
1458
1459         ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
1460
1461 out:
1462         return ret;
1463 }
1464
1465 static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
1466 {
1467         int ret = 0;
1468         struct iwl4965_rxon_assoc_cmd rxon_assoc;
1469         const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
1470         const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
1471
1472         if ((rxon1->flags == rxon2->flags) &&
1473             (rxon1->filter_flags == rxon2->filter_flags) &&
1474             (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1475             (rxon1->ofdm_ht_single_stream_basic_rates ==
1476              rxon2->ofdm_ht_single_stream_basic_rates) &&
1477             (rxon1->ofdm_ht_dual_stream_basic_rates ==
1478              rxon2->ofdm_ht_dual_stream_basic_rates) &&
1479             (rxon1->rx_chain == rxon2->rx_chain) &&
1480             (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1481                 IWL_DEBUG_INFO(priv, "Using current RXON_ASSOC.  Not resending.\n");
1482                 return 0;
1483         }
1484
1485         rxon_assoc.flags = priv->staging_rxon.flags;
1486         rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1487         rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1488         rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1489         rxon_assoc.reserved = 0;
1490         rxon_assoc.ofdm_ht_single_stream_basic_rates =
1491             priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1492         rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1493             priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1494         rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1495
1496         ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
1497                                      sizeof(rxon_assoc), &rxon_assoc, NULL);
1498         if (ret)
1499                 return ret;
1500
1501         return ret;
1502 }
1503
1504 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
1505 static int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1506 {
1507         int rc;
1508         u8 band = 0;
1509         bool is_ht40 = false;
1510         u8 ctrl_chan_high = 0;
1511         struct iwl4965_channel_switch_cmd cmd = { 0 };
1512         const struct iwl_channel_info *ch_info;
1513
1514         band = priv->band == IEEE80211_BAND_2GHZ;
1515
1516         ch_info = iwl_get_channel_info(priv, priv->band, channel);
1517
1518         is_ht40 = is_ht40_channel(priv->staging_rxon.flags);
1519
1520         if (is_ht40 &&
1521             (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1522                 ctrl_chan_high = 1;
1523
1524         cmd.band = band;
1525         cmd.expect_beacon = 0;
1526         cmd.channel = cpu_to_le16(channel);
1527         cmd.rxon_flags = priv->active_rxon.flags;
1528         cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
1529         cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1530         if (ch_info)
1531                 cmd.expect_beacon = is_channel_radar(ch_info);
1532         else
1533                 cmd.expect_beacon = 1;
1534
1535         rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_ht40,
1536                                       ctrl_chan_high, &cmd.tx_power);
1537         if (rc) {
1538                 IWL_DEBUG_11H(priv, "error:%d  fill txpower_tbl\n", rc);
1539                 return rc;
1540         }
1541
1542         rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1543         return rc;
1544 }
1545 #endif
1546
1547 /**
1548  * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1549  */
1550 static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
1551                                             struct iwl_tx_queue *txq,
1552                                             u16 byte_cnt)
1553 {
1554         struct iwl4965_scd_bc_tbl *scd_bc_tbl = priv->scd_bc_tbls.addr;
1555         int txq_id = txq->q.id;
1556         int write_ptr = txq->q.write_ptr;
1557         int len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
1558         __le16 bc_ent;
1559
1560         WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
1561
1562         bc_ent = cpu_to_le16(len & 0xFFF);
1563         /* Set up byte count within first 256 entries */
1564         scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent;
1565
1566         /* If within first 64 entries, duplicate at end */
1567         if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
1568                 scd_bc_tbl[txq_id].
1569                         tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent;
1570 }
1571
1572 /**
1573  * sign_extend - Sign extend a value using specified bit as sign-bit
1574  *
1575  * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
1576  * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
1577  *
1578  * @param oper value to sign extend
1579  * @param index 0 based bit index (0<=index<32) to sign bit
1580  */
1581 static s32 sign_extend(u32 oper, int index)
1582 {
1583         u8 shift = 31 - index;
1584
1585         return (s32)(oper << shift) >> shift;
1586 }
1587
1588 /**
1589  * iwl4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
1590  * @statistics: Provides the temperature reading from the uCode
1591  *
1592  * A return of <0 indicates bogus data in the statistics
1593  */
1594 static int iwl4965_hw_get_temperature(struct iwl_priv *priv)
1595 {
1596         s32 temperature;
1597         s32 vt;
1598         s32 R1, R2, R3;
1599         u32 R4;
1600
1601         if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
1602                 (priv->statistics.flag & STATISTICS_REPLY_FLG_HT40_MODE_MSK)) {
1603                 IWL_DEBUG_TEMP(priv, "Running HT40 temperature calibration\n");
1604                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
1605                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
1606                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
1607                 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
1608         } else {
1609                 IWL_DEBUG_TEMP(priv, "Running temperature calibration\n");
1610                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
1611                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
1612                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
1613                 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
1614         }
1615
1616         /*
1617          * Temperature is only 23 bits, so sign extend out to 32.
1618          *
1619          * NOTE If we haven't received a statistics notification yet
1620          * with an updated temperature, use R4 provided to us in the
1621          * "initialize" ALIVE response.
1622          */
1623         if (!test_bit(STATUS_TEMPERATURE, &priv->status))
1624                 vt = sign_extend(R4, 23);
1625         else
1626                 vt = sign_extend(
1627                         le32_to_cpu(priv->statistics.general.temperature), 23);
1628
1629         IWL_DEBUG_TEMP(priv, "Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
1630
1631         if (R3 == R1) {
1632                 IWL_ERR(priv, "Calibration conflict R1 == R3\n");
1633                 return -1;
1634         }
1635
1636         /* Calculate temperature in degrees Kelvin, adjust by 97%.
1637          * Add offset to center the adjustment around 0 degrees Centigrade. */
1638         temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
1639         temperature /= (R3 - R1);
1640         temperature = (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET;
1641
1642         IWL_DEBUG_TEMP(priv, "Calibrated temperature: %dK, %dC\n",
1643                         temperature, KELVIN_TO_CELSIUS(temperature));
1644
1645         return temperature;
1646 }
1647
1648 /* Adjust Txpower only if temperature variance is greater than threshold. */
1649 #define IWL_TEMPERATURE_THRESHOLD   3
1650
1651 /**
1652  * iwl4965_is_temp_calib_needed - determines if new calibration is needed
1653  *
1654  * If the temperature changed has changed sufficiently, then a recalibration
1655  * is needed.
1656  *
1657  * Assumes caller will replace priv->last_temperature once calibration
1658  * executed.
1659  */
1660 static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
1661 {
1662         int temp_diff;
1663
1664         if (!test_bit(STATUS_STATISTICS, &priv->status)) {
1665                 IWL_DEBUG_TEMP(priv, "Temperature not updated -- no statistics.\n");
1666                 return 0;
1667         }
1668
1669         temp_diff = priv->temperature - priv->last_temperature;
1670
1671         /* get absolute value */
1672         if (temp_diff < 0) {
1673                 IWL_DEBUG_POWER(priv, "Getting cooler, delta %d, \n", temp_diff);
1674                 temp_diff = -temp_diff;
1675         } else if (temp_diff == 0)
1676                 IWL_DEBUG_POWER(priv, "Same temp, \n");
1677         else
1678                 IWL_DEBUG_POWER(priv, "Getting warmer, delta %d, \n", temp_diff);
1679
1680         if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
1681                 IWL_DEBUG_POWER(priv, "Thermal txpower calib not needed\n");
1682                 return 0;
1683         }
1684
1685         IWL_DEBUG_POWER(priv, "Thermal txpower calib needed\n");
1686
1687         return 1;
1688 }
1689
1690 static void iwl4965_temperature_calib(struct iwl_priv *priv)
1691 {
1692         s32 temp;
1693
1694         temp = iwl4965_hw_get_temperature(priv);
1695         if (temp < 0)
1696                 return;
1697
1698         if (priv->temperature != temp) {
1699                 if (priv->temperature)
1700                         IWL_DEBUG_TEMP(priv, "Temperature changed "
1701                                        "from %dC to %dC\n",
1702                                        KELVIN_TO_CELSIUS(priv->temperature),
1703                                        KELVIN_TO_CELSIUS(temp));
1704                 else
1705                         IWL_DEBUG_TEMP(priv, "Temperature "
1706                                        "initialized to %dC\n",
1707                                        KELVIN_TO_CELSIUS(temp));
1708         }
1709
1710         priv->temperature = temp;
1711         iwl_tt_handler(priv);
1712         set_bit(STATUS_TEMPERATURE, &priv->status);
1713
1714         if (!priv->disable_tx_power_cal &&
1715              unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
1716              iwl4965_is_temp_calib_needed(priv))
1717                 queue_work(priv->workqueue, &priv->txpower_work);
1718 }
1719
1720 /**
1721  * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
1722  */
1723 static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
1724                                             u16 txq_id)
1725 {
1726         /* Simply stop the queue, but don't change any configuration;
1727          * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
1728         iwl_write_prph(priv,
1729                 IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
1730                 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
1731                 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
1732 }
1733
1734 /**
1735  * txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE
1736  * priv->lock must be held by the caller
1737  */
1738 static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
1739                                    u16 ssn_idx, u8 tx_fifo)
1740 {
1741         if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1742             (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) {
1743                 IWL_WARN(priv,
1744                         "queue number out of range: %d, must be %d to %d\n",
1745                         txq_id, IWL49_FIRST_AMPDU_QUEUE,
1746                         IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1);
1747                 return -EINVAL;
1748         }
1749
1750         iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1751
1752         iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1753
1754         priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1755         priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1756         /* supposes that ssn_idx is valid (!= 0xFFF) */
1757         iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1758
1759         iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1760         iwl_txq_ctx_deactivate(priv, txq_id);
1761         iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
1762
1763         return 0;
1764 }
1765
1766 /**
1767  * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
1768  */
1769 static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
1770                                         u16 txq_id)
1771 {
1772         u32 tbl_dw_addr;
1773         u32 tbl_dw;
1774         u16 scd_q2ratid;
1775
1776         scd_q2ratid = ra_tid & IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
1777
1778         tbl_dw_addr = priv->scd_base_addr +
1779                         IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
1780
1781         tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
1782
1783         if (txq_id & 0x1)
1784                 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
1785         else
1786                 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
1787
1788         iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
1789
1790         return 0;
1791 }
1792
1793
1794 /**
1795  * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
1796  *
1797  * NOTE:  txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE,
1798  *        i.e. it must be one of the higher queues used for aggregation
1799  */
1800 static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id,
1801                                   int tx_fifo, int sta_id, int tid, u16 ssn_idx)
1802 {
1803         unsigned long flags;
1804         u16 ra_tid;
1805
1806         if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1807             (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) {
1808                 IWL_WARN(priv,
1809                         "queue number out of range: %d, must be %d to %d\n",
1810                         txq_id, IWL49_FIRST_AMPDU_QUEUE,
1811                         IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1);
1812                 return -EINVAL;
1813         }
1814
1815         ra_tid = BUILD_RAxTID(sta_id, tid);
1816
1817         /* Modify device's station table to Tx this TID */
1818         iwl_sta_tx_modify_enable_tid(priv, sta_id, tid);
1819
1820         spin_lock_irqsave(&priv->lock, flags);
1821
1822         /* Stop this Tx queue before configuring it */
1823         iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1824
1825         /* Map receiver-address / traffic-ID to this queue */
1826         iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
1827
1828         /* Set this queue as a chain-building queue */
1829         iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1830
1831         /* Place first TFD at index corresponding to start sequence number.
1832          * Assumes that ssn_idx is valid (!= 0xFFF) */
1833         priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1834         priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1835         iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1836
1837         /* Set up Tx window size and frame limit for this queue */
1838         iwl_write_targ_mem(priv,
1839                 priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
1840                 (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
1841                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
1842
1843         iwl_write_targ_mem(priv, priv->scd_base_addr +
1844                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
1845                 (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
1846                 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
1847
1848         iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1849
1850         /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
1851         iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
1852
1853         spin_unlock_irqrestore(&priv->lock, flags);
1854
1855         return 0;
1856 }
1857
1858
1859 static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len)
1860 {
1861         switch (cmd_id) {
1862         case REPLY_RXON:
1863                 return (u16) sizeof(struct iwl4965_rxon_cmd);
1864         default:
1865                 return len;
1866         }
1867 }
1868
1869 static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
1870 {
1871         struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
1872         addsta->mode = cmd->mode;
1873         memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
1874         memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
1875         addsta->station_flags = cmd->station_flags;
1876         addsta->station_flags_msk = cmd->station_flags_msk;
1877         addsta->tid_disable_tx = cmd->tid_disable_tx;
1878         addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
1879         addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
1880         addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
1881         addsta->reserved1 = cpu_to_le16(0);
1882         addsta->reserved2 = cpu_to_le32(0);
1883
1884         return (u16)sizeof(struct iwl4965_addsta_cmd);
1885 }
1886
1887 static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
1888 {
1889         return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
1890 }
1891
1892 /**
1893  * iwl4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
1894  */
1895 static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
1896                                       struct iwl_ht_agg *agg,
1897                                       struct iwl4965_tx_resp *tx_resp,
1898                                       int txq_id, u16 start_idx)
1899 {
1900         u16 status;
1901         struct agg_tx_status *frame_status = tx_resp->u.agg_status;
1902         struct ieee80211_tx_info *info = NULL;
1903         struct ieee80211_hdr *hdr = NULL;
1904         u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
1905         int i, sh, idx;
1906         u16 seq;
1907         if (agg->wait_for_ba)
1908                 IWL_DEBUG_TX_REPLY(priv, "got tx response w/o block-ack\n");
1909
1910         agg->frame_count = tx_resp->frame_count;
1911         agg->start_idx = start_idx;
1912         agg->rate_n_flags = rate_n_flags;
1913         agg->bitmap = 0;
1914
1915         /* num frames attempted by Tx command */
1916         if (agg->frame_count == 1) {
1917                 /* Only one frame was attempted; no block-ack will arrive */
1918                 status = le16_to_cpu(frame_status[0].status);
1919                 idx = start_idx;
1920
1921                 /* FIXME: code repetition */
1922                 IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, StartIdx=%d idx=%d\n",
1923                                    agg->frame_count, agg->start_idx, idx);
1924
1925                 info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]);
1926                 info->status.rates[0].count = tx_resp->failure_frame + 1;
1927                 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
1928                 info->flags |= iwl_is_tx_success(status) ?
1929                         IEEE80211_TX_STAT_ACK : 0;
1930                 iwl_hwrate_to_tx_control(priv, rate_n_flags, info);
1931                 /* FIXME: code repetition end */
1932
1933                 IWL_DEBUG_TX_REPLY(priv, "1 Frame 0x%x failure :%d\n",
1934                                     status & 0xff, tx_resp->failure_frame);
1935                 IWL_DEBUG_TX_REPLY(priv, "Rate Info rate_n_flags=%x\n", rate_n_flags);
1936
1937                 agg->wait_for_ba = 0;
1938         } else {
1939                 /* Two or more frames were attempted; expect block-ack */
1940                 u64 bitmap = 0;
1941                 int start = agg->start_idx;
1942
1943                 /* Construct bit-map of pending frames within Tx window */
1944                 for (i = 0; i < agg->frame_count; i++) {
1945                         u16 sc;
1946                         status = le16_to_cpu(frame_status[i].status);
1947                         seq  = le16_to_cpu(frame_status[i].sequence);
1948                         idx = SEQ_TO_INDEX(seq);
1949                         txq_id = SEQ_TO_QUEUE(seq);
1950
1951                         if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
1952                                       AGG_TX_STATE_ABORT_MSK))
1953                                 continue;
1954
1955                         IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, txq_id=%d idx=%d\n",
1956                                            agg->frame_count, txq_id, idx);
1957
1958                         hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
1959                         if (!hdr) {
1960                                 IWL_ERR(priv,
1961                                         "BUG_ON idx doesn't point to valid skb"
1962                                         " idx=%d, txq_id=%d\n", idx, txq_id);
1963                                 return -1;
1964                         }
1965
1966                         sc = le16_to_cpu(hdr->seq_ctrl);
1967                         if (idx != (SEQ_TO_SN(sc) & 0xff)) {
1968                                 IWL_ERR(priv,
1969                                         "BUG_ON idx doesn't match seq control"
1970                                         " idx=%d, seq_idx=%d, seq=%d\n",
1971                                         idx, SEQ_TO_SN(sc), hdr->seq_ctrl);
1972                                 return -1;
1973                         }
1974
1975                         IWL_DEBUG_TX_REPLY(priv, "AGG Frame i=%d idx %d seq=%d\n",
1976                                            i, idx, SEQ_TO_SN(sc));
1977
1978                         sh = idx - start;
1979                         if (sh > 64) {
1980                                 sh = (start - idx) + 0xff;
1981                                 bitmap = bitmap << sh;
1982                                 sh = 0;
1983                                 start = idx;
1984                         } else if (sh < -64)
1985                                 sh  = 0xff - (start - idx);
1986                         else if (sh < 0) {
1987                                 sh = start - idx;
1988                                 start = idx;
1989                                 bitmap = bitmap << sh;
1990                                 sh = 0;
1991                         }
1992                         bitmap |= 1ULL << sh;
1993                         IWL_DEBUG_TX_REPLY(priv, "start=%d bitmap=0x%llx\n",
1994                                            start, (unsigned long long)bitmap);
1995                 }
1996
1997                 agg->bitmap = bitmap;
1998                 agg->start_idx = start;
1999                 IWL_DEBUG_TX_REPLY(priv, "Frames %d start_idx=%d bitmap=0x%llx\n",
2000                                    agg->frame_count, agg->start_idx,
2001                                    (unsigned long long)agg->bitmap);
2002
2003                 if (bitmap)
2004                         agg->wait_for_ba = 1;
2005         }
2006         return 0;
2007 }
2008
2009 /**
2010  * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
2011  */
2012 static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
2013                                 struct iwl_rx_mem_buffer *rxb)
2014 {
2015         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2016         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
2017         int txq_id = SEQ_TO_QUEUE(sequence);
2018         int index = SEQ_TO_INDEX(sequence);
2019         struct iwl_tx_queue *txq = &priv->txq[txq_id];
2020         struct ieee80211_hdr *hdr;
2021         struct ieee80211_tx_info *info;
2022         struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
2023         u32  status = le32_to_cpu(tx_resp->u.status);
2024         int tid = MAX_TID_COUNT;
2025         int sta_id;
2026         int freed;
2027         u8 *qc = NULL;
2028
2029         if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
2030                 IWL_ERR(priv, "Read index for DMA queue txq_id (%d) index %d "
2031                           "is out of range [0-%d] %d %d\n", txq_id,
2032                           index, txq->q.n_bd, txq->q.write_ptr,
2033                           txq->q.read_ptr);
2034                 return;
2035         }
2036
2037         info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
2038         memset(&info->status, 0, sizeof(info->status));
2039
2040         hdr = iwl_tx_queue_get_hdr(priv, txq_id, index);
2041         if (ieee80211_is_data_qos(hdr->frame_control)) {
2042                 qc = ieee80211_get_qos_ctl(hdr);
2043                 tid = qc[0] & 0xf;
2044         }
2045
2046         sta_id = iwl_get_ra_sta_id(priv, hdr);
2047         if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
2048                 IWL_ERR(priv, "Station not known\n");
2049                 return;
2050         }
2051
2052         if (txq->sched_retry) {
2053                 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
2054                 struct iwl_ht_agg *agg = NULL;
2055
2056                 WARN_ON(!qc);
2057
2058                 agg = &priv->stations[sta_id].tid[tid].agg;
2059
2060                 iwl4965_tx_status_reply_tx(priv, agg, tx_resp, txq_id, index);
2061
2062                 /* check if BAR is needed */
2063                 if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status))
2064                         info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
2065
2066                 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
2067                         index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
2068                         IWL_DEBUG_TX_REPLY(priv, "Retry scheduler reclaim scd_ssn "
2069                                            "%d index %d\n", scd_ssn , index);
2070                         freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2071                         priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2072
2073                         if (priv->mac80211_registered &&
2074                             (iwl_queue_space(&txq->q) > txq->q.low_mark) &&
2075                             (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)) {
2076                                 if (agg->state == IWL_AGG_OFF)
2077                                         iwl_wake_queue(priv, txq_id);
2078                                 else
2079                                         iwl_wake_queue(priv, txq->swq_id);
2080                         }
2081                 }
2082         } else {
2083                 info->status.rates[0].count = tx_resp->failure_frame + 1;
2084                 info->flags |= iwl_is_tx_success(status) ?
2085                                         IEEE80211_TX_STAT_ACK : 0;
2086                 iwl_hwrate_to_tx_control(priv,
2087                                         le32_to_cpu(tx_resp->rate_n_flags),
2088                                         info);
2089
2090                 IWL_DEBUG_TX_REPLY(priv, "TXQ %d status %s (0x%08x) "
2091                                    "rate_n_flags 0x%x retries %d\n",
2092                                    txq_id,
2093                                    iwl_get_tx_fail_reason(status), status,
2094                                    le32_to_cpu(tx_resp->rate_n_flags),
2095                                    tx_resp->failure_frame);
2096
2097                 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2098                 if (qc && likely(sta_id != IWL_INVALID_STATION))
2099                         priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2100
2101                 if (priv->mac80211_registered &&
2102                     (iwl_queue_space(&txq->q) > txq->q.low_mark))
2103                         iwl_wake_queue(priv, txq_id);
2104         }
2105
2106         if (qc && likely(sta_id != IWL_INVALID_STATION))
2107                 iwl_txq_check_empty(priv, sta_id, tid, txq_id);
2108
2109         if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
2110                 IWL_ERR(priv, "TODO:  Implement Tx ABORT REQUIRED!!!\n");
2111 }
2112
2113 static int iwl4965_calc_rssi(struct iwl_priv *priv,
2114                              struct iwl_rx_phy_res *rx_resp)
2115 {
2116         /* data from PHY/DSP regarding signal strength, etc.,
2117          *   contents are always there, not configurable by host.  */
2118         struct iwl4965_rx_non_cfg_phy *ncphy =
2119             (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy_buf;
2120         u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL49_AGC_DB_MASK)
2121                         >> IWL49_AGC_DB_POS;
2122
2123         u32 valid_antennae =
2124             (le16_to_cpu(rx_resp->phy_flags) & IWL49_RX_PHY_FLAGS_ANTENNAE_MASK)
2125                         >> IWL49_RX_PHY_FLAGS_ANTENNAE_OFFSET;
2126         u8 max_rssi = 0;
2127         u32 i;
2128
2129         /* Find max rssi among 3 possible receivers.
2130          * These values are measured by the digital signal processor (DSP).
2131          * They should stay fairly constant even as the signal strength varies,
2132          *   if the radio's automatic gain control (AGC) is working right.
2133          * AGC value (see below) will provide the "interesting" info. */
2134         for (i = 0; i < 3; i++)
2135                 if (valid_antennae & (1 << i))
2136                         max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
2137
2138         IWL_DEBUG_STATS(priv, "Rssi In A %d B %d C %d Max %d AGC dB %d\n",
2139                 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
2140                 max_rssi, agc);
2141
2142         /* dBm = max_rssi dB - agc dB - constant.
2143          * Higher AGC (higher radio gain) means lower signal. */
2144         return max_rssi - agc - IWL49_RSSI_OFFSET;
2145 }
2146
2147
2148 /* Set up 4965-specific Rx frame reply handlers */
2149 static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
2150 {
2151         /* Legacy Rx frames */
2152         priv->rx_handlers[REPLY_RX] = iwl_rx_reply_rx;
2153         /* Tx response */
2154         priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
2155 }
2156
2157 static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
2158 {
2159         INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
2160 }
2161
2162 static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
2163 {
2164         cancel_work_sync(&priv->txpower_work);
2165 }
2166
2167 #define IWL4965_UCODE_GET(item)                                         \
2168 static u32 iwl4965_ucode_get_##item(const struct iwl_ucode_header *ucode,\
2169                                     u32 api_ver)                        \
2170 {                                                                       \
2171         return le32_to_cpu(ucode->u.v1.item);                           \
2172 }
2173
2174 static u32 iwl4965_ucode_get_header_size(u32 api_ver)
2175 {
2176         return UCODE_HEADER_SIZE(1);
2177 }
2178 static u32 iwl4965_ucode_get_build(const struct iwl_ucode_header *ucode,
2179                                    u32 api_ver)
2180 {
2181         return 0;
2182 }
2183 static u8 *iwl4965_ucode_get_data(const struct iwl_ucode_header *ucode,
2184                                   u32 api_ver)
2185 {
2186         return (u8 *) ucode->u.v1.data;
2187 }
2188
2189 IWL4965_UCODE_GET(inst_size);
2190 IWL4965_UCODE_GET(data_size);
2191 IWL4965_UCODE_GET(init_size);
2192 IWL4965_UCODE_GET(init_data_size);
2193 IWL4965_UCODE_GET(boot_size);
2194
2195 static struct iwl_hcmd_ops iwl4965_hcmd = {
2196         .rxon_assoc = iwl4965_send_rxon_assoc,
2197         .commit_rxon = iwl_commit_rxon,
2198         .set_rxon_chain = iwl_set_rxon_chain,
2199 };
2200
2201 static struct iwl_ucode_ops iwl4965_ucode = {
2202         .get_header_size = iwl4965_ucode_get_header_size,
2203         .get_build = iwl4965_ucode_get_build,
2204         .get_inst_size = iwl4965_ucode_get_inst_size,
2205         .get_data_size = iwl4965_ucode_get_data_size,
2206         .get_init_size = iwl4965_ucode_get_init_size,
2207         .get_init_data_size = iwl4965_ucode_get_init_data_size,
2208         .get_boot_size = iwl4965_ucode_get_boot_size,
2209         .get_data = iwl4965_ucode_get_data,
2210 };
2211 static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
2212         .get_hcmd_size = iwl4965_get_hcmd_size,
2213         .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
2214         .chain_noise_reset = iwl4965_chain_noise_reset,
2215         .gain_computation = iwl4965_gain_computation,
2216         .rts_tx_cmd_flag = iwl4965_rts_tx_cmd_flag,
2217         .calc_rssi = iwl4965_calc_rssi,
2218 };
2219
2220 static struct iwl_lib_ops iwl4965_lib = {
2221         .set_hw_params = iwl4965_hw_set_hw_params,
2222         .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
2223         .txq_set_sched = iwl4965_txq_set_sched,
2224         .txq_agg_enable = iwl4965_txq_agg_enable,
2225         .txq_agg_disable = iwl4965_txq_agg_disable,
2226         .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd,
2227         .txq_free_tfd = iwl_hw_txq_free_tfd,
2228         .txq_init = iwl_hw_tx_queue_init,
2229         .rx_handler_setup = iwl4965_rx_handler_setup,
2230         .setup_deferred_work = iwl4965_setup_deferred_work,
2231         .cancel_deferred_work = iwl4965_cancel_deferred_work,
2232         .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
2233         .alive_notify = iwl4965_alive_notify,
2234         .init_alive_start = iwl4965_init_alive_start,
2235         .load_ucode = iwl4965_load_bsm,
2236         .dump_nic_event_log = iwl_dump_nic_event_log,
2237         .dump_nic_error_log = iwl_dump_nic_error_log,
2238         .apm_ops = {
2239                 .init = iwl4965_apm_init,
2240                 .stop = iwl_apm_stop,
2241                 .config = iwl4965_nic_config,
2242                 .set_pwr_src = iwl_set_pwr_src,
2243         },
2244         .eeprom_ops = {
2245                 .regulatory_bands = {
2246                         EEPROM_REGULATORY_BAND_1_CHANNELS,
2247                         EEPROM_REGULATORY_BAND_2_CHANNELS,
2248                         EEPROM_REGULATORY_BAND_3_CHANNELS,
2249                         EEPROM_REGULATORY_BAND_4_CHANNELS,
2250                         EEPROM_REGULATORY_BAND_5_CHANNELS,
2251                         EEPROM_4965_REGULATORY_BAND_24_HT40_CHANNELS,
2252                         EEPROM_4965_REGULATORY_BAND_52_HT40_CHANNELS
2253                 },
2254                 .verify_signature  = iwlcore_eeprom_verify_signature,
2255                 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
2256                 .release_semaphore = iwlcore_eeprom_release_semaphore,
2257                 .calib_version = iwl4965_eeprom_calib_version,
2258                 .query_addr = iwlcore_eeprom_query_addr,
2259         },
2260         .send_tx_power  = iwl4965_send_tx_power,
2261         .update_chain_flags = iwl_update_chain_flags,
2262         .post_associate = iwl_post_associate,
2263         .config_ap = iwl_config_ap,
2264         .isr = iwl_isr_legacy,
2265         .temp_ops = {
2266                 .temperature = iwl4965_temperature_calib,
2267                 .set_ct_kill = iwl4965_set_ct_threshold,
2268         },
2269 };
2270
2271 static struct iwl_ops iwl4965_ops = {
2272         .ucode = &iwl4965_ucode,
2273         .lib = &iwl4965_lib,
2274         .hcmd = &iwl4965_hcmd,
2275         .utils = &iwl4965_hcmd_utils,
2276         .led = &iwlagn_led_ops,
2277 };
2278
2279 struct iwl_cfg iwl4965_agn_cfg = {
2280         .name = "4965AGN",
2281         .fw_name_pre = IWL4965_FW_PRE,
2282         .ucode_api_max = IWL4965_UCODE_API_MAX,
2283         .ucode_api_min = IWL4965_UCODE_API_MIN,
2284         .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
2285         .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
2286         .eeprom_ver = EEPROM_4965_EEPROM_VERSION,
2287         .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION,
2288         .ops = &iwl4965_ops,
2289         .mod_params = &iwl4965_mod_params,
2290         .use_isr_legacy = true,
2291         .ht_greenfield_support = false,
2292         .broken_powersave = true,
2293         .led_compensation = 61,
2294         .chain_noise_num_beacons = IWL4965_CAL_NUM_BEACONS,
2295 };
2296
2297 /* Module firmware */
2298 MODULE_FIRMWARE(IWL4965_MODULE_FIRMWARE(IWL4965_UCODE_API_MAX));
2299
2300 module_param_named(antenna, iwl4965_mod_params.antenna, int, S_IRUGO);
2301 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
2302 module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, S_IRUGO);
2303 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
2304 module_param_named(
2305         disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, S_IRUGO);
2306 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
2307
2308 module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, S_IRUGO);
2309 MODULE_PARM_DESC(queues_num, "number of hw queues.");
2310 /* 11n */
2311 module_param_named(11n_disable, iwl4965_mod_params.disable_11n, int, S_IRUGO);
2312 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
2313 module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K,
2314                    int, S_IRUGO);
2315 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
2316
2317 module_param_named(fw_restart4965, iwl4965_mod_params.restart_fw, int, S_IRUGO);
2318 MODULE_PARM_DESC(fw_restart4965, "restart firmware in case of error");