1 /******************************************************************************
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
21 * Contact Information:
22 * Intel Linux Wireless <ilw@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 *****************************************************************************/
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/init.h>
30 #include <linux/pci.h>
31 #include <linux/dma-mapping.h>
32 #include <linux/delay.h>
33 #include <linux/skbuff.h>
34 #include <linux/netdevice.h>
35 #include <linux/wireless.h>
36 #include <net/mac80211.h>
37 #include <linux/etherdevice.h>
38 #include <asm/unaligned.h>
40 #include "iwl-eeprom.h"
44 #include "iwl-helpers.h"
45 #include "iwl-calib.h"
48 static int iwl4965_send_tx_power(struct iwl_priv *priv);
49 static int iwl4965_hw_get_temperature(const struct iwl_priv *priv);
51 /* Highest firmware API version supported */
52 #define IWL4965_UCODE_API_MAX 2
54 /* Lowest firmware API version supported */
55 #define IWL4965_UCODE_API_MIN 2
57 #define IWL4965_FW_PRE "iwlwifi-4965-"
58 #define _IWL4965_MODULE_FIRMWARE(api) IWL4965_FW_PRE #api ".ucode"
59 #define IWL4965_MODULE_FIRMWARE(api) _IWL4965_MODULE_FIRMWARE(api)
62 /* module parameters */
63 static struct iwl_mod_params iwl4965_mod_params = {
64 .num_of_queues = IWL49_NUM_QUEUES,
65 .num_of_ampdu_queues = IWL49_NUM_AMPDU_QUEUES,
68 /* the rest are 0 by default */
71 /* check contents of special bootstrap uCode SRAM */
72 static int iwl4965_verify_bsm(struct iwl_priv *priv)
74 __le32 *image = priv->ucode_boot.v_addr;
75 u32 len = priv->ucode_boot.len;
79 IWL_DEBUG_INFO("Begin verify bsm\n");
81 /* verify BSM SRAM contents */
82 val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
83 for (reg = BSM_SRAM_LOWER_BOUND;
84 reg < BSM_SRAM_LOWER_BOUND + len;
85 reg += sizeof(u32), image++) {
86 val = iwl_read_prph(priv, reg);
87 if (val != le32_to_cpu(*image)) {
88 IWL_ERR(priv, "BSM uCode verification failed at "
89 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
91 reg - BSM_SRAM_LOWER_BOUND, len,
92 val, le32_to_cpu(*image));
97 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
103 * iwl4965_load_bsm - Load bootstrap instructions
107 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
108 * in special SRAM that does not power down during RFKILL. When powering back
109 * up after power-saving sleeps (or during initial uCode load), the BSM loads
110 * the bootstrap program into the on-board processor, and starts it.
112 * The bootstrap program loads (via DMA) instructions and data for a new
113 * program from host DRAM locations indicated by the host driver in the
114 * BSM_DRAM_* registers. Once the new program is loaded, it starts
117 * When initializing the NIC, the host driver points the BSM to the
118 * "initialize" uCode image. This uCode sets up some internal data, then
119 * notifies host via "initialize alive" that it is complete.
121 * The host then replaces the BSM_DRAM_* pointer values to point to the
122 * normal runtime uCode instructions and a backup uCode data cache buffer
123 * (filled initially with starting data values for the on-board processor),
124 * then triggers the "initialize" uCode to load and launch the runtime uCode,
125 * which begins normal operation.
127 * When doing a power-save shutdown, runtime uCode saves data SRAM into
128 * the backup data cache in DRAM before SRAM is powered down.
130 * When powering back up, the BSM loads the bootstrap program. This reloads
131 * the runtime uCode instructions and the backup data cache into SRAM,
132 * and re-launches the runtime uCode from where it left off.
134 static int iwl4965_load_bsm(struct iwl_priv *priv)
136 __le32 *image = priv->ucode_boot.v_addr;
137 u32 len = priv->ucode_boot.len;
147 IWL_DEBUG_INFO("Begin load bsm\n");
149 priv->ucode_type = UCODE_RT;
151 /* make sure bootstrap program is no larger than BSM's SRAM size */
152 if (len > IWL49_MAX_BSM_SIZE)
155 /* Tell bootstrap uCode where to find the "Initialize" uCode
156 * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
157 * NOTE: iwl_init_alive_start() will replace these values,
158 * after the "initialize" uCode has run, to point to
159 * runtime/protocol instructions and backup data cache.
161 pinst = priv->ucode_init.p_addr >> 4;
162 pdata = priv->ucode_init_data.p_addr >> 4;
163 inst_len = priv->ucode_init.len;
164 data_len = priv->ucode_init_data.len;
166 ret = iwl_grab_nic_access(priv);
170 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
171 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
172 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
173 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
175 /* Fill BSM memory with bootstrap instructions */
176 for (reg_offset = BSM_SRAM_LOWER_BOUND;
177 reg_offset < BSM_SRAM_LOWER_BOUND + len;
178 reg_offset += sizeof(u32), image++)
179 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
181 ret = iwl4965_verify_bsm(priv);
183 iwl_release_nic_access(priv);
187 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
188 iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
189 iwl_write_prph(priv, BSM_WR_MEM_DST_REG, IWL49_RTC_INST_LOWER_BOUND);
190 iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
192 /* Load bootstrap code into instruction SRAM now,
193 * to prepare to load "initialize" uCode */
194 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
196 /* Wait for load of bootstrap uCode to finish */
197 for (i = 0; i < 100; i++) {
198 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
199 if (!(done & BSM_WR_CTRL_REG_BIT_START))
204 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
206 IWL_ERR(priv, "BSM write did not complete!\n");
210 /* Enable future boot loads whenever power management unit triggers it
211 * (e.g. when powering back up after power-save shutdown) */
212 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
214 iwl_release_nic_access(priv);
220 * iwl4965_set_ucode_ptrs - Set uCode address location
222 * Tell initialization uCode where to find runtime uCode.
224 * BSM registers initially contain pointers to initialization uCode.
225 * We need to replace them to load runtime uCode inst and data,
226 * and to save runtime data when powering down.
228 static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
235 /* bits 35:4 for 4965 */
236 pinst = priv->ucode_code.p_addr >> 4;
237 pdata = priv->ucode_data_backup.p_addr >> 4;
239 spin_lock_irqsave(&priv->lock, flags);
240 ret = iwl_grab_nic_access(priv);
242 spin_unlock_irqrestore(&priv->lock, flags);
246 /* Tell bootstrap uCode where to find image to load */
247 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
248 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
249 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
250 priv->ucode_data.len);
252 /* Inst byte count must be last to set up, bit 31 signals uCode
253 * that all new ptr/size info is in place */
254 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
255 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
256 iwl_release_nic_access(priv);
258 spin_unlock_irqrestore(&priv->lock, flags);
260 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
266 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
268 * Called after REPLY_ALIVE notification received from "initialize" uCode.
270 * The 4965 "initialize" ALIVE reply contains calibration data for:
271 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
272 * (3945 does not contain this data).
274 * Tell "initialize" uCode to go ahead and load the runtime uCode.
276 static void iwl4965_init_alive_start(struct iwl_priv *priv)
278 /* Check alive response for "valid" sign from uCode */
279 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
280 /* We had an error bringing up the hardware, so take it
281 * all the way back down so we can try again */
282 IWL_DEBUG_INFO("Initialize Alive failed.\n");
286 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
287 * This is a paranoid check, because we would not have gotten the
288 * "initialize" alive if code weren't properly loaded. */
289 if (iwl_verify_ucode(priv)) {
290 /* Runtime instruction load was bad;
291 * take it all the way back down so we can try again */
292 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
296 /* Calculate temperature */
297 priv->temperature = iwl4965_hw_get_temperature(priv);
299 /* Send pointers to protocol/runtime uCode image ... init code will
300 * load and launch runtime uCode, which will send us another "Alive"
302 IWL_DEBUG_INFO("Initialization Alive received.\n");
303 if (iwl4965_set_ucode_ptrs(priv)) {
304 /* Runtime instruction load won't happen;
305 * take it all the way back down so we can try again */
306 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
312 queue_work(priv->workqueue, &priv->restart);
315 static int is_fat_channel(__le32 rxon_flags)
317 return (rxon_flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) ||
318 (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK);
324 static u16 iwl4965_eeprom_calib_version(struct iwl_priv *priv)
326 return iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
330 * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
331 * must be called under priv->lock and mac access
333 static void iwl4965_txq_set_sched(struct iwl_priv *priv, u32 mask)
335 iwl_write_prph(priv, IWL49_SCD_TXFACT, mask);
338 static int iwl4965_apm_init(struct iwl_priv *priv)
342 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
343 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
345 /* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */
346 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
347 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
349 /* set "initialization complete" bit to move adapter
350 * D0U* --> D0A* state */
351 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
353 /* wait for clock stabilization */
354 ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
355 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
357 IWL_DEBUG_INFO("Failed to init the card\n");
361 ret = iwl_grab_nic_access(priv);
366 iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT |
367 APMG_CLK_VAL_BSM_CLK_RQT);
371 /* disable L1-Active */
372 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
373 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
375 iwl_release_nic_access(priv);
381 static void iwl4965_nic_config(struct iwl_priv *priv)
388 spin_lock_irqsave(&priv->lock, flags);
390 if ((priv->rev_id & 0x80) == 0x80 && (priv->rev_id & 0x7f) < 8) {
391 pci_read_config_dword(priv->pci_dev, PCI_REG_WUM8, &val);
392 /* Enable No Snoop field */
393 pci_write_config_dword(priv->pci_dev, PCI_REG_WUM8,
397 pci_read_config_word(priv->pci_dev, PCI_CFG_LINK_CTRL, &link);
399 /* L1 is enabled by BIOS */
400 if ((link & PCI_CFG_LINK_CTRL_VAL_L1_EN) == PCI_CFG_LINK_CTRL_VAL_L1_EN)
401 /* disable L0S disabled L1A enabled */
402 iwl_set_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
404 /* L0S enabled L1A disabled */
405 iwl_clear_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
407 radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
409 /* write radio config values to register */
410 if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
411 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
412 EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
413 EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
414 EEPROM_RF_CFG_DASH_MSK(radio_cfg));
416 /* set CSR_HW_CONFIG_REG for uCode use */
417 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
418 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
419 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
421 priv->calib_info = (struct iwl_eeprom_calib_info *)
422 iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
424 spin_unlock_irqrestore(&priv->lock, flags);
427 static int iwl4965_apm_stop_master(struct iwl_priv *priv)
431 spin_lock_irqsave(&priv->lock, flags);
433 /* set stop master bit */
434 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
436 iwl_poll_direct_bit(priv, CSR_RESET,
437 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
439 spin_unlock_irqrestore(&priv->lock, flags);
440 IWL_DEBUG_INFO("stop master\n");
445 static void iwl4965_apm_stop(struct iwl_priv *priv)
449 iwl4965_apm_stop_master(priv);
451 spin_lock_irqsave(&priv->lock, flags);
453 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
456 /* clear "init complete" move adapter D0A* --> D0U state */
457 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
458 spin_unlock_irqrestore(&priv->lock, flags);
461 static int iwl4965_apm_reset(struct iwl_priv *priv)
466 iwl4965_apm_stop_master(priv);
468 spin_lock_irqsave(&priv->lock, flags);
470 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
474 /* FIXME: put here L1A -L0S w/a */
476 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
478 ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
479 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
485 ret = iwl_grab_nic_access(priv);
488 /* Enable DMA and BSM Clock */
489 iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT |
490 APMG_CLK_VAL_BSM_CLK_RQT);
495 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
496 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
498 iwl_release_nic_access(priv);
500 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
501 wake_up_interruptible(&priv->wait_command_queue);
504 spin_unlock_irqrestore(&priv->lock, flags);
509 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
510 * Called after every association, but this runs only once!
511 * ... once chain noise is calibrated the first time, it's good forever. */
512 static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
514 struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
516 if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
517 struct iwl_calib_diff_gain_cmd cmd;
519 memset(&cmd, 0, sizeof(cmd));
520 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
524 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
527 "Could not send REPLY_PHY_CALIBRATION_CMD\n");
528 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
529 IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
533 static void iwl4965_gain_computation(struct iwl_priv *priv,
535 u16 min_average_noise_antenna_i,
536 u32 min_average_noise)
539 struct iwl_chain_noise_data *data = &priv->chain_noise_data;
541 data->delta_gain_code[min_average_noise_antenna_i] = 0;
543 for (i = 0; i < NUM_RX_CHAINS; i++) {
546 if (!(data->disconn_array[i]) &&
547 (data->delta_gain_code[i] ==
548 CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
549 delta_g = average_noise[i] - min_average_noise;
550 data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
551 data->delta_gain_code[i] =
552 min(data->delta_gain_code[i],
553 (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
555 data->delta_gain_code[i] =
556 (data->delta_gain_code[i] | (1 << 2));
558 data->delta_gain_code[i] = 0;
561 IWL_DEBUG_CALIB("delta_gain_codes: a %d b %d c %d\n",
562 data->delta_gain_code[0],
563 data->delta_gain_code[1],
564 data->delta_gain_code[2]);
566 /* Differential gain gets sent to uCode only once */
567 if (!data->radio_write) {
568 struct iwl_calib_diff_gain_cmd cmd;
569 data->radio_write = 1;
571 memset(&cmd, 0, sizeof(cmd));
572 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
573 cmd.diff_gain_a = data->delta_gain_code[0];
574 cmd.diff_gain_b = data->delta_gain_code[1];
575 cmd.diff_gain_c = data->delta_gain_code[2];
576 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
579 IWL_DEBUG_CALIB("fail sending cmd "
580 "REPLY_PHY_CALIBRATION_CMD \n");
582 /* TODO we might want recalculate
583 * rx_chain in rxon cmd */
585 /* Mark so we run this algo only once! */
586 data->state = IWL_CHAIN_NOISE_CALIBRATED;
588 data->chain_noise_a = 0;
589 data->chain_noise_b = 0;
590 data->chain_noise_c = 0;
591 data->chain_signal_a = 0;
592 data->chain_signal_b = 0;
593 data->chain_signal_c = 0;
594 data->beacon_count = 0;
597 static void iwl4965_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
600 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
601 *tx_flags |= TX_CMD_FLG_RTS_MSK;
602 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
603 } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
604 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
605 *tx_flags |= TX_CMD_FLG_CTS_MSK;
609 static void iwl4965_bg_txpower_work(struct work_struct *work)
611 struct iwl_priv *priv = container_of(work, struct iwl_priv,
614 /* If a scan happened to start before we got here
615 * then just return; the statistics notification will
616 * kick off another scheduled work to compensate for
617 * any temperature delta we missed here. */
618 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
619 test_bit(STATUS_SCANNING, &priv->status))
622 mutex_lock(&priv->mutex);
624 /* Regardless of if we are associated, we must reconfigure the
625 * TX power since frames can be sent on non-radar channels while
627 iwl4965_send_tx_power(priv);
629 /* Update last_temperature to keep is_calib_needed from running
630 * when it isn't needed... */
631 priv->last_temperature = priv->temperature;
633 mutex_unlock(&priv->mutex);
637 * Acquire priv->lock before calling this function !
639 static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
641 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
642 (index & 0xff) | (txq_id << 8));
643 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
647 * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
648 * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
649 * @scd_retry: (1) Indicates queue will be used in aggregation mode
651 * NOTE: Acquire priv->lock before calling this function !
653 static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
654 struct iwl_tx_queue *txq,
655 int tx_fifo_id, int scd_retry)
657 int txq_id = txq->q.id;
659 /* Find out whether to activate Tx queue */
660 int active = test_bit(txq_id, &priv->txq_ctx_active_msk) ? 1 : 0;
662 /* Set up and activate */
663 iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
664 (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
665 (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
666 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
667 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
668 IWL49_SCD_QUEUE_STTS_REG_MSK);
670 txq->sched_retry = scd_retry;
672 IWL_DEBUG_INFO("%s %s Queue %d on AC %d\n",
673 active ? "Activate" : "Deactivate",
674 scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
677 static const u16 default_queue_to_tx_fifo[] = {
687 static int iwl4965_alive_notify(struct iwl_priv *priv)
695 spin_lock_irqsave(&priv->lock, flags);
697 ret = iwl_grab_nic_access(priv);
699 spin_unlock_irqrestore(&priv->lock, flags);
703 /* Clear 4965's internal Tx Scheduler data base */
704 priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
705 a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
706 for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
707 iwl_write_targ_mem(priv, a, 0);
708 for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
709 iwl_write_targ_mem(priv, a, 0);
710 for (; a < sizeof(u16) * priv->hw_params.max_txq_num; a += 4)
711 iwl_write_targ_mem(priv, a, 0);
713 /* Tel 4965 where to find Tx byte count tables */
714 iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
715 priv->scd_bc_tbls.dma >> 10);
717 /* Enable DMA channel */
718 for (chan = 0; chan < FH49_TCSR_CHNL_NUM ; chan++)
719 iwl_write_direct32(priv, FH_TCSR_CHNL_TX_CONFIG_REG(chan),
720 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
721 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
723 /* Update FH chicken bits */
724 reg_val = iwl_read_direct32(priv, FH_TX_CHICKEN_BITS_REG);
725 iwl_write_direct32(priv, FH_TX_CHICKEN_BITS_REG,
726 reg_val | FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);
728 /* Disable chain mode for all queues */
729 iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
731 /* Initialize each Tx queue (including the command queue) */
732 for (i = 0; i < priv->hw_params.max_txq_num; i++) {
734 /* TFD circular buffer read/write indexes */
735 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
736 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
738 /* Max Tx Window size for Scheduler-ACK mode */
739 iwl_write_targ_mem(priv, priv->scd_base_addr +
740 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
742 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
743 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
746 iwl_write_targ_mem(priv, priv->scd_base_addr +
747 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
750 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
751 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
754 iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
755 (1 << priv->hw_params.max_txq_num) - 1);
757 /* Activate all Tx DMA/FIFO channels */
758 priv->cfg->ops->lib->txq_set_sched(priv, IWL_MASK(0, 6));
760 iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
762 /* Map each Tx/cmd queue to its corresponding fifo */
763 for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
764 int ac = default_queue_to_tx_fifo[i];
765 iwl_txq_ctx_activate(priv, i);
766 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
769 iwl_release_nic_access(priv);
770 spin_unlock_irqrestore(&priv->lock, flags);
775 static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
779 .auto_corr_min_ofdm = 85,
780 .auto_corr_min_ofdm_mrc = 170,
781 .auto_corr_min_ofdm_x1 = 105,
782 .auto_corr_min_ofdm_mrc_x1 = 220,
784 .auto_corr_max_ofdm = 120,
785 .auto_corr_max_ofdm_mrc = 210,
786 .auto_corr_max_ofdm_x1 = 140,
787 .auto_corr_max_ofdm_mrc_x1 = 270,
789 .auto_corr_min_cck = 125,
790 .auto_corr_max_cck = 200,
791 .auto_corr_min_cck_mrc = 200,
792 .auto_corr_max_cck_mrc = 400,
799 * iwl4965_hw_set_hw_params
801 * Called when initializing driver
803 static int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
806 if ((priv->cfg->mod_params->num_of_queues > IWL49_NUM_QUEUES) ||
807 (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) {
809 "invalid queues_num, should be between %d and %d\n",
810 IWL_MIN_NUM_QUEUES, IWL49_NUM_QUEUES);
814 priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues;
815 priv->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM;
816 priv->hw_params.scd_bc_tbls_size =
817 IWL49_NUM_QUEUES * sizeof(struct iwl4965_scd_bc_tbl);
818 priv->hw_params.max_stations = IWL4965_STATION_COUNT;
819 priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
820 priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
821 priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
822 priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
823 priv->hw_params.fat_channel = BIT(IEEE80211_BAND_5GHZ);
825 priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR;
827 priv->hw_params.tx_chains_num = 2;
828 priv->hw_params.rx_chains_num = 2;
829 priv->hw_params.valid_tx_ant = ANT_A | ANT_B;
830 priv->hw_params.valid_rx_ant = ANT_A | ANT_B;
831 priv->hw_params.ct_kill_threshold = CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD);
833 priv->hw_params.sens = &iwl4965_sensitivity;
838 static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
851 *res = ((num * 2 + denom) / (denom * 2)) * sign;
857 * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
859 * Determines power supply voltage compensation for txpower calculations.
860 * Returns number of 1/2-dB steps to subtract from gain table index,
861 * to compensate for difference between power supply voltage during
862 * factory measurements, vs. current power supply voltage.
864 * Voltage indication is higher for lower voltage.
865 * Lower voltage requires more gain (lower gain table index).
867 static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
872 if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
873 (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
876 iwl4965_math_div_round(current_voltage - eeprom_voltage,
877 TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
879 if (current_voltage > eeprom_voltage)
881 if ((comp < -2) || (comp > 2))
887 static s32 iwl4965_get_tx_atten_grp(u16 channel)
889 if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
890 channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
891 return CALIB_CH_GROUP_5;
893 if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
894 channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
895 return CALIB_CH_GROUP_1;
897 if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
898 channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
899 return CALIB_CH_GROUP_2;
901 if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
902 channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
903 return CALIB_CH_GROUP_3;
905 if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
906 channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
907 return CALIB_CH_GROUP_4;
912 static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
916 for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
917 if (priv->calib_info->band_info[b].ch_from == 0)
920 if ((channel >= priv->calib_info->band_info[b].ch_from)
921 && (channel <= priv->calib_info->band_info[b].ch_to))
928 static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
935 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
941 * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
943 * Interpolates factory measurements from the two sample channels within a
944 * sub-band, to apply to channel of interest. Interpolation is proportional to
945 * differences in channel frequencies, which is proportional to differences
948 static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
949 struct iwl_eeprom_calib_ch_info *chan_info)
954 const struct iwl_eeprom_calib_measure *m1;
955 const struct iwl_eeprom_calib_measure *m2;
956 struct iwl_eeprom_calib_measure *omeas;
960 s = iwl4965_get_sub_band(priv, channel);
961 if (s >= EEPROM_TX_POWER_BANDS) {
962 IWL_ERR(priv, "Tx Power can not find channel %d\n", channel);
966 ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
967 ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
968 chan_info->ch_num = (u8) channel;
970 IWL_DEBUG_TXPOWER("channel %d subband %d factory cal ch %d & %d\n",
971 channel, s, ch_i1, ch_i2);
973 for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
974 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
975 m1 = &(priv->calib_info->band_info[s].ch1.
977 m2 = &(priv->calib_info->band_info[s].ch2.
979 omeas = &(chan_info->measurements[c][m]);
982 (u8) iwl4965_interpolate_value(channel, ch_i1,
987 (u8) iwl4965_interpolate_value(channel, ch_i1,
991 (u8) iwl4965_interpolate_value(channel, ch_i1,
996 (s8) iwl4965_interpolate_value(channel, ch_i1,
1001 ("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
1002 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
1004 ("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
1005 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
1007 ("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
1008 m1->pa_det, m2->pa_det, omeas->pa_det);
1010 ("chain %d meas %d T1=%d T2=%d T=%d\n", c, m,
1011 m1->temperature, m2->temperature,
1012 omeas->temperature);
1019 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
1020 * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
1021 static s32 back_off_table[] = {
1022 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
1023 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
1024 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
1025 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
1029 /* Thermal compensation values for txpower for various frequency ranges ...
1030 * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
1031 static struct iwl4965_txpower_comp_entry {
1032 s32 degrees_per_05db_a;
1033 s32 degrees_per_05db_a_denom;
1034 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
1035 {9, 2}, /* group 0 5.2, ch 34-43 */
1036 {4, 1}, /* group 1 5.2, ch 44-70 */
1037 {4, 1}, /* group 2 5.2, ch 71-124 */
1038 {4, 1}, /* group 3 5.2, ch 125-200 */
1039 {3, 1} /* group 4 2.4, ch all */
1042 static s32 get_min_power_index(s32 rate_power_index, u32 band)
1045 if ((rate_power_index & 7) <= 4)
1046 return MIN_TX_GAIN_INDEX_52GHZ_EXT;
1048 return MIN_TX_GAIN_INDEX;
1056 static const struct gain_entry gain_table[2][108] = {
1057 /* 5.2GHz power gain index table */
1059 {123, 0x3F}, /* highest txpower */
1168 /* 2.4GHz power gain index table */
1170 {110, 0x3f}, /* highest txpower */
1281 static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
1282 u8 is_fat, u8 ctrl_chan_high,
1283 struct iwl4965_tx_power_db *tx_power_tbl)
1285 u8 saturation_power;
1287 s32 user_target_power;
1291 s32 current_regulatory;
1292 s32 txatten_grp = CALIB_CH_GROUP_MAX;
1295 const struct iwl_channel_info *ch_info = NULL;
1296 struct iwl_eeprom_calib_ch_info ch_eeprom_info;
1297 const struct iwl_eeprom_calib_measure *measurement;
1300 s32 voltage_compensation;
1301 s32 degrees_per_05db_num;
1302 s32 degrees_per_05db_denom;
1304 s32 temperature_comp[2];
1305 s32 factory_gain_index[2];
1306 s32 factory_actual_pwr[2];
1309 /* user_txpower_limit is in dBm, convert to half-dBm (half-dB units
1310 * are used for indexing into txpower table) */
1311 user_target_power = 2 * priv->tx_power_user_lmt;
1313 /* Get current (RXON) channel, band, width */
1314 IWL_DEBUG_TXPOWER("chan %d band %d is_fat %d\n", channel, band,
1317 ch_info = iwl_get_channel_info(priv, priv->band, channel);
1319 if (!is_channel_valid(ch_info))
1322 /* get txatten group, used to select 1) thermal txpower adjustment
1323 * and 2) mimo txpower balance between Tx chains. */
1324 txatten_grp = iwl4965_get_tx_atten_grp(channel);
1325 if (txatten_grp < 0) {
1326 IWL_ERR(priv, "Can't find txatten group for channel %d.\n",
1331 IWL_DEBUG_TXPOWER("channel %d belongs to txatten group %d\n",
1332 channel, txatten_grp);
1341 /* hardware txpower limits ...
1342 * saturation (clipping distortion) txpowers are in half-dBm */
1344 saturation_power = priv->calib_info->saturation_power24;
1346 saturation_power = priv->calib_info->saturation_power52;
1348 if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
1349 saturation_power > IWL_TX_POWER_SATURATION_MAX) {
1351 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
1353 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
1356 /* regulatory txpower limits ... reg_limit values are in half-dBm,
1357 * max_power_avg values are in dBm, convert * 2 */
1359 reg_limit = ch_info->fat_max_power_avg * 2;
1361 reg_limit = ch_info->max_power_avg * 2;
1363 if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
1364 (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
1366 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
1368 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
1371 /* Interpolate txpower calibration values for this channel,
1372 * based on factory calibration tests on spaced channels. */
1373 iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1375 /* calculate tx gain adjustment based on power supply voltage */
1376 voltage = priv->calib_info->voltage;
1377 init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1378 voltage_compensation =
1379 iwl4965_get_voltage_compensation(voltage, init_voltage);
1381 IWL_DEBUG_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n",
1383 voltage, voltage_compensation);
1385 /* get current temperature (Celsius) */
1386 current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
1387 current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
1388 current_temp = KELVIN_TO_CELSIUS(current_temp);
1390 /* select thermal txpower adjustment params, based on channel group
1391 * (same frequency group used for mimo txatten adjustment) */
1392 degrees_per_05db_num =
1393 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1394 degrees_per_05db_denom =
1395 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1397 /* get per-chain txpower values from factory measurements */
1398 for (c = 0; c < 2; c++) {
1399 measurement = &ch_eeprom_info.measurements[c][1];
1401 /* txgain adjustment (in half-dB steps) based on difference
1402 * between factory and current temperature */
1403 factory_temp = measurement->temperature;
1404 iwl4965_math_div_round((current_temp - factory_temp) *
1405 degrees_per_05db_denom,
1406 degrees_per_05db_num,
1407 &temperature_comp[c]);
1409 factory_gain_index[c] = measurement->gain_idx;
1410 factory_actual_pwr[c] = measurement->actual_pow;
1412 IWL_DEBUG_TXPOWER("chain = %d\n", c);
1413 IWL_DEBUG_TXPOWER("fctry tmp %d, "
1414 "curr tmp %d, comp %d steps\n",
1415 factory_temp, current_temp,
1416 temperature_comp[c]);
1418 IWL_DEBUG_TXPOWER("fctry idx %d, fctry pwr %d\n",
1419 factory_gain_index[c],
1420 factory_actual_pwr[c]);
1423 /* for each of 33 bit-rates (including 1 for CCK) */
1424 for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
1426 union iwl4965_tx_power_dual_stream tx_power;
1428 /* for mimo, reduce each chain's txpower by half
1429 * (3dB, 6 steps), so total output power is regulatory
1432 current_regulatory = reg_limit -
1433 IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1436 current_regulatory = reg_limit;
1440 /* find txpower limit, either hardware or regulatory */
1441 power_limit = saturation_power - back_off_table[i];
1442 if (power_limit > current_regulatory)
1443 power_limit = current_regulatory;
1445 /* reduce user's txpower request if necessary
1446 * for this rate on this channel */
1447 target_power = user_target_power;
1448 if (target_power > power_limit)
1449 target_power = power_limit;
1451 IWL_DEBUG_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n",
1452 i, saturation_power - back_off_table[i],
1453 current_regulatory, user_target_power,
1456 /* for each of 2 Tx chains (radio transmitters) */
1457 for (c = 0; c < 2; c++) {
1462 (s32)le32_to_cpu(priv->card_alive_init.
1463 tx_atten[txatten_grp][c]);
1467 /* calculate index; higher index means lower txpower */
1468 power_index = (u8) (factory_gain_index[c] -
1470 factory_actual_pwr[c]) -
1471 temperature_comp[c] -
1472 voltage_compensation +
1475 /* IWL_DEBUG_TXPOWER("calculated txpower index %d\n",
1478 if (power_index < get_min_power_index(i, band))
1479 power_index = get_min_power_index(i, band);
1481 /* adjust 5 GHz index to support negative indexes */
1485 /* CCK, rate 32, reduce txpower for CCK */
1486 if (i == POWER_TABLE_CCK_ENTRY)
1488 IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
1490 /* stay within the table! */
1491 if (power_index > 107) {
1492 IWL_WARN(priv, "txpower index %d > 107\n",
1496 if (power_index < 0) {
1497 IWL_WARN(priv, "txpower index %d < 0\n",
1502 /* fill txpower command for this rate/chain */
1503 tx_power.s.radio_tx_gain[c] =
1504 gain_table[band][power_index].radio;
1505 tx_power.s.dsp_predis_atten[c] =
1506 gain_table[band][power_index].dsp;
1508 IWL_DEBUG_TXPOWER("chain %d mimo %d index %d "
1509 "gain 0x%02x dsp %d\n",
1510 c, atten_value, power_index,
1511 tx_power.s.radio_tx_gain[c],
1512 tx_power.s.dsp_predis_atten[c]);
1513 } /* for each chain */
1515 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1517 } /* for each rate */
1523 * iwl4965_send_tx_power - Configure the TXPOWER level user limit
1525 * Uses the active RXON for channel, band, and characteristics (fat, high)
1526 * The power limit is taken from priv->tx_power_user_lmt.
1528 static int iwl4965_send_tx_power(struct iwl_priv *priv)
1530 struct iwl4965_txpowertable_cmd cmd = { 0 };
1534 u8 ctrl_chan_high = 0;
1536 if (test_bit(STATUS_SCANNING, &priv->status)) {
1537 /* If this gets hit a lot, switch it to a BUG() and catch
1538 * the stack trace to find out who is calling this during
1540 IWL_WARN(priv, "TX Power requested while scanning!\n");
1544 band = priv->band == IEEE80211_BAND_2GHZ;
1546 is_fat = is_fat_channel(priv->active_rxon.flags);
1549 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1553 cmd.channel = priv->active_rxon.channel;
1555 ret = iwl4965_fill_txpower_tbl(priv, band,
1556 le16_to_cpu(priv->active_rxon.channel),
1557 is_fat, ctrl_chan_high, &cmd.tx_power);
1561 ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
1567 static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
1570 struct iwl4965_rxon_assoc_cmd rxon_assoc;
1571 const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
1572 const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
1574 if ((rxon1->flags == rxon2->flags) &&
1575 (rxon1->filter_flags == rxon2->filter_flags) &&
1576 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1577 (rxon1->ofdm_ht_single_stream_basic_rates ==
1578 rxon2->ofdm_ht_single_stream_basic_rates) &&
1579 (rxon1->ofdm_ht_dual_stream_basic_rates ==
1580 rxon2->ofdm_ht_dual_stream_basic_rates) &&
1581 (rxon1->rx_chain == rxon2->rx_chain) &&
1582 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1583 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1587 rxon_assoc.flags = priv->staging_rxon.flags;
1588 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1589 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1590 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1591 rxon_assoc.reserved = 0;
1592 rxon_assoc.ofdm_ht_single_stream_basic_rates =
1593 priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1594 rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1595 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1596 rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1598 ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
1599 sizeof(rxon_assoc), &rxon_assoc, NULL);
1606 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
1607 static int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1612 u8 ctrl_chan_high = 0;
1613 struct iwl4965_channel_switch_cmd cmd = { 0 };
1614 const struct iwl_channel_info *ch_info;
1616 band = priv->band == IEEE80211_BAND_2GHZ;
1618 ch_info = iwl_get_channel_info(priv, priv->band, channel);
1620 is_fat = is_fat_channel(priv->staging_rxon.flags);
1623 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1627 cmd.expect_beacon = 0;
1628 cmd.channel = cpu_to_le16(channel);
1629 cmd.rxon_flags = priv->active_rxon.flags;
1630 cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
1631 cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1633 cmd.expect_beacon = is_channel_radar(ch_info);
1635 cmd.expect_beacon = 1;
1637 rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_fat,
1638 ctrl_chan_high, &cmd.tx_power);
1640 IWL_DEBUG_11H("error:%d fill txpower_tbl\n", rc);
1644 rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1650 * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1652 static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
1653 struct iwl_tx_queue *txq,
1656 struct iwl4965_scd_bc_tbl *scd_bc_tbl = priv->scd_bc_tbls.addr;
1657 int txq_id = txq->q.id;
1658 int write_ptr = txq->q.write_ptr;
1659 int len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
1662 WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
1664 bc_ent = cpu_to_le16(len & 0xFFF);
1665 /* Set up byte count within first 256 entries */
1666 scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent;
1668 /* If within first 64 entries, duplicate at end */
1669 if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
1671 tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent;
1675 * sign_extend - Sign extend a value using specified bit as sign-bit
1677 * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
1678 * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
1680 * @param oper value to sign extend
1681 * @param index 0 based bit index (0<=index<32) to sign bit
1683 static s32 sign_extend(u32 oper, int index)
1685 u8 shift = 31 - index;
1687 return (s32)(oper << shift) >> shift;
1691 * iwl4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
1692 * @statistics: Provides the temperature reading from the uCode
1694 * A return of <0 indicates bogus data in the statistics
1696 static int iwl4965_hw_get_temperature(const struct iwl_priv *priv)
1703 if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
1704 (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)) {
1705 IWL_DEBUG_TEMP("Running FAT temperature calibration\n");
1706 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
1707 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
1708 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
1709 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
1711 IWL_DEBUG_TEMP("Running temperature calibration\n");
1712 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
1713 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
1714 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
1715 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
1719 * Temperature is only 23 bits, so sign extend out to 32.
1721 * NOTE If we haven't received a statistics notification yet
1722 * with an updated temperature, use R4 provided to us in the
1723 * "initialize" ALIVE response.
1725 if (!test_bit(STATUS_TEMPERATURE, &priv->status))
1726 vt = sign_extend(R4, 23);
1729 le32_to_cpu(priv->statistics.general.temperature), 23);
1731 IWL_DEBUG_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
1734 IWL_ERR(priv, "Calibration conflict R1 == R3\n");
1738 /* Calculate temperature in degrees Kelvin, adjust by 97%.
1739 * Add offset to center the adjustment around 0 degrees Centigrade. */
1740 temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
1741 temperature /= (R3 - R1);
1742 temperature = (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET;
1744 IWL_DEBUG_TEMP("Calibrated temperature: %dK, %dC\n",
1745 temperature, KELVIN_TO_CELSIUS(temperature));
1750 /* Adjust Txpower only if temperature variance is greater than threshold. */
1751 #define IWL_TEMPERATURE_THRESHOLD 3
1754 * iwl4965_is_temp_calib_needed - determines if new calibration is needed
1756 * If the temperature changed has changed sufficiently, then a recalibration
1759 * Assumes caller will replace priv->last_temperature once calibration
1762 static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
1766 if (!test_bit(STATUS_STATISTICS, &priv->status)) {
1767 IWL_DEBUG_TEMP("Temperature not updated -- no statistics.\n");
1771 temp_diff = priv->temperature - priv->last_temperature;
1773 /* get absolute value */
1774 if (temp_diff < 0) {
1775 IWL_DEBUG_POWER("Getting cooler, delta %d, \n", temp_diff);
1776 temp_diff = -temp_diff;
1777 } else if (temp_diff == 0)
1778 IWL_DEBUG_POWER("Same temp, \n");
1780 IWL_DEBUG_POWER("Getting warmer, delta %d, \n", temp_diff);
1782 if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
1783 IWL_DEBUG_POWER("Thermal txpower calib not needed\n");
1787 IWL_DEBUG_POWER("Thermal txpower calib needed\n");
1792 static void iwl4965_temperature_calib(struct iwl_priv *priv)
1796 temp = iwl4965_hw_get_temperature(priv);
1800 if (priv->temperature != temp) {
1801 if (priv->temperature)
1802 IWL_DEBUG_TEMP("Temperature changed "
1803 "from %dC to %dC\n",
1804 KELVIN_TO_CELSIUS(priv->temperature),
1805 KELVIN_TO_CELSIUS(temp));
1807 IWL_DEBUG_TEMP("Temperature "
1808 "initialized to %dC\n",
1809 KELVIN_TO_CELSIUS(temp));
1812 priv->temperature = temp;
1813 set_bit(STATUS_TEMPERATURE, &priv->status);
1815 if (!priv->disable_tx_power_cal &&
1816 unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
1817 iwl4965_is_temp_calib_needed(priv))
1818 queue_work(priv->workqueue, &priv->txpower_work);
1822 * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
1824 static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
1827 /* Simply stop the queue, but don't change any configuration;
1828 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
1829 iwl_write_prph(priv,
1830 IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
1831 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
1832 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
1836 * txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE
1837 * priv->lock must be held by the caller
1839 static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
1840 u16 ssn_idx, u8 tx_fifo)
1844 if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1845 (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) {
1847 "queue number out of range: %d, must be %d to %d\n",
1848 txq_id, IWL49_FIRST_AMPDU_QUEUE,
1849 IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1);
1853 ret = iwl_grab_nic_access(priv);
1857 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1859 iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1861 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1862 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1863 /* supposes that ssn_idx is valid (!= 0xFFF) */
1864 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1866 iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1867 iwl_txq_ctx_deactivate(priv, txq_id);
1868 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
1870 iwl_release_nic_access(priv);
1876 * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
1878 static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
1885 scd_q2ratid = ra_tid & IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
1887 tbl_dw_addr = priv->scd_base_addr +
1888 IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
1890 tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
1893 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
1895 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
1897 iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
1904 * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
1906 * NOTE: txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE,
1907 * i.e. it must be one of the higher queues used for aggregation
1909 static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id,
1910 int tx_fifo, int sta_id, int tid, u16 ssn_idx)
1912 unsigned long flags;
1916 if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1917 (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) {
1919 "queue number out of range: %d, must be %d to %d\n",
1920 txq_id, IWL49_FIRST_AMPDU_QUEUE,
1921 IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1);
1925 ra_tid = BUILD_RAxTID(sta_id, tid);
1927 /* Modify device's station table to Tx this TID */
1928 iwl_sta_tx_modify_enable_tid(priv, sta_id, tid);
1930 spin_lock_irqsave(&priv->lock, flags);
1931 ret = iwl_grab_nic_access(priv);
1933 spin_unlock_irqrestore(&priv->lock, flags);
1937 /* Stop this Tx queue before configuring it */
1938 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1940 /* Map receiver-address / traffic-ID to this queue */
1941 iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
1943 /* Set this queue as a chain-building queue */
1944 iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1946 /* Place first TFD at index corresponding to start sequence number.
1947 * Assumes that ssn_idx is valid (!= 0xFFF) */
1948 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1949 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1950 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1952 /* Set up Tx window size and frame limit for this queue */
1953 iwl_write_targ_mem(priv,
1954 priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
1955 (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
1956 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
1958 iwl_write_targ_mem(priv, priv->scd_base_addr +
1959 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
1960 (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
1961 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
1963 iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1965 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
1966 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
1968 iwl_release_nic_access(priv);
1969 spin_unlock_irqrestore(&priv->lock, flags);
1975 static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len)
1979 return (u16) sizeof(struct iwl4965_rxon_cmd);
1985 static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
1987 struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
1988 addsta->mode = cmd->mode;
1989 memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
1990 memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
1991 addsta->station_flags = cmd->station_flags;
1992 addsta->station_flags_msk = cmd->station_flags_msk;
1993 addsta->tid_disable_tx = cmd->tid_disable_tx;
1994 addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
1995 addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
1996 addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
1997 addsta->reserved1 = __constant_cpu_to_le16(0);
1998 addsta->reserved2 = __constant_cpu_to_le32(0);
2000 return (u16)sizeof(struct iwl4965_addsta_cmd);
2003 static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
2005 return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
2009 * iwl4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
2011 static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
2012 struct iwl_ht_agg *agg,
2013 struct iwl4965_tx_resp *tx_resp,
2014 int txq_id, u16 start_idx)
2017 struct agg_tx_status *frame_status = tx_resp->u.agg_status;
2018 struct ieee80211_tx_info *info = NULL;
2019 struct ieee80211_hdr *hdr = NULL;
2020 u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
2023 if (agg->wait_for_ba)
2024 IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
2026 agg->frame_count = tx_resp->frame_count;
2027 agg->start_idx = start_idx;
2028 agg->rate_n_flags = rate_n_flags;
2031 /* num frames attempted by Tx command */
2032 if (agg->frame_count == 1) {
2033 /* Only one frame was attempted; no block-ack will arrive */
2034 status = le16_to_cpu(frame_status[0].status);
2037 /* FIXME: code repetition */
2038 IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
2039 agg->frame_count, agg->start_idx, idx);
2041 info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]);
2042 info->status.rates[0].count = tx_resp->failure_frame + 1;
2043 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
2044 info->flags |= iwl_is_tx_success(status) ?
2045 IEEE80211_TX_STAT_ACK : 0;
2046 iwl_hwrate_to_tx_control(priv, rate_n_flags, info);
2047 /* FIXME: code repetition end */
2049 IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
2050 status & 0xff, tx_resp->failure_frame);
2051 IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n", rate_n_flags);
2053 agg->wait_for_ba = 0;
2055 /* Two or more frames were attempted; expect block-ack */
2057 int start = agg->start_idx;
2059 /* Construct bit-map of pending frames within Tx window */
2060 for (i = 0; i < agg->frame_count; i++) {
2062 status = le16_to_cpu(frame_status[i].status);
2063 seq = le16_to_cpu(frame_status[i].sequence);
2064 idx = SEQ_TO_INDEX(seq);
2065 txq_id = SEQ_TO_QUEUE(seq);
2067 if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
2068 AGG_TX_STATE_ABORT_MSK))
2071 IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
2072 agg->frame_count, txq_id, idx);
2074 hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
2076 sc = le16_to_cpu(hdr->seq_ctrl);
2077 if (idx != (SEQ_TO_SN(sc) & 0xff)) {
2079 "BUG_ON idx doesn't match seq control"
2080 " idx=%d, seq_idx=%d, seq=%d\n",
2081 idx, SEQ_TO_SN(sc), hdr->seq_ctrl);
2085 IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
2086 i, idx, SEQ_TO_SN(sc));
2090 sh = (start - idx) + 0xff;
2091 bitmap = bitmap << sh;
2094 } else if (sh < -64)
2095 sh = 0xff - (start - idx);
2099 bitmap = bitmap << sh;
2102 bitmap |= 1ULL << sh;
2103 IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%llx\n",
2104 start, (unsigned long long)bitmap);
2107 agg->bitmap = bitmap;
2108 agg->start_idx = start;
2109 IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
2110 agg->frame_count, agg->start_idx,
2111 (unsigned long long)agg->bitmap);
2114 agg->wait_for_ba = 1;
2120 * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
2122 static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
2123 struct iwl_rx_mem_buffer *rxb)
2125 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2126 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
2127 int txq_id = SEQ_TO_QUEUE(sequence);
2128 int index = SEQ_TO_INDEX(sequence);
2129 struct iwl_tx_queue *txq = &priv->txq[txq_id];
2130 struct ieee80211_hdr *hdr;
2131 struct ieee80211_tx_info *info;
2132 struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
2133 u32 status = le32_to_cpu(tx_resp->u.status);
2134 int tid = MAX_TID_COUNT;
2139 if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
2140 IWL_ERR(priv, "Read index for DMA queue txq_id (%d) index %d "
2141 "is out of range [0-%d] %d %d\n", txq_id,
2142 index, txq->q.n_bd, txq->q.write_ptr,
2147 info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
2148 memset(&info->status, 0, sizeof(info->status));
2150 hdr = iwl_tx_queue_get_hdr(priv, txq_id, index);
2151 if (ieee80211_is_data_qos(hdr->frame_control)) {
2152 qc = ieee80211_get_qos_ctl(hdr);
2156 sta_id = iwl_get_ra_sta_id(priv, hdr);
2157 if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
2158 IWL_ERR(priv, "Station not known\n");
2162 if (txq->sched_retry) {
2163 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
2164 struct iwl_ht_agg *agg = NULL;
2168 agg = &priv->stations[sta_id].tid[tid].agg;
2170 iwl4965_tx_status_reply_tx(priv, agg, tx_resp, txq_id, index);
2172 /* check if BAR is needed */
2173 if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status))
2174 info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
2176 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
2177 index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
2178 IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
2179 "%d index %d\n", scd_ssn , index);
2180 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2181 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2183 if (priv->mac80211_registered &&
2184 (iwl_queue_space(&txq->q) > txq->q.low_mark) &&
2185 (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)) {
2186 if (agg->state == IWL_AGG_OFF)
2187 ieee80211_wake_queue(priv->hw, txq_id);
2189 ieee80211_wake_queue(priv->hw,
2194 info->status.rates[0].count = tx_resp->failure_frame + 1;
2195 info->flags |= iwl_is_tx_success(status) ?
2196 IEEE80211_TX_STAT_ACK : 0;
2197 iwl_hwrate_to_tx_control(priv,
2198 le32_to_cpu(tx_resp->rate_n_flags),
2201 IWL_DEBUG_TX_REPLY("TXQ %d status %s (0x%08x) "
2202 "rate_n_flags 0x%x retries %d\n",
2204 iwl_get_tx_fail_reason(status), status,
2205 le32_to_cpu(tx_resp->rate_n_flags),
2206 tx_resp->failure_frame);
2208 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2209 if (qc && likely(sta_id != IWL_INVALID_STATION))
2210 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2212 if (priv->mac80211_registered &&
2213 (iwl_queue_space(&txq->q) > txq->q.low_mark))
2214 ieee80211_wake_queue(priv->hw, txq_id);
2217 if (qc && likely(sta_id != IWL_INVALID_STATION))
2218 iwl_txq_check_empty(priv, sta_id, tid, txq_id);
2220 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
2221 IWL_ERR(priv, "TODO: Implement Tx ABORT REQUIRED!!!\n");
2224 static int iwl4965_calc_rssi(struct iwl_priv *priv,
2225 struct iwl_rx_phy_res *rx_resp)
2227 /* data from PHY/DSP regarding signal strength, etc.,
2228 * contents are always there, not configurable by host. */
2229 struct iwl4965_rx_non_cfg_phy *ncphy =
2230 (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy_buf;
2231 u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL49_AGC_DB_MASK)
2232 >> IWL49_AGC_DB_POS;
2234 u32 valid_antennae =
2235 (le16_to_cpu(rx_resp->phy_flags) & IWL49_RX_PHY_FLAGS_ANTENNAE_MASK)
2236 >> IWL49_RX_PHY_FLAGS_ANTENNAE_OFFSET;
2240 /* Find max rssi among 3 possible receivers.
2241 * These values are measured by the digital signal processor (DSP).
2242 * They should stay fairly constant even as the signal strength varies,
2243 * if the radio's automatic gain control (AGC) is working right.
2244 * AGC value (see below) will provide the "interesting" info. */
2245 for (i = 0; i < 3; i++)
2246 if (valid_antennae & (1 << i))
2247 max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
2249 IWL_DEBUG_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
2250 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
2253 /* dBm = max_rssi dB - agc dB - constant.
2254 * Higher AGC (higher radio gain) means lower signal. */
2255 return max_rssi - agc - IWL49_RSSI_OFFSET;
2259 /* Set up 4965-specific Rx frame reply handlers */
2260 static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
2262 /* Legacy Rx frames */
2263 priv->rx_handlers[REPLY_RX] = iwl_rx_reply_rx;
2265 priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
2268 static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
2270 INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
2273 static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
2275 cancel_work_sync(&priv->txpower_work);
2279 static struct iwl_hcmd_ops iwl4965_hcmd = {
2280 .rxon_assoc = iwl4965_send_rxon_assoc,
2283 static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
2284 .get_hcmd_size = iwl4965_get_hcmd_size,
2285 .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
2286 .chain_noise_reset = iwl4965_chain_noise_reset,
2287 .gain_computation = iwl4965_gain_computation,
2288 .rts_tx_cmd_flag = iwl4965_rts_tx_cmd_flag,
2289 .calc_rssi = iwl4965_calc_rssi,
2292 static struct iwl_lib_ops iwl4965_lib = {
2293 .set_hw_params = iwl4965_hw_set_hw_params,
2294 .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
2295 .txq_set_sched = iwl4965_txq_set_sched,
2296 .txq_agg_enable = iwl4965_txq_agg_enable,
2297 .txq_agg_disable = iwl4965_txq_agg_disable,
2298 .rx_handler_setup = iwl4965_rx_handler_setup,
2299 .setup_deferred_work = iwl4965_setup_deferred_work,
2300 .cancel_deferred_work = iwl4965_cancel_deferred_work,
2301 .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
2302 .alive_notify = iwl4965_alive_notify,
2303 .init_alive_start = iwl4965_init_alive_start,
2304 .load_ucode = iwl4965_load_bsm,
2306 .init = iwl4965_apm_init,
2307 .reset = iwl4965_apm_reset,
2308 .stop = iwl4965_apm_stop,
2309 .config = iwl4965_nic_config,
2310 .set_pwr_src = iwl_set_pwr_src,
2313 .regulatory_bands = {
2314 EEPROM_REGULATORY_BAND_1_CHANNELS,
2315 EEPROM_REGULATORY_BAND_2_CHANNELS,
2316 EEPROM_REGULATORY_BAND_3_CHANNELS,
2317 EEPROM_REGULATORY_BAND_4_CHANNELS,
2318 EEPROM_REGULATORY_BAND_5_CHANNELS,
2319 EEPROM_4965_REGULATORY_BAND_24_FAT_CHANNELS,
2320 EEPROM_4965_REGULATORY_BAND_52_FAT_CHANNELS
2322 .verify_signature = iwlcore_eeprom_verify_signature,
2323 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
2324 .release_semaphore = iwlcore_eeprom_release_semaphore,
2325 .calib_version = iwl4965_eeprom_calib_version,
2326 .query_addr = iwlcore_eeprom_query_addr,
2328 .send_tx_power = iwl4965_send_tx_power,
2329 .update_chain_flags = iwl_update_chain_flags,
2330 .temperature = iwl4965_temperature_calib,
2333 static struct iwl_ops iwl4965_ops = {
2334 .lib = &iwl4965_lib,
2335 .hcmd = &iwl4965_hcmd,
2336 .utils = &iwl4965_hcmd_utils,
2339 struct iwl_cfg iwl4965_agn_cfg = {
2341 .fw_name_pre = IWL4965_FW_PRE,
2342 .ucode_api_max = IWL4965_UCODE_API_MAX,
2343 .ucode_api_min = IWL4965_UCODE_API_MIN,
2344 .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
2345 .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
2346 .eeprom_ver = EEPROM_4965_EEPROM_VERSION,
2347 .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION,
2348 .ops = &iwl4965_ops,
2349 .mod_params = &iwl4965_mod_params,
2352 /* Module firmware */
2353 MODULE_FIRMWARE(IWL4965_MODULE_FIRMWARE(IWL4965_UCODE_API_MAX));
2355 module_param_named(antenna, iwl4965_mod_params.antenna, int, 0444);
2356 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
2357 module_param_named(disable, iwl4965_mod_params.disable, int, 0444);
2358 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
2359 module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, 0444);
2360 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
2361 module_param_named(debug, iwl4965_mod_params.debug, uint, 0444);
2362 MODULE_PARM_DESC(debug, "debug output mask");
2364 disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, 0444);
2365 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
2367 module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, 0444);
2368 MODULE_PARM_DESC(queues_num, "number of hw queues.");
2370 module_param_named(11n_disable, iwl4965_mod_params.disable_11n, int, 0444);
2371 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
2372 module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K, int, 0444);
2373 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
2375 module_param_named(fw_restart4965, iwl4965_mod_params.restart_fw, int, 0444);
2376 MODULE_PARM_DESC(fw_restart4965, "restart firmware in case of error");