1 /******************************************************************************
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
21 * Contact Information:
22 * Intel Linux Wireless <ilw@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 *****************************************************************************/
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/init.h>
30 #include <linux/pci.h>
31 #include <linux/dma-mapping.h>
32 #include <linux/delay.h>
33 #include <linux/skbuff.h>
34 #include <linux/netdevice.h>
35 #include <linux/wireless.h>
36 #include <linux/firmware.h>
37 #include <linux/etherdevice.h>
38 #include <asm/unaligned.h>
39 #include <net/mac80211.h>
42 #include "iwl-3945-fh.h"
43 #include "iwl-commands.h"
46 #include "iwl-eeprom.h"
47 #include "iwl-helpers.h"
50 #include "iwl-3945-led.h"
52 #define IWL_DECLARE_RATE_INFO(r, ip, in, rp, rn, pp, np) \
53 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
54 IWL_RATE_##r##M_IEEE, \
55 IWL_RATE_##ip##M_INDEX, \
56 IWL_RATE_##in##M_INDEX, \
57 IWL_RATE_##rp##M_INDEX, \
58 IWL_RATE_##rn##M_INDEX, \
59 IWL_RATE_##pp##M_INDEX, \
60 IWL_RATE_##np##M_INDEX, \
61 IWL_RATE_##r##M_INDEX_TABLE, \
62 IWL_RATE_##ip##M_INDEX_TABLE }
66 * rate, prev rate, next rate, prev tgg rate, next tgg rate
68 * If there isn't a valid next or previous rate then INV is used which
69 * maps to IWL_RATE_INVALID
72 const struct iwl3945_rate_info iwl3945_rates[IWL_RATE_COUNT_3945] = {
73 IWL_DECLARE_RATE_INFO(1, INV, 2, INV, 2, INV, 2), /* 1mbps */
74 IWL_DECLARE_RATE_INFO(2, 1, 5, 1, 5, 1, 5), /* 2mbps */
75 IWL_DECLARE_RATE_INFO(5, 2, 6, 2, 11, 2, 11), /*5.5mbps */
76 IWL_DECLARE_RATE_INFO(11, 9, 12, 5, 12, 5, 18), /* 11mbps */
77 IWL_DECLARE_RATE_INFO(6, 5, 9, 5, 11, 5, 11), /* 6mbps */
78 IWL_DECLARE_RATE_INFO(9, 6, 11, 5, 11, 5, 11), /* 9mbps */
79 IWL_DECLARE_RATE_INFO(12, 11, 18, 11, 18, 11, 18), /* 12mbps */
80 IWL_DECLARE_RATE_INFO(18, 12, 24, 12, 24, 11, 24), /* 18mbps */
81 IWL_DECLARE_RATE_INFO(24, 18, 36, 18, 36, 18, 36), /* 24mbps */
82 IWL_DECLARE_RATE_INFO(36, 24, 48, 24, 48, 24, 48), /* 36mbps */
83 IWL_DECLARE_RATE_INFO(48, 36, 54, 36, 54, 36, 54), /* 48mbps */
84 IWL_DECLARE_RATE_INFO(54, 48, INV, 48, INV, 48, INV),/* 54mbps */
87 /* 1 = enable the iwl3945_disable_events() function */
88 #define IWL_EVT_DISABLE (0)
89 #define IWL_EVT_DISABLE_SIZE (1532/32)
92 * iwl3945_disable_events - Disable selected events in uCode event log
94 * Disable an event by writing "1"s into "disable"
95 * bitmap in SRAM. Bit position corresponds to Event # (id/type).
96 * Default values of 0 enable uCode events to be logged.
97 * Use for only special debugging. This function is just a placeholder as-is,
98 * you'll need to provide the special bits! ...
99 * ... and set IWL_EVT_DISABLE to 1. */
100 void iwl3945_disable_events(struct iwl_priv *priv)
103 u32 base; /* SRAM address of event log header */
104 u32 disable_ptr; /* SRAM address of event-disable bitmap array */
105 u32 array_size; /* # of u32 entries in array */
106 u32 evt_disable[IWL_EVT_DISABLE_SIZE] = {
107 0x00000000, /* 31 - 0 Event id numbers */
108 0x00000000, /* 63 - 32 */
109 0x00000000, /* 95 - 64 */
110 0x00000000, /* 127 - 96 */
111 0x00000000, /* 159 - 128 */
112 0x00000000, /* 191 - 160 */
113 0x00000000, /* 223 - 192 */
114 0x00000000, /* 255 - 224 */
115 0x00000000, /* 287 - 256 */
116 0x00000000, /* 319 - 288 */
117 0x00000000, /* 351 - 320 */
118 0x00000000, /* 383 - 352 */
119 0x00000000, /* 415 - 384 */
120 0x00000000, /* 447 - 416 */
121 0x00000000, /* 479 - 448 */
122 0x00000000, /* 511 - 480 */
123 0x00000000, /* 543 - 512 */
124 0x00000000, /* 575 - 544 */
125 0x00000000, /* 607 - 576 */
126 0x00000000, /* 639 - 608 */
127 0x00000000, /* 671 - 640 */
128 0x00000000, /* 703 - 672 */
129 0x00000000, /* 735 - 704 */
130 0x00000000, /* 767 - 736 */
131 0x00000000, /* 799 - 768 */
132 0x00000000, /* 831 - 800 */
133 0x00000000, /* 863 - 832 */
134 0x00000000, /* 895 - 864 */
135 0x00000000, /* 927 - 896 */
136 0x00000000, /* 959 - 928 */
137 0x00000000, /* 991 - 960 */
138 0x00000000, /* 1023 - 992 */
139 0x00000000, /* 1055 - 1024 */
140 0x00000000, /* 1087 - 1056 */
141 0x00000000, /* 1119 - 1088 */
142 0x00000000, /* 1151 - 1120 */
143 0x00000000, /* 1183 - 1152 */
144 0x00000000, /* 1215 - 1184 */
145 0x00000000, /* 1247 - 1216 */
146 0x00000000, /* 1279 - 1248 */
147 0x00000000, /* 1311 - 1280 */
148 0x00000000, /* 1343 - 1312 */
149 0x00000000, /* 1375 - 1344 */
150 0x00000000, /* 1407 - 1376 */
151 0x00000000, /* 1439 - 1408 */
152 0x00000000, /* 1471 - 1440 */
153 0x00000000, /* 1503 - 1472 */
156 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
157 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
158 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
162 disable_ptr = iwl_read_targ_mem(priv, base + (4 * sizeof(u32)));
163 array_size = iwl_read_targ_mem(priv, base + (5 * sizeof(u32)));
165 if (IWL_EVT_DISABLE && (array_size == IWL_EVT_DISABLE_SIZE)) {
166 IWL_DEBUG_INFO(priv, "Disabling selected uCode log events at 0x%x\n",
168 for (i = 0; i < IWL_EVT_DISABLE_SIZE; i++)
169 iwl_write_targ_mem(priv,
170 disable_ptr + (i * sizeof(u32)),
174 IWL_DEBUG_INFO(priv, "Selected uCode log events may be disabled\n");
175 IWL_DEBUG_INFO(priv, " by writing \"1\"s into disable bitmap\n");
176 IWL_DEBUG_INFO(priv, " in SRAM at 0x%x, size %d u32s\n",
177 disable_ptr, array_size);
182 static int iwl3945_hwrate_to_plcp_idx(u8 plcp)
186 for (idx = 0; idx < IWL_RATE_COUNT; idx++)
187 if (iwl3945_rates[idx].plcp == plcp)
192 #ifdef CONFIG_IWLWIFI_DEBUG
193 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
195 static const char *iwl3945_get_tx_fail_reason(u32 status)
197 switch (status & TX_STATUS_MSK) {
198 case TX_STATUS_SUCCESS:
200 TX_STATUS_ENTRY(SHORT_LIMIT);
201 TX_STATUS_ENTRY(LONG_LIMIT);
202 TX_STATUS_ENTRY(FIFO_UNDERRUN);
203 TX_STATUS_ENTRY(MGMNT_ABORT);
204 TX_STATUS_ENTRY(NEXT_FRAG);
205 TX_STATUS_ENTRY(LIFE_EXPIRE);
206 TX_STATUS_ENTRY(DEST_PS);
207 TX_STATUS_ENTRY(ABORTED);
208 TX_STATUS_ENTRY(BT_RETRY);
209 TX_STATUS_ENTRY(STA_INVALID);
210 TX_STATUS_ENTRY(FRAG_DROPPED);
211 TX_STATUS_ENTRY(TID_DISABLE);
212 TX_STATUS_ENTRY(FRAME_FLUSHED);
213 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
214 TX_STATUS_ENTRY(TX_LOCKED);
215 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
221 static inline const char *iwl3945_get_tx_fail_reason(u32 status)
228 * get ieee prev rate from rate scale table.
229 * for A and B mode we need to overright prev
232 int iwl3945_rs_next_rate(struct iwl_priv *priv, int rate)
234 int next_rate = iwl3945_get_prev_ieee_rate(rate);
236 switch (priv->band) {
237 case IEEE80211_BAND_5GHZ:
238 if (rate == IWL_RATE_12M_INDEX)
239 next_rate = IWL_RATE_9M_INDEX;
240 else if (rate == IWL_RATE_6M_INDEX)
241 next_rate = IWL_RATE_6M_INDEX;
243 case IEEE80211_BAND_2GHZ:
244 if (!(priv->sta_supp_rates & IWL_OFDM_RATES_MASK) &&
245 iwl_is_associated(priv)) {
246 if (rate == IWL_RATE_11M_INDEX)
247 next_rate = IWL_RATE_5M_INDEX;
260 * iwl3945_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
262 * When FW advances 'R' index, all entries between old and new 'R' index
263 * need to be reclaimed. As result, some free space forms. If there is
264 * enough free space (> low mark), wake the stack that feeds us.
266 static void iwl3945_tx_queue_reclaim(struct iwl_priv *priv,
267 int txq_id, int index)
269 struct iwl_tx_queue *txq = &priv->txq[txq_id];
270 struct iwl_queue *q = &txq->q;
271 struct iwl_tx_info *tx_info;
273 BUG_ON(txq_id == IWL_CMD_QUEUE_NUM);
275 for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
276 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
278 tx_info = &txq->txb[txq->q.read_ptr];
279 ieee80211_tx_status_irqsafe(priv->hw, tx_info->skb[0]);
280 tx_info->skb[0] = NULL;
281 priv->cfg->ops->lib->txq_free_tfd(priv, txq);
284 if (iwl_queue_space(q) > q->low_mark && (txq_id >= 0) &&
285 (txq_id != IWL_CMD_QUEUE_NUM) &&
286 priv->mac80211_registered)
287 iwl_wake_queue(priv, txq_id);
291 * iwl3945_rx_reply_tx - Handle Tx response
293 static void iwl3945_rx_reply_tx(struct iwl_priv *priv,
294 struct iwl_rx_mem_buffer *rxb)
296 struct iwl_rx_packet *pkt = rxb_addr(rxb);
297 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
298 int txq_id = SEQ_TO_QUEUE(sequence);
299 int index = SEQ_TO_INDEX(sequence);
300 struct iwl_tx_queue *txq = &priv->txq[txq_id];
301 struct ieee80211_tx_info *info;
302 struct iwl3945_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
303 u32 status = le32_to_cpu(tx_resp->status);
307 if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
308 IWL_ERR(priv, "Read index for DMA queue txq_id (%d) index %d "
309 "is out of range [0-%d] %d %d\n", txq_id,
310 index, txq->q.n_bd, txq->q.write_ptr,
315 info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
316 ieee80211_tx_info_clear_status(info);
318 /* Fill the MRR chain with some info about on-chip retransmissions */
319 rate_idx = iwl3945_hwrate_to_plcp_idx(tx_resp->rate);
320 if (info->band == IEEE80211_BAND_5GHZ)
321 rate_idx -= IWL_FIRST_OFDM_RATE;
323 fail = tx_resp->failure_frame;
325 info->status.rates[0].idx = rate_idx;
326 info->status.rates[0].count = fail + 1; /* add final attempt */
328 /* tx_status->rts_retry_count = tx_resp->failure_rts; */
329 info->flags |= ((status & TX_STATUS_MSK) == TX_STATUS_SUCCESS) ?
330 IEEE80211_TX_STAT_ACK : 0;
332 IWL_DEBUG_TX(priv, "Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n",
333 txq_id, iwl3945_get_tx_fail_reason(status), status,
334 tx_resp->rate, tx_resp->failure_frame);
336 IWL_DEBUG_TX_REPLY(priv, "Tx queue reclaim %d\n", index);
337 iwl3945_tx_queue_reclaim(priv, txq_id, index);
339 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
340 IWL_ERR(priv, "TODO: Implement Tx ABORT REQUIRED!!!\n");
345 /*****************************************************************************
347 * Intel PRO/Wireless 3945ABG/BG Network Connection
349 * RX handler implementations
351 *****************************************************************************/
353 void iwl3945_hw_rx_statistics(struct iwl_priv *priv,
354 struct iwl_rx_mem_buffer *rxb)
356 struct iwl_rx_packet *pkt = rxb_addr(rxb);
357 IWL_DEBUG_RX(priv, "Statistics notification received (%d vs %d).\n",
358 (int)sizeof(struct iwl3945_notif_statistics),
359 le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
361 memcpy(&priv->statistics_39, pkt->u.raw, sizeof(priv->statistics_39));
363 iwl_leds_background(priv);
366 /******************************************************************************
368 * Misc. internal state and helper functions
370 ******************************************************************************/
371 #ifdef CONFIG_IWLWIFI_DEBUG
374 * iwl3945_report_frame - dump frame to syslog during debug sessions
376 * You may hack this function to show different aspects of received frames,
377 * including selective frame dumps.
378 * group100 parameter selects whether to show 1 out of 100 good frames.
380 static void _iwl3945_dbg_report_frame(struct iwl_priv *priv,
381 struct iwl_rx_packet *pkt,
382 struct ieee80211_hdr *header, int group100)
385 u32 print_summary = 0;
386 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
402 struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
403 struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
404 struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
405 u8 *data = IWL_RX_DATA(pkt);
408 fc = header->frame_control;
409 seq_ctl = le16_to_cpu(header->seq_ctrl);
412 channel = le16_to_cpu(rx_hdr->channel);
413 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
414 length = le16_to_cpu(rx_hdr->len);
416 /* end-of-frame status and timestamp */
417 status = le32_to_cpu(rx_end->status);
418 bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
419 tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
420 tsf = le64_to_cpu(rx_end->timestamp);
422 /* signal statistics */
423 rssi = rx_stats->rssi;
425 sig_avg = le16_to_cpu(rx_stats->sig_avg);
426 noise_diff = le16_to_cpu(rx_stats->noise_diff);
428 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
430 /* if data frame is to us and all is good,
431 * (optionally) print summary for only 1 out of every 100 */
432 if (to_us && (fc & ~cpu_to_le16(IEEE80211_FCTL_PROTECTED)) ==
433 cpu_to_le16(IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
436 print_summary = 1; /* print each frame */
437 else if (priv->framecnt_to_us < 100) {
438 priv->framecnt_to_us++;
441 priv->framecnt_to_us = 0;
446 /* print summary for all other frames */
456 else if (ieee80211_has_retry(fc))
458 else if (ieee80211_is_assoc_resp(fc))
460 else if (ieee80211_is_reassoc_resp(fc))
462 else if (ieee80211_is_probe_resp(fc)) {
464 print_dump = 1; /* dump frame contents */
465 } else if (ieee80211_is_beacon(fc)) {
467 print_dump = 1; /* dump frame contents */
468 } else if (ieee80211_is_atim(fc))
470 else if (ieee80211_is_auth(fc))
472 else if (ieee80211_is_deauth(fc))
474 else if (ieee80211_is_disassoc(fc))
479 rate = iwl3945_hwrate_to_plcp_idx(rx_hdr->rate);
483 rate = iwl3945_rates[rate].ieee / 2;
485 /* print frame summary.
486 * MAC addresses show just the last byte (for brevity),
487 * but you can hack it to show more, if you'd like to. */
489 IWL_DEBUG_RX(priv, "%s: mhd=0x%04x, dst=0x%02x, "
490 "len=%u, rssi=%d, chnl=%d, rate=%d, \n",
491 title, le16_to_cpu(fc), header->addr1[5],
492 length, rssi, channel, rate);
494 /* src/dst addresses assume managed mode */
495 IWL_DEBUG_RX(priv, "%s: 0x%04x, dst=0x%02x, "
496 "src=0x%02x, rssi=%u, tim=%lu usec, "
497 "phy=0x%02x, chnl=%d\n",
498 title, le16_to_cpu(fc), header->addr1[5],
499 header->addr3[5], rssi,
500 tsf_low - priv->scan_start_tsf,
505 iwl_print_hex_dump(priv, IWL_DL_RX, data, length);
508 static void iwl3945_dbg_report_frame(struct iwl_priv *priv,
509 struct iwl_rx_packet *pkt,
510 struct ieee80211_hdr *header, int group100)
512 if (iwl_get_debug_level(priv) & IWL_DL_RX)
513 _iwl3945_dbg_report_frame(priv, pkt, header, group100);
517 static inline void iwl3945_dbg_report_frame(struct iwl_priv *priv,
518 struct iwl_rx_packet *pkt,
519 struct ieee80211_hdr *header, int group100)
524 /* This is necessary only for a number of statistics, see the caller. */
525 static int iwl3945_is_network_packet(struct iwl_priv *priv,
526 struct ieee80211_hdr *header)
528 /* Filter incoming packets to determine if they are targeted toward
529 * this network, discarding packets coming from ourselves */
530 switch (priv->iw_mode) {
531 case NL80211_IFTYPE_ADHOC: /* Header: Dest. | Source | BSSID */
532 /* packets to our IBSS update information */
533 return !compare_ether_addr(header->addr3, priv->bssid);
534 case NL80211_IFTYPE_STATION: /* Header: Dest. | AP{BSSID} | Source */
535 /* packets to our IBSS update information */
536 return !compare_ether_addr(header->addr2, priv->bssid);
542 static void iwl3945_pass_packet_to_mac80211(struct iwl_priv *priv,
543 struct iwl_rx_mem_buffer *rxb,
544 struct ieee80211_rx_status *stats)
546 struct iwl_rx_packet *pkt = rxb_addr(rxb);
547 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
548 struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
549 struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
550 u16 len = le16_to_cpu(rx_hdr->len);
554 /* We received data from the HW, so stop the watchdog */
555 if (unlikely(len + IWL39_RX_FRAME_SIZE >
556 PAGE_SIZE << priv->hw_params.rx_page_order)) {
557 IWL_DEBUG_DROP(priv, "Corruption detected!\n");
561 /* We only process data packets if the interface is open */
562 if (unlikely(!priv->is_open)) {
563 IWL_DEBUG_DROP_LIMIT(priv,
564 "Dropping packet while interface is not open.\n");
568 skb = alloc_skb(IWL_LINK_HDR_MAX, GFP_ATOMIC);
570 IWL_ERR(priv, "alloc_skb failed\n");
574 if (!iwl3945_mod_params.sw_crypto)
575 iwl_set_decrypted_flag(priv,
576 (struct ieee80211_hdr *)rxb_addr(rxb),
577 le32_to_cpu(rx_end->status), stats);
579 skb_add_rx_frag(skb, 0, rxb->page,
580 (void *)rx_hdr->payload - (void *)pkt, len);
582 /* mac80211 currently doesn't support paged SKB. Convert it to
583 * linear SKB for management frame and data frame requires
584 * software decryption or software defragementation. */
585 if (ieee80211_is_mgmt(hdr->frame_control) ||
586 ieee80211_has_protected(hdr->frame_control) ||
587 ieee80211_has_morefrags(hdr->frame_control) ||
588 le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG)
589 ret = skb_linearize(skb);
591 ret = __pskb_pull_tail(skb, min_t(u16, IWL_LINK_HDR_MAX, len)) ?
599 iwl_update_stats(priv, false, hdr->frame_control, len);
601 memcpy(IEEE80211_SKB_RXCB(skb), stats, sizeof(*stats));
602 ieee80211_rx(priv->hw, skb);
605 priv->alloc_rxb_page--;
609 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
611 static void iwl3945_rx_reply_rx(struct iwl_priv *priv,
612 struct iwl_rx_mem_buffer *rxb)
614 struct ieee80211_hdr *header;
615 struct ieee80211_rx_status rx_status;
616 struct iwl_rx_packet *pkt = rxb_addr(rxb);
617 struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
618 struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
619 struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
621 u16 rx_stats_sig_avg = le16_to_cpu(rx_stats->sig_avg);
622 u16 rx_stats_noise_diff = le16_to_cpu(rx_stats->noise_diff);
626 rx_status.mactime = le64_to_cpu(rx_end->timestamp);
628 ieee80211_channel_to_frequency(le16_to_cpu(rx_hdr->channel));
629 rx_status.band = (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
630 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
632 rx_status.rate_idx = iwl3945_hwrate_to_plcp_idx(rx_hdr->rate);
633 if (rx_status.band == IEEE80211_BAND_5GHZ)
634 rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
636 rx_status.antenna = (le16_to_cpu(rx_hdr->phy_flags) &
637 RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
639 /* set the preamble flag if appropriate */
640 if (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
641 rx_status.flag |= RX_FLAG_SHORTPRE;
643 if ((unlikely(rx_stats->phy_count > 20))) {
644 IWL_DEBUG_DROP(priv, "dsp size out of range [0,20]: %d/n",
645 rx_stats->phy_count);
649 if (!(rx_end->status & RX_RES_STATUS_NO_CRC32_ERROR)
650 || !(rx_end->status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
651 IWL_DEBUG_RX(priv, "Bad CRC or FIFO: 0x%08X.\n", rx_end->status);
657 /* Convert 3945's rssi indicator to dBm */
658 rx_status.signal = rx_stats->rssi - IWL39_RSSI_OFFSET;
660 /* Set default noise value to -127 */
661 if (priv->last_rx_noise == 0)
662 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
664 /* 3945 provides noise info for OFDM frames only.
665 * sig_avg and noise_diff are measured by the 3945's digital signal
666 * processor (DSP), and indicate linear levels of signal level and
667 * distortion/noise within the packet preamble after
668 * automatic gain control (AGC). sig_avg should stay fairly
669 * constant if the radio's AGC is working well.
670 * Since these values are linear (not dB or dBm), linear
671 * signal-to-noise ratio (SNR) is (sig_avg / noise_diff).
672 * Convert linear SNR to dB SNR, then subtract that from rssi dBm
673 * to obtain noise level in dBm.
674 * Calculate rx_status.signal (quality indicator in %) based on SNR. */
675 if (rx_stats_noise_diff) {
676 snr = rx_stats_sig_avg / rx_stats_noise_diff;
677 rx_status.noise = rx_status.signal -
678 iwl3945_calc_db_from_ratio(snr);
679 rx_status.qual = iwl3945_calc_sig_qual(rx_status.signal,
682 /* If noise info not available, calculate signal quality indicator (%)
683 * using just the dBm signal level. */
685 rx_status.noise = priv->last_rx_noise;
686 rx_status.qual = iwl3945_calc_sig_qual(rx_status.signal, 0);
690 IWL_DEBUG_STATS(priv, "Rssi %d noise %d qual %d sig_avg %d noise_diff %d\n",
691 rx_status.signal, rx_status.noise, rx_status.qual,
692 rx_stats_sig_avg, rx_stats_noise_diff);
694 header = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
696 network_packet = iwl3945_is_network_packet(priv, header);
698 IWL_DEBUG_STATS_LIMIT(priv, "[%c] %d RSSI:%d Signal:%u, Noise:%u, Rate:%u\n",
699 network_packet ? '*' : ' ',
700 le16_to_cpu(rx_hdr->channel),
701 rx_status.signal, rx_status.signal,
702 rx_status.noise, rx_status.rate_idx);
704 /* Set "1" to report good data frames in groups of 100 */
705 iwl3945_dbg_report_frame(priv, pkt, header, 1);
706 iwl_dbg_log_rx_data_frame(priv, le16_to_cpu(rx_hdr->len), header);
708 if (network_packet) {
709 priv->last_beacon_time = le32_to_cpu(rx_end->beacon_timestamp);
710 priv->last_tsf = le64_to_cpu(rx_end->timestamp);
711 priv->last_rx_rssi = rx_status.signal;
712 priv->last_rx_noise = rx_status.noise;
715 iwl3945_pass_packet_to_mac80211(priv, rxb, &rx_status);
718 int iwl3945_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
719 struct iwl_tx_queue *txq,
720 dma_addr_t addr, u16 len, u8 reset, u8 pad)
724 struct iwl3945_tfd *tfd, *tfd_tmp;
727 tfd_tmp = (struct iwl3945_tfd *)txq->tfds;
728 tfd = &tfd_tmp[q->write_ptr];
731 memset(tfd, 0, sizeof(*tfd));
733 count = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
735 if ((count >= NUM_TFD_CHUNKS) || (count < 0)) {
736 IWL_ERR(priv, "Error can not send more than %d chunks\n",
741 tfd->tbs[count].addr = cpu_to_le32(addr);
742 tfd->tbs[count].len = cpu_to_le32(len);
746 tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(count) |
747 TFD_CTL_PAD_SET(pad));
753 * iwl3945_hw_txq_free_tfd - Free one TFD, those at index [txq->q.read_ptr]
755 * Does NOT advance any indexes
757 void iwl3945_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
759 struct iwl3945_tfd *tfd_tmp = (struct iwl3945_tfd *)txq->tfds;
760 int index = txq->q.read_ptr;
761 struct iwl3945_tfd *tfd = &tfd_tmp[index];
762 struct pci_dev *dev = priv->pci_dev;
767 counter = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
768 if (counter > NUM_TFD_CHUNKS) {
769 IWL_ERR(priv, "Too many chunks: %i\n", counter);
770 /* @todo issue fatal error, it is quite serious situation */
776 pci_unmap_single(dev,
777 pci_unmap_addr(&txq->meta[index], mapping),
778 pci_unmap_len(&txq->meta[index], len),
781 /* unmap chunks if any */
783 for (i = 1; i < counter; i++) {
784 pci_unmap_single(dev, le32_to_cpu(tfd->tbs[i].addr),
785 le32_to_cpu(tfd->tbs[i].len), PCI_DMA_TODEVICE);
786 if (txq->txb[txq->q.read_ptr].skb[0]) {
787 struct sk_buff *skb = txq->txb[txq->q.read_ptr].skb[0];
788 if (txq->txb[txq->q.read_ptr].skb[0]) {
789 /* Can be called from interrupt context */
790 dev_kfree_skb_any(skb);
791 txq->txb[txq->q.read_ptr].skb[0] = NULL;
799 * iwl3945_hw_build_tx_cmd_rate - Add rate portion to TX_CMD:
802 void iwl3945_hw_build_tx_cmd_rate(struct iwl_priv *priv,
803 struct iwl_device_cmd *cmd,
804 struct ieee80211_tx_info *info,
805 struct ieee80211_hdr *hdr,
806 int sta_id, int tx_id)
808 u16 hw_value = ieee80211_get_tx_rate(priv->hw, info)->hw_value;
809 u16 rate_index = min(hw_value & 0xffff, IWL_RATE_COUNT - 1);
815 __le16 fc = hdr->frame_control;
816 struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
818 rate = iwl3945_rates[rate_index].plcp;
819 tx_flags = tx_cmd->tx_flags;
821 /* We need to figure out how to get the sta->supp_rates while
822 * in this running context */
823 rate_mask = IWL_RATES_MASK;
826 /* Set retry limit on DATA packets and Probe Responses*/
827 if (ieee80211_is_probe_resp(fc))
828 data_retry_limit = 3;
830 data_retry_limit = IWL_DEFAULT_TX_RETRY;
831 tx_cmd->data_retry_limit = data_retry_limit;
833 if (tx_id >= IWL_CMD_QUEUE_NUM)
838 if (data_retry_limit < rts_retry_limit)
839 rts_retry_limit = data_retry_limit;
840 tx_cmd->rts_retry_limit = rts_retry_limit;
842 if (ieee80211_is_mgmt(fc)) {
843 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
844 case cpu_to_le16(IEEE80211_STYPE_AUTH):
845 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
846 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
847 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
848 if (tx_flags & TX_CMD_FLG_RTS_MSK) {
849 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
850 tx_flags |= TX_CMD_FLG_CTS_MSK;
859 tx_cmd->tx_flags = tx_flags;
862 tx_cmd->supp_rates[0] =
863 ((rate_mask & IWL_OFDM_RATES_MASK) >> IWL_FIRST_OFDM_RATE) & 0xFF;
866 tx_cmd->supp_rates[1] = (rate_mask & 0xF);
868 IWL_DEBUG_RATE(priv, "Tx sta id: %d, rate: %d (plcp), flags: 0x%4X "
869 "cck/ofdm mask: 0x%x/0x%x\n", sta_id,
870 tx_cmd->rate, le32_to_cpu(tx_cmd->tx_flags),
871 tx_cmd->supp_rates[1], tx_cmd->supp_rates[0]);
874 u8 iwl3945_sync_sta(struct iwl_priv *priv, int sta_id, u16 tx_rate, u8 flags)
876 unsigned long flags_spin;
877 struct iwl_station_entry *station;
879 if (sta_id == IWL_INVALID_STATION)
880 return IWL_INVALID_STATION;
882 spin_lock_irqsave(&priv->sta_lock, flags_spin);
883 station = &priv->stations[sta_id];
885 station->sta.sta.modify_mask = STA_MODIFY_TX_RATE_MSK;
886 station->sta.rate_n_flags = cpu_to_le16(tx_rate);
887 station->sta.mode = STA_CONTROL_MODIFY_MSK;
889 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
891 iwl_send_add_sta(priv, &station->sta, flags);
892 IWL_DEBUG_RATE(priv, "SCALE sync station %d to rate %d\n",
897 static int iwl3945_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
899 if (src == IWL_PWR_SRC_VAUX) {
900 if (pci_pme_capable(priv->pci_dev, PCI_D3cold)) {
901 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
902 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
903 ~APMG_PS_CTRL_MSK_PWR_SRC);
905 iwl_poll_bit(priv, CSR_GPIO_IN,
906 CSR_GPIO_IN_VAL_VAUX_PWR_SRC,
907 CSR_GPIO_IN_BIT_AUX_POWER, 5000);
910 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
911 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
912 ~APMG_PS_CTRL_MSK_PWR_SRC);
914 iwl_poll_bit(priv, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC,
915 CSR_GPIO_IN_BIT_AUX_POWER, 5000); /* uS */
921 static int iwl3945_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
923 iwl_write_direct32(priv, FH39_RCSR_RBD_BASE(0), rxq->dma_addr);
924 iwl_write_direct32(priv, FH39_RCSR_RPTR_ADDR(0), rxq->rb_stts_dma);
925 iwl_write_direct32(priv, FH39_RCSR_WPTR(0), 0);
926 iwl_write_direct32(priv, FH39_RCSR_CONFIG(0),
927 FH39_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE |
928 FH39_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE |
929 FH39_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN |
930 FH39_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 |
931 (RX_QUEUE_SIZE_LOG << FH39_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE) |
932 FH39_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST |
933 (1 << FH39_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH) |
934 FH39_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH);
936 /* fake read to flush all prev I/O */
937 iwl_read_direct32(priv, FH39_RSSR_CTRL);
942 static int iwl3945_tx_reset(struct iwl_priv *priv)
946 iwl_write_prph(priv, ALM_SCD_MODE_REG, 0x2);
949 iwl_write_prph(priv, ALM_SCD_ARASTAT_REG, 0x01);
951 /* all 6 fifo are active */
952 iwl_write_prph(priv, ALM_SCD_TXFACT_REG, 0x3f);
954 iwl_write_prph(priv, ALM_SCD_SBYP_MODE_1_REG, 0x010000);
955 iwl_write_prph(priv, ALM_SCD_SBYP_MODE_2_REG, 0x030002);
956 iwl_write_prph(priv, ALM_SCD_TXF4MF_REG, 0x000004);
957 iwl_write_prph(priv, ALM_SCD_TXF5MF_REG, 0x000005);
959 iwl_write_direct32(priv, FH39_TSSR_CBB_BASE,
962 iwl_write_direct32(priv, FH39_TSSR_MSG_CONFIG,
963 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON |
964 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON |
965 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B |
966 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON |
967 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON |
968 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH |
969 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH);
976 * iwl3945_txq_ctx_reset - Reset TX queue context
978 * Destroys all DMA structures and initialize them again
980 static int iwl3945_txq_ctx_reset(struct iwl_priv *priv)
983 int txq_id, slots_num;
985 iwl3945_hw_txq_ctx_free(priv);
987 /* allocate tx queue structure */
988 rc = iwl_alloc_txq_mem(priv);
993 rc = iwl3945_tx_reset(priv);
998 for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++) {
999 slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
1000 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
1001 rc = iwl_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
1004 IWL_ERR(priv, "Tx %d queue init failed\n", txq_id);
1012 iwl3945_hw_txq_ctx_free(priv);
1018 * Start up 3945's basic functionality after it has been reset
1019 * (e.g. after platform boot, or shutdown via iwl_apm_stop())
1020 * NOTE: This does not load uCode nor start the embedded processor
1022 static int iwl3945_apm_init(struct iwl_priv *priv)
1024 int ret = iwl_apm_init(priv);
1026 /* Clear APMG (NIC's internal power management) interrupts */
1027 iwl_write_prph(priv, APMG_RTC_INT_MSK_REG, 0x0);
1028 iwl_write_prph(priv, APMG_RTC_INT_STT_REG, 0xFFFFFFFF);
1030 /* Reset radio chip */
1031 iwl_set_bits_prph(priv, APMG_PS_CTRL_REG, APMG_PS_CTRL_VAL_RESET_REQ);
1033 iwl_clear_bits_prph(priv, APMG_PS_CTRL_REG, APMG_PS_CTRL_VAL_RESET_REQ);
1038 static void iwl3945_nic_config(struct iwl_priv *priv)
1040 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
1041 unsigned long flags;
1044 spin_lock_irqsave(&priv->lock, flags);
1046 /* Determine HW type */
1047 pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
1049 IWL_DEBUG_INFO(priv, "HW Revision ID = 0x%X\n", rev_id);
1051 if (rev_id & PCI_CFG_REV_ID_BIT_RTP)
1052 IWL_DEBUG_INFO(priv, "RTP type \n");
1053 else if (rev_id & PCI_CFG_REV_ID_BIT_BASIC_SKU) {
1054 IWL_DEBUG_INFO(priv, "3945 RADIO-MB type\n");
1055 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1056 CSR39_HW_IF_CONFIG_REG_BIT_3945_MB);
1058 IWL_DEBUG_INFO(priv, "3945 RADIO-MM type\n");
1059 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1060 CSR39_HW_IF_CONFIG_REG_BIT_3945_MM);
1063 if (EEPROM_SKU_CAP_OP_MODE_MRC == eeprom->sku_cap) {
1064 IWL_DEBUG_INFO(priv, "SKU OP mode is mrc\n");
1065 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1066 CSR39_HW_IF_CONFIG_REG_BIT_SKU_MRC);
1068 IWL_DEBUG_INFO(priv, "SKU OP mode is basic\n");
1070 if ((eeprom->board_revision & 0xF0) == 0xD0) {
1071 IWL_DEBUG_INFO(priv, "3945ABG revision is 0x%X\n",
1072 eeprom->board_revision);
1073 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1074 CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
1076 IWL_DEBUG_INFO(priv, "3945ABG revision is 0x%X\n",
1077 eeprom->board_revision);
1078 iwl_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
1079 CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
1082 if (eeprom->almgor_m_version <= 1) {
1083 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1084 CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A);
1085 IWL_DEBUG_INFO(priv, "Card M type A version is 0x%X\n",
1086 eeprom->almgor_m_version);
1088 IWL_DEBUG_INFO(priv, "Card M type B version is 0x%X\n",
1089 eeprom->almgor_m_version);
1090 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1091 CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B);
1093 spin_unlock_irqrestore(&priv->lock, flags);
1095 if (eeprom->sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
1096 IWL_DEBUG_RF_KILL(priv, "SW RF KILL supported in EEPROM.\n");
1098 if (eeprom->sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
1099 IWL_DEBUG_RF_KILL(priv, "HW RF KILL supported in EEPROM.\n");
1102 int iwl3945_hw_nic_init(struct iwl_priv *priv)
1105 unsigned long flags;
1106 struct iwl_rx_queue *rxq = &priv->rxq;
1108 spin_lock_irqsave(&priv->lock, flags);
1109 priv->cfg->ops->lib->apm_ops.init(priv);
1110 spin_unlock_irqrestore(&priv->lock, flags);
1112 rc = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN);
1116 priv->cfg->ops->lib->apm_ops.config(priv);
1118 /* Allocate the RX queue, or reset if it is already allocated */
1120 rc = iwl_rx_queue_alloc(priv);
1122 IWL_ERR(priv, "Unable to initialize Rx queue\n");
1126 iwl3945_rx_queue_reset(priv, rxq);
1128 iwl3945_rx_replenish(priv);
1130 iwl3945_rx_init(priv, rxq);
1133 /* Look at using this instead:
1134 rxq->need_update = 1;
1135 iwl_rx_queue_update_write_ptr(priv, rxq);
1138 iwl_write_direct32(priv, FH39_RCSR_WPTR(0), rxq->write & ~7);
1140 rc = iwl3945_txq_ctx_reset(priv);
1144 set_bit(STATUS_INIT, &priv->status);
1150 * iwl3945_hw_txq_ctx_free - Free TXQ Context
1152 * Destroy all TX DMA queues and structures
1154 void iwl3945_hw_txq_ctx_free(struct iwl_priv *priv)
1160 for (txq_id = 0; txq_id < priv->hw_params.max_txq_num;
1162 if (txq_id == IWL_CMD_QUEUE_NUM)
1163 iwl_cmd_queue_free(priv);
1165 iwl_tx_queue_free(priv, txq_id);
1167 /* free tx queue structure */
1168 iwl_free_txq_mem(priv);
1171 void iwl3945_hw_txq_ctx_stop(struct iwl_priv *priv)
1176 iwl_write_prph(priv, ALM_SCD_MODE_REG, 0);
1177 iwl_write_prph(priv, ALM_SCD_TXFACT_REG, 0);
1179 /* reset TFD queues */
1180 for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++) {
1181 iwl_write_direct32(priv, FH39_TCSR_CONFIG(txq_id), 0x0);
1182 iwl_poll_direct_bit(priv, FH39_TSSR_TX_STATUS,
1183 FH39_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(txq_id),
1187 iwl3945_hw_txq_ctx_free(priv);
1191 * iwl3945_hw_reg_adjust_power_by_temp
1192 * return index delta into power gain settings table
1194 static int iwl3945_hw_reg_adjust_power_by_temp(int new_reading, int old_reading)
1196 return (new_reading - old_reading) * (-11) / 100;
1200 * iwl3945_hw_reg_temp_out_of_range - Keep temperature in sane range
1202 static inline int iwl3945_hw_reg_temp_out_of_range(int temperature)
1204 return ((temperature < -260) || (temperature > 25)) ? 1 : 0;
1207 int iwl3945_hw_get_temperature(struct iwl_priv *priv)
1209 return iwl_read32(priv, CSR_UCODE_DRV_GP2);
1213 * iwl3945_hw_reg_txpower_get_temperature
1214 * get the current temperature by reading from NIC
1216 static int iwl3945_hw_reg_txpower_get_temperature(struct iwl_priv *priv)
1218 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
1221 temperature = iwl3945_hw_get_temperature(priv);
1223 /* driver's okay range is -260 to +25.
1224 * human readable okay range is 0 to +285 */
1225 IWL_DEBUG_INFO(priv, "Temperature: %d\n", temperature + IWL_TEMP_CONVERT);
1227 /* handle insane temp reading */
1228 if (iwl3945_hw_reg_temp_out_of_range(temperature)) {
1229 IWL_ERR(priv, "Error bad temperature value %d\n", temperature);
1231 /* if really really hot(?),
1232 * substitute the 3rd band/group's temp measured at factory */
1233 if (priv->last_temperature > 100)
1234 temperature = eeprom->groups[2].temperature;
1235 else /* else use most recent "sane" value from driver */
1236 temperature = priv->last_temperature;
1239 return temperature; /* raw, not "human readable" */
1242 /* Adjust Txpower only if temperature variance is greater than threshold.
1244 * Both are lower than older versions' 9 degrees */
1245 #define IWL_TEMPERATURE_LIMIT_TIMER 6
1248 * is_temp_calib_needed - determines if new calibration is needed
1250 * records new temperature in tx_mgr->temperature.
1251 * replaces tx_mgr->last_temperature *only* if calib needed
1252 * (assumes caller will actually do the calibration!). */
1253 static int is_temp_calib_needed(struct iwl_priv *priv)
1257 priv->temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
1258 temp_diff = priv->temperature - priv->last_temperature;
1260 /* get absolute value */
1261 if (temp_diff < 0) {
1262 IWL_DEBUG_POWER(priv, "Getting cooler, delta %d,\n", temp_diff);
1263 temp_diff = -temp_diff;
1264 } else if (temp_diff == 0)
1265 IWL_DEBUG_POWER(priv, "Same temp,\n");
1267 IWL_DEBUG_POWER(priv, "Getting warmer, delta %d,\n", temp_diff);
1269 /* if we don't need calibration, *don't* update last_temperature */
1270 if (temp_diff < IWL_TEMPERATURE_LIMIT_TIMER) {
1271 IWL_DEBUG_POWER(priv, "Timed thermal calib not needed\n");
1275 IWL_DEBUG_POWER(priv, "Timed thermal calib needed\n");
1277 /* assume that caller will actually do calib ...
1278 * update the "last temperature" value */
1279 priv->last_temperature = priv->temperature;
1283 #define IWL_MAX_GAIN_ENTRIES 78
1284 #define IWL_CCK_FROM_OFDM_POWER_DIFF -5
1285 #define IWL_CCK_FROM_OFDM_INDEX_DIFF (10)
1287 /* radio and DSP power table, each step is 1/2 dB.
1288 * 1st number is for RF analog gain, 2nd number is for DSP pre-DAC gain. */
1289 static struct iwl3945_tx_power power_gain_table[2][IWL_MAX_GAIN_ENTRIES] = {
1291 {251, 127}, /* 2.4 GHz, highest power */
1368 {3, 95} }, /* 2.4 GHz, lowest power */
1370 {251, 127}, /* 5.x GHz, highest power */
1447 {3, 120} } /* 5.x GHz, lowest power */
1450 static inline u8 iwl3945_hw_reg_fix_power_index(int index)
1454 if (index >= IWL_MAX_GAIN_ENTRIES)
1455 return IWL_MAX_GAIN_ENTRIES - 1;
1459 /* Kick off thermal recalibration check every 60 seconds */
1460 #define REG_RECALIB_PERIOD (60)
1463 * iwl3945_hw_reg_set_scan_power - Set Tx power for scan probe requests
1465 * Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK)
1466 * or 6 Mbit (OFDM) rates.
1468 static void iwl3945_hw_reg_set_scan_power(struct iwl_priv *priv, u32 scan_tbl_index,
1469 s32 rate_index, const s8 *clip_pwrs,
1470 struct iwl_channel_info *ch_info,
1473 struct iwl3945_scan_power_info *scan_power_info;
1477 scan_power_info = &ch_info->scan_pwr_info[scan_tbl_index];
1479 /* use this channel group's 6Mbit clipping/saturation pwr,
1480 * but cap at regulatory scan power restriction (set during init
1481 * based on eeprom channel data) for this channel. */
1482 power = min(ch_info->scan_power, clip_pwrs[IWL_RATE_6M_INDEX_TABLE]);
1484 /* further limit to user's max power preference.
1485 * FIXME: Other spectrum management power limitations do not
1486 * seem to apply?? */
1487 power = min(power, priv->tx_power_user_lmt);
1488 scan_power_info->requested_power = power;
1490 /* find difference between new scan *power* and current "normal"
1491 * Tx *power* for 6Mb. Use this difference (x2) to adjust the
1492 * current "normal" temperature-compensated Tx power *index* for
1493 * this rate (1Mb or 6Mb) to yield new temp-compensated scan power
1495 power_index = ch_info->power_info[rate_index].power_table_index
1496 - (power - ch_info->power_info
1497 [IWL_RATE_6M_INDEX_TABLE].requested_power) * 2;
1499 /* store reference index that we use when adjusting *all* scan
1500 * powers. So we can accommodate user (all channel) or spectrum
1501 * management (single channel) power changes "between" temperature
1502 * feedback compensation procedures.
1503 * don't force fit this reference index into gain table; it may be a
1504 * negative number. This will help avoid errors when we're at
1505 * the lower bounds (highest gains, for warmest temperatures)
1508 /* don't exceed table bounds for "real" setting */
1509 power_index = iwl3945_hw_reg_fix_power_index(power_index);
1511 scan_power_info->power_table_index = power_index;
1512 scan_power_info->tpc.tx_gain =
1513 power_gain_table[band_index][power_index].tx_gain;
1514 scan_power_info->tpc.dsp_atten =
1515 power_gain_table[band_index][power_index].dsp_atten;
1519 * iwl3945_send_tx_power - fill in Tx Power command with gain settings
1521 * Configures power settings for all rates for the current channel,
1522 * using values from channel info struct, and send to NIC
1524 static int iwl3945_send_tx_power(struct iwl_priv *priv)
1527 const struct iwl_channel_info *ch_info = NULL;
1528 struct iwl3945_txpowertable_cmd txpower = {
1529 .channel = priv->active_rxon.channel,
1532 txpower.band = (priv->band == IEEE80211_BAND_5GHZ) ? 0 : 1;
1533 ch_info = iwl_get_channel_info(priv,
1535 le16_to_cpu(priv->active_rxon.channel));
1538 "Failed to get channel info for channel %d [%d]\n",
1539 le16_to_cpu(priv->active_rxon.channel), priv->band);
1543 if (!is_channel_valid(ch_info)) {
1544 IWL_DEBUG_POWER(priv, "Not calling TX_PWR_TABLE_CMD on "
1545 "non-Tx channel.\n");
1549 /* fill cmd with power settings for all rates for current channel */
1550 /* Fill OFDM rate */
1551 for (rate_idx = IWL_FIRST_OFDM_RATE, i = 0;
1552 rate_idx <= IWL39_LAST_OFDM_RATE; rate_idx++, i++) {
1554 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1555 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1557 IWL_DEBUG_POWER(priv, "ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1558 le16_to_cpu(txpower.channel),
1560 txpower.power[i].tpc.tx_gain,
1561 txpower.power[i].tpc.dsp_atten,
1562 txpower.power[i].rate);
1564 /* Fill CCK rates */
1565 for (rate_idx = IWL_FIRST_CCK_RATE;
1566 rate_idx <= IWL_LAST_CCK_RATE; rate_idx++, i++) {
1567 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1568 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1570 IWL_DEBUG_POWER(priv, "ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1571 le16_to_cpu(txpower.channel),
1573 txpower.power[i].tpc.tx_gain,
1574 txpower.power[i].tpc.dsp_atten,
1575 txpower.power[i].rate);
1578 return iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD,
1579 sizeof(struct iwl3945_txpowertable_cmd),
1585 * iwl3945_hw_reg_set_new_power - Configures power tables at new levels
1586 * @ch_info: Channel to update. Uses power_info.requested_power.
1588 * Replace requested_power and base_power_index ch_info fields for
1591 * Called if user or spectrum management changes power preferences.
1592 * Takes into account h/w and modulation limitations (clip power).
1594 * This does *not* send anything to NIC, just sets up ch_info for one channel.
1596 * NOTE: reg_compensate_for_temperature_dif() *must* be run after this to
1597 * properly fill out the scan powers, and actual h/w gain settings,
1598 * and send changes to NIC
1600 static int iwl3945_hw_reg_set_new_power(struct iwl_priv *priv,
1601 struct iwl_channel_info *ch_info)
1603 struct iwl3945_channel_power_info *power_info;
1604 int power_changed = 0;
1606 const s8 *clip_pwrs;
1609 /* Get this chnlgrp's rate-to-max/clip-powers table */
1610 clip_pwrs = priv->clip39_groups[ch_info->group_index].clip_powers;
1612 /* Get this channel's rate-to-current-power settings table */
1613 power_info = ch_info->power_info;
1615 /* update OFDM Txpower settings */
1616 for (i = IWL_RATE_6M_INDEX_TABLE; i <= IWL_RATE_54M_INDEX_TABLE;
1617 i++, ++power_info) {
1620 /* limit new power to be no more than h/w capability */
1621 power = min(ch_info->curr_txpow, clip_pwrs[i]);
1622 if (power == power_info->requested_power)
1625 /* find difference between old and new requested powers,
1626 * update base (non-temp-compensated) power index */
1627 delta_idx = (power - power_info->requested_power) * 2;
1628 power_info->base_power_index -= delta_idx;
1630 /* save new requested power value */
1631 power_info->requested_power = power;
1636 /* update CCK Txpower settings, based on OFDM 12M setting ...
1637 * ... all CCK power settings for a given channel are the *same*. */
1638 if (power_changed) {
1640 ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1641 requested_power + IWL_CCK_FROM_OFDM_POWER_DIFF;
1643 /* do all CCK rates' iwl3945_channel_power_info structures */
1644 for (i = IWL_RATE_1M_INDEX_TABLE; i <= IWL_RATE_11M_INDEX_TABLE; i++) {
1645 power_info->requested_power = power;
1646 power_info->base_power_index =
1647 ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1648 base_power_index + IWL_CCK_FROM_OFDM_INDEX_DIFF;
1657 * iwl3945_hw_reg_get_ch_txpower_limit - returns new power limit for channel
1659 * NOTE: Returned power limit may be less (but not more) than requested,
1660 * based strictly on regulatory (eeprom and spectrum mgt) limitations
1661 * (no consideration for h/w clipping limitations).
1663 static int iwl3945_hw_reg_get_ch_txpower_limit(struct iwl_channel_info *ch_info)
1668 /* if we're using TGd limits, use lower of TGd or EEPROM */
1669 if (ch_info->tgd_data.max_power != 0)
1670 max_power = min(ch_info->tgd_data.max_power,
1671 ch_info->eeprom.max_power_avg);
1673 /* else just use EEPROM limits */
1676 max_power = ch_info->eeprom.max_power_avg;
1678 return min(max_power, ch_info->max_power_avg);
1682 * iwl3945_hw_reg_comp_txpower_temp - Compensate for temperature
1684 * Compensate txpower settings of *all* channels for temperature.
1685 * This only accounts for the difference between current temperature
1686 * and the factory calibration temperatures, and bases the new settings
1687 * on the channel's base_power_index.
1689 * If RxOn is "associated", this sends the new Txpower to NIC!
1691 static int iwl3945_hw_reg_comp_txpower_temp(struct iwl_priv *priv)
1693 struct iwl_channel_info *ch_info = NULL;
1694 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
1696 const s8 *clip_pwrs; /* array of h/w max power levels for each rate */
1702 int temperature = priv->temperature;
1704 /* set up new Tx power info for each and every channel, 2.4 and 5.x */
1705 for (i = 0; i < priv->channel_count; i++) {
1706 ch_info = &priv->channel_info[i];
1707 a_band = is_channel_a_band(ch_info);
1709 /* Get this chnlgrp's factory calibration temperature */
1710 ref_temp = (s16)eeprom->groups[ch_info->group_index].
1713 /* get power index adjustment based on current and factory
1715 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
1718 /* set tx power value for all rates, OFDM and CCK */
1719 for (rate_index = 0; rate_index < IWL_RATE_COUNT;
1722 ch_info->power_info[rate_index].base_power_index;
1724 /* temperature compensate */
1725 power_idx += delta_index;
1727 /* stay within table range */
1728 power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
1729 ch_info->power_info[rate_index].
1730 power_table_index = (u8) power_idx;
1731 ch_info->power_info[rate_index].tpc =
1732 power_gain_table[a_band][power_idx];
1735 /* Get this chnlgrp's rate-to-max/clip-powers table */
1736 clip_pwrs = priv->clip39_groups[ch_info->group_index].clip_powers;
1738 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
1739 for (scan_tbl_index = 0;
1740 scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
1741 s32 actual_index = (scan_tbl_index == 0) ?
1742 IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
1743 iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
1744 actual_index, clip_pwrs,
1749 /* send Txpower command for current channel to ucode */
1750 return priv->cfg->ops->lib->send_tx_power(priv);
1753 int iwl3945_hw_reg_set_txpower(struct iwl_priv *priv, s8 power)
1755 struct iwl_channel_info *ch_info;
1760 if (priv->tx_power_user_lmt == power) {
1761 IWL_DEBUG_POWER(priv, "Requested Tx power same as current "
1762 "limit: %ddBm.\n", power);
1766 IWL_DEBUG_POWER(priv, "Setting upper limit clamp to %ddBm.\n", power);
1767 priv->tx_power_user_lmt = power;
1769 /* set up new Tx powers for each and every channel, 2.4 and 5.x */
1771 for (i = 0; i < priv->channel_count; i++) {
1772 ch_info = &priv->channel_info[i];
1773 a_band = is_channel_a_band(ch_info);
1775 /* find minimum power of all user and regulatory constraints
1776 * (does not consider h/w clipping limitations) */
1777 max_power = iwl3945_hw_reg_get_ch_txpower_limit(ch_info);
1778 max_power = min(power, max_power);
1779 if (max_power != ch_info->curr_txpow) {
1780 ch_info->curr_txpow = max_power;
1782 /* this considers the h/w clipping limitations */
1783 iwl3945_hw_reg_set_new_power(priv, ch_info);
1787 /* update txpower settings for all channels,
1788 * send to NIC if associated. */
1789 is_temp_calib_needed(priv);
1790 iwl3945_hw_reg_comp_txpower_temp(priv);
1795 static int iwl3945_send_rxon_assoc(struct iwl_priv *priv)
1798 struct iwl_rx_packet *pkt;
1799 struct iwl3945_rxon_assoc_cmd rxon_assoc;
1800 struct iwl_host_cmd cmd = {
1801 .id = REPLY_RXON_ASSOC,
1802 .len = sizeof(rxon_assoc),
1803 .flags = CMD_WANT_SKB,
1804 .data = &rxon_assoc,
1806 const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
1807 const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
1809 if ((rxon1->flags == rxon2->flags) &&
1810 (rxon1->filter_flags == rxon2->filter_flags) &&
1811 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1812 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1813 IWL_DEBUG_INFO(priv, "Using current RXON_ASSOC. Not resending.\n");
1817 rxon_assoc.flags = priv->staging_rxon.flags;
1818 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1819 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1820 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1821 rxon_assoc.reserved = 0;
1823 rc = iwl_send_cmd_sync(priv, &cmd);
1827 pkt = (struct iwl_rx_packet *)cmd.reply_page;
1828 if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
1829 IWL_ERR(priv, "Bad return from REPLY_RXON_ASSOC command\n");
1833 priv->alloc_rxb_page--;
1834 free_pages(cmd.reply_page, priv->hw_params.rx_page_order);
1840 * iwl3945_commit_rxon - commit staging_rxon to hardware
1842 * The RXON command in staging_rxon is committed to the hardware and
1843 * the active_rxon structure is updated with the new data. This
1844 * function correctly transitions out of the RXON_ASSOC_MSK state if
1845 * a HW tune is required based on the RXON structure changes.
1847 static int iwl3945_commit_rxon(struct iwl_priv *priv)
1849 /* cast away the const for active_rxon in this function */
1850 struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
1851 struct iwl3945_rxon_cmd *staging_rxon = (void *)&priv->staging_rxon;
1854 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
1856 if (!iwl_is_alive(priv))
1859 /* always get timestamp with Rx frame */
1860 staging_rxon->flags |= RXON_FLG_TSF2HOST_MSK;
1862 /* select antenna */
1863 staging_rxon->flags &=
1864 ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
1865 staging_rxon->flags |= iwl3945_get_antenna_flags(priv);
1867 rc = iwl_check_rxon_cmd(priv);
1869 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
1873 /* If we don't need to send a full RXON, we can use
1874 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
1875 * and other flags for the current radio configuration. */
1876 if (!iwl_full_rxon_required(priv)) {
1877 rc = iwl_send_rxon_assoc(priv);
1879 IWL_ERR(priv, "Error setting RXON_ASSOC "
1880 "configuration (%d).\n", rc);
1884 memcpy(active_rxon, staging_rxon, sizeof(*active_rxon));
1889 /* If we are currently associated and the new config requires
1890 * an RXON_ASSOC and the new config wants the associated mask enabled,
1891 * we must clear the associated from the active configuration
1892 * before we apply the new config */
1893 if (iwl_is_associated(priv) && new_assoc) {
1894 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
1895 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1898 * reserved4 and 5 could have been filled by the iwlcore code.
1899 * Let's clear them before pushing to the 3945.
1901 active_rxon->reserved4 = 0;
1902 active_rxon->reserved5 = 0;
1903 rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
1904 sizeof(struct iwl3945_rxon_cmd),
1905 &priv->active_rxon);
1907 /* If the mask clearing failed then we set
1908 * active_rxon back to what it was previously */
1910 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1911 IWL_ERR(priv, "Error clearing ASSOC_MSK on current "
1912 "configuration (%d).\n", rc);
1917 IWL_DEBUG_INFO(priv, "Sending RXON\n"
1918 "* with%s RXON_FILTER_ASSOC_MSK\n"
1921 (new_assoc ? "" : "out"),
1922 le16_to_cpu(staging_rxon->channel),
1923 staging_rxon->bssid_addr);
1926 * reserved4 and 5 could have been filled by the iwlcore code.
1927 * Let's clear them before pushing to the 3945.
1929 staging_rxon->reserved4 = 0;
1930 staging_rxon->reserved5 = 0;
1932 iwl_set_rxon_hwcrypto(priv, !iwl3945_mod_params.sw_crypto);
1934 /* Apply the new configuration */
1935 rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
1936 sizeof(struct iwl3945_rxon_cmd),
1939 IWL_ERR(priv, "Error setting new configuration (%d).\n", rc);
1943 memcpy(active_rxon, staging_rxon, sizeof(*active_rxon));
1945 iwl_clear_stations_table(priv);
1947 /* If we issue a new RXON command which required a tune then we must
1948 * send a new TXPOWER command or we won't be able to Tx any frames */
1949 rc = priv->cfg->ops->lib->send_tx_power(priv);
1951 IWL_ERR(priv, "Error setting Tx power (%d).\n", rc);
1955 /* Add the broadcast address so we can send broadcast frames */
1956 if (iwl_add_station(priv, iwl_bcast_addr, false, CMD_SYNC, NULL) ==
1957 IWL_INVALID_STATION) {
1958 IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
1962 /* If we have set the ASSOC_MSK and we are in BSS mode then
1963 * add the IWL_AP_ID to the station rate table */
1964 if (iwl_is_associated(priv) &&
1965 (priv->iw_mode == NL80211_IFTYPE_STATION))
1966 if (iwl_add_station(priv, priv->active_rxon.bssid_addr,
1967 true, CMD_SYNC, NULL) == IWL_INVALID_STATION) {
1968 IWL_ERR(priv, "Error adding AP address for transmit\n");
1972 /* Init the hardware's rate fallback order based on the band */
1973 rc = iwl3945_init_hw_rate_table(priv);
1975 IWL_ERR(priv, "Error setting HW rate table: %02X\n", rc);
1982 /* will add 3945 channel switch cmd handling later */
1983 int iwl3945_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1989 * iwl3945_reg_txpower_periodic - called when time to check our temperature.
1991 * -- reset periodic timer
1992 * -- see if temp has changed enough to warrant re-calibration ... if so:
1993 * -- correct coeffs for temp (can reset temp timer)
1994 * -- save this temp as "last",
1995 * -- send new set of gain settings to NIC
1996 * NOTE: This should continue working, even when we're not associated,
1997 * so we can keep our internal table of scan powers current. */
1998 void iwl3945_reg_txpower_periodic(struct iwl_priv *priv)
2000 /* This will kick in the "brute force"
2001 * iwl3945_hw_reg_comp_txpower_temp() below */
2002 if (!is_temp_calib_needed(priv))
2005 /* Set up a new set of temp-adjusted TxPowers, send to NIC.
2006 * This is based *only* on current temperature,
2007 * ignoring any previous power measurements */
2008 iwl3945_hw_reg_comp_txpower_temp(priv);
2011 queue_delayed_work(priv->workqueue,
2012 &priv->thermal_periodic, REG_RECALIB_PERIOD * HZ);
2015 static void iwl3945_bg_reg_txpower_periodic(struct work_struct *work)
2017 struct iwl_priv *priv = container_of(work, struct iwl_priv,
2018 thermal_periodic.work);
2020 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2023 mutex_lock(&priv->mutex);
2024 iwl3945_reg_txpower_periodic(priv);
2025 mutex_unlock(&priv->mutex);
2029 * iwl3945_hw_reg_get_ch_grp_index - find the channel-group index (0-4)
2032 * This function is used when initializing channel-info structs.
2034 * NOTE: These channel groups do *NOT* match the bands above!
2035 * These channel groups are based on factory-tested channels;
2036 * on A-band, EEPROM's "group frequency" entries represent the top
2037 * channel in each group 1-4. Group 5 All B/G channels are in group 0.
2039 static u16 iwl3945_hw_reg_get_ch_grp_index(struct iwl_priv *priv,
2040 const struct iwl_channel_info *ch_info)
2042 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
2043 struct iwl3945_eeprom_txpower_group *ch_grp = &eeprom->groups[0];
2045 u16 group_index = 0; /* based on factory calib frequencies */
2048 /* Find the group index for the channel ... don't use index 1(?) */
2049 if (is_channel_a_band(ch_info)) {
2050 for (group = 1; group < 5; group++) {
2051 grp_channel = ch_grp[group].group_channel;
2052 if (ch_info->channel <= grp_channel) {
2053 group_index = group;
2057 /* group 4 has a few channels *above* its factory cal freq */
2061 group_index = 0; /* 2.4 GHz, group 0 */
2063 IWL_DEBUG_POWER(priv, "Chnl %d mapped to grp %d\n", ch_info->channel,
2069 * iwl3945_hw_reg_get_matched_power_index - Interpolate to get nominal index
2071 * Interpolate to get nominal (i.e. at factory calibration temperature) index
2072 * into radio/DSP gain settings table for requested power.
2074 static int iwl3945_hw_reg_get_matched_power_index(struct iwl_priv *priv,
2076 s32 setting_index, s32 *new_index)
2078 const struct iwl3945_eeprom_txpower_group *chnl_grp = NULL;
2079 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
2081 s32 power = 2 * requested_power;
2083 const struct iwl3945_eeprom_txpower_sample *samples;
2088 chnl_grp = &eeprom->groups[setting_index];
2089 samples = chnl_grp->samples;
2090 for (i = 0; i < 5; i++) {
2091 if (power == samples[i].power) {
2092 *new_index = samples[i].gain_index;
2097 if (power > samples[1].power) {
2100 } else if (power > samples[2].power) {
2103 } else if (power > samples[3].power) {
2111 denominator = (s32) samples[index1].power - (s32) samples[index0].power;
2112 if (denominator == 0)
2114 gains0 = (s32) samples[index0].gain_index * (1 << 19);
2115 gains1 = (s32) samples[index1].gain_index * (1 << 19);
2116 res = gains0 + (gains1 - gains0) *
2117 ((s32) power - (s32) samples[index0].power) / denominator +
2119 *new_index = res >> 19;
2123 static void iwl3945_hw_reg_init_channel_groups(struct iwl_priv *priv)
2127 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
2128 const struct iwl3945_eeprom_txpower_group *group;
2130 IWL_DEBUG_POWER(priv, "Initializing factory calib info from EEPROM\n");
2132 for (i = 0; i < IWL_NUM_TX_CALIB_GROUPS; i++) {
2133 s8 *clip_pwrs; /* table of power levels for each rate */
2134 s8 satur_pwr; /* saturation power for each chnl group */
2135 group = &eeprom->groups[i];
2137 /* sanity check on factory saturation power value */
2138 if (group->saturation_power < 40) {
2139 IWL_WARN(priv, "Error: saturation power is %d, "
2140 "less than minimum expected 40\n",
2141 group->saturation_power);
2146 * Derive requested power levels for each rate, based on
2147 * hardware capabilities (saturation power for band).
2148 * Basic value is 3dB down from saturation, with further
2149 * power reductions for highest 3 data rates. These
2150 * backoffs provide headroom for high rate modulation
2151 * power peaks, without too much distortion (clipping).
2153 /* we'll fill in this array with h/w max power levels */
2154 clip_pwrs = (s8 *) priv->clip39_groups[i].clip_powers;
2156 /* divide factory saturation power by 2 to find -3dB level */
2157 satur_pwr = (s8) (group->saturation_power >> 1);
2159 /* fill in channel group's nominal powers for each rate */
2160 for (rate_index = 0;
2161 rate_index < IWL_RATE_COUNT; rate_index++, clip_pwrs++) {
2162 switch (rate_index) {
2163 case IWL_RATE_36M_INDEX_TABLE:
2164 if (i == 0) /* B/G */
2165 *clip_pwrs = satur_pwr;
2167 *clip_pwrs = satur_pwr - 5;
2169 case IWL_RATE_48M_INDEX_TABLE:
2171 *clip_pwrs = satur_pwr - 7;
2173 *clip_pwrs = satur_pwr - 10;
2175 case IWL_RATE_54M_INDEX_TABLE:
2177 *clip_pwrs = satur_pwr - 9;
2179 *clip_pwrs = satur_pwr - 12;
2182 *clip_pwrs = satur_pwr;
2190 * iwl3945_txpower_set_from_eeprom - Set channel power info based on EEPROM
2192 * Second pass (during init) to set up priv->channel_info
2194 * Set up Tx-power settings in our channel info database for each VALID
2195 * (for this geo/SKU) channel, at all Tx data rates, based on eeprom values
2196 * and current temperature.
2198 * Since this is based on current temperature (at init time), these values may
2199 * not be valid for very long, but it gives us a starting/default point,
2200 * and allows us to active (i.e. using Tx) scan.
2202 * This does *not* write values to NIC, just sets up our internal table.
2204 int iwl3945_txpower_set_from_eeprom(struct iwl_priv *priv)
2206 struct iwl_channel_info *ch_info = NULL;
2207 struct iwl3945_channel_power_info *pwr_info;
2208 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
2212 const s8 *clip_pwrs; /* array of power levels for each rate */
2215 u8 pwr_index, base_pwr_index, a_band;
2219 /* save temperature reference,
2220 * so we can determine next time to calibrate */
2221 temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
2222 priv->last_temperature = temperature;
2224 iwl3945_hw_reg_init_channel_groups(priv);
2226 /* initialize Tx power info for each and every channel, 2.4 and 5.x */
2227 for (i = 0, ch_info = priv->channel_info; i < priv->channel_count;
2229 a_band = is_channel_a_band(ch_info);
2230 if (!is_channel_valid(ch_info))
2233 /* find this channel's channel group (*not* "band") index */
2234 ch_info->group_index =
2235 iwl3945_hw_reg_get_ch_grp_index(priv, ch_info);
2237 /* Get this chnlgrp's rate->max/clip-powers table */
2238 clip_pwrs = priv->clip39_groups[ch_info->group_index].clip_powers;
2240 /* calculate power index *adjustment* value according to
2241 * diff between current temperature and factory temperature */
2242 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
2243 eeprom->groups[ch_info->group_index].
2246 IWL_DEBUG_POWER(priv, "Delta index for channel %d: %d [%d]\n",
2247 ch_info->channel, delta_index, temperature +
2250 /* set tx power value for all OFDM rates */
2251 for (rate_index = 0; rate_index < IWL_OFDM_RATES;
2253 s32 uninitialized_var(power_idx);
2256 /* use channel group's clip-power table,
2257 * but don't exceed channel's max power */
2258 s8 pwr = min(ch_info->max_power_avg,
2259 clip_pwrs[rate_index]);
2261 pwr_info = &ch_info->power_info[rate_index];
2263 /* get base (i.e. at factory-measured temperature)
2264 * power table index for this rate's power */
2265 rc = iwl3945_hw_reg_get_matched_power_index(priv, pwr,
2266 ch_info->group_index,
2269 IWL_ERR(priv, "Invalid power index\n");
2272 pwr_info->base_power_index = (u8) power_idx;
2274 /* temperature compensate */
2275 power_idx += delta_index;
2277 /* stay within range of gain table */
2278 power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
2280 /* fill 1 OFDM rate's iwl3945_channel_power_info struct */
2281 pwr_info->requested_power = pwr;
2282 pwr_info->power_table_index = (u8) power_idx;
2283 pwr_info->tpc.tx_gain =
2284 power_gain_table[a_band][power_idx].tx_gain;
2285 pwr_info->tpc.dsp_atten =
2286 power_gain_table[a_band][power_idx].dsp_atten;
2289 /* set tx power for CCK rates, based on OFDM 12 Mbit settings*/
2290 pwr_info = &ch_info->power_info[IWL_RATE_12M_INDEX_TABLE];
2291 power = pwr_info->requested_power +
2292 IWL_CCK_FROM_OFDM_POWER_DIFF;
2293 pwr_index = pwr_info->power_table_index +
2294 IWL_CCK_FROM_OFDM_INDEX_DIFF;
2295 base_pwr_index = pwr_info->base_power_index +
2296 IWL_CCK_FROM_OFDM_INDEX_DIFF;
2298 /* stay within table range */
2299 pwr_index = iwl3945_hw_reg_fix_power_index(pwr_index);
2300 gain = power_gain_table[a_band][pwr_index].tx_gain;
2301 dsp_atten = power_gain_table[a_band][pwr_index].dsp_atten;
2303 /* fill each CCK rate's iwl3945_channel_power_info structure
2304 * NOTE: All CCK-rate Txpwrs are the same for a given chnl!
2305 * NOTE: CCK rates start at end of OFDM rates! */
2306 for (rate_index = 0;
2307 rate_index < IWL_CCK_RATES; rate_index++) {
2308 pwr_info = &ch_info->power_info[rate_index+IWL_OFDM_RATES];
2309 pwr_info->requested_power = power;
2310 pwr_info->power_table_index = pwr_index;
2311 pwr_info->base_power_index = base_pwr_index;
2312 pwr_info->tpc.tx_gain = gain;
2313 pwr_info->tpc.dsp_atten = dsp_atten;
2316 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2317 for (scan_tbl_index = 0;
2318 scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
2319 s32 actual_index = (scan_tbl_index == 0) ?
2320 IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
2321 iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
2322 actual_index, clip_pwrs, ch_info, a_band);
2329 int iwl3945_hw_rxq_stop(struct iwl_priv *priv)
2333 iwl_write_direct32(priv, FH39_RCSR_CONFIG(0), 0);
2334 rc = iwl_poll_direct_bit(priv, FH39_RSSR_STATUS,
2335 FH39_RSSR_CHNL0_RX_STATUS_CHNL_IDLE, 1000);
2337 IWL_ERR(priv, "Can't stop Rx DMA.\n");
2342 int iwl3945_hw_tx_queue_init(struct iwl_priv *priv, struct iwl_tx_queue *txq)
2344 int txq_id = txq->q.id;
2346 struct iwl3945_shared *shared_data = priv->shared_virt;
2348 shared_data->tx_base_ptr[txq_id] = cpu_to_le32((u32)txq->q.dma_addr);
2350 iwl_write_direct32(priv, FH39_CBCC_CTRL(txq_id), 0);
2351 iwl_write_direct32(priv, FH39_CBCC_BASE(txq_id), 0);
2353 iwl_write_direct32(priv, FH39_TCSR_CONFIG(txq_id),
2354 FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT |
2355 FH39_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF |
2356 FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD |
2357 FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL |
2358 FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE);
2360 /* fake read to flush all prev. writes */
2361 iwl_read32(priv, FH39_TSSR_CBB_BASE);
2369 static u16 iwl3945_get_hcmd_size(u8 cmd_id, u16 len)
2373 return sizeof(struct iwl3945_rxon_cmd);
2374 case POWER_TABLE_CMD:
2375 return sizeof(struct iwl3945_powertable_cmd);
2382 static u16 iwl3945_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
2384 struct iwl3945_addsta_cmd *addsta = (struct iwl3945_addsta_cmd *)data;
2385 addsta->mode = cmd->mode;
2386 memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
2387 memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
2388 addsta->station_flags = cmd->station_flags;
2389 addsta->station_flags_msk = cmd->station_flags_msk;
2390 addsta->tid_disable_tx = cpu_to_le16(0);
2391 addsta->rate_n_flags = cmd->rate_n_flags;
2392 addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
2393 addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
2394 addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
2396 return (u16)sizeof(struct iwl3945_addsta_cmd);
2401 * iwl3945_init_hw_rate_table - Initialize the hardware rate fallback table
2403 int iwl3945_init_hw_rate_table(struct iwl_priv *priv)
2405 int rc, i, index, prev_index;
2406 struct iwl3945_rate_scaling_cmd rate_cmd = {
2407 .reserved = {0, 0, 0},
2409 struct iwl3945_rate_scaling_info *table = rate_cmd.table;
2411 for (i = 0; i < ARRAY_SIZE(iwl3945_rates); i++) {
2412 index = iwl3945_rates[i].table_rs_index;
2414 table[index].rate_n_flags =
2415 iwl3945_hw_set_rate_n_flags(iwl3945_rates[i].plcp, 0);
2416 table[index].try_cnt = priv->retry_rate;
2417 prev_index = iwl3945_get_prev_ieee_rate(i);
2418 table[index].next_rate_index =
2419 iwl3945_rates[prev_index].table_rs_index;
2422 switch (priv->band) {
2423 case IEEE80211_BAND_5GHZ:
2424 IWL_DEBUG_RATE(priv, "Select A mode rate scale\n");
2425 /* If one of the following CCK rates is used,
2426 * have it fall back to the 6M OFDM rate */
2427 for (i = IWL_RATE_1M_INDEX_TABLE;
2428 i <= IWL_RATE_11M_INDEX_TABLE; i++)
2429 table[i].next_rate_index =
2430 iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2432 /* Don't fall back to CCK rates */
2433 table[IWL_RATE_12M_INDEX_TABLE].next_rate_index =
2434 IWL_RATE_9M_INDEX_TABLE;
2436 /* Don't drop out of OFDM rates */
2437 table[IWL_RATE_6M_INDEX_TABLE].next_rate_index =
2438 iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2441 case IEEE80211_BAND_2GHZ:
2442 IWL_DEBUG_RATE(priv, "Select B/G mode rate scale\n");
2443 /* If an OFDM rate is used, have it fall back to the
2446 if (!(priv->sta_supp_rates & IWL_OFDM_RATES_MASK) &&
2447 iwl_is_associated(priv)) {
2449 index = IWL_FIRST_CCK_RATE;
2450 for (i = IWL_RATE_6M_INDEX_TABLE;
2451 i <= IWL_RATE_54M_INDEX_TABLE; i++)
2452 table[i].next_rate_index =
2453 iwl3945_rates[index].table_rs_index;
2455 index = IWL_RATE_11M_INDEX_TABLE;
2456 /* CCK shouldn't fall back to OFDM... */
2457 table[index].next_rate_index = IWL_RATE_5M_INDEX_TABLE;
2466 /* Update the rate scaling for control frame Tx */
2467 rate_cmd.table_id = 0;
2468 rc = iwl_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2473 /* Update the rate scaling for data frame Tx */
2474 rate_cmd.table_id = 1;
2475 return iwl_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2479 /* Called when initializing driver */
2480 int iwl3945_hw_set_hw_params(struct iwl_priv *priv)
2482 memset((void *)&priv->hw_params, 0,
2483 sizeof(struct iwl_hw_params));
2486 pci_alloc_consistent(priv->pci_dev,
2487 sizeof(struct iwl3945_shared),
2488 &priv->shared_phys);
2490 if (!priv->shared_virt) {
2491 IWL_ERR(priv, "failed to allocate pci memory\n");
2492 mutex_unlock(&priv->mutex);
2496 /* Assign number of Usable TX queues */
2497 priv->hw_params.max_txq_num = priv->cfg->num_of_queues;
2499 priv->hw_params.tfd_size = sizeof(struct iwl3945_tfd);
2500 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_3K);
2501 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
2502 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
2503 priv->hw_params.max_stations = IWL3945_STATION_COUNT;
2504 priv->hw_params.bcast_sta_id = IWL3945_BROADCAST_ID;
2506 priv->hw_params.rx_wrt_ptr_reg = FH39_RSCSR_CHNL0_WPTR;
2507 priv->hw_params.max_beacon_itrvl = IWL39_MAX_UCODE_BEACON_INTERVAL;
2512 unsigned int iwl3945_hw_get_beacon_cmd(struct iwl_priv *priv,
2513 struct iwl3945_frame *frame, u8 rate)
2515 struct iwl3945_tx_beacon_cmd *tx_beacon_cmd;
2516 unsigned int frame_size;
2518 tx_beacon_cmd = (struct iwl3945_tx_beacon_cmd *)&frame->u;
2519 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
2521 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
2522 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2524 frame_size = iwl3945_fill_beacon_frame(priv,
2525 tx_beacon_cmd->frame,
2526 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
2528 BUG_ON(frame_size > MAX_MPDU_SIZE);
2529 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
2531 tx_beacon_cmd->tx.rate = rate;
2532 tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
2533 TX_CMD_FLG_TSF_MSK);
2535 /* supp_rates[0] == OFDM start at IWL_FIRST_OFDM_RATE*/
2536 tx_beacon_cmd->tx.supp_rates[0] =
2537 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2539 tx_beacon_cmd->tx.supp_rates[1] =
2540 (IWL_CCK_BASIC_RATES_MASK & 0xF);
2542 return sizeof(struct iwl3945_tx_beacon_cmd) + frame_size;
2545 void iwl3945_hw_rx_handler_setup(struct iwl_priv *priv)
2547 priv->rx_handlers[REPLY_TX] = iwl3945_rx_reply_tx;
2548 priv->rx_handlers[REPLY_3945_RX] = iwl3945_rx_reply_rx;
2551 void iwl3945_hw_setup_deferred_work(struct iwl_priv *priv)
2553 INIT_DELAYED_WORK(&priv->thermal_periodic,
2554 iwl3945_bg_reg_txpower_periodic);
2557 void iwl3945_hw_cancel_deferred_work(struct iwl_priv *priv)
2559 cancel_delayed_work(&priv->thermal_periodic);
2562 /* check contents of special bootstrap uCode SRAM */
2563 static int iwl3945_verify_bsm(struct iwl_priv *priv)
2565 __le32 *image = priv->ucode_boot.v_addr;
2566 u32 len = priv->ucode_boot.len;
2570 IWL_DEBUG_INFO(priv, "Begin verify bsm\n");
2572 /* verify BSM SRAM contents */
2573 val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
2574 for (reg = BSM_SRAM_LOWER_BOUND;
2575 reg < BSM_SRAM_LOWER_BOUND + len;
2576 reg += sizeof(u32), image++) {
2577 val = iwl_read_prph(priv, reg);
2578 if (val != le32_to_cpu(*image)) {
2579 IWL_ERR(priv, "BSM uCode verification failed at "
2580 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
2581 BSM_SRAM_LOWER_BOUND,
2582 reg - BSM_SRAM_LOWER_BOUND, len,
2583 val, le32_to_cpu(*image));
2588 IWL_DEBUG_INFO(priv, "BSM bootstrap uCode image OK\n");
2594 /******************************************************************************
2596 * EEPROM related functions
2598 ******************************************************************************/
2601 * Clear the OWNER_MSK, to establish driver (instead of uCode running on
2602 * embedded controller) as EEPROM reader; each read is a series of pulses
2603 * to/from the EEPROM chip, not a single event, so even reads could conflict
2604 * if they weren't arbitrated by some ownership mechanism. Here, the driver
2605 * simply claims ownership, which should be safe when this function is called
2606 * (i.e. before loading uCode!).
2608 static int iwl3945_eeprom_acquire_semaphore(struct iwl_priv *priv)
2610 _iwl_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
2615 static void iwl3945_eeprom_release_semaphore(struct iwl_priv *priv)
2621 * iwl3945_load_bsm - Load bootstrap instructions
2625 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
2626 * in special SRAM that does not power down during RFKILL. When powering back
2627 * up after power-saving sleeps (or during initial uCode load), the BSM loads
2628 * the bootstrap program into the on-board processor, and starts it.
2630 * The bootstrap program loads (via DMA) instructions and data for a new
2631 * program from host DRAM locations indicated by the host driver in the
2632 * BSM_DRAM_* registers. Once the new program is loaded, it starts
2635 * When initializing the NIC, the host driver points the BSM to the
2636 * "initialize" uCode image. This uCode sets up some internal data, then
2637 * notifies host via "initialize alive" that it is complete.
2639 * The host then replaces the BSM_DRAM_* pointer values to point to the
2640 * normal runtime uCode instructions and a backup uCode data cache buffer
2641 * (filled initially with starting data values for the on-board processor),
2642 * then triggers the "initialize" uCode to load and launch the runtime uCode,
2643 * which begins normal operation.
2645 * When doing a power-save shutdown, runtime uCode saves data SRAM into
2646 * the backup data cache in DRAM before SRAM is powered down.
2648 * When powering back up, the BSM loads the bootstrap program. This reloads
2649 * the runtime uCode instructions and the backup data cache into SRAM,
2650 * and re-launches the runtime uCode from where it left off.
2652 static int iwl3945_load_bsm(struct iwl_priv *priv)
2654 __le32 *image = priv->ucode_boot.v_addr;
2655 u32 len = priv->ucode_boot.len;
2665 IWL_DEBUG_INFO(priv, "Begin load bsm\n");
2667 /* make sure bootstrap program is no larger than BSM's SRAM size */
2668 if (len > IWL39_MAX_BSM_SIZE)
2671 /* Tell bootstrap uCode where to find the "Initialize" uCode
2672 * in host DRAM ... host DRAM physical address bits 31:0 for 3945.
2673 * NOTE: iwl3945_initialize_alive_start() will replace these values,
2674 * after the "initialize" uCode has run, to point to
2675 * runtime/protocol instructions and backup data cache. */
2676 pinst = priv->ucode_init.p_addr;
2677 pdata = priv->ucode_init_data.p_addr;
2678 inst_len = priv->ucode_init.len;
2679 data_len = priv->ucode_init_data.len;
2681 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
2682 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
2683 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
2684 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
2686 /* Fill BSM memory with bootstrap instructions */
2687 for (reg_offset = BSM_SRAM_LOWER_BOUND;
2688 reg_offset < BSM_SRAM_LOWER_BOUND + len;
2689 reg_offset += sizeof(u32), image++)
2690 _iwl_write_prph(priv, reg_offset,
2691 le32_to_cpu(*image));
2693 rc = iwl3945_verify_bsm(priv);
2697 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
2698 iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
2699 iwl_write_prph(priv, BSM_WR_MEM_DST_REG,
2700 IWL39_RTC_INST_LOWER_BOUND);
2701 iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
2703 /* Load bootstrap code into instruction SRAM now,
2704 * to prepare to load "initialize" uCode */
2705 iwl_write_prph(priv, BSM_WR_CTRL_REG,
2706 BSM_WR_CTRL_REG_BIT_START);
2708 /* Wait for load of bootstrap uCode to finish */
2709 for (i = 0; i < 100; i++) {
2710 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
2711 if (!(done & BSM_WR_CTRL_REG_BIT_START))
2716 IWL_DEBUG_INFO(priv, "BSM write complete, poll %d iterations\n", i);
2718 IWL_ERR(priv, "BSM write did not complete!\n");
2722 /* Enable future boot loads whenever power management unit triggers it
2723 * (e.g. when powering back up after power-save shutdown) */
2724 iwl_write_prph(priv, BSM_WR_CTRL_REG,
2725 BSM_WR_CTRL_REG_BIT_START_EN);
2730 #define IWL3945_UCODE_GET(item) \
2731 static u32 iwl3945_ucode_get_##item(const struct iwl_ucode_header *ucode,\
2734 return le32_to_cpu(ucode->u.v1.item); \
2737 static u32 iwl3945_ucode_get_header_size(u32 api_ver)
2739 return UCODE_HEADER_SIZE(1);
2741 static u32 iwl3945_ucode_get_build(const struct iwl_ucode_header *ucode,
2746 static u8 *iwl3945_ucode_get_data(const struct iwl_ucode_header *ucode,
2749 return (u8 *) ucode->u.v1.data;
2752 IWL3945_UCODE_GET(inst_size);
2753 IWL3945_UCODE_GET(data_size);
2754 IWL3945_UCODE_GET(init_size);
2755 IWL3945_UCODE_GET(init_data_size);
2756 IWL3945_UCODE_GET(boot_size);
2758 static struct iwl_hcmd_ops iwl3945_hcmd = {
2759 .rxon_assoc = iwl3945_send_rxon_assoc,
2760 .commit_rxon = iwl3945_commit_rxon,
2763 static struct iwl_ucode_ops iwl3945_ucode = {
2764 .get_header_size = iwl3945_ucode_get_header_size,
2765 .get_build = iwl3945_ucode_get_build,
2766 .get_inst_size = iwl3945_ucode_get_inst_size,
2767 .get_data_size = iwl3945_ucode_get_data_size,
2768 .get_init_size = iwl3945_ucode_get_init_size,
2769 .get_init_data_size = iwl3945_ucode_get_init_data_size,
2770 .get_boot_size = iwl3945_ucode_get_boot_size,
2771 .get_data = iwl3945_ucode_get_data,
2774 static struct iwl_lib_ops iwl3945_lib = {
2775 .txq_attach_buf_to_tfd = iwl3945_hw_txq_attach_buf_to_tfd,
2776 .txq_free_tfd = iwl3945_hw_txq_free_tfd,
2777 .txq_init = iwl3945_hw_tx_queue_init,
2778 .load_ucode = iwl3945_load_bsm,
2779 .dump_nic_event_log = iwl3945_dump_nic_event_log,
2780 .dump_nic_error_log = iwl3945_dump_nic_error_log,
2782 .init = iwl3945_apm_init,
2783 .stop = iwl_apm_stop,
2784 .config = iwl3945_nic_config,
2785 .set_pwr_src = iwl3945_set_pwr_src,
2788 .regulatory_bands = {
2789 EEPROM_REGULATORY_BAND_1_CHANNELS,
2790 EEPROM_REGULATORY_BAND_2_CHANNELS,
2791 EEPROM_REGULATORY_BAND_3_CHANNELS,
2792 EEPROM_REGULATORY_BAND_4_CHANNELS,
2793 EEPROM_REGULATORY_BAND_5_CHANNELS,
2794 EEPROM_REGULATORY_BAND_NO_HT40,
2795 EEPROM_REGULATORY_BAND_NO_HT40,
2797 .verify_signature = iwlcore_eeprom_verify_signature,
2798 .acquire_semaphore = iwl3945_eeprom_acquire_semaphore,
2799 .release_semaphore = iwl3945_eeprom_release_semaphore,
2800 .query_addr = iwlcore_eeprom_query_addr,
2802 .send_tx_power = iwl3945_send_tx_power,
2803 .is_valid_rtc_data_addr = iwl3945_hw_valid_rtc_data_addr,
2804 .post_associate = iwl3945_post_associate,
2805 .isr = iwl_isr_legacy,
2806 .config_ap = iwl3945_config_ap,
2809 static struct iwl_hcmd_utils_ops iwl3945_hcmd_utils = {
2810 .get_hcmd_size = iwl3945_get_hcmd_size,
2811 .build_addsta_hcmd = iwl3945_build_addsta_hcmd,
2812 .rts_tx_cmd_flag = iwlcore_rts_tx_cmd_flag,
2815 static struct iwl_ops iwl3945_ops = {
2816 .ucode = &iwl3945_ucode,
2817 .lib = &iwl3945_lib,
2818 .hcmd = &iwl3945_hcmd,
2819 .utils = &iwl3945_hcmd_utils,
2820 .led = &iwl3945_led_ops,
2823 static struct iwl_cfg iwl3945_bg_cfg = {
2825 .fw_name_pre = IWL3945_FW_PRE,
2826 .ucode_api_max = IWL3945_UCODE_API_MAX,
2827 .ucode_api_min = IWL3945_UCODE_API_MIN,
2829 .eeprom_size = IWL3945_EEPROM_IMG_SIZE,
2830 .eeprom_ver = EEPROM_3945_EEPROM_VERSION,
2831 .ops = &iwl3945_ops,
2832 .num_of_queues = IWL39_NUM_QUEUES,
2833 .mod_params = &iwl3945_mod_params,
2834 .pll_cfg_val = CSR39_ANA_PLL_CFG_VAL,
2837 .use_isr_legacy = true,
2838 .ht_greenfield_support = false,
2839 .led_compensation = 64,
2842 static struct iwl_cfg iwl3945_abg_cfg = {
2844 .fw_name_pre = IWL3945_FW_PRE,
2845 .ucode_api_max = IWL3945_UCODE_API_MAX,
2846 .ucode_api_min = IWL3945_UCODE_API_MIN,
2847 .sku = IWL_SKU_A|IWL_SKU_G,
2848 .eeprom_size = IWL3945_EEPROM_IMG_SIZE,
2849 .eeprom_ver = EEPROM_3945_EEPROM_VERSION,
2850 .ops = &iwl3945_ops,
2851 .num_of_queues = IWL39_NUM_QUEUES,
2852 .mod_params = &iwl3945_mod_params,
2853 .use_isr_legacy = true,
2854 .ht_greenfield_support = false,
2855 .led_compensation = 64,
2858 struct pci_device_id iwl3945_hw_card_ids[] = {
2859 {IWL_PCI_DEVICE(0x4222, 0x1005, iwl3945_bg_cfg)},
2860 {IWL_PCI_DEVICE(0x4222, 0x1034, iwl3945_bg_cfg)},
2861 {IWL_PCI_DEVICE(0x4222, 0x1044, iwl3945_bg_cfg)},
2862 {IWL_PCI_DEVICE(0x4227, 0x1014, iwl3945_bg_cfg)},
2863 {IWL_PCI_DEVICE(0x4222, PCI_ANY_ID, iwl3945_abg_cfg)},
2864 {IWL_PCI_DEVICE(0x4227, PCI_ANY_ID, iwl3945_abg_cfg)},
2868 MODULE_DEVICE_TABLE(pci, iwl3945_hw_card_ids);
git://ftp.safe.ca / safe / jmp / linux-2.6 / blob