SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/net/wireless/iwlwifi/iwl-3945.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/init.h>
  30 #include <linux/pci.h>
  31 #include <linux/dma-mapping.h>
  32 #include <linux/delay.h>
  33 #include <linux/skbuff.h>
  34 #include <linux/netdevice.h>
  35 #include <linux/wireless.h>
  36 #include <linux/firmware.h>
  37 #include <linux/etherdevice.h>
  38 #include <asm/unaligned.h>
  39 #include <net/mac80211.h>
  40
  41 #include "iwl-3945-core.h"
  42 #include "iwl-3945.h"
  43 #include "iwl-helpers.h"
  44 #include "iwl-3945-rs.h"
  45
  46 #define IWL_DECLARE_RATE_INFO(r, ip, in, rp, rn, pp, np)    \
  47         [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP,   \
  48                                     IWL_RATE_##r##M_IEEE,   \
  49                                     IWL_RATE_##ip##M_INDEX, \
  50                                     IWL_RATE_##in##M_INDEX, \
  51                                     IWL_RATE_##rp##M_INDEX, \
  52                                     IWL_RATE_##rn##M_INDEX, \
  53                                     IWL_RATE_##pp##M_INDEX, \
  54                                     IWL_RATE_##np##M_INDEX, \
  55                                     IWL_RATE_##r##M_INDEX_TABLE, \
  56                                     IWL_RATE_##ip##M_INDEX_TABLE }
  57
  58 /*
  59  * Parameter order:
  60  *   rate, prev rate, next rate, prev tgg rate, next tgg rate
  61  *
  62  * If there isn't a valid next or previous rate then INV is used which
  63  * maps to IWL_RATE_INVALID
  64  *
  65  */
  66 const struct iwl3945_rate_info iwl3945_rates[IWL_RATE_COUNT] = {
  67         IWL_DECLARE_RATE_INFO(1, INV, 2, INV, 2, INV, 2),    /*  1mbps */
  68         IWL_DECLARE_RATE_INFO(2, 1, 5, 1, 5, 1, 5),          /*  2mbps */
  69         IWL_DECLARE_RATE_INFO(5, 2, 6, 2, 11, 2, 11),        /*5.5mbps */
  70         IWL_DECLARE_RATE_INFO(11, 9, 12, 5, 12, 5, 18),      /* 11mbps */
  71         IWL_DECLARE_RATE_INFO(6, 5, 9, 5, 11, 5, 11),        /*  6mbps */
  72         IWL_DECLARE_RATE_INFO(9, 6, 11, 5, 11, 5, 11),       /*  9mbps */
  73         IWL_DECLARE_RATE_INFO(12, 11, 18, 11, 18, 11, 18),   /* 12mbps */
  74         IWL_DECLARE_RATE_INFO(18, 12, 24, 12, 24, 11, 24),   /* 18mbps */
  75         IWL_DECLARE_RATE_INFO(24, 18, 36, 18, 36, 18, 36),   /* 24mbps */
  76         IWL_DECLARE_RATE_INFO(36, 24, 48, 24, 48, 24, 48),   /* 36mbps */
  77         IWL_DECLARE_RATE_INFO(48, 36, 54, 36, 54, 36, 54),   /* 48mbps */
  78         IWL_DECLARE_RATE_INFO(54, 48, INV, 48, INV, 48, INV),/* 54mbps */
  79 };
  80
  81 /* 1 = enable the iwl3945_disable_events() function */
  82 #define IWL_EVT_DISABLE (0)
  83 #define IWL_EVT_DISABLE_SIZE (1532/32)
  84
  85 /**
  86  * iwl3945_disable_events - Disable selected events in uCode event log
  87  *
  88  * Disable an event by writing "1"s into "disable"
  89  *   bitmap in SRAM.  Bit position corresponds to Event # (id/type).
  90  *   Default values of 0 enable uCode events to be logged.
  91  * Use for only special debugging.  This function is just a placeholder as-is,
  92  *   you'll need to provide the special bits! ...
  93  *   ... and set IWL_EVT_DISABLE to 1. */
  94 void iwl3945_disable_events(struct iwl3945_priv *priv)
  95 {
  96         int ret;
  97         int i;
  98         u32 base;               /* SRAM address of event log header */
  99         u32 disable_ptr;        /* SRAM address of event-disable bitmap array */
 100         u32 array_size;         /* # of u32 entries in array */
 101         u32 evt_disable[IWL_EVT_DISABLE_SIZE] = {
 102                 0x00000000,     /*   31 -    0  Event id numbers */
 103                 0x00000000,     /*   63 -   32 */
 104                 0x00000000,     /*   95 -   64 */
 105                 0x00000000,     /*  127 -   96 */
 106                 0x00000000,     /*  159 -  128 */
 107                 0x00000000,     /*  191 -  160 */
 108                 0x00000000,     /*  223 -  192 */
 109                 0x00000000,     /*  255 -  224 */
 110                 0x00000000,     /*  287 -  256 */
 111                 0x00000000,     /*  319 -  288 */
 112                 0x00000000,     /*  351 -  320 */
 113                 0x00000000,     /*  383 -  352 */
 114                 0x00000000,     /*  415 -  384 */
 115                 0x00000000,     /*  447 -  416 */
 116                 0x00000000,     /*  479 -  448 */
 117                 0x00000000,     /*  511 -  480 */
 118                 0x00000000,     /*  543 -  512 */
 119                 0x00000000,     /*  575 -  544 */
 120                 0x00000000,     /*  607 -  576 */
 121                 0x00000000,     /*  639 -  608 */
 122                 0x00000000,     /*  671 -  640 */
 123                 0x00000000,     /*  703 -  672 */
 124                 0x00000000,     /*  735 -  704 */
 125                 0x00000000,     /*  767 -  736 */
 126                 0x00000000,     /*  799 -  768 */
 127                 0x00000000,     /*  831 -  800 */
 128                 0x00000000,     /*  863 -  832 */
 129                 0x00000000,     /*  895 -  864 */
 130                 0x00000000,     /*  927 -  896 */
 131                 0x00000000,     /*  959 -  928 */
 132                 0x00000000,     /*  991 -  960 */
 133                 0x00000000,     /* 1023 -  992 */
 134                 0x00000000,     /* 1055 - 1024 */
 135                 0x00000000,     /* 1087 - 1056 */
 136                 0x00000000,     /* 1119 - 1088 */
 137                 0x00000000,     /* 1151 - 1120 */
 138                 0x00000000,     /* 1183 - 1152 */
 139                 0x00000000,     /* 1215 - 1184 */
 140                 0x00000000,     /* 1247 - 1216 */
 141                 0x00000000,     /* 1279 - 1248 */
 142                 0x00000000,     /* 1311 - 1280 */
 143                 0x00000000,     /* 1343 - 1312 */
 144                 0x00000000,     /* 1375 - 1344 */
 145                 0x00000000,     /* 1407 - 1376 */
 146                 0x00000000,     /* 1439 - 1408 */
 147                 0x00000000,     /* 1471 - 1440 */
 148                 0x00000000,     /* 1503 - 1472 */
 149         };
 150
 151         base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
 152         if (!iwl3945_hw_valid_rtc_data_addr(base)) {
 153                 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
 154                 return;
 155         }
 156
 157         ret = iwl3945_grab_nic_access(priv);
 158         if (ret) {
 159                 IWL_WARNING("Can not read from adapter at this time.\n");
 160                 return;
 161         }
 162
 163         disable_ptr = iwl3945_read_targ_mem(priv, base + (4 * sizeof(u32)));
 164         array_size = iwl3945_read_targ_mem(priv, base + (5 * sizeof(u32)));
 165         iwl3945_release_nic_access(priv);
 166
 167         if (IWL_EVT_DISABLE && (array_size == IWL_EVT_DISABLE_SIZE)) {
 168                 IWL_DEBUG_INFO("Disabling selected uCode log events at 0x%x\n",
 169                                disable_ptr);
 170                 ret = iwl3945_grab_nic_access(priv);
 171                 for (i = 0; i < IWL_EVT_DISABLE_SIZE; i++)
 172                         iwl3945_write_targ_mem(priv,
 173                                            disable_ptr + (i * sizeof(u32)),
 174                                            evt_disable[i]);
 175
 176                 iwl3945_release_nic_access(priv);
 177         } else {
 178                 IWL_DEBUG_INFO("Selected uCode log events may be disabled\n");
 179                 IWL_DEBUG_INFO("  by writing \"1\"s into disable bitmap\n");
 180                 IWL_DEBUG_INFO("  in SRAM at 0x%x, size %d u32s\n",
 181                                disable_ptr, array_size);
 182         }
 183
 184 }
 185
 186 static int iwl3945_hwrate_to_plcp_idx(u8 plcp)
 187 {
 188         int idx;
 189
 190         for (idx = 0; idx < IWL_RATE_COUNT; idx++)
 191                 if (iwl3945_rates[idx].plcp == plcp)
 192                         return idx;
 193         return -1;
 194 }
 195
 196 /**
 197  * iwl3945_get_antenna_flags - Get antenna flags for RXON command
 198  * @priv: eeprom and antenna fields are used to determine antenna flags
 199  *
 200  * priv->eeprom  is used to determine if antenna AUX/MAIN are reversed
 201  * priv->antenna specifies the antenna diversity mode:
 202  *
 203  * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
 204  * IWL_ANTENNA_MAIN      - Force MAIN antenna
 205  * IWL_ANTENNA_AUX       - Force AUX antenna
 206  */
 207 __le32 iwl3945_get_antenna_flags(const struct iwl3945_priv *priv)
 208 {
 209         switch (priv->antenna) {
 210         case IWL_ANTENNA_DIVERSITY:
 211                 return 0;
 212
 213         case IWL_ANTENNA_MAIN:
 214                 if (priv->eeprom.antenna_switch_type)
 215                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
 216                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
 217
 218         case IWL_ANTENNA_AUX:
 219                 if (priv->eeprom.antenna_switch_type)
 220                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
 221                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
 222         }
 223
 224         /* bad antenna selector value */
 225         IWL_ERROR("Bad antenna selector value (0x%x)\n", priv->antenna);
 226         return 0;               /* "diversity" is default if error */
 227 }
 228
 229 #ifdef CONFIG_IWL3945_DEBUG
 230 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
 231
 232 static const char *iwl3945_get_tx_fail_reason(u32 status)
 233 {
 234         switch (status & TX_STATUS_MSK) {
 235         case TX_STATUS_SUCCESS:
 236                 return "SUCCESS";
 237                 TX_STATUS_ENTRY(SHORT_LIMIT);
 238                 TX_STATUS_ENTRY(LONG_LIMIT);
 239                 TX_STATUS_ENTRY(FIFO_UNDERRUN);
 240                 TX_STATUS_ENTRY(MGMNT_ABORT);
 241                 TX_STATUS_ENTRY(NEXT_FRAG);
 242                 TX_STATUS_ENTRY(LIFE_EXPIRE);
 243                 TX_STATUS_ENTRY(DEST_PS);
 244                 TX_STATUS_ENTRY(ABORTED);
 245                 TX_STATUS_ENTRY(BT_RETRY);
 246                 TX_STATUS_ENTRY(STA_INVALID);
 247                 TX_STATUS_ENTRY(FRAG_DROPPED);
 248                 TX_STATUS_ENTRY(TID_DISABLE);
 249                 TX_STATUS_ENTRY(FRAME_FLUSHED);
 250                 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
 251                 TX_STATUS_ENTRY(TX_LOCKED);
 252                 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
 253         }
 254
 255         return "UNKNOWN";
 256 }
 257 #else
 258 static inline const char *iwl3945_get_tx_fail_reason(u32 status)
 259 {
 260         return "";
 261 }
 262 #endif
 263
 264 /*
 265  * get ieee prev rate from rate scale table.
 266  * for A and B mode we need to overright prev
 267  * value
 268  */
 269 int iwl3945_rs_next_rate(struct iwl3945_priv *priv, int rate)
 270 {
 271         int next_rate = iwl3945_get_prev_ieee_rate(rate);
 272
 273         switch (priv->band) {
 274         case IEEE80211_BAND_5GHZ:
 275                 if (rate == IWL_RATE_12M_INDEX)
 276                         next_rate = IWL_RATE_9M_INDEX;
 277                 else if (rate == IWL_RATE_6M_INDEX)
 278                         next_rate = IWL_RATE_6M_INDEX;
 279                 break;
 280 /* XXX cannot be invoked in current mac80211 so not a regression
 281         case MODE_IEEE80211B:
 282                 if (rate == IWL_RATE_11M_INDEX_TABLE)
 283                         next_rate = IWL_RATE_5M_INDEX_TABLE;
 284                 break;
 285  */
 286         default:
 287                 break;
 288         }
 289
 290         return next_rate;
 291 }
 292
 293
 294 /**
 295  * iwl3945_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
 296  *
 297  * When FW advances 'R' index, all entries between old and new 'R' index
 298  * need to be reclaimed. As result, some free space forms. If there is
 299  * enough free space (> low mark), wake the stack that feeds us.
 300  */
 301 static void iwl3945_tx_queue_reclaim(struct iwl3945_priv *priv,
 302                                      int txq_id, int index)
 303 {
 304         struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
 305         struct iwl3945_queue *q = &txq->q;
 306         struct iwl3945_tx_info *tx_info;
 307
 308         BUG_ON(txq_id == IWL_CMD_QUEUE_NUM);
 309
 310         for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
 311                 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
 312
 313                 tx_info = &txq->txb[txq->q.read_ptr];
 314                 ieee80211_tx_status_irqsafe(priv->hw, tx_info->skb[0]);
 315                 tx_info->skb[0] = NULL;
 316                 iwl3945_hw_txq_free_tfd(priv, txq);
 317         }
 318
 319         if (iwl3945_queue_space(q) > q->low_mark && (txq_id >= 0) &&
 320                         (txq_id != IWL_CMD_QUEUE_NUM) &&
 321                         priv->mac80211_registered)
 322                 ieee80211_wake_queue(priv->hw, txq_id);
 323 }
 324
 325 /**
 326  * iwl3945_rx_reply_tx - Handle Tx response
 327  */
 328 static void iwl3945_rx_reply_tx(struct iwl3945_priv *priv,
 329                             struct iwl3945_rx_mem_buffer *rxb)
 330 {
 331         struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
 332         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
 333         int txq_id = SEQ_TO_QUEUE(sequence);
 334         int index = SEQ_TO_INDEX(sequence);
 335         struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
 336         struct ieee80211_tx_info *info;
 337         struct iwl3945_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
 338         u32  status = le32_to_cpu(tx_resp->status);
 339         int rate_idx;
 340         int fail, i;
 341
 342         if ((index >= txq->q.n_bd) || (iwl3945_x2_queue_used(&txq->q, index) == 0)) {
 343                 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
 344                           "is out of range [0-%d] %d %d\n", txq_id,
 345                           index, txq->q.n_bd, txq->q.write_ptr,
 346                           txq->q.read_ptr);
 347                 return;
 348         }
 349
 350         info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
 351         ieee80211_tx_info_clear_status(info);
 352
 353         /* Fill the MRR chain with some info about on-chip retransmissions */
 354         rate_idx = iwl3945_hwrate_to_plcp_idx(tx_resp->rate);
 355         if (info->band == IEEE80211_BAND_5GHZ)
 356                 rate_idx -= IWL_FIRST_OFDM_RATE;
 357
 358         fail = tx_resp->failure_frame;
 359         for (i = 0; i < IEEE80211_TX_MAX_RATES; i++) {
 360                 int next = iwl3945_rs_next_rate(priv, rate_idx);
 361
 362                 info->status.rates[i].idx = rate_idx;
 363
 364                 /*
 365                  * Put remaining into the last count as best approximation
 366                  * of saying exactly what the hardware would have done...
 367                  */
 368                 if ((rate_idx == next) || (i == IEEE80211_TX_MAX_RATES - 1)) {
 369                         info->status.rates[i].count = fail;
 370                         break;
 371                 }
 372
 373                 info->status.rates[i].count = priv->retry_rate;
 374                 fail -= priv->retry_rate;
 375                 rate_idx = next;
 376                 if (fail <= 0)
 377                         break;
 378         }
 379         info->status.rates[i].count++; /* add final attempt */
 380
 381         /* tx_status->rts_retry_count = tx_resp->failure_rts; */
 382         info->flags |= ((status & TX_STATUS_MSK) == TX_STATUS_SUCCESS) ?
 383                                 IEEE80211_TX_STAT_ACK : 0;
 384
 385         IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n",
 386                         txq_id, iwl3945_get_tx_fail_reason(status), status,
 387                         tx_resp->rate, tx_resp->failure_frame);
 388
 389         IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
 390         iwl3945_tx_queue_reclaim(priv, txq_id, index);
 391
 392         if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
 393                 IWL_ERROR("TODO:  Implement Tx ABORT REQUIRED!!!\n");
 394 }
 395
 396
 397
 398 /*****************************************************************************
 399  *
 400  * Intel PRO/Wireless 3945ABG/BG Network Connection
 401  *
 402  *  RX handler implementations
 403  *
 404  *****************************************************************************/
 405
 406 void iwl3945_hw_rx_statistics(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb)
 407 {
 408         struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
 409         IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
 410                      (int)sizeof(struct iwl3945_notif_statistics),
 411                      le32_to_cpu(pkt->len));
 412
 413         memcpy(&priv->statistics, pkt->u.raw, sizeof(priv->statistics));
 414
 415         iwl3945_led_background(priv);
 416
 417         priv->last_statistics_time = jiffies;
 418 }
 419
 420 /******************************************************************************
 421  *
 422  * Misc. internal state and helper functions
 423  *
 424  ******************************************************************************/
 425 #ifdef CONFIG_IWL3945_DEBUG
 426
 427 /**
 428  * iwl3945_report_frame - dump frame to syslog during debug sessions
 429  *
 430  * You may hack this function to show different aspects of received frames,
 431  * including selective frame dumps.
 432  * group100 parameter selects whether to show 1 out of 100 good frames.
 433  */
 434 static void iwl3945_dbg_report_frame(struct iwl3945_priv *priv,
 435                       struct iwl3945_rx_packet *pkt,
 436                       struct ieee80211_hdr *header, int group100)
 437 {
 438         u32 to_us;
 439         u32 print_summary = 0;
 440         u32 print_dump = 0;     /* set to 1 to dump all frames' contents */
 441         u32 hundred = 0;
 442         u32 dataframe = 0;
 443         __le16 fc;
 444         u16 seq_ctl;
 445         u16 channel;
 446         u16 phy_flags;
 447         u16 length;
 448         u16 status;
 449         u16 bcn_tmr;
 450         u32 tsf_low;
 451         u64 tsf;
 452         u8 rssi;
 453         u8 agc;
 454         u16 sig_avg;
 455         u16 noise_diff;
 456         struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
 457         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 458         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
 459         u8 *data = IWL_RX_DATA(pkt);
 460
 461         /* MAC header */
 462         fc = header->frame_control;
 463         seq_ctl = le16_to_cpu(header->seq_ctrl);
 464
 465         /* metadata */
 466         channel = le16_to_cpu(rx_hdr->channel);
 467         phy_flags = le16_to_cpu(rx_hdr->phy_flags);
 468         length = le16_to_cpu(rx_hdr->len);
 469
 470         /* end-of-frame status and timestamp */
 471         status = le32_to_cpu(rx_end->status);
 472         bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
 473         tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
 474         tsf = le64_to_cpu(rx_end->timestamp);
 475
 476         /* signal statistics */
 477         rssi = rx_stats->rssi;
 478         agc = rx_stats->agc;
 479         sig_avg = le16_to_cpu(rx_stats->sig_avg);
 480         noise_diff = le16_to_cpu(rx_stats->noise_diff);
 481
 482         to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
 483
 484         /* if data frame is to us and all is good,
 485          *   (optionally) print summary for only 1 out of every 100 */
 486         if (to_us && (fc & ~cpu_to_le16(IEEE80211_FCTL_PROTECTED)) ==
 487             cpu_to_le16(IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
 488                 dataframe = 1;
 489                 if (!group100)
 490                         print_summary = 1;      /* print each frame */
 491                 else if (priv->framecnt_to_us < 100) {
 492                         priv->framecnt_to_us++;
 493                         print_summary = 0;
 494                 } else {
 495                         priv->framecnt_to_us = 0;
 496                         print_summary = 1;
 497                         hundred = 1;
 498                 }
 499         } else {
 500                 /* print summary for all other frames */
 501                 print_summary = 1;
 502         }
 503
 504         if (print_summary) {
 505                 char *title;
 506                 int rate;
 507
 508                 if (hundred)
 509                         title = "100Frames";
 510                 else if (ieee80211_has_retry(fc))
 511                         title = "Retry";
 512                 else if (ieee80211_is_assoc_resp(fc))
 513                         title = "AscRsp";
 514                 else if (ieee80211_is_reassoc_resp(fc))
 515                         title = "RasRsp";
 516                 else if (ieee80211_is_probe_resp(fc)) {
 517                         title = "PrbRsp";
 518                         print_dump = 1; /* dump frame contents */
 519                 } else if (ieee80211_is_beacon(fc)) {
 520                         title = "Beacon";
 521                         print_dump = 1; /* dump frame contents */
 522                 } else if (ieee80211_is_atim(fc))
 523                         title = "ATIM";
 524                 else if (ieee80211_is_auth(fc))
 525                         title = "Auth";
 526                 else if (ieee80211_is_deauth(fc))
 527                         title = "DeAuth";
 528                 else if (ieee80211_is_disassoc(fc))
 529                         title = "DisAssoc";
 530                 else
 531                         title = "Frame";
 532
 533                 rate = iwl3945_hwrate_to_plcp_idx(rx_hdr->rate);
 534                 if (rate == -1)
 535                         rate = 0;
 536                 else
 537                         rate = iwl3945_rates[rate].ieee / 2;
 538
 539                 /* print frame summary.
 540                  * MAC addresses show just the last byte (for brevity),
 541                  *    but you can hack it to show more, if you'd like to. */
 542                 if (dataframe)
 543                         IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
 544                                      "len=%u, rssi=%d, chnl=%d, rate=%d, \n",
 545                                      title, le16_to_cpu(fc), header->addr1[5],
 546                                      length, rssi, channel, rate);
 547                 else {
 548                         /* src/dst addresses assume managed mode */
 549                         IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
 550                                      "src=0x%02x, rssi=%u, tim=%lu usec, "
 551                                      "phy=0x%02x, chnl=%d\n",
 552                                      title, le16_to_cpu(fc), header->addr1[5],
 553                                      header->addr3[5], rssi,
 554                                      tsf_low - priv->scan_start_tsf,
 555                                      phy_flags, channel);
 556                 }
 557         }
 558         if (print_dump)
 559                 iwl3945_print_hex_dump(IWL_DL_RX, data, length);
 560 }
 561 #else
 562 static inline void iwl3945_dbg_report_frame(struct iwl3945_priv *priv,
 563                       struct iwl3945_rx_packet *pkt,
 564                       struct ieee80211_hdr *header, int group100)
 565 {
 566 }
 567 #endif
 568
 569 /* This is necessary only for a number of statistics, see the caller. */
 570 static int iwl3945_is_network_packet(struct iwl3945_priv *priv,
 571                 struct ieee80211_hdr *header)
 572 {
 573         /* Filter incoming packets to determine if they are targeted toward
 574          * this network, discarding packets coming from ourselves */
 575         switch (priv->iw_mode) {
 576         case NL80211_IFTYPE_ADHOC: /* Header: Dest. | Source    | BSSID */
 577                 /* packets to our IBSS update information */
 578                 return !compare_ether_addr(header->addr3, priv->bssid);
 579         case NL80211_IFTYPE_STATION: /* Header: Dest. | AP{BSSID} | Source */
 580                 /* packets to our IBSS update information */
 581                 return !compare_ether_addr(header->addr2, priv->bssid);
 582         default:
 583                 return 1;
 584         }
 585 }
 586
 587 static void iwl3945_pass_packet_to_mac80211(struct iwl3945_priv *priv,
 588                                    struct iwl3945_rx_mem_buffer *rxb,
 589                                    struct ieee80211_rx_status *stats)
 590 {
 591         struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
 592 #ifdef CONFIG_IWL3945_LEDS
 593         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
 594 #endif
 595         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 596         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
 597         short len = le16_to_cpu(rx_hdr->len);
 598
 599         /* We received data from the HW, so stop the watchdog */
 600         if (unlikely((len + IWL_RX_FRAME_SIZE) > skb_tailroom(rxb->skb))) {
 601                 IWL_DEBUG_DROP("Corruption detected!\n");
 602                 return;
 603         }
 604
 605         /* We only process data packets if the interface is open */
 606         if (unlikely(!priv->is_open)) {
 607                 IWL_DEBUG_DROP_LIMIT
 608                     ("Dropping packet while interface is not open.\n");
 609                 return;
 610         }
 611
 612         skb_reserve(rxb->skb, (void *)rx_hdr->payload - (void *)pkt);
 613         /* Set the size of the skb to the size of the frame */
 614         skb_put(rxb->skb, le16_to_cpu(rx_hdr->len));
 615
 616         if (iwl3945_param_hwcrypto)
 617                 iwl3945_set_decrypted_flag(priv, rxb->skb,
 618                                        le32_to_cpu(rx_end->status), stats);
 619
 620 #ifdef CONFIG_IWL3945_LEDS
 621         if (ieee80211_is_data(hdr->frame_control))
 622                 priv->rxtxpackets += len;
 623 #endif
 624         ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
 625         rxb->skb = NULL;
 626 }
 627
 628 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
 629
 630 static void iwl3945_rx_reply_rx(struct iwl3945_priv *priv,
 631                                 struct iwl3945_rx_mem_buffer *rxb)
 632 {
 633         struct ieee80211_hdr *header;
 634         struct ieee80211_rx_status rx_status;
 635         struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
 636         struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
 637         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 638         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
 639         int snr;
 640         u16 rx_stats_sig_avg = le16_to_cpu(rx_stats->sig_avg);
 641         u16 rx_stats_noise_diff = le16_to_cpu(rx_stats->noise_diff);
 642         u8 network_packet;
 643
 644         rx_status.flag = 0;
 645         rx_status.mactime = le64_to_cpu(rx_end->timestamp);
 646         rx_status.freq =
 647                 ieee80211_channel_to_frequency(le16_to_cpu(rx_hdr->channel));
 648         rx_status.band = (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
 649                                 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
 650
 651         rx_status.rate_idx = iwl3945_hwrate_to_plcp_idx(rx_hdr->rate);
 652         if (rx_status.band == IEEE80211_BAND_5GHZ)
 653                 rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
 654
 655         rx_status.antenna = le16_to_cpu(rx_hdr->phy_flags &
 656                                         RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
 657
 658         /* set the preamble flag if appropriate */
 659         if (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
 660                 rx_status.flag |= RX_FLAG_SHORTPRE;
 661
 662         if ((unlikely(rx_stats->phy_count > 20))) {
 663                 IWL_DEBUG_DROP
 664                     ("dsp size out of range [0,20]: "
 665                      "%d/n", rx_stats->phy_count);
 666                 return;
 667         }
 668
 669         if (!(rx_end->status & RX_RES_STATUS_NO_CRC32_ERROR)
 670             || !(rx_end->status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
 671                 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n", rx_end->status);
 672                 return;
 673         }
 674
 675
 676
 677         /* Convert 3945's rssi indicator to dBm */
 678         rx_status.signal = rx_stats->rssi - IWL_RSSI_OFFSET;
 679
 680         /* Set default noise value to -127 */
 681         if (priv->last_rx_noise == 0)
 682                 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
 683
 684         /* 3945 provides noise info for OFDM frames only.
 685          * sig_avg and noise_diff are measured by the 3945's digital signal
 686          *   processor (DSP), and indicate linear levels of signal level and
 687          *   distortion/noise within the packet preamble after
 688          *   automatic gain control (AGC).  sig_avg should stay fairly
 689          *   constant if the radio's AGC is working well.
 690          * Since these values are linear (not dB or dBm), linear
 691          *   signal-to-noise ratio (SNR) is (sig_avg / noise_diff).
 692          * Convert linear SNR to dB SNR, then subtract that from rssi dBm
 693          *   to obtain noise level in dBm.
 694          * Calculate rx_status.signal (quality indicator in %) based on SNR. */
 695         if (rx_stats_noise_diff) {
 696                 snr = rx_stats_sig_avg / rx_stats_noise_diff;
 697                 rx_status.noise = rx_status.signal -
 698                                         iwl3945_calc_db_from_ratio(snr);
 699                 rx_status.qual = iwl3945_calc_sig_qual(rx_status.signal,
 700                                                          rx_status.noise);
 701
 702         /* If noise info not available, calculate signal quality indicator (%)
 703          *   using just the dBm signal level. */
 704         } else {
 705                 rx_status.noise = priv->last_rx_noise;
 706                 rx_status.qual = iwl3945_calc_sig_qual(rx_status.signal, 0);
 707         }
 708
 709
 710         IWL_DEBUG_STATS("Rssi %d noise %d qual %d sig_avg %d noise_diff %d\n",
 711                         rx_status.signal, rx_status.noise, rx_status.qual,
 712                         rx_stats_sig_avg, rx_stats_noise_diff);
 713
 714         header = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
 715
 716         network_packet = iwl3945_is_network_packet(priv, header);
 717
 718         IWL_DEBUG_STATS_LIMIT("[%c] %d RSSI:%d Signal:%u, Noise:%u, Rate:%u\n",
 719                               network_packet ? '*' : ' ',
 720                               le16_to_cpu(rx_hdr->channel),
 721                               rx_status.signal, rx_status.signal,
 722                               rx_status.noise, rx_status.rate_idx);
 723
 724 #ifdef CONFIG_IWL3945_DEBUG
 725         if (iwl3945_debug_level & (IWL_DL_RX))
 726                 /* Set "1" to report good data frames in groups of 100 */
 727                 iwl3945_dbg_report_frame(priv, pkt, header, 1);
 728 #endif
 729
 730         if (network_packet) {
 731                 priv->last_beacon_time = le32_to_cpu(rx_end->beacon_timestamp);
 732                 priv->last_tsf = le64_to_cpu(rx_end->timestamp);
 733                 priv->last_rx_rssi = rx_status.signal;
 734                 priv->last_rx_noise = rx_status.noise;
 735         }
 736
 737         iwl3945_pass_packet_to_mac80211(priv, rxb, &rx_status);
 738 }
 739
 740 int iwl3945_hw_txq_attach_buf_to_tfd(struct iwl3945_priv *priv, void *ptr,
 741                                  dma_addr_t addr, u16 len)
 742 {
 743         int count;
 744         u32 pad;
 745         struct iwl3945_tfd_frame *tfd = (struct iwl3945_tfd_frame *)ptr;
 746
 747         count = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
 748         pad = TFD_CTL_PAD_GET(le32_to_cpu(tfd->control_flags));
 749
 750         if ((count >= NUM_TFD_CHUNKS) || (count < 0)) {
 751                 IWL_ERROR("Error can not send more than %d chunks\n",
 752                           NUM_TFD_CHUNKS);
 753                 return -EINVAL;
 754         }
 755
 756         tfd->pa[count].addr = cpu_to_le32(addr);
 757         tfd->pa[count].len = cpu_to_le32(len);
 758
 759         count++;
 760
 761         tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(count) |
 762                                          TFD_CTL_PAD_SET(pad));
 763
 764         return 0;
 765 }
 766
 767 /**
 768  * iwl3945_hw_txq_free_tfd - Free one TFD, those at index [txq->q.read_ptr]
 769  *
 770  * Does NOT advance any indexes
 771  */
 772 int iwl3945_hw_txq_free_tfd(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
 773 {
 774         struct iwl3945_tfd_frame *bd_tmp = (struct iwl3945_tfd_frame *)&txq->bd[0];
 775         struct iwl3945_tfd_frame *bd = &bd_tmp[txq->q.read_ptr];
 776         struct pci_dev *dev = priv->pci_dev;
 777         int i;
 778         int counter;
 779
 780         /* classify bd */
 781         if (txq->q.id == IWL_CMD_QUEUE_NUM)
 782                 /* nothing to cleanup after for host commands */
 783                 return 0;
 784
 785         /* sanity check */
 786         counter = TFD_CTL_COUNT_GET(le32_to_cpu(bd->control_flags));
 787         if (counter > NUM_TFD_CHUNKS) {
 788                 IWL_ERROR("Too many chunks: %i\n", counter);
 789                 /* @todo issue fatal error, it is quite serious situation */
 790                 return 0;
 791         }
 792
 793         /* unmap chunks if any */
 794
 795         for (i = 1; i < counter; i++) {
 796                 pci_unmap_single(dev, le32_to_cpu(bd->pa[i].addr),
 797                                  le32_to_cpu(bd->pa[i].len), PCI_DMA_TODEVICE);
 798                 if (txq->txb[txq->q.read_ptr].skb[0]) {
 799                         struct sk_buff *skb = txq->txb[txq->q.read_ptr].skb[0];
 800                         if (txq->txb[txq->q.read_ptr].skb[0]) {
 801                                 /* Can be called from interrupt context */
 802                                 dev_kfree_skb_any(skb);
 803                                 txq->txb[txq->q.read_ptr].skb[0] = NULL;
 804                         }
 805                 }
 806         }
 807         return 0;
 808 }
 809
 810 u8 iwl3945_hw_find_station(struct iwl3945_priv *priv, const u8 *addr)
 811 {
 812         int i;
 813         int ret = IWL_INVALID_STATION;
 814         unsigned long flags;
 815
 816         spin_lock_irqsave(&priv->sta_lock, flags);
 817         for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
 818                 if ((priv->stations[i].used) &&
 819                     (!compare_ether_addr
 820                      (priv->stations[i].sta.sta.addr, addr))) {
 821                         ret = i;
 822                         goto out;
 823                 }
 824
 825         IWL_DEBUG_INFO("can not find STA %pM (total %d)\n",
 826                        addr, priv->num_stations);
 827  out:
 828         spin_unlock_irqrestore(&priv->sta_lock, flags);
 829         return ret;
 830 }
 831
 832 /**
 833  * iwl3945_hw_build_tx_cmd_rate - Add rate portion to TX_CMD:
 834  *
 835 */
 836 void iwl3945_hw_build_tx_cmd_rate(struct iwl3945_priv *priv,
 837                               struct iwl3945_cmd *cmd,
 838                               struct ieee80211_tx_info *info,
 839                               struct ieee80211_hdr *hdr, int sta_id, int tx_id)
 840 {
 841         unsigned long flags;
 842         u16 hw_value = ieee80211_get_tx_rate(priv->hw, info)->hw_value;
 843         u16 rate_index = min(hw_value & 0xffff, IWL_RATE_COUNT - 1);
 844         u16 rate_mask;
 845         int rate;
 846         u8 rts_retry_limit;
 847         u8 data_retry_limit;
 848         __le32 tx_flags;
 849         __le16 fc = hdr->frame_control;
 850
 851         rate = iwl3945_rates[rate_index].plcp;
 852         tx_flags = cmd->cmd.tx.tx_flags;
 853
 854         /* We need to figure out how to get the sta->supp_rates while
 855          * in this running context */
 856         rate_mask = IWL_RATES_MASK;
 857
 858         spin_lock_irqsave(&priv->sta_lock, flags);
 859
 860         priv->stations[sta_id].current_rate.rate_n_flags = rate;
 861
 862         if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) &&
 863             (sta_id != priv->hw_setting.bcast_sta_id) &&
 864                 (sta_id != IWL_MULTICAST_ID))
 865                 priv->stations[IWL_STA_ID].current_rate.rate_n_flags = rate;
 866
 867         spin_unlock_irqrestore(&priv->sta_lock, flags);
 868
 869         if (tx_id >= IWL_CMD_QUEUE_NUM)
 870                 rts_retry_limit = 3;
 871         else
 872                 rts_retry_limit = 7;
 873
 874         if (ieee80211_is_probe_resp(fc)) {
 875                 data_retry_limit = 3;
 876                 if (data_retry_limit < rts_retry_limit)
 877                         rts_retry_limit = data_retry_limit;
 878         } else
 879                 data_retry_limit = IWL_DEFAULT_TX_RETRY;
 880
 881         if (priv->data_retry_limit != -1)
 882                 data_retry_limit = priv->data_retry_limit;
 883
 884         if (ieee80211_is_mgmt(fc)) {
 885                 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
 886                 case cpu_to_le16(IEEE80211_STYPE_AUTH):
 887                 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
 888                 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
 889                 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
 890                         if (tx_flags & TX_CMD_FLG_RTS_MSK) {
 891                                 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
 892                                 tx_flags |= TX_CMD_FLG_CTS_MSK;
 893                         }
 894                         break;
 895                 default:
 896                         break;
 897                 }
 898         }
 899
 900         cmd->cmd.tx.rts_retry_limit = rts_retry_limit;
 901         cmd->cmd.tx.data_retry_limit = data_retry_limit;
 902         cmd->cmd.tx.rate = rate;
 903         cmd->cmd.tx.tx_flags = tx_flags;
 904
 905         /* OFDM */
 906         cmd->cmd.tx.supp_rates[0] =
 907            ((rate_mask & IWL_OFDM_RATES_MASK) >> IWL_FIRST_OFDM_RATE) & 0xFF;
 908
 909         /* CCK */
 910         cmd->cmd.tx.supp_rates[1] = (rate_mask & 0xF);
 911
 912         IWL_DEBUG_RATE("Tx sta id: %d, rate: %d (plcp), flags: 0x%4X "
 913                        "cck/ofdm mask: 0x%x/0x%x\n", sta_id,
 914                        cmd->cmd.tx.rate, le32_to_cpu(cmd->cmd.tx.tx_flags),
 915                        cmd->cmd.tx.supp_rates[1], cmd->cmd.tx.supp_rates[0]);
 916 }
 917
 918 u8 iwl3945_sync_sta(struct iwl3945_priv *priv, int sta_id, u16 tx_rate, u8 flags)
 919 {
 920         unsigned long flags_spin;
 921         struct iwl3945_station_entry *station;
 922
 923         if (sta_id == IWL_INVALID_STATION)
 924                 return IWL_INVALID_STATION;
 925
 926         spin_lock_irqsave(&priv->sta_lock, flags_spin);
 927         station = &priv->stations[sta_id];
 928
 929         station->sta.sta.modify_mask = STA_MODIFY_TX_RATE_MSK;
 930         station->sta.rate_n_flags = cpu_to_le16(tx_rate);
 931         station->current_rate.rate_n_flags = tx_rate;
 932         station->sta.mode = STA_CONTROL_MODIFY_MSK;
 933
 934         spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
 935
 936         iwl3945_send_add_station(priv, &station->sta, flags);
 937         IWL_DEBUG_RATE("SCALE sync station %d to rate %d\n",
 938                         sta_id, tx_rate);
 939         return sta_id;
 940 }
 941
 942 static int iwl3945_nic_set_pwr_src(struct iwl3945_priv *priv, int pwr_max)
 943 {
 944         int rc;
 945         unsigned long flags;
 946
 947         spin_lock_irqsave(&priv->lock, flags);
 948         rc = iwl3945_grab_nic_access(priv);
 949         if (rc) {
 950                 spin_unlock_irqrestore(&priv->lock, flags);
 951                 return rc;
 952         }
 953
 954         if (!pwr_max) {
 955                 u32 val;
 956
 957                 rc = pci_read_config_dword(priv->pci_dev,
 958                                 PCI_POWER_SOURCE, &val);
 959                 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
 960                         iwl3945_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 961                                         APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 962                                         ~APMG_PS_CTRL_MSK_PWR_SRC);
 963                         iwl3945_release_nic_access(priv);
 964
 965                         iwl3945_poll_bit(priv, CSR_GPIO_IN,
 966                                      CSR_GPIO_IN_VAL_VAUX_PWR_SRC,
 967                                      CSR_GPIO_IN_BIT_AUX_POWER, 5000);
 968                 } else
 969                         iwl3945_release_nic_access(priv);
 970         } else {
 971                 iwl3945_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 972                                 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 973                                 ~APMG_PS_CTRL_MSK_PWR_SRC);
 974
 975                 iwl3945_release_nic_access(priv);
 976                 iwl3945_poll_bit(priv, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC,
 977                              CSR_GPIO_IN_BIT_AUX_POWER, 5000);  /* uS */
 978         }
 979         spin_unlock_irqrestore(&priv->lock, flags);
 980
 981         return rc;
 982 }
 983
 984 static int iwl3945_rx_init(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
 985 {
 986         int rc;
 987         unsigned long flags;
 988
 989         spin_lock_irqsave(&priv->lock, flags);
 990         rc = iwl3945_grab_nic_access(priv);
 991         if (rc) {
 992                 spin_unlock_irqrestore(&priv->lock, flags);
 993                 return rc;
 994         }
 995
 996         iwl3945_write_direct32(priv, FH_RCSR_RBD_BASE(0), rxq->dma_addr);
 997         iwl3945_write_direct32(priv, FH_RCSR_RPTR_ADDR(0),
 998                              priv->hw_setting.shared_phys +
 999                              offsetof(struct iwl3945_shared, rx_read_ptr[0]));
1000         iwl3945_write_direct32(priv, FH_RCSR_WPTR(0), 0);
1001         iwl3945_write_direct32(priv, FH_RCSR_CONFIG(0),
1002                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE |
1003                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE |
1004                 ALM_FH_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN |
1005                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 |
1006                 (RX_QUEUE_SIZE_LOG << ALM_FH_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE) |
1007                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST |
1008                 (1 << ALM_FH_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH) |
1009                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH);
1010
1011         /* fake read to flush all prev I/O */
1012         iwl3945_read_direct32(priv, FH_RSSR_CTRL);
1013
1014         iwl3945_release_nic_access(priv);
1015         spin_unlock_irqrestore(&priv->lock, flags);
1016
1017         return 0;
1018 }
1019
1020 static int iwl3945_tx_reset(struct iwl3945_priv *priv)
1021 {
1022         int rc;
1023         unsigned long flags;
1024
1025         spin_lock_irqsave(&priv->lock, flags);
1026         rc = iwl3945_grab_nic_access(priv);
1027         if (rc) {
1028                 spin_unlock_irqrestore(&priv->lock, flags);
1029                 return rc;
1030         }
1031
1032         /* bypass mode */
1033         iwl3945_write_prph(priv, ALM_SCD_MODE_REG, 0x2);
1034
1035         /* RA 0 is active */
1036         iwl3945_write_prph(priv, ALM_SCD_ARASTAT_REG, 0x01);
1037
1038         /* all 6 fifo are active */
1039         iwl3945_write_prph(priv, ALM_SCD_TXFACT_REG, 0x3f);
1040
1041         iwl3945_write_prph(priv, ALM_SCD_SBYP_MODE_1_REG, 0x010000);
1042         iwl3945_write_prph(priv, ALM_SCD_SBYP_MODE_2_REG, 0x030002);
1043         iwl3945_write_prph(priv, ALM_SCD_TXF4MF_REG, 0x000004);
1044         iwl3945_write_prph(priv, ALM_SCD_TXF5MF_REG, 0x000005);
1045
1046         iwl3945_write_direct32(priv, FH_TSSR_CBB_BASE,
1047                              priv->hw_setting.shared_phys);
1048
1049         iwl3945_write_direct32(priv, FH_TSSR_MSG_CONFIG,
1050                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON |
1051                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON |
1052                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B |
1053                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON |
1054                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON |
1055                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH |
1056                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH);
1057
1058         iwl3945_release_nic_access(priv);
1059         spin_unlock_irqrestore(&priv->lock, flags);
1060
1061         return 0;
1062 }
1063
1064 /**
1065  * iwl3945_txq_ctx_reset - Reset TX queue context
1066  *
1067  * Destroys all DMA structures and initialize them again
1068  */
1069 static int iwl3945_txq_ctx_reset(struct iwl3945_priv *priv)
1070 {
1071         int rc;
1072         int txq_id, slots_num;
1073
1074         iwl3945_hw_txq_ctx_free(priv);
1075
1076         /* Tx CMD queue */
1077         rc = iwl3945_tx_reset(priv);
1078         if (rc)
1079                 goto error;
1080
1081         /* Tx queue(s) */
1082         for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++) {
1083                 slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
1084                                 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
1085                 rc = iwl3945_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
1086                                 txq_id);
1087                 if (rc) {
1088                         IWL_ERROR("Tx %d queue init failed\n", txq_id);
1089                         goto error;
1090                 }
1091         }
1092
1093         return rc;
1094
1095  error:
1096         iwl3945_hw_txq_ctx_free(priv);
1097         return rc;
1098 }
1099
1100 int iwl3945_hw_nic_init(struct iwl3945_priv *priv)
1101 {
1102         u8 rev_id;
1103         int rc;
1104         unsigned long flags;
1105         struct iwl3945_rx_queue *rxq = &priv->rxq;
1106
1107         iwl3945_power_init_handle(priv);
1108
1109         spin_lock_irqsave(&priv->lock, flags);
1110         iwl3945_set_bit(priv, CSR_ANA_PLL_CFG, CSR39_ANA_PLL_CFG_VAL);
1111         iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1112                     CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1113
1114         iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1115         rc = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
1116                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1117                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1118         if (rc < 0) {
1119                 spin_unlock_irqrestore(&priv->lock, flags);
1120                 IWL_DEBUG_INFO("Failed to init the card\n");
1121                 return rc;
1122         }
1123
1124         rc = iwl3945_grab_nic_access(priv);
1125         if (rc) {
1126                 spin_unlock_irqrestore(&priv->lock, flags);
1127                 return rc;
1128         }
1129         iwl3945_write_prph(priv, APMG_CLK_EN_REG,
1130                                  APMG_CLK_VAL_DMA_CLK_RQT |
1131                                  APMG_CLK_VAL_BSM_CLK_RQT);
1132         udelay(20);
1133         iwl3945_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1134                                     APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1135         iwl3945_release_nic_access(priv);
1136         spin_unlock_irqrestore(&priv->lock, flags);
1137
1138         /* Determine HW type */
1139         rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
1140         if (rc)
1141                 return rc;
1142         IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id);
1143
1144         iwl3945_nic_set_pwr_src(priv, 1);
1145         spin_lock_irqsave(&priv->lock, flags);
1146
1147         if (rev_id & PCI_CFG_REV_ID_BIT_RTP)
1148                 IWL_DEBUG_INFO("RTP type \n");
1149         else if (rev_id & PCI_CFG_REV_ID_BIT_BASIC_SKU) {
1150                 IWL_DEBUG_INFO("3945 RADIO-MB type\n");
1151                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1152                             CSR39_HW_IF_CONFIG_REG_BIT_3945_MB);
1153         } else {
1154                 IWL_DEBUG_INFO("3945 RADIO-MM type\n");
1155                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1156                             CSR39_HW_IF_CONFIG_REG_BIT_3945_MM);
1157         }
1158
1159         if (EEPROM_SKU_CAP_OP_MODE_MRC == priv->eeprom.sku_cap) {
1160                 IWL_DEBUG_INFO("SKU OP mode is mrc\n");
1161                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1162                             CSR39_HW_IF_CONFIG_REG_BIT_SKU_MRC);
1163         } else
1164                 IWL_DEBUG_INFO("SKU OP mode is basic\n");
1165
1166         if ((priv->eeprom.board_revision & 0xF0) == 0xD0) {
1167                 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
1168                                priv->eeprom.board_revision);
1169                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1170                             CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
1171         } else {
1172                 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
1173                                priv->eeprom.board_revision);
1174                 iwl3945_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
1175                               CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
1176         }
1177
1178         if (priv->eeprom.almgor_m_version <= 1) {
1179                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1180                             CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A);
1181                 IWL_DEBUG_INFO("Card M type A version is 0x%X\n",
1182                                priv->eeprom.almgor_m_version);
1183         } else {
1184                 IWL_DEBUG_INFO("Card M type B version is 0x%X\n",
1185                                priv->eeprom.almgor_m_version);
1186                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1187                             CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B);
1188         }
1189         spin_unlock_irqrestore(&priv->lock, flags);
1190
1191         if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
1192                 IWL_DEBUG_RF_KILL("SW RF KILL supported in EEPROM.\n");
1193
1194         if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
1195                 IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n");
1196
1197         /* Allocate the RX queue, or reset if it is already allocated */
1198         if (!rxq->bd) {
1199                 rc = iwl3945_rx_queue_alloc(priv);
1200                 if (rc) {
1201                         IWL_ERROR("Unable to initialize Rx queue\n");
1202                         return -ENOMEM;
1203                 }
1204         } else
1205                 iwl3945_rx_queue_reset(priv, rxq);
1206
1207         iwl3945_rx_replenish(priv);
1208
1209         iwl3945_rx_init(priv, rxq);
1210
1211         spin_lock_irqsave(&priv->lock, flags);
1212
1213         /* Look at using this instead:
1214         rxq->need_update = 1;
1215         iwl3945_rx_queue_update_write_ptr(priv, rxq);
1216         */
1217
1218         rc = iwl3945_grab_nic_access(priv);
1219         if (rc) {
1220                 spin_unlock_irqrestore(&priv->lock, flags);
1221                 return rc;
1222         }
1223         iwl3945_write_direct32(priv, FH_RCSR_WPTR(0), rxq->write & ~7);
1224         iwl3945_release_nic_access(priv);
1225
1226         spin_unlock_irqrestore(&priv->lock, flags);
1227
1228         rc = iwl3945_txq_ctx_reset(priv);
1229         if (rc)
1230                 return rc;
1231
1232         set_bit(STATUS_INIT, &priv->status);
1233
1234         return 0;
1235 }
1236
1237 /**
1238  * iwl3945_hw_txq_ctx_free - Free TXQ Context
1239  *
1240  * Destroy all TX DMA queues and structures
1241  */
1242 void iwl3945_hw_txq_ctx_free(struct iwl3945_priv *priv)
1243 {
1244         int txq_id;
1245
1246         /* Tx queues */
1247         for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++)
1248                 iwl3945_tx_queue_free(priv, &priv->txq[txq_id]);
1249 }
1250
1251 void iwl3945_hw_txq_ctx_stop(struct iwl3945_priv *priv)
1252 {
1253         int queue;
1254         unsigned long flags;
1255
1256         spin_lock_irqsave(&priv->lock, flags);
1257         if (iwl3945_grab_nic_access(priv)) {
1258                 spin_unlock_irqrestore(&priv->lock, flags);
1259                 iwl3945_hw_txq_ctx_free(priv);
1260                 return;
1261         }
1262
1263         /* stop SCD */
1264         iwl3945_write_prph(priv, ALM_SCD_MODE_REG, 0);
1265
1266         /* reset TFD queues */
1267         for (queue = TFD_QUEUE_MIN; queue < TFD_QUEUE_MAX; queue++) {
1268                 iwl3945_write_direct32(priv, FH_TCSR_CONFIG(queue), 0x0);
1269                 iwl3945_poll_direct_bit(priv, FH_TSSR_TX_STATUS,
1270                                 ALM_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(queue),
1271                                 1000);
1272         }
1273
1274         iwl3945_release_nic_access(priv);
1275         spin_unlock_irqrestore(&priv->lock, flags);
1276
1277         iwl3945_hw_txq_ctx_free(priv);
1278 }
1279
1280 int iwl3945_hw_nic_stop_master(struct iwl3945_priv *priv)
1281 {
1282         int rc = 0;
1283         u32 reg_val;
1284         unsigned long flags;
1285
1286         spin_lock_irqsave(&priv->lock, flags);
1287
1288         /* set stop master bit */
1289         iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1290
1291         reg_val = iwl3945_read32(priv, CSR_GP_CNTRL);
1292
1293         if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
1294             (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
1295                 IWL_DEBUG_INFO("Card in power save, master is already "
1296                                "stopped\n");
1297         else {
1298                 rc = iwl3945_poll_bit(priv, CSR_RESET,
1299                                   CSR_RESET_REG_FLAG_MASTER_DISABLED,
1300                                   CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
1301                 if (rc < 0) {
1302                         spin_unlock_irqrestore(&priv->lock, flags);
1303                         return rc;
1304                 }
1305         }
1306
1307         spin_unlock_irqrestore(&priv->lock, flags);
1308         IWL_DEBUG_INFO("stop master\n");
1309
1310         return rc;
1311 }
1312
1313 int iwl3945_hw_nic_reset(struct iwl3945_priv *priv)
1314 {
1315         int rc;
1316         unsigned long flags;
1317
1318         iwl3945_hw_nic_stop_master(priv);
1319
1320         spin_lock_irqsave(&priv->lock, flags);
1321
1322         iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1323
1324         rc = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
1325                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1326                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1327
1328         rc = iwl3945_grab_nic_access(priv);
1329         if (!rc) {
1330                 iwl3945_write_prph(priv, APMG_CLK_CTRL_REG,
1331                                          APMG_CLK_VAL_BSM_CLK_RQT);
1332
1333                 udelay(10);
1334
1335                 iwl3945_set_bit(priv, CSR_GP_CNTRL,
1336                             CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1337
1338                 iwl3945_write_prph(priv, APMG_RTC_INT_MSK_REG, 0x0);
1339                 iwl3945_write_prph(priv, APMG_RTC_INT_STT_REG,
1340                                         0xFFFFFFFF);
1341
1342                 /* enable DMA */
1343                 iwl3945_write_prph(priv, APMG_CLK_EN_REG,
1344                                          APMG_CLK_VAL_DMA_CLK_RQT |
1345                                          APMG_CLK_VAL_BSM_CLK_RQT);
1346                 udelay(10);
1347
1348                 iwl3945_set_bits_prph(priv, APMG_PS_CTRL_REG,
1349                                 APMG_PS_CTRL_VAL_RESET_REQ);
1350                 udelay(5);
1351                 iwl3945_clear_bits_prph(priv, APMG_PS_CTRL_REG,
1352                                 APMG_PS_CTRL_VAL_RESET_REQ);
1353                 iwl3945_release_nic_access(priv);
1354         }
1355
1356         /* Clear the 'host command active' bit... */
1357         clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1358
1359         wake_up_interruptible(&priv->wait_command_queue);
1360         spin_unlock_irqrestore(&priv->lock, flags);
1361
1362         return rc;
1363 }
1364
1365 /**
1366  * iwl3945_hw_reg_adjust_power_by_temp
1367  * return index delta into power gain settings table
1368 */
1369 static int iwl3945_hw_reg_adjust_power_by_temp(int new_reading, int old_reading)
1370 {
1371         return (new_reading - old_reading) * (-11) / 100;
1372 }
1373
1374 /**
1375  * iwl3945_hw_reg_temp_out_of_range - Keep temperature in sane range
1376  */
1377 static inline int iwl3945_hw_reg_temp_out_of_range(int temperature)
1378 {
1379         return ((temperature < -260) || (temperature > 25)) ? 1 : 0;
1380 }
1381
1382 int iwl3945_hw_get_temperature(struct iwl3945_priv *priv)
1383 {
1384         return iwl3945_read32(priv, CSR_UCODE_DRV_GP2);
1385 }
1386
1387 /**
1388  * iwl3945_hw_reg_txpower_get_temperature
1389  * get the current temperature by reading from NIC
1390 */
1391 static int iwl3945_hw_reg_txpower_get_temperature(struct iwl3945_priv *priv)
1392 {
1393         int temperature;
1394
1395         temperature = iwl3945_hw_get_temperature(priv);
1396
1397         /* driver's okay range is -260 to +25.
1398          *   human readable okay range is 0 to +285 */
1399         IWL_DEBUG_INFO("Temperature: %d\n", temperature + IWL_TEMP_CONVERT);
1400
1401         /* handle insane temp reading */
1402         if (iwl3945_hw_reg_temp_out_of_range(temperature)) {
1403                 IWL_ERROR("Error bad temperature value  %d\n", temperature);
1404
1405                 /* if really really hot(?),
1406                  *   substitute the 3rd band/group's temp measured at factory */
1407                 if (priv->last_temperature > 100)
1408                         temperature = priv->eeprom.groups[2].temperature;
1409                 else /* else use most recent "sane" value from driver */
1410                         temperature = priv->last_temperature;
1411         }
1412
1413         return temperature;     /* raw, not "human readable" */
1414 }
1415
1416 /* Adjust Txpower only if temperature variance is greater than threshold.
1417  *
1418  * Both are lower than older versions' 9 degrees */
1419 #define IWL_TEMPERATURE_LIMIT_TIMER   6
1420
1421 /**
1422  * is_temp_calib_needed - determines if new calibration is needed
1423  *
1424  * records new temperature in tx_mgr->temperature.
1425  * replaces tx_mgr->last_temperature *only* if calib needed
1426  *    (assumes caller will actually do the calibration!). */
1427 static int is_temp_calib_needed(struct iwl3945_priv *priv)
1428 {
1429         int temp_diff;
1430
1431         priv->temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
1432         temp_diff = priv->temperature - priv->last_temperature;
1433
1434         /* get absolute value */
1435         if (temp_diff < 0) {
1436                 IWL_DEBUG_POWER("Getting cooler, delta %d,\n", temp_diff);
1437                 temp_diff = -temp_diff;
1438         } else if (temp_diff == 0)
1439                 IWL_DEBUG_POWER("Same temp,\n");
1440         else
1441                 IWL_DEBUG_POWER("Getting warmer, delta %d,\n", temp_diff);
1442
1443         /* if we don't need calibration, *don't* update last_temperature */
1444         if (temp_diff < IWL_TEMPERATURE_LIMIT_TIMER) {
1445                 IWL_DEBUG_POWER("Timed thermal calib not needed\n");
1446                 return 0;
1447         }
1448
1449         IWL_DEBUG_POWER("Timed thermal calib needed\n");
1450
1451         /* assume that caller will actually do calib ...
1452          *   update the "last temperature" value */
1453         priv->last_temperature = priv->temperature;
1454         return 1;
1455 }
1456
1457 #define IWL_MAX_GAIN_ENTRIES 78
1458 #define IWL_CCK_FROM_OFDM_POWER_DIFF  -5
1459 #define IWL_CCK_FROM_OFDM_INDEX_DIFF (10)
1460
1461 /* radio and DSP power table, each step is 1/2 dB.
1462  * 1st number is for RF analog gain, 2nd number is for DSP pre-DAC gain. */
1463 static struct iwl3945_tx_power power_gain_table[2][IWL_MAX_GAIN_ENTRIES] = {
1464         {
1465          {251, 127},            /* 2.4 GHz, highest power */
1466          {251, 127},
1467          {251, 127},
1468          {251, 127},
1469          {251, 125},
1470          {251, 110},
1471          {251, 105},
1472          {251, 98},
1473          {187, 125},
1474          {187, 115},
1475          {187, 108},
1476          {187, 99},
1477          {243, 119},
1478          {243, 111},
1479          {243, 105},
1480          {243, 97},
1481          {243, 92},
1482          {211, 106},
1483          {211, 100},
1484          {179, 120},
1485          {179, 113},
1486          {179, 107},
1487          {147, 125},
1488          {147, 119},
1489          {147, 112},
1490          {147, 106},
1491          {147, 101},
1492          {147, 97},
1493          {147, 91},
1494          {115, 107},
1495          {235, 121},
1496          {235, 115},
1497          {235, 109},
1498          {203, 127},
1499          {203, 121},
1500          {203, 115},
1501          {203, 108},
1502          {203, 102},
1503          {203, 96},
1504          {203, 92},
1505          {171, 110},
1506          {171, 104},
1507          {171, 98},
1508          {139, 116},
1509          {227, 125},
1510          {227, 119},
1511          {227, 113},
1512          {227, 107},
1513          {227, 101},
1514          {227, 96},
1515          {195, 113},
1516          {195, 106},
1517          {195, 102},
1518          {195, 95},
1519          {163, 113},
1520          {163, 106},
1521          {163, 102},
1522          {163, 95},
1523          {131, 113},
1524          {131, 106},
1525          {131, 102},
1526          {131, 95},
1527          {99, 113},
1528          {99, 106},
1529          {99, 102},
1530          {99, 95},
1531          {67, 113},
1532          {67, 106},
1533          {67, 102},
1534          {67, 95},
1535          {35, 113},
1536          {35, 106},
1537          {35, 102},
1538          {35, 95},
1539          {3, 113},
1540          {3, 106},
1541          {3, 102},
1542          {3, 95} },             /* 2.4 GHz, lowest power */
1543         {
1544          {251, 127},            /* 5.x GHz, highest power */
1545          {251, 120},
1546          {251, 114},
1547          {219, 119},
1548          {219, 101},
1549          {187, 113},
1550          {187, 102},
1551          {155, 114},
1552          {155, 103},
1553          {123, 117},
1554          {123, 107},
1555          {123, 99},
1556          {123, 92},
1557          {91, 108},
1558          {59, 125},
1559          {59, 118},
1560          {59, 109},
1561          {59, 102},
1562          {59, 96},
1563          {59, 90},
1564          {27, 104},
1565          {27, 98},
1566          {27, 92},
1567          {115, 118},
1568          {115, 111},
1569          {115, 104},
1570          {83, 126},
1571          {83, 121},
1572          {83, 113},
1573          {83, 105},
1574          {83, 99},
1575          {51, 118},
1576          {51, 111},
1577          {51, 104},
1578          {51, 98},
1579          {19, 116},
1580          {19, 109},
1581          {19, 102},
1582          {19, 98},
1583          {19, 93},
1584          {171, 113},
1585          {171, 107},
1586          {171, 99},
1587          {139, 120},
1588          {139, 113},
1589          {139, 107},
1590          {139, 99},
1591          {107, 120},
1592          {107, 113},
1593          {107, 107},
1594          {107, 99},
1595          {75, 120},
1596          {75, 113},
1597          {75, 107},
1598          {75, 99},
1599          {43, 120},
1600          {43, 113},
1601          {43, 107},
1602          {43, 99},
1603          {11, 120},
1604          {11, 113},
1605          {11, 107},
1606          {11, 99},
1607          {131, 107},
1608          {131, 99},
1609          {99, 120},
1610          {99, 113},
1611          {99, 107},
1612          {99, 99},
1613          {67, 120},
1614          {67, 113},
1615          {67, 107},
1616          {67, 99},
1617          {35, 120},
1618          {35, 113},
1619          {35, 107},
1620          {35, 99},
1621          {3, 120} }             /* 5.x GHz, lowest power */
1622 };
1623
1624 static inline u8 iwl3945_hw_reg_fix_power_index(int index)
1625 {
1626         if (index < 0)
1627                 return 0;
1628         if (index >= IWL_MAX_GAIN_ENTRIES)
1629                 return IWL_MAX_GAIN_ENTRIES - 1;
1630         return (u8) index;
1631 }
1632
1633 /* Kick off thermal recalibration check every 60 seconds */
1634 #define REG_RECALIB_PERIOD (60)
1635
1636 /**
1637  * iwl3945_hw_reg_set_scan_power - Set Tx power for scan probe requests
1638  *
1639  * Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK)
1640  * or 6 Mbit (OFDM) rates.
1641  */
1642 static void iwl3945_hw_reg_set_scan_power(struct iwl3945_priv *priv, u32 scan_tbl_index,
1643                                s32 rate_index, const s8 *clip_pwrs,
1644                                struct iwl3945_channel_info *ch_info,
1645                                int band_index)
1646 {
1647         struct iwl3945_scan_power_info *scan_power_info;
1648         s8 power;
1649         u8 power_index;
1650
1651         scan_power_info = &ch_info->scan_pwr_info[scan_tbl_index];
1652
1653         /* use this channel group's 6Mbit clipping/saturation pwr,
1654          *   but cap at regulatory scan power restriction (set during init
1655          *   based on eeprom channel data) for this channel.  */
1656         power = min(ch_info->scan_power, clip_pwrs[IWL_RATE_6M_INDEX_TABLE]);
1657
1658         /* further limit to user's max power preference.
1659          * FIXME:  Other spectrum management power limitations do not
1660          *   seem to apply?? */
1661         power = min(power, priv->user_txpower_limit);
1662         scan_power_info->requested_power = power;
1663
1664         /* find difference between new scan *power* and current "normal"
1665          *   Tx *power* for 6Mb.  Use this difference (x2) to adjust the
1666          *   current "normal" temperature-compensated Tx power *index* for
1667          *   this rate (1Mb or 6Mb) to yield new temp-compensated scan power
1668          *   *index*. */
1669         power_index = ch_info->power_info[rate_index].power_table_index
1670             - (power - ch_info->power_info
1671                [IWL_RATE_6M_INDEX_TABLE].requested_power) * 2;
1672
1673         /* store reference index that we use when adjusting *all* scan
1674          *   powers.  So we can accommodate user (all channel) or spectrum
1675          *   management (single channel) power changes "between" temperature
1676          *   feedback compensation procedures.
1677          * don't force fit this reference index into gain table; it may be a
1678          *   negative number.  This will help avoid errors when we're at
1679          *   the lower bounds (highest gains, for warmest temperatures)
1680          *   of the table. */
1681
1682         /* don't exceed table bounds for "real" setting */
1683         power_index = iwl3945_hw_reg_fix_power_index(power_index);
1684
1685         scan_power_info->power_table_index = power_index;
1686         scan_power_info->tpc.tx_gain =
1687             power_gain_table[band_index][power_index].tx_gain;
1688         scan_power_info->tpc.dsp_atten =
1689             power_gain_table[band_index][power_index].dsp_atten;
1690 }
1691
1692 /**
1693  * iwl3945_hw_reg_send_txpower - fill in Tx Power command with gain settings
1694  *
1695  * Configures power settings for all rates for the current channel,
1696  * using values from channel info struct, and send to NIC
1697  */
1698 int iwl3945_hw_reg_send_txpower(struct iwl3945_priv *priv)
1699 {
1700         int rate_idx, i;
1701         const struct iwl3945_channel_info *ch_info = NULL;
1702         struct iwl3945_txpowertable_cmd txpower = {
1703                 .channel = priv->active_rxon.channel,
1704         };
1705
1706         txpower.band = (priv->band == IEEE80211_BAND_5GHZ) ? 0 : 1;
1707         ch_info = iwl3945_get_channel_info(priv,
1708                                        priv->band,
1709                                        le16_to_cpu(priv->active_rxon.channel));
1710         if (!ch_info) {
1711                 IWL_ERROR
1712                     ("Failed to get channel info for channel %d [%d]\n",
1713                      le16_to_cpu(priv->active_rxon.channel), priv->band);
1714                 return -EINVAL;
1715         }
1716
1717         if (!is_channel_valid(ch_info)) {
1718                 IWL_DEBUG_POWER("Not calling TX_PWR_TABLE_CMD on "
1719                                 "non-Tx channel.\n");
1720                 return 0;
1721         }
1722
1723         /* fill cmd with power settings for all rates for current channel */
1724         /* Fill OFDM rate */
1725         for (rate_idx = IWL_FIRST_OFDM_RATE, i = 0;
1726              rate_idx <= IWL_LAST_OFDM_RATE; rate_idx++, i++) {
1727
1728                 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1729                 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1730
1731                 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1732                                 le16_to_cpu(txpower.channel),
1733                                 txpower.band,
1734                                 txpower.power[i].tpc.tx_gain,
1735                                 txpower.power[i].tpc.dsp_atten,
1736                                 txpower.power[i].rate);
1737         }
1738         /* Fill CCK rates */
1739         for (rate_idx = IWL_FIRST_CCK_RATE;
1740              rate_idx <= IWL_LAST_CCK_RATE; rate_idx++, i++) {
1741                 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1742                 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1743
1744                 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1745                                 le16_to_cpu(txpower.channel),
1746                                 txpower.band,
1747                                 txpower.power[i].tpc.tx_gain,
1748                                 txpower.power[i].tpc.dsp_atten,
1749                                 txpower.power[i].rate);
1750         }
1751
1752         return iwl3945_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD,
1753                         sizeof(struct iwl3945_txpowertable_cmd), &txpower);
1754
1755 }
1756
1757 /**
1758  * iwl3945_hw_reg_set_new_power - Configures power tables at new levels
1759  * @ch_info: Channel to update.  Uses power_info.requested_power.
1760  *
1761  * Replace requested_power and base_power_index ch_info fields for
1762  * one channel.
1763  *
1764  * Called if user or spectrum management changes power preferences.
1765  * Takes into account h/w and modulation limitations (clip power).
1766  *
1767  * This does *not* send anything to NIC, just sets up ch_info for one channel.
1768  *
1769  * NOTE: reg_compensate_for_temperature_dif() *must* be run after this to
1770  *       properly fill out the scan powers, and actual h/w gain settings,
1771  *       and send changes to NIC
1772  */
1773 static int iwl3945_hw_reg_set_new_power(struct iwl3945_priv *priv,
1774                              struct iwl3945_channel_info *ch_info)
1775 {
1776         struct iwl3945_channel_power_info *power_info;
1777         int power_changed = 0;
1778         int i;
1779         const s8 *clip_pwrs;
1780         int power;
1781
1782         /* Get this chnlgrp's rate-to-max/clip-powers table */
1783         clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1784
1785         /* Get this channel's rate-to-current-power settings table */
1786         power_info = ch_info->power_info;
1787
1788         /* update OFDM Txpower settings */
1789         for (i = IWL_RATE_6M_INDEX_TABLE; i <= IWL_RATE_54M_INDEX_TABLE;
1790              i++, ++power_info) {
1791                 int delta_idx;
1792
1793                 /* limit new power to be no more than h/w capability */
1794                 power = min(ch_info->curr_txpow, clip_pwrs[i]);
1795                 if (power == power_info->requested_power)
1796                         continue;
1797
1798                 /* find difference between old and new requested powers,
1799                  *    update base (non-temp-compensated) power index */
1800                 delta_idx = (power - power_info->requested_power) * 2;
1801                 power_info->base_power_index -= delta_idx;
1802
1803                 /* save new requested power value */
1804                 power_info->requested_power = power;
1805
1806                 power_changed = 1;
1807         }
1808
1809         /* update CCK Txpower settings, based on OFDM 12M setting ...
1810          *    ... all CCK power settings for a given channel are the *same*. */
1811         if (power_changed) {
1812                 power =
1813                     ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1814                     requested_power + IWL_CCK_FROM_OFDM_POWER_DIFF;
1815
1816                 /* do all CCK rates' iwl3945_channel_power_info structures */
1817                 for (i = IWL_RATE_1M_INDEX_TABLE; i <= IWL_RATE_11M_INDEX_TABLE; i++) {
1818                         power_info->requested_power = power;
1819                         power_info->base_power_index =
1820                             ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1821                             base_power_index + IWL_CCK_FROM_OFDM_INDEX_DIFF;
1822                         ++power_info;
1823                 }
1824         }
1825
1826         return 0;
1827 }
1828
1829 /**
1830  * iwl3945_hw_reg_get_ch_txpower_limit - returns new power limit for channel
1831  *
1832  * NOTE: Returned power limit may be less (but not more) than requested,
1833  *       based strictly on regulatory (eeprom and spectrum mgt) limitations
1834  *       (no consideration for h/w clipping limitations).
1835  */
1836 static int iwl3945_hw_reg_get_ch_txpower_limit(struct iwl3945_channel_info *ch_info)
1837 {
1838         s8 max_power;
1839
1840 #if 0
1841         /* if we're using TGd limits, use lower of TGd or EEPROM */
1842         if (ch_info->tgd_data.max_power != 0)
1843                 max_power = min(ch_info->tgd_data.max_power,
1844                                 ch_info->eeprom.max_power_avg);
1845
1846         /* else just use EEPROM limits */
1847         else
1848 #endif
1849                 max_power = ch_info->eeprom.max_power_avg;
1850
1851         return min(max_power, ch_info->max_power_avg);
1852 }
1853
1854 /**
1855  * iwl3945_hw_reg_comp_txpower_temp - Compensate for temperature
1856  *
1857  * Compensate txpower settings of *all* channels for temperature.
1858  * This only accounts for the difference between current temperature
1859  *   and the factory calibration temperatures, and bases the new settings
1860  *   on the channel's base_power_index.
1861  *
1862  * If RxOn is "associated", this sends the new Txpower to NIC!
1863  */
1864 static int iwl3945_hw_reg_comp_txpower_temp(struct iwl3945_priv *priv)
1865 {
1866         struct iwl3945_channel_info *ch_info = NULL;
1867         int delta_index;
1868         const s8 *clip_pwrs; /* array of h/w max power levels for each rate */
1869         u8 a_band;
1870         u8 rate_index;
1871         u8 scan_tbl_index;
1872         u8 i;
1873         int ref_temp;
1874         int temperature = priv->temperature;
1875
1876         /* set up new Tx power info for each and every channel, 2.4 and 5.x */
1877         for (i = 0; i < priv->channel_count; i++) {
1878                 ch_info = &priv->channel_info[i];
1879                 a_band = is_channel_a_band(ch_info);
1880
1881                 /* Get this chnlgrp's factory calibration temperature */
1882                 ref_temp = (s16)priv->eeprom.groups[ch_info->group_index].
1883                     temperature;
1884
1885                 /* get power index adjustment based on current and factory
1886                  * temps */
1887                 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
1888                                                               ref_temp);
1889
1890                 /* set tx power value for all rates, OFDM and CCK */
1891                 for (rate_index = 0; rate_index < IWL_RATE_COUNT;
1892                      rate_index++) {
1893                         int power_idx =
1894                             ch_info->power_info[rate_index].base_power_index;
1895
1896                         /* temperature compensate */
1897                         power_idx += delta_index;
1898
1899                         /* stay within table range */
1900                         power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
1901                         ch_info->power_info[rate_index].
1902                             power_table_index = (u8) power_idx;
1903                         ch_info->power_info[rate_index].tpc =
1904                             power_gain_table[a_band][power_idx];
1905                 }
1906
1907                 /* Get this chnlgrp's rate-to-max/clip-powers table */
1908                 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1909
1910                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
1911                 for (scan_tbl_index = 0;
1912                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
1913                         s32 actual_index = (scan_tbl_index == 0) ?
1914                             IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
1915                         iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
1916                                            actual_index, clip_pwrs,
1917                                            ch_info, a_band);
1918                 }
1919         }
1920
1921         /* send Txpower command for current channel to ucode */
1922         return iwl3945_hw_reg_send_txpower(priv);
1923 }
1924
1925 int iwl3945_hw_reg_set_txpower(struct iwl3945_priv *priv, s8 power)
1926 {
1927         struct iwl3945_channel_info *ch_info;
1928         s8 max_power;
1929         u8 a_band;
1930         u8 i;
1931
1932         if (priv->user_txpower_limit == power) {
1933                 IWL_DEBUG_POWER("Requested Tx power same as current "
1934                                 "limit: %ddBm.\n", power);
1935                 return 0;
1936         }
1937
1938         IWL_DEBUG_POWER("Setting upper limit clamp to %ddBm.\n", power);
1939         priv->user_txpower_limit = power;
1940
1941         /* set up new Tx powers for each and every channel, 2.4 and 5.x */
1942
1943         for (i = 0; i < priv->channel_count; i++) {
1944                 ch_info = &priv->channel_info[i];
1945                 a_band = is_channel_a_band(ch_info);
1946
1947                 /* find minimum power of all user and regulatory constraints
1948                  *    (does not consider h/w clipping limitations) */
1949                 max_power = iwl3945_hw_reg_get_ch_txpower_limit(ch_info);
1950                 max_power = min(power, max_power);
1951                 if (max_power != ch_info->curr_txpow) {
1952                         ch_info->curr_txpow = max_power;
1953
1954                         /* this considers the h/w clipping limitations */
1955                         iwl3945_hw_reg_set_new_power(priv, ch_info);
1956                 }
1957         }
1958
1959         /* update txpower settings for all channels,
1960          *   send to NIC if associated. */
1961         is_temp_calib_needed(priv);
1962         iwl3945_hw_reg_comp_txpower_temp(priv);
1963
1964         return 0;
1965 }
1966
1967 /* will add 3945 channel switch cmd handling later */
1968 int iwl3945_hw_channel_switch(struct iwl3945_priv *priv, u16 channel)
1969 {
1970         return 0;
1971 }
1972
1973 /**
1974  * iwl3945_reg_txpower_periodic -  called when time to check our temperature.
1975  *
1976  * -- reset periodic timer
1977  * -- see if temp has changed enough to warrant re-calibration ... if so:
1978  *     -- correct coeffs for temp (can reset temp timer)
1979  *     -- save this temp as "last",
1980  *     -- send new set of gain settings to NIC
1981  * NOTE:  This should continue working, even when we're not associated,
1982  *   so we can keep our internal table of scan powers current. */
1983 void iwl3945_reg_txpower_periodic(struct iwl3945_priv *priv)
1984 {
1985         /* This will kick in the "brute force"
1986          * iwl3945_hw_reg_comp_txpower_temp() below */
1987         if (!is_temp_calib_needed(priv))
1988                 goto reschedule;
1989
1990         /* Set up a new set of temp-adjusted TxPowers, send to NIC.
1991          * This is based *only* on current temperature,
1992          * ignoring any previous power measurements */
1993         iwl3945_hw_reg_comp_txpower_temp(priv);
1994
1995  reschedule:
1996         queue_delayed_work(priv->workqueue,
1997                            &priv->thermal_periodic, REG_RECALIB_PERIOD * HZ);
1998 }
1999
2000 static void iwl3945_bg_reg_txpower_periodic(struct work_struct *work)
2001 {
2002         struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv,
2003                                              thermal_periodic.work);
2004
2005         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2006                 return;
2007
2008         mutex_lock(&priv->mutex);
2009         iwl3945_reg_txpower_periodic(priv);
2010         mutex_unlock(&priv->mutex);
2011 }
2012
2013 /**
2014  * iwl3945_hw_reg_get_ch_grp_index - find the channel-group index (0-4)
2015  *                                 for the channel.
2016  *
2017  * This function is used when initializing channel-info structs.
2018  *
2019  * NOTE: These channel groups do *NOT* match the bands above!
2020  *       These channel groups are based on factory-tested channels;
2021  *       on A-band, EEPROM's "group frequency" entries represent the top
2022  *       channel in each group 1-4.  Group 5 All B/G channels are in group 0.
2023  */
2024 static u16 iwl3945_hw_reg_get_ch_grp_index(struct iwl3945_priv *priv,
2025                                        const struct iwl3945_channel_info *ch_info)
2026 {
2027         struct iwl3945_eeprom_txpower_group *ch_grp = &priv->eeprom.groups[0];
2028         u8 group;
2029         u16 group_index = 0;    /* based on factory calib frequencies */
2030         u8 grp_channel;
2031
2032         /* Find the group index for the channel ... don't use index 1(?) */
2033         if (is_channel_a_band(ch_info)) {
2034                 for (group = 1; group < 5; group++) {
2035                         grp_channel = ch_grp[group].group_channel;
2036                         if (ch_info->channel <= grp_channel) {
2037                                 group_index = group;
2038                                 break;
2039                         }
2040                 }
2041                 /* group 4 has a few channels *above* its factory cal freq */
2042                 if (group == 5)
2043                         group_index = 4;
2044         } else
2045                 group_index = 0;        /* 2.4 GHz, group 0 */
2046
2047         IWL_DEBUG_POWER("Chnl %d mapped to grp %d\n", ch_info->channel,
2048                         group_index);
2049         return group_index;
2050 }
2051
2052 /**
2053  * iwl3945_hw_reg_get_matched_power_index - Interpolate to get nominal index
2054  *
2055  * Interpolate to get nominal (i.e. at factory calibration temperature) index
2056  *   into radio/DSP gain settings table for requested power.
2057  */
2058 static int iwl3945_hw_reg_get_matched_power_index(struct iwl3945_priv *priv,
2059                                        s8 requested_power,
2060                                        s32 setting_index, s32 *new_index)
2061 {
2062         const struct iwl3945_eeprom_txpower_group *chnl_grp = NULL;
2063         s32 index0, index1;
2064         s32 power = 2 * requested_power;
2065         s32 i;
2066         const struct iwl3945_eeprom_txpower_sample *samples;
2067         s32 gains0, gains1;
2068         s32 res;
2069         s32 denominator;
2070
2071         chnl_grp = &priv->eeprom.groups[setting_index];
2072         samples = chnl_grp->samples;
2073         for (i = 0; i < 5; i++) {
2074                 if (power == samples[i].power) {
2075                         *new_index = samples[i].gain_index;
2076                         return 0;
2077                 }
2078         }
2079
2080         if (power > samples[1].power) {
2081                 index0 = 0;
2082                 index1 = 1;
2083         } else if (power > samples[2].power) {
2084                 index0 = 1;
2085                 index1 = 2;
2086         } else if (power > samples[3].power) {
2087                 index0 = 2;
2088                 index1 = 3;
2089         } else {
2090                 index0 = 3;
2091                 index1 = 4;
2092         }
2093
2094         denominator = (s32) samples[index1].power - (s32) samples[index0].power;
2095         if (denominator == 0)
2096                 return -EINVAL;
2097         gains0 = (s32) samples[index0].gain_index * (1 << 19);
2098         gains1 = (s32) samples[index1].gain_index * (1 << 19);
2099         res = gains0 + (gains1 - gains0) *
2100             ((s32) power - (s32) samples[index0].power) / denominator +
2101             (1 << 18);
2102         *new_index = res >> 19;
2103         return 0;
2104 }
2105
2106 static void iwl3945_hw_reg_init_channel_groups(struct iwl3945_priv *priv)
2107 {
2108         u32 i;
2109         s32 rate_index;
2110         const struct iwl3945_eeprom_txpower_group *group;
2111
2112         IWL_DEBUG_POWER("Initializing factory calib info from EEPROM\n");
2113
2114         for (i = 0; i < IWL_NUM_TX_CALIB_GROUPS; i++) {
2115                 s8 *clip_pwrs;  /* table of power levels for each rate */
2116                 s8 satur_pwr;   /* saturation power for each chnl group */
2117                 group = &priv->eeprom.groups[i];
2118
2119                 /* sanity check on factory saturation power value */
2120                 if (group->saturation_power < 40) {
2121                         IWL_WARNING("Error: saturation power is %d, "
2122                                     "less than minimum expected 40\n",
2123                                     group->saturation_power);
2124                         return;
2125                 }
2126
2127                 /*
2128                  * Derive requested power levels for each rate, based on
2129                  *   hardware capabilities (saturation power for band).
2130                  * Basic value is 3dB down from saturation, with further
2131                  *   power reductions for highest 3 data rates.  These
2132                  *   backoffs provide headroom for high rate modulation
2133                  *   power peaks, without too much distortion (clipping).
2134                  */
2135                 /* we'll fill in this array with h/w max power levels */
2136                 clip_pwrs = (s8 *) priv->clip_groups[i].clip_powers;
2137
2138                 /* divide factory saturation power by 2 to find -3dB level */
2139                 satur_pwr = (s8) (group->saturation_power >> 1);
2140
2141                 /* fill in channel group's nominal powers for each rate */
2142                 for (rate_index = 0;
2143                      rate_index < IWL_RATE_COUNT; rate_index++, clip_pwrs++) {
2144                         switch (rate_index) {
2145                         case IWL_RATE_36M_INDEX_TABLE:
2146                                 if (i == 0)     /* B/G */
2147                                         *clip_pwrs = satur_pwr;
2148                                 else    /* A */
2149                                         *clip_pwrs = satur_pwr - 5;
2150                                 break;
2151                         case IWL_RATE_48M_INDEX_TABLE:
2152                                 if (i == 0)
2153                                         *clip_pwrs = satur_pwr - 7;
2154                                 else
2155                                         *clip_pwrs = satur_pwr - 10;
2156                                 break;
2157                         case IWL_RATE_54M_INDEX_TABLE:
2158                                 if (i == 0)
2159                                         *clip_pwrs = satur_pwr - 9;
2160                                 else
2161                                         *clip_pwrs = satur_pwr - 12;
2162                                 break;
2163                         default:
2164                                 *clip_pwrs = satur_pwr;
2165                                 break;
2166                         }
2167                 }
2168         }
2169 }
2170
2171 /**
2172  * iwl3945_txpower_set_from_eeprom - Set channel power info based on EEPROM
2173  *
2174  * Second pass (during init) to set up priv->channel_info
2175  *
2176  * Set up Tx-power settings in our channel info database for each VALID
2177  * (for this geo/SKU) channel, at all Tx data rates, based on eeprom values
2178  * and current temperature.
2179  *
2180  * Since this is based on current temperature (at init time), these values may
2181  * not be valid for very long, but it gives us a starting/default point,
2182  * and allows us to active (i.e. using Tx) scan.
2183  *
2184  * This does *not* write values to NIC, just sets up our internal table.
2185  */
2186 int iwl3945_txpower_set_from_eeprom(struct iwl3945_priv *priv)
2187 {
2188         struct iwl3945_channel_info *ch_info = NULL;
2189         struct iwl3945_channel_power_info *pwr_info;
2190         int delta_index;
2191         u8 rate_index;
2192         u8 scan_tbl_index;
2193         const s8 *clip_pwrs;    /* array of power levels for each rate */
2194         u8 gain, dsp_atten;
2195         s8 power;
2196         u8 pwr_index, base_pwr_index, a_band;
2197         u8 i;
2198         int temperature;
2199
2200         /* save temperature reference,
2201          *   so we can determine next time to calibrate */
2202         temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
2203         priv->last_temperature = temperature;
2204
2205         iwl3945_hw_reg_init_channel_groups(priv);
2206
2207         /* initialize Tx power info for each and every channel, 2.4 and 5.x */
2208         for (i = 0, ch_info = priv->channel_info; i < priv->channel_count;
2209              i++, ch_info++) {
2210                 a_band = is_channel_a_band(ch_info);
2211                 if (!is_channel_valid(ch_info))
2212                         continue;
2213
2214                 /* find this channel's channel group (*not* "band") index */
2215                 ch_info->group_index =
2216                         iwl3945_hw_reg_get_ch_grp_index(priv, ch_info);
2217
2218                 /* Get this chnlgrp's rate->max/clip-powers table */
2219                 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
2220
2221                 /* calculate power index *adjustment* value according to
2222                  *  diff between current temperature and factory temperature */
2223                 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
2224                                 priv->eeprom.groups[ch_info->group_index].
2225                                 temperature);
2226
2227                 IWL_DEBUG_POWER("Delta index for channel %d: %d [%d]\n",
2228                                 ch_info->channel, delta_index, temperature +
2229                                 IWL_TEMP_CONVERT);
2230
2231                 /* set tx power value for all OFDM rates */
2232                 for (rate_index = 0; rate_index < IWL_OFDM_RATES;
2233                      rate_index++) {
2234                         s32 power_idx;
2235                         int rc;
2236
2237                         /* use channel group's clip-power table,
2238                          *   but don't exceed channel's max power */
2239                         s8 pwr = min(ch_info->max_power_avg,
2240                                      clip_pwrs[rate_index]);
2241
2242                         pwr_info = &ch_info->power_info[rate_index];
2243
2244                         /* get base (i.e. at factory-measured temperature)
2245                          *    power table index for this rate's power */
2246                         rc = iwl3945_hw_reg_get_matched_power_index(priv, pwr,
2247                                                          ch_info->group_index,
2248                                                          &power_idx);
2249                         if (rc) {
2250                                 IWL_ERROR("Invalid power index\n");
2251                                 return rc;
2252                         }
2253                         pwr_info->base_power_index = (u8) power_idx;
2254
2255                         /* temperature compensate */
2256                         power_idx += delta_index;
2257
2258                         /* stay within range of gain table */
2259                         power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
2260
2261                         /* fill 1 OFDM rate's iwl3945_channel_power_info struct */
2262                         pwr_info->requested_power = pwr;
2263                         pwr_info->power_table_index = (u8) power_idx;
2264                         pwr_info->tpc.tx_gain =
2265                             power_gain_table[a_band][power_idx].tx_gain;
2266                         pwr_info->tpc.dsp_atten =
2267                             power_gain_table[a_band][power_idx].dsp_atten;
2268                 }
2269
2270                 /* set tx power for CCK rates, based on OFDM 12 Mbit settings*/
2271                 pwr_info = &ch_info->power_info[IWL_RATE_12M_INDEX_TABLE];
2272                 power = pwr_info->requested_power +
2273                         IWL_CCK_FROM_OFDM_POWER_DIFF;
2274                 pwr_index = pwr_info->power_table_index +
2275                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2276                 base_pwr_index = pwr_info->base_power_index +
2277                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2278
2279                 /* stay within table range */
2280                 pwr_index = iwl3945_hw_reg_fix_power_index(pwr_index);
2281                 gain = power_gain_table[a_band][pwr_index].tx_gain;
2282                 dsp_atten = power_gain_table[a_band][pwr_index].dsp_atten;
2283
2284                 /* fill each CCK rate's iwl3945_channel_power_info structure
2285                  * NOTE:  All CCK-rate Txpwrs are the same for a given chnl!
2286                  * NOTE:  CCK rates start at end of OFDM rates! */
2287                 for (rate_index = 0;
2288                      rate_index < IWL_CCK_RATES; rate_index++) {
2289                         pwr_info = &ch_info->power_info[rate_index+IWL_OFDM_RATES];
2290                         pwr_info->requested_power = power;
2291                         pwr_info->power_table_index = pwr_index;
2292                         pwr_info->base_power_index = base_pwr_index;
2293                         pwr_info->tpc.tx_gain = gain;
2294                         pwr_info->tpc.dsp_atten = dsp_atten;
2295                 }
2296
2297                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2298                 for (scan_tbl_index = 0;
2299                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
2300                         s32 actual_index = (scan_tbl_index == 0) ?
2301                                 IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
2302                         iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
2303                                 actual_index, clip_pwrs, ch_info, a_band);
2304                 }
2305         }
2306
2307         return 0;
2308 }
2309
2310 int iwl3945_hw_rxq_stop(struct iwl3945_priv *priv)
2311 {
2312         int rc;
2313         unsigned long flags;
2314
2315         spin_lock_irqsave(&priv->lock, flags);
2316         rc = iwl3945_grab_nic_access(priv);
2317         if (rc) {
2318                 spin_unlock_irqrestore(&priv->lock, flags);
2319                 return rc;
2320         }
2321
2322         iwl3945_write_direct32(priv, FH_RCSR_CONFIG(0), 0);
2323         rc = iwl3945_poll_direct_bit(priv, FH_RSSR_STATUS, (1 << 24), 1000);
2324         if (rc < 0)
2325                 IWL_ERROR("Can't stop Rx DMA.\n");
2326
2327         iwl3945_release_nic_access(priv);
2328         spin_unlock_irqrestore(&priv->lock, flags);
2329
2330         return 0;
2331 }
2332
2333 int iwl3945_hw_tx_queue_init(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
2334 {
2335         int rc;
2336         unsigned long flags;
2337         int txq_id = txq->q.id;
2338
2339         struct iwl3945_shared *shared_data = priv->hw_setting.shared_virt;
2340
2341         shared_data->tx_base_ptr[txq_id] = cpu_to_le32((u32)txq->q.dma_addr);
2342
2343         spin_lock_irqsave(&priv->lock, flags);
2344         rc = iwl3945_grab_nic_access(priv);
2345         if (rc) {
2346                 spin_unlock_irqrestore(&priv->lock, flags);
2347                 return rc;
2348         }
2349         iwl3945_write_direct32(priv, FH_CBCC_CTRL(txq_id), 0);
2350         iwl3945_write_direct32(priv, FH_CBCC_BASE(txq_id), 0);
2351
2352         iwl3945_write_direct32(priv, FH_TCSR_CONFIG(txq_id),
2353                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT |
2354                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF |
2355                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD |
2356                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL |
2357                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE);
2358         iwl3945_release_nic_access(priv);
2359
2360         /* fake read to flush all prev. writes */
2361         iwl3945_read32(priv, FH_TSSR_CBB_BASE);
2362         spin_unlock_irqrestore(&priv->lock, flags);
2363
2364         return 0;
2365 }
2366
2367 int iwl3945_hw_get_rx_read(struct iwl3945_priv *priv)
2368 {
2369         struct iwl3945_shared *shared_data = priv->hw_setting.shared_virt;
2370
2371         return le32_to_cpu(shared_data->rx_read_ptr[0]);
2372 }
2373
2374 /**
2375  * iwl3945_init_hw_rate_table - Initialize the hardware rate fallback table
2376  */
2377 int iwl3945_init_hw_rate_table(struct iwl3945_priv *priv)
2378 {
2379         int rc, i, index, prev_index;
2380         struct iwl3945_rate_scaling_cmd rate_cmd = {
2381                 .reserved = {0, 0, 0},
2382         };
2383         struct iwl3945_rate_scaling_info *table = rate_cmd.table;
2384
2385         for (i = 0; i < ARRAY_SIZE(iwl3945_rates); i++) {
2386                 index = iwl3945_rates[i].table_rs_index;
2387
2388                 table[index].rate_n_flags =
2389                         iwl3945_hw_set_rate_n_flags(iwl3945_rates[i].plcp, 0);
2390                 table[index].try_cnt = priv->retry_rate;
2391                 prev_index = iwl3945_get_prev_ieee_rate(i);
2392                 table[index].next_rate_index = iwl3945_rates[prev_index].table_rs_index;
2393         }
2394
2395         switch (priv->band) {
2396         case IEEE80211_BAND_5GHZ:
2397                 IWL_DEBUG_RATE("Select A mode rate scale\n");
2398                 /* If one of the following CCK rates is used,
2399                  * have it fall back to the 6M OFDM rate */
2400                 for (i = IWL_RATE_1M_INDEX_TABLE; i <= IWL_RATE_11M_INDEX_TABLE; i++)
2401                         table[i].next_rate_index = iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2402
2403                 /* Don't fall back to CCK rates */
2404                 table[IWL_RATE_12M_INDEX_TABLE].next_rate_index = IWL_RATE_9M_INDEX_TABLE;
2405
2406                 /* Don't drop out of OFDM rates */
2407                 table[IWL_RATE_6M_INDEX_TABLE].next_rate_index =
2408                     iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2409                 break;
2410
2411         case IEEE80211_BAND_2GHZ:
2412                 IWL_DEBUG_RATE("Select B/G mode rate scale\n");
2413                 /* If an OFDM rate is used, have it fall back to the
2414                  * 1M CCK rates */
2415                 for (i = IWL_RATE_6M_INDEX_TABLE; i <= IWL_RATE_54M_INDEX_TABLE; i++)
2416                         table[i].next_rate_index = iwl3945_rates[IWL_FIRST_CCK_RATE].table_rs_index;
2417
2418                 /* CCK shouldn't fall back to OFDM... */
2419                 table[IWL_RATE_11M_INDEX_TABLE].next_rate_index = IWL_RATE_5M_INDEX_TABLE;
2420                 break;
2421
2422         default:
2423                 WARN_ON(1);
2424                 break;
2425         }
2426
2427         /* Update the rate scaling for control frame Tx */
2428         rate_cmd.table_id = 0;
2429         rc = iwl3945_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2430                               &rate_cmd);
2431         if (rc)
2432                 return rc;
2433
2434         /* Update the rate scaling for data frame Tx */
2435         rate_cmd.table_id = 1;
2436         return iwl3945_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2437                                 &rate_cmd);
2438 }
2439
2440 /* Called when initializing driver */
2441 int iwl3945_hw_set_hw_setting(struct iwl3945_priv *priv)
2442 {
2443         memset((void *)&priv->hw_setting, 0,
2444                sizeof(struct iwl3945_driver_hw_info));
2445
2446         priv->hw_setting.shared_virt =
2447             pci_alloc_consistent(priv->pci_dev,
2448                                  sizeof(struct iwl3945_shared),
2449                                  &priv->hw_setting.shared_phys);
2450
2451         if (!priv->hw_setting.shared_virt) {
2452                 IWL_ERROR("failed to allocate pci memory\n");
2453                 mutex_unlock(&priv->mutex);
2454                 return -ENOMEM;
2455         }
2456
2457         priv->hw_setting.rx_buf_size = IWL_RX_BUF_SIZE;
2458         priv->hw_setting.max_pkt_size = 2342;
2459         priv->hw_setting.tx_cmd_len = sizeof(struct iwl3945_tx_cmd);
2460         priv->hw_setting.max_rxq_size = RX_QUEUE_SIZE;
2461         priv->hw_setting.max_rxq_log = RX_QUEUE_SIZE_LOG;
2462         priv->hw_setting.max_stations = IWL3945_STATION_COUNT;
2463         priv->hw_setting.bcast_sta_id = IWL3945_BROADCAST_ID;
2464
2465         priv->hw_setting.tx_ant_num = 2;
2466         return 0;
2467 }
2468
2469 unsigned int iwl3945_hw_get_beacon_cmd(struct iwl3945_priv *priv,
2470                           struct iwl3945_frame *frame, u8 rate)
2471 {
2472         struct iwl3945_tx_beacon_cmd *tx_beacon_cmd;
2473         unsigned int frame_size;
2474
2475         tx_beacon_cmd = (struct iwl3945_tx_beacon_cmd *)&frame->u;
2476         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
2477
2478         tx_beacon_cmd->tx.sta_id = priv->hw_setting.bcast_sta_id;
2479         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2480
2481         frame_size = iwl3945_fill_beacon_frame(priv,
2482                                 tx_beacon_cmd->frame,
2483                                 iwl3945_broadcast_addr,
2484                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
2485
2486         BUG_ON(frame_size > MAX_MPDU_SIZE);
2487         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
2488
2489         tx_beacon_cmd->tx.rate = rate;
2490         tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
2491                                       TX_CMD_FLG_TSF_MSK);
2492
2493         /* supp_rates[0] == OFDM start at IWL_FIRST_OFDM_RATE*/
2494         tx_beacon_cmd->tx.supp_rates[0] =
2495                 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2496
2497         tx_beacon_cmd->tx.supp_rates[1] =
2498                 (IWL_CCK_BASIC_RATES_MASK & 0xF);
2499
2500         return sizeof(struct iwl3945_tx_beacon_cmd) + frame_size;
2501 }
2502
2503 void iwl3945_hw_rx_handler_setup(struct iwl3945_priv *priv)
2504 {
2505         priv->rx_handlers[REPLY_TX] = iwl3945_rx_reply_tx;
2506         priv->rx_handlers[REPLY_3945_RX] = iwl3945_rx_reply_rx;
2507 }
2508
2509 void iwl3945_hw_setup_deferred_work(struct iwl3945_priv *priv)
2510 {
2511         INIT_DELAYED_WORK(&priv->thermal_periodic,
2512                           iwl3945_bg_reg_txpower_periodic);
2513 }
2514
2515 void iwl3945_hw_cancel_deferred_work(struct iwl3945_priv *priv)
2516 {
2517         cancel_delayed_work(&priv->thermal_periodic);
2518 }
2519
2520 static struct iwl_3945_cfg iwl3945_bg_cfg = {
2521         .name = "3945BG",
2522         .fw_name = "iwlwifi-3945" IWL3945_UCODE_API ".ucode",
2523         .sku = IWL_SKU_G,
2524 };
2525
2526 static struct iwl_3945_cfg iwl3945_abg_cfg = {
2527         .name = "3945ABG",
2528         .fw_name = "iwlwifi-3945" IWL3945_UCODE_API ".ucode",
2529         .sku = IWL_SKU_A|IWL_SKU_G,
2530 };
2531
2532 struct pci_device_id iwl3945_hw_card_ids[] = {
2533         {IWL_PCI_DEVICE(0x4222, 0x1005, iwl3945_bg_cfg)},
2534         {IWL_PCI_DEVICE(0x4222, 0x1034, iwl3945_bg_cfg)},
2535         {IWL_PCI_DEVICE(0x4222, 0x1044, iwl3945_bg_cfg)},
2536         {IWL_PCI_DEVICE(0x4227, 0x1014, iwl3945_bg_cfg)},
2537         {IWL_PCI_DEVICE(0x4222, PCI_ANY_ID, iwl3945_abg_cfg)},
2538         {IWL_PCI_DEVICE(0x4227, PCI_ANY_ID, iwl3945_abg_cfg)},
2539         {0}
2540 };
2541
2542 MODULE_DEVICE_TABLE(pci, iwl3945_hw_card_ids);