SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/net/wireless/iwlwifi/iwl-3945.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/init.h>
  30 #include <linux/pci.h>
  31 #include <linux/dma-mapping.h>
  32 #include <linux/delay.h>
  33 #include <linux/skbuff.h>
  34 #include <linux/netdevice.h>
  35 #include <linux/wireless.h>
  36 #include <linux/firmware.h>
  37 #include <linux/etherdevice.h>
  38 #include <asm/unaligned.h>
  39 #include <net/mac80211.h>
  40
  41 #include "iwl-3945-core.h"
  42 #include "iwl-3945.h"
  43 #include "iwl-helpers.h"
  44 #include "iwl-3945-rs.h"
  45
  46 #define IWL_DECLARE_RATE_INFO(r, ip, in, rp, rn, pp, np)    \
  47         [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP,   \
  48                                     IWL_RATE_##r##M_IEEE,   \
  49                                     IWL_RATE_##ip##M_INDEX, \
  50                                     IWL_RATE_##in##M_INDEX, \
  51                                     IWL_RATE_##rp##M_INDEX, \
  52                                     IWL_RATE_##rn##M_INDEX, \
  53                                     IWL_RATE_##pp##M_INDEX, \
  54                                     IWL_RATE_##np##M_INDEX, \
  55                                     IWL_RATE_##r##M_INDEX_TABLE, \
  56                                     IWL_RATE_##ip##M_INDEX_TABLE }
  57
  58 /*
  59  * Parameter order:
  60  *   rate, prev rate, next rate, prev tgg rate, next tgg rate
  61  *
  62  * If there isn't a valid next or previous rate then INV is used which
  63  * maps to IWL_RATE_INVALID
  64  *
  65  */
  66 const struct iwl3945_rate_info iwl3945_rates[IWL_RATE_COUNT] = {
  67         IWL_DECLARE_RATE_INFO(1, INV, 2, INV, 2, INV, 2),    /*  1mbps */
  68         IWL_DECLARE_RATE_INFO(2, 1, 5, 1, 5, 1, 5),          /*  2mbps */
  69         IWL_DECLARE_RATE_INFO(5, 2, 6, 2, 11, 2, 11),        /*5.5mbps */
  70         IWL_DECLARE_RATE_INFO(11, 9, 12, 5, 12, 5, 18),      /* 11mbps */
  71         IWL_DECLARE_RATE_INFO(6, 5, 9, 5, 11, 5, 11),        /*  6mbps */
  72         IWL_DECLARE_RATE_INFO(9, 6, 11, 5, 11, 5, 11),       /*  9mbps */
  73         IWL_DECLARE_RATE_INFO(12, 11, 18, 11, 18, 11, 18),   /* 12mbps */
  74         IWL_DECLARE_RATE_INFO(18, 12, 24, 12, 24, 11, 24),   /* 18mbps */
  75         IWL_DECLARE_RATE_INFO(24, 18, 36, 18, 36, 18, 36),   /* 24mbps */
  76         IWL_DECLARE_RATE_INFO(36, 24, 48, 24, 48, 24, 48),   /* 36mbps */
  77         IWL_DECLARE_RATE_INFO(48, 36, 54, 36, 54, 36, 54),   /* 48mbps */
  78         IWL_DECLARE_RATE_INFO(54, 48, INV, 48, INV, 48, INV),/* 54mbps */
  79 };
  80
  81 /* 1 = enable the iwl3945_disable_events() function */
  82 #define IWL_EVT_DISABLE (0)
  83 #define IWL_EVT_DISABLE_SIZE (1532/32)
  84
  85 /**
  86  * iwl3945_disable_events - Disable selected events in uCode event log
  87  *
  88  * Disable an event by writing "1"s into "disable"
  89  *   bitmap in SRAM.  Bit position corresponds to Event # (id/type).
  90  *   Default values of 0 enable uCode events to be logged.
  91  * Use for only special debugging.  This function is just a placeholder as-is,
  92  *   you'll need to provide the special bits! ...
  93  *   ... and set IWL_EVT_DISABLE to 1. */
  94 void iwl3945_disable_events(struct iwl3945_priv *priv)
  95 {
  96         int ret;
  97         int i;
  98         u32 base;               /* SRAM address of event log header */
  99         u32 disable_ptr;        /* SRAM address of event-disable bitmap array */
 100         u32 array_size;         /* # of u32 entries in array */
 101         u32 evt_disable[IWL_EVT_DISABLE_SIZE] = {
 102                 0x00000000,     /*   31 -    0  Event id numbers */
 103                 0x00000000,     /*   63 -   32 */
 104                 0x00000000,     /*   95 -   64 */
 105                 0x00000000,     /*  127 -   96 */
 106                 0x00000000,     /*  159 -  128 */
 107                 0x00000000,     /*  191 -  160 */
 108                 0x00000000,     /*  223 -  192 */
 109                 0x00000000,     /*  255 -  224 */
 110                 0x00000000,     /*  287 -  256 */
 111                 0x00000000,     /*  319 -  288 */
 112                 0x00000000,     /*  351 -  320 */
 113                 0x00000000,     /*  383 -  352 */
 114                 0x00000000,     /*  415 -  384 */
 115                 0x00000000,     /*  447 -  416 */
 116                 0x00000000,     /*  479 -  448 */
 117                 0x00000000,     /*  511 -  480 */
 118                 0x00000000,     /*  543 -  512 */
 119                 0x00000000,     /*  575 -  544 */
 120                 0x00000000,     /*  607 -  576 */
 121                 0x00000000,     /*  639 -  608 */
 122                 0x00000000,     /*  671 -  640 */
 123                 0x00000000,     /*  703 -  672 */
 124                 0x00000000,     /*  735 -  704 */
 125                 0x00000000,     /*  767 -  736 */
 126                 0x00000000,     /*  799 -  768 */
 127                 0x00000000,     /*  831 -  800 */
 128                 0x00000000,     /*  863 -  832 */
 129                 0x00000000,     /*  895 -  864 */
 130                 0x00000000,     /*  927 -  896 */
 131                 0x00000000,     /*  959 -  928 */
 132                 0x00000000,     /*  991 -  960 */
 133                 0x00000000,     /* 1023 -  992 */
 134                 0x00000000,     /* 1055 - 1024 */
 135                 0x00000000,     /* 1087 - 1056 */
 136                 0x00000000,     /* 1119 - 1088 */
 137                 0x00000000,     /* 1151 - 1120 */
 138                 0x00000000,     /* 1183 - 1152 */
 139                 0x00000000,     /* 1215 - 1184 */
 140                 0x00000000,     /* 1247 - 1216 */
 141                 0x00000000,     /* 1279 - 1248 */
 142                 0x00000000,     /* 1311 - 1280 */
 143                 0x00000000,     /* 1343 - 1312 */
 144                 0x00000000,     /* 1375 - 1344 */
 145                 0x00000000,     /* 1407 - 1376 */
 146                 0x00000000,     /* 1439 - 1408 */
 147                 0x00000000,     /* 1471 - 1440 */
 148                 0x00000000,     /* 1503 - 1472 */
 149         };
 150
 151         base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
 152         if (!iwl3945_hw_valid_rtc_data_addr(base)) {
 153                 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
 154                 return;
 155         }
 156
 157         ret = iwl3945_grab_nic_access(priv);
 158         if (ret) {
 159                 IWL_WARNING("Can not read from adapter at this time.\n");
 160                 return;
 161         }
 162
 163         disable_ptr = iwl3945_read_targ_mem(priv, base + (4 * sizeof(u32)));
 164         array_size = iwl3945_read_targ_mem(priv, base + (5 * sizeof(u32)));
 165         iwl3945_release_nic_access(priv);
 166
 167         if (IWL_EVT_DISABLE && (array_size == IWL_EVT_DISABLE_SIZE)) {
 168                 IWL_DEBUG_INFO("Disabling selected uCode log events at 0x%x\n",
 169                                disable_ptr);
 170                 ret = iwl3945_grab_nic_access(priv);
 171                 for (i = 0; i < IWL_EVT_DISABLE_SIZE; i++)
 172                         iwl3945_write_targ_mem(priv,
 173                                            disable_ptr + (i * sizeof(u32)),
 174                                            evt_disable[i]);
 175
 176                 iwl3945_release_nic_access(priv);
 177         } else {
 178                 IWL_DEBUG_INFO("Selected uCode log events may be disabled\n");
 179                 IWL_DEBUG_INFO("  by writing \"1\"s into disable bitmap\n");
 180                 IWL_DEBUG_INFO("  in SRAM at 0x%x, size %d u32s\n",
 181                                disable_ptr, array_size);
 182         }
 183
 184 }
 185
 186 static int iwl3945_hwrate_to_plcp_idx(u8 plcp)
 187 {
 188         int idx;
 189
 190         for (idx = 0; idx < IWL_RATE_COUNT; idx++)
 191                 if (iwl3945_rates[idx].plcp == plcp)
 192                         return idx;
 193         return -1;
 194 }
 195
 196 /**
 197  * iwl3945_get_antenna_flags - Get antenna flags for RXON command
 198  * @priv: eeprom and antenna fields are used to determine antenna flags
 199  *
 200  * priv->eeprom  is used to determine if antenna AUX/MAIN are reversed
 201  * priv->antenna specifies the antenna diversity mode:
 202  *
 203  * IWL_ANTENNA_DIVERISTY - NIC selects best antenna by itself
 204  * IWL_ANTENNA_MAIN      - Force MAIN antenna
 205  * IWL_ANTENNA_AUX       - Force AUX antenna
 206  */
 207 __le32 iwl3945_get_antenna_flags(const struct iwl3945_priv *priv)
 208 {
 209         switch (priv->antenna) {
 210         case IWL_ANTENNA_DIVERSITY:
 211                 return 0;
 212
 213         case IWL_ANTENNA_MAIN:
 214                 if (priv->eeprom.antenna_switch_type)
 215                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
 216                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
 217
 218         case IWL_ANTENNA_AUX:
 219                 if (priv->eeprom.antenna_switch_type)
 220                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
 221                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
 222         }
 223
 224         /* bad antenna selector value */
 225         IWL_ERROR("Bad antenna selector value (0x%x)\n", priv->antenna);
 226         return 0;               /* "diversity" is default if error */
 227 }
 228
 229 #ifdef CONFIG_IWL3945_DEBUG
 230 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
 231
 232 static const char *iwl3945_get_tx_fail_reason(u32 status)
 233 {
 234         switch (status & TX_STATUS_MSK) {
 235         case TX_STATUS_SUCCESS:
 236                 return "SUCCESS";
 237                 TX_STATUS_ENTRY(SHORT_LIMIT);
 238                 TX_STATUS_ENTRY(LONG_LIMIT);
 239                 TX_STATUS_ENTRY(FIFO_UNDERRUN);
 240                 TX_STATUS_ENTRY(MGMNT_ABORT);
 241                 TX_STATUS_ENTRY(NEXT_FRAG);
 242                 TX_STATUS_ENTRY(LIFE_EXPIRE);
 243                 TX_STATUS_ENTRY(DEST_PS);
 244                 TX_STATUS_ENTRY(ABORTED);
 245                 TX_STATUS_ENTRY(BT_RETRY);
 246                 TX_STATUS_ENTRY(STA_INVALID);
 247                 TX_STATUS_ENTRY(FRAG_DROPPED);
 248                 TX_STATUS_ENTRY(TID_DISABLE);
 249                 TX_STATUS_ENTRY(FRAME_FLUSHED);
 250                 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
 251                 TX_STATUS_ENTRY(TX_LOCKED);
 252                 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
 253         }
 254
 255         return "UNKNOWN";
 256 }
 257 #else
 258 static inline const char *iwl3945_get_tx_fail_reason(u32 status)
 259 {
 260         return "";
 261 }
 262 #endif
 263
 264
 265 /**
 266  * iwl3945_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
 267  *
 268  * When FW advances 'R' index, all entries between old and new 'R' index
 269  * need to be reclaimed. As result, some free space forms. If there is
 270  * enough free space (> low mark), wake the stack that feeds us.
 271  */
 272 static void iwl3945_tx_queue_reclaim(struct iwl3945_priv *priv,
 273                                      int txq_id, int index)
 274 {
 275         struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
 276         struct iwl3945_queue *q = &txq->q;
 277         struct iwl3945_tx_info *tx_info;
 278
 279         BUG_ON(txq_id == IWL_CMD_QUEUE_NUM);
 280
 281         for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
 282                 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
 283
 284                 tx_info = &txq->txb[txq->q.read_ptr];
 285                 ieee80211_tx_status_irqsafe(priv->hw, tx_info->skb[0]);
 286                 tx_info->skb[0] = NULL;
 287                 iwl3945_hw_txq_free_tfd(priv, txq);
 288         }
 289
 290         if (iwl3945_queue_space(q) > q->low_mark && (txq_id >= 0) &&
 291                         (txq_id != IWL_CMD_QUEUE_NUM) &&
 292                         priv->mac80211_registered)
 293                 ieee80211_wake_queue(priv->hw, txq_id);
 294 }
 295
 296 /**
 297  * iwl3945_rx_reply_tx - Handle Tx response
 298  */
 299 static void iwl3945_rx_reply_tx(struct iwl3945_priv *priv,
 300                             struct iwl3945_rx_mem_buffer *rxb)
 301 {
 302         struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
 303         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
 304         int txq_id = SEQ_TO_QUEUE(sequence);
 305         int index = SEQ_TO_INDEX(sequence);
 306         struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
 307         struct ieee80211_tx_info *info;
 308         struct iwl3945_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
 309         u32  status = le32_to_cpu(tx_resp->status);
 310         int rate_idx;
 311
 312         if ((index >= txq->q.n_bd) || (iwl3945_x2_queue_used(&txq->q, index) == 0)) {
 313                 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
 314                           "is out of range [0-%d] %d %d\n", txq_id,
 315                           index, txq->q.n_bd, txq->q.write_ptr,
 316                           txq->q.read_ptr);
 317                 return;
 318         }
 319
 320         info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
 321         memset(&info->status, 0, sizeof(info->status));
 322
 323         info->status.retry_count = tx_resp->failure_frame;
 324         /* tx_status->rts_retry_count = tx_resp->failure_rts; */
 325         info->flags |= ((status & TX_STATUS_MSK) == TX_STATUS_SUCCESS) ?
 326                                 IEEE80211_TX_STAT_ACK : 0;
 327
 328         IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n",
 329                         txq_id, iwl3945_get_tx_fail_reason(status), status,
 330                         tx_resp->rate, tx_resp->failure_frame);
 331
 332         rate_idx = iwl3945_hwrate_to_plcp_idx(tx_resp->rate);
 333         if (info->band == IEEE80211_BAND_5GHZ)
 334                 rate_idx -= IWL_FIRST_OFDM_RATE;
 335         info->tx_rate_idx = rate_idx;
 336         IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
 337         iwl3945_tx_queue_reclaim(priv, txq_id, index);
 338
 339         if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
 340                 IWL_ERROR("TODO:  Implement Tx ABORT REQUIRED!!!\n");
 341 }
 342
 343
 344
 345 /*****************************************************************************
 346  *
 347  * Intel PRO/Wireless 3945ABG/BG Network Connection
 348  *
 349  *  RX handler implementations
 350  *
 351  *****************************************************************************/
 352
 353 void iwl3945_hw_rx_statistics(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb)
 354 {
 355         struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
 356         IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
 357                      (int)sizeof(struct iwl3945_notif_statistics),
 358                      le32_to_cpu(pkt->len));
 359
 360         memcpy(&priv->statistics, pkt->u.raw, sizeof(priv->statistics));
 361
 362         iwl3945_led_background(priv);
 363
 364         priv->last_statistics_time = jiffies;
 365 }
 366
 367 /******************************************************************************
 368  *
 369  * Misc. internal state and helper functions
 370  *
 371  ******************************************************************************/
 372 #ifdef CONFIG_IWL3945_DEBUG
 373
 374 /**
 375  * iwl3945_report_frame - dump frame to syslog during debug sessions
 376  *
 377  * You may hack this function to show different aspects of received frames,
 378  * including selective frame dumps.
 379  * group100 parameter selects whether to show 1 out of 100 good frames.
 380  */
 381 static void iwl3945_dbg_report_frame(struct iwl3945_priv *priv,
 382                       struct iwl3945_rx_packet *pkt,
 383                       struct ieee80211_hdr *header, int group100)
 384 {
 385         u32 to_us;
 386         u32 print_summary = 0;
 387         u32 print_dump = 0;     /* set to 1 to dump all frames' contents */
 388         u32 hundred = 0;
 389         u32 dataframe = 0;
 390         __le16 fc;
 391         u16 seq_ctl;
 392         u16 channel;
 393         u16 phy_flags;
 394         u16 length;
 395         u16 status;
 396         u16 bcn_tmr;
 397         u32 tsf_low;
 398         u64 tsf;
 399         u8 rssi;
 400         u8 agc;
 401         u16 sig_avg;
 402         u16 noise_diff;
 403         struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
 404         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 405         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
 406         u8 *data = IWL_RX_DATA(pkt);
 407
 408         /* MAC header */
 409         fc = header->frame_control;
 410         seq_ctl = le16_to_cpu(header->seq_ctrl);
 411
 412         /* metadata */
 413         channel = le16_to_cpu(rx_hdr->channel);
 414         phy_flags = le16_to_cpu(rx_hdr->phy_flags);
 415         length = le16_to_cpu(rx_hdr->len);
 416
 417         /* end-of-frame status and timestamp */
 418         status = le32_to_cpu(rx_end->status);
 419         bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
 420         tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
 421         tsf = le64_to_cpu(rx_end->timestamp);
 422
 423         /* signal statistics */
 424         rssi = rx_stats->rssi;
 425         agc = rx_stats->agc;
 426         sig_avg = le16_to_cpu(rx_stats->sig_avg);
 427         noise_diff = le16_to_cpu(rx_stats->noise_diff);
 428
 429         to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
 430
 431         /* if data frame is to us and all is good,
 432          *   (optionally) print summary for only 1 out of every 100 */
 433         if (to_us && (fc & ~cpu_to_le16(IEEE80211_FCTL_PROTECTED)) ==
 434             cpu_to_le16(IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
 435                 dataframe = 1;
 436                 if (!group100)
 437                         print_summary = 1;      /* print each frame */
 438                 else if (priv->framecnt_to_us < 100) {
 439                         priv->framecnt_to_us++;
 440                         print_summary = 0;
 441                 } else {
 442                         priv->framecnt_to_us = 0;
 443                         print_summary = 1;
 444                         hundred = 1;
 445                 }
 446         } else {
 447                 /* print summary for all other frames */
 448                 print_summary = 1;
 449         }
 450
 451         if (print_summary) {
 452                 char *title;
 453                 int rate;
 454
 455                 if (hundred)
 456                         title = "100Frames";
 457                 else if (ieee80211_has_retry(fc))
 458                         title = "Retry";
 459                 else if (ieee80211_is_assoc_resp(fc))
 460                         title = "AscRsp";
 461                 else if (ieee80211_is_reassoc_resp(fc))
 462                         title = "RasRsp";
 463                 else if (ieee80211_is_probe_resp(fc)) {
 464                         title = "PrbRsp";
 465                         print_dump = 1; /* dump frame contents */
 466                 } else if (ieee80211_is_beacon(fc)) {
 467                         title = "Beacon";
 468                         print_dump = 1; /* dump frame contents */
 469                 } else if (ieee80211_is_atim(fc))
 470                         title = "ATIM";
 471                 else if (ieee80211_is_auth(fc))
 472                         title = "Auth";
 473                 else if (ieee80211_is_deauth(fc))
 474                         title = "DeAuth";
 475                 else if (ieee80211_is_disassoc(fc))
 476                         title = "DisAssoc";
 477                 else
 478                         title = "Frame";
 479
 480                 rate = iwl3945_hwrate_to_plcp_idx(rx_hdr->rate);
 481                 if (rate == -1)
 482                         rate = 0;
 483                 else
 484                         rate = iwl3945_rates[rate].ieee / 2;
 485
 486                 /* print frame summary.
 487                  * MAC addresses show just the last byte (for brevity),
 488                  *    but you can hack it to show more, if you'd like to. */
 489                 if (dataframe)
 490                         IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
 491                                      "len=%u, rssi=%d, chnl=%d, rate=%d, \n",
 492                                      title, le16_to_cpu(fc), header->addr1[5],
 493                                      length, rssi, channel, rate);
 494                 else {
 495                         /* src/dst addresses assume managed mode */
 496                         IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
 497                                      "src=0x%02x, rssi=%u, tim=%lu usec, "
 498                                      "phy=0x%02x, chnl=%d\n",
 499                                      title, le16_to_cpu(fc), header->addr1[5],
 500                                      header->addr3[5], rssi,
 501                                      tsf_low - priv->scan_start_tsf,
 502                                      phy_flags, channel);
 503                 }
 504         }
 505         if (print_dump)
 506                 iwl3945_print_hex_dump(IWL_DL_RX, data, length);
 507 }
 508 #else
 509 static inline void iwl3945_dbg_report_frame(struct iwl3945_priv *priv,
 510                       struct iwl3945_rx_packet *pkt,
 511                       struct ieee80211_hdr *header, int group100)
 512 {
 513 }
 514 #endif
 515
 516 /* This is necessary only for a number of statistics, see the caller. */
 517 static int iwl3945_is_network_packet(struct iwl3945_priv *priv,
 518                 struct ieee80211_hdr *header)
 519 {
 520         /* Filter incoming packets to determine if they are targeted toward
 521          * this network, discarding packets coming from ourselves */
 522         switch (priv->iw_mode) {
 523         case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source    | BSSID */
 524                 /* packets to our IBSS update information */
 525                 return !compare_ether_addr(header->addr3, priv->bssid);
 526         case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
 527                 /* packets to our IBSS update information */
 528                 return !compare_ether_addr(header->addr2, priv->bssid);
 529         default:
 530                 return 1;
 531         }
 532 }
 533
 534 static void iwl3945_pass_packet_to_mac80211(struct iwl3945_priv *priv,
 535                                    struct iwl3945_rx_mem_buffer *rxb,
 536                                    struct ieee80211_rx_status *stats)
 537 {
 538         struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
 539 #ifdef CONFIG_IWL3945_LEDS
 540         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
 541 #endif
 542         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 543         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
 544         short len = le16_to_cpu(rx_hdr->len);
 545
 546         /* We received data from the HW, so stop the watchdog */
 547         if (unlikely((len + IWL_RX_FRAME_SIZE) > skb_tailroom(rxb->skb))) {
 548                 IWL_DEBUG_DROP("Corruption detected!\n");
 549                 return;
 550         }
 551
 552         /* We only process data packets if the interface is open */
 553         if (unlikely(!priv->is_open)) {
 554                 IWL_DEBUG_DROP_LIMIT
 555                     ("Dropping packet while interface is not open.\n");
 556                 return;
 557         }
 558
 559         skb_reserve(rxb->skb, (void *)rx_hdr->payload - (void *)pkt);
 560         /* Set the size of the skb to the size of the frame */
 561         skb_put(rxb->skb, le16_to_cpu(rx_hdr->len));
 562
 563         if (iwl3945_param_hwcrypto)
 564                 iwl3945_set_decrypted_flag(priv, rxb->skb,
 565                                        le32_to_cpu(rx_end->status), stats);
 566
 567 #ifdef CONFIG_IWL3945_LEDS
 568         if (ieee80211_is_data(hdr->frame_control))
 569                 priv->rxtxpackets += len;
 570 #endif
 571         ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
 572         rxb->skb = NULL;
 573 }
 574
 575 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
 576
 577 static void iwl3945_rx_reply_rx(struct iwl3945_priv *priv,
 578                                 struct iwl3945_rx_mem_buffer *rxb)
 579 {
 580         struct ieee80211_hdr *header;
 581         struct ieee80211_rx_status rx_status;
 582         struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
 583         struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
 584         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 585         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
 586         int snr;
 587         u16 rx_stats_sig_avg = le16_to_cpu(rx_stats->sig_avg);
 588         u16 rx_stats_noise_diff = le16_to_cpu(rx_stats->noise_diff);
 589         u8 network_packet;
 590
 591         rx_status.flag = 0;
 592         rx_status.mactime = le64_to_cpu(rx_end->timestamp);
 593         rx_status.freq =
 594                 ieee80211_channel_to_frequency(le16_to_cpu(rx_hdr->channel));
 595         rx_status.band = (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
 596                                 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
 597
 598         rx_status.rate_idx = iwl3945_hwrate_to_plcp_idx(rx_hdr->rate);
 599         if (rx_status.band == IEEE80211_BAND_5GHZ)
 600                 rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
 601
 602         rx_status.antenna = le16_to_cpu(rx_hdr->phy_flags &
 603                                         RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
 604
 605         /* set the preamble flag if appropriate */
 606         if (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
 607                 rx_status.flag |= RX_FLAG_SHORTPRE;
 608
 609         if ((unlikely(rx_stats->phy_count > 20))) {
 610                 IWL_DEBUG_DROP
 611                     ("dsp size out of range [0,20]: "
 612                      "%d/n", rx_stats->phy_count);
 613                 return;
 614         }
 615
 616         if (!(rx_end->status & RX_RES_STATUS_NO_CRC32_ERROR)
 617             || !(rx_end->status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
 618                 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n", rx_end->status);
 619                 return;
 620         }
 621
 622
 623
 624         /* Convert 3945's rssi indicator to dBm */
 625         rx_status.signal = rx_stats->rssi - IWL_RSSI_OFFSET;
 626
 627         /* Set default noise value to -127 */
 628         if (priv->last_rx_noise == 0)
 629                 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
 630
 631         /* 3945 provides noise info for OFDM frames only.
 632          * sig_avg and noise_diff are measured by the 3945's digital signal
 633          *   processor (DSP), and indicate linear levels of signal level and
 634          *   distortion/noise within the packet preamble after
 635          *   automatic gain control (AGC).  sig_avg should stay fairly
 636          *   constant if the radio's AGC is working well.
 637          * Since these values are linear (not dB or dBm), linear
 638          *   signal-to-noise ratio (SNR) is (sig_avg / noise_diff).
 639          * Convert linear SNR to dB SNR, then subtract that from rssi dBm
 640          *   to obtain noise level in dBm.
 641          * Calculate rx_status.signal (quality indicator in %) based on SNR. */
 642         if (rx_stats_noise_diff) {
 643                 snr = rx_stats_sig_avg / rx_stats_noise_diff;
 644                 rx_status.noise = rx_status.signal -
 645                                         iwl3945_calc_db_from_ratio(snr);
 646                 rx_status.qual = iwl3945_calc_sig_qual(rx_status.signal,
 647                                                          rx_status.noise);
 648
 649         /* If noise info not available, calculate signal quality indicator (%)
 650          *   using just the dBm signal level. */
 651         } else {
 652                 rx_status.noise = priv->last_rx_noise;
 653                 rx_status.qual = iwl3945_calc_sig_qual(rx_status.signal, 0);
 654         }
 655
 656
 657         IWL_DEBUG_STATS("Rssi %d noise %d qual %d sig_avg %d noise_diff %d\n",
 658                         rx_status.signal, rx_status.noise, rx_status.qual,
 659                         rx_stats_sig_avg, rx_stats_noise_diff);
 660
 661         header = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
 662
 663         network_packet = iwl3945_is_network_packet(priv, header);
 664
 665         IWL_DEBUG_STATS_LIMIT("[%c] %d RSSI:%d Signal:%u, Noise:%u, Rate:%u\n",
 666                               network_packet ? '*' : ' ',
 667                               le16_to_cpu(rx_hdr->channel),
 668                               rx_status.signal, rx_status.signal,
 669                               rx_status.noise, rx_status.rate_idx);
 670
 671 #ifdef CONFIG_IWL3945_DEBUG
 672         if (iwl3945_debug_level & (IWL_DL_RX))
 673                 /* Set "1" to report good data frames in groups of 100 */
 674                 iwl3945_dbg_report_frame(priv, pkt, header, 1);
 675 #endif
 676
 677         if (network_packet) {
 678                 priv->last_beacon_time = le32_to_cpu(rx_end->beacon_timestamp);
 679                 priv->last_tsf = le64_to_cpu(rx_end->timestamp);
 680                 priv->last_rx_rssi = rx_status.signal;
 681                 priv->last_rx_noise = rx_status.noise;
 682         }
 683
 684         if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
 685                 iwl3945_pass_packet_to_mac80211(priv, rxb, &rx_status);
 686                 return;
 687         }
 688
 689         switch (le16_to_cpu(header->frame_control) & IEEE80211_FCTL_FTYPE) {
 690         case IEEE80211_FTYPE_MGMT:
 691                 switch (le16_to_cpu(header->frame_control) &
 692                         IEEE80211_FCTL_STYPE) {
 693                 case IEEE80211_STYPE_PROBE_RESP:
 694                 case IEEE80211_STYPE_BEACON:{
 695                                 /* If this is a beacon or probe response for
 696                                  * our network then cache the beacon
 697                                  * timestamp */
 698                                 if ((((priv->iw_mode == IEEE80211_IF_TYPE_STA)
 699                                       && !compare_ether_addr(header->addr2,
 700                                                              priv->bssid)) ||
 701                                      ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
 702                                       && !compare_ether_addr(header->addr3,
 703                                                              priv->bssid)))) {
 704                                         struct ieee80211_mgmt *mgmt =
 705                                             (struct ieee80211_mgmt *)header;
 706                                         __le32 *pos;
 707                                         pos = (__le32 *)&mgmt->u.beacon.
 708                                             timestamp;
 709                                         priv->timestamp0 = le32_to_cpu(pos[0]);
 710                                         priv->timestamp1 = le32_to_cpu(pos[1]);
 711                                         priv->beacon_int = le16_to_cpu(
 712                                             mgmt->u.beacon.beacon_int);
 713                                         if (priv->call_post_assoc_from_beacon &&
 714                                             (priv->iw_mode ==
 715                                                 IEEE80211_IF_TYPE_STA))
 716                                                 queue_work(priv->workqueue,
 717                                                     &priv->post_associate.work);
 718
 719                                         priv->call_post_assoc_from_beacon = 0;
 720                                 }
 721
 722                                 break;
 723                         }
 724
 725                 case IEEE80211_STYPE_ACTION:
 726                         /* TODO: Parse 802.11h frames for CSA... */
 727                         break;
 728
 729                         /*
 730                          * TODO: Use the new callback function from
 731                          * mac80211 instead of sniffing these packets.
 732                          */
 733                 case IEEE80211_STYPE_ASSOC_RESP:
 734                 case IEEE80211_STYPE_REASSOC_RESP:{
 735                                 struct ieee80211_mgmt *mgnt =
 736                                     (struct ieee80211_mgmt *)header;
 737
 738                                 /* We have just associated, give some
 739                                  * time for the 4-way handshake if
 740                                  * any. Don't start scan too early. */
 741                                 priv->next_scan_jiffies = jiffies +
 742                                         IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
 743
 744                                 priv->assoc_id = (~((1 << 15) | (1 << 14)) &
 745                                                   le16_to_cpu(mgnt->u.
 746                                                               assoc_resp.aid));
 747                                 priv->assoc_capability =
 748                                     le16_to_cpu(mgnt->u.assoc_resp.capab_info);
 749                                 if (priv->beacon_int)
 750                                         queue_work(priv->workqueue,
 751                                             &priv->post_associate.work);
 752                                 else
 753                                         priv->call_post_assoc_from_beacon = 1;
 754                                 break;
 755                         }
 756
 757                 case IEEE80211_STYPE_PROBE_REQ:{
 758                                 DECLARE_MAC_BUF(mac1);
 759                                 DECLARE_MAC_BUF(mac2);
 760                                 DECLARE_MAC_BUF(mac3);
 761                                 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
 762                                         IWL_DEBUG_DROP
 763                                             ("Dropping (non network): %s"
 764                                              ", %s, %s\n",
 765                                              print_mac(mac1, header->addr1),
 766                                              print_mac(mac2, header->addr2),
 767                                              print_mac(mac3, header->addr3));
 768                                 return;
 769                         }
 770                 }
 771
 772         case IEEE80211_FTYPE_DATA:
 773                 /* fall through */
 774         default:
 775                 iwl3945_pass_packet_to_mac80211(priv, rxb, &rx_status);
 776                 break;
 777         }
 778 }
 779
 780 int iwl3945_hw_txq_attach_buf_to_tfd(struct iwl3945_priv *priv, void *ptr,
 781                                  dma_addr_t addr, u16 len)
 782 {
 783         int count;
 784         u32 pad;
 785         struct iwl3945_tfd_frame *tfd = (struct iwl3945_tfd_frame *)ptr;
 786
 787         count = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
 788         pad = TFD_CTL_PAD_GET(le32_to_cpu(tfd->control_flags));
 789
 790         if ((count >= NUM_TFD_CHUNKS) || (count < 0)) {
 791                 IWL_ERROR("Error can not send more than %d chunks\n",
 792                           NUM_TFD_CHUNKS);
 793                 return -EINVAL;
 794         }
 795
 796         tfd->pa[count].addr = cpu_to_le32(addr);
 797         tfd->pa[count].len = cpu_to_le32(len);
 798
 799         count++;
 800
 801         tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(count) |
 802                                          TFD_CTL_PAD_SET(pad));
 803
 804         return 0;
 805 }
 806
 807 /**
 808  * iwl3945_hw_txq_free_tfd - Free one TFD, those at index [txq->q.read_ptr]
 809  *
 810  * Does NOT advance any indexes
 811  */
 812 int iwl3945_hw_txq_free_tfd(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
 813 {
 814         struct iwl3945_tfd_frame *bd_tmp = (struct iwl3945_tfd_frame *)&txq->bd[0];
 815         struct iwl3945_tfd_frame *bd = &bd_tmp[txq->q.read_ptr];
 816         struct pci_dev *dev = priv->pci_dev;
 817         int i;
 818         int counter;
 819
 820         /* classify bd */
 821         if (txq->q.id == IWL_CMD_QUEUE_NUM)
 822                 /* nothing to cleanup after for host commands */
 823                 return 0;
 824
 825         /* sanity check */
 826         counter = TFD_CTL_COUNT_GET(le32_to_cpu(bd->control_flags));
 827         if (counter > NUM_TFD_CHUNKS) {
 828                 IWL_ERROR("Too many chunks: %i\n", counter);
 829                 /* @todo issue fatal error, it is quite serious situation */
 830                 return 0;
 831         }
 832
 833         /* unmap chunks if any */
 834
 835         for (i = 1; i < counter; i++) {
 836                 pci_unmap_single(dev, le32_to_cpu(bd->pa[i].addr),
 837                                  le32_to_cpu(bd->pa[i].len), PCI_DMA_TODEVICE);
 838                 if (txq->txb[txq->q.read_ptr].skb[0]) {
 839                         struct sk_buff *skb = txq->txb[txq->q.read_ptr].skb[0];
 840                         if (txq->txb[txq->q.read_ptr].skb[0]) {
 841                                 /* Can be called from interrupt context */
 842                                 dev_kfree_skb_any(skb);
 843                                 txq->txb[txq->q.read_ptr].skb[0] = NULL;
 844                         }
 845                 }
 846         }
 847         return 0;
 848 }
 849
 850 u8 iwl3945_hw_find_station(struct iwl3945_priv *priv, const u8 *addr)
 851 {
 852         int i;
 853         int ret = IWL_INVALID_STATION;
 854         unsigned long flags;
 855         DECLARE_MAC_BUF(mac);
 856
 857         spin_lock_irqsave(&priv->sta_lock, flags);
 858         for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
 859                 if ((priv->stations[i].used) &&
 860                     (!compare_ether_addr
 861                      (priv->stations[i].sta.sta.addr, addr))) {
 862                         ret = i;
 863                         goto out;
 864                 }
 865
 866         IWL_DEBUG_INFO("can not find STA %s (total %d)\n",
 867                        print_mac(mac, addr), priv->num_stations);
 868  out:
 869         spin_unlock_irqrestore(&priv->sta_lock, flags);
 870         return ret;
 871 }
 872
 873 /**
 874  * iwl3945_hw_build_tx_cmd_rate - Add rate portion to TX_CMD:
 875  *
 876 */
 877 void iwl3945_hw_build_tx_cmd_rate(struct iwl3945_priv *priv,
 878                               struct iwl3945_cmd *cmd,
 879                               struct ieee80211_tx_info *info,
 880                               struct ieee80211_hdr *hdr, int sta_id, int tx_id)
 881 {
 882         unsigned long flags;
 883         u16 hw_value = ieee80211_get_tx_rate(priv->hw, info)->hw_value;
 884         u16 rate_index = min(hw_value & 0xffff, IWL_RATE_COUNT - 1);
 885         u16 rate_mask;
 886         int rate;
 887         u8 rts_retry_limit;
 888         u8 data_retry_limit;
 889         __le32 tx_flags;
 890         __le16 fc = hdr->frame_control;
 891
 892         rate = iwl3945_rates[rate_index].plcp;
 893         tx_flags = cmd->cmd.tx.tx_flags;
 894
 895         /* We need to figure out how to get the sta->supp_rates while
 896          * in this running context */
 897         rate_mask = IWL_RATES_MASK;
 898
 899         spin_lock_irqsave(&priv->sta_lock, flags);
 900
 901         priv->stations[sta_id].current_rate.rate_n_flags = rate;
 902
 903         if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
 904             (sta_id != priv->hw_setting.bcast_sta_id) &&
 905                 (sta_id != IWL_MULTICAST_ID))
 906                 priv->stations[IWL_STA_ID].current_rate.rate_n_flags = rate;
 907
 908         spin_unlock_irqrestore(&priv->sta_lock, flags);
 909
 910         if (tx_id >= IWL_CMD_QUEUE_NUM)
 911                 rts_retry_limit = 3;
 912         else
 913                 rts_retry_limit = 7;
 914
 915         if (ieee80211_is_probe_resp(fc)) {
 916                 data_retry_limit = 3;
 917                 if (data_retry_limit < rts_retry_limit)
 918                         rts_retry_limit = data_retry_limit;
 919         } else
 920                 data_retry_limit = IWL_DEFAULT_TX_RETRY;
 921
 922         if (priv->data_retry_limit != -1)
 923                 data_retry_limit = priv->data_retry_limit;
 924
 925         if (ieee80211_is_mgmt(fc)) {
 926                 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
 927                 case cpu_to_le16(IEEE80211_STYPE_AUTH):
 928                 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
 929                 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
 930                 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
 931                         if (tx_flags & TX_CMD_FLG_RTS_MSK) {
 932                                 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
 933                                 tx_flags |= TX_CMD_FLG_CTS_MSK;
 934                         }
 935                         break;
 936                 default:
 937                         break;
 938                 }
 939         }
 940
 941         cmd->cmd.tx.rts_retry_limit = rts_retry_limit;
 942         cmd->cmd.tx.data_retry_limit = data_retry_limit;
 943         cmd->cmd.tx.rate = rate;
 944         cmd->cmd.tx.tx_flags = tx_flags;
 945
 946         /* OFDM */
 947         cmd->cmd.tx.supp_rates[0] =
 948            ((rate_mask & IWL_OFDM_RATES_MASK) >> IWL_FIRST_OFDM_RATE) & 0xFF;
 949
 950         /* CCK */
 951         cmd->cmd.tx.supp_rates[1] = (rate_mask & 0xF);
 952
 953         IWL_DEBUG_RATE("Tx sta id: %d, rate: %d (plcp), flags: 0x%4X "
 954                        "cck/ofdm mask: 0x%x/0x%x\n", sta_id,
 955                        cmd->cmd.tx.rate, le32_to_cpu(cmd->cmd.tx.tx_flags),
 956                        cmd->cmd.tx.supp_rates[1], cmd->cmd.tx.supp_rates[0]);
 957 }
 958
 959 u8 iwl3945_sync_sta(struct iwl3945_priv *priv, int sta_id, u16 tx_rate, u8 flags)
 960 {
 961         unsigned long flags_spin;
 962         struct iwl3945_station_entry *station;
 963
 964         if (sta_id == IWL_INVALID_STATION)
 965                 return IWL_INVALID_STATION;
 966
 967         spin_lock_irqsave(&priv->sta_lock, flags_spin);
 968         station = &priv->stations[sta_id];
 969
 970         station->sta.sta.modify_mask = STA_MODIFY_TX_RATE_MSK;
 971         station->sta.rate_n_flags = cpu_to_le16(tx_rate);
 972         station->current_rate.rate_n_flags = tx_rate;
 973         station->sta.mode = STA_CONTROL_MODIFY_MSK;
 974
 975         spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
 976
 977         iwl3945_send_add_station(priv, &station->sta, flags);
 978         IWL_DEBUG_RATE("SCALE sync station %d to rate %d\n",
 979                         sta_id, tx_rate);
 980         return sta_id;
 981 }
 982
 983 static int iwl3945_nic_set_pwr_src(struct iwl3945_priv *priv, int pwr_max)
 984 {
 985         int rc;
 986         unsigned long flags;
 987
 988         spin_lock_irqsave(&priv->lock, flags);
 989         rc = iwl3945_grab_nic_access(priv);
 990         if (rc) {
 991                 spin_unlock_irqrestore(&priv->lock, flags);
 992                 return rc;
 993         }
 994
 995         if (!pwr_max) {
 996                 u32 val;
 997
 998                 rc = pci_read_config_dword(priv->pci_dev,
 999                                 PCI_POWER_SOURCE, &val);
1000                 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
1001                         iwl3945_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
1002                                         APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
1003                                         ~APMG_PS_CTRL_MSK_PWR_SRC);
1004                         iwl3945_release_nic_access(priv);
1005
1006                         iwl3945_poll_bit(priv, CSR_GPIO_IN,
1007                                      CSR_GPIO_IN_VAL_VAUX_PWR_SRC,
1008                                      CSR_GPIO_IN_BIT_AUX_POWER, 5000);
1009                 } else
1010                         iwl3945_release_nic_access(priv);
1011         } else {
1012                 iwl3945_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
1013                                 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
1014                                 ~APMG_PS_CTRL_MSK_PWR_SRC);
1015
1016                 iwl3945_release_nic_access(priv);
1017                 iwl3945_poll_bit(priv, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC,
1018                              CSR_GPIO_IN_BIT_AUX_POWER, 5000);  /* uS */
1019         }
1020         spin_unlock_irqrestore(&priv->lock, flags);
1021
1022         return rc;
1023 }
1024
1025 static int iwl3945_rx_init(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
1026 {
1027         int rc;
1028         unsigned long flags;
1029
1030         spin_lock_irqsave(&priv->lock, flags);
1031         rc = iwl3945_grab_nic_access(priv);
1032         if (rc) {
1033                 spin_unlock_irqrestore(&priv->lock, flags);
1034                 return rc;
1035         }
1036
1037         iwl3945_write_direct32(priv, FH_RCSR_RBD_BASE(0), rxq->dma_addr);
1038         iwl3945_write_direct32(priv, FH_RCSR_RPTR_ADDR(0),
1039                              priv->hw_setting.shared_phys +
1040                              offsetof(struct iwl3945_shared, rx_read_ptr[0]));
1041         iwl3945_write_direct32(priv, FH_RCSR_WPTR(0), 0);
1042         iwl3945_write_direct32(priv, FH_RCSR_CONFIG(0),
1043                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE |
1044                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE |
1045                 ALM_FH_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN |
1046                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 |
1047                 (RX_QUEUE_SIZE_LOG << ALM_FH_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE) |
1048                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST |
1049                 (1 << ALM_FH_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH) |
1050                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH);
1051
1052         /* fake read to flush all prev I/O */
1053         iwl3945_read_direct32(priv, FH_RSSR_CTRL);
1054
1055         iwl3945_release_nic_access(priv);
1056         spin_unlock_irqrestore(&priv->lock, flags);
1057
1058         return 0;
1059 }
1060
1061 static int iwl3945_tx_reset(struct iwl3945_priv *priv)
1062 {
1063         int rc;
1064         unsigned long flags;
1065
1066         spin_lock_irqsave(&priv->lock, flags);
1067         rc = iwl3945_grab_nic_access(priv);
1068         if (rc) {
1069                 spin_unlock_irqrestore(&priv->lock, flags);
1070                 return rc;
1071         }
1072
1073         /* bypass mode */
1074         iwl3945_write_prph(priv, ALM_SCD_MODE_REG, 0x2);
1075
1076         /* RA 0 is active */
1077         iwl3945_write_prph(priv, ALM_SCD_ARASTAT_REG, 0x01);
1078
1079         /* all 6 fifo are active */
1080         iwl3945_write_prph(priv, ALM_SCD_TXFACT_REG, 0x3f);
1081
1082         iwl3945_write_prph(priv, ALM_SCD_SBYP_MODE_1_REG, 0x010000);
1083         iwl3945_write_prph(priv, ALM_SCD_SBYP_MODE_2_REG, 0x030002);
1084         iwl3945_write_prph(priv, ALM_SCD_TXF4MF_REG, 0x000004);
1085         iwl3945_write_prph(priv, ALM_SCD_TXF5MF_REG, 0x000005);
1086
1087         iwl3945_write_direct32(priv, FH_TSSR_CBB_BASE,
1088                              priv->hw_setting.shared_phys);
1089
1090         iwl3945_write_direct32(priv, FH_TSSR_MSG_CONFIG,
1091                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON |
1092                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON |
1093                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B |
1094                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON |
1095                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON |
1096                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH |
1097                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH);
1098
1099         iwl3945_release_nic_access(priv);
1100         spin_unlock_irqrestore(&priv->lock, flags);
1101
1102         return 0;
1103 }
1104
1105 /**
1106  * iwl3945_txq_ctx_reset - Reset TX queue context
1107  *
1108  * Destroys all DMA structures and initialize them again
1109  */
1110 static int iwl3945_txq_ctx_reset(struct iwl3945_priv *priv)
1111 {
1112         int rc;
1113         int txq_id, slots_num;
1114
1115         iwl3945_hw_txq_ctx_free(priv);
1116
1117         /* Tx CMD queue */
1118         rc = iwl3945_tx_reset(priv);
1119         if (rc)
1120                 goto error;
1121
1122         /* Tx queue(s) */
1123         for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++) {
1124                 slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
1125                                 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
1126                 rc = iwl3945_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
1127                                 txq_id);
1128                 if (rc) {
1129                         IWL_ERROR("Tx %d queue init failed\n", txq_id);
1130                         goto error;
1131                 }
1132         }
1133
1134         return rc;
1135
1136  error:
1137         iwl3945_hw_txq_ctx_free(priv);
1138         return rc;
1139 }
1140
1141 int iwl3945_hw_nic_init(struct iwl3945_priv *priv)
1142 {
1143         u8 rev_id;
1144         int rc;
1145         unsigned long flags;
1146         struct iwl3945_rx_queue *rxq = &priv->rxq;
1147
1148         iwl3945_power_init_handle(priv);
1149
1150         spin_lock_irqsave(&priv->lock, flags);
1151         iwl3945_set_bit(priv, CSR_ANA_PLL_CFG, CSR39_ANA_PLL_CFG_VAL);
1152         iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1153                     CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1154
1155         iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1156         rc = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
1157                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1158                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1159         if (rc < 0) {
1160                 spin_unlock_irqrestore(&priv->lock, flags);
1161                 IWL_DEBUG_INFO("Failed to init the card\n");
1162                 return rc;
1163         }
1164
1165         rc = iwl3945_grab_nic_access(priv);
1166         if (rc) {
1167                 spin_unlock_irqrestore(&priv->lock, flags);
1168                 return rc;
1169         }
1170         iwl3945_write_prph(priv, APMG_CLK_EN_REG,
1171                                  APMG_CLK_VAL_DMA_CLK_RQT |
1172                                  APMG_CLK_VAL_BSM_CLK_RQT);
1173         udelay(20);
1174         iwl3945_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1175                                     APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1176         iwl3945_release_nic_access(priv);
1177         spin_unlock_irqrestore(&priv->lock, flags);
1178
1179         /* Determine HW type */
1180         rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
1181         if (rc)
1182                 return rc;
1183         IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id);
1184
1185         iwl3945_nic_set_pwr_src(priv, 1);
1186         spin_lock_irqsave(&priv->lock, flags);
1187
1188         if (rev_id & PCI_CFG_REV_ID_BIT_RTP)
1189                 IWL_DEBUG_INFO("RTP type \n");
1190         else if (rev_id & PCI_CFG_REV_ID_BIT_BASIC_SKU) {
1191                 IWL_DEBUG_INFO("3945 RADIO-MB type\n");
1192                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1193                             CSR39_HW_IF_CONFIG_REG_BIT_3945_MB);
1194         } else {
1195                 IWL_DEBUG_INFO("3945 RADIO-MM type\n");
1196                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1197                             CSR39_HW_IF_CONFIG_REG_BIT_3945_MM);
1198         }
1199
1200         if (EEPROM_SKU_CAP_OP_MODE_MRC == priv->eeprom.sku_cap) {
1201                 IWL_DEBUG_INFO("SKU OP mode is mrc\n");
1202                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1203                             CSR39_HW_IF_CONFIG_REG_BIT_SKU_MRC);
1204         } else
1205                 IWL_DEBUG_INFO("SKU OP mode is basic\n");
1206
1207         if ((priv->eeprom.board_revision & 0xF0) == 0xD0) {
1208                 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
1209                                priv->eeprom.board_revision);
1210                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1211                             CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
1212         } else {
1213                 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
1214                                priv->eeprom.board_revision);
1215                 iwl3945_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
1216                               CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
1217         }
1218
1219         if (priv->eeprom.almgor_m_version <= 1) {
1220                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1221                             CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A);
1222                 IWL_DEBUG_INFO("Card M type A version is 0x%X\n",
1223                                priv->eeprom.almgor_m_version);
1224         } else {
1225                 IWL_DEBUG_INFO("Card M type B version is 0x%X\n",
1226                                priv->eeprom.almgor_m_version);
1227                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1228                             CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B);
1229         }
1230         spin_unlock_irqrestore(&priv->lock, flags);
1231
1232         if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
1233                 IWL_DEBUG_RF_KILL("SW RF KILL supported in EEPROM.\n");
1234
1235         if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
1236                 IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n");
1237
1238         /* Allocate the RX queue, or reset if it is already allocated */
1239         if (!rxq->bd) {
1240                 rc = iwl3945_rx_queue_alloc(priv);
1241                 if (rc) {
1242                         IWL_ERROR("Unable to initialize Rx queue\n");
1243                         return -ENOMEM;
1244                 }
1245         } else
1246                 iwl3945_rx_queue_reset(priv, rxq);
1247
1248         iwl3945_rx_replenish(priv);
1249
1250         iwl3945_rx_init(priv, rxq);
1251
1252         spin_lock_irqsave(&priv->lock, flags);
1253
1254         /* Look at using this instead:
1255         rxq->need_update = 1;
1256         iwl3945_rx_queue_update_write_ptr(priv, rxq);
1257         */
1258
1259         rc = iwl3945_grab_nic_access(priv);
1260         if (rc) {
1261                 spin_unlock_irqrestore(&priv->lock, flags);
1262                 return rc;
1263         }
1264         iwl3945_write_direct32(priv, FH_RCSR_WPTR(0), rxq->write & ~7);
1265         iwl3945_release_nic_access(priv);
1266
1267         spin_unlock_irqrestore(&priv->lock, flags);
1268
1269         rc = iwl3945_txq_ctx_reset(priv);
1270         if (rc)
1271                 return rc;
1272
1273         set_bit(STATUS_INIT, &priv->status);
1274
1275         return 0;
1276 }
1277
1278 /**
1279  * iwl3945_hw_txq_ctx_free - Free TXQ Context
1280  *
1281  * Destroy all TX DMA queues and structures
1282  */
1283 void iwl3945_hw_txq_ctx_free(struct iwl3945_priv *priv)
1284 {
1285         int txq_id;
1286
1287         /* Tx queues */
1288         for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++)
1289                 iwl3945_tx_queue_free(priv, &priv->txq[txq_id]);
1290 }
1291
1292 void iwl3945_hw_txq_ctx_stop(struct iwl3945_priv *priv)
1293 {
1294         int queue;
1295         unsigned long flags;
1296
1297         spin_lock_irqsave(&priv->lock, flags);
1298         if (iwl3945_grab_nic_access(priv)) {
1299                 spin_unlock_irqrestore(&priv->lock, flags);
1300                 iwl3945_hw_txq_ctx_free(priv);
1301                 return;
1302         }
1303
1304         /* stop SCD */
1305         iwl3945_write_prph(priv, ALM_SCD_MODE_REG, 0);
1306
1307         /* reset TFD queues */
1308         for (queue = TFD_QUEUE_MIN; queue < TFD_QUEUE_MAX; queue++) {
1309                 iwl3945_write_direct32(priv, FH_TCSR_CONFIG(queue), 0x0);
1310                 iwl3945_poll_direct_bit(priv, FH_TSSR_TX_STATUS,
1311                                 ALM_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(queue),
1312                                 1000);
1313         }
1314
1315         iwl3945_release_nic_access(priv);
1316         spin_unlock_irqrestore(&priv->lock, flags);
1317
1318         iwl3945_hw_txq_ctx_free(priv);
1319 }
1320
1321 int iwl3945_hw_nic_stop_master(struct iwl3945_priv *priv)
1322 {
1323         int rc = 0;
1324         u32 reg_val;
1325         unsigned long flags;
1326
1327         spin_lock_irqsave(&priv->lock, flags);
1328
1329         /* set stop master bit */
1330         iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1331
1332         reg_val = iwl3945_read32(priv, CSR_GP_CNTRL);
1333
1334         if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
1335             (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
1336                 IWL_DEBUG_INFO("Card in power save, master is already "
1337                                "stopped\n");
1338         else {
1339                 rc = iwl3945_poll_bit(priv, CSR_RESET,
1340                                   CSR_RESET_REG_FLAG_MASTER_DISABLED,
1341                                   CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
1342                 if (rc < 0) {
1343                         spin_unlock_irqrestore(&priv->lock, flags);
1344                         return rc;
1345                 }
1346         }
1347
1348         spin_unlock_irqrestore(&priv->lock, flags);
1349         IWL_DEBUG_INFO("stop master\n");
1350
1351         return rc;
1352 }
1353
1354 int iwl3945_hw_nic_reset(struct iwl3945_priv *priv)
1355 {
1356         int rc;
1357         unsigned long flags;
1358
1359         iwl3945_hw_nic_stop_master(priv);
1360
1361         spin_lock_irqsave(&priv->lock, flags);
1362
1363         iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1364
1365         rc = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
1366                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1367                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1368
1369         rc = iwl3945_grab_nic_access(priv);
1370         if (!rc) {
1371                 iwl3945_write_prph(priv, APMG_CLK_CTRL_REG,
1372                                          APMG_CLK_VAL_BSM_CLK_RQT);
1373
1374                 udelay(10);
1375
1376                 iwl3945_set_bit(priv, CSR_GP_CNTRL,
1377                             CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1378
1379                 iwl3945_write_prph(priv, APMG_RTC_INT_MSK_REG, 0x0);
1380                 iwl3945_write_prph(priv, APMG_RTC_INT_STT_REG,
1381                                         0xFFFFFFFF);
1382
1383                 /* enable DMA */
1384                 iwl3945_write_prph(priv, APMG_CLK_EN_REG,
1385                                          APMG_CLK_VAL_DMA_CLK_RQT |
1386                                          APMG_CLK_VAL_BSM_CLK_RQT);
1387                 udelay(10);
1388
1389                 iwl3945_set_bits_prph(priv, APMG_PS_CTRL_REG,
1390                                 APMG_PS_CTRL_VAL_RESET_REQ);
1391                 udelay(5);
1392                 iwl3945_clear_bits_prph(priv, APMG_PS_CTRL_REG,
1393                                 APMG_PS_CTRL_VAL_RESET_REQ);
1394                 iwl3945_release_nic_access(priv);
1395         }
1396
1397         /* Clear the 'host command active' bit... */
1398         clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1399
1400         wake_up_interruptible(&priv->wait_command_queue);
1401         spin_unlock_irqrestore(&priv->lock, flags);
1402
1403         return rc;
1404 }
1405
1406 /**
1407  * iwl3945_hw_reg_adjust_power_by_temp
1408  * return index delta into power gain settings table
1409 */
1410 static int iwl3945_hw_reg_adjust_power_by_temp(int new_reading, int old_reading)
1411 {
1412         return (new_reading - old_reading) * (-11) / 100;
1413 }
1414
1415 /**
1416  * iwl3945_hw_reg_temp_out_of_range - Keep temperature in sane range
1417  */
1418 static inline int iwl3945_hw_reg_temp_out_of_range(int temperature)
1419 {
1420         return ((temperature < -260) || (temperature > 25)) ? 1 : 0;
1421 }
1422
1423 int iwl3945_hw_get_temperature(struct iwl3945_priv *priv)
1424 {
1425         return iwl3945_read32(priv, CSR_UCODE_DRV_GP2);
1426 }
1427
1428 /**
1429  * iwl3945_hw_reg_txpower_get_temperature
1430  * get the current temperature by reading from NIC
1431 */
1432 static int iwl3945_hw_reg_txpower_get_temperature(struct iwl3945_priv *priv)
1433 {
1434         int temperature;
1435
1436         temperature = iwl3945_hw_get_temperature(priv);
1437
1438         /* driver's okay range is -260 to +25.
1439          *   human readable okay range is 0 to +285 */
1440         IWL_DEBUG_INFO("Temperature: %d\n", temperature + IWL_TEMP_CONVERT);
1441
1442         /* handle insane temp reading */
1443         if (iwl3945_hw_reg_temp_out_of_range(temperature)) {
1444                 IWL_ERROR("Error bad temperature value  %d\n", temperature);
1445
1446                 /* if really really hot(?),
1447                  *   substitute the 3rd band/group's temp measured at factory */
1448                 if (priv->last_temperature > 100)
1449                         temperature = priv->eeprom.groups[2].temperature;
1450                 else /* else use most recent "sane" value from driver */
1451                         temperature = priv->last_temperature;
1452         }
1453
1454         return temperature;     /* raw, not "human readable" */
1455 }
1456
1457 /* Adjust Txpower only if temperature variance is greater than threshold.
1458  *
1459  * Both are lower than older versions' 9 degrees */
1460 #define IWL_TEMPERATURE_LIMIT_TIMER   6
1461
1462 /**
1463  * is_temp_calib_needed - determines if new calibration is needed
1464  *
1465  * records new temperature in tx_mgr->temperature.
1466  * replaces tx_mgr->last_temperature *only* if calib needed
1467  *    (assumes caller will actually do the calibration!). */
1468 static int is_temp_calib_needed(struct iwl3945_priv *priv)
1469 {
1470         int temp_diff;
1471
1472         priv->temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
1473         temp_diff = priv->temperature - priv->last_temperature;
1474
1475         /* get absolute value */
1476         if (temp_diff < 0) {
1477                 IWL_DEBUG_POWER("Getting cooler, delta %d,\n", temp_diff);
1478                 temp_diff = -temp_diff;
1479         } else if (temp_diff == 0)
1480                 IWL_DEBUG_POWER("Same temp,\n");
1481         else
1482                 IWL_DEBUG_POWER("Getting warmer, delta %d,\n", temp_diff);
1483
1484         /* if we don't need calibration, *don't* update last_temperature */
1485         if (temp_diff < IWL_TEMPERATURE_LIMIT_TIMER) {
1486                 IWL_DEBUG_POWER("Timed thermal calib not needed\n");
1487                 return 0;
1488         }
1489
1490         IWL_DEBUG_POWER("Timed thermal calib needed\n");
1491
1492         /* assume that caller will actually do calib ...
1493          *   update the "last temperature" value */
1494         priv->last_temperature = priv->temperature;
1495         return 1;
1496 }
1497
1498 #define IWL_MAX_GAIN_ENTRIES 78
1499 #define IWL_CCK_FROM_OFDM_POWER_DIFF  -5
1500 #define IWL_CCK_FROM_OFDM_INDEX_DIFF (10)
1501
1502 /* radio and DSP power table, each step is 1/2 dB.
1503  * 1st number is for RF analog gain, 2nd number is for DSP pre-DAC gain. */
1504 static struct iwl3945_tx_power power_gain_table[2][IWL_MAX_GAIN_ENTRIES] = {
1505         {
1506          {251, 127},            /* 2.4 GHz, highest power */
1507          {251, 127},
1508          {251, 127},
1509          {251, 127},
1510          {251, 125},
1511          {251, 110},
1512          {251, 105},
1513          {251, 98},
1514          {187, 125},
1515          {187, 115},
1516          {187, 108},
1517          {187, 99},
1518          {243, 119},
1519          {243, 111},
1520          {243, 105},
1521          {243, 97},
1522          {243, 92},
1523          {211, 106},
1524          {211, 100},
1525          {179, 120},
1526          {179, 113},
1527          {179, 107},
1528          {147, 125},
1529          {147, 119},
1530          {147, 112},
1531          {147, 106},
1532          {147, 101},
1533          {147, 97},
1534          {147, 91},
1535          {115, 107},
1536          {235, 121},
1537          {235, 115},
1538          {235, 109},
1539          {203, 127},
1540          {203, 121},
1541          {203, 115},
1542          {203, 108},
1543          {203, 102},
1544          {203, 96},
1545          {203, 92},
1546          {171, 110},
1547          {171, 104},
1548          {171, 98},
1549          {139, 116},
1550          {227, 125},
1551          {227, 119},
1552          {227, 113},
1553          {227, 107},
1554          {227, 101},
1555          {227, 96},
1556          {195, 113},
1557          {195, 106},
1558          {195, 102},
1559          {195, 95},
1560          {163, 113},
1561          {163, 106},
1562          {163, 102},
1563          {163, 95},
1564          {131, 113},
1565          {131, 106},
1566          {131, 102},
1567          {131, 95},
1568          {99, 113},
1569          {99, 106},
1570          {99, 102},
1571          {99, 95},
1572          {67, 113},
1573          {67, 106},
1574          {67, 102},
1575          {67, 95},
1576          {35, 113},
1577          {35, 106},
1578          {35, 102},
1579          {35, 95},
1580          {3, 113},
1581          {3, 106},
1582          {3, 102},
1583          {3, 95} },             /* 2.4 GHz, lowest power */
1584         {
1585          {251, 127},            /* 5.x GHz, highest power */
1586          {251, 120},
1587          {251, 114},
1588          {219, 119},
1589          {219, 101},
1590          {187, 113},
1591          {187, 102},
1592          {155, 114},
1593          {155, 103},
1594          {123, 117},
1595          {123, 107},
1596          {123, 99},
1597          {123, 92},
1598          {91, 108},
1599          {59, 125},
1600          {59, 118},
1601          {59, 109},
1602          {59, 102},
1603          {59, 96},
1604          {59, 90},
1605          {27, 104},
1606          {27, 98},
1607          {27, 92},
1608          {115, 118},
1609          {115, 111},
1610          {115, 104},
1611          {83, 126},
1612          {83, 121},
1613          {83, 113},
1614          {83, 105},
1615          {83, 99},
1616          {51, 118},
1617          {51, 111},
1618          {51, 104},
1619          {51, 98},
1620          {19, 116},
1621          {19, 109},
1622          {19, 102},
1623          {19, 98},
1624          {19, 93},
1625          {171, 113},
1626          {171, 107},
1627          {171, 99},
1628          {139, 120},
1629          {139, 113},
1630          {139, 107},
1631          {139, 99},
1632          {107, 120},
1633          {107, 113},
1634          {107, 107},
1635          {107, 99},
1636          {75, 120},
1637          {75, 113},
1638          {75, 107},
1639          {75, 99},
1640          {43, 120},
1641          {43, 113},
1642          {43, 107},
1643          {43, 99},
1644          {11, 120},
1645          {11, 113},
1646          {11, 107},
1647          {11, 99},
1648          {131, 107},
1649          {131, 99},
1650          {99, 120},
1651          {99, 113},
1652          {99, 107},
1653          {99, 99},
1654          {67, 120},
1655          {67, 113},
1656          {67, 107},
1657          {67, 99},
1658          {35, 120},
1659          {35, 113},
1660          {35, 107},
1661          {35, 99},
1662          {3, 120} }             /* 5.x GHz, lowest power */
1663 };
1664
1665 static inline u8 iwl3945_hw_reg_fix_power_index(int index)
1666 {
1667         if (index < 0)
1668                 return 0;
1669         if (index >= IWL_MAX_GAIN_ENTRIES)
1670                 return IWL_MAX_GAIN_ENTRIES - 1;
1671         return (u8) index;
1672 }
1673
1674 /* Kick off thermal recalibration check every 60 seconds */
1675 #define REG_RECALIB_PERIOD (60)
1676
1677 /**
1678  * iwl3945_hw_reg_set_scan_power - Set Tx power for scan probe requests
1679  *
1680  * Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK)
1681  * or 6 Mbit (OFDM) rates.
1682  */
1683 static void iwl3945_hw_reg_set_scan_power(struct iwl3945_priv *priv, u32 scan_tbl_index,
1684                                s32 rate_index, const s8 *clip_pwrs,
1685                                struct iwl3945_channel_info *ch_info,
1686                                int band_index)
1687 {
1688         struct iwl3945_scan_power_info *scan_power_info;
1689         s8 power;
1690         u8 power_index;
1691
1692         scan_power_info = &ch_info->scan_pwr_info[scan_tbl_index];
1693
1694         /* use this channel group's 6Mbit clipping/saturation pwr,
1695          *   but cap at regulatory scan power restriction (set during init
1696          *   based on eeprom channel data) for this channel.  */
1697         power = min(ch_info->scan_power, clip_pwrs[IWL_RATE_6M_INDEX_TABLE]);
1698
1699         /* further limit to user's max power preference.
1700          * FIXME:  Other spectrum management power limitations do not
1701          *   seem to apply?? */
1702         power = min(power, priv->user_txpower_limit);
1703         scan_power_info->requested_power = power;
1704
1705         /* find difference between new scan *power* and current "normal"
1706          *   Tx *power* for 6Mb.  Use this difference (x2) to adjust the
1707          *   current "normal" temperature-compensated Tx power *index* for
1708          *   this rate (1Mb or 6Mb) to yield new temp-compensated scan power
1709          *   *index*. */
1710         power_index = ch_info->power_info[rate_index].power_table_index
1711             - (power - ch_info->power_info
1712                [IWL_RATE_6M_INDEX_TABLE].requested_power) * 2;
1713
1714         /* store reference index that we use when adjusting *all* scan
1715          *   powers.  So we can accommodate user (all channel) or spectrum
1716          *   management (single channel) power changes "between" temperature
1717          *   feedback compensation procedures.
1718          * don't force fit this reference index into gain table; it may be a
1719          *   negative number.  This will help avoid errors when we're at
1720          *   the lower bounds (highest gains, for warmest temperatures)
1721          *   of the table. */
1722
1723         /* don't exceed table bounds for "real" setting */
1724         power_index = iwl3945_hw_reg_fix_power_index(power_index);
1725
1726         scan_power_info->power_table_index = power_index;
1727         scan_power_info->tpc.tx_gain =
1728             power_gain_table[band_index][power_index].tx_gain;
1729         scan_power_info->tpc.dsp_atten =
1730             power_gain_table[band_index][power_index].dsp_atten;
1731 }
1732
1733 /**
1734  * iwl3945_hw_reg_send_txpower - fill in Tx Power command with gain settings
1735  *
1736  * Configures power settings for all rates for the current channel,
1737  * using values from channel info struct, and send to NIC
1738  */
1739 int iwl3945_hw_reg_send_txpower(struct iwl3945_priv *priv)
1740 {
1741         int rate_idx, i;
1742         const struct iwl3945_channel_info *ch_info = NULL;
1743         struct iwl3945_txpowertable_cmd txpower = {
1744                 .channel = priv->active_rxon.channel,
1745         };
1746
1747         txpower.band = (priv->band == IEEE80211_BAND_5GHZ) ? 0 : 1;
1748         ch_info = iwl3945_get_channel_info(priv,
1749                                        priv->band,
1750                                        le16_to_cpu(priv->active_rxon.channel));
1751         if (!ch_info) {
1752                 IWL_ERROR
1753                     ("Failed to get channel info for channel %d [%d]\n",
1754                      le16_to_cpu(priv->active_rxon.channel), priv->band);
1755                 return -EINVAL;
1756         }
1757
1758         if (!is_channel_valid(ch_info)) {
1759                 IWL_DEBUG_POWER("Not calling TX_PWR_TABLE_CMD on "
1760                                 "non-Tx channel.\n");
1761                 return 0;
1762         }
1763
1764         /* fill cmd with power settings for all rates for current channel */
1765         /* Fill OFDM rate */
1766         for (rate_idx = IWL_FIRST_OFDM_RATE, i = 0;
1767              rate_idx <= IWL_LAST_OFDM_RATE; rate_idx++, i++) {
1768
1769                 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1770                 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1771
1772                 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1773                                 le16_to_cpu(txpower.channel),
1774                                 txpower.band,
1775                                 txpower.power[i].tpc.tx_gain,
1776                                 txpower.power[i].tpc.dsp_atten,
1777                                 txpower.power[i].rate);
1778         }
1779         /* Fill CCK rates */
1780         for (rate_idx = IWL_FIRST_CCK_RATE;
1781              rate_idx <= IWL_LAST_CCK_RATE; rate_idx++, i++) {
1782                 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1783                 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1784
1785                 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1786                                 le16_to_cpu(txpower.channel),
1787                                 txpower.band,
1788                                 txpower.power[i].tpc.tx_gain,
1789                                 txpower.power[i].tpc.dsp_atten,
1790                                 txpower.power[i].rate);
1791         }
1792
1793         return iwl3945_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD,
1794                         sizeof(struct iwl3945_txpowertable_cmd), &txpower);
1795
1796 }
1797
1798 /**
1799  * iwl3945_hw_reg_set_new_power - Configures power tables at new levels
1800  * @ch_info: Channel to update.  Uses power_info.requested_power.
1801  *
1802  * Replace requested_power and base_power_index ch_info fields for
1803  * one channel.
1804  *
1805  * Called if user or spectrum management changes power preferences.
1806  * Takes into account h/w and modulation limitations (clip power).
1807  *
1808  * This does *not* send anything to NIC, just sets up ch_info for one channel.
1809  *
1810  * NOTE: reg_compensate_for_temperature_dif() *must* be run after this to
1811  *       properly fill out the scan powers, and actual h/w gain settings,
1812  *       and send changes to NIC
1813  */
1814 static int iwl3945_hw_reg_set_new_power(struct iwl3945_priv *priv,
1815                              struct iwl3945_channel_info *ch_info)
1816 {
1817         struct iwl3945_channel_power_info *power_info;
1818         int power_changed = 0;
1819         int i;
1820         const s8 *clip_pwrs;
1821         int power;
1822
1823         /* Get this chnlgrp's rate-to-max/clip-powers table */
1824         clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1825
1826         /* Get this channel's rate-to-current-power settings table */
1827         power_info = ch_info->power_info;
1828
1829         /* update OFDM Txpower settings */
1830         for (i = IWL_RATE_6M_INDEX_TABLE; i <= IWL_RATE_54M_INDEX_TABLE;
1831              i++, ++power_info) {
1832                 int delta_idx;
1833
1834                 /* limit new power to be no more than h/w capability */
1835                 power = min(ch_info->curr_txpow, clip_pwrs[i]);
1836                 if (power == power_info->requested_power)
1837                         continue;
1838
1839                 /* find difference between old and new requested powers,
1840                  *    update base (non-temp-compensated) power index */
1841                 delta_idx = (power - power_info->requested_power) * 2;
1842                 power_info->base_power_index -= delta_idx;
1843
1844                 /* save new requested power value */
1845                 power_info->requested_power = power;
1846
1847                 power_changed = 1;
1848         }
1849
1850         /* update CCK Txpower settings, based on OFDM 12M setting ...
1851          *    ... all CCK power settings for a given channel are the *same*. */
1852         if (power_changed) {
1853                 power =
1854                     ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1855                     requested_power + IWL_CCK_FROM_OFDM_POWER_DIFF;
1856
1857                 /* do all CCK rates' iwl3945_channel_power_info structures */
1858                 for (i = IWL_RATE_1M_INDEX_TABLE; i <= IWL_RATE_11M_INDEX_TABLE; i++) {
1859                         power_info->requested_power = power;
1860                         power_info->base_power_index =
1861                             ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1862                             base_power_index + IWL_CCK_FROM_OFDM_INDEX_DIFF;
1863                         ++power_info;
1864                 }
1865         }
1866
1867         return 0;
1868 }
1869
1870 /**
1871  * iwl3945_hw_reg_get_ch_txpower_limit - returns new power limit for channel
1872  *
1873  * NOTE: Returned power limit may be less (but not more) than requested,
1874  *       based strictly on regulatory (eeprom and spectrum mgt) limitations
1875  *       (no consideration for h/w clipping limitations).
1876  */
1877 static int iwl3945_hw_reg_get_ch_txpower_limit(struct iwl3945_channel_info *ch_info)
1878 {
1879         s8 max_power;
1880
1881 #if 0
1882         /* if we're using TGd limits, use lower of TGd or EEPROM */
1883         if (ch_info->tgd_data.max_power != 0)
1884                 max_power = min(ch_info->tgd_data.max_power,
1885                                 ch_info->eeprom.max_power_avg);
1886
1887         /* else just use EEPROM limits */
1888         else
1889 #endif
1890                 max_power = ch_info->eeprom.max_power_avg;
1891
1892         return min(max_power, ch_info->max_power_avg);
1893 }
1894
1895 /**
1896  * iwl3945_hw_reg_comp_txpower_temp - Compensate for temperature
1897  *
1898  * Compensate txpower settings of *all* channels for temperature.
1899  * This only accounts for the difference between current temperature
1900  *   and the factory calibration temperatures, and bases the new settings
1901  *   on the channel's base_power_index.
1902  *
1903  * If RxOn is "associated", this sends the new Txpower to NIC!
1904  */
1905 static int iwl3945_hw_reg_comp_txpower_temp(struct iwl3945_priv *priv)
1906 {
1907         struct iwl3945_channel_info *ch_info = NULL;
1908         int delta_index;
1909         const s8 *clip_pwrs; /* array of h/w max power levels for each rate */
1910         u8 a_band;
1911         u8 rate_index;
1912         u8 scan_tbl_index;
1913         u8 i;
1914         int ref_temp;
1915         int temperature = priv->temperature;
1916
1917         /* set up new Tx power info for each and every channel, 2.4 and 5.x */
1918         for (i = 0; i < priv->channel_count; i++) {
1919                 ch_info = &priv->channel_info[i];
1920                 a_band = is_channel_a_band(ch_info);
1921
1922                 /* Get this chnlgrp's factory calibration temperature */
1923                 ref_temp = (s16)priv->eeprom.groups[ch_info->group_index].
1924                     temperature;
1925
1926                 /* get power index adjustment based on curr and factory
1927                  * temps */
1928                 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
1929                                                               ref_temp);
1930
1931                 /* set tx power value for all rates, OFDM and CCK */
1932                 for (rate_index = 0; rate_index < IWL_RATE_COUNT;
1933                      rate_index++) {
1934                         int power_idx =
1935                             ch_info->power_info[rate_index].base_power_index;
1936
1937                         /* temperature compensate */
1938                         power_idx += delta_index;
1939
1940                         /* stay within table range */
1941                         power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
1942                         ch_info->power_info[rate_index].
1943                             power_table_index = (u8) power_idx;
1944                         ch_info->power_info[rate_index].tpc =
1945                             power_gain_table[a_band][power_idx];
1946                 }
1947
1948                 /* Get this chnlgrp's rate-to-max/clip-powers table */
1949                 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1950
1951                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
1952                 for (scan_tbl_index = 0;
1953                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
1954                         s32 actual_index = (scan_tbl_index == 0) ?
1955                             IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
1956                         iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
1957                                            actual_index, clip_pwrs,
1958                                            ch_info, a_band);
1959                 }
1960         }
1961
1962         /* send Txpower command for current channel to ucode */
1963         return iwl3945_hw_reg_send_txpower(priv);
1964 }
1965
1966 int iwl3945_hw_reg_set_txpower(struct iwl3945_priv *priv, s8 power)
1967 {
1968         struct iwl3945_channel_info *ch_info;
1969         s8 max_power;
1970         u8 a_band;
1971         u8 i;
1972
1973         if (priv->user_txpower_limit == power) {
1974                 IWL_DEBUG_POWER("Requested Tx power same as current "
1975                                 "limit: %ddBm.\n", power);
1976                 return 0;
1977         }
1978
1979         IWL_DEBUG_POWER("Setting upper limit clamp to %ddBm.\n", power);
1980         priv->user_txpower_limit = power;
1981
1982         /* set up new Tx powers for each and every channel, 2.4 and 5.x */
1983
1984         for (i = 0; i < priv->channel_count; i++) {
1985                 ch_info = &priv->channel_info[i];
1986                 a_band = is_channel_a_band(ch_info);
1987
1988                 /* find minimum power of all user and regulatory constraints
1989                  *    (does not consider h/w clipping limitations) */
1990                 max_power = iwl3945_hw_reg_get_ch_txpower_limit(ch_info);
1991                 max_power = min(power, max_power);
1992                 if (max_power != ch_info->curr_txpow) {
1993                         ch_info->curr_txpow = max_power;
1994
1995                         /* this considers the h/w clipping limitations */
1996                         iwl3945_hw_reg_set_new_power(priv, ch_info);
1997                 }
1998         }
1999
2000         /* update txpower settings for all channels,
2001          *   send to NIC if associated. */
2002         is_temp_calib_needed(priv);
2003         iwl3945_hw_reg_comp_txpower_temp(priv);
2004
2005         return 0;
2006 }
2007
2008 /* will add 3945 channel switch cmd handling later */
2009 int iwl3945_hw_channel_switch(struct iwl3945_priv *priv, u16 channel)
2010 {
2011         return 0;
2012 }
2013
2014 /**
2015  * iwl3945_reg_txpower_periodic -  called when time to check our temperature.
2016  *
2017  * -- reset periodic timer
2018  * -- see if temp has changed enough to warrant re-calibration ... if so:
2019  *     -- correct coeffs for temp (can reset temp timer)
2020  *     -- save this temp as "last",
2021  *     -- send new set of gain settings to NIC
2022  * NOTE:  This should continue working, even when we're not associated,
2023  *   so we can keep our internal table of scan powers current. */
2024 void iwl3945_reg_txpower_periodic(struct iwl3945_priv *priv)
2025 {
2026         /* This will kick in the "brute force"
2027          * iwl3945_hw_reg_comp_txpower_temp() below */
2028         if (!is_temp_calib_needed(priv))
2029                 goto reschedule;
2030
2031         /* Set up a new set of temp-adjusted TxPowers, send to NIC.
2032          * This is based *only* on current temperature,
2033          * ignoring any previous power measurements */
2034         iwl3945_hw_reg_comp_txpower_temp(priv);
2035
2036  reschedule:
2037         queue_delayed_work(priv->workqueue,
2038                            &priv->thermal_periodic, REG_RECALIB_PERIOD * HZ);
2039 }
2040
2041 static void iwl3945_bg_reg_txpower_periodic(struct work_struct *work)
2042 {
2043         struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv,
2044                                              thermal_periodic.work);
2045
2046         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2047                 return;
2048
2049         mutex_lock(&priv->mutex);
2050         iwl3945_reg_txpower_periodic(priv);
2051         mutex_unlock(&priv->mutex);
2052 }
2053
2054 /**
2055  * iwl3945_hw_reg_get_ch_grp_index - find the channel-group index (0-4)
2056  *                                 for the channel.
2057  *
2058  * This function is used when initializing channel-info structs.
2059  *
2060  * NOTE: These channel groups do *NOT* match the bands above!
2061  *       These channel groups are based on factory-tested channels;
2062  *       on A-band, EEPROM's "group frequency" entries represent the top
2063  *       channel in each group 1-4.  Group 5 All B/G channels are in group 0.
2064  */
2065 static u16 iwl3945_hw_reg_get_ch_grp_index(struct iwl3945_priv *priv,
2066                                        const struct iwl3945_channel_info *ch_info)
2067 {
2068         struct iwl3945_eeprom_txpower_group *ch_grp = &priv->eeprom.groups[0];
2069         u8 group;
2070         u16 group_index = 0;    /* based on factory calib frequencies */
2071         u8 grp_channel;
2072
2073         /* Find the group index for the channel ... don't use index 1(?) */
2074         if (is_channel_a_band(ch_info)) {
2075                 for (group = 1; group < 5; group++) {
2076                         grp_channel = ch_grp[group].group_channel;
2077                         if (ch_info->channel <= grp_channel) {
2078                                 group_index = group;
2079                                 break;
2080                         }
2081                 }
2082                 /* group 4 has a few channels *above* its factory cal freq */
2083                 if (group == 5)
2084                         group_index = 4;
2085         } else
2086                 group_index = 0;        /* 2.4 GHz, group 0 */
2087
2088         IWL_DEBUG_POWER("Chnl %d mapped to grp %d\n", ch_info->channel,
2089                         group_index);
2090         return group_index;
2091 }
2092
2093 /**
2094  * iwl3945_hw_reg_get_matched_power_index - Interpolate to get nominal index
2095  *
2096  * Interpolate to get nominal (i.e. at factory calibration temperature) index
2097  *   into radio/DSP gain settings table for requested power.
2098  */
2099 static int iwl3945_hw_reg_get_matched_power_index(struct iwl3945_priv *priv,
2100                                        s8 requested_power,
2101                                        s32 setting_index, s32 *new_index)
2102 {
2103         const struct iwl3945_eeprom_txpower_group *chnl_grp = NULL;
2104         s32 index0, index1;
2105         s32 power = 2 * requested_power;
2106         s32 i;
2107         const struct iwl3945_eeprom_txpower_sample *samples;
2108         s32 gains0, gains1;
2109         s32 res;
2110         s32 denominator;
2111
2112         chnl_grp = &priv->eeprom.groups[setting_index];
2113         samples = chnl_grp->samples;
2114         for (i = 0; i < 5; i++) {
2115                 if (power == samples[i].power) {
2116                         *new_index = samples[i].gain_index;
2117                         return 0;
2118                 }
2119         }
2120
2121         if (power > samples[1].power) {
2122                 index0 = 0;
2123                 index1 = 1;
2124         } else if (power > samples[2].power) {
2125                 index0 = 1;
2126                 index1 = 2;
2127         } else if (power > samples[3].power) {
2128                 index0 = 2;
2129                 index1 = 3;
2130         } else {
2131                 index0 = 3;
2132                 index1 = 4;
2133         }
2134
2135         denominator = (s32) samples[index1].power - (s32) samples[index0].power;
2136         if (denominator == 0)
2137                 return -EINVAL;
2138         gains0 = (s32) samples[index0].gain_index * (1 << 19);
2139         gains1 = (s32) samples[index1].gain_index * (1 << 19);
2140         res = gains0 + (gains1 - gains0) *
2141             ((s32) power - (s32) samples[index0].power) / denominator +
2142             (1 << 18);
2143         *new_index = res >> 19;
2144         return 0;
2145 }
2146
2147 static void iwl3945_hw_reg_init_channel_groups(struct iwl3945_priv *priv)
2148 {
2149         u32 i;
2150         s32 rate_index;
2151         const struct iwl3945_eeprom_txpower_group *group;
2152
2153         IWL_DEBUG_POWER("Initializing factory calib info from EEPROM\n");
2154
2155         for (i = 0; i < IWL_NUM_TX_CALIB_GROUPS; i++) {
2156                 s8 *clip_pwrs;  /* table of power levels for each rate */
2157                 s8 satur_pwr;   /* saturation power for each chnl group */
2158                 group = &priv->eeprom.groups[i];
2159
2160                 /* sanity check on factory saturation power value */
2161                 if (group->saturation_power < 40) {
2162                         IWL_WARNING("Error: saturation power is %d, "
2163                                     "less than minimum expected 40\n",
2164                                     group->saturation_power);
2165                         return;
2166                 }
2167
2168                 /*
2169                  * Derive requested power levels for each rate, based on
2170                  *   hardware capabilities (saturation power for band).
2171                  * Basic value is 3dB down from saturation, with further
2172                  *   power reductions for highest 3 data rates.  These
2173                  *   backoffs provide headroom for high rate modulation
2174                  *   power peaks, without too much distortion (clipping).
2175                  */
2176                 /* we'll fill in this array with h/w max power levels */
2177                 clip_pwrs = (s8 *) priv->clip_groups[i].clip_powers;
2178
2179                 /* divide factory saturation power by 2 to find -3dB level */
2180                 satur_pwr = (s8) (group->saturation_power >> 1);
2181
2182                 /* fill in channel group's nominal powers for each rate */
2183                 for (rate_index = 0;
2184                      rate_index < IWL_RATE_COUNT; rate_index++, clip_pwrs++) {
2185                         switch (rate_index) {
2186                         case IWL_RATE_36M_INDEX_TABLE:
2187                                 if (i == 0)     /* B/G */
2188                                         *clip_pwrs = satur_pwr;
2189                                 else    /* A */
2190                                         *clip_pwrs = satur_pwr - 5;
2191                                 break;
2192                         case IWL_RATE_48M_INDEX_TABLE:
2193                                 if (i == 0)
2194                                         *clip_pwrs = satur_pwr - 7;
2195                                 else
2196                                         *clip_pwrs = satur_pwr - 10;
2197                                 break;
2198                         case IWL_RATE_54M_INDEX_TABLE:
2199                                 if (i == 0)
2200                                         *clip_pwrs = satur_pwr - 9;
2201                                 else
2202                                         *clip_pwrs = satur_pwr - 12;
2203                                 break;
2204                         default:
2205                                 *clip_pwrs = satur_pwr;
2206                                 break;
2207                         }
2208                 }
2209         }
2210 }
2211
2212 /**
2213  * iwl3945_txpower_set_from_eeprom - Set channel power info based on EEPROM
2214  *
2215  * Second pass (during init) to set up priv->channel_info
2216  *
2217  * Set up Tx-power settings in our channel info database for each VALID
2218  * (for this geo/SKU) channel, at all Tx data rates, based on eeprom values
2219  * and current temperature.
2220  *
2221  * Since this is based on current temperature (at init time), these values may
2222  * not be valid for very long, but it gives us a starting/default point,
2223  * and allows us to active (i.e. using Tx) scan.
2224  *
2225  * This does *not* write values to NIC, just sets up our internal table.
2226  */
2227 int iwl3945_txpower_set_from_eeprom(struct iwl3945_priv *priv)
2228 {
2229         struct iwl3945_channel_info *ch_info = NULL;
2230         struct iwl3945_channel_power_info *pwr_info;
2231         int delta_index;
2232         u8 rate_index;
2233         u8 scan_tbl_index;
2234         const s8 *clip_pwrs;    /* array of power levels for each rate */
2235         u8 gain, dsp_atten;
2236         s8 power;
2237         u8 pwr_index, base_pwr_index, a_band;
2238         u8 i;
2239         int temperature;
2240
2241         /* save temperature reference,
2242          *   so we can determine next time to calibrate */
2243         temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
2244         priv->last_temperature = temperature;
2245
2246         iwl3945_hw_reg_init_channel_groups(priv);
2247
2248         /* initialize Tx power info for each and every channel, 2.4 and 5.x */
2249         for (i = 0, ch_info = priv->channel_info; i < priv->channel_count;
2250              i++, ch_info++) {
2251                 a_band = is_channel_a_band(ch_info);
2252                 if (!is_channel_valid(ch_info))
2253                         continue;
2254
2255                 /* find this channel's channel group (*not* "band") index */
2256                 ch_info->group_index =
2257                         iwl3945_hw_reg_get_ch_grp_index(priv, ch_info);
2258
2259                 /* Get this chnlgrp's rate->max/clip-powers table */
2260                 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
2261
2262                 /* calculate power index *adjustment* value according to
2263                  *  diff between current temperature and factory temperature */
2264                 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
2265                                 priv->eeprom.groups[ch_info->group_index].
2266                                 temperature);
2267
2268                 IWL_DEBUG_POWER("Delta index for channel %d: %d [%d]\n",
2269                                 ch_info->channel, delta_index, temperature +
2270                                 IWL_TEMP_CONVERT);
2271
2272                 /* set tx power value for all OFDM rates */
2273                 for (rate_index = 0; rate_index < IWL_OFDM_RATES;
2274                      rate_index++) {
2275                         s32 power_idx;
2276                         int rc;
2277
2278                         /* use channel group's clip-power table,
2279                          *   but don't exceed channel's max power */
2280                         s8 pwr = min(ch_info->max_power_avg,
2281                                      clip_pwrs[rate_index]);
2282
2283                         pwr_info = &ch_info->power_info[rate_index];
2284
2285                         /* get base (i.e. at factory-measured temperature)
2286                          *    power table index for this rate's power */
2287                         rc = iwl3945_hw_reg_get_matched_power_index(priv, pwr,
2288                                                          ch_info->group_index,
2289                                                          &power_idx);
2290                         if (rc) {
2291                                 IWL_ERROR("Invalid power index\n");
2292                                 return rc;
2293                         }
2294                         pwr_info->base_power_index = (u8) power_idx;
2295
2296                         /* temperature compensate */
2297                         power_idx += delta_index;
2298
2299                         /* stay within range of gain table */
2300                         power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
2301
2302                         /* fill 1 OFDM rate's iwl3945_channel_power_info struct */
2303                         pwr_info->requested_power = pwr;
2304                         pwr_info->power_table_index = (u8) power_idx;
2305                         pwr_info->tpc.tx_gain =
2306                             power_gain_table[a_band][power_idx].tx_gain;
2307                         pwr_info->tpc.dsp_atten =
2308                             power_gain_table[a_band][power_idx].dsp_atten;
2309                 }
2310
2311                 /* set tx power for CCK rates, based on OFDM 12 Mbit settings*/
2312                 pwr_info = &ch_info->power_info[IWL_RATE_12M_INDEX_TABLE];
2313                 power = pwr_info->requested_power +
2314                         IWL_CCK_FROM_OFDM_POWER_DIFF;
2315                 pwr_index = pwr_info->power_table_index +
2316                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2317                 base_pwr_index = pwr_info->base_power_index +
2318                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2319
2320                 /* stay within table range */
2321                 pwr_index = iwl3945_hw_reg_fix_power_index(pwr_index);
2322                 gain = power_gain_table[a_band][pwr_index].tx_gain;
2323                 dsp_atten = power_gain_table[a_band][pwr_index].dsp_atten;
2324
2325                 /* fill each CCK rate's iwl3945_channel_power_info structure
2326                  * NOTE:  All CCK-rate Txpwrs are the same for a given chnl!
2327                  * NOTE:  CCK rates start at end of OFDM rates! */
2328                 for (rate_index = 0;
2329                      rate_index < IWL_CCK_RATES; rate_index++) {
2330                         pwr_info = &ch_info->power_info[rate_index+IWL_OFDM_RATES];
2331                         pwr_info->requested_power = power;
2332                         pwr_info->power_table_index = pwr_index;
2333                         pwr_info->base_power_index = base_pwr_index;
2334                         pwr_info->tpc.tx_gain = gain;
2335                         pwr_info->tpc.dsp_atten = dsp_atten;
2336                 }
2337
2338                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2339                 for (scan_tbl_index = 0;
2340                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
2341                         s32 actual_index = (scan_tbl_index == 0) ?
2342                                 IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
2343                         iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
2344                                 actual_index, clip_pwrs, ch_info, a_band);
2345                 }
2346         }
2347
2348         return 0;
2349 }
2350
2351 int iwl3945_hw_rxq_stop(struct iwl3945_priv *priv)
2352 {
2353         int rc;
2354         unsigned long flags;
2355
2356         spin_lock_irqsave(&priv->lock, flags);
2357         rc = iwl3945_grab_nic_access(priv);
2358         if (rc) {
2359                 spin_unlock_irqrestore(&priv->lock, flags);
2360                 return rc;
2361         }
2362
2363         iwl3945_write_direct32(priv, FH_RCSR_CONFIG(0), 0);
2364         rc = iwl3945_poll_direct_bit(priv, FH_RSSR_STATUS, (1 << 24), 1000);
2365         if (rc < 0)
2366                 IWL_ERROR("Can't stop Rx DMA.\n");
2367
2368         iwl3945_release_nic_access(priv);
2369         spin_unlock_irqrestore(&priv->lock, flags);
2370
2371         return 0;
2372 }
2373
2374 int iwl3945_hw_tx_queue_init(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
2375 {
2376         int rc;
2377         unsigned long flags;
2378         int txq_id = txq->q.id;
2379
2380         struct iwl3945_shared *shared_data = priv->hw_setting.shared_virt;
2381
2382         shared_data->tx_base_ptr[txq_id] = cpu_to_le32((u32)txq->q.dma_addr);
2383
2384         spin_lock_irqsave(&priv->lock, flags);
2385         rc = iwl3945_grab_nic_access(priv);
2386         if (rc) {
2387                 spin_unlock_irqrestore(&priv->lock, flags);
2388                 return rc;
2389         }
2390         iwl3945_write_direct32(priv, FH_CBCC_CTRL(txq_id), 0);
2391         iwl3945_write_direct32(priv, FH_CBCC_BASE(txq_id), 0);
2392
2393         iwl3945_write_direct32(priv, FH_TCSR_CONFIG(txq_id),
2394                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT |
2395                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF |
2396                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD |
2397                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL |
2398                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE);
2399         iwl3945_release_nic_access(priv);
2400
2401         /* fake read to flush all prev. writes */
2402         iwl3945_read32(priv, FH_TSSR_CBB_BASE);
2403         spin_unlock_irqrestore(&priv->lock, flags);
2404
2405         return 0;
2406 }
2407
2408 int iwl3945_hw_get_rx_read(struct iwl3945_priv *priv)
2409 {
2410         struct iwl3945_shared *shared_data = priv->hw_setting.shared_virt;
2411
2412         return le32_to_cpu(shared_data->rx_read_ptr[0]);
2413 }
2414
2415 /**
2416  * iwl3945_init_hw_rate_table - Initialize the hardware rate fallback table
2417  */
2418 int iwl3945_init_hw_rate_table(struct iwl3945_priv *priv)
2419 {
2420         int rc, i, index, prev_index;
2421         struct iwl3945_rate_scaling_cmd rate_cmd = {
2422                 .reserved = {0, 0, 0},
2423         };
2424         struct iwl3945_rate_scaling_info *table = rate_cmd.table;
2425
2426         for (i = 0; i < ARRAY_SIZE(iwl3945_rates); i++) {
2427                 index = iwl3945_rates[i].table_rs_index;
2428
2429                 table[index].rate_n_flags =
2430                         iwl3945_hw_set_rate_n_flags(iwl3945_rates[i].plcp, 0);
2431                 table[index].try_cnt = priv->retry_rate;
2432                 prev_index = iwl3945_get_prev_ieee_rate(i);
2433                 table[index].next_rate_index = iwl3945_rates[prev_index].table_rs_index;
2434         }
2435
2436         switch (priv->band) {
2437         case IEEE80211_BAND_5GHZ:
2438                 IWL_DEBUG_RATE("Select A mode rate scale\n");
2439                 /* If one of the following CCK rates is used,
2440                  * have it fall back to the 6M OFDM rate */
2441                 for (i = IWL_RATE_1M_INDEX_TABLE; i <= IWL_RATE_11M_INDEX_TABLE; i++)
2442                         table[i].next_rate_index = iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2443
2444                 /* Don't fall back to CCK rates */
2445                 table[IWL_RATE_12M_INDEX_TABLE].next_rate_index = IWL_RATE_9M_INDEX_TABLE;
2446
2447                 /* Don't drop out of OFDM rates */
2448                 table[IWL_RATE_6M_INDEX_TABLE].next_rate_index =
2449                     iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2450                 break;
2451
2452         case IEEE80211_BAND_2GHZ:
2453                 IWL_DEBUG_RATE("Select B/G mode rate scale\n");
2454                 /* If an OFDM rate is used, have it fall back to the
2455                  * 1M CCK rates */
2456                 for (i = IWL_RATE_6M_INDEX_TABLE; i <= IWL_RATE_54M_INDEX_TABLE; i++)
2457                         table[i].next_rate_index = iwl3945_rates[IWL_FIRST_CCK_RATE].table_rs_index;
2458
2459                 /* CCK shouldn't fall back to OFDM... */
2460                 table[IWL_RATE_11M_INDEX_TABLE].next_rate_index = IWL_RATE_5M_INDEX_TABLE;
2461                 break;
2462
2463         default:
2464                 WARN_ON(1);
2465                 break;
2466         }
2467
2468         /* Update the rate scaling for control frame Tx */
2469         rate_cmd.table_id = 0;
2470         rc = iwl3945_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2471                               &rate_cmd);
2472         if (rc)
2473                 return rc;
2474
2475         /* Update the rate scaling for data frame Tx */
2476         rate_cmd.table_id = 1;
2477         return iwl3945_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2478                                 &rate_cmd);
2479 }
2480
2481 /* Called when initializing driver */
2482 int iwl3945_hw_set_hw_setting(struct iwl3945_priv *priv)
2483 {
2484         memset((void *)&priv->hw_setting, 0,
2485                sizeof(struct iwl3945_driver_hw_info));
2486
2487         priv->hw_setting.shared_virt =
2488             pci_alloc_consistent(priv->pci_dev,
2489                                  sizeof(struct iwl3945_shared),
2490                                  &priv->hw_setting.shared_phys);
2491
2492         if (!priv->hw_setting.shared_virt) {
2493                 IWL_ERROR("failed to allocate pci memory\n");
2494                 mutex_unlock(&priv->mutex);
2495                 return -ENOMEM;
2496         }
2497
2498         priv->hw_setting.rx_buf_size = IWL_RX_BUF_SIZE;
2499         priv->hw_setting.max_pkt_size = 2342;
2500         priv->hw_setting.tx_cmd_len = sizeof(struct iwl3945_tx_cmd);
2501         priv->hw_setting.max_rxq_size = RX_QUEUE_SIZE;
2502         priv->hw_setting.max_rxq_log = RX_QUEUE_SIZE_LOG;
2503         priv->hw_setting.max_stations = IWL3945_STATION_COUNT;
2504         priv->hw_setting.bcast_sta_id = IWL3945_BROADCAST_ID;
2505
2506         priv->hw_setting.tx_ant_num = 2;
2507         return 0;
2508 }
2509
2510 unsigned int iwl3945_hw_get_beacon_cmd(struct iwl3945_priv *priv,
2511                           struct iwl3945_frame *frame, u8 rate)
2512 {
2513         struct iwl3945_tx_beacon_cmd *tx_beacon_cmd;
2514         unsigned int frame_size;
2515
2516         tx_beacon_cmd = (struct iwl3945_tx_beacon_cmd *)&frame->u;
2517         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
2518
2519         tx_beacon_cmd->tx.sta_id = priv->hw_setting.bcast_sta_id;
2520         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2521
2522         frame_size = iwl3945_fill_beacon_frame(priv,
2523                                 tx_beacon_cmd->frame,
2524                                 iwl3945_broadcast_addr,
2525                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
2526
2527         BUG_ON(frame_size > MAX_MPDU_SIZE);
2528         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
2529
2530         tx_beacon_cmd->tx.rate = rate;
2531         tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
2532                                       TX_CMD_FLG_TSF_MSK);
2533
2534         /* supp_rates[0] == OFDM start at IWL_FIRST_OFDM_RATE*/
2535         tx_beacon_cmd->tx.supp_rates[0] =
2536                 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2537
2538         tx_beacon_cmd->tx.supp_rates[1] =
2539                 (IWL_CCK_BASIC_RATES_MASK & 0xF);
2540
2541         return sizeof(struct iwl3945_tx_beacon_cmd) + frame_size;
2542 }
2543
2544 void iwl3945_hw_rx_handler_setup(struct iwl3945_priv *priv)
2545 {
2546         priv->rx_handlers[REPLY_TX] = iwl3945_rx_reply_tx;
2547         priv->rx_handlers[REPLY_3945_RX] = iwl3945_rx_reply_rx;
2548 }
2549
2550 void iwl3945_hw_setup_deferred_work(struct iwl3945_priv *priv)
2551 {
2552         INIT_DELAYED_WORK(&priv->thermal_periodic,
2553                           iwl3945_bg_reg_txpower_periodic);
2554 }
2555
2556 void iwl3945_hw_cancel_deferred_work(struct iwl3945_priv *priv)
2557 {
2558         cancel_delayed_work(&priv->thermal_periodic);
2559 }
2560
2561 static struct iwl_3945_cfg iwl3945_bg_cfg = {
2562         .name = "3945BG",
2563         .fw_name = "iwlwifi-3945" IWL3945_UCODE_API ".ucode",
2564         .sku = IWL_SKU_G,
2565 };
2566
2567 static struct iwl_3945_cfg iwl3945_abg_cfg = {
2568         .name = "3945ABG",
2569         .fw_name = "iwlwifi-3945" IWL3945_UCODE_API ".ucode",
2570         .sku = IWL_SKU_A|IWL_SKU_G,
2571 };
2572
2573 struct pci_device_id iwl3945_hw_card_ids[] = {
2574         {IWL_PCI_DEVICE(0x4222, 0x1005, iwl3945_bg_cfg)},
2575         {IWL_PCI_DEVICE(0x4222, 0x1034, iwl3945_bg_cfg)},
2576         {IWL_PCI_DEVICE(0x4222, 0x1044, iwl3945_bg_cfg)},
2577         {IWL_PCI_DEVICE(0x4227, 0x1014, iwl3945_bg_cfg)},
2578         {IWL_PCI_DEVICE(0x4222, PCI_ANY_ID, iwl3945_abg_cfg)},
2579         {IWL_PCI_DEVICE(0x4227, PCI_ANY_ID, iwl3945_abg_cfg)},
2580         {0}
2581 };
2582
2583 MODULE_DEVICE_TABLE(pci, iwl3945_hw_card_ids);