SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/net/wireless/iwlwifi/iwl-3945.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  *  Intel Linux Wireless <ilw@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/init.h>
  30 #include <linux/pci.h>
  31 #include <linux/dma-mapping.h>
  32 #include <linux/delay.h>
  33 #include <linux/skbuff.h>
  34 #include <linux/netdevice.h>
  35 #include <linux/wireless.h>
  36 #include <linux/firmware.h>
  37 #include <linux/etherdevice.h>
  38 #include <asm/unaligned.h>
  39 #include <net/mac80211.h>
  40
  41 #include "iwl-3945-core.h"
  42 #include "iwl-3945-fh.h"
  43 #include "iwl-commands.h"
  44 #include "iwl-3945-commands.h"
  45 #include "iwl-3945.h"
  46 #include "iwl-helpers.h"
  47 #include "iwl-3945-rs.h"
  48
  49 #define IWL_DECLARE_RATE_INFO(r, ip, in, rp, rn, pp, np)    \
  50         [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP,   \
  51                                     IWL_RATE_##r##M_IEEE,   \
  52                                     IWL_RATE_##ip##M_INDEX, \
  53                                     IWL_RATE_##in##M_INDEX, \
  54                                     IWL_RATE_##rp##M_INDEX, \
  55                                     IWL_RATE_##rn##M_INDEX, \
  56                                     IWL_RATE_##pp##M_INDEX, \
  57                                     IWL_RATE_##np##M_INDEX, \
  58                                     IWL_RATE_##r##M_INDEX_TABLE, \
  59                                     IWL_RATE_##ip##M_INDEX_TABLE }
  60
  61 /*
  62  * Parameter order:
  63  *   rate, prev rate, next rate, prev tgg rate, next tgg rate
  64  *
  65  * If there isn't a valid next or previous rate then INV is used which
  66  * maps to IWL_RATE_INVALID
  67  *
  68  */
  69 const struct iwl3945_rate_info iwl3945_rates[IWL_RATE_COUNT] = {
  70         IWL_DECLARE_RATE_INFO(1, INV, 2, INV, 2, INV, 2),    /*  1mbps */
  71         IWL_DECLARE_RATE_INFO(2, 1, 5, 1, 5, 1, 5),          /*  2mbps */
  72         IWL_DECLARE_RATE_INFO(5, 2, 6, 2, 11, 2, 11),        /*5.5mbps */
  73         IWL_DECLARE_RATE_INFO(11, 9, 12, 5, 12, 5, 18),      /* 11mbps */
  74         IWL_DECLARE_RATE_INFO(6, 5, 9, 5, 11, 5, 11),        /*  6mbps */
  75         IWL_DECLARE_RATE_INFO(9, 6, 11, 5, 11, 5, 11),       /*  9mbps */
  76         IWL_DECLARE_RATE_INFO(12, 11, 18, 11, 18, 11, 18),   /* 12mbps */
  77         IWL_DECLARE_RATE_INFO(18, 12, 24, 12, 24, 11, 24),   /* 18mbps */
  78         IWL_DECLARE_RATE_INFO(24, 18, 36, 18, 36, 18, 36),   /* 24mbps */
  79         IWL_DECLARE_RATE_INFO(36, 24, 48, 24, 48, 24, 48),   /* 36mbps */
  80         IWL_DECLARE_RATE_INFO(48, 36, 54, 36, 54, 36, 54),   /* 48mbps */
  81         IWL_DECLARE_RATE_INFO(54, 48, INV, 48, INV, 48, INV),/* 54mbps */
  82 };
  83
  84 /* 1 = enable the iwl3945_disable_events() function */
  85 #define IWL_EVT_DISABLE (0)
  86 #define IWL_EVT_DISABLE_SIZE (1532/32)
  87
  88 /**
  89  * iwl3945_disable_events - Disable selected events in uCode event log
  90  *
  91  * Disable an event by writing "1"s into "disable"
  92  *   bitmap in SRAM.  Bit position corresponds to Event # (id/type).
  93  *   Default values of 0 enable uCode events to be logged.
  94  * Use for only special debugging.  This function is just a placeholder as-is,
  95  *   you'll need to provide the special bits! ...
  96  *   ... and set IWL_EVT_DISABLE to 1. */
  97 void iwl3945_disable_events(struct iwl3945_priv *priv)
  98 {
  99         int ret;
 100         int i;
 101         u32 base;               /* SRAM address of event log header */
 102         u32 disable_ptr;        /* SRAM address of event-disable bitmap array */
 103         u32 array_size;         /* # of u32 entries in array */
 104         u32 evt_disable[IWL_EVT_DISABLE_SIZE] = {
 105                 0x00000000,     /*   31 -    0  Event id numbers */
 106                 0x00000000,     /*   63 -   32 */
 107                 0x00000000,     /*   95 -   64 */
 108                 0x00000000,     /*  127 -   96 */
 109                 0x00000000,     /*  159 -  128 */
 110                 0x00000000,     /*  191 -  160 */
 111                 0x00000000,     /*  223 -  192 */
 112                 0x00000000,     /*  255 -  224 */
 113                 0x00000000,     /*  287 -  256 */
 114                 0x00000000,     /*  319 -  288 */
 115                 0x00000000,     /*  351 -  320 */
 116                 0x00000000,     /*  383 -  352 */
 117                 0x00000000,     /*  415 -  384 */
 118                 0x00000000,     /*  447 -  416 */
 119                 0x00000000,     /*  479 -  448 */
 120                 0x00000000,     /*  511 -  480 */
 121                 0x00000000,     /*  543 -  512 */
 122                 0x00000000,     /*  575 -  544 */
 123                 0x00000000,     /*  607 -  576 */
 124                 0x00000000,     /*  639 -  608 */
 125                 0x00000000,     /*  671 -  640 */
 126                 0x00000000,     /*  703 -  672 */
 127                 0x00000000,     /*  735 -  704 */
 128                 0x00000000,     /*  767 -  736 */
 129                 0x00000000,     /*  799 -  768 */
 130                 0x00000000,     /*  831 -  800 */
 131                 0x00000000,     /*  863 -  832 */
 132                 0x00000000,     /*  895 -  864 */
 133                 0x00000000,     /*  927 -  896 */
 134                 0x00000000,     /*  959 -  928 */
 135                 0x00000000,     /*  991 -  960 */
 136                 0x00000000,     /* 1023 -  992 */
 137                 0x00000000,     /* 1055 - 1024 */
 138                 0x00000000,     /* 1087 - 1056 */
 139                 0x00000000,     /* 1119 - 1088 */
 140                 0x00000000,     /* 1151 - 1120 */
 141                 0x00000000,     /* 1183 - 1152 */
 142                 0x00000000,     /* 1215 - 1184 */
 143                 0x00000000,     /* 1247 - 1216 */
 144                 0x00000000,     /* 1279 - 1248 */
 145                 0x00000000,     /* 1311 - 1280 */
 146                 0x00000000,     /* 1343 - 1312 */
 147                 0x00000000,     /* 1375 - 1344 */
 148                 0x00000000,     /* 1407 - 1376 */
 149                 0x00000000,     /* 1439 - 1408 */
 150                 0x00000000,     /* 1471 - 1440 */
 151                 0x00000000,     /* 1503 - 1472 */
 152         };
 153
 154         base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
 155         if (!iwl3945_hw_valid_rtc_data_addr(base)) {
 156                 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
 157                 return;
 158         }
 159
 160         ret = iwl3945_grab_nic_access(priv);
 161         if (ret) {
 162                 IWL_WARNING("Can not read from adapter at this time.\n");
 163                 return;
 164         }
 165
 166         disable_ptr = iwl3945_read_targ_mem(priv, base + (4 * sizeof(u32)));
 167         array_size = iwl3945_read_targ_mem(priv, base + (5 * sizeof(u32)));
 168         iwl3945_release_nic_access(priv);
 169
 170         if (IWL_EVT_DISABLE && (array_size == IWL_EVT_DISABLE_SIZE)) {
 171                 IWL_DEBUG_INFO("Disabling selected uCode log events at 0x%x\n",
 172                                disable_ptr);
 173                 ret = iwl3945_grab_nic_access(priv);
 174                 for (i = 0; i < IWL_EVT_DISABLE_SIZE; i++)
 175                         iwl3945_write_targ_mem(priv,
 176                                            disable_ptr + (i * sizeof(u32)),
 177                                            evt_disable[i]);
 178
 179                 iwl3945_release_nic_access(priv);
 180         } else {
 181                 IWL_DEBUG_INFO("Selected uCode log events may be disabled\n");
 182                 IWL_DEBUG_INFO("  by writing \"1\"s into disable bitmap\n");
 183                 IWL_DEBUG_INFO("  in SRAM at 0x%x, size %d u32s\n",
 184                                disable_ptr, array_size);
 185         }
 186
 187 }
 188
 189 static int iwl3945_hwrate_to_plcp_idx(u8 plcp)
 190 {
 191         int idx;
 192
 193         for (idx = 0; idx < IWL_RATE_COUNT; idx++)
 194                 if (iwl3945_rates[idx].plcp == plcp)
 195                         return idx;
 196         return -1;
 197 }
 198
 199 /**
 200  * iwl3945_get_antenna_flags - Get antenna flags for RXON command
 201  * @priv: eeprom and antenna fields are used to determine antenna flags
 202  *
 203  * priv->eeprom  is used to determine if antenna AUX/MAIN are reversed
 204  * priv->antenna specifies the antenna diversity mode:
 205  *
 206  * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
 207  * IWL_ANTENNA_MAIN      - Force MAIN antenna
 208  * IWL_ANTENNA_AUX       - Force AUX antenna
 209  */
 210 __le32 iwl3945_get_antenna_flags(const struct iwl3945_priv *priv)
 211 {
 212         switch (priv->antenna) {
 213         case IWL_ANTENNA_DIVERSITY:
 214                 return 0;
 215
 216         case IWL_ANTENNA_MAIN:
 217                 if (priv->eeprom.antenna_switch_type)
 218                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
 219                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
 220
 221         case IWL_ANTENNA_AUX:
 222                 if (priv->eeprom.antenna_switch_type)
 223                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
 224                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
 225         }
 226
 227         /* bad antenna selector value */
 228         IWL_ERROR("Bad antenna selector value (0x%x)\n", priv->antenna);
 229         return 0;               /* "diversity" is default if error */
 230 }
 231
 232 #ifdef CONFIG_IWL3945_DEBUG
 233 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
 234
 235 static const char *iwl3945_get_tx_fail_reason(u32 status)
 236 {
 237         switch (status & TX_STATUS_MSK) {
 238         case TX_STATUS_SUCCESS:
 239                 return "SUCCESS";
 240                 TX_STATUS_ENTRY(SHORT_LIMIT);
 241                 TX_STATUS_ENTRY(LONG_LIMIT);
 242                 TX_STATUS_ENTRY(FIFO_UNDERRUN);
 243                 TX_STATUS_ENTRY(MGMNT_ABORT);
 244                 TX_STATUS_ENTRY(NEXT_FRAG);
 245                 TX_STATUS_ENTRY(LIFE_EXPIRE);
 246                 TX_STATUS_ENTRY(DEST_PS);
 247                 TX_STATUS_ENTRY(ABORTED);
 248                 TX_STATUS_ENTRY(BT_RETRY);
 249                 TX_STATUS_ENTRY(STA_INVALID);
 250                 TX_STATUS_ENTRY(FRAG_DROPPED);
 251                 TX_STATUS_ENTRY(TID_DISABLE);
 252                 TX_STATUS_ENTRY(FRAME_FLUSHED);
 253                 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
 254                 TX_STATUS_ENTRY(TX_LOCKED);
 255                 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
 256         }
 257
 258         return "UNKNOWN";
 259 }
 260 #else
 261 static inline const char *iwl3945_get_tx_fail_reason(u32 status)
 262 {
 263         return "";
 264 }
 265 #endif
 266
 267 /*
 268  * get ieee prev rate from rate scale table.
 269  * for A and B mode we need to overright prev
 270  * value
 271  */
 272 int iwl3945_rs_next_rate(struct iwl3945_priv *priv, int rate)
 273 {
 274         int next_rate = iwl3945_get_prev_ieee_rate(rate);
 275
 276         switch (priv->band) {
 277         case IEEE80211_BAND_5GHZ:
 278                 if (rate == IWL_RATE_12M_INDEX)
 279                         next_rate = IWL_RATE_9M_INDEX;
 280                 else if (rate == IWL_RATE_6M_INDEX)
 281                         next_rate = IWL_RATE_6M_INDEX;
 282                 break;
 283         case IEEE80211_BAND_2GHZ:
 284                 if (!(priv->sta_supp_rates & IWL_OFDM_RATES_MASK) &&
 285                     iwl3945_is_associated(priv)) {
 286                         if (rate == IWL_RATE_11M_INDEX)
 287                                 next_rate = IWL_RATE_5M_INDEX;
 288                 }
 289                 break;
 290
 291         default:
 292                 break;
 293         }
 294
 295         return next_rate;
 296 }
 297
 298
 299 /**
 300  * iwl3945_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
 301  *
 302  * When FW advances 'R' index, all entries between old and new 'R' index
 303  * need to be reclaimed. As result, some free space forms. If there is
 304  * enough free space (> low mark), wake the stack that feeds us.
 305  */
 306 static void iwl3945_tx_queue_reclaim(struct iwl3945_priv *priv,
 307                                      int txq_id, int index)
 308 {
 309         struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
 310         struct iwl3945_queue *q = &txq->q;
 311         struct iwl3945_tx_info *tx_info;
 312
 313         BUG_ON(txq_id == IWL_CMD_QUEUE_NUM);
 314
 315         for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
 316                 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
 317
 318                 tx_info = &txq->txb[txq->q.read_ptr];
 319                 ieee80211_tx_status_irqsafe(priv->hw, tx_info->skb[0]);
 320                 tx_info->skb[0] = NULL;
 321                 iwl3945_hw_txq_free_tfd(priv, txq);
 322         }
 323
 324         if (iwl3945_queue_space(q) > q->low_mark && (txq_id >= 0) &&
 325                         (txq_id != IWL_CMD_QUEUE_NUM) &&
 326                         priv->mac80211_registered)
 327                 ieee80211_wake_queue(priv->hw, txq_id);
 328 }
 329
 330 /**
 331  * iwl3945_rx_reply_tx - Handle Tx response
 332  */
 333 static void iwl3945_rx_reply_tx(struct iwl3945_priv *priv,
 334                             struct iwl3945_rx_mem_buffer *rxb)
 335 {
 336         struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
 337         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
 338         int txq_id = SEQ_TO_QUEUE(sequence);
 339         int index = SEQ_TO_INDEX(sequence);
 340         struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
 341         struct ieee80211_tx_info *info;
 342         struct iwl3945_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
 343         u32  status = le32_to_cpu(tx_resp->status);
 344         int rate_idx;
 345         int fail;
 346
 347         if ((index >= txq->q.n_bd) || (iwl3945_x2_queue_used(&txq->q, index) == 0)) {
 348                 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
 349                           "is out of range [0-%d] %d %d\n", txq_id,
 350                           index, txq->q.n_bd, txq->q.write_ptr,
 351                           txq->q.read_ptr);
 352                 return;
 353         }
 354
 355         info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
 356         ieee80211_tx_info_clear_status(info);
 357
 358         /* Fill the MRR chain with some info about on-chip retransmissions */
 359         rate_idx = iwl3945_hwrate_to_plcp_idx(tx_resp->rate);
 360         if (info->band == IEEE80211_BAND_5GHZ)
 361                 rate_idx -= IWL_FIRST_OFDM_RATE;
 362
 363         fail = tx_resp->failure_frame;
 364
 365         info->status.rates[0].idx = rate_idx;
 366         info->status.rates[0].count = fail + 1; /* add final attempt */
 367
 368         /* tx_status->rts_retry_count = tx_resp->failure_rts; */
 369         info->flags |= ((status & TX_STATUS_MSK) == TX_STATUS_SUCCESS) ?
 370                                 IEEE80211_TX_STAT_ACK : 0;
 371
 372         IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n",
 373                         txq_id, iwl3945_get_tx_fail_reason(status), status,
 374                         tx_resp->rate, tx_resp->failure_frame);
 375
 376         IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
 377         iwl3945_tx_queue_reclaim(priv, txq_id, index);
 378
 379         if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
 380                 IWL_ERROR("TODO:  Implement Tx ABORT REQUIRED!!!\n");
 381 }
 382
 383
 384
 385 /*****************************************************************************
 386  *
 387  * Intel PRO/Wireless 3945ABG/BG Network Connection
 388  *
 389  *  RX handler implementations
 390  *
 391  *****************************************************************************/
 392
 393 void iwl3945_hw_rx_statistics(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb)
 394 {
 395         struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
 396         IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
 397                      (int)sizeof(struct iwl3945_notif_statistics),
 398                      le32_to_cpu(pkt->len));
 399
 400         memcpy(&priv->statistics, pkt->u.raw, sizeof(priv->statistics));
 401
 402         iwl3945_led_background(priv);
 403
 404         priv->last_statistics_time = jiffies;
 405 }
 406
 407 /******************************************************************************
 408  *
 409  * Misc. internal state and helper functions
 410  *
 411  ******************************************************************************/
 412 #ifdef CONFIG_IWL3945_DEBUG
 413
 414 /**
 415  * iwl3945_report_frame - dump frame to syslog during debug sessions
 416  *
 417  * You may hack this function to show different aspects of received frames,
 418  * including selective frame dumps.
 419  * group100 parameter selects whether to show 1 out of 100 good frames.
 420  */
 421 static void iwl3945_dbg_report_frame(struct iwl3945_priv *priv,
 422                       struct iwl3945_rx_packet *pkt,
 423                       struct ieee80211_hdr *header, int group100)
 424 {
 425         u32 to_us;
 426         u32 print_summary = 0;
 427         u32 print_dump = 0;     /* set to 1 to dump all frames' contents */
 428         u32 hundred = 0;
 429         u32 dataframe = 0;
 430         __le16 fc;
 431         u16 seq_ctl;
 432         u16 channel;
 433         u16 phy_flags;
 434         u16 length;
 435         u16 status;
 436         u16 bcn_tmr;
 437         u32 tsf_low;
 438         u64 tsf;
 439         u8 rssi;
 440         u8 agc;
 441         u16 sig_avg;
 442         u16 noise_diff;
 443         struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
 444         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 445         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
 446         u8 *data = IWL_RX_DATA(pkt);
 447
 448         /* MAC header */
 449         fc = header->frame_control;
 450         seq_ctl = le16_to_cpu(header->seq_ctrl);
 451
 452         /* metadata */
 453         channel = le16_to_cpu(rx_hdr->channel);
 454         phy_flags = le16_to_cpu(rx_hdr->phy_flags);
 455         length = le16_to_cpu(rx_hdr->len);
 456
 457         /* end-of-frame status and timestamp */
 458         status = le32_to_cpu(rx_end->status);
 459         bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
 460         tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
 461         tsf = le64_to_cpu(rx_end->timestamp);
 462
 463         /* signal statistics */
 464         rssi = rx_stats->rssi;
 465         agc = rx_stats->agc;
 466         sig_avg = le16_to_cpu(rx_stats->sig_avg);
 467         noise_diff = le16_to_cpu(rx_stats->noise_diff);
 468
 469         to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
 470
 471         /* if data frame is to us and all is good,
 472          *   (optionally) print summary for only 1 out of every 100 */
 473         if (to_us && (fc & ~cpu_to_le16(IEEE80211_FCTL_PROTECTED)) ==
 474             cpu_to_le16(IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
 475                 dataframe = 1;
 476                 if (!group100)
 477                         print_summary = 1;      /* print each frame */
 478                 else if (priv->framecnt_to_us < 100) {
 479                         priv->framecnt_to_us++;
 480                         print_summary = 0;
 481                 } else {
 482                         priv->framecnt_to_us = 0;
 483                         print_summary = 1;
 484                         hundred = 1;
 485                 }
 486         } else {
 487                 /* print summary for all other frames */
 488                 print_summary = 1;
 489         }
 490
 491         if (print_summary) {
 492                 char *title;
 493                 int rate;
 494
 495                 if (hundred)
 496                         title = "100Frames";
 497                 else if (ieee80211_has_retry(fc))
 498                         title = "Retry";
 499                 else if (ieee80211_is_assoc_resp(fc))
 500                         title = "AscRsp";
 501                 else if (ieee80211_is_reassoc_resp(fc))
 502                         title = "RasRsp";
 503                 else if (ieee80211_is_probe_resp(fc)) {
 504                         title = "PrbRsp";
 505                         print_dump = 1; /* dump frame contents */
 506                 } else if (ieee80211_is_beacon(fc)) {
 507                         title = "Beacon";
 508                         print_dump = 1; /* dump frame contents */
 509                 } else if (ieee80211_is_atim(fc))
 510                         title = "ATIM";
 511                 else if (ieee80211_is_auth(fc))
 512                         title = "Auth";
 513                 else if (ieee80211_is_deauth(fc))
 514                         title = "DeAuth";
 515                 else if (ieee80211_is_disassoc(fc))
 516                         title = "DisAssoc";
 517                 else
 518                         title = "Frame";
 519
 520                 rate = iwl3945_hwrate_to_plcp_idx(rx_hdr->rate);
 521                 if (rate == -1)
 522                         rate = 0;
 523                 else
 524                         rate = iwl3945_rates[rate].ieee / 2;
 525
 526                 /* print frame summary.
 527                  * MAC addresses show just the last byte (for brevity),
 528                  *    but you can hack it to show more, if you'd like to. */
 529                 if (dataframe)
 530                         IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
 531                                      "len=%u, rssi=%d, chnl=%d, rate=%d, \n",
 532                                      title, le16_to_cpu(fc), header->addr1[5],
 533                                      length, rssi, channel, rate);
 534                 else {
 535                         /* src/dst addresses assume managed mode */
 536                         IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
 537                                      "src=0x%02x, rssi=%u, tim=%lu usec, "
 538                                      "phy=0x%02x, chnl=%d\n",
 539                                      title, le16_to_cpu(fc), header->addr1[5],
 540                                      header->addr3[5], rssi,
 541                                      tsf_low - priv->scan_start_tsf,
 542                                      phy_flags, channel);
 543                 }
 544         }
 545         if (print_dump)
 546                 iwl3945_print_hex_dump(IWL_DL_RX, data, length);
 547 }
 548 #else
 549 static inline void iwl3945_dbg_report_frame(struct iwl3945_priv *priv,
 550                       struct iwl3945_rx_packet *pkt,
 551                       struct ieee80211_hdr *header, int group100)
 552 {
 553 }
 554 #endif
 555
 556 /* This is necessary only for a number of statistics, see the caller. */
 557 static int iwl3945_is_network_packet(struct iwl3945_priv *priv,
 558                 struct ieee80211_hdr *header)
 559 {
 560         /* Filter incoming packets to determine if they are targeted toward
 561          * this network, discarding packets coming from ourselves */
 562         switch (priv->iw_mode) {
 563         case NL80211_IFTYPE_ADHOC: /* Header: Dest. | Source    | BSSID */
 564                 /* packets to our IBSS update information */
 565                 return !compare_ether_addr(header->addr3, priv->bssid);
 566         case NL80211_IFTYPE_STATION: /* Header: Dest. | AP{BSSID} | Source */
 567                 /* packets to our IBSS update information */
 568                 return !compare_ether_addr(header->addr2, priv->bssid);
 569         default:
 570                 return 1;
 571         }
 572 }
 573
 574 static void iwl3945_pass_packet_to_mac80211(struct iwl3945_priv *priv,
 575                                    struct iwl3945_rx_mem_buffer *rxb,
 576                                    struct ieee80211_rx_status *stats)
 577 {
 578         struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
 579 #ifdef CONFIG_IWL3945_LEDS
 580         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
 581 #endif
 582         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 583         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
 584         short len = le16_to_cpu(rx_hdr->len);
 585
 586         /* We received data from the HW, so stop the watchdog */
 587         if (unlikely((len + IWL_RX_FRAME_SIZE) > skb_tailroom(rxb->skb))) {
 588                 IWL_DEBUG_DROP("Corruption detected!\n");
 589                 return;
 590         }
 591
 592         /* We only process data packets if the interface is open */
 593         if (unlikely(!priv->is_open)) {
 594                 IWL_DEBUG_DROP_LIMIT
 595                     ("Dropping packet while interface is not open.\n");
 596                 return;
 597         }
 598
 599         skb_reserve(rxb->skb, (void *)rx_hdr->payload - (void *)pkt);
 600         /* Set the size of the skb to the size of the frame */
 601         skb_put(rxb->skb, le16_to_cpu(rx_hdr->len));
 602
 603         if (iwl3945_param_hwcrypto)
 604                 iwl3945_set_decrypted_flag(priv, rxb->skb,
 605                                        le32_to_cpu(rx_end->status), stats);
 606
 607 #ifdef CONFIG_IWL3945_LEDS
 608         if (ieee80211_is_data(hdr->frame_control))
 609                 priv->rxtxpackets += len;
 610 #endif
 611         ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
 612         rxb->skb = NULL;
 613 }
 614
 615 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
 616
 617 static void iwl3945_rx_reply_rx(struct iwl3945_priv *priv,
 618                                 struct iwl3945_rx_mem_buffer *rxb)
 619 {
 620         struct ieee80211_hdr *header;
 621         struct ieee80211_rx_status rx_status;
 622         struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
 623         struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
 624         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 625         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
 626         int snr;
 627         u16 rx_stats_sig_avg = le16_to_cpu(rx_stats->sig_avg);
 628         u16 rx_stats_noise_diff = le16_to_cpu(rx_stats->noise_diff);
 629         u8 network_packet;
 630
 631         rx_status.flag = 0;
 632         rx_status.mactime = le64_to_cpu(rx_end->timestamp);
 633         rx_status.freq =
 634                 ieee80211_channel_to_frequency(le16_to_cpu(rx_hdr->channel));
 635         rx_status.band = (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
 636                                 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
 637
 638         rx_status.rate_idx = iwl3945_hwrate_to_plcp_idx(rx_hdr->rate);
 639         if (rx_status.band == IEEE80211_BAND_5GHZ)
 640                 rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
 641
 642         rx_status.antenna = le16_to_cpu(rx_hdr->phy_flags &
 643                                         RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
 644
 645         /* set the preamble flag if appropriate */
 646         if (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
 647                 rx_status.flag |= RX_FLAG_SHORTPRE;
 648
 649         if ((unlikely(rx_stats->phy_count > 20))) {
 650                 IWL_DEBUG_DROP
 651                     ("dsp size out of range [0,20]: "
 652                      "%d/n", rx_stats->phy_count);
 653                 return;
 654         }
 655
 656         if (!(rx_end->status & RX_RES_STATUS_NO_CRC32_ERROR)
 657             || !(rx_end->status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
 658                 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n", rx_end->status);
 659                 return;
 660         }
 661
 662
 663
 664         /* Convert 3945's rssi indicator to dBm */
 665         rx_status.signal = rx_stats->rssi - IWL_RSSI_OFFSET;
 666
 667         /* Set default noise value to -127 */
 668         if (priv->last_rx_noise == 0)
 669                 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
 670
 671         /* 3945 provides noise info for OFDM frames only.
 672          * sig_avg and noise_diff are measured by the 3945's digital signal
 673          *   processor (DSP), and indicate linear levels of signal level and
 674          *   distortion/noise within the packet preamble after
 675          *   automatic gain control (AGC).  sig_avg should stay fairly
 676          *   constant if the radio's AGC is working well.
 677          * Since these values are linear (not dB or dBm), linear
 678          *   signal-to-noise ratio (SNR) is (sig_avg / noise_diff).
 679          * Convert linear SNR to dB SNR, then subtract that from rssi dBm
 680          *   to obtain noise level in dBm.
 681          * Calculate rx_status.signal (quality indicator in %) based on SNR. */
 682         if (rx_stats_noise_diff) {
 683                 snr = rx_stats_sig_avg / rx_stats_noise_diff;
 684                 rx_status.noise = rx_status.signal -
 685                                         iwl3945_calc_db_from_ratio(snr);
 686                 rx_status.qual = iwl3945_calc_sig_qual(rx_status.signal,
 687                                                          rx_status.noise);
 688
 689         /* If noise info not available, calculate signal quality indicator (%)
 690          *   using just the dBm signal level. */
 691         } else {
 692                 rx_status.noise = priv->last_rx_noise;
 693                 rx_status.qual = iwl3945_calc_sig_qual(rx_status.signal, 0);
 694         }
 695
 696
 697         IWL_DEBUG_STATS("Rssi %d noise %d qual %d sig_avg %d noise_diff %d\n",
 698                         rx_status.signal, rx_status.noise, rx_status.qual,
 699                         rx_stats_sig_avg, rx_stats_noise_diff);
 700
 701         header = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
 702
 703         network_packet = iwl3945_is_network_packet(priv, header);
 704
 705         IWL_DEBUG_STATS_LIMIT("[%c] %d RSSI:%d Signal:%u, Noise:%u, Rate:%u\n",
 706                               network_packet ? '*' : ' ',
 707                               le16_to_cpu(rx_hdr->channel),
 708                               rx_status.signal, rx_status.signal,
 709                               rx_status.noise, rx_status.rate_idx);
 710
 711 #ifdef CONFIG_IWL3945_DEBUG
 712         if (iwl3945_debug_level & (IWL_DL_RX))
 713                 /* Set "1" to report good data frames in groups of 100 */
 714                 iwl3945_dbg_report_frame(priv, pkt, header, 1);
 715 #endif
 716
 717         if (network_packet) {
 718                 priv->last_beacon_time = le32_to_cpu(rx_end->beacon_timestamp);
 719                 priv->last_tsf = le64_to_cpu(rx_end->timestamp);
 720                 priv->last_rx_rssi = rx_status.signal;
 721                 priv->last_rx_noise = rx_status.noise;
 722         }
 723
 724         iwl3945_pass_packet_to_mac80211(priv, rxb, &rx_status);
 725 }
 726
 727 int iwl3945_hw_txq_attach_buf_to_tfd(struct iwl3945_priv *priv, void *ptr,
 728                                  dma_addr_t addr, u16 len)
 729 {
 730         int count;
 731         u32 pad;
 732         struct iwl3945_tfd_frame *tfd = (struct iwl3945_tfd_frame *)ptr;
 733
 734         count = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
 735         pad = TFD_CTL_PAD_GET(le32_to_cpu(tfd->control_flags));
 736
 737         if ((count >= NUM_TFD_CHUNKS) || (count < 0)) {
 738                 IWL_ERROR("Error can not send more than %d chunks\n",
 739                           NUM_TFD_CHUNKS);
 740                 return -EINVAL;
 741         }
 742
 743         tfd->pa[count].addr = cpu_to_le32(addr);
 744         tfd->pa[count].len = cpu_to_le32(len);
 745
 746         count++;
 747
 748         tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(count) |
 749                                          TFD_CTL_PAD_SET(pad));
 750
 751         return 0;
 752 }
 753
 754 /**
 755  * iwl3945_hw_txq_free_tfd - Free one TFD, those at index [txq->q.read_ptr]
 756  *
 757  * Does NOT advance any indexes
 758  */
 759 int iwl3945_hw_txq_free_tfd(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
 760 {
 761         struct iwl3945_tfd_frame *bd_tmp = (struct iwl3945_tfd_frame *)&txq->bd[0];
 762         struct iwl3945_tfd_frame *bd = &bd_tmp[txq->q.read_ptr];
 763         struct pci_dev *dev = priv->pci_dev;
 764         int i;
 765         int counter;
 766
 767         /* classify bd */
 768         if (txq->q.id == IWL_CMD_QUEUE_NUM)
 769                 /* nothing to cleanup after for host commands */
 770                 return 0;
 771
 772         /* sanity check */
 773         counter = TFD_CTL_COUNT_GET(le32_to_cpu(bd->control_flags));
 774         if (counter > NUM_TFD_CHUNKS) {
 775                 IWL_ERROR("Too many chunks: %i\n", counter);
 776                 /* @todo issue fatal error, it is quite serious situation */
 777                 return 0;
 778         }
 779
 780         /* unmap chunks if any */
 781
 782         for (i = 1; i < counter; i++) {
 783                 pci_unmap_single(dev, le32_to_cpu(bd->pa[i].addr),
 784                                  le32_to_cpu(bd->pa[i].len), PCI_DMA_TODEVICE);
 785                 if (txq->txb[txq->q.read_ptr].skb[0]) {
 786                         struct sk_buff *skb = txq->txb[txq->q.read_ptr].skb[0];
 787                         if (txq->txb[txq->q.read_ptr].skb[0]) {
 788                                 /* Can be called from interrupt context */
 789                                 dev_kfree_skb_any(skb);
 790                                 txq->txb[txq->q.read_ptr].skb[0] = NULL;
 791                         }
 792                 }
 793         }
 794         return 0;
 795 }
 796
 797 u8 iwl3945_hw_find_station(struct iwl3945_priv *priv, const u8 *addr)
 798 {
 799         int i, start = IWL_AP_ID;
 800         int ret = IWL_INVALID_STATION;
 801         unsigned long flags;
 802
 803         if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) ||
 804             (priv->iw_mode == NL80211_IFTYPE_AP))
 805                 start = IWL_STA_ID;
 806
 807         if (is_broadcast_ether_addr(addr))
 808                 return priv->hw_setting.bcast_sta_id;
 809
 810         spin_lock_irqsave(&priv->sta_lock, flags);
 811         for (i = start; i < priv->hw_setting.max_stations; i++)
 812                 if ((priv->stations[i].used) &&
 813                     (!compare_ether_addr
 814                      (priv->stations[i].sta.sta.addr, addr))) {
 815                         ret = i;
 816                         goto out;
 817                 }
 818
 819         IWL_DEBUG_INFO("can not find STA %pM (total %d)\n",
 820                        addr, priv->num_stations);
 821  out:
 822         spin_unlock_irqrestore(&priv->sta_lock, flags);
 823         return ret;
 824 }
 825
 826 /**
 827  * iwl3945_hw_build_tx_cmd_rate - Add rate portion to TX_CMD:
 828  *
 829 */
 830 void iwl3945_hw_build_tx_cmd_rate(struct iwl3945_priv *priv,
 831                               struct iwl3945_cmd *cmd,
 832                               struct ieee80211_tx_info *info,
 833                               struct ieee80211_hdr *hdr, int sta_id, int tx_id)
 834 {
 835         u16 hw_value = ieee80211_get_tx_rate(priv->hw, info)->hw_value;
 836         u16 rate_index = min(hw_value & 0xffff, IWL_RATE_COUNT - 1);
 837         u16 rate_mask;
 838         int rate;
 839         u8 rts_retry_limit;
 840         u8 data_retry_limit;
 841         __le32 tx_flags;
 842         __le16 fc = hdr->frame_control;
 843
 844         rate = iwl3945_rates[rate_index].plcp;
 845         tx_flags = cmd->cmd.tx.tx_flags;
 846
 847         /* We need to figure out how to get the sta->supp_rates while
 848          * in this running context */
 849         rate_mask = IWL_RATES_MASK;
 850
 851         if (tx_id >= IWL_CMD_QUEUE_NUM)
 852                 rts_retry_limit = 3;
 853         else
 854                 rts_retry_limit = 7;
 855
 856         if (ieee80211_is_probe_resp(fc)) {
 857                 data_retry_limit = 3;
 858                 if (data_retry_limit < rts_retry_limit)
 859                         rts_retry_limit = data_retry_limit;
 860         } else
 861                 data_retry_limit = IWL_DEFAULT_TX_RETRY;
 862
 863         if (priv->data_retry_limit != -1)
 864                 data_retry_limit = priv->data_retry_limit;
 865
 866         if (ieee80211_is_mgmt(fc)) {
 867                 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
 868                 case cpu_to_le16(IEEE80211_STYPE_AUTH):
 869                 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
 870                 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
 871                 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
 872                         if (tx_flags & TX_CMD_FLG_RTS_MSK) {
 873                                 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
 874                                 tx_flags |= TX_CMD_FLG_CTS_MSK;
 875                         }
 876                         break;
 877                 default:
 878                         break;
 879                 }
 880         }
 881
 882         cmd->cmd.tx.rts_retry_limit = rts_retry_limit;
 883         cmd->cmd.tx.data_retry_limit = data_retry_limit;
 884         cmd->cmd.tx.rate = rate;
 885         cmd->cmd.tx.tx_flags = tx_flags;
 886
 887         /* OFDM */
 888         cmd->cmd.tx.supp_rates[0] =
 889            ((rate_mask & IWL_OFDM_RATES_MASK) >> IWL_FIRST_OFDM_RATE) & 0xFF;
 890
 891         /* CCK */
 892         cmd->cmd.tx.supp_rates[1] = (rate_mask & 0xF);
 893
 894         IWL_DEBUG_RATE("Tx sta id: %d, rate: %d (plcp), flags: 0x%4X "
 895                        "cck/ofdm mask: 0x%x/0x%x\n", sta_id,
 896                        cmd->cmd.tx.rate, le32_to_cpu(cmd->cmd.tx.tx_flags),
 897                        cmd->cmd.tx.supp_rates[1], cmd->cmd.tx.supp_rates[0]);
 898 }
 899
 900 u8 iwl3945_sync_sta(struct iwl3945_priv *priv, int sta_id, u16 tx_rate, u8 flags)
 901 {
 902         unsigned long flags_spin;
 903         struct iwl3945_station_entry *station;
 904
 905         if (sta_id == IWL_INVALID_STATION)
 906                 return IWL_INVALID_STATION;
 907
 908         spin_lock_irqsave(&priv->sta_lock, flags_spin);
 909         station = &priv->stations[sta_id];
 910
 911         station->sta.sta.modify_mask = STA_MODIFY_TX_RATE_MSK;
 912         station->sta.rate_n_flags = cpu_to_le16(tx_rate);
 913         station->sta.mode = STA_CONTROL_MODIFY_MSK;
 914
 915         spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
 916
 917         iwl3945_send_add_station(priv, &station->sta, flags);
 918         IWL_DEBUG_RATE("SCALE sync station %d to rate %d\n",
 919                         sta_id, tx_rate);
 920         return sta_id;
 921 }
 922
 923 static int iwl3945_nic_set_pwr_src(struct iwl3945_priv *priv, int pwr_max)
 924 {
 925         int rc;
 926         unsigned long flags;
 927
 928         spin_lock_irqsave(&priv->lock, flags);
 929         rc = iwl3945_grab_nic_access(priv);
 930         if (rc) {
 931                 spin_unlock_irqrestore(&priv->lock, flags);
 932                 return rc;
 933         }
 934
 935         if (!pwr_max) {
 936                 u32 val;
 937
 938                 rc = pci_read_config_dword(priv->pci_dev,
 939                                 PCI_POWER_SOURCE, &val);
 940                 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
 941                         iwl3945_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 942                                         APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 943                                         ~APMG_PS_CTRL_MSK_PWR_SRC);
 944                         iwl3945_release_nic_access(priv);
 945
 946                         iwl3945_poll_bit(priv, CSR_GPIO_IN,
 947                                      CSR_GPIO_IN_VAL_VAUX_PWR_SRC,
 948                                      CSR_GPIO_IN_BIT_AUX_POWER, 5000);
 949                 } else
 950                         iwl3945_release_nic_access(priv);
 951         } else {
 952                 iwl3945_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 953                                 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 954                                 ~APMG_PS_CTRL_MSK_PWR_SRC);
 955
 956                 iwl3945_release_nic_access(priv);
 957                 iwl3945_poll_bit(priv, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC,
 958                              CSR_GPIO_IN_BIT_AUX_POWER, 5000);  /* uS */
 959         }
 960         spin_unlock_irqrestore(&priv->lock, flags);
 961
 962         return rc;
 963 }
 964
 965 static int iwl3945_rx_init(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
 966 {
 967         int rc;
 968         unsigned long flags;
 969
 970         spin_lock_irqsave(&priv->lock, flags);
 971         rc = iwl3945_grab_nic_access(priv);
 972         if (rc) {
 973                 spin_unlock_irqrestore(&priv->lock, flags);
 974                 return rc;
 975         }
 976
 977         iwl3945_write_direct32(priv, FH39_RCSR_RBD_BASE(0), rxq->dma_addr);
 978         iwl3945_write_direct32(priv, FH39_RCSR_RPTR_ADDR(0),
 979                              priv->hw_setting.shared_phys +
 980                              offsetof(struct iwl3945_shared, rx_read_ptr[0]));
 981         iwl3945_write_direct32(priv, FH39_RCSR_WPTR(0), 0);
 982         iwl3945_write_direct32(priv, FH39_RCSR_CONFIG(0),
 983                 FH39_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE |
 984                 FH39_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE |
 985                 FH39_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN |
 986                 FH39_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 |
 987                 (RX_QUEUE_SIZE_LOG << FH39_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE) |
 988                 FH39_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST |
 989                 (1 << FH39_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH) |
 990                 FH39_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH);
 991
 992         /* fake read to flush all prev I/O */
 993         iwl3945_read_direct32(priv, FH39_RSSR_CTRL);
 994
 995         iwl3945_release_nic_access(priv);
 996         spin_unlock_irqrestore(&priv->lock, flags);
 997
 998         return 0;
 999 }
1000
1001 static int iwl3945_tx_reset(struct iwl3945_priv *priv)
1002 {
1003         int rc;
1004         unsigned long flags;
1005
1006         spin_lock_irqsave(&priv->lock, flags);
1007         rc = iwl3945_grab_nic_access(priv);
1008         if (rc) {
1009                 spin_unlock_irqrestore(&priv->lock, flags);
1010                 return rc;
1011         }
1012
1013         /* bypass mode */
1014         iwl3945_write_prph(priv, ALM_SCD_MODE_REG, 0x2);
1015
1016         /* RA 0 is active */
1017         iwl3945_write_prph(priv, ALM_SCD_ARASTAT_REG, 0x01);
1018
1019         /* all 6 fifo are active */
1020         iwl3945_write_prph(priv, ALM_SCD_TXFACT_REG, 0x3f);
1021
1022         iwl3945_write_prph(priv, ALM_SCD_SBYP_MODE_1_REG, 0x010000);
1023         iwl3945_write_prph(priv, ALM_SCD_SBYP_MODE_2_REG, 0x030002);
1024         iwl3945_write_prph(priv, ALM_SCD_TXF4MF_REG, 0x000004);
1025         iwl3945_write_prph(priv, ALM_SCD_TXF5MF_REG, 0x000005);
1026
1027         iwl3945_write_direct32(priv, FH39_TSSR_CBB_BASE,
1028                              priv->hw_setting.shared_phys);
1029
1030         iwl3945_write_direct32(priv, FH39_TSSR_MSG_CONFIG,
1031                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON |
1032                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON |
1033                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B |
1034                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON |
1035                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON |
1036                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH |
1037                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH);
1038
1039         iwl3945_release_nic_access(priv);
1040         spin_unlock_irqrestore(&priv->lock, flags);
1041
1042         return 0;
1043 }
1044
1045 /**
1046  * iwl3945_txq_ctx_reset - Reset TX queue context
1047  *
1048  * Destroys all DMA structures and initialize them again
1049  */
1050 static int iwl3945_txq_ctx_reset(struct iwl3945_priv *priv)
1051 {
1052         int rc;
1053         int txq_id, slots_num;
1054
1055         iwl3945_hw_txq_ctx_free(priv);
1056
1057         /* Tx CMD queue */
1058         rc = iwl3945_tx_reset(priv);
1059         if (rc)
1060                 goto error;
1061
1062         /* Tx queue(s) */
1063         for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++) {
1064                 slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
1065                                 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
1066                 rc = iwl3945_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
1067                                 txq_id);
1068                 if (rc) {
1069                         IWL_ERROR("Tx %d queue init failed\n", txq_id);
1070                         goto error;
1071                 }
1072         }
1073
1074         return rc;
1075
1076  error:
1077         iwl3945_hw_txq_ctx_free(priv);
1078         return rc;
1079 }
1080
1081 int iwl3945_hw_nic_init(struct iwl3945_priv *priv)
1082 {
1083         u8 rev_id;
1084         int rc;
1085         unsigned long flags;
1086         struct iwl3945_rx_queue *rxq = &priv->rxq;
1087
1088         iwl3945_power_init_handle(priv);
1089
1090         spin_lock_irqsave(&priv->lock, flags);
1091         iwl3945_set_bit(priv, CSR_ANA_PLL_CFG, CSR39_ANA_PLL_CFG_VAL);
1092         iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1093                     CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1094
1095         iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1096         rc = iwl3945_poll_direct_bit(priv, CSR_GP_CNTRL,
1097                         CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1098         if (rc < 0) {
1099                 spin_unlock_irqrestore(&priv->lock, flags);
1100                 IWL_DEBUG_INFO("Failed to init the card\n");
1101                 return rc;
1102         }
1103
1104         rc = iwl3945_grab_nic_access(priv);
1105         if (rc) {
1106                 spin_unlock_irqrestore(&priv->lock, flags);
1107                 return rc;
1108         }
1109         iwl3945_write_prph(priv, APMG_CLK_EN_REG,
1110                                  APMG_CLK_VAL_DMA_CLK_RQT |
1111                                  APMG_CLK_VAL_BSM_CLK_RQT);
1112         udelay(20);
1113         iwl3945_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1114                                     APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1115         iwl3945_release_nic_access(priv);
1116         spin_unlock_irqrestore(&priv->lock, flags);
1117
1118         /* Determine HW type */
1119         rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
1120         if (rc)
1121                 return rc;
1122         IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id);
1123
1124         iwl3945_nic_set_pwr_src(priv, 1);
1125         spin_lock_irqsave(&priv->lock, flags);
1126
1127         if (rev_id & PCI_CFG_REV_ID_BIT_RTP)
1128                 IWL_DEBUG_INFO("RTP type \n");
1129         else if (rev_id & PCI_CFG_REV_ID_BIT_BASIC_SKU) {
1130                 IWL_DEBUG_INFO("3945 RADIO-MB type\n");
1131                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1132                             CSR39_HW_IF_CONFIG_REG_BIT_3945_MB);
1133         } else {
1134                 IWL_DEBUG_INFO("3945 RADIO-MM type\n");
1135                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1136                             CSR39_HW_IF_CONFIG_REG_BIT_3945_MM);
1137         }
1138
1139         if (EEPROM_SKU_CAP_OP_MODE_MRC == priv->eeprom.sku_cap) {
1140                 IWL_DEBUG_INFO("SKU OP mode is mrc\n");
1141                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1142                             CSR39_HW_IF_CONFIG_REG_BIT_SKU_MRC);
1143         } else
1144                 IWL_DEBUG_INFO("SKU OP mode is basic\n");
1145
1146         if ((priv->eeprom.board_revision & 0xF0) == 0xD0) {
1147                 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
1148                                priv->eeprom.board_revision);
1149                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1150                             CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
1151         } else {
1152                 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
1153                                priv->eeprom.board_revision);
1154                 iwl3945_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
1155                               CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
1156         }
1157
1158         if (priv->eeprom.almgor_m_version <= 1) {
1159                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1160                             CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A);
1161                 IWL_DEBUG_INFO("Card M type A version is 0x%X\n",
1162                                priv->eeprom.almgor_m_version);
1163         } else {
1164                 IWL_DEBUG_INFO("Card M type B version is 0x%X\n",
1165                                priv->eeprom.almgor_m_version);
1166                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1167                             CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B);
1168         }
1169         spin_unlock_irqrestore(&priv->lock, flags);
1170
1171         if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
1172                 IWL_DEBUG_RF_KILL("SW RF KILL supported in EEPROM.\n");
1173
1174         if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
1175                 IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n");
1176
1177         /* Allocate the RX queue, or reset if it is already allocated */
1178         if (!rxq->bd) {
1179                 rc = iwl3945_rx_queue_alloc(priv);
1180                 if (rc) {
1181                         IWL_ERROR("Unable to initialize Rx queue\n");
1182                         return -ENOMEM;
1183                 }
1184         } else
1185                 iwl3945_rx_queue_reset(priv, rxq);
1186
1187         iwl3945_rx_replenish(priv);
1188
1189         iwl3945_rx_init(priv, rxq);
1190
1191         spin_lock_irqsave(&priv->lock, flags);
1192
1193         /* Look at using this instead:
1194         rxq->need_update = 1;
1195         iwl3945_rx_queue_update_write_ptr(priv, rxq);
1196         */
1197
1198         rc = iwl3945_grab_nic_access(priv);
1199         if (rc) {
1200                 spin_unlock_irqrestore(&priv->lock, flags);
1201                 return rc;
1202         }
1203         iwl3945_write_direct32(priv, FH39_RCSR_WPTR(0), rxq->write & ~7);
1204         iwl3945_release_nic_access(priv);
1205
1206         spin_unlock_irqrestore(&priv->lock, flags);
1207
1208         rc = iwl3945_txq_ctx_reset(priv);
1209         if (rc)
1210                 return rc;
1211
1212         set_bit(STATUS_INIT, &priv->status);
1213
1214         return 0;
1215 }
1216
1217 /**
1218  * iwl3945_hw_txq_ctx_free - Free TXQ Context
1219  *
1220  * Destroy all TX DMA queues and structures
1221  */
1222 void iwl3945_hw_txq_ctx_free(struct iwl3945_priv *priv)
1223 {
1224         int txq_id;
1225
1226         /* Tx queues */
1227         for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++)
1228                 iwl3945_tx_queue_free(priv, &priv->txq[txq_id]);
1229 }
1230
1231 void iwl3945_hw_txq_ctx_stop(struct iwl3945_priv *priv)
1232 {
1233         int txq_id;
1234         unsigned long flags;
1235
1236         spin_lock_irqsave(&priv->lock, flags);
1237         if (iwl3945_grab_nic_access(priv)) {
1238                 spin_unlock_irqrestore(&priv->lock, flags);
1239                 iwl3945_hw_txq_ctx_free(priv);
1240                 return;
1241         }
1242
1243         /* stop SCD */
1244         iwl3945_write_prph(priv, ALM_SCD_MODE_REG, 0);
1245
1246         /* reset TFD queues */
1247         for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++) {
1248                 iwl3945_write_direct32(priv, FH39_TCSR_CONFIG(txq_id), 0x0);
1249                 iwl3945_poll_direct_bit(priv, FH39_TSSR_TX_STATUS,
1250                                 FH39_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(txq_id),
1251                                 1000);
1252         }
1253
1254         iwl3945_release_nic_access(priv);
1255         spin_unlock_irqrestore(&priv->lock, flags);
1256
1257         iwl3945_hw_txq_ctx_free(priv);
1258 }
1259
1260 int iwl3945_hw_nic_stop_master(struct iwl3945_priv *priv)
1261 {
1262         int rc = 0;
1263         u32 reg_val;
1264         unsigned long flags;
1265
1266         spin_lock_irqsave(&priv->lock, flags);
1267
1268         /* set stop master bit */
1269         iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1270
1271         reg_val = iwl3945_read32(priv, CSR_GP_CNTRL);
1272
1273         if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
1274             (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
1275                 IWL_DEBUG_INFO("Card in power save, master is already "
1276                                "stopped\n");
1277         else {
1278                 rc = iwl3945_poll_direct_bit(priv, CSR_RESET,
1279                                   CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
1280                 if (rc < 0) {
1281                         spin_unlock_irqrestore(&priv->lock, flags);
1282                         return rc;
1283                 }
1284         }
1285
1286         spin_unlock_irqrestore(&priv->lock, flags);
1287         IWL_DEBUG_INFO("stop master\n");
1288
1289         return rc;
1290 }
1291
1292 int iwl3945_hw_nic_reset(struct iwl3945_priv *priv)
1293 {
1294         int rc;
1295         unsigned long flags;
1296
1297         iwl3945_hw_nic_stop_master(priv);
1298
1299         spin_lock_irqsave(&priv->lock, flags);
1300
1301         iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1302
1303         iwl3945_poll_direct_bit(priv, CSR_GP_CNTRL,
1304                          CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1305
1306         rc = iwl3945_grab_nic_access(priv);
1307         if (!rc) {
1308                 iwl3945_write_prph(priv, APMG_CLK_CTRL_REG,
1309                                          APMG_CLK_VAL_BSM_CLK_RQT);
1310
1311                 udelay(10);
1312
1313                 iwl3945_set_bit(priv, CSR_GP_CNTRL,
1314                             CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1315
1316                 iwl3945_write_prph(priv, APMG_RTC_INT_MSK_REG, 0x0);
1317                 iwl3945_write_prph(priv, APMG_RTC_INT_STT_REG,
1318                                         0xFFFFFFFF);
1319
1320                 /* enable DMA */
1321                 iwl3945_write_prph(priv, APMG_CLK_EN_REG,
1322                                          APMG_CLK_VAL_DMA_CLK_RQT |
1323                                          APMG_CLK_VAL_BSM_CLK_RQT);
1324                 udelay(10);
1325
1326                 iwl3945_set_bits_prph(priv, APMG_PS_CTRL_REG,
1327                                 APMG_PS_CTRL_VAL_RESET_REQ);
1328                 udelay(5);
1329                 iwl3945_clear_bits_prph(priv, APMG_PS_CTRL_REG,
1330                                 APMG_PS_CTRL_VAL_RESET_REQ);
1331                 iwl3945_release_nic_access(priv);
1332         }
1333
1334         /* Clear the 'host command active' bit... */
1335         clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1336
1337         wake_up_interruptible(&priv->wait_command_queue);
1338         spin_unlock_irqrestore(&priv->lock, flags);
1339
1340         return rc;
1341 }
1342
1343 /**
1344  * iwl3945_hw_reg_adjust_power_by_temp
1345  * return index delta into power gain settings table
1346 */
1347 static int iwl3945_hw_reg_adjust_power_by_temp(int new_reading, int old_reading)
1348 {
1349         return (new_reading - old_reading) * (-11) / 100;
1350 }
1351
1352 /**
1353  * iwl3945_hw_reg_temp_out_of_range - Keep temperature in sane range
1354  */
1355 static inline int iwl3945_hw_reg_temp_out_of_range(int temperature)
1356 {
1357         return ((temperature < -260) || (temperature > 25)) ? 1 : 0;
1358 }
1359
1360 int iwl3945_hw_get_temperature(struct iwl3945_priv *priv)
1361 {
1362         return iwl3945_read32(priv, CSR_UCODE_DRV_GP2);
1363 }
1364
1365 /**
1366  * iwl3945_hw_reg_txpower_get_temperature
1367  * get the current temperature by reading from NIC
1368 */
1369 static int iwl3945_hw_reg_txpower_get_temperature(struct iwl3945_priv *priv)
1370 {
1371         int temperature;
1372
1373         temperature = iwl3945_hw_get_temperature(priv);
1374
1375         /* driver's okay range is -260 to +25.
1376          *   human readable okay range is 0 to +285 */
1377         IWL_DEBUG_INFO("Temperature: %d\n", temperature + IWL_TEMP_CONVERT);
1378
1379         /* handle insane temp reading */
1380         if (iwl3945_hw_reg_temp_out_of_range(temperature)) {
1381                 IWL_ERROR("Error bad temperature value  %d\n", temperature);
1382
1383                 /* if really really hot(?),
1384                  *   substitute the 3rd band/group's temp measured at factory */
1385                 if (priv->last_temperature > 100)
1386                         temperature = priv->eeprom.groups[2].temperature;
1387                 else /* else use most recent "sane" value from driver */
1388                         temperature = priv->last_temperature;
1389         }
1390
1391         return temperature;     /* raw, not "human readable" */
1392 }
1393
1394 /* Adjust Txpower only if temperature variance is greater than threshold.
1395  *
1396  * Both are lower than older versions' 9 degrees */
1397 #define IWL_TEMPERATURE_LIMIT_TIMER   6
1398
1399 /**
1400  * is_temp_calib_needed - determines if new calibration is needed
1401  *
1402  * records new temperature in tx_mgr->temperature.
1403  * replaces tx_mgr->last_temperature *only* if calib needed
1404  *    (assumes caller will actually do the calibration!). */
1405 static int is_temp_calib_needed(struct iwl3945_priv *priv)
1406 {
1407         int temp_diff;
1408
1409         priv->temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
1410         temp_diff = priv->temperature - priv->last_temperature;
1411
1412         /* get absolute value */
1413         if (temp_diff < 0) {
1414                 IWL_DEBUG_POWER("Getting cooler, delta %d,\n", temp_diff);
1415                 temp_diff = -temp_diff;
1416         } else if (temp_diff == 0)
1417                 IWL_DEBUG_POWER("Same temp,\n");
1418         else
1419                 IWL_DEBUG_POWER("Getting warmer, delta %d,\n", temp_diff);
1420
1421         /* if we don't need calibration, *don't* update last_temperature */
1422         if (temp_diff < IWL_TEMPERATURE_LIMIT_TIMER) {
1423                 IWL_DEBUG_POWER("Timed thermal calib not needed\n");
1424                 return 0;
1425         }
1426
1427         IWL_DEBUG_POWER("Timed thermal calib needed\n");
1428
1429         /* assume that caller will actually do calib ...
1430          *   update the "last temperature" value */
1431         priv->last_temperature = priv->temperature;
1432         return 1;
1433 }
1434
1435 #define IWL_MAX_GAIN_ENTRIES 78
1436 #define IWL_CCK_FROM_OFDM_POWER_DIFF  -5
1437 #define IWL_CCK_FROM_OFDM_INDEX_DIFF (10)
1438
1439 /* radio and DSP power table, each step is 1/2 dB.
1440  * 1st number is for RF analog gain, 2nd number is for DSP pre-DAC gain. */
1441 static struct iwl3945_tx_power power_gain_table[2][IWL_MAX_GAIN_ENTRIES] = {
1442         {
1443          {251, 127},            /* 2.4 GHz, highest power */
1444          {251, 127},
1445          {251, 127},
1446          {251, 127},
1447          {251, 125},
1448          {251, 110},
1449          {251, 105},
1450          {251, 98},
1451          {187, 125},
1452          {187, 115},
1453          {187, 108},
1454          {187, 99},
1455          {243, 119},
1456          {243, 111},
1457          {243, 105},
1458          {243, 97},
1459          {243, 92},
1460          {211, 106},
1461          {211, 100},
1462          {179, 120},
1463          {179, 113},
1464          {179, 107},
1465          {147, 125},
1466          {147, 119},
1467          {147, 112},
1468          {147, 106},
1469          {147, 101},
1470          {147, 97},
1471          {147, 91},
1472          {115, 107},
1473          {235, 121},
1474          {235, 115},
1475          {235, 109},
1476          {203, 127},
1477          {203, 121},
1478          {203, 115},
1479          {203, 108},
1480          {203, 102},
1481          {203, 96},
1482          {203, 92},
1483          {171, 110},
1484          {171, 104},
1485          {171, 98},
1486          {139, 116},
1487          {227, 125},
1488          {227, 119},
1489          {227, 113},
1490          {227, 107},
1491          {227, 101},
1492          {227, 96},
1493          {195, 113},
1494          {195, 106},
1495          {195, 102},
1496          {195, 95},
1497          {163, 113},
1498          {163, 106},
1499          {163, 102},
1500          {163, 95},
1501          {131, 113},
1502          {131, 106},
1503          {131, 102},
1504          {131, 95},
1505          {99, 113},
1506          {99, 106},
1507          {99, 102},
1508          {99, 95},
1509          {67, 113},
1510          {67, 106},
1511          {67, 102},
1512          {67, 95},
1513          {35, 113},
1514          {35, 106},
1515          {35, 102},
1516          {35, 95},
1517          {3, 113},
1518          {3, 106},
1519          {3, 102},
1520          {3, 95} },             /* 2.4 GHz, lowest power */
1521         {
1522          {251, 127},            /* 5.x GHz, highest power */
1523          {251, 120},
1524          {251, 114},
1525          {219, 119},
1526          {219, 101},
1527          {187, 113},
1528          {187, 102},
1529          {155, 114},
1530          {155, 103},
1531          {123, 117},
1532          {123, 107},
1533          {123, 99},
1534          {123, 92},
1535          {91, 108},
1536          {59, 125},
1537          {59, 118},
1538          {59, 109},
1539          {59, 102},
1540          {59, 96},
1541          {59, 90},
1542          {27, 104},
1543          {27, 98},
1544          {27, 92},
1545          {115, 118},
1546          {115, 111},
1547          {115, 104},
1548          {83, 126},
1549          {83, 121},
1550          {83, 113},
1551          {83, 105},
1552          {83, 99},
1553          {51, 118},
1554          {51, 111},
1555          {51, 104},
1556          {51, 98},
1557          {19, 116},
1558          {19, 109},
1559          {19, 102},
1560          {19, 98},
1561          {19, 93},
1562          {171, 113},
1563          {171, 107},
1564          {171, 99},
1565          {139, 120},
1566          {139, 113},
1567          {139, 107},
1568          {139, 99},
1569          {107, 120},
1570          {107, 113},
1571          {107, 107},
1572          {107, 99},
1573          {75, 120},
1574          {75, 113},
1575          {75, 107},
1576          {75, 99},
1577          {43, 120},
1578          {43, 113},
1579          {43, 107},
1580          {43, 99},
1581          {11, 120},
1582          {11, 113},
1583          {11, 107},
1584          {11, 99},
1585          {131, 107},
1586          {131, 99},
1587          {99, 120},
1588          {99, 113},
1589          {99, 107},
1590          {99, 99},
1591          {67, 120},
1592          {67, 113},
1593          {67, 107},
1594          {67, 99},
1595          {35, 120},
1596          {35, 113},
1597          {35, 107},
1598          {35, 99},
1599          {3, 120} }             /* 5.x GHz, lowest power */
1600 };
1601
1602 static inline u8 iwl3945_hw_reg_fix_power_index(int index)
1603 {
1604         if (index < 0)
1605                 return 0;
1606         if (index >= IWL_MAX_GAIN_ENTRIES)
1607                 return IWL_MAX_GAIN_ENTRIES - 1;
1608         return (u8) index;
1609 }
1610
1611 /* Kick off thermal recalibration check every 60 seconds */
1612 #define REG_RECALIB_PERIOD (60)
1613
1614 /**
1615  * iwl3945_hw_reg_set_scan_power - Set Tx power for scan probe requests
1616  *
1617  * Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK)
1618  * or 6 Mbit (OFDM) rates.
1619  */
1620 static void iwl3945_hw_reg_set_scan_power(struct iwl3945_priv *priv, u32 scan_tbl_index,
1621                                s32 rate_index, const s8 *clip_pwrs,
1622                                struct iwl3945_channel_info *ch_info,
1623                                int band_index)
1624 {
1625         struct iwl3945_scan_power_info *scan_power_info;
1626         s8 power;
1627         u8 power_index;
1628
1629         scan_power_info = &ch_info->scan_pwr_info[scan_tbl_index];
1630
1631         /* use this channel group's 6Mbit clipping/saturation pwr,
1632          *   but cap at regulatory scan power restriction (set during init
1633          *   based on eeprom channel data) for this channel.  */
1634         power = min(ch_info->scan_power, clip_pwrs[IWL_RATE_6M_INDEX_TABLE]);
1635
1636         /* further limit to user's max power preference.
1637          * FIXME:  Other spectrum management power limitations do not
1638          *   seem to apply?? */
1639         power = min(power, priv->user_txpower_limit);
1640         scan_power_info->requested_power = power;
1641
1642         /* find difference between new scan *power* and current "normal"
1643          *   Tx *power* for 6Mb.  Use this difference (x2) to adjust the
1644          *   current "normal" temperature-compensated Tx power *index* for
1645          *   this rate (1Mb or 6Mb) to yield new temp-compensated scan power
1646          *   *index*. */
1647         power_index = ch_info->power_info[rate_index].power_table_index
1648             - (power - ch_info->power_info
1649                [IWL_RATE_6M_INDEX_TABLE].requested_power) * 2;
1650
1651         /* store reference index that we use when adjusting *all* scan
1652          *   powers.  So we can accommodate user (all channel) or spectrum
1653          *   management (single channel) power changes "between" temperature
1654          *   feedback compensation procedures.
1655          * don't force fit this reference index into gain table; it may be a
1656          *   negative number.  This will help avoid errors when we're at
1657          *   the lower bounds (highest gains, for warmest temperatures)
1658          *   of the table. */
1659
1660         /* don't exceed table bounds for "real" setting */
1661         power_index = iwl3945_hw_reg_fix_power_index(power_index);
1662
1663         scan_power_info->power_table_index = power_index;
1664         scan_power_info->tpc.tx_gain =
1665             power_gain_table[band_index][power_index].tx_gain;
1666         scan_power_info->tpc.dsp_atten =
1667             power_gain_table[band_index][power_index].dsp_atten;
1668 }
1669
1670 /**
1671  * iwl3945_hw_reg_send_txpower - fill in Tx Power command with gain settings
1672  *
1673  * Configures power settings for all rates for the current channel,
1674  * using values from channel info struct, and send to NIC
1675  */
1676 int iwl3945_hw_reg_send_txpower(struct iwl3945_priv *priv)
1677 {
1678         int rate_idx, i;
1679         const struct iwl3945_channel_info *ch_info = NULL;
1680         struct iwl3945_txpowertable_cmd txpower = {
1681                 .channel = priv->active_rxon.channel,
1682         };
1683
1684         txpower.band = (priv->band == IEEE80211_BAND_5GHZ) ? 0 : 1;
1685         ch_info = iwl3945_get_channel_info(priv,
1686                                        priv->band,
1687                                        le16_to_cpu(priv->active_rxon.channel));
1688         if (!ch_info) {
1689                 IWL_ERROR
1690                     ("Failed to get channel info for channel %d [%d]\n",
1691                      le16_to_cpu(priv->active_rxon.channel), priv->band);
1692                 return -EINVAL;
1693         }
1694
1695         if (!is_channel_valid(ch_info)) {
1696                 IWL_DEBUG_POWER("Not calling TX_PWR_TABLE_CMD on "
1697                                 "non-Tx channel.\n");
1698                 return 0;
1699         }
1700
1701         /* fill cmd with power settings for all rates for current channel */
1702         /* Fill OFDM rate */
1703         for (rate_idx = IWL_FIRST_OFDM_RATE, i = 0;
1704              rate_idx <= IWL_LAST_OFDM_RATE; rate_idx++, i++) {
1705
1706                 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1707                 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1708
1709                 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1710                                 le16_to_cpu(txpower.channel),
1711                                 txpower.band,
1712                                 txpower.power[i].tpc.tx_gain,
1713                                 txpower.power[i].tpc.dsp_atten,
1714                                 txpower.power[i].rate);
1715         }
1716         /* Fill CCK rates */
1717         for (rate_idx = IWL_FIRST_CCK_RATE;
1718              rate_idx <= IWL_LAST_CCK_RATE; rate_idx++, i++) {
1719                 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1720                 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1721
1722                 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1723                                 le16_to_cpu(txpower.channel),
1724                                 txpower.band,
1725                                 txpower.power[i].tpc.tx_gain,
1726                                 txpower.power[i].tpc.dsp_atten,
1727                                 txpower.power[i].rate);
1728         }
1729
1730         return iwl3945_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD,
1731                         sizeof(struct iwl3945_txpowertable_cmd), &txpower);
1732
1733 }
1734
1735 /**
1736  * iwl3945_hw_reg_set_new_power - Configures power tables at new levels
1737  * @ch_info: Channel to update.  Uses power_info.requested_power.
1738  *
1739  * Replace requested_power and base_power_index ch_info fields for
1740  * one channel.
1741  *
1742  * Called if user or spectrum management changes power preferences.
1743  * Takes into account h/w and modulation limitations (clip power).
1744  *
1745  * This does *not* send anything to NIC, just sets up ch_info for one channel.
1746  *
1747  * NOTE: reg_compensate_for_temperature_dif() *must* be run after this to
1748  *       properly fill out the scan powers, and actual h/w gain settings,
1749  *       and send changes to NIC
1750  */
1751 static int iwl3945_hw_reg_set_new_power(struct iwl3945_priv *priv,
1752                              struct iwl3945_channel_info *ch_info)
1753 {
1754         struct iwl3945_channel_power_info *power_info;
1755         int power_changed = 0;
1756         int i;
1757         const s8 *clip_pwrs;
1758         int power;
1759
1760         /* Get this chnlgrp's rate-to-max/clip-powers table */
1761         clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1762
1763         /* Get this channel's rate-to-current-power settings table */
1764         power_info = ch_info->power_info;
1765
1766         /* update OFDM Txpower settings */
1767         for (i = IWL_RATE_6M_INDEX_TABLE; i <= IWL_RATE_54M_INDEX_TABLE;
1768              i++, ++power_info) {
1769                 int delta_idx;
1770
1771                 /* limit new power to be no more than h/w capability */
1772                 power = min(ch_info->curr_txpow, clip_pwrs[i]);
1773                 if (power == power_info->requested_power)
1774                         continue;
1775
1776                 /* find difference between old and new requested powers,
1777                  *    update base (non-temp-compensated) power index */
1778                 delta_idx = (power - power_info->requested_power) * 2;
1779                 power_info->base_power_index -= delta_idx;
1780
1781                 /* save new requested power value */
1782                 power_info->requested_power = power;
1783
1784                 power_changed = 1;
1785         }
1786
1787         /* update CCK Txpower settings, based on OFDM 12M setting ...
1788          *    ... all CCK power settings for a given channel are the *same*. */
1789         if (power_changed) {
1790                 power =
1791                     ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1792                     requested_power + IWL_CCK_FROM_OFDM_POWER_DIFF;
1793
1794                 /* do all CCK rates' iwl3945_channel_power_info structures */
1795                 for (i = IWL_RATE_1M_INDEX_TABLE; i <= IWL_RATE_11M_INDEX_TABLE; i++) {
1796                         power_info->requested_power = power;
1797                         power_info->base_power_index =
1798                             ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1799                             base_power_index + IWL_CCK_FROM_OFDM_INDEX_DIFF;
1800                         ++power_info;
1801                 }
1802         }
1803
1804         return 0;
1805 }
1806
1807 /**
1808  * iwl3945_hw_reg_get_ch_txpower_limit - returns new power limit for channel
1809  *
1810  * NOTE: Returned power limit may be less (but not more) than requested,
1811  *       based strictly on regulatory (eeprom and spectrum mgt) limitations
1812  *       (no consideration for h/w clipping limitations).
1813  */
1814 static int iwl3945_hw_reg_get_ch_txpower_limit(struct iwl3945_channel_info *ch_info)
1815 {
1816         s8 max_power;
1817
1818 #if 0
1819         /* if we're using TGd limits, use lower of TGd or EEPROM */
1820         if (ch_info->tgd_data.max_power != 0)
1821                 max_power = min(ch_info->tgd_data.max_power,
1822                                 ch_info->eeprom.max_power_avg);
1823
1824         /* else just use EEPROM limits */
1825         else
1826 #endif
1827                 max_power = ch_info->eeprom.max_power_avg;
1828
1829         return min(max_power, ch_info->max_power_avg);
1830 }
1831
1832 /**
1833  * iwl3945_hw_reg_comp_txpower_temp - Compensate for temperature
1834  *
1835  * Compensate txpower settings of *all* channels for temperature.
1836  * This only accounts for the difference between current temperature
1837  *   and the factory calibration temperatures, and bases the new settings
1838  *   on the channel's base_power_index.
1839  *
1840  * If RxOn is "associated", this sends the new Txpower to NIC!
1841  */
1842 static int iwl3945_hw_reg_comp_txpower_temp(struct iwl3945_priv *priv)
1843 {
1844         struct iwl3945_channel_info *ch_info = NULL;
1845         int delta_index;
1846         const s8 *clip_pwrs; /* array of h/w max power levels for each rate */
1847         u8 a_band;
1848         u8 rate_index;
1849         u8 scan_tbl_index;
1850         u8 i;
1851         int ref_temp;
1852         int temperature = priv->temperature;
1853
1854         /* set up new Tx power info for each and every channel, 2.4 and 5.x */
1855         for (i = 0; i < priv->channel_count; i++) {
1856                 ch_info = &priv->channel_info[i];
1857                 a_band = is_channel_a_band(ch_info);
1858
1859                 /* Get this chnlgrp's factory calibration temperature */
1860                 ref_temp = (s16)priv->eeprom.groups[ch_info->group_index].
1861                     temperature;
1862
1863                 /* get power index adjustment based on current and factory
1864                  * temps */
1865                 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
1866                                                               ref_temp);
1867
1868                 /* set tx power value for all rates, OFDM and CCK */
1869                 for (rate_index = 0; rate_index < IWL_RATE_COUNT;
1870                      rate_index++) {
1871                         int power_idx =
1872                             ch_info->power_info[rate_index].base_power_index;
1873
1874                         /* temperature compensate */
1875                         power_idx += delta_index;
1876
1877                         /* stay within table range */
1878                         power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
1879                         ch_info->power_info[rate_index].
1880                             power_table_index = (u8) power_idx;
1881                         ch_info->power_info[rate_index].tpc =
1882                             power_gain_table[a_band][power_idx];
1883                 }
1884
1885                 /* Get this chnlgrp's rate-to-max/clip-powers table */
1886                 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1887
1888                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
1889                 for (scan_tbl_index = 0;
1890                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
1891                         s32 actual_index = (scan_tbl_index == 0) ?
1892                             IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
1893                         iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
1894                                            actual_index, clip_pwrs,
1895                                            ch_info, a_band);
1896                 }
1897         }
1898
1899         /* send Txpower command for current channel to ucode */
1900         return iwl3945_hw_reg_send_txpower(priv);
1901 }
1902
1903 int iwl3945_hw_reg_set_txpower(struct iwl3945_priv *priv, s8 power)
1904 {
1905         struct iwl3945_channel_info *ch_info;
1906         s8 max_power;
1907         u8 a_band;
1908         u8 i;
1909
1910         if (priv->user_txpower_limit == power) {
1911                 IWL_DEBUG_POWER("Requested Tx power same as current "
1912                                 "limit: %ddBm.\n", power);
1913                 return 0;
1914         }
1915
1916         IWL_DEBUG_POWER("Setting upper limit clamp to %ddBm.\n", power);
1917         priv->user_txpower_limit = power;
1918
1919         /* set up new Tx powers for each and every channel, 2.4 and 5.x */
1920
1921         for (i = 0; i < priv->channel_count; i++) {
1922                 ch_info = &priv->channel_info[i];
1923                 a_band = is_channel_a_band(ch_info);
1924
1925                 /* find minimum power of all user and regulatory constraints
1926                  *    (does not consider h/w clipping limitations) */
1927                 max_power = iwl3945_hw_reg_get_ch_txpower_limit(ch_info);
1928                 max_power = min(power, max_power);
1929                 if (max_power != ch_info->curr_txpow) {
1930                         ch_info->curr_txpow = max_power;
1931
1932                         /* this considers the h/w clipping limitations */
1933                         iwl3945_hw_reg_set_new_power(priv, ch_info);
1934                 }
1935         }
1936
1937         /* update txpower settings for all channels,
1938          *   send to NIC if associated. */
1939         is_temp_calib_needed(priv);
1940         iwl3945_hw_reg_comp_txpower_temp(priv);
1941
1942         return 0;
1943 }
1944
1945 /* will add 3945 channel switch cmd handling later */
1946 int iwl3945_hw_channel_switch(struct iwl3945_priv *priv, u16 channel)
1947 {
1948         return 0;
1949 }
1950
1951 /**
1952  * iwl3945_reg_txpower_periodic -  called when time to check our temperature.
1953  *
1954  * -- reset periodic timer
1955  * -- see if temp has changed enough to warrant re-calibration ... if so:
1956  *     -- correct coeffs for temp (can reset temp timer)
1957  *     -- save this temp as "last",
1958  *     -- send new set of gain settings to NIC
1959  * NOTE:  This should continue working, even when we're not associated,
1960  *   so we can keep our internal table of scan powers current. */
1961 void iwl3945_reg_txpower_periodic(struct iwl3945_priv *priv)
1962 {
1963         /* This will kick in the "brute force"
1964          * iwl3945_hw_reg_comp_txpower_temp() below */
1965         if (!is_temp_calib_needed(priv))
1966                 goto reschedule;
1967
1968         /* Set up a new set of temp-adjusted TxPowers, send to NIC.
1969          * This is based *only* on current temperature,
1970          * ignoring any previous power measurements */
1971         iwl3945_hw_reg_comp_txpower_temp(priv);
1972
1973  reschedule:
1974         queue_delayed_work(priv->workqueue,
1975                            &priv->thermal_periodic, REG_RECALIB_PERIOD * HZ);
1976 }
1977
1978 static void iwl3945_bg_reg_txpower_periodic(struct work_struct *work)
1979 {
1980         struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv,
1981                                              thermal_periodic.work);
1982
1983         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1984                 return;
1985
1986         mutex_lock(&priv->mutex);
1987         iwl3945_reg_txpower_periodic(priv);
1988         mutex_unlock(&priv->mutex);
1989 }
1990
1991 /**
1992  * iwl3945_hw_reg_get_ch_grp_index - find the channel-group index (0-4)
1993  *                                 for the channel.
1994  *
1995  * This function is used when initializing channel-info structs.
1996  *
1997  * NOTE: These channel groups do *NOT* match the bands above!
1998  *       These channel groups are based on factory-tested channels;
1999  *       on A-band, EEPROM's "group frequency" entries represent the top
2000  *       channel in each group 1-4.  Group 5 All B/G channels are in group 0.
2001  */
2002 static u16 iwl3945_hw_reg_get_ch_grp_index(struct iwl3945_priv *priv,
2003                                        const struct iwl3945_channel_info *ch_info)
2004 {
2005         struct iwl3945_eeprom_txpower_group *ch_grp = &priv->eeprom.groups[0];
2006         u8 group;
2007         u16 group_index = 0;    /* based on factory calib frequencies */
2008         u8 grp_channel;
2009
2010         /* Find the group index for the channel ... don't use index 1(?) */
2011         if (is_channel_a_band(ch_info)) {
2012                 for (group = 1; group < 5; group++) {
2013                         grp_channel = ch_grp[group].group_channel;
2014                         if (ch_info->channel <= grp_channel) {
2015                                 group_index = group;
2016                                 break;
2017                         }
2018                 }
2019                 /* group 4 has a few channels *above* its factory cal freq */
2020                 if (group == 5)
2021                         group_index = 4;
2022         } else
2023                 group_index = 0;        /* 2.4 GHz, group 0 */
2024
2025         IWL_DEBUG_POWER("Chnl %d mapped to grp %d\n", ch_info->channel,
2026                         group_index);
2027         return group_index;
2028 }
2029
2030 /**
2031  * iwl3945_hw_reg_get_matched_power_index - Interpolate to get nominal index
2032  *
2033  * Interpolate to get nominal (i.e. at factory calibration temperature) index
2034  *   into radio/DSP gain settings table for requested power.
2035  */
2036 static int iwl3945_hw_reg_get_matched_power_index(struct iwl3945_priv *priv,
2037                                        s8 requested_power,
2038                                        s32 setting_index, s32 *new_index)
2039 {
2040         const struct iwl3945_eeprom_txpower_group *chnl_grp = NULL;
2041         s32 index0, index1;
2042         s32 power = 2 * requested_power;
2043         s32 i;
2044         const struct iwl3945_eeprom_txpower_sample *samples;
2045         s32 gains0, gains1;
2046         s32 res;
2047         s32 denominator;
2048
2049         chnl_grp = &priv->eeprom.groups[setting_index];
2050         samples = chnl_grp->samples;
2051         for (i = 0; i < 5; i++) {
2052                 if (power == samples[i].power) {
2053                         *new_index = samples[i].gain_index;
2054                         return 0;
2055                 }
2056         }
2057
2058         if (power > samples[1].power) {
2059                 index0 = 0;
2060                 index1 = 1;
2061         } else if (power > samples[2].power) {
2062                 index0 = 1;
2063                 index1 = 2;
2064         } else if (power > samples[3].power) {
2065                 index0 = 2;
2066                 index1 = 3;
2067         } else {
2068                 index0 = 3;
2069                 index1 = 4;
2070         }
2071
2072         denominator = (s32) samples[index1].power - (s32) samples[index0].power;
2073         if (denominator == 0)
2074                 return -EINVAL;
2075         gains0 = (s32) samples[index0].gain_index * (1 << 19);
2076         gains1 = (s32) samples[index1].gain_index * (1 << 19);
2077         res = gains0 + (gains1 - gains0) *
2078             ((s32) power - (s32) samples[index0].power) / denominator +
2079             (1 << 18);
2080         *new_index = res >> 19;
2081         return 0;
2082 }
2083
2084 static void iwl3945_hw_reg_init_channel_groups(struct iwl3945_priv *priv)
2085 {
2086         u32 i;
2087         s32 rate_index;
2088         const struct iwl3945_eeprom_txpower_group *group;
2089
2090         IWL_DEBUG_POWER("Initializing factory calib info from EEPROM\n");
2091
2092         for (i = 0; i < IWL_NUM_TX_CALIB_GROUPS; i++) {
2093                 s8 *clip_pwrs;  /* table of power levels for each rate */
2094                 s8 satur_pwr;   /* saturation power for each chnl group */
2095                 group = &priv->eeprom.groups[i];
2096
2097                 /* sanity check on factory saturation power value */
2098                 if (group->saturation_power < 40) {
2099                         IWL_WARNING("Error: saturation power is %d, "
2100                                     "less than minimum expected 40\n",
2101                                     group->saturation_power);
2102                         return;
2103                 }
2104
2105                 /*
2106                  * Derive requested power levels for each rate, based on
2107                  *   hardware capabilities (saturation power for band).
2108                  * Basic value is 3dB down from saturation, with further
2109                  *   power reductions for highest 3 data rates.  These
2110                  *   backoffs provide headroom for high rate modulation
2111                  *   power peaks, without too much distortion (clipping).
2112                  */
2113                 /* we'll fill in this array with h/w max power levels */
2114                 clip_pwrs = (s8 *) priv->clip_groups[i].clip_powers;
2115
2116                 /* divide factory saturation power by 2 to find -3dB level */
2117                 satur_pwr = (s8) (group->saturation_power >> 1);
2118
2119                 /* fill in channel group's nominal powers for each rate */
2120                 for (rate_index = 0;
2121                      rate_index < IWL_RATE_COUNT; rate_index++, clip_pwrs++) {
2122                         switch (rate_index) {
2123                         case IWL_RATE_36M_INDEX_TABLE:
2124                                 if (i == 0)     /* B/G */
2125                                         *clip_pwrs = satur_pwr;
2126                                 else    /* A */
2127                                         *clip_pwrs = satur_pwr - 5;
2128                                 break;
2129                         case IWL_RATE_48M_INDEX_TABLE:
2130                                 if (i == 0)
2131                                         *clip_pwrs = satur_pwr - 7;
2132                                 else
2133                                         *clip_pwrs = satur_pwr - 10;
2134                                 break;
2135                         case IWL_RATE_54M_INDEX_TABLE:
2136                                 if (i == 0)
2137                                         *clip_pwrs = satur_pwr - 9;
2138                                 else
2139                                         *clip_pwrs = satur_pwr - 12;
2140                                 break;
2141                         default:
2142                                 *clip_pwrs = satur_pwr;
2143                                 break;
2144                         }
2145                 }
2146         }
2147 }
2148
2149 /**
2150  * iwl3945_txpower_set_from_eeprom - Set channel power info based on EEPROM
2151  *
2152  * Second pass (during init) to set up priv->channel_info
2153  *
2154  * Set up Tx-power settings in our channel info database for each VALID
2155  * (for this geo/SKU) channel, at all Tx data rates, based on eeprom values
2156  * and current temperature.
2157  *
2158  * Since this is based on current temperature (at init time), these values may
2159  * not be valid for very long, but it gives us a starting/default point,
2160  * and allows us to active (i.e. using Tx) scan.
2161  *
2162  * This does *not* write values to NIC, just sets up our internal table.
2163  */
2164 int iwl3945_txpower_set_from_eeprom(struct iwl3945_priv *priv)
2165 {
2166         struct iwl3945_channel_info *ch_info = NULL;
2167         struct iwl3945_channel_power_info *pwr_info;
2168         int delta_index;
2169         u8 rate_index;
2170         u8 scan_tbl_index;
2171         const s8 *clip_pwrs;    /* array of power levels for each rate */
2172         u8 gain, dsp_atten;
2173         s8 power;
2174         u8 pwr_index, base_pwr_index, a_band;
2175         u8 i;
2176         int temperature;
2177
2178         /* save temperature reference,
2179          *   so we can determine next time to calibrate */
2180         temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
2181         priv->last_temperature = temperature;
2182
2183         iwl3945_hw_reg_init_channel_groups(priv);
2184
2185         /* initialize Tx power info for each and every channel, 2.4 and 5.x */
2186         for (i = 0, ch_info = priv->channel_info; i < priv->channel_count;
2187              i++, ch_info++) {
2188                 a_band = is_channel_a_band(ch_info);
2189                 if (!is_channel_valid(ch_info))
2190                         continue;
2191
2192                 /* find this channel's channel group (*not* "band") index */
2193                 ch_info->group_index =
2194                         iwl3945_hw_reg_get_ch_grp_index(priv, ch_info);
2195
2196                 /* Get this chnlgrp's rate->max/clip-powers table */
2197                 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
2198
2199                 /* calculate power index *adjustment* value according to
2200                  *  diff between current temperature and factory temperature */
2201                 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
2202                                 priv->eeprom.groups[ch_info->group_index].
2203                                 temperature);
2204
2205                 IWL_DEBUG_POWER("Delta index for channel %d: %d [%d]\n",
2206                                 ch_info->channel, delta_index, temperature +
2207                                 IWL_TEMP_CONVERT);
2208
2209                 /* set tx power value for all OFDM rates */
2210                 for (rate_index = 0; rate_index < IWL_OFDM_RATES;
2211                      rate_index++) {
2212                         s32 uninitialized_var(power_idx);
2213                         int rc;
2214
2215                         /* use channel group's clip-power table,
2216                          *   but don't exceed channel's max power */
2217                         s8 pwr = min(ch_info->max_power_avg,
2218                                      clip_pwrs[rate_index]);
2219
2220                         pwr_info = &ch_info->power_info[rate_index];
2221
2222                         /* get base (i.e. at factory-measured temperature)
2223                          *    power table index for this rate's power */
2224                         rc = iwl3945_hw_reg_get_matched_power_index(priv, pwr,
2225                                                          ch_info->group_index,
2226                                                          &power_idx);
2227                         if (rc) {
2228                                 IWL_ERROR("Invalid power index\n");
2229                                 return rc;
2230                         }
2231                         pwr_info->base_power_index = (u8) power_idx;
2232
2233                         /* temperature compensate */
2234                         power_idx += delta_index;
2235
2236                         /* stay within range of gain table */
2237                         power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
2238
2239                         /* fill 1 OFDM rate's iwl3945_channel_power_info struct */
2240                         pwr_info->requested_power = pwr;
2241                         pwr_info->power_table_index = (u8) power_idx;
2242                         pwr_info->tpc.tx_gain =
2243                             power_gain_table[a_band][power_idx].tx_gain;
2244                         pwr_info->tpc.dsp_atten =
2245                             power_gain_table[a_band][power_idx].dsp_atten;
2246                 }
2247
2248                 /* set tx power for CCK rates, based on OFDM 12 Mbit settings*/
2249                 pwr_info = &ch_info->power_info[IWL_RATE_12M_INDEX_TABLE];
2250                 power = pwr_info->requested_power +
2251                         IWL_CCK_FROM_OFDM_POWER_DIFF;
2252                 pwr_index = pwr_info->power_table_index +
2253                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2254                 base_pwr_index = pwr_info->base_power_index +
2255                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2256
2257                 /* stay within table range */
2258                 pwr_index = iwl3945_hw_reg_fix_power_index(pwr_index);
2259                 gain = power_gain_table[a_band][pwr_index].tx_gain;
2260                 dsp_atten = power_gain_table[a_band][pwr_index].dsp_atten;
2261
2262                 /* fill each CCK rate's iwl3945_channel_power_info structure
2263                  * NOTE:  All CCK-rate Txpwrs are the same for a given chnl!
2264                  * NOTE:  CCK rates start at end of OFDM rates! */
2265                 for (rate_index = 0;
2266                      rate_index < IWL_CCK_RATES; rate_index++) {
2267                         pwr_info = &ch_info->power_info[rate_index+IWL_OFDM_RATES];
2268                         pwr_info->requested_power = power;
2269                         pwr_info->power_table_index = pwr_index;
2270                         pwr_info->base_power_index = base_pwr_index;
2271                         pwr_info->tpc.tx_gain = gain;
2272                         pwr_info->tpc.dsp_atten = dsp_atten;
2273                 }
2274
2275                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2276                 for (scan_tbl_index = 0;
2277                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
2278                         s32 actual_index = (scan_tbl_index == 0) ?
2279                                 IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
2280                         iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
2281                                 actual_index, clip_pwrs, ch_info, a_band);
2282                 }
2283         }
2284
2285         return 0;
2286 }
2287
2288 int iwl3945_hw_rxq_stop(struct iwl3945_priv *priv)
2289 {
2290         int rc;
2291         unsigned long flags;
2292
2293         spin_lock_irqsave(&priv->lock, flags);
2294         rc = iwl3945_grab_nic_access(priv);
2295         if (rc) {
2296                 spin_unlock_irqrestore(&priv->lock, flags);
2297                 return rc;
2298         }
2299
2300         iwl3945_write_direct32(priv, FH39_RCSR_CONFIG(0), 0);
2301         rc = iwl3945_poll_direct_bit(priv, FH39_RSSR_STATUS,
2302                         FH39_RSSR_CHNL0_RX_STATUS_CHNL_IDLE, 1000);
2303         if (rc < 0)
2304                 IWL_ERROR("Can't stop Rx DMA.\n");
2305
2306         iwl3945_release_nic_access(priv);
2307         spin_unlock_irqrestore(&priv->lock, flags);
2308
2309         return 0;
2310 }
2311
2312 int iwl3945_hw_tx_queue_init(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
2313 {
2314         int rc;
2315         unsigned long flags;
2316         int txq_id = txq->q.id;
2317
2318         struct iwl3945_shared *shared_data = priv->hw_setting.shared_virt;
2319
2320         shared_data->tx_base_ptr[txq_id] = cpu_to_le32((u32)txq->q.dma_addr);
2321
2322         spin_lock_irqsave(&priv->lock, flags);
2323         rc = iwl3945_grab_nic_access(priv);
2324         if (rc) {
2325                 spin_unlock_irqrestore(&priv->lock, flags);
2326                 return rc;
2327         }
2328         iwl3945_write_direct32(priv, FH39_CBCC_CTRL(txq_id), 0);
2329         iwl3945_write_direct32(priv, FH39_CBCC_BASE(txq_id), 0);
2330
2331         iwl3945_write_direct32(priv, FH39_TCSR_CONFIG(txq_id),
2332                 FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT |
2333                 FH39_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF |
2334                 FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD |
2335                 FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL |
2336                 FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE);
2337         iwl3945_release_nic_access(priv);
2338
2339         /* fake read to flush all prev. writes */
2340         iwl3945_read32(priv, FH39_TSSR_CBB_BASE);
2341         spin_unlock_irqrestore(&priv->lock, flags);
2342
2343         return 0;
2344 }
2345
2346 int iwl3945_hw_get_rx_read(struct iwl3945_priv *priv)
2347 {
2348         struct iwl3945_shared *shared_data = priv->hw_setting.shared_virt;
2349
2350         return le32_to_cpu(shared_data->rx_read_ptr[0]);
2351 }
2352
2353 /**
2354  * iwl3945_init_hw_rate_table - Initialize the hardware rate fallback table
2355  */
2356 int iwl3945_init_hw_rate_table(struct iwl3945_priv *priv)
2357 {
2358         int rc, i, index, prev_index;
2359         struct iwl3945_rate_scaling_cmd rate_cmd = {
2360                 .reserved = {0, 0, 0},
2361         };
2362         struct iwl3945_rate_scaling_info *table = rate_cmd.table;
2363
2364         for (i = 0; i < ARRAY_SIZE(iwl3945_rates); i++) {
2365                 index = iwl3945_rates[i].table_rs_index;
2366
2367                 table[index].rate_n_flags =
2368                         iwl3945_hw_set_rate_n_flags(iwl3945_rates[i].plcp, 0);
2369                 table[index].try_cnt = priv->retry_rate;
2370                 prev_index = iwl3945_get_prev_ieee_rate(i);
2371                 table[index].next_rate_index =
2372                                 iwl3945_rates[prev_index].table_rs_index;
2373         }
2374
2375         switch (priv->band) {
2376         case IEEE80211_BAND_5GHZ:
2377                 IWL_DEBUG_RATE("Select A mode rate scale\n");
2378                 /* If one of the following CCK rates is used,
2379                  * have it fall back to the 6M OFDM rate */
2380                 for (i = IWL_RATE_1M_INDEX_TABLE;
2381                         i <= IWL_RATE_11M_INDEX_TABLE; i++)
2382                         table[i].next_rate_index =
2383                           iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2384
2385                 /* Don't fall back to CCK rates */
2386                 table[IWL_RATE_12M_INDEX_TABLE].next_rate_index =
2387                                                 IWL_RATE_9M_INDEX_TABLE;
2388
2389                 /* Don't drop out of OFDM rates */
2390                 table[IWL_RATE_6M_INDEX_TABLE].next_rate_index =
2391                     iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2392                 break;
2393
2394         case IEEE80211_BAND_2GHZ:
2395                 IWL_DEBUG_RATE("Select B/G mode rate scale\n");
2396                 /* If an OFDM rate is used, have it fall back to the
2397                  * 1M CCK rates */
2398
2399                 if (!(priv->sta_supp_rates & IWL_OFDM_RATES_MASK) &&
2400                     iwl3945_is_associated(priv)) {
2401
2402                         index = IWL_FIRST_CCK_RATE;
2403                         for (i = IWL_RATE_6M_INDEX_TABLE;
2404                              i <= IWL_RATE_54M_INDEX_TABLE; i++)
2405                                 table[i].next_rate_index =
2406                                         iwl3945_rates[index].table_rs_index;
2407
2408                         index = IWL_RATE_11M_INDEX_TABLE;
2409                         /* CCK shouldn't fall back to OFDM... */
2410                         table[index].next_rate_index = IWL_RATE_5M_INDEX_TABLE;
2411                 }
2412                 break;
2413
2414         default:
2415                 WARN_ON(1);
2416                 break;
2417         }
2418
2419         /* Update the rate scaling for control frame Tx */
2420         rate_cmd.table_id = 0;
2421         rc = iwl3945_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2422                               &rate_cmd);
2423         if (rc)
2424                 return rc;
2425
2426         /* Update the rate scaling for data frame Tx */
2427         rate_cmd.table_id = 1;
2428         return iwl3945_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2429                                 &rate_cmd);
2430 }
2431
2432 /* Called when initializing driver */
2433 int iwl3945_hw_set_hw_setting(struct iwl3945_priv *priv)
2434 {
2435         memset((void *)&priv->hw_setting, 0,
2436                sizeof(struct iwl3945_driver_hw_info));
2437
2438         priv->hw_setting.shared_virt =
2439             pci_alloc_consistent(priv->pci_dev,
2440                                  sizeof(struct iwl3945_shared),
2441                                  &priv->hw_setting.shared_phys);
2442
2443         if (!priv->hw_setting.shared_virt) {
2444                 IWL_ERROR("failed to allocate pci memory\n");
2445                 mutex_unlock(&priv->mutex);
2446                 return -ENOMEM;
2447         }
2448
2449         priv->hw_setting.rx_buf_size = IWL_RX_BUF_SIZE;
2450         priv->hw_setting.max_pkt_size = 2342;
2451         priv->hw_setting.tx_cmd_len = sizeof(struct iwl3945_tx_cmd);
2452         priv->hw_setting.max_rxq_size = RX_QUEUE_SIZE;
2453         priv->hw_setting.max_rxq_log = RX_QUEUE_SIZE_LOG;
2454         priv->hw_setting.max_stations = IWL3945_STATION_COUNT;
2455         priv->hw_setting.bcast_sta_id = IWL3945_BROADCAST_ID;
2456
2457         priv->hw_setting.tx_ant_num = 2;
2458         return 0;
2459 }
2460
2461 unsigned int iwl3945_hw_get_beacon_cmd(struct iwl3945_priv *priv,
2462                           struct iwl3945_frame *frame, u8 rate)
2463 {
2464         struct iwl3945_tx_beacon_cmd *tx_beacon_cmd;
2465         unsigned int frame_size;
2466
2467         tx_beacon_cmd = (struct iwl3945_tx_beacon_cmd *)&frame->u;
2468         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
2469
2470         tx_beacon_cmd->tx.sta_id = priv->hw_setting.bcast_sta_id;
2471         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2472
2473         frame_size = iwl3945_fill_beacon_frame(priv,
2474                                 tx_beacon_cmd->frame,
2475                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
2476
2477         BUG_ON(frame_size > MAX_MPDU_SIZE);
2478         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
2479
2480         tx_beacon_cmd->tx.rate = rate;
2481         tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
2482                                       TX_CMD_FLG_TSF_MSK);
2483
2484         /* supp_rates[0] == OFDM start at IWL_FIRST_OFDM_RATE*/
2485         tx_beacon_cmd->tx.supp_rates[0] =
2486                 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2487
2488         tx_beacon_cmd->tx.supp_rates[1] =
2489                 (IWL_CCK_BASIC_RATES_MASK & 0xF);
2490
2491         return sizeof(struct iwl3945_tx_beacon_cmd) + frame_size;
2492 }
2493
2494 void iwl3945_hw_rx_handler_setup(struct iwl3945_priv *priv)
2495 {
2496         priv->rx_handlers[REPLY_TX] = iwl3945_rx_reply_tx;
2497         priv->rx_handlers[REPLY_3945_RX] = iwl3945_rx_reply_rx;
2498 }
2499
2500 void iwl3945_hw_setup_deferred_work(struct iwl3945_priv *priv)
2501 {
2502         INIT_DELAYED_WORK(&priv->thermal_periodic,
2503                           iwl3945_bg_reg_txpower_periodic);
2504 }
2505
2506 void iwl3945_hw_cancel_deferred_work(struct iwl3945_priv *priv)
2507 {
2508         cancel_delayed_work(&priv->thermal_periodic);
2509 }
2510
2511 static struct iwl_3945_cfg iwl3945_bg_cfg = {
2512         .name = "3945BG",
2513         .fw_name_pre = IWL3945_FW_PRE,
2514         .ucode_api_max = IWL3945_UCODE_API_MAX,
2515         .ucode_api_min = IWL3945_UCODE_API_MIN,
2516         .sku = IWL_SKU_G,
2517 };
2518
2519 static struct iwl_3945_cfg iwl3945_abg_cfg = {
2520         .name = "3945ABG",
2521         .fw_name_pre = IWL3945_FW_PRE,
2522         .ucode_api_max = IWL3945_UCODE_API_MAX,
2523         .ucode_api_min = IWL3945_UCODE_API_MIN,
2524         .sku = IWL_SKU_A|IWL_SKU_G,
2525 };
2526
2527 struct pci_device_id iwl3945_hw_card_ids[] = {
2528         {IWL_PCI_DEVICE(0x4222, 0x1005, iwl3945_bg_cfg)},
2529         {IWL_PCI_DEVICE(0x4222, 0x1034, iwl3945_bg_cfg)},
2530         {IWL_PCI_DEVICE(0x4222, 0x1044, iwl3945_bg_cfg)},
2531         {IWL_PCI_DEVICE(0x4227, 0x1014, iwl3945_bg_cfg)},
2532         {IWL_PCI_DEVICE(0x4222, PCI_ANY_ID, iwl3945_abg_cfg)},
2533         {IWL_PCI_DEVICE(0x4227, PCI_ANY_ID, iwl3945_abg_cfg)},
2534         {0}
2535 };
2536
2537 MODULE_DEVICE_TABLE(pci, iwl3945_hw_card_ids);