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   1 /*
   2  *
   3  *  Broadcom B43legacy wireless driver
   4  *
   5  *  Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
   6  *  Copyright (c) 2005 Stefano Brivio <st3@riseup.net>
   7  *  Copyright (c) 2005, 2006 Michael Buesch <mb@bu3sch.de>
   8  *  Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
   9  *  Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
  10  *  Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
  11  *
  12  *  Some parts of the code in this file are derived from the ipw2200
  13  *  driver  Copyright(c) 2003 - 2004 Intel Corporation.
  14
  15  *  This program is free software; you can redistribute it and/or modify
  16  *  it under the terms of the GNU General Public License as published by
  17  *  the Free Software Foundation; either version 2 of the License, or
  18  *  (at your option) any later version.
  19  *
  20  *  This program is distributed in the hope that it will be useful,
  21  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  22  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  23  *  GNU General Public License for more details.
  24  *
  25  *  You should have received a copy of the GNU General Public License
  26  *  along with this program; see the file COPYING.  If not, write to
  27  *  the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
  28  *  Boston, MA 02110-1301, USA.
  29  *
  30  */
  31
  32 #include <linux/delay.h>
  33 #include <linux/init.h>
  34 #include <linux/moduleparam.h>
  35 #include <linux/if_arp.h>
  36 #include <linux/etherdevice.h>
  37 #include <linux/version.h>
  38 #include <linux/firmware.h>
  39 #include <linux/wireless.h>
  40 #include <linux/workqueue.h>
  41 #include <linux/skbuff.h>
  42 #include <linux/dma-mapping.h>
  43 #include <net/dst.h>
  44 #include <asm/unaligned.h>
  45
  46 #include "b43legacy.h"
  47 #include "main.h"
  48 #include "debugfs.h"
  49 #include "phy.h"
  50 #include "dma.h"
  51 #include "pio.h"
  52 #include "sysfs.h"
  53 #include "xmit.h"
  54 #include "radio.h"
  55
  56
  57 MODULE_DESCRIPTION("Broadcom B43legacy wireless driver");
  58 MODULE_AUTHOR("Martin Langer");
  59 MODULE_AUTHOR("Stefano Brivio");
  60 MODULE_AUTHOR("Michael Buesch");
  61 MODULE_LICENSE("GPL");
  62
  63 #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO)
  64 static int modparam_pio;
  65 module_param_named(pio, modparam_pio, int, 0444);
  66 MODULE_PARM_DESC(pio, "enable(1) / disable(0) PIO mode");
  67 #elif defined(CONFIG_B43LEGACY_DMA)
  68 # define modparam_pio   0
  69 #elif defined(CONFIG_B43LEGACY_PIO)
  70 # define modparam_pio   1
  71 #endif
  72
  73 static int modparam_bad_frames_preempt;
  74 module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
  75 MODULE_PARM_DESC(bad_frames_preempt, "enable(1) / disable(0) Bad Frames"
  76                  " Preemption");
  77
  78 static int modparam_short_retry = B43legacy_DEFAULT_SHORT_RETRY_LIMIT;
  79 module_param_named(short_retry, modparam_short_retry, int, 0444);
  80 MODULE_PARM_DESC(short_retry, "Short-Retry-Limit (0 - 15)");
  81
  82 static int modparam_long_retry = B43legacy_DEFAULT_LONG_RETRY_LIMIT;
  83 module_param_named(long_retry, modparam_long_retry, int, 0444);
  84 MODULE_PARM_DESC(long_retry, "Long-Retry-Limit (0 - 15)");
  85
  86 static char modparam_fwpostfix[16];
  87 module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444);
  88 MODULE_PARM_DESC(fwpostfix, "Postfix for the firmware files to load.");
  89
  90 /* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */
  91 static const struct ssb_device_id b43legacy_ssb_tbl[] = {
  92         SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 2),
  93         SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 4),
  94         SSB_DEVTABLE_END
  95 };
  96 MODULE_DEVICE_TABLE(ssb, b43legacy_ssb_tbl);
  97
  98
  99 /* Channel and ratetables are shared for all devices.
 100  * They can't be const, because ieee80211 puts some precalculated
 101  * data in there. This data is the same for all devices, so we don't
 102  * get concurrency issues */
 103 #define RATETAB_ENT(_rateid, _flags) \
 104         {                                                       \
 105                 .rate   = B43legacy_RATE_TO_100KBPS(_rateid),   \
 106                 .val    = (_rateid),                            \
 107                 .val2   = (_rateid),                            \
 108                 .flags  = (_flags),                             \
 109         }
 110 static struct ieee80211_rate __b43legacy_ratetable[] = {
 111         RATETAB_ENT(B43legacy_CCK_RATE_1MB, IEEE80211_RATE_CCK),
 112         RATETAB_ENT(B43legacy_CCK_RATE_2MB, IEEE80211_RATE_CCK_2),
 113         RATETAB_ENT(B43legacy_CCK_RATE_5MB, IEEE80211_RATE_CCK_2),
 114         RATETAB_ENT(B43legacy_CCK_RATE_11MB, IEEE80211_RATE_CCK_2),
 115         RATETAB_ENT(B43legacy_OFDM_RATE_6MB, IEEE80211_RATE_OFDM),
 116         RATETAB_ENT(B43legacy_OFDM_RATE_9MB, IEEE80211_RATE_OFDM),
 117         RATETAB_ENT(B43legacy_OFDM_RATE_12MB, IEEE80211_RATE_OFDM),
 118         RATETAB_ENT(B43legacy_OFDM_RATE_18MB, IEEE80211_RATE_OFDM),
 119         RATETAB_ENT(B43legacy_OFDM_RATE_24MB, IEEE80211_RATE_OFDM),
 120         RATETAB_ENT(B43legacy_OFDM_RATE_36MB, IEEE80211_RATE_OFDM),
 121         RATETAB_ENT(B43legacy_OFDM_RATE_48MB, IEEE80211_RATE_OFDM),
 122         RATETAB_ENT(B43legacy_OFDM_RATE_54MB, IEEE80211_RATE_OFDM),
 123 };
 124 #define b43legacy_a_ratetable           (__b43legacy_ratetable + 4)
 125 #define b43legacy_a_ratetable_size      8
 126 #define b43legacy_b_ratetable           (__b43legacy_ratetable + 0)
 127 #define b43legacy_b_ratetable_size      4
 128 #define b43legacy_g_ratetable           (__b43legacy_ratetable + 0)
 129 #define b43legacy_g_ratetable_size      12
 130
 131 #define CHANTAB_ENT(_chanid, _freq) \
 132         {                                                       \
 133                 .chan   = (_chanid),                            \
 134                 .freq   = (_freq),                              \
 135                 .val    = (_chanid),                            \
 136                 .flag   = IEEE80211_CHAN_W_SCAN |               \
 137                           IEEE80211_CHAN_W_ACTIVE_SCAN |        \
 138                           IEEE80211_CHAN_W_IBSS,                \
 139                 .power_level    = 0x0A,                         \
 140                 .antenna_max    = 0xFF,                         \
 141         }
 142 static struct ieee80211_channel b43legacy_bg_chantable[] = {
 143         CHANTAB_ENT(1, 2412),
 144         CHANTAB_ENT(2, 2417),
 145         CHANTAB_ENT(3, 2422),
 146         CHANTAB_ENT(4, 2427),
 147         CHANTAB_ENT(5, 2432),
 148         CHANTAB_ENT(6, 2437),
 149         CHANTAB_ENT(7, 2442),
 150         CHANTAB_ENT(8, 2447),
 151         CHANTAB_ENT(9, 2452),
 152         CHANTAB_ENT(10, 2457),
 153         CHANTAB_ENT(11, 2462),
 154         CHANTAB_ENT(12, 2467),
 155         CHANTAB_ENT(13, 2472),
 156         CHANTAB_ENT(14, 2484),
 157 };
 158 #define b43legacy_bg_chantable_size     ARRAY_SIZE(b43legacy_bg_chantable)
 159
 160 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev);
 161 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev);
 162 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev);
 163 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev);
 164
 165
 166 static int b43legacy_ratelimit(struct b43legacy_wl *wl)
 167 {
 168         if (!wl || !wl->current_dev)
 169                 return 1;
 170         if (b43legacy_status(wl->current_dev) < B43legacy_STAT_STARTED)
 171                 return 1;
 172         /* We are up and running.
 173          * Ratelimit the messages to avoid DoS over the net. */
 174         return net_ratelimit();
 175 }
 176
 177 void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...)
 178 {
 179         va_list args;
 180
 181         if (!b43legacy_ratelimit(wl))
 182                 return;
 183         va_start(args, fmt);
 184         printk(KERN_INFO "b43legacy-%s: ",
 185                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
 186         vprintk(fmt, args);
 187         va_end(args);
 188 }
 189
 190 void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...)
 191 {
 192         va_list args;
 193
 194         if (!b43legacy_ratelimit(wl))
 195                 return;
 196         va_start(args, fmt);
 197         printk(KERN_ERR "b43legacy-%s ERROR: ",
 198                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
 199         vprintk(fmt, args);
 200         va_end(args);
 201 }
 202
 203 void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...)
 204 {
 205         va_list args;
 206
 207         if (!b43legacy_ratelimit(wl))
 208                 return;
 209         va_start(args, fmt);
 210         printk(KERN_WARNING "b43legacy-%s warning: ",
 211                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
 212         vprintk(fmt, args);
 213         va_end(args);
 214 }
 215
 216 #if B43legacy_DEBUG
 217 void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...)
 218 {
 219         va_list args;
 220
 221         va_start(args, fmt);
 222         printk(KERN_DEBUG "b43legacy-%s debug: ",
 223                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
 224         vprintk(fmt, args);
 225         va_end(args);
 226 }
 227 #endif /* DEBUG */
 228
 229 static void b43legacy_ram_write(struct b43legacy_wldev *dev, u16 offset,
 230                                 u32 val)
 231 {
 232         u32 status;
 233
 234         B43legacy_WARN_ON(offset % 4 != 0);
 235
 236         status = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
 237         if (status & B43legacy_SBF_XFER_REG_BYTESWAP)
 238                 val = swab32(val);
 239
 240         b43legacy_write32(dev, B43legacy_MMIO_RAM_CONTROL, offset);
 241         mmiowb();
 242         b43legacy_write32(dev, B43legacy_MMIO_RAM_DATA, val);
 243 }
 244
 245 static inline
 246 void b43legacy_shm_control_word(struct b43legacy_wldev *dev,
 247                                 u16 routing, u16 offset)
 248 {
 249         u32 control;
 250
 251         /* "offset" is the WORD offset. */
 252
 253         control = routing;
 254         control <<= 16;
 255         control |= offset;
 256         b43legacy_write32(dev, B43legacy_MMIO_SHM_CONTROL, control);
 257 }
 258
 259 u32 b43legacy_shm_read32(struct b43legacy_wldev *dev,
 260                        u16 routing, u16 offset)
 261 {
 262         u32 ret;
 263
 264         if (routing == B43legacy_SHM_SHARED) {
 265                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 266                 if (offset & 0x0003) {
 267                         /* Unaligned access */
 268                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 269                         ret = b43legacy_read16(dev,
 270                                 B43legacy_MMIO_SHM_DATA_UNALIGNED);
 271                         ret <<= 16;
 272                         b43legacy_shm_control_word(dev, routing,
 273                                                      (offset >> 2) + 1);
 274                         ret |= b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
 275
 276                         return ret;
 277                 }
 278                 offset >>= 2;
 279         }
 280         b43legacy_shm_control_word(dev, routing, offset);
 281         ret = b43legacy_read32(dev, B43legacy_MMIO_SHM_DATA);
 282
 283         return ret;
 284 }
 285
 286 u16 b43legacy_shm_read16(struct b43legacy_wldev *dev,
 287                            u16 routing, u16 offset)
 288 {
 289         u16 ret;
 290
 291         if (routing == B43legacy_SHM_SHARED) {
 292                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 293                 if (offset & 0x0003) {
 294                         /* Unaligned access */
 295                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 296                         ret = b43legacy_read16(dev,
 297                                              B43legacy_MMIO_SHM_DATA_UNALIGNED);
 298
 299                         return ret;
 300                 }
 301                 offset >>= 2;
 302         }
 303         b43legacy_shm_control_word(dev, routing, offset);
 304         ret = b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
 305
 306         return ret;
 307 }
 308
 309 void b43legacy_shm_write32(struct b43legacy_wldev *dev,
 310                            u16 routing, u16 offset,
 311                            u32 value)
 312 {
 313         if (routing == B43legacy_SHM_SHARED) {
 314                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 315                 if (offset & 0x0003) {
 316                         /* Unaligned access */
 317                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 318                         mmiowb();
 319                         b43legacy_write16(dev,
 320                                           B43legacy_MMIO_SHM_DATA_UNALIGNED,
 321                                           (value >> 16) & 0xffff);
 322                         mmiowb();
 323                         b43legacy_shm_control_word(dev, routing,
 324                                                    (offset >> 2) + 1);
 325                         mmiowb();
 326                         b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA,
 327                                           value & 0xffff);
 328                         return;
 329                 }
 330                 offset >>= 2;
 331         }
 332         b43legacy_shm_control_word(dev, routing, offset);
 333         mmiowb();
 334         b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, value);
 335 }
 336
 337 void b43legacy_shm_write16(struct b43legacy_wldev *dev, u16 routing, u16 offset,
 338                            u16 value)
 339 {
 340         if (routing == B43legacy_SHM_SHARED) {
 341                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 342                 if (offset & 0x0003) {
 343                         /* Unaligned access */
 344                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 345                         mmiowb();
 346                         b43legacy_write16(dev,
 347                                           B43legacy_MMIO_SHM_DATA_UNALIGNED,
 348                                           value);
 349                         return;
 350                 }
 351                 offset >>= 2;
 352         }
 353         b43legacy_shm_control_word(dev, routing, offset);
 354         mmiowb();
 355         b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, value);
 356 }
 357
 358 /* Read HostFlags */
 359 u32 b43legacy_hf_read(struct b43legacy_wldev *dev)
 360 {
 361         u32 ret;
 362
 363         ret = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 364                                    B43legacy_SHM_SH_HOSTFHI);
 365         ret <<= 16;
 366         ret |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 367                                     B43legacy_SHM_SH_HOSTFLO);
 368
 369         return ret;
 370 }
 371
 372 /* Write HostFlags */
 373 void b43legacy_hf_write(struct b43legacy_wldev *dev, u32 value)
 374 {
 375         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
 376                               B43legacy_SHM_SH_HOSTFLO,
 377                               (value & 0x0000FFFF));
 378         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
 379                               B43legacy_SHM_SH_HOSTFHI,
 380                               ((value & 0xFFFF0000) >> 16));
 381 }
 382
 383 void b43legacy_tsf_read(struct b43legacy_wldev *dev, u64 *tsf)
 384 {
 385         /* We need to be careful. As we read the TSF from multiple
 386          * registers, we should take care of register overflows.
 387          * In theory, the whole tsf read process should be atomic.
 388          * We try to be atomic here, by restaring the read process,
 389          * if any of the high registers changed (overflew).
 390          */
 391         if (dev->dev->id.revision >= 3) {
 392                 u32 low;
 393                 u32 high;
 394                 u32 high2;
 395
 396                 do {
 397                         high = b43legacy_read32(dev,
 398                                         B43legacy_MMIO_REV3PLUS_TSF_HIGH);
 399                         low = b43legacy_read32(dev,
 400                                         B43legacy_MMIO_REV3PLUS_TSF_LOW);
 401                         high2 = b43legacy_read32(dev,
 402                                         B43legacy_MMIO_REV3PLUS_TSF_HIGH);
 403                 } while (unlikely(high != high2));
 404
 405                 *tsf = high;
 406                 *tsf <<= 32;
 407                 *tsf |= low;
 408         } else {
 409                 u64 tmp;
 410                 u16 v0;
 411                 u16 v1;
 412                 u16 v2;
 413                 u16 v3;
 414                 u16 test1;
 415                 u16 test2;
 416                 u16 test3;
 417
 418                 do {
 419                         v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
 420                         v2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
 421                         v1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
 422                         v0 = b43legacy_read16(dev, B43legacy_MMIO_TSF_0);
 423
 424                         test3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
 425                         test2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
 426                         test1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
 427                 } while (v3 != test3 || v2 != test2 || v1 != test1);
 428
 429                 *tsf = v3;
 430                 *tsf <<= 48;
 431                 tmp = v2;
 432                 tmp <<= 32;
 433                 *tsf |= tmp;
 434                 tmp = v1;
 435                 tmp <<= 16;
 436                 *tsf |= tmp;
 437                 *tsf |= v0;
 438         }
 439 }
 440
 441 static void b43legacy_time_lock(struct b43legacy_wldev *dev)
 442 {
 443         u32 status;
 444
 445         status = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
 446         status |= B43legacy_SBF_TIME_UPDATE;
 447         b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, status);
 448         mmiowb();
 449 }
 450
 451 static void b43legacy_time_unlock(struct b43legacy_wldev *dev)
 452 {
 453         u32 status;
 454
 455         status = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
 456         status &= ~B43legacy_SBF_TIME_UPDATE;
 457         b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, status);
 458 }
 459
 460 static void b43legacy_tsf_write_locked(struct b43legacy_wldev *dev, u64 tsf)
 461 {
 462         /* Be careful with the in-progress timer.
 463          * First zero out the low register, so we have a full
 464          * register-overflow duration to complete the operation.
 465          */
 466         if (dev->dev->id.revision >= 3) {
 467                 u32 lo = (tsf & 0x00000000FFFFFFFFULL);
 468                 u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32;
 469
 470                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, 0);
 471                 mmiowb();
 472                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_HIGH,
 473                                     hi);
 474                 mmiowb();
 475                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW,
 476                                     lo);
 477         } else {
 478                 u16 v0 = (tsf & 0x000000000000FFFFULL);
 479                 u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16;
 480                 u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32;
 481                 u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48;
 482
 483                 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, 0);
 484                 mmiowb();
 485                 b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3);
 486                 mmiowb();
 487                 b43legacy_write16(dev, B43legacy_MMIO_TSF_2, v2);
 488                 mmiowb();
 489                 b43legacy_write16(dev, B43legacy_MMIO_TSF_1, v1);
 490                 mmiowb();
 491                 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, v0);
 492         }
 493 }
 494
 495 void b43legacy_tsf_write(struct b43legacy_wldev *dev, u64 tsf)
 496 {
 497         b43legacy_time_lock(dev);
 498         b43legacy_tsf_write_locked(dev, tsf);
 499         b43legacy_time_unlock(dev);
 500 }
 501
 502 static
 503 void b43legacy_macfilter_set(struct b43legacy_wldev *dev,
 504                              u16 offset, const u8 *mac)
 505 {
 506         static const u8 zero_addr[ETH_ALEN] = { 0 };
 507         u16 data;
 508
 509         if (!mac)
 510                 mac = zero_addr;
 511
 512         offset |= 0x0020;
 513         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_CONTROL, offset);
 514
 515         data = mac[0];
 516         data |= mac[1] << 8;
 517         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
 518         data = mac[2];
 519         data |= mac[3] << 8;
 520         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
 521         data = mac[4];
 522         data |= mac[5] << 8;
 523         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
 524 }
 525
 526 static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev *dev)
 527 {
 528         static const u8 zero_addr[ETH_ALEN] = { 0 };
 529         const u8 *mac = dev->wl->mac_addr;
 530         const u8 *bssid = dev->wl->bssid;
 531         u8 mac_bssid[ETH_ALEN * 2];
 532         int i;
 533         u32 tmp;
 534
 535         if (!bssid)
 536                 bssid = zero_addr;
 537         if (!mac)
 538                 mac = zero_addr;
 539
 540         b43legacy_macfilter_set(dev, B43legacy_MACFILTER_BSSID, bssid);
 541
 542         memcpy(mac_bssid, mac, ETH_ALEN);
 543         memcpy(mac_bssid + ETH_ALEN, bssid, ETH_ALEN);
 544
 545         /* Write our MAC address and BSSID to template ram */
 546         for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32)) {
 547                 tmp =  (u32)(mac_bssid[i + 0]);
 548                 tmp |= (u32)(mac_bssid[i + 1]) << 8;
 549                 tmp |= (u32)(mac_bssid[i + 2]) << 16;
 550                 tmp |= (u32)(mac_bssid[i + 3]) << 24;
 551                 b43legacy_ram_write(dev, 0x20 + i, tmp);
 552                 b43legacy_ram_write(dev, 0x78 + i, tmp);
 553                 b43legacy_ram_write(dev, 0x478 + i, tmp);
 554         }
 555 }
 556
 557 static void b43legacy_upload_card_macaddress(struct b43legacy_wldev *dev)
 558 {
 559         b43legacy_write_mac_bssid_templates(dev);
 560         b43legacy_macfilter_set(dev, B43legacy_MACFILTER_SELF,
 561                                 dev->wl->mac_addr);
 562 }
 563
 564 static void b43legacy_set_slot_time(struct b43legacy_wldev *dev,
 565                                     u16 slot_time)
 566 {
 567         /* slot_time is in usec. */
 568         if (dev->phy.type != B43legacy_PHYTYPE_G)
 569                 return;
 570         b43legacy_write16(dev, 0x684, 510 + slot_time);
 571         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0010,
 572                               slot_time);
 573 }
 574
 575 static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev *dev)
 576 {
 577         b43legacy_set_slot_time(dev, 9);
 578         dev->short_slot = 1;
 579 }
 580
 581 static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev *dev)
 582 {
 583         b43legacy_set_slot_time(dev, 20);
 584         dev->short_slot = 0;
 585 }
 586
 587 /* Enable a Generic IRQ. "mask" is the mask of which IRQs to enable.
 588  * Returns the _previously_ enabled IRQ mask.
 589  */
 590 static inline u32 b43legacy_interrupt_enable(struct b43legacy_wldev *dev,
 591                                              u32 mask)
 592 {
 593         u32 old_mask;
 594
 595         old_mask = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
 596         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, old_mask |
 597                           mask);
 598
 599         return old_mask;
 600 }
 601
 602 /* Disable a Generic IRQ. "mask" is the mask of which IRQs to disable.
 603  * Returns the _previously_ enabled IRQ mask.
 604  */
 605 static inline u32 b43legacy_interrupt_disable(struct b43legacy_wldev *dev,
 606                                               u32 mask)
 607 {
 608         u32 old_mask;
 609
 610         old_mask = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
 611         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, old_mask & ~mask);
 612
 613         return old_mask;
 614 }
 615
 616 /* Synchronize IRQ top- and bottom-half.
 617  * IRQs must be masked before calling this.
 618  * This must not be called with the irq_lock held.
 619  */
 620 static void b43legacy_synchronize_irq(struct b43legacy_wldev *dev)
 621 {
 622         synchronize_irq(dev->dev->irq);
 623         tasklet_kill(&dev->isr_tasklet);
 624 }
 625
 626 /* DummyTransmission function, as documented on
 627  * http://bcm-specs.sipsolutions.net/DummyTransmission
 628  */
 629 void b43legacy_dummy_transmission(struct b43legacy_wldev *dev)
 630 {
 631         struct b43legacy_phy *phy = &dev->phy;
 632         unsigned int i;
 633         unsigned int max_loop;
 634         u16 value;
 635         u32 buffer[5] = {
 636                 0x00000000,
 637                 0x00D40000,
 638                 0x00000000,
 639                 0x01000000,
 640                 0x00000000,
 641         };
 642
 643         switch (phy->type) {
 644         case B43legacy_PHYTYPE_B:
 645         case B43legacy_PHYTYPE_G:
 646                 max_loop = 0xFA;
 647                 buffer[0] = 0x000B846E;
 648                 break;
 649         default:
 650                 B43legacy_BUG_ON(1);
 651                 return;
 652         }
 653
 654         for (i = 0; i < 5; i++)
 655                 b43legacy_ram_write(dev, i * 4, buffer[i]);
 656
 657         /* dummy read follows */
 658         b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
 659
 660         b43legacy_write16(dev, 0x0568, 0x0000);
 661         b43legacy_write16(dev, 0x07C0, 0x0000);
 662         b43legacy_write16(dev, 0x050C, 0x0000);
 663         b43legacy_write16(dev, 0x0508, 0x0000);
 664         b43legacy_write16(dev, 0x050A, 0x0000);
 665         b43legacy_write16(dev, 0x054C, 0x0000);
 666         b43legacy_write16(dev, 0x056A, 0x0014);
 667         b43legacy_write16(dev, 0x0568, 0x0826);
 668         b43legacy_write16(dev, 0x0500, 0x0000);
 669         b43legacy_write16(dev, 0x0502, 0x0030);
 670
 671         if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
 672                 b43legacy_radio_write16(dev, 0x0051, 0x0017);
 673         for (i = 0x00; i < max_loop; i++) {
 674                 value = b43legacy_read16(dev, 0x050E);
 675                 if (value & 0x0080)
 676                         break;
 677                 udelay(10);
 678         }
 679         for (i = 0x00; i < 0x0A; i++) {
 680                 value = b43legacy_read16(dev, 0x050E);
 681                 if (value & 0x0400)
 682                         break;
 683                 udelay(10);
 684         }
 685         for (i = 0x00; i < 0x0A; i++) {
 686                 value = b43legacy_read16(dev, 0x0690);
 687                 if (!(value & 0x0100))
 688                         break;
 689                 udelay(10);
 690         }
 691         if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
 692                 b43legacy_radio_write16(dev, 0x0051, 0x0037);
 693 }
 694
 695 /* Turn the Analog ON/OFF */
 696 static void b43legacy_switch_analog(struct b43legacy_wldev *dev, int on)
 697 {
 698         b43legacy_write16(dev, B43legacy_MMIO_PHY0, on ? 0 : 0xF4);
 699 }
 700
 701 void b43legacy_wireless_core_reset(struct b43legacy_wldev *dev, u32 flags)
 702 {
 703         u32 tmslow;
 704         u32 macctl;
 705
 706         flags |= B43legacy_TMSLOW_PHYCLKEN;
 707         flags |= B43legacy_TMSLOW_PHYRESET;
 708         ssb_device_enable(dev->dev, flags);
 709         msleep(2); /* Wait for the PLL to turn on. */
 710
 711         /* Now take the PHY out of Reset again */
 712         tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
 713         tmslow |= SSB_TMSLOW_FGC;
 714         tmslow &= ~B43legacy_TMSLOW_PHYRESET;
 715         ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
 716         ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
 717         msleep(1);
 718         tmslow &= ~SSB_TMSLOW_FGC;
 719         ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
 720         ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
 721         msleep(1);
 722
 723         /* Turn Analog ON */
 724         b43legacy_switch_analog(dev, 1);
 725
 726         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 727         macctl &= ~B43legacy_MACCTL_GMODE;
 728         if (flags & B43legacy_TMSLOW_GMODE) {
 729                 macctl |= B43legacy_MACCTL_GMODE;
 730                 dev->phy.gmode = 1;
 731         } else
 732                 dev->phy.gmode = 0;
 733         macctl |= B43legacy_MACCTL_IHR_ENABLED;
 734         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
 735 }
 736
 737 static void handle_irq_transmit_status(struct b43legacy_wldev *dev)
 738 {
 739         u32 v0;
 740         u32 v1;
 741         u16 tmp;
 742         struct b43legacy_txstatus stat;
 743
 744         while (1) {
 745                 v0 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
 746                 if (!(v0 & 0x00000001))
 747                         break;
 748                 v1 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
 749
 750                 stat.cookie = (v0 >> 16);
 751                 stat.seq = (v1 & 0x0000FFFF);
 752                 stat.phy_stat = ((v1 & 0x00FF0000) >> 16);
 753                 tmp = (v0 & 0x0000FFFF);
 754                 stat.frame_count = ((tmp & 0xF000) >> 12);
 755                 stat.rts_count = ((tmp & 0x0F00) >> 8);
 756                 stat.supp_reason = ((tmp & 0x001C) >> 2);
 757                 stat.pm_indicated = !!(tmp & 0x0080);
 758                 stat.intermediate = !!(tmp & 0x0040);
 759                 stat.for_ampdu = !!(tmp & 0x0020);
 760                 stat.acked = !!(tmp & 0x0002);
 761
 762                 b43legacy_handle_txstatus(dev, &stat);
 763         }
 764 }
 765
 766 static void drain_txstatus_queue(struct b43legacy_wldev *dev)
 767 {
 768         u32 dummy;
 769
 770         if (dev->dev->id.revision < 5)
 771                 return;
 772         /* Read all entries from the microcode TXstatus FIFO
 773          * and throw them away.
 774          */
 775         while (1) {
 776                 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
 777                 if (!(dummy & 0x00000001))
 778                         break;
 779                 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
 780         }
 781 }
 782
 783 static u32 b43legacy_jssi_read(struct b43legacy_wldev *dev)
 784 {
 785         u32 val = 0;
 786
 787         val = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x40A);
 788         val <<= 16;
 789         val |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x408);
 790
 791         return val;
 792 }
 793
 794 static void b43legacy_jssi_write(struct b43legacy_wldev *dev, u32 jssi)
 795 {
 796         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x408,
 797                               (jssi & 0x0000FFFF));
 798         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x40A,
 799                               (jssi & 0xFFFF0000) >> 16);
 800 }
 801
 802 static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev)
 803 {
 804         b43legacy_jssi_write(dev, 0x7F7F7F7F);
 805         b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD,
 806                           b43legacy_read32(dev,
 807                           B43legacy_MMIO_STATUS2_BITFIELD)
 808                           | (1 << 4));
 809         B43legacy_WARN_ON(dev->noisecalc.channel_at_start !=
 810                             dev->phy.channel);
 811 }
 812
 813 static void b43legacy_calculate_link_quality(struct b43legacy_wldev *dev)
 814 {
 815         /* Top half of Link Quality calculation. */
 816
 817         if (dev->noisecalc.calculation_running)
 818                 return;
 819         dev->noisecalc.channel_at_start = dev->phy.channel;
 820         dev->noisecalc.calculation_running = 1;
 821         dev->noisecalc.nr_samples = 0;
 822
 823         b43legacy_generate_noise_sample(dev);
 824 }
 825
 826 static void handle_irq_noise(struct b43legacy_wldev *dev)
 827 {
 828         struct b43legacy_phy *phy = &dev->phy;
 829         u16 tmp;
 830         u8 noise[4];
 831         u8 i;
 832         u8 j;
 833         s32 average;
 834
 835         /* Bottom half of Link Quality calculation. */
 836
 837         B43legacy_WARN_ON(!dev->noisecalc.calculation_running);
 838         if (dev->noisecalc.channel_at_start != phy->channel)
 839                 goto drop_calculation;
 840         *((__le32 *)noise) = cpu_to_le32(b43legacy_jssi_read(dev));
 841         if (noise[0] == 0x7F || noise[1] == 0x7F ||
 842             noise[2] == 0x7F || noise[3] == 0x7F)
 843                 goto generate_new;
 844
 845         /* Get the noise samples. */
 846         B43legacy_WARN_ON(dev->noisecalc.nr_samples >= 8);
 847         i = dev->noisecalc.nr_samples;
 848         noise[0] = limit_value(noise[0], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 849         noise[1] = limit_value(noise[1], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 850         noise[2] = limit_value(noise[2], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 851         noise[3] = limit_value(noise[3], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 852         dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]];
 853         dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]];
 854         dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]];
 855         dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]];
 856         dev->noisecalc.nr_samples++;
 857         if (dev->noisecalc.nr_samples == 8) {
 858                 /* Calculate the Link Quality by the noise samples. */
 859                 average = 0;
 860                 for (i = 0; i < 8; i++) {
 861                         for (j = 0; j < 4; j++)
 862                                 average += dev->noisecalc.samples[i][j];
 863                 }
 864                 average /= (8 * 4);
 865                 average *= 125;
 866                 average += 64;
 867                 average /= 128;
 868                 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 869                                              0x40C);
 870                 tmp = (tmp / 128) & 0x1F;
 871                 if (tmp >= 8)
 872                         average += 2;
 873                 else
 874                         average -= 25;
 875                 if (tmp == 8)
 876                         average -= 72;
 877                 else
 878                         average -= 48;
 879
 880                 dev->stats.link_noise = average;
 881 drop_calculation:
 882                 dev->noisecalc.calculation_running = 0;
 883                 return;
 884         }
 885 generate_new:
 886         b43legacy_generate_noise_sample(dev);
 887 }
 888
 889 static void handle_irq_tbtt_indication(struct b43legacy_wldev *dev)
 890 {
 891         if (b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_AP)) {
 892                 /* TODO: PS TBTT */
 893         } else {
 894                 if (1/*FIXME: the last PSpoll frame was sent successfully */)
 895                         b43legacy_power_saving_ctl_bits(dev, -1, -1);
 896         }
 897         dev->reg124_set_0x4 = 0;
 898         if (b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_IBSS))
 899                 dev->reg124_set_0x4 = 1;
 900 }
 901
 902 static void handle_irq_atim_end(struct b43legacy_wldev *dev)
 903 {
 904         if (!dev->reg124_set_0x4) /*FIXME rename this variable*/
 905                 return;
 906         b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD,
 907                           b43legacy_read32(dev, B43legacy_MMIO_STATUS2_BITFIELD)
 908                           | 0x4);
 909 }
 910
 911 static void handle_irq_pmq(struct b43legacy_wldev *dev)
 912 {
 913         u32 tmp;
 914
 915         /* TODO: AP mode. */
 916
 917         while (1) {
 918                 tmp = b43legacy_read32(dev, B43legacy_MMIO_PS_STATUS);
 919                 if (!(tmp & 0x00000008))
 920                         break;
 921         }
 922         /* 16bit write is odd, but correct. */
 923         b43legacy_write16(dev, B43legacy_MMIO_PS_STATUS, 0x0002);
 924 }
 925
 926 static void b43legacy_write_template_common(struct b43legacy_wldev *dev,
 927                                             const u8 *data, u16 size,
 928                                             u16 ram_offset,
 929                                             u16 shm_size_offset, u8 rate)
 930 {
 931         u32 i;
 932         u32 tmp;
 933         struct b43legacy_plcp_hdr4 plcp;
 934
 935         plcp.data = 0;
 936         b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
 937         b43legacy_ram_write(dev, ram_offset, le32_to_cpu(plcp.data));
 938         ram_offset += sizeof(u32);
 939         /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet.
 940          * So leave the first two bytes of the next write blank.
 941          */
 942         tmp = (u32)(data[0]) << 16;
 943         tmp |= (u32)(data[1]) << 24;
 944         b43legacy_ram_write(dev, ram_offset, tmp);
 945         ram_offset += sizeof(u32);
 946         for (i = 2; i < size; i += sizeof(u32)) {
 947                 tmp = (u32)(data[i + 0]);
 948                 if (i + 1 < size)
 949                         tmp |= (u32)(data[i + 1]) << 8;
 950                 if (i + 2 < size)
 951                         tmp |= (u32)(data[i + 2]) << 16;
 952                 if (i + 3 < size)
 953                         tmp |= (u32)(data[i + 3]) << 24;
 954                 b43legacy_ram_write(dev, ram_offset + i - 2, tmp);
 955         }
 956         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_size_offset,
 957                               size + sizeof(struct b43legacy_plcp_hdr6));
 958 }
 959
 960 static void b43legacy_write_beacon_template(struct b43legacy_wldev *dev,
 961                                             u16 ram_offset,
 962                                             u16 shm_size_offset, u8 rate)
 963 {
 964         int len;
 965         const u8 *data;
 966
 967         B43legacy_WARN_ON(!dev->cached_beacon);
 968         len = min((size_t)dev->cached_beacon->len,
 969                   0x200 - sizeof(struct b43legacy_plcp_hdr6));
 970         data = (const u8 *)(dev->cached_beacon->data);
 971         b43legacy_write_template_common(dev, data,
 972                                         len, ram_offset,
 973                                         shm_size_offset, rate);
 974 }
 975
 976 static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev,
 977                                             u16 shm_offset, u16 size,
 978                                             u8 rate)
 979 {
 980         struct b43legacy_plcp_hdr4 plcp;
 981         u32 tmp;
 982         __le16 dur;
 983
 984         plcp.data = 0;
 985         b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
 986         dur = ieee80211_generic_frame_duration(dev->wl->hw,
 987                                                dev->wl->if_id,
 988                                                size,
 989                                                B43legacy_RATE_TO_100KBPS(rate));
 990         /* Write PLCP in two parts and timing for packet transfer */
 991         tmp = le32_to_cpu(plcp.data);
 992         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset,
 993                               tmp & 0xFFFF);
 994         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 2,
 995                               tmp >> 16);
 996         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 6,
 997                               le16_to_cpu(dur));
 998 }
 999
1000 /* Instead of using custom probe response template, this function
1001  * just patches custom beacon template by:
1002  * 1) Changing packet type
1003  * 2) Patching duration field
1004  * 3) Stripping TIM
1005  */
1006 static u8 *b43legacy_generate_probe_resp(struct b43legacy_wldev *dev,
1007                                          u16 *dest_size, u8 rate)
1008 {
1009         const u8 *src_data;
1010         u8 *dest_data;
1011         u16 src_size;
1012         u16 elem_size;
1013         u16 src_pos;
1014         u16 dest_pos;
1015         __le16 dur;
1016         struct ieee80211_hdr *hdr;
1017
1018         B43legacy_WARN_ON(!dev->cached_beacon);
1019         src_size = dev->cached_beacon->len;
1020         src_data = (const u8 *)dev->cached_beacon->data;
1021
1022         if (unlikely(src_size < 0x24)) {
1023                 b43legacydbg(dev->wl, "b43legacy_generate_probe_resp: "
1024                        "invalid beacon\n");
1025                 return NULL;
1026         }
1027
1028         dest_data = kmalloc(src_size, GFP_ATOMIC);
1029         if (unlikely(!dest_data))
1030                 return NULL;
1031
1032         /* 0x24 is offset of first variable-len Information-Element
1033          * in beacon frame.
1034          */
1035         memcpy(dest_data, src_data, 0x24);
1036         src_pos = 0x24;
1037         dest_pos = 0x24;
1038         for (; src_pos < src_size - 2; src_pos += elem_size) {
1039                 elem_size = src_data[src_pos + 1] + 2;
1040                 if (src_data[src_pos] != 0x05) { /* TIM */
1041                         memcpy(dest_data + dest_pos, src_data + src_pos,
1042                                elem_size);
1043                         dest_pos += elem_size;
1044                 }
1045         }
1046         *dest_size = dest_pos;
1047         hdr = (struct ieee80211_hdr *)dest_data;
1048
1049         /* Set the frame control. */
1050         hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
1051                                          IEEE80211_STYPE_PROBE_RESP);
1052         dur = ieee80211_generic_frame_duration(dev->wl->hw,
1053                                                dev->wl->if_id,
1054                                                *dest_size,
1055                                                B43legacy_RATE_TO_100KBPS(rate));
1056         hdr->duration_id = dur;
1057
1058         return dest_data;
1059 }
1060
1061 static void b43legacy_write_probe_resp_template(struct b43legacy_wldev *dev,
1062                                                 u16 ram_offset,
1063                                                 u16 shm_size_offset, u8 rate)
1064 {
1065         u8 *probe_resp_data;
1066         u16 size;
1067
1068         B43legacy_WARN_ON(!dev->cached_beacon);
1069         size = dev->cached_beacon->len;
1070         probe_resp_data = b43legacy_generate_probe_resp(dev, &size, rate);
1071         if (unlikely(!probe_resp_data))
1072                 return;
1073
1074         /* Looks like PLCP headers plus packet timings are stored for
1075          * all possible basic rates
1076          */
1077         b43legacy_write_probe_resp_plcp(dev, 0x31A, size,
1078                                         B43legacy_CCK_RATE_1MB);
1079         b43legacy_write_probe_resp_plcp(dev, 0x32C, size,
1080                                         B43legacy_CCK_RATE_2MB);
1081         b43legacy_write_probe_resp_plcp(dev, 0x33E, size,
1082                                         B43legacy_CCK_RATE_5MB);
1083         b43legacy_write_probe_resp_plcp(dev, 0x350, size,
1084                                         B43legacy_CCK_RATE_11MB);
1085
1086         size = min((size_t)size,
1087                    0x200 - sizeof(struct b43legacy_plcp_hdr6));
1088         b43legacy_write_template_common(dev, probe_resp_data,
1089                                         size, ram_offset,
1090                                         shm_size_offset, rate);
1091         kfree(probe_resp_data);
1092 }
1093
1094 static int b43legacy_refresh_cached_beacon(struct b43legacy_wldev *dev,
1095                                            struct sk_buff *beacon)
1096 {
1097         if (dev->cached_beacon)
1098                 kfree_skb(dev->cached_beacon);
1099         dev->cached_beacon = beacon;
1100
1101         return 0;
1102 }
1103
1104 static void b43legacy_update_templates(struct b43legacy_wldev *dev)
1105 {
1106         u32 status;
1107
1108         B43legacy_WARN_ON(!dev->cached_beacon);
1109
1110         b43legacy_write_beacon_template(dev, 0x68, 0x18,
1111                                         B43legacy_CCK_RATE_1MB);
1112         b43legacy_write_beacon_template(dev, 0x468, 0x1A,
1113                                         B43legacy_CCK_RATE_1MB);
1114         b43legacy_write_probe_resp_template(dev, 0x268, 0x4A,
1115                                             B43legacy_CCK_RATE_11MB);
1116
1117         status = b43legacy_read32(dev, B43legacy_MMIO_STATUS2_BITFIELD);
1118         status |= 0x03;
1119         b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD, status);
1120 }
1121
1122 static void b43legacy_refresh_templates(struct b43legacy_wldev *dev,
1123                                         struct sk_buff *beacon)
1124 {
1125         int err;
1126
1127         err = b43legacy_refresh_cached_beacon(dev, beacon);
1128         if (unlikely(err))
1129                 return;
1130         b43legacy_update_templates(dev);
1131 }
1132
1133 static void b43legacy_set_ssid(struct b43legacy_wldev *dev,
1134                                const u8 *ssid, u8 ssid_len)
1135 {
1136         u32 tmp;
1137         u16 i;
1138         u16 len;
1139
1140         len = min((u16)ssid_len, (u16)0x100);
1141         for (i = 0; i < len; i += sizeof(u32)) {
1142                 tmp = (u32)(ssid[i + 0]);
1143                 if (i + 1 < len)
1144                         tmp |= (u32)(ssid[i + 1]) << 8;
1145                 if (i + 2 < len)
1146                         tmp |= (u32)(ssid[i + 2]) << 16;
1147                 if (i + 3 < len)
1148                         tmp |= (u32)(ssid[i + 3]) << 24;
1149                 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED,
1150                                       0x380 + i, tmp);
1151         }
1152         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1153                               0x48, len);
1154 }
1155
1156 static void b43legacy_set_beacon_int(struct b43legacy_wldev *dev,
1157                                      u16 beacon_int)
1158 {
1159         b43legacy_time_lock(dev);
1160         if (dev->dev->id.revision >= 3)
1161                 b43legacy_write32(dev, 0x188, (beacon_int << 16));
1162         else {
1163                 b43legacy_write16(dev, 0x606, (beacon_int >> 6));
1164                 b43legacy_write16(dev, 0x610, beacon_int);
1165         }
1166         b43legacy_time_unlock(dev);
1167 }
1168
1169 static void handle_irq_beacon(struct b43legacy_wldev *dev)
1170 {
1171         u32 status;
1172
1173         if (!b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_AP))
1174                 return;
1175
1176         dev->irq_savedstate &= ~B43legacy_IRQ_BEACON;
1177         status = b43legacy_read32(dev, B43legacy_MMIO_STATUS2_BITFIELD);
1178
1179         if (!dev->cached_beacon || ((status & 0x1) && (status & 0x2))) {
1180                 /* ACK beacon IRQ. */
1181                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1182                                   B43legacy_IRQ_BEACON);
1183                 dev->irq_savedstate |= B43legacy_IRQ_BEACON;
1184                 if (dev->cached_beacon)
1185                         kfree_skb(dev->cached_beacon);
1186                 dev->cached_beacon = NULL;
1187                 return;
1188         }
1189         if (!(status & 0x1)) {
1190                 b43legacy_write_beacon_template(dev, 0x68, 0x18,
1191                                                 B43legacy_CCK_RATE_1MB);
1192                 status |= 0x1;
1193                 b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD,
1194                                   status);
1195         }
1196         if (!(status & 0x2)) {
1197                 b43legacy_write_beacon_template(dev, 0x468, 0x1A,
1198                                                 B43legacy_CCK_RATE_1MB);
1199                 status |= 0x2;
1200                 b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD,
1201                                   status);
1202         }
1203 }
1204
1205 static void handle_irq_ucode_debug(struct b43legacy_wldev *dev)
1206 {
1207 }
1208
1209 /* Interrupt handler bottom-half */
1210 static void b43legacy_interrupt_tasklet(struct b43legacy_wldev *dev)
1211 {
1212         u32 reason;
1213         u32 dma_reason[ARRAY_SIZE(dev->dma_reason)];
1214         u32 merged_dma_reason = 0;
1215         int i;
1216         unsigned long flags;
1217
1218         spin_lock_irqsave(&dev->wl->irq_lock, flags);
1219
1220         B43legacy_WARN_ON(b43legacy_status(dev) <
1221                           B43legacy_STAT_INITIALIZED);
1222
1223         reason = dev->irq_reason;
1224         for (i = 0; i < ARRAY_SIZE(dma_reason); i++) {
1225                 dma_reason[i] = dev->dma_reason[i];
1226                 merged_dma_reason |= dma_reason[i];
1227         }
1228
1229         if (unlikely(reason & B43legacy_IRQ_MAC_TXERR))
1230                 b43legacyerr(dev->wl, "MAC transmission error\n");
1231
1232         if (unlikely(reason & B43legacy_IRQ_PHY_TXERR))
1233                 b43legacyerr(dev->wl, "PHY transmission error\n");
1234
1235         if (unlikely(merged_dma_reason & (B43legacy_DMAIRQ_FATALMASK |
1236                                           B43legacy_DMAIRQ_NONFATALMASK))) {
1237                 if (merged_dma_reason & B43legacy_DMAIRQ_FATALMASK) {
1238                         b43legacyerr(dev->wl, "Fatal DMA error: "
1239                                "0x%08X, 0x%08X, 0x%08X, "
1240                                "0x%08X, 0x%08X, 0x%08X\n",
1241                                dma_reason[0], dma_reason[1],
1242                                dma_reason[2], dma_reason[3],
1243                                dma_reason[4], dma_reason[5]);
1244                         b43legacy_controller_restart(dev, "DMA error");
1245                         mmiowb();
1246                         spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1247                         return;
1248                 }
1249                 if (merged_dma_reason & B43legacy_DMAIRQ_NONFATALMASK)
1250                         b43legacyerr(dev->wl, "DMA error: "
1251                                "0x%08X, 0x%08X, 0x%08X, "
1252                                "0x%08X, 0x%08X, 0x%08X\n",
1253                                dma_reason[0], dma_reason[1],
1254                                dma_reason[2], dma_reason[3],
1255                                dma_reason[4], dma_reason[5]);
1256         }
1257
1258         if (unlikely(reason & B43legacy_IRQ_UCODE_DEBUG))
1259                 handle_irq_ucode_debug(dev);
1260         if (reason & B43legacy_IRQ_TBTT_INDI)
1261                 handle_irq_tbtt_indication(dev);
1262         if (reason & B43legacy_IRQ_ATIM_END)
1263                 handle_irq_atim_end(dev);
1264         if (reason & B43legacy_IRQ_BEACON)
1265                 handle_irq_beacon(dev);
1266         if (reason & B43legacy_IRQ_PMQ)
1267                 handle_irq_pmq(dev);
1268         if (reason & B43legacy_IRQ_TXFIFO_FLUSH_OK)
1269                 ;/*TODO*/
1270         if (reason & B43legacy_IRQ_NOISESAMPLE_OK)
1271                 handle_irq_noise(dev);
1272
1273         /* Check the DMA reason registers for received data. */
1274         if (dma_reason[0] & B43legacy_DMAIRQ_RX_DONE) {
1275                 if (b43legacy_using_pio(dev))
1276                         b43legacy_pio_rx(dev->pio.queue0);
1277                 else
1278                         b43legacy_dma_rx(dev->dma.rx_ring0);
1279         }
1280         B43legacy_WARN_ON(dma_reason[1] & B43legacy_DMAIRQ_RX_DONE);
1281         B43legacy_WARN_ON(dma_reason[2] & B43legacy_DMAIRQ_RX_DONE);
1282         if (dma_reason[3] & B43legacy_DMAIRQ_RX_DONE) {
1283                 if (b43legacy_using_pio(dev))
1284                         b43legacy_pio_rx(dev->pio.queue3);
1285                 else
1286                         b43legacy_dma_rx(dev->dma.rx_ring3);
1287         }
1288         B43legacy_WARN_ON(dma_reason[4] & B43legacy_DMAIRQ_RX_DONE);
1289         B43legacy_WARN_ON(dma_reason[5] & B43legacy_DMAIRQ_RX_DONE);
1290
1291         if (reason & B43legacy_IRQ_TX_OK)
1292                 handle_irq_transmit_status(dev);
1293
1294         b43legacy_interrupt_enable(dev, dev->irq_savedstate);
1295         mmiowb();
1296         spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1297 }
1298
1299 static void pio_irq_workaround(struct b43legacy_wldev *dev,
1300                                u16 base, int queueidx)
1301 {
1302         u16 rxctl;
1303
1304         rxctl = b43legacy_read16(dev, base + B43legacy_PIO_RXCTL);
1305         if (rxctl & B43legacy_PIO_RXCTL_DATAAVAILABLE)
1306                 dev->dma_reason[queueidx] |= B43legacy_DMAIRQ_RX_DONE;
1307         else
1308                 dev->dma_reason[queueidx] &= ~B43legacy_DMAIRQ_RX_DONE;
1309 }
1310
1311 static void b43legacy_interrupt_ack(struct b43legacy_wldev *dev, u32 reason)
1312 {
1313         if (b43legacy_using_pio(dev) &&
1314             (dev->dev->id.revision < 3) &&
1315             (!(reason & B43legacy_IRQ_PIO_WORKAROUND))) {
1316                 /* Apply a PIO specific workaround to the dma_reasons */
1317                 pio_irq_workaround(dev, B43legacy_MMIO_PIO1_BASE, 0);
1318                 pio_irq_workaround(dev, B43legacy_MMIO_PIO2_BASE, 1);
1319                 pio_irq_workaround(dev, B43legacy_MMIO_PIO3_BASE, 2);
1320                 pio_irq_workaround(dev, B43legacy_MMIO_PIO4_BASE, 3);
1321         }
1322
1323         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, reason);
1324
1325         b43legacy_write32(dev, B43legacy_MMIO_DMA0_REASON,
1326                           dev->dma_reason[0]);
1327         b43legacy_write32(dev, B43legacy_MMIO_DMA1_REASON,
1328                           dev->dma_reason[1]);
1329         b43legacy_write32(dev, B43legacy_MMIO_DMA2_REASON,
1330                           dev->dma_reason[2]);
1331         b43legacy_write32(dev, B43legacy_MMIO_DMA3_REASON,
1332                           dev->dma_reason[3]);
1333         b43legacy_write32(dev, B43legacy_MMIO_DMA4_REASON,
1334                           dev->dma_reason[4]);
1335         b43legacy_write32(dev, B43legacy_MMIO_DMA5_REASON,
1336                           dev->dma_reason[5]);
1337 }
1338
1339 /* Interrupt handler top-half */
1340 static irqreturn_t b43legacy_interrupt_handler(int irq, void *dev_id)
1341 {
1342         irqreturn_t ret = IRQ_NONE;
1343         struct b43legacy_wldev *dev = dev_id;
1344         u32 reason;
1345
1346         if (!dev)
1347                 return IRQ_NONE;
1348
1349         spin_lock(&dev->wl->irq_lock);
1350
1351         if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
1352                 goto out;
1353         reason = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1354         if (reason == 0xffffffff) /* shared IRQ */
1355                 goto out;
1356         ret = IRQ_HANDLED;
1357         reason &= b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
1358         if (!reason)
1359                 goto out;
1360
1361         dev->dma_reason[0] = b43legacy_read32(dev,
1362                                               B43legacy_MMIO_DMA0_REASON)
1363                                               & 0x0001DC00;
1364         dev->dma_reason[1] = b43legacy_read32(dev,
1365                                               B43legacy_MMIO_DMA1_REASON)
1366                                               & 0x0000DC00;
1367         dev->dma_reason[2] = b43legacy_read32(dev,
1368                                               B43legacy_MMIO_DMA2_REASON)
1369                                               & 0x0000DC00;
1370         dev->dma_reason[3] = b43legacy_read32(dev,
1371                                               B43legacy_MMIO_DMA3_REASON)
1372                                               & 0x0001DC00;
1373         dev->dma_reason[4] = b43legacy_read32(dev,
1374                                               B43legacy_MMIO_DMA4_REASON)
1375                                               & 0x0000DC00;
1376         dev->dma_reason[5] = b43legacy_read32(dev,
1377                                               B43legacy_MMIO_DMA5_REASON)
1378                                               & 0x0000DC00;
1379
1380         b43legacy_interrupt_ack(dev, reason);
1381         /* disable all IRQs. They are enabled again in the bottom half. */
1382         dev->irq_savedstate = b43legacy_interrupt_disable(dev,
1383                                                           B43legacy_IRQ_ALL);
1384         /* save the reason code and call our bottom half. */
1385         dev->irq_reason = reason;
1386         tasklet_schedule(&dev->isr_tasklet);
1387 out:
1388         mmiowb();
1389         spin_unlock(&dev->wl->irq_lock);
1390
1391         return ret;
1392 }
1393
1394 static void b43legacy_release_firmware(struct b43legacy_wldev *dev)
1395 {
1396         release_firmware(dev->fw.ucode);
1397         dev->fw.ucode = NULL;
1398         release_firmware(dev->fw.pcm);
1399         dev->fw.pcm = NULL;
1400         release_firmware(dev->fw.initvals);
1401         dev->fw.initvals = NULL;
1402         release_firmware(dev->fw.initvals_band);
1403         dev->fw.initvals_band = NULL;
1404 }
1405
1406 static void b43legacy_print_fw_helptext(struct b43legacy_wl *wl)
1407 {
1408         b43legacyerr(wl, "You must go to http://linuxwireless.org/en/users/"
1409                      "Drivers/b43#devicefirmware "
1410                      "and download the correct firmware (version 3).\n");
1411 }
1412
1413 static int do_request_fw(struct b43legacy_wldev *dev,
1414                          const char *name,
1415                          const struct firmware **fw)
1416 {
1417         char path[sizeof(modparam_fwpostfix) + 32];
1418         struct b43legacy_fw_header *hdr;
1419         u32 size;
1420         int err;
1421
1422         if (!name)
1423                 return 0;
1424
1425         snprintf(path, ARRAY_SIZE(path),
1426                  "b43legacy%s/%s.fw",
1427                  modparam_fwpostfix, name);
1428         err = request_firmware(fw, path, dev->dev->dev);
1429         if (err) {
1430                 b43legacyerr(dev->wl, "Firmware file \"%s\" not found "
1431                        "or load failed.\n", path);
1432                 return err;
1433         }
1434         if ((*fw)->size < sizeof(struct b43legacy_fw_header))
1435                 goto err_format;
1436         hdr = (struct b43legacy_fw_header *)((*fw)->data);
1437         switch (hdr->type) {
1438         case B43legacy_FW_TYPE_UCODE:
1439         case B43legacy_FW_TYPE_PCM:
1440                 size = be32_to_cpu(hdr->size);
1441                 if (size != (*fw)->size - sizeof(struct b43legacy_fw_header))
1442                         goto err_format;
1443                 /* fallthrough */
1444         case B43legacy_FW_TYPE_IV:
1445                 if (hdr->ver != 1)
1446                         goto err_format;
1447                 break;
1448         default:
1449                 goto err_format;
1450         }
1451
1452         return err;
1453
1454 err_format:
1455         b43legacyerr(dev->wl, "Firmware file \"%s\" format error.\n", path);
1456         return -EPROTO;
1457 }
1458
1459 static int b43legacy_request_firmware(struct b43legacy_wldev *dev)
1460 {
1461         struct b43legacy_firmware *fw = &dev->fw;
1462         const u8 rev = dev->dev->id.revision;
1463         const char *filename;
1464         u32 tmshigh;
1465         int err;
1466
1467         tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
1468         if (!fw->ucode) {
1469                 if (rev == 2)
1470                         filename = "ucode2";
1471                 else if (rev == 4)
1472                         filename = "ucode4";
1473                 else
1474                         filename = "ucode5";
1475                 err = do_request_fw(dev, filename, &fw->ucode);
1476                 if (err)
1477                         goto err_load;
1478         }
1479         if (!fw->pcm) {
1480                 if (rev < 5)
1481                         filename = "pcm4";
1482                 else
1483                         filename = "pcm5";
1484                 err = do_request_fw(dev, filename, &fw->pcm);
1485                 if (err)
1486                         goto err_load;
1487         }
1488         if (!fw->initvals) {
1489                 switch (dev->phy.type) {
1490                 case B43legacy_PHYTYPE_G:
1491                         if ((rev >= 5) && (rev <= 10))
1492                                 filename = "b0g0initvals5";
1493                         else if (rev == 2 || rev == 4)
1494                                 filename = "b0g0initvals2";
1495                         else
1496                                 goto err_no_initvals;
1497                         break;
1498                 default:
1499                         goto err_no_initvals;
1500                 }
1501                 err = do_request_fw(dev, filename, &fw->initvals);
1502                 if (err)
1503                         goto err_load;
1504         }
1505         if (!fw->initvals_band) {
1506                 switch (dev->phy.type) {
1507                 case B43legacy_PHYTYPE_G:
1508                         if ((rev >= 5) && (rev <= 10))
1509                                 filename = "b0g0bsinitvals5";
1510                         else if (rev >= 11)
1511                                 filename = NULL;
1512                         else if (rev == 2 || rev == 4)
1513                                 filename = NULL;
1514                         else
1515                                 goto err_no_initvals;
1516                         break;
1517                 default:
1518                         goto err_no_initvals;
1519                 }
1520                 err = do_request_fw(dev, filename, &fw->initvals_band);
1521                 if (err)
1522                         goto err_load;
1523         }
1524
1525         return 0;
1526
1527 err_load:
1528         b43legacy_print_fw_helptext(dev->wl);
1529         goto error;
1530
1531 err_no_initvals:
1532         err = -ENODEV;
1533         b43legacyerr(dev->wl, "No Initial Values firmware file for PHY %u, "
1534                "core rev %u\n", dev->phy.type, rev);
1535         goto error;
1536
1537 error:
1538         b43legacy_release_firmware(dev);
1539         return err;
1540 }
1541
1542 static int b43legacy_upload_microcode(struct b43legacy_wldev *dev)
1543 {
1544         const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1545         const __be32 *data;
1546         unsigned int i;
1547         unsigned int len;
1548         u16 fwrev;
1549         u16 fwpatch;
1550         u16 fwdate;
1551         u16 fwtime;
1552         u32 tmp;
1553         int err = 0;
1554
1555         /* Upload Microcode. */
1556         data = (__be32 *) (dev->fw.ucode->data + hdr_len);
1557         len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32);
1558         b43legacy_shm_control_word(dev,
1559                                    B43legacy_SHM_UCODE |
1560                                    B43legacy_SHM_AUTOINC_W,
1561                                    0x0000);
1562         for (i = 0; i < len; i++) {
1563                 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1564                                     be32_to_cpu(data[i]));
1565                 udelay(10);
1566         }
1567
1568         if (dev->fw.pcm) {
1569                 /* Upload PCM data. */
1570                 data = (__be32 *) (dev->fw.pcm->data + hdr_len);
1571                 len = (dev->fw.pcm->size - hdr_len) / sizeof(__be32);
1572                 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EA);
1573                 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 0x00004000);
1574                 /* No need for autoinc bit in SHM_HW */
1575                 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EB);
1576                 for (i = 0; i < len; i++) {
1577                         b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1578                                           be32_to_cpu(data[i]));
1579                         udelay(10);
1580                 }
1581         }
1582
1583         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1584                           B43legacy_IRQ_ALL);
1585         b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, 0x00020402);
1586
1587         /* Wait for the microcode to load and respond */
1588         i = 0;
1589         while (1) {
1590                 tmp = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1591                 if (tmp == B43legacy_IRQ_MAC_SUSPENDED)
1592                         break;
1593                 i++;
1594                 if (i >= B43legacy_IRQWAIT_MAX_RETRIES) {
1595                         b43legacyerr(dev->wl, "Microcode not responding\n");
1596                         b43legacy_print_fw_helptext(dev->wl);
1597                         err = -ENODEV;
1598                         goto out;
1599                 }
1600                 udelay(10);
1601         }
1602         /* dummy read follows */
1603         b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1604
1605         /* Get and check the revisions. */
1606         fwrev = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1607                                      B43legacy_SHM_SH_UCODEREV);
1608         fwpatch = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1609                                        B43legacy_SHM_SH_UCODEPATCH);
1610         fwdate = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1611                                       B43legacy_SHM_SH_UCODEDATE);
1612         fwtime = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1613                                       B43legacy_SHM_SH_UCODETIME);
1614
1615         if (fwrev > 0x128) {
1616                 b43legacyerr(dev->wl, "YOU ARE TRYING TO LOAD V4 FIRMWARE."
1617                              " Only firmware from binary drivers version 3.x"
1618                              " is supported. You must change your firmware"
1619                              " files.\n");
1620                 b43legacy_print_fw_helptext(dev->wl);
1621                 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, 0);
1622                 err = -EOPNOTSUPP;
1623                 goto out;
1624         }
1625         b43legacydbg(dev->wl, "Loading firmware version 0x%X, patch level %u "
1626                "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev, fwpatch,
1627                (fwdate >> 12) & 0xF, (fwdate >> 8) & 0xF, fwdate & 0xFF,
1628                (fwtime >> 11) & 0x1F, (fwtime >> 5) & 0x3F, fwtime & 0x1F);
1629
1630         dev->fw.rev = fwrev;
1631         dev->fw.patch = fwpatch;
1632
1633 out:
1634         return err;
1635 }
1636
1637 static int b43legacy_write_initvals(struct b43legacy_wldev *dev,
1638                                     const struct b43legacy_iv *ivals,
1639                                     size_t count,
1640                                     size_t array_size)
1641 {
1642         const struct b43legacy_iv *iv;
1643         u16 offset;
1644         size_t i;
1645         bool bit32;
1646
1647         BUILD_BUG_ON(sizeof(struct b43legacy_iv) != 6);
1648         iv = ivals;
1649         for (i = 0; i < count; i++) {
1650                 if (array_size < sizeof(iv->offset_size))
1651                         goto err_format;
1652                 array_size -= sizeof(iv->offset_size);
1653                 offset = be16_to_cpu(iv->offset_size);
1654                 bit32 = !!(offset & B43legacy_IV_32BIT);
1655                 offset &= B43legacy_IV_OFFSET_MASK;
1656                 if (offset >= 0x1000)
1657                         goto err_format;
1658                 if (bit32) {
1659                         u32 value;
1660
1661                         if (array_size < sizeof(iv->data.d32))
1662                                 goto err_format;
1663                         array_size -= sizeof(iv->data.d32);
1664
1665                         value = be32_to_cpu(get_unaligned(&iv->data.d32));
1666                         b43legacy_write32(dev, offset, value);
1667
1668                         iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1669                                                         sizeof(__be16) +
1670                                                         sizeof(__be32));
1671                 } else {
1672                         u16 value;
1673
1674                         if (array_size < sizeof(iv->data.d16))
1675                                 goto err_format;
1676                         array_size -= sizeof(iv->data.d16);
1677
1678                         value = be16_to_cpu(iv->data.d16);
1679                         b43legacy_write16(dev, offset, value);
1680
1681                         iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1682                                                         sizeof(__be16) +
1683                                                         sizeof(__be16));
1684                 }
1685         }
1686         if (array_size)
1687                 goto err_format;
1688
1689         return 0;
1690
1691 err_format:
1692         b43legacyerr(dev->wl, "Initial Values Firmware file-format error.\n");
1693         b43legacy_print_fw_helptext(dev->wl);
1694
1695         return -EPROTO;
1696 }
1697
1698 static int b43legacy_upload_initvals(struct b43legacy_wldev *dev)
1699 {
1700         const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1701         const struct b43legacy_fw_header *hdr;
1702         struct b43legacy_firmware *fw = &dev->fw;
1703         const struct b43legacy_iv *ivals;
1704         size_t count;
1705         int err;
1706
1707         hdr = (const struct b43legacy_fw_header *)(fw->initvals->data);
1708         ivals = (const struct b43legacy_iv *)(fw->initvals->data + hdr_len);
1709         count = be32_to_cpu(hdr->size);
1710         err = b43legacy_write_initvals(dev, ivals, count,
1711                                  fw->initvals->size - hdr_len);
1712         if (err)
1713                 goto out;
1714         if (fw->initvals_band) {
1715                 hdr = (const struct b43legacy_fw_header *)
1716                       (fw->initvals_band->data);
1717                 ivals = (const struct b43legacy_iv *)(fw->initvals_band->data
1718                         + hdr_len);
1719                 count = be32_to_cpu(hdr->size);
1720                 err = b43legacy_write_initvals(dev, ivals, count,
1721                                          fw->initvals_band->size - hdr_len);
1722                 if (err)
1723                         goto out;
1724         }
1725 out:
1726
1727         return err;
1728 }
1729
1730 /* Initialize the GPIOs
1731  * http://bcm-specs.sipsolutions.net/GPIO
1732  */
1733 static int b43legacy_gpio_init(struct b43legacy_wldev *dev)
1734 {
1735         struct ssb_bus *bus = dev->dev->bus;
1736         struct ssb_device *gpiodev, *pcidev = NULL;
1737         u32 mask;
1738         u32 set;
1739
1740         b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD,
1741                           b43legacy_read32(dev,
1742                           B43legacy_MMIO_STATUS_BITFIELD)
1743                           & 0xFFFF3FFF);
1744
1745         b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1746                           b43legacy_read16(dev,
1747                           B43legacy_MMIO_GPIO_MASK)
1748                           | 0x000F);
1749
1750         mask = 0x0000001F;
1751         set = 0x0000000F;
1752         if (dev->dev->bus->chip_id == 0x4301) {
1753                 mask |= 0x0060;
1754                 set |= 0x0060;
1755         }
1756         if (dev->dev->bus->sprom.r1.boardflags_lo & B43legacy_BFL_PACTRL) {
1757                 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1758                                   b43legacy_read16(dev,
1759                                   B43legacy_MMIO_GPIO_MASK)
1760                                   | 0x0200);
1761                 mask |= 0x0200;
1762                 set |= 0x0200;
1763         }
1764         if (dev->dev->id.revision >= 2)
1765                 mask  |= 0x0010; /* FIXME: This is redundant. */
1766
1767 #ifdef CONFIG_SSB_DRIVER_PCICORE
1768         pcidev = bus->pcicore.dev;
1769 #endif
1770         gpiodev = bus->chipco.dev ? : pcidev;
1771         if (!gpiodev)
1772                 return 0;
1773         ssb_write32(gpiodev, B43legacy_GPIO_CONTROL,
1774                     (ssb_read32(gpiodev, B43legacy_GPIO_CONTROL)
1775                      & mask) | set);
1776
1777         return 0;
1778 }
1779
1780 /* Turn off all GPIO stuff. Call this on module unload, for example. */
1781 static void b43legacy_gpio_cleanup(struct b43legacy_wldev *dev)
1782 {
1783         struct ssb_bus *bus = dev->dev->bus;
1784         struct ssb_device *gpiodev, *pcidev = NULL;
1785
1786 #ifdef CONFIG_SSB_DRIVER_PCICORE
1787         pcidev = bus->pcicore.dev;
1788 #endif
1789         gpiodev = bus->chipco.dev ? : pcidev;
1790         if (!gpiodev)
1791                 return;
1792         ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, 0);
1793 }
1794
1795 /* http://bcm-specs.sipsolutions.net/EnableMac */
1796 void b43legacy_mac_enable(struct b43legacy_wldev *dev)
1797 {
1798         dev->mac_suspended--;
1799         B43legacy_WARN_ON(dev->mac_suspended < 0);
1800         if (dev->mac_suspended == 0) {
1801                 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD,
1802                                   b43legacy_read32(dev,
1803                                   B43legacy_MMIO_STATUS_BITFIELD)
1804                                   | B43legacy_SBF_MAC_ENABLED);
1805                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1806                                   B43legacy_IRQ_MAC_SUSPENDED);
1807                 /* the next two are dummy reads */
1808                 b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
1809                 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1810                 b43legacy_power_saving_ctl_bits(dev, -1, -1);
1811         }
1812 }
1813
1814 /* http://bcm-specs.sipsolutions.net/SuspendMAC */
1815 void b43legacy_mac_suspend(struct b43legacy_wldev *dev)
1816 {
1817         int i;
1818         u32 tmp;
1819
1820         B43legacy_WARN_ON(dev->mac_suspended < 0);
1821         if (dev->mac_suspended == 0) {
1822                 b43legacy_power_saving_ctl_bits(dev, -1, 1);
1823                 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD,
1824                                   b43legacy_read32(dev,
1825                                   B43legacy_MMIO_STATUS_BITFIELD)
1826                                   & ~B43legacy_SBF_MAC_ENABLED);
1827                 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1828                 for (i = 10000; i; i--) {
1829                         tmp = b43legacy_read32(dev,
1830                                                B43legacy_MMIO_GEN_IRQ_REASON);
1831                         if (tmp & B43legacy_IRQ_MAC_SUSPENDED)
1832                                 goto out;
1833                         udelay(1);
1834                 }
1835                 b43legacyerr(dev->wl, "MAC suspend failed\n");
1836         }
1837 out:
1838         dev->mac_suspended++;
1839 }
1840
1841 static void b43legacy_adjust_opmode(struct b43legacy_wldev *dev)
1842 {
1843         struct b43legacy_wl *wl = dev->wl;
1844         u32 ctl;
1845         u16 cfp_pretbtt;
1846
1847         ctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1848         /* Reset status to STA infrastructure mode. */
1849         ctl &= ~B43legacy_MACCTL_AP;
1850         ctl &= ~B43legacy_MACCTL_KEEP_CTL;
1851         ctl &= ~B43legacy_MACCTL_KEEP_BADPLCP;
1852         ctl &= ~B43legacy_MACCTL_KEEP_BAD;
1853         ctl &= ~B43legacy_MACCTL_PROMISC;
1854         ctl &= ~B43legacy_MACCTL_BEACPROMISC;
1855         ctl |= B43legacy_MACCTL_INFRA;
1856
1857         if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP))
1858                 ctl |= B43legacy_MACCTL_AP;
1859         else if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_IBSS))
1860                 ctl &= ~B43legacy_MACCTL_INFRA;
1861
1862         if (wl->filter_flags & FIF_CONTROL)
1863                 ctl |= B43legacy_MACCTL_KEEP_CTL;
1864         if (wl->filter_flags & FIF_FCSFAIL)
1865                 ctl |= B43legacy_MACCTL_KEEP_BAD;
1866         if (wl->filter_flags & FIF_PLCPFAIL)
1867                 ctl |= B43legacy_MACCTL_KEEP_BADPLCP;
1868         if (wl->filter_flags & FIF_PROMISC_IN_BSS)
1869                 ctl |= B43legacy_MACCTL_PROMISC;
1870         if (wl->filter_flags & FIF_BCN_PRBRESP_PROMISC)
1871                 ctl |= B43legacy_MACCTL_BEACPROMISC;
1872
1873         /* Workaround: On old hardware the HW-MAC-address-filter
1874          * doesn't work properly, so always run promisc in filter
1875          * it in software. */
1876         if (dev->dev->id.revision <= 4)
1877                 ctl |= B43legacy_MACCTL_PROMISC;
1878
1879         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, ctl);
1880
1881         cfp_pretbtt = 2;
1882         if ((ctl & B43legacy_MACCTL_INFRA) &&
1883             !(ctl & B43legacy_MACCTL_AP)) {
1884                 if (dev->dev->bus->chip_id == 0x4306 &&
1885                     dev->dev->bus->chip_rev == 3)
1886                         cfp_pretbtt = 100;
1887                 else
1888                         cfp_pretbtt = 50;
1889         }
1890         b43legacy_write16(dev, 0x612, cfp_pretbtt);
1891 }
1892
1893 static void b43legacy_rate_memory_write(struct b43legacy_wldev *dev,
1894                                         u16 rate,
1895                                         int is_ofdm)
1896 {
1897         u16 offset;
1898
1899         if (is_ofdm) {
1900                 offset = 0x480;
1901                 offset += (b43legacy_plcp_get_ratecode_ofdm(rate) & 0x000F) * 2;
1902         } else {
1903                 offset = 0x4C0;
1904                 offset += (b43legacy_plcp_get_ratecode_cck(rate) & 0x000F) * 2;
1905         }
1906         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, offset + 0x20,
1907                               b43legacy_shm_read16(dev,
1908                               B43legacy_SHM_SHARED, offset));
1909 }
1910
1911 static void b43legacy_rate_memory_init(struct b43legacy_wldev *dev)
1912 {
1913         switch (dev->phy.type) {
1914         case B43legacy_PHYTYPE_G:
1915                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_6MB, 1);
1916                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_12MB, 1);
1917                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_18MB, 1);
1918                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_24MB, 1);
1919                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_36MB, 1);
1920                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_48MB, 1);
1921                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_54MB, 1);
1922                 /* fallthrough */
1923         case B43legacy_PHYTYPE_B:
1924                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_1MB, 0);
1925                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_2MB, 0);
1926                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_5MB, 0);
1927                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_11MB, 0);
1928                 break;
1929         default:
1930                 B43legacy_BUG_ON(1);
1931         }
1932 }
1933
1934 /* Set the TX-Antenna for management frames sent by firmware. */
1935 static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev *dev,
1936                                           int antenna)
1937 {
1938         u16 ant = 0;
1939         u16 tmp;
1940
1941         switch (antenna) {
1942         case B43legacy_ANTENNA0:
1943                 ant |= B43legacy_TX4_PHY_ANT0;
1944                 break;
1945         case B43legacy_ANTENNA1:
1946                 ant |= B43legacy_TX4_PHY_ANT1;
1947                 break;
1948         case B43legacy_ANTENNA_AUTO:
1949                 ant |= B43legacy_TX4_PHY_ANTLAST;
1950                 break;
1951         default:
1952                 B43legacy_BUG_ON(1);
1953         }
1954
1955         /* FIXME We also need to set the other flags of the PHY control
1956          * field somewhere. */
1957
1958         /* For Beacons */
1959         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1960                                    B43legacy_SHM_SH_BEACPHYCTL);
1961         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
1962         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1963                               B43legacy_SHM_SH_BEACPHYCTL, tmp);
1964         /* For ACK/CTS */
1965         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1966                                    B43legacy_SHM_SH_ACKCTSPHYCTL);
1967         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
1968         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1969                               B43legacy_SHM_SH_ACKCTSPHYCTL, tmp);
1970         /* For Probe Resposes */
1971         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1972                                    B43legacy_SHM_SH_PRPHYCTL);
1973         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
1974         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1975                               B43legacy_SHM_SH_PRPHYCTL, tmp);
1976 }
1977
1978 /* This is the opposite of b43legacy_chip_init() */
1979 static void b43legacy_chip_exit(struct b43legacy_wldev *dev)
1980 {
1981         b43legacy_radio_turn_off(dev, 1);
1982         b43legacy_leds_exit(dev);
1983         b43legacy_gpio_cleanup(dev);
1984         /* firmware is released later */
1985 }
1986
1987 /* Initialize the chip
1988  * http://bcm-specs.sipsolutions.net/ChipInit
1989  */
1990 static int b43legacy_chip_init(struct b43legacy_wldev *dev)
1991 {
1992         struct b43legacy_phy *phy = &dev->phy;
1993         int err;
1994         int tmp;
1995         u32 value32;
1996         u16 value16;
1997
1998         b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD,
1999                           B43legacy_SBF_CORE_READY
2000                           | B43legacy_SBF_400);
2001
2002         err = b43legacy_request_firmware(dev);
2003         if (err)
2004                 goto out;
2005         err = b43legacy_upload_microcode(dev);
2006         if (err)
2007                 goto out; /* firmware is released later */
2008
2009         err = b43legacy_gpio_init(dev);
2010         if (err)
2011                 goto out; /* firmware is released later */
2012         b43legacy_leds_init(dev);
2013
2014         err = b43legacy_upload_initvals(dev);
2015         if (err)
2016                 goto err_leds_exit;
2017         b43legacy_radio_turn_on(dev);
2018
2019         b43legacy_write16(dev, 0x03E6, 0x0000);
2020         err = b43legacy_phy_init(dev);
2021         if (err)
2022                 goto err_radio_off;
2023
2024         /* Select initial Interference Mitigation. */
2025         tmp = phy->interfmode;
2026         phy->interfmode = B43legacy_INTERFMODE_NONE;
2027         b43legacy_radio_set_interference_mitigation(dev, tmp);
2028
2029         b43legacy_phy_set_antenna_diversity(dev);
2030         b43legacy_mgmtframe_txantenna(dev, B43legacy_ANTENNA_DEFAULT);
2031
2032         if (phy->type == B43legacy_PHYTYPE_B) {
2033                 value16 = b43legacy_read16(dev, 0x005E);
2034                 value16 |= 0x0004;
2035                 b43legacy_write16(dev, 0x005E, value16);
2036         }
2037         b43legacy_write32(dev, 0x0100, 0x01000000);
2038         if (dev->dev->id.revision < 5)
2039                 b43legacy_write32(dev, 0x010C, 0x01000000);
2040
2041         value32 = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
2042         value32 &= ~B43legacy_SBF_MODE_NOTADHOC;
2043         b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, value32);
2044         value32 = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD);
2045         value32 |= B43legacy_SBF_MODE_NOTADHOC;
2046         b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, value32);
2047
2048         if (b43legacy_using_pio(dev)) {
2049                 b43legacy_write32(dev, 0x0210, 0x00000100);
2050                 b43legacy_write32(dev, 0x0230, 0x00000100);
2051                 b43legacy_write32(dev, 0x0250, 0x00000100);
2052                 b43legacy_write32(dev, 0x0270, 0x00000100);
2053                 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0034,
2054                                       0x0000);
2055         }
2056
2057         /* Probe Response Timeout value */
2058         /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
2059         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0074, 0x0000);
2060
2061         /* Initially set the wireless operation mode. */
2062         b43legacy_adjust_opmode(dev);
2063
2064         if (dev->dev->id.revision < 3) {
2065                 b43legacy_write16(dev, 0x060E, 0x0000);
2066                 b43legacy_write16(dev, 0x0610, 0x8000);
2067                 b43legacy_write16(dev, 0x0604, 0x0000);
2068                 b43legacy_write16(dev, 0x0606, 0x0200);
2069         } else {
2070                 b43legacy_write32(dev, 0x0188, 0x80000000);
2071                 b43legacy_write32(dev, 0x018C, 0x02000000);
2072         }
2073         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 0x00004000);
2074         b43legacy_write32(dev, B43legacy_MMIO_DMA0_IRQ_MASK, 0x0001DC00);
2075         b43legacy_write32(dev, B43legacy_MMIO_DMA1_IRQ_MASK, 0x0000DC00);
2076         b43legacy_write32(dev, B43legacy_MMIO_DMA2_IRQ_MASK, 0x0000DC00);
2077         b43legacy_write32(dev, B43legacy_MMIO_DMA3_IRQ_MASK, 0x0001DC00);
2078         b43legacy_write32(dev, B43legacy_MMIO_DMA4_IRQ_MASK, 0x0000DC00);
2079         b43legacy_write32(dev, B43legacy_MMIO_DMA5_IRQ_MASK, 0x0000DC00);
2080
2081         value32 = ssb_read32(dev->dev, SSB_TMSLOW);
2082         value32 |= 0x00100000;
2083         ssb_write32(dev->dev, SSB_TMSLOW, value32);
2084
2085         b43legacy_write16(dev, B43legacy_MMIO_POWERUP_DELAY,
2086                           dev->dev->bus->chipco.fast_pwrup_delay);
2087
2088         B43legacy_WARN_ON(err != 0);
2089         b43legacydbg(dev->wl, "Chip initialized\n");
2090 out:
2091         return err;
2092
2093 err_radio_off:
2094         b43legacy_radio_turn_off(dev, 1);
2095 err_leds_exit:
2096         b43legacy_leds_exit(dev);
2097         b43legacy_gpio_cleanup(dev);
2098         goto out;
2099 }
2100
2101 static void b43legacy_periodic_every120sec(struct b43legacy_wldev *dev)
2102 {
2103         struct b43legacy_phy *phy = &dev->phy;
2104
2105         if (phy->type != B43legacy_PHYTYPE_G || phy->rev < 2)
2106                 return;
2107
2108         b43legacy_mac_suspend(dev);
2109         b43legacy_phy_lo_g_measure(dev);
2110         b43legacy_mac_enable(dev);
2111 }
2112
2113 static void b43legacy_periodic_every60sec(struct b43legacy_wldev *dev)
2114 {
2115         b43legacy_phy_lo_mark_all_unused(dev);
2116         if (dev->dev->bus->sprom.r1.boardflags_lo & B43legacy_BFL_RSSI) {
2117                 b43legacy_mac_suspend(dev);
2118                 b43legacy_calc_nrssi_slope(dev);
2119                 b43legacy_mac_enable(dev);
2120         }
2121 }
2122
2123 static void b43legacy_periodic_every30sec(struct b43legacy_wldev *dev)
2124 {
2125         /* Update device statistics. */
2126         b43legacy_calculate_link_quality(dev);
2127 }
2128
2129 static void b43legacy_periodic_every15sec(struct b43legacy_wldev *dev)
2130 {
2131         b43legacy_phy_xmitpower(dev); /* FIXME: unless scanning? */
2132 }
2133
2134 static void do_periodic_work(struct b43legacy_wldev *dev)
2135 {
2136         unsigned int state;
2137
2138         state = dev->periodic_state;
2139         if (state % 8 == 0)
2140                 b43legacy_periodic_every120sec(dev);
2141         if (state % 4 == 0)
2142                 b43legacy_periodic_every60sec(dev);
2143         if (state % 2 == 0)
2144                 b43legacy_periodic_every30sec(dev);
2145         b43legacy_periodic_every15sec(dev);
2146 }
2147
2148 /* Estimate a "Badness" value based on the periodic work
2149  * state-machine state. "Badness" is worse (bigger), if the
2150  * periodic work will take longer.
2151  */
2152 static int estimate_periodic_work_badness(unsigned int state)
2153 {
2154         int badness = 0;
2155
2156         if (state % 8 == 0)     /* every 120 sec */
2157                 badness += 10;
2158         if (state % 4 == 0)     /* every 60 sec */
2159                 badness += 5;
2160         if (state % 2 == 0)     /* every 30 sec */
2161                 badness += 1;
2162
2163 #define BADNESS_LIMIT   4
2164         return badness;
2165 }
2166
2167 static void b43legacy_periodic_work_handler(struct work_struct *work)
2168 {
2169         struct b43legacy_wldev *dev =
2170                              container_of(work, struct b43legacy_wldev,
2171                              periodic_work.work);
2172         unsigned long flags;
2173         unsigned long delay;
2174         u32 savedirqs = 0;
2175         int badness;
2176
2177         mutex_lock(&dev->wl->mutex);
2178
2179         if (unlikely(b43legacy_status(dev) != B43legacy_STAT_STARTED))
2180                 goto out;
2181         if (b43legacy_debug(dev, B43legacy_DBG_PWORK_STOP))
2182                 goto out_requeue;
2183
2184         badness = estimate_periodic_work_badness(dev->periodic_state);
2185         if (badness > BADNESS_LIMIT) {
2186                 spin_lock_irqsave(&dev->wl->irq_lock, flags);
2187                 /* Suspend TX as we don't want to transmit packets while
2188                  * we recalibrate the hardware. */
2189                 b43legacy_tx_suspend(dev);
2190                 savedirqs = b43legacy_interrupt_disable(dev,
2191                                                           B43legacy_IRQ_ALL);
2192                 /* Periodic work will take a long time, so we want it to
2193                  * be preemtible and release the spinlock. */
2194                 spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
2195                 b43legacy_synchronize_irq(dev);
2196
2197                 do_periodic_work(dev);
2198
2199                 spin_lock_irqsave(&dev->wl->irq_lock, flags);
2200                 b43legacy_interrupt_enable(dev, savedirqs);
2201                 b43legacy_tx_resume(dev);
2202                 mmiowb();
2203                 spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
2204         } else {
2205                 /* Take the global driver lock. This will lock any operation. */
2206                 spin_lock_irqsave(&dev->wl->irq_lock, flags);
2207
2208                 do_periodic_work(dev);
2209
2210                 mmiowb();
2211                 spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
2212         }
2213         dev->periodic_state++;
2214 out_requeue:
2215         if (b43legacy_debug(dev, B43legacy_DBG_PWORK_FAST))
2216                 delay = msecs_to_jiffies(50);
2217         else
2218                 delay = round_jiffies_relative(HZ * 15);
2219         queue_delayed_work(dev->wl->hw->workqueue,
2220                            &dev->periodic_work, delay);
2221 out:
2222         mutex_unlock(&dev->wl->mutex);
2223 }
2224
2225 static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev *dev)
2226 {
2227         struct delayed_work *work = &dev->periodic_work;
2228
2229         dev->periodic_state = 0;
2230         INIT_DELAYED_WORK(work, b43legacy_periodic_work_handler);
2231         queue_delayed_work(dev->wl->hw->workqueue, work, 0);
2232 }
2233
2234 /* Validate access to the chip (SHM) */
2235 static int b43legacy_validate_chipaccess(struct b43legacy_wldev *dev)
2236 {
2237         u32 value;
2238         u32 shm_backup;
2239
2240         shm_backup = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0);
2241         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0xAA5555AA);
2242         if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2243                                  0xAA5555AA)
2244                 goto error;
2245         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0x55AAAA55);
2246         if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2247                                  0x55AAAA55)
2248                 goto error;
2249         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, shm_backup);
2250
2251         value = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2252         if ((value | B43legacy_MACCTL_GMODE) !=
2253             (B43legacy_MACCTL_GMODE | B43legacy_MACCTL_IHR_ENABLED))
2254                 goto error;
2255
2256         value = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
2257         if (value)
2258                 goto error;
2259
2260         return 0;
2261 error:
2262         b43legacyerr(dev->wl, "Failed to validate the chipaccess\n");
2263         return -ENODEV;
2264 }
2265
2266 static void b43legacy_security_init(struct b43legacy_wldev *dev)
2267 {
2268         dev->max_nr_keys = (dev->dev->id.revision >= 5) ? 58 : 20;
2269         B43legacy_WARN_ON(dev->max_nr_keys > ARRAY_SIZE(dev->key));
2270         dev->ktp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2271                                         0x0056);
2272         /* KTP is a word address, but we address SHM bytewise.
2273          * So multiply by two.
2274          */
2275         dev->ktp *= 2;
2276         if (dev->dev->id.revision >= 5)
2277                 /* Number of RCMTA address slots */
2278                 b43legacy_write16(dev, B43legacy_MMIO_RCMTA_COUNT,
2279                                   dev->max_nr_keys - 8);
2280 }
2281
2282 static int b43legacy_rng_read(struct hwrng *rng, u32 *data)
2283 {
2284         struct b43legacy_wl *wl = (struct b43legacy_wl *)rng->priv;
2285         unsigned long flags;
2286
2287         /* Don't take wl->mutex here, as it could deadlock with
2288          * hwrng internal locking. It's not needed to take
2289          * wl->mutex here, anyway. */
2290
2291         spin_lock_irqsave(&wl->irq_lock, flags);
2292         *data = b43legacy_read16(wl->current_dev, B43legacy_MMIO_RNG);
2293         spin_unlock_irqrestore(&wl->irq_lock, flags);
2294
2295         return (sizeof(u16));
2296 }
2297
2298 static void b43legacy_rng_exit(struct b43legacy_wl *wl)
2299 {
2300         if (wl->rng_initialized)
2301                 hwrng_unregister(&wl->rng);
2302 }
2303
2304 static int b43legacy_rng_init(struct b43legacy_wl *wl)
2305 {
2306         int err;
2307
2308         snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name),
2309                  "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy));
2310         wl->rng.name = wl->rng_name;
2311         wl->rng.data_read = b43legacy_rng_read;
2312         wl->rng.priv = (unsigned long)wl;
2313         wl->rng_initialized = 1;
2314         err = hwrng_register(&wl->rng);
2315         if (err) {
2316                 wl->rng_initialized = 0;
2317                 b43legacyerr(wl, "Failed to register the random "
2318                        "number generator (%d)\n", err);
2319         }
2320
2321         return err;
2322 }
2323
2324 static int b43legacy_tx(struct ieee80211_hw *hw,
2325                         struct sk_buff *skb,
2326                         struct ieee80211_tx_control *ctl)
2327 {
2328         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2329         struct b43legacy_wldev *dev = wl->current_dev;
2330         int err = -ENODEV;
2331         unsigned long flags;
2332
2333         if (unlikely(!dev))
2334                 goto out;
2335         if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED))
2336                 goto out;
2337         /* DMA-TX is done without a global lock. */
2338         if (b43legacy_using_pio(dev)) {
2339                 spin_lock_irqsave(&wl->irq_lock, flags);
2340                 err = b43legacy_pio_tx(dev, skb, ctl);
2341                 spin_unlock_irqrestore(&wl->irq_lock, flags);
2342         } else
2343                 err = b43legacy_dma_tx(dev, skb, ctl);
2344 out:
2345         if (unlikely(err))
2346                 return NETDEV_TX_BUSY;
2347         return NETDEV_TX_OK;
2348 }
2349
2350 static int b43legacy_conf_tx(struct ieee80211_hw *hw,
2351                              int queue,
2352                              const struct ieee80211_tx_queue_params *params)
2353 {
2354         return 0;
2355 }
2356
2357 static int b43legacy_get_tx_stats(struct ieee80211_hw *hw,
2358                                   struct ieee80211_tx_queue_stats *stats)
2359 {
2360         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2361         struct b43legacy_wldev *dev = wl->current_dev;
2362         unsigned long flags;
2363         int err = -ENODEV;
2364
2365         if (!dev)
2366                 goto out;
2367         spin_lock_irqsave(&wl->irq_lock, flags);
2368         if (likely(b43legacy_status(dev) >= B43legacy_STAT_STARTED)) {
2369                 if (b43legacy_using_pio(dev))
2370                         b43legacy_pio_get_tx_stats(dev, stats);
2371                 else
2372                         b43legacy_dma_get_tx_stats(dev, stats);
2373                 err = 0;
2374         }
2375         spin_unlock_irqrestore(&wl->irq_lock, flags);
2376 out:
2377         return err;
2378 }
2379
2380 static int b43legacy_get_stats(struct ieee80211_hw *hw,
2381                                struct ieee80211_low_level_stats *stats)
2382 {
2383         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2384         unsigned long flags;
2385
2386         spin_lock_irqsave(&wl->irq_lock, flags);
2387         memcpy(stats, &wl->ieee_stats, sizeof(*stats));
2388         spin_unlock_irqrestore(&wl->irq_lock, flags);
2389
2390         return 0;
2391 }
2392
2393 static const char *phymode_to_string(unsigned int phymode)
2394 {
2395         switch (phymode) {
2396         case B43legacy_PHYMODE_B:
2397                 return "B";
2398         case B43legacy_PHYMODE_G:
2399                 return "G";
2400         default:
2401                 B43legacy_BUG_ON(1);
2402         }
2403         return "";
2404 }
2405
2406 static int find_wldev_for_phymode(struct b43legacy_wl *wl,
2407                                   unsigned int phymode,
2408                                   struct b43legacy_wldev **dev,
2409                                   bool *gmode)
2410 {
2411         struct b43legacy_wldev *d;
2412
2413         list_for_each_entry(d, &wl->devlist, list) {
2414                 if (d->phy.possible_phymodes & phymode) {
2415                         /* Ok, this device supports the PHY-mode.
2416                          * Set the gmode bit. */
2417                         *gmode = 1;
2418                         *dev = d;
2419
2420                         return 0;
2421                 }
2422         }
2423
2424         return -ESRCH;
2425 }
2426
2427 static void b43legacy_put_phy_into_reset(struct b43legacy_wldev *dev)
2428 {
2429         struct ssb_device *sdev = dev->dev;
2430         u32 tmslow;
2431
2432         tmslow = ssb_read32(sdev, SSB_TMSLOW);
2433         tmslow &= ~B43legacy_TMSLOW_GMODE;
2434         tmslow |= B43legacy_TMSLOW_PHYRESET;
2435         tmslow |= SSB_TMSLOW_FGC;
2436         ssb_write32(sdev, SSB_TMSLOW, tmslow);
2437         msleep(1);
2438
2439         tmslow = ssb_read32(sdev, SSB_TMSLOW);
2440         tmslow &= ~SSB_TMSLOW_FGC;
2441         tmslow |= B43legacy_TMSLOW_PHYRESET;
2442         ssb_write32(sdev, SSB_TMSLOW, tmslow);
2443         msleep(1);
2444 }
2445
2446 /* Expects wl->mutex locked */
2447 static int b43legacy_switch_phymode(struct b43legacy_wl *wl,
2448                                       unsigned int new_mode)
2449 {
2450         struct b43legacy_wldev *up_dev;
2451         struct b43legacy_wldev *down_dev;
2452         int err;
2453         bool gmode = 0;
2454         int prev_status;
2455
2456         err = find_wldev_for_phymode(wl, new_mode, &up_dev, &gmode);
2457         if (err) {
2458                 b43legacyerr(wl, "Could not find a device for %s-PHY mode\n",
2459                        phymode_to_string(new_mode));
2460                 return err;
2461         }
2462         if ((up_dev == wl->current_dev) &&
2463             (!!wl->current_dev->phy.gmode == !!gmode))
2464                 /* This device is already running. */
2465                 return 0;
2466         b43legacydbg(wl, "Reconfiguring PHYmode to %s-PHY\n",
2467                phymode_to_string(new_mode));
2468         down_dev = wl->current_dev;
2469
2470         prev_status = b43legacy_status(down_dev);
2471         /* Shutdown the currently running core. */
2472         if (prev_status >= B43legacy_STAT_STARTED)
2473                 b43legacy_wireless_core_stop(down_dev);
2474         if (prev_status >= B43legacy_STAT_INITIALIZED)
2475                 b43legacy_wireless_core_exit(down_dev);
2476
2477         if (down_dev != up_dev)
2478                 /* We switch to a different core, so we put PHY into
2479                  * RESET on the old core. */
2480                 b43legacy_put_phy_into_reset(down_dev);
2481
2482         /* Now start the new core. */
2483         up_dev->phy.gmode = gmode;
2484         if (prev_status >= B43legacy_STAT_INITIALIZED) {
2485                 err = b43legacy_wireless_core_init(up_dev);
2486                 if (err) {
2487                         b43legacyerr(wl, "Fatal: Could not initialize device"
2488                                      " for newly selected %s-PHY mode\n",
2489                                      phymode_to_string(new_mode));
2490                         goto init_failure;
2491                 }
2492         }
2493         if (prev_status >= B43legacy_STAT_STARTED) {
2494                 err = b43legacy_wireless_core_start(up_dev);
2495                 if (err) {
2496                         b43legacyerr(wl, "Fatal: Coult not start device for "
2497                                "newly selected %s-PHY mode\n",
2498                                phymode_to_string(new_mode));
2499                         b43legacy_wireless_core_exit(up_dev);
2500                         goto init_failure;
2501                 }
2502         }
2503         B43legacy_WARN_ON(b43legacy_status(up_dev) != prev_status);
2504
2505         b43legacy_shm_write32(up_dev, B43legacy_SHM_SHARED, 0x003E, 0);
2506
2507         wl->current_dev = up_dev;
2508
2509         return 0;
2510 init_failure:
2511         /* Whoops, failed to init the new core. No core is operating now. */
2512         wl->current_dev = NULL;
2513         return err;
2514 }
2515
2516 static int b43legacy_antenna_from_ieee80211(u8 antenna)
2517 {
2518         switch (antenna) {
2519         case 0: /* default/diversity */
2520                 return B43legacy_ANTENNA_DEFAULT;
2521         case 1: /* Antenna 0 */
2522                 return B43legacy_ANTENNA0;
2523         case 2: /* Antenna 1 */
2524                 return B43legacy_ANTENNA1;
2525         default:
2526                 return B43legacy_ANTENNA_DEFAULT;
2527         }
2528 }
2529
2530 static int b43legacy_dev_config(struct ieee80211_hw *hw,
2531                                 struct ieee80211_conf *conf)
2532 {
2533         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2534         struct b43legacy_wldev *dev;
2535         struct b43legacy_phy *phy;
2536         unsigned long flags;
2537         unsigned int new_phymode = 0xFFFF;
2538         int antenna_tx;
2539         int antenna_rx;
2540         int err = 0;
2541         u32 savedirqs;
2542
2543         antenna_tx = b43legacy_antenna_from_ieee80211(conf->antenna_sel_tx);
2544         antenna_rx = b43legacy_antenna_from_ieee80211(conf->antenna_sel_rx);
2545
2546         mutex_lock(&wl->mutex);
2547
2548         /* Switch the PHY mode (if necessary). */
2549         switch (conf->phymode) {
2550         case MODE_IEEE80211B:
2551                 new_phymode = B43legacy_PHYMODE_B;
2552                 break;
2553         case MODE_IEEE80211G:
2554                 new_phymode = B43legacy_PHYMODE_G;
2555                 break;
2556         default:
2557                 B43legacy_WARN_ON(1);
2558         }
2559         err = b43legacy_switch_phymode(wl, new_phymode);
2560         if (err)
2561                 goto out_unlock_mutex;
2562         dev = wl->current_dev;
2563         phy = &dev->phy;
2564
2565         /* Disable IRQs while reconfiguring the device.
2566          * This makes it possible to drop the spinlock throughout
2567          * the reconfiguration process. */
2568         spin_lock_irqsave(&wl->irq_lock, flags);
2569         if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2570                 spin_unlock_irqrestore(&wl->irq_lock, flags);
2571                 goto out_unlock_mutex;
2572         }
2573         savedirqs = b43legacy_interrupt_disable(dev, B43legacy_IRQ_ALL);
2574         spin_unlock_irqrestore(&wl->irq_lock, flags);
2575         b43legacy_synchronize_irq(dev);
2576
2577         /* Switch to the requested channel.
2578          * The firmware takes care of races with the TX handler. */
2579         if (conf->channel_val != phy->channel)
2580                 b43legacy_radio_selectchannel(dev, conf->channel_val, 0);
2581
2582         /* Enable/Disable ShortSlot timing. */
2583         if ((!!(conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME))
2584              != dev->short_slot) {
2585                 B43legacy_WARN_ON(phy->type != B43legacy_PHYTYPE_G);
2586                 if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME)
2587                         b43legacy_short_slot_timing_enable(dev);
2588                 else
2589                         b43legacy_short_slot_timing_disable(dev);
2590         }
2591
2592         /* Adjust the desired TX power level. */
2593         if (conf->power_level != 0) {
2594                 if (conf->power_level != phy->power_level) {
2595                         phy->power_level = conf->power_level;
2596                         b43legacy_phy_xmitpower(dev);
2597                 }
2598         }
2599
2600         /* Antennas for RX and management frame TX. */
2601         b43legacy_mgmtframe_txantenna(dev, antenna_tx);
2602
2603         /* Update templates for AP mode. */
2604         if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP))
2605                 b43legacy_set_beacon_int(dev, conf->beacon_int);
2606
2607
2608         if (!!conf->radio_enabled != phy->radio_on) {
2609                 if (conf->radio_enabled) {
2610                         b43legacy_radio_turn_on(dev);
2611                         b43legacyinfo(dev->wl, "Radio turned on by software\n");
2612                         if (!dev->radio_hw_enable)
2613                                 b43legacyinfo(dev->wl, "The hardware RF-kill"
2614                                               " button still turns the radio"
2615                                               " physically off. Press the"
2616                                               " button to turn it on.\n");
2617                 } else {
2618                         b43legacy_radio_turn_off(dev, 0);
2619                         b43legacyinfo(dev->wl, "Radio turned off by"
2620                                       " software\n");
2621                 }
2622         }
2623
2624         spin_lock_irqsave(&wl->irq_lock, flags);
2625         b43legacy_interrupt_enable(dev, savedirqs);
2626         mmiowb();
2627         spin_unlock_irqrestore(&wl->irq_lock, flags);
2628 out_unlock_mutex:
2629         mutex_unlock(&wl->mutex);
2630
2631         return err;
2632 }
2633
2634 static int b43legacy_dev_set_key(struct ieee80211_hw *hw,
2635                                  enum set_key_cmd cmd,
2636                                  const u8 *local_addr, const u8 *addr,
2637                                  struct ieee80211_key_conf *key)
2638 {
2639         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2640         struct b43legacy_wldev *dev = wl->current_dev;
2641         unsigned long flags;
2642         int err = -EOPNOTSUPP;
2643         DECLARE_MAC_BUF(mac);
2644
2645         if (!dev)
2646                 return -ENODEV;
2647         mutex_lock(&wl->mutex);
2648         spin_lock_irqsave(&wl->irq_lock, flags);
2649
2650         if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
2651                 err = -ENODEV;
2652         }
2653         spin_unlock_irqrestore(&wl->irq_lock, flags);
2654         mutex_unlock(&wl->mutex);
2655         b43legacydbg(wl, "Using software based encryption for "
2656                      "mac: %s\n", print_mac(mac, addr));
2657         return err;
2658 }
2659
2660 static void b43legacy_configure_filter(struct ieee80211_hw *hw,
2661                                        unsigned int changed,
2662                                        unsigned int *fflags,
2663                                        int mc_count,
2664                                        struct dev_addr_list *mc_list)
2665 {
2666         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2667         struct b43legacy_wldev *dev = wl->current_dev;
2668         unsigned long flags;
2669
2670         if (!dev) {
2671                 *fflags = 0;
2672                 return;
2673         }
2674
2675         spin_lock_irqsave(&wl->irq_lock, flags);
2676         *fflags &= FIF_PROMISC_IN_BSS |
2677                   FIF_ALLMULTI |
2678                   FIF_FCSFAIL |
2679                   FIF_PLCPFAIL |
2680                   FIF_CONTROL |
2681                   FIF_OTHER_BSS |
2682                   FIF_BCN_PRBRESP_PROMISC;
2683
2684         changed &= FIF_PROMISC_IN_BSS |
2685                    FIF_ALLMULTI |
2686                    FIF_FCSFAIL |
2687                    FIF_PLCPFAIL |
2688                    FIF_CONTROL |
2689                    FIF_OTHER_BSS |
2690                    FIF_BCN_PRBRESP_PROMISC;
2691
2692         wl->filter_flags = *fflags;
2693
2694         if (changed && b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED)
2695                 b43legacy_adjust_opmode(dev);
2696         spin_unlock_irqrestore(&wl->irq_lock, flags);
2697 }
2698
2699 static int b43legacy_config_interface(struct ieee80211_hw *hw,
2700                                       int if_id,
2701                                       struct ieee80211_if_conf *conf)
2702 {
2703         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2704         struct b43legacy_wldev *dev = wl->current_dev;
2705         unsigned long flags;
2706
2707         if (!dev)
2708                 return -ENODEV;
2709         mutex_lock(&wl->mutex);
2710         spin_lock_irqsave(&wl->irq_lock, flags);
2711         B43legacy_WARN_ON(wl->if_id != if_id);
2712         if (conf->bssid)
2713                 memcpy(wl->bssid, conf->bssid, ETH_ALEN);
2714         else
2715                 memset(wl->bssid, 0, ETH_ALEN);
2716         if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) {
2717                 if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP)) {
2718                         B43legacy_WARN_ON(conf->type != IEEE80211_IF_TYPE_AP);
2719                         b43legacy_set_ssid(dev, conf->ssid, conf->ssid_len);
2720                         if (conf->beacon)
2721                                 b43legacy_refresh_templates(dev, conf->beacon);
2722                 }
2723                 b43legacy_write_mac_bssid_templates(dev);
2724         }
2725         spin_unlock_irqrestore(&wl->irq_lock, flags);
2726         mutex_unlock(&wl->mutex);
2727
2728         return 0;
2729 }
2730
2731 /* Locking: wl->mutex */
2732 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev)
2733 {
2734         struct b43legacy_wl *wl = dev->wl;
2735         unsigned long flags;
2736
2737         if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
2738                 return;
2739
2740         /* Disable and sync interrupts. We must do this before than
2741          * setting the status to INITIALIZED, as the interrupt handler
2742          * won't care about IRQs then. */
2743         spin_lock_irqsave(&wl->irq_lock, flags);
2744         dev->irq_savedstate = b43legacy_interrupt_disable(dev,
2745                                                           B43legacy_IRQ_ALL);
2746         b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); /* flush */
2747         spin_unlock_irqrestore(&wl->irq_lock, flags);
2748         b43legacy_synchronize_irq(dev);
2749
2750         b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
2751
2752         mutex_unlock(&wl->mutex);
2753         /* Must unlock as it would otherwise deadlock. No races here.
2754          * Cancel the possibly running self-rearming periodic work. */
2755         cancel_delayed_work_sync(&dev->periodic_work);
2756         mutex_lock(&wl->mutex);
2757
2758         ieee80211_stop_queues(wl->hw); /* FIXME this could cause a deadlock */
2759
2760         b43legacy_mac_suspend(dev);
2761         free_irq(dev->dev->irq, dev);
2762         b43legacydbg(wl, "Wireless interface stopped\n");
2763 }
2764
2765 /* Locking: wl->mutex */
2766 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev)
2767 {
2768         int err;
2769
2770         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_INITIALIZED);
2771
2772         drain_txstatus_queue(dev);
2773         err = request_irq(dev->dev->irq, b43legacy_interrupt_handler,
2774                           IRQF_SHARED, KBUILD_MODNAME, dev);
2775         if (err) {
2776                 b43legacyerr(dev->wl, "Cannot request IRQ-%d\n",
2777                        dev->dev->irq);
2778                 goto out;
2779         }
2780         /* We are ready to run. */
2781         b43legacy_set_status(dev, B43legacy_STAT_STARTED);
2782
2783         /* Start data flow (TX/RX) */
2784         b43legacy_mac_enable(dev);
2785         b43legacy_interrupt_enable(dev, dev->irq_savedstate);
2786         ieee80211_start_queues(dev->wl->hw);
2787
2788         /* Start maintenance work */
2789         b43legacy_periodic_tasks_setup(dev);
2790
2791         b43legacydbg(dev->wl, "Wireless interface started\n");
2792 out:
2793         return err;
2794 }
2795
2796 /* Get PHY and RADIO versioning numbers */
2797 static int b43legacy_phy_versioning(struct b43legacy_wldev *dev)
2798 {
2799         struct b43legacy_phy *phy = &dev->phy;
2800         u32 tmp;
2801         u8 analog_type;
2802         u8 phy_type;
2803         u8 phy_rev;
2804         u16 radio_manuf;
2805         u16 radio_ver;
2806         u16 radio_rev;
2807         int unsupported = 0;
2808
2809         /* Get PHY versioning */
2810         tmp = b43legacy_read16(dev, B43legacy_MMIO_PHY_VER);
2811         analog_type = (tmp & B43legacy_PHYVER_ANALOG)
2812                       >> B43legacy_PHYVER_ANALOG_SHIFT;
2813         phy_type = (tmp & B43legacy_PHYVER_TYPE) >> B43legacy_PHYVER_TYPE_SHIFT;
2814         phy_rev = (tmp & B43legacy_PHYVER_VERSION);
2815         switch (phy_type) {
2816         case B43legacy_PHYTYPE_B:
2817                 if (phy_rev != 2 && phy_rev != 4
2818                     && phy_rev != 6 && phy_rev != 7)
2819                         unsupported = 1;
2820                 break;
2821         case B43legacy_PHYTYPE_G:
2822                 if (phy_rev > 8)
2823                         unsupported = 1;
2824                 break;
2825         default:
2826                 unsupported = 1;
2827         };
2828         if (unsupported) {
2829                 b43legacyerr(dev->wl, "FOUND UNSUPPORTED PHY "
2830                        "(Analog %u, Type %u, Revision %u)\n",
2831                        analog_type, phy_type, phy_rev);
2832                 return -EOPNOTSUPP;
2833         }
2834         b43legacydbg(dev->wl, "Found PHY: Analog %u, Type %u, Revision %u\n",
2835                analog_type, phy_type, phy_rev);
2836
2837
2838         /* Get RADIO versioning */
2839         if (dev->dev->bus->chip_id == 0x4317) {
2840                 if (dev->dev->bus->chip_rev == 0)
2841                         tmp = 0x3205017F;
2842                 else if (dev->dev->bus->chip_rev == 1)
2843                         tmp = 0x4205017F;
2844                 else
2845                         tmp = 0x5205017F;
2846         } else {
2847                 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
2848                                   B43legacy_RADIOCTL_ID);
2849                 tmp = b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_HIGH);
2850                 tmp <<= 16;
2851                 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
2852                                   B43legacy_RADIOCTL_ID);
2853                 tmp |= b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_LOW);
2854         }
2855         radio_manuf = (tmp & 0x00000FFF);
2856         radio_ver = (tmp & 0x0FFFF000) >> 12;
2857         radio_rev = (tmp & 0xF0000000) >> 28;
2858         switch (phy_type) {
2859         case B43legacy_PHYTYPE_B:
2860                 if ((radio_ver & 0xFFF0) != 0x2050)
2861                         unsupported = 1;
2862                 break;
2863         case B43legacy_PHYTYPE_G:
2864                 if (radio_ver != 0x2050)
2865                         unsupported = 1;
2866                 break;
2867         default:
2868                 B43legacy_BUG_ON(1);
2869         }
2870         if (unsupported) {
2871                 b43legacyerr(dev->wl, "FOUND UNSUPPORTED RADIO "
2872                        "(Manuf 0x%X, Version 0x%X, Revision %u)\n",
2873                        radio_manuf, radio_ver, radio_rev);
2874                 return -EOPNOTSUPP;
2875         }
2876         b43legacydbg(dev->wl, "Found Radio: Manuf 0x%X, Version 0x%X,"
2877                      " Revision %u\n", radio_manuf, radio_ver, radio_rev);
2878
2879
2880         phy->radio_manuf = radio_manuf;
2881         phy->radio_ver = radio_ver;
2882         phy->radio_rev = radio_rev;
2883
2884         phy->analog = analog_type;
2885         phy->type = phy_type;
2886         phy->rev = phy_rev;
2887
2888         return 0;
2889 }
2890
2891 static void setup_struct_phy_for_init(struct b43legacy_wldev *dev,
2892                                       struct b43legacy_phy *phy)
2893 {
2894         struct b43legacy_lopair *lo;
2895         int i;
2896
2897         memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
2898         memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
2899
2900         /* Flags */
2901         phy->locked = 0;
2902         /* Assume the radio is enabled. If it's not enabled, the state will
2903          * immediately get fixed on the first periodic work run. */
2904         dev->radio_hw_enable = 1;
2905
2906         phy->savedpctlreg = 0xFFFF;
2907         phy->aci_enable = 0;
2908         phy->aci_wlan_automatic = 0;
2909         phy->aci_hw_rssi = 0;
2910
2911         lo = phy->_lo_pairs;
2912         if (lo)
2913                 memset(lo, 0, sizeof(struct b43legacy_lopair) *
2914                                      B43legacy_LO_COUNT);
2915         phy->max_lb_gain = 0;
2916         phy->trsw_rx_gain = 0;
2917
2918         /* Set default attenuation values. */
2919         phy->bbatt = b43legacy_default_baseband_attenuation(dev);
2920         phy->rfatt = b43legacy_default_radio_attenuation(dev);
2921         phy->txctl1 = b43legacy_default_txctl1(dev);
2922         phy->txpwr_offset = 0;
2923
2924         /* NRSSI */
2925         phy->nrssislope = 0;
2926         for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
2927                 phy->nrssi[i] = -1000;
2928         for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
2929                 phy->nrssi_lt[i] = i;
2930
2931         phy->lofcal = 0xFFFF;
2932         phy->initval = 0xFFFF;
2933
2934         spin_lock_init(&phy->lock);
2935         phy->interfmode = B43legacy_INTERFMODE_NONE;
2936         phy->channel = 0xFF;
2937 }
2938
2939 static void setup_struct_wldev_for_init(struct b43legacy_wldev *dev)
2940 {
2941         /* Flags */
2942         dev->reg124_set_0x4 = 0;
2943
2944         /* Stats */
2945         memset(&dev->stats, 0, sizeof(dev->stats));
2946
2947         setup_struct_phy_for_init(dev, &dev->phy);
2948
2949         /* IRQ related flags */
2950         dev->irq_reason = 0;
2951         memset(dev->dma_reason, 0, sizeof(dev->dma_reason));
2952         dev->irq_savedstate = B43legacy_IRQ_MASKTEMPLATE;
2953
2954         dev->mac_suspended = 1;
2955
2956         /* Noise calculation context */
2957         memset(&dev->noisecalc, 0, sizeof(dev->noisecalc));
2958 }
2959
2960 static void b43legacy_imcfglo_timeouts_workaround(struct b43legacy_wldev *dev)
2961 {
2962 #ifdef CONFIG_SSB_DRIVER_PCICORE
2963         struct ssb_bus *bus = dev->dev->bus;
2964         u32 tmp;
2965
2966         if (bus->pcicore.dev &&
2967             bus->pcicore.dev->id.coreid == SSB_DEV_PCI &&
2968             bus->pcicore.dev->id.revision <= 5) {
2969                 /* IMCFGLO timeouts workaround. */
2970                 tmp = ssb_read32(dev->dev, SSB_IMCFGLO);
2971                 tmp &= ~SSB_IMCFGLO_REQTO;
2972                 tmp &= ~SSB_IMCFGLO_SERTO;
2973                 switch (bus->bustype) {
2974                 case SSB_BUSTYPE_PCI:
2975                 case SSB_BUSTYPE_PCMCIA:
2976                         tmp |= 0x32;
2977                         break;
2978                 case SSB_BUSTYPE_SSB:
2979                         tmp |= 0x53;
2980                         break;
2981                 }
2982                 ssb_write32(dev->dev, SSB_IMCFGLO, tmp);
2983         }
2984 #endif /* CONFIG_SSB_DRIVER_PCICORE */
2985 }
2986
2987 /* Shutdown a wireless core */
2988 /* Locking: wl->mutex */
2989 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev)
2990 {
2991         struct b43legacy_wl *wl = dev->wl;
2992         struct b43legacy_phy *phy = &dev->phy;
2993
2994         B43legacy_WARN_ON(b43legacy_status(dev) > B43legacy_STAT_INITIALIZED);
2995         if (b43legacy_status(dev) != B43legacy_STAT_INITIALIZED)
2996                 return;
2997         b43legacy_set_status(dev, B43legacy_STAT_UNINIT);
2998
2999         mutex_unlock(&wl->mutex);
3000         /* Must unlock as it would otherwise deadlock. No races here.
3001          * Cancel possibly pending workqueues. */
3002         cancel_work_sync(&dev->restart_work);
3003         mutex_lock(&wl->mutex);
3004
3005         mutex_unlock(&dev->wl->mutex);
3006         b43legacy_rfkill_exit(dev);
3007         mutex_lock(&dev->wl->mutex);
3008
3009         b43legacy_rng_exit(dev->wl);
3010         b43legacy_pio_free(dev);
3011         b43legacy_dma_free(dev);
3012         b43legacy_chip_exit(dev);
3013         b43legacy_radio_turn_off(dev, 1);
3014         b43legacy_switch_analog(dev, 0);
3015         if (phy->dyn_tssi_tbl)
3016                 kfree(phy->tssi2dbm);
3017         kfree(phy->lo_control);
3018         phy->lo_control = NULL;
3019         ssb_device_disable(dev->dev, 0);
3020         ssb_bus_may_powerdown(dev->dev->bus);
3021 }
3022
3023 static void prepare_phy_data_for_init(struct b43legacy_wldev *dev)
3024 {
3025         struct b43legacy_phy *phy = &dev->phy;
3026         int i;
3027
3028         /* Set default attenuation values. */
3029         phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3030         phy->rfatt = b43legacy_default_radio_attenuation(dev);
3031         phy->txctl1 = b43legacy_default_txctl1(dev);
3032         phy->txctl2 = 0xFFFF;
3033         phy->txpwr_offset = 0;
3034
3035         /* NRSSI */
3036         phy->nrssislope = 0;
3037         for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3038                 phy->nrssi[i] = -1000;
3039         for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3040                 phy->nrssi_lt[i] = i;
3041
3042         phy->lofcal = 0xFFFF;
3043         phy->initval = 0xFFFF;
3044
3045         phy->aci_enable = 0;
3046         phy->aci_wlan_automatic = 0;
3047         phy->aci_hw_rssi = 0;
3048
3049         phy->antenna_diversity = 0xFFFF;
3050         memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3051         memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3052
3053         /* Flags */
3054         phy->calibrated = 0;
3055         phy->locked = 0;
3056
3057         if (phy->_lo_pairs)
3058                 memset(phy->_lo_pairs, 0,
3059                        sizeof(struct b43legacy_lopair) * B43legacy_LO_COUNT);
3060         memset(phy->loopback_gain, 0, sizeof(phy->loopback_gain));
3061 }
3062
3063 /* Initialize a wireless core */
3064 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev)
3065 {
3066         struct b43legacy_wl *wl = dev->wl;
3067         struct ssb_bus *bus = dev->dev->bus;
3068         struct b43legacy_phy *phy = &dev->phy;
3069         struct ssb_sprom *sprom = &dev->dev->bus->sprom;
3070         int err;
3071         u32 hf;
3072         u32 tmp;
3073
3074         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3075
3076         err = ssb_bus_powerup(bus, 0);
3077         if (err)
3078                 goto out;
3079         if (!ssb_device_is_enabled(dev->dev)) {
3080                 tmp = phy->gmode ? B43legacy_TMSLOW_GMODE : 0;
3081                 b43legacy_wireless_core_reset(dev, tmp);
3082         }
3083
3084         if ((phy->type == B43legacy_PHYTYPE_B) ||
3085             (phy->type == B43legacy_PHYTYPE_G)) {
3086                 phy->_lo_pairs = kzalloc(sizeof(struct b43legacy_lopair)
3087                                          * B43legacy_LO_COUNT,
3088                                          GFP_KERNEL);
3089                 if (!phy->_lo_pairs)
3090                         return -ENOMEM;
3091         }
3092         setup_struct_wldev_for_init(dev);
3093
3094         err = b43legacy_phy_init_tssi2dbm_table(dev);
3095         if (err)
3096                 goto err_kfree_lo_control;
3097
3098         /* Enable IRQ routing to this device. */
3099         ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev);
3100
3101         b43legacy_imcfglo_timeouts_workaround(dev);
3102         prepare_phy_data_for_init(dev);
3103         b43legacy_phy_calibrate(dev);
3104         err = b43legacy_chip_init(dev);
3105         if (err)
3106                 goto err_kfree_tssitbl;
3107         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3108                               B43legacy_SHM_SH_WLCOREREV,
3109                               dev->dev->id.revision);
3110         hf = b43legacy_hf_read(dev);
3111         if (phy->type == B43legacy_PHYTYPE_G) {
3112                 hf |= B43legacy_HF_SYMW;
3113                 if (phy->rev == 1)
3114                         hf |= B43legacy_HF_GDCW;
3115                 if (sprom->r1.boardflags_lo & B43legacy_BFL_PACTRL)
3116                         hf |= B43legacy_HF_OFDMPABOOST;
3117         } else if (phy->type == B43legacy_PHYTYPE_B) {
3118                 hf |= B43legacy_HF_SYMW;
3119                 if (phy->rev >= 2 && phy->radio_ver == 0x2050)
3120                         hf &= ~B43legacy_HF_GDCW;
3121         }
3122         b43legacy_hf_write(dev, hf);
3123
3124         /* Short/Long Retry Limit.
3125          * The retry-limit is a 4-bit counter. Enforce this to avoid overflowing
3126          * the chip-internal counter.
3127          */
3128         tmp = limit_value(modparam_short_retry, 0, 0xF);
3129         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3130                               0x0006, tmp);
3131         tmp = limit_value(modparam_long_retry, 0, 0xF);
3132         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3133                               0x0007, tmp);
3134
3135         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3136                               0x0044, 3);
3137         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3138                               0x0046, 2);
3139
3140         /* Disable sending probe responses from firmware.
3141          * Setting the MaxTime to one usec will always trigger
3142          * a timeout, so we never send any probe resp.
3143          * A timeout of zero is infinite. */
3144         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3145                               B43legacy_SHM_SH_PRMAXTIME, 1);
3146
3147         b43legacy_rate_memory_init(dev);
3148
3149         /* Minimum Contention Window */
3150         if (phy->type == B43legacy_PHYTYPE_B)
3151                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3152                                       0x0003, 31);
3153         else
3154                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3155                                       0x0003, 15);
3156         /* Maximum Contention Window */
3157         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3158                               0x0004, 1023);
3159
3160         do {
3161                 if (b43legacy_using_pio(dev))
3162                         err = b43legacy_pio_init(dev);
3163                 else {
3164                         err = b43legacy_dma_init(dev);
3165                         if (!err)
3166                                 b43legacy_qos_init(dev);
3167                 }
3168         } while (err == -EAGAIN);
3169         if (err)
3170                 goto err_chip_exit;
3171
3172         b43legacy_write16(dev, 0x0612, 0x0050);
3173         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0416, 0x0050);
3174         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0414, 0x01F4);
3175
3176         ssb_bus_powerup(bus, 1); /* Enable dynamic PCTL */
3177         memset(wl->bssid, 0, ETH_ALEN);
3178         memset(wl->mac_addr, 0, ETH_ALEN);
3179         b43legacy_upload_card_macaddress(dev);
3180         b43legacy_security_init(dev);
3181         b43legacy_rfkill_init(dev);
3182         b43legacy_rng_init(wl);
3183
3184         b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
3185
3186 out:
3187         return err;
3188
3189 err_chip_exit:
3190         b43legacy_chip_exit(dev);
3191 err_kfree_tssitbl:
3192         if (phy->dyn_tssi_tbl)
3193                 kfree(phy->tssi2dbm);
3194 err_kfree_lo_control:
3195         kfree(phy->lo_control);
3196         phy->lo_control = NULL;
3197         ssb_bus_may_powerdown(bus);
3198         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3199         return err;
3200 }
3201
3202 static int b43legacy_add_interface(struct ieee80211_hw *hw,
3203                                    struct ieee80211_if_init_conf *conf)
3204 {
3205         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3206         struct b43legacy_wldev *dev;
3207         unsigned long flags;
3208         int err = -EOPNOTSUPP;
3209
3210         /* TODO: allow WDS/AP devices to coexist */
3211
3212         if (conf->type != IEEE80211_IF_TYPE_AP &&
3213             conf->type != IEEE80211_IF_TYPE_STA &&
3214             conf->type != IEEE80211_IF_TYPE_WDS &&
3215             conf->type != IEEE80211_IF_TYPE_IBSS)
3216                 return -EOPNOTSUPP;
3217
3218         mutex_lock(&wl->mutex);
3219         if (wl->operating)
3220                 goto out_mutex_unlock;
3221
3222         b43legacydbg(wl, "Adding Interface type %d\n", conf->type);
3223
3224         dev = wl->current_dev;
3225         wl->operating = 1;
3226         wl->if_id = conf->if_id;
3227         wl->if_type = conf->type;
3228         memcpy(wl->mac_addr, conf->mac_addr, ETH_ALEN);
3229
3230         spin_lock_irqsave(&wl->irq_lock, flags);
3231         b43legacy_adjust_opmode(dev);
3232         b43legacy_upload_card_macaddress(dev);
3233         spin_unlock_irqrestore(&wl->irq_lock, flags);
3234
3235         err = 0;
3236  out_mutex_unlock:
3237         mutex_unlock(&wl->mutex);
3238
3239         return err;
3240 }
3241
3242 static void b43legacy_remove_interface(struct ieee80211_hw *hw,
3243                                        struct ieee80211_if_init_conf *conf)
3244 {
3245         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3246         struct b43legacy_wldev *dev = wl->current_dev;
3247         unsigned long flags;
3248
3249         b43legacydbg(wl, "Removing Interface type %d\n", conf->type);
3250
3251         mutex_lock(&wl->mutex);
3252
3253         B43legacy_WARN_ON(!wl->operating);
3254         B43legacy_WARN_ON(wl->if_id != conf->if_id);
3255
3256         wl->operating = 0;
3257
3258         spin_lock_irqsave(&wl->irq_lock, flags);
3259         b43legacy_adjust_opmode(dev);
3260         memset(wl->mac_addr, 0, ETH_ALEN);
3261         b43legacy_upload_card_macaddress(dev);
3262         spin_unlock_irqrestore(&wl->irq_lock, flags);
3263
3264         mutex_unlock(&wl->mutex);
3265 }
3266
3267 static int b43legacy_start(struct ieee80211_hw *hw)
3268 {
3269         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3270         struct b43legacy_wldev *dev = wl->current_dev;
3271         int did_init = 0;
3272         int err = 0;
3273
3274         mutex_lock(&wl->mutex);
3275
3276         if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
3277                 err = b43legacy_wireless_core_init(dev);
3278                 if (err)
3279                         goto out_mutex_unlock;
3280                 did_init = 1;
3281         }
3282
3283         if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
3284                 err = b43legacy_wireless_core_start(dev);
3285                 if (err) {
3286                         if (did_init)
3287                                 b43legacy_wireless_core_exit(dev);
3288                         goto out_mutex_unlock;
3289                 }
3290         }
3291
3292 out_mutex_unlock:
3293         mutex_unlock(&wl->mutex);
3294
3295         return err;
3296 }
3297
3298 static void b43legacy_stop(struct ieee80211_hw *hw)
3299 {
3300         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3301         struct b43legacy_wldev *dev = wl->current_dev;
3302
3303         mutex_lock(&wl->mutex);
3304         if (b43legacy_status(dev) >= B43legacy_STAT_STARTED)
3305                 b43legacy_wireless_core_stop(dev);
3306         b43legacy_wireless_core_exit(dev);
3307         mutex_unlock(&wl->mutex);
3308 }
3309
3310
3311 static const struct ieee80211_ops b43legacy_hw_ops = {
3312         .tx = b43legacy_tx,
3313         .conf_tx = b43legacy_conf_tx,
3314         .add_interface = b43legacy_add_interface,
3315         .remove_interface = b43legacy_remove_interface,
3316         .config = b43legacy_dev_config,
3317         .config_interface = b43legacy_config_interface,
3318         .set_key = b43legacy_dev_set_key,
3319         .configure_filter = b43legacy_configure_filter,
3320         .get_stats = b43legacy_get_stats,
3321         .get_tx_stats = b43legacy_get_tx_stats,
3322         .start = b43legacy_start,
3323         .stop = b43legacy_stop,
3324 };
3325
3326 /* Hard-reset the chip. Do not call this directly.
3327  * Use b43legacy_controller_restart()
3328  */
3329 static void b43legacy_chip_reset(struct work_struct *work)
3330 {
3331         struct b43legacy_wldev *dev =
3332                 container_of(work, struct b43legacy_wldev, restart_work);
3333         struct b43legacy_wl *wl = dev->wl;
3334         int err = 0;
3335         int prev_status;
3336
3337         mutex_lock(&wl->mutex);
3338
3339         prev_status = b43legacy_status(dev);
3340         /* Bring the device down... */
3341         if (prev_status >= B43legacy_STAT_STARTED)
3342                 b43legacy_wireless_core_stop(dev);
3343         if (prev_status >= B43legacy_STAT_INITIALIZED)
3344                 b43legacy_wireless_core_exit(dev);
3345
3346         /* ...and up again. */
3347         if (prev_status >= B43legacy_STAT_INITIALIZED) {
3348                 err = b43legacy_wireless_core_init(dev);
3349                 if (err)
3350                         goto out;
3351         }
3352         if (prev_status >= B43legacy_STAT_STARTED) {
3353                 err = b43legacy_wireless_core_start(dev);
3354                 if (err) {
3355                         b43legacy_wireless_core_exit(dev);
3356                         goto out;
3357                 }
3358         }
3359 out:
3360         mutex_unlock(&wl->mutex);
3361         if (err)
3362                 b43legacyerr(wl, "Controller restart FAILED\n");
3363         else
3364                 b43legacyinfo(wl, "Controller restarted\n");
3365 }
3366
3367 static int b43legacy_setup_modes(struct b43legacy_wldev *dev,
3368                                  int have_bphy,
3369                                  int have_gphy)
3370 {
3371         struct ieee80211_hw *hw = dev->wl->hw;
3372         struct ieee80211_hw_mode *mode;
3373         struct b43legacy_phy *phy = &dev->phy;
3374         int cnt = 0;
3375         int err;
3376
3377         phy->possible_phymodes = 0;
3378         for (; 1; cnt++) {
3379                 if (have_bphy) {
3380                         B43legacy_WARN_ON(cnt >= B43legacy_MAX_PHYHWMODES);
3381                         mode = &phy->hwmodes[cnt];
3382
3383                         mode->mode = MODE_IEEE80211B;
3384                         mode->num_channels = b43legacy_bg_chantable_size;
3385                         mode->channels = b43legacy_bg_chantable;
3386                         mode->num_rates = b43legacy_b_ratetable_size;
3387                         mode->rates = b43legacy_b_ratetable;
3388                         err = ieee80211_register_hwmode(hw, mode);
3389                         if (err)
3390                                 return err;
3391
3392                         phy->possible_phymodes |= B43legacy_PHYMODE_B;
3393                         have_bphy = 0;
3394                         continue;
3395                 }
3396                 if (have_gphy) {
3397                         B43legacy_WARN_ON(cnt >= B43legacy_MAX_PHYHWMODES);
3398                         mode = &phy->hwmodes[cnt];
3399
3400                         mode->mode = MODE_IEEE80211G;
3401                         mode->num_channels = b43legacy_bg_chantable_size;
3402                         mode->channels = b43legacy_bg_chantable;
3403                         mode->num_rates = b43legacy_g_ratetable_size;
3404                         mode->rates = b43legacy_g_ratetable;
3405                         err = ieee80211_register_hwmode(hw, mode);
3406                         if (err)
3407                                 return err;
3408
3409                         phy->possible_phymodes |= B43legacy_PHYMODE_G;
3410                         have_gphy = 0;
3411                         continue;
3412                 }
3413                 break;
3414         }
3415
3416         return 0;
3417 }
3418
3419 static void b43legacy_wireless_core_detach(struct b43legacy_wldev *dev)
3420 {
3421         b43legacy_rfkill_free(dev);
3422         /* We release firmware that late to not be required to re-request
3423          * is all the time when we reinit the core. */
3424         b43legacy_release_firmware(dev);
3425 }
3426
3427 static int b43legacy_wireless_core_attach(struct b43legacy_wldev *dev)
3428 {
3429         struct b43legacy_wl *wl = dev->wl;
3430         struct ssb_bus *bus = dev->dev->bus;
3431         struct pci_dev *pdev = bus->host_pci;
3432         int err;
3433         int have_bphy = 0;
3434         int have_gphy = 0;
3435         u32 tmp;
3436
3437         /* Do NOT do any device initialization here.
3438          * Do it in wireless_core_init() instead.
3439          * This function is for gathering basic information about the HW, only.
3440          * Also some structs may be set up here. But most likely you want to
3441          * have that in core_init(), too.
3442          */
3443
3444         err = ssb_bus_powerup(bus, 0);
3445         if (err) {
3446                 b43legacyerr(wl, "Bus powerup failed\n");
3447                 goto out;
3448         }
3449         /* Get the PHY type. */
3450         if (dev->dev->id.revision >= 5) {
3451                 u32 tmshigh;
3452
3453                 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
3454                 have_gphy = !!(tmshigh & B43legacy_TMSHIGH_GPHY);
3455                 if (!have_gphy)
3456                         have_bphy = 1;
3457         } else if (dev->dev->id.revision == 4)
3458                 have_gphy = 1;
3459         else
3460                 have_bphy = 1;
3461
3462         dev->phy.gmode = (have_gphy || have_bphy);
3463         tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3464         b43legacy_wireless_core_reset(dev, tmp);
3465
3466         err = b43legacy_phy_versioning(dev);
3467         if (err)
3468                 goto err_powerdown;
3469         /* Check if this device supports multiband. */
3470         if (!pdev ||
3471             (pdev->device != 0x4312 &&
3472              pdev->device != 0x4319 &&
3473              pdev->device != 0x4324)) {
3474                 /* No multiband support. */
3475                 have_bphy = 0;
3476                 have_gphy = 0;
3477                 switch (dev->phy.type) {
3478                 case B43legacy_PHYTYPE_B:
3479                         have_bphy = 1;
3480                         break;
3481                 case B43legacy_PHYTYPE_G:
3482                         have_gphy = 1;
3483                         break;
3484                 default:
3485                         B43legacy_BUG_ON(1);
3486                 }
3487         }
3488         dev->phy.gmode = (have_gphy || have_bphy);
3489         tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3490         b43legacy_wireless_core_reset(dev, tmp);
3491
3492         err = b43legacy_validate_chipaccess(dev);
3493         if (err)
3494                 goto err_powerdown;
3495         err = b43legacy_setup_modes(dev, have_bphy, have_gphy);
3496         if (err)
3497                 goto err_powerdown;
3498
3499         /* Now set some default "current_dev" */
3500         if (!wl->current_dev)
3501                 wl->current_dev = dev;
3502         INIT_WORK(&dev->restart_work, b43legacy_chip_reset);
3503         b43legacy_rfkill_alloc(dev);
3504
3505         b43legacy_radio_turn_off(dev, 1);
3506         b43legacy_switch_analog(dev, 0);
3507         ssb_device_disable(dev->dev, 0);
3508         ssb_bus_may_powerdown(bus);
3509
3510 out:
3511         return err;
3512
3513 err_powerdown:
3514         ssb_bus_may_powerdown(bus);
3515         return err;
3516 }
3517
3518 static void b43legacy_one_core_detach(struct ssb_device *dev)
3519 {
3520         struct b43legacy_wldev *wldev;
3521         struct b43legacy_wl *wl;
3522
3523         wldev = ssb_get_drvdata(dev);
3524         wl = wldev->wl;
3525         cancel_work_sync(&wldev->restart_work);
3526         b43legacy_debugfs_remove_device(wldev);
3527         b43legacy_wireless_core_detach(wldev);
3528         list_del(&wldev->list);
3529         wl->nr_devs--;
3530         ssb_set_drvdata(dev, NULL);
3531         kfree(wldev);
3532 }
3533
3534 static int b43legacy_one_core_attach(struct ssb_device *dev,
3535                                      struct b43legacy_wl *wl)
3536 {
3537         struct b43legacy_wldev *wldev;
3538         struct pci_dev *pdev;
3539         int err = -ENOMEM;
3540
3541         if (!list_empty(&wl->devlist)) {
3542                 /* We are not the first core on this chip. */
3543                 pdev = dev->bus->host_pci;
3544                 /* Only special chips support more than one wireless
3545                  * core, although some of the other chips have more than
3546                  * one wireless core as well. Check for this and
3547                  * bail out early.
3548                  */
3549                 if (!pdev ||
3550                     ((pdev->device != 0x4321) &&
3551                      (pdev->device != 0x4313) &&
3552                      (pdev->device != 0x431A))) {
3553                         b43legacydbg(wl, "Ignoring unconnected 802.11 core\n");
3554                         return -ENODEV;
3555                 }
3556         }
3557
3558         wldev = kzalloc(sizeof(*wldev), GFP_KERNEL);
3559         if (!wldev)
3560                 goto out;
3561
3562         wldev->dev = dev;
3563         wldev->wl = wl;
3564         b43legacy_set_status(wldev, B43legacy_STAT_UNINIT);
3565         wldev->bad_frames_preempt = modparam_bad_frames_preempt;
3566         tasklet_init(&wldev->isr_tasklet,
3567                      (void (*)(unsigned long))b43legacy_interrupt_tasklet,
3568                      (unsigned long)wldev);
3569         if (modparam_pio)
3570                 wldev->__using_pio = 1;
3571         INIT_LIST_HEAD(&wldev->list);
3572
3573         err = b43legacy_wireless_core_attach(wldev);
3574         if (err)
3575                 goto err_kfree_wldev;
3576
3577         list_add(&wldev->list, &wl->devlist);
3578         wl->nr_devs++;
3579         ssb_set_drvdata(dev, wldev);
3580         b43legacy_debugfs_add_device(wldev);
3581 out:
3582         return err;
3583
3584 err_kfree_wldev:
3585         kfree(wldev);
3586         return err;
3587 }
3588
3589 static void b43legacy_sprom_fixup(struct ssb_bus *bus)
3590 {
3591         /* boardflags workarounds */
3592         if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
3593             bus->boardinfo.type == 0x4E &&
3594             bus->boardinfo.rev > 0x40)
3595                 bus->sprom.r1.boardflags_lo |= B43legacy_BFL_PACTRL;
3596
3597         /* Convert Antennagain values to Q5.2 */
3598         if (bus->sprom.r1.antenna_gain_bg == 0xFF)
3599                 bus->sprom.r1.antenna_gain_bg = 2; /* if unset, use 2 dBm */
3600         bus->sprom.r1.antenna_gain_bg <<= 2;
3601 }
3602
3603 static void b43legacy_wireless_exit(struct ssb_device *dev,
3604                                   struct b43legacy_wl *wl)
3605 {
3606         struct ieee80211_hw *hw = wl->hw;
3607
3608         ssb_set_devtypedata(dev, NULL);
3609         ieee80211_free_hw(hw);
3610 }
3611
3612 static int b43legacy_wireless_init(struct ssb_device *dev)
3613 {
3614         struct ssb_sprom *sprom = &dev->bus->sprom;
3615         struct ieee80211_hw *hw;
3616         struct b43legacy_wl *wl;
3617         int err = -ENOMEM;
3618
3619         b43legacy_sprom_fixup(dev->bus);
3620
3621         hw = ieee80211_alloc_hw(sizeof(*wl), &b43legacy_hw_ops);
3622         if (!hw) {
3623                 b43legacyerr(NULL, "Could not allocate ieee80211 device\n");
3624                 goto out;
3625         }
3626
3627         /* fill hw info */
3628         hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
3629                     IEEE80211_HW_RX_INCLUDES_FCS;
3630         hw->max_signal = 100;
3631         hw->max_rssi = -110;
3632         hw->max_noise = -110;
3633         hw->queues = 1; /* FIXME: hardware has more queues */
3634         SET_IEEE80211_DEV(hw, dev->dev);
3635         if (is_valid_ether_addr(sprom->r1.et1mac))
3636                 SET_IEEE80211_PERM_ADDR(hw, sprom->r1.et1mac);
3637         else
3638                 SET_IEEE80211_PERM_ADDR(hw, sprom->r1.il0mac);
3639
3640         /* Get and initialize struct b43legacy_wl */
3641         wl = hw_to_b43legacy_wl(hw);
3642         memset(wl, 0, sizeof(*wl));
3643         wl->hw = hw;
3644         spin_lock_init(&wl->irq_lock);
3645         spin_lock_init(&wl->leds_lock);
3646         mutex_init(&wl->mutex);
3647         INIT_LIST_HEAD(&wl->devlist);
3648
3649         ssb_set_devtypedata(dev, wl);
3650         b43legacyinfo(wl, "Broadcom %04X WLAN found\n", dev->bus->chip_id);
3651         err = 0;
3652 out:
3653         return err;
3654 }
3655
3656 static int b43legacy_probe(struct ssb_device *dev,
3657                          const struct ssb_device_id *id)
3658 {
3659         struct b43legacy_wl *wl;
3660         int err;
3661         int first = 0;
3662
3663         wl = ssb_get_devtypedata(dev);
3664         if (!wl) {
3665                 /* Probing the first core - setup common struct b43legacy_wl */
3666                 first = 1;
3667                 err = b43legacy_wireless_init(dev);
3668                 if (err)
3669                         goto out;
3670                 wl = ssb_get_devtypedata(dev);
3671                 B43legacy_WARN_ON(!wl);
3672         }
3673         err = b43legacy_one_core_attach(dev, wl);
3674         if (err)
3675                 goto err_wireless_exit;
3676
3677         if (first) {
3678                 err = ieee80211_register_hw(wl->hw);
3679                 if (err)
3680                         goto err_one_core_detach;
3681         }
3682
3683 out:
3684         return err;
3685
3686 err_one_core_detach:
3687         b43legacy_one_core_detach(dev);
3688 err_wireless_exit:
3689         if (first)
3690                 b43legacy_wireless_exit(dev, wl);
3691         return err;
3692 }
3693
3694 static void b43legacy_remove(struct ssb_device *dev)
3695 {
3696         struct b43legacy_wl *wl = ssb_get_devtypedata(dev);
3697         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3698
3699         B43legacy_WARN_ON(!wl);
3700         if (wl->current_dev == wldev)
3701                 ieee80211_unregister_hw(wl->hw);
3702
3703         b43legacy_one_core_detach(dev);
3704
3705         if (list_empty(&wl->devlist))
3706                 /* Last core on the chip unregistered.
3707                  * We can destroy common struct b43legacy_wl.
3708                  */
3709                 b43legacy_wireless_exit(dev, wl);
3710 }
3711
3712 /* Perform a hardware reset. This can be called from any context. */
3713 void b43legacy_controller_restart(struct b43legacy_wldev *dev,
3714                                   const char *reason)
3715 {
3716         /* Must avoid requeueing, if we are in shutdown. */
3717         if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED)
3718                 return;
3719         b43legacyinfo(dev->wl, "Controller RESET (%s) ...\n", reason);
3720         queue_work(dev->wl->hw->workqueue, &dev->restart_work);
3721 }
3722
3723 #ifdef CONFIG_PM
3724
3725 static int b43legacy_suspend(struct ssb_device *dev, pm_message_t state)
3726 {
3727         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3728         struct b43legacy_wl *wl = wldev->wl;
3729
3730         b43legacydbg(wl, "Suspending...\n");
3731
3732         mutex_lock(&wl->mutex);
3733         wldev->suspend_init_status = b43legacy_status(wldev);
3734         if (wldev->suspend_init_status >= B43legacy_STAT_STARTED)
3735                 b43legacy_wireless_core_stop(wldev);
3736         if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED)
3737                 b43legacy_wireless_core_exit(wldev);
3738         mutex_unlock(&wl->mutex);
3739
3740         b43legacydbg(wl, "Device suspended.\n");
3741
3742         return 0;
3743 }
3744
3745 static int b43legacy_resume(struct ssb_device *dev)
3746 {
3747         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3748         struct b43legacy_wl *wl = wldev->wl;
3749         int err = 0;
3750
3751         b43legacydbg(wl, "Resuming...\n");
3752
3753         mutex_lock(&wl->mutex);
3754         if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) {
3755                 err = b43legacy_wireless_core_init(wldev);
3756                 if (err) {
3757                         b43legacyerr(wl, "Resume failed at core init\n");
3758                         goto out;
3759                 }
3760         }
3761         if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) {
3762                 err = b43legacy_wireless_core_start(wldev);
3763                 if (err) {
3764                         b43legacy_wireless_core_exit(wldev);
3765                         b43legacyerr(wl, "Resume failed at core start\n");
3766                         goto out;
3767                 }
3768         }
3769         mutex_unlock(&wl->mutex);
3770
3771         b43legacydbg(wl, "Device resumed.\n");
3772 out:
3773         return err;
3774 }
3775
3776 #else   /* CONFIG_PM */
3777 # define b43legacy_suspend      NULL
3778 # define b43legacy_resume               NULL
3779 #endif  /* CONFIG_PM */
3780
3781 static struct ssb_driver b43legacy_ssb_driver = {
3782         .name           = KBUILD_MODNAME,
3783         .id_table       = b43legacy_ssb_tbl,
3784         .probe          = b43legacy_probe,
3785         .remove         = b43legacy_remove,
3786         .suspend        = b43legacy_suspend,
3787         .resume         = b43legacy_resume,
3788 };
3789
3790 static int __init b43legacy_init(void)
3791 {
3792         int err;
3793
3794         b43legacy_debugfs_init();
3795
3796         err = ssb_driver_register(&b43legacy_ssb_driver);
3797         if (err)
3798                 goto err_dfs_exit;
3799
3800         return err;
3801
3802 err_dfs_exit:
3803         b43legacy_debugfs_exit();
3804         return err;
3805 }
3806
3807 static void __exit b43legacy_exit(void)
3808 {
3809         ssb_driver_unregister(&b43legacy_ssb_driver);
3810         b43legacy_debugfs_exit();
3811 }
3812
3813 module_init(b43legacy_init)
3814 module_exit(b43legacy_exit)