SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/net/wireless/b43/wa.c

   1 /*
   2
   3   Broadcom B43 wireless driver
   4
   5   PHY workarounds.
   6
   7   Copyright (c) 2005-2007 Stefano Brivio <stefano.brivio@polimi.it>
   8   Copyright (c) 2005-2007 Michael Buesch <mbuesch@freenet.de>
   9
  10   This program is free software; you can redistribute it and/or modify
  11   it under the terms of the GNU General Public License as published by
  12   the Free Software Foundation; either version 2 of the License, or
  13   (at your option) any later version.
  14
  15   This program is distributed in the hope that it will be useful,
  16   but WITHOUT ANY WARRANTY; without even the implied warranty of
  17   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18   GNU General Public License for more details.
  19
  20   You should have received a copy of the GNU General Public License
  21   along with this program; see the file COPYING.  If not, write to
  22   the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
  23   Boston, MA 02110-1301, USA.
  24
  25 */
  26
  27 #include "b43.h"
  28 #include "main.h"
  29 #include "tables.h"
  30 #include "phy_common.h"
  31 #include "wa.h"
  32
  33 static void b43_wa_papd(struct b43_wldev *dev)
  34 {
  35         u16 backup;
  36
  37         backup = b43_ofdmtab_read16(dev, B43_OFDMTAB_PWRDYN2, 0);
  38         b43_ofdmtab_write16(dev, B43_OFDMTAB_PWRDYN2, 0, 7);
  39         b43_ofdmtab_write16(dev, B43_OFDMTAB_UNKNOWN_APHY, 0, 0);
  40         b43_dummy_transmission(dev);
  41         b43_ofdmtab_write16(dev, B43_OFDMTAB_PWRDYN2, 0, backup);
  42 }
  43
  44 static void b43_wa_auxclipthr(struct b43_wldev *dev)
  45 {
  46         b43_phy_write(dev, B43_PHY_OFDM(0x8E), 0x3800);
  47 }
  48
  49 static void b43_wa_afcdac(struct b43_wldev *dev)
  50 {
  51         b43_phy_write(dev, 0x0035, 0x03FF);
  52         b43_phy_write(dev, 0x0036, 0x0400);
  53 }
  54
  55 static void b43_wa_txdc_offset(struct b43_wldev *dev)
  56 {
  57         b43_ofdmtab_write16(dev, B43_OFDMTAB_DC, 0, 0x0051);
  58 }
  59
  60 void b43_wa_initgains(struct b43_wldev *dev)
  61 {
  62         struct b43_phy *phy = &dev->phy;
  63
  64         b43_phy_write(dev, B43_PHY_LNAHPFCTL, 0x1FF9);
  65         b43_phy_mask(dev, B43_PHY_LPFGAINCTL, 0xFF0F);
  66         if (phy->rev <= 2)
  67                 b43_ofdmtab_write16(dev, B43_OFDMTAB_LPFGAIN, 0, 0x1FBF);
  68         b43_radio_write16(dev, 0x0002, 0x1FBF);
  69
  70         b43_phy_write(dev, 0x0024, 0x4680);
  71         b43_phy_write(dev, 0x0020, 0x0003);
  72         b43_phy_write(dev, 0x001D, 0x0F40);
  73         b43_phy_write(dev, 0x001F, 0x1C00);
  74         if (phy->rev <= 3)
  75                 b43_phy_write(dev, 0x002A,
  76                         (b43_phy_read(dev, 0x002A) & 0x00FF) | 0x0400);
  77         else if (phy->rev == 5) {
  78                 b43_phy_write(dev, 0x002A,
  79                         (b43_phy_read(dev, 0x002A) & 0x00FF) | 0x1A00);
  80                 b43_phy_write(dev, 0x00CC, 0x2121);
  81         }
  82         if (phy->rev >= 3)
  83                 b43_phy_write(dev, 0x00BA, 0x3ED5);
  84 }
  85
  86 static void b43_wa_divider(struct b43_wldev *dev)
  87 {
  88         b43_phy_mask(dev, 0x002B, ~0x0100);
  89         b43_phy_write(dev, 0x008E, 0x58C1);
  90 }
  91
  92 static void b43_wa_gt(struct b43_wldev *dev) /* Gain table. */
  93 {
  94         if (dev->phy.rev <= 2) {
  95                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN2, 0, 15);
  96                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN2, 1, 31);
  97                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN2, 2, 42);
  98                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN2, 3, 48);
  99                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN2, 4, 58);
 100                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 0, 19);
 101                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 1, 19);
 102                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 2, 19);
 103                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 3, 19);
 104                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 4, 21);
 105                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 5, 21);
 106                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 6, 25);
 107                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN1, 0, 3);
 108                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN1, 1, 3);
 109                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN1, 2, 7);
 110         } else {
 111                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 0, 19);
 112                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 1, 19);
 113                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 2, 19);
 114                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 3, 19);
 115                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 4, 21);
 116                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 5, 21);
 117                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 6, 25);
 118         }
 119 }
 120
 121 static void b43_wa_rssi_lt(struct b43_wldev *dev) /* RSSI lookup table */
 122 {
 123         int i;
 124
 125         if (0 /* FIXME: For APHY.rev=2 this might be needed */) {
 126                 for (i = 0; i < 8; i++)
 127                         b43_ofdmtab_write16(dev, B43_OFDMTAB_RSSI, i, i + 8);
 128                 for (i = 8; i < 16; i++)
 129                         b43_ofdmtab_write16(dev, B43_OFDMTAB_RSSI, i, i - 8);
 130         } else {
 131                 for (i = 0; i < 64; i++)
 132                         b43_ofdmtab_write16(dev, B43_OFDMTAB_RSSI, i, i);
 133         }
 134 }
 135
 136 static void b43_wa_analog(struct b43_wldev *dev)
 137 {
 138         struct b43_phy *phy = &dev->phy;
 139         u16 ofdmrev;
 140
 141         ofdmrev = b43_phy_read(dev, B43_PHY_VERSION_OFDM) & B43_PHYVER_VERSION;
 142         if (ofdmrev > 2) {
 143                 if (phy->type == B43_PHYTYPE_A)
 144                         b43_phy_write(dev, B43_PHY_PWRDOWN, 0x1808);
 145                 else
 146                         b43_phy_write(dev, B43_PHY_PWRDOWN, 0x1000);
 147         } else {
 148                 b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 3, 0x1044);
 149                 b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 4, 0x7201);
 150                 b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 6, 0x0040);
 151         }
 152 }
 153
 154 static void b43_wa_dac(struct b43_wldev *dev)
 155 {
 156         if (dev->phy.analog == 1)
 157                 b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 1,
 158                         (b43_ofdmtab_read16(dev, B43_OFDMTAB_DAC, 1) & ~0x0034) | 0x0008);
 159         else
 160                 b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 1,
 161                         (b43_ofdmtab_read16(dev, B43_OFDMTAB_DAC, 1) & ~0x0078) | 0x0010);
 162 }
 163
 164 static void b43_wa_fft(struct b43_wldev *dev) /* Fine frequency table */
 165 {
 166         int i;
 167
 168         if (dev->phy.type == B43_PHYTYPE_A)
 169                 for (i = 0; i < B43_TAB_FINEFREQA_SIZE; i++)
 170                         b43_ofdmtab_write16(dev, B43_OFDMTAB_DACRFPABB, i, b43_tab_finefreqa[i]);
 171         else
 172                 for (i = 0; i < B43_TAB_FINEFREQG_SIZE; i++)
 173                         b43_ofdmtab_write16(dev, B43_OFDMTAB_DACRFPABB, i, b43_tab_finefreqg[i]);
 174 }
 175
 176 static void b43_wa_nft(struct b43_wldev *dev) /* Noise figure table */
 177 {
 178         struct b43_phy *phy = &dev->phy;
 179         int i;
 180
 181         if (phy->type == B43_PHYTYPE_A) {
 182                 if (phy->rev == 2)
 183                         for (i = 0; i < B43_TAB_NOISEA2_SIZE; i++)
 184                                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, i, b43_tab_noisea2[i]);
 185                 else
 186                         for (i = 0; i < B43_TAB_NOISEA3_SIZE; i++)
 187                                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, i, b43_tab_noisea3[i]);
 188         } else {
 189                 if (phy->rev == 1)
 190                         for (i = 0; i < B43_TAB_NOISEG1_SIZE; i++)
 191                                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, i, b43_tab_noiseg1[i]);
 192                 else
 193                         for (i = 0; i < B43_TAB_NOISEG2_SIZE; i++)
 194                                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, i, b43_tab_noiseg2[i]);
 195         }
 196 }
 197
 198 static void b43_wa_rt(struct b43_wldev *dev) /* Rotor table */
 199 {
 200         int i;
 201
 202         for (i = 0; i < B43_TAB_ROTOR_SIZE; i++)
 203                 b43_ofdmtab_write32(dev, B43_OFDMTAB_ROTOR, i, b43_tab_rotor[i]);
 204 }
 205
 206 static void b43_write_null_nst(struct b43_wldev *dev)
 207 {
 208         int i;
 209
 210         for (i = 0; i < B43_TAB_NOISESCALE_SIZE; i++)
 211                 b43_ofdmtab_write16(dev, B43_OFDMTAB_NOISESCALE, i, 0);
 212 }
 213
 214 static void b43_write_nst(struct b43_wldev *dev, const u16 *nst)
 215 {
 216         int i;
 217
 218         for (i = 0; i < B43_TAB_NOISESCALE_SIZE; i++)
 219                 b43_ofdmtab_write16(dev, B43_OFDMTAB_NOISESCALE, i, nst[i]);
 220 }
 221
 222 static void b43_wa_nst(struct b43_wldev *dev) /* Noise scale table */
 223 {
 224         struct b43_phy *phy = &dev->phy;
 225
 226         if (phy->type == B43_PHYTYPE_A) {
 227                 if (phy->rev <= 1)
 228                         b43_write_null_nst(dev);
 229                 else if (phy->rev == 2)
 230                         b43_write_nst(dev, b43_tab_noisescalea2);
 231                 else if (phy->rev == 3)
 232                         b43_write_nst(dev, b43_tab_noisescalea3);
 233                 else
 234                         b43_write_nst(dev, b43_tab_noisescaleg3);
 235         } else {
 236                 if (phy->rev >= 6) {
 237                         if (b43_phy_read(dev, B43_PHY_ENCORE) & B43_PHY_ENCORE_EN)
 238                                 b43_write_nst(dev, b43_tab_noisescaleg3);
 239                         else
 240                                 b43_write_nst(dev, b43_tab_noisescaleg2);
 241                 } else {
 242                         b43_write_nst(dev, b43_tab_noisescaleg1);
 243                 }
 244         }
 245 }
 246
 247 static void b43_wa_art(struct b43_wldev *dev) /* ADV retard table */
 248 {
 249         int i;
 250
 251         for (i = 0; i < B43_TAB_RETARD_SIZE; i++)
 252                         b43_ofdmtab_write32(dev, B43_OFDMTAB_ADVRETARD,
 253                                 i, b43_tab_retard[i]);
 254 }
 255
 256 static void b43_wa_txlna_gain(struct b43_wldev *dev)
 257 {
 258         b43_ofdmtab_write16(dev, B43_OFDMTAB_DC, 13, 0x0000);
 259 }
 260
 261 static void b43_wa_crs_reset(struct b43_wldev *dev)
 262 {
 263         b43_phy_write(dev, 0x002C, 0x0064);
 264 }
 265
 266 static void b43_wa_2060txlna_gain(struct b43_wldev *dev)
 267 {
 268         b43_hf_write(dev, b43_hf_read(dev) |
 269                          B43_HF_2060W);
 270 }
 271
 272 static void b43_wa_lms(struct b43_wldev *dev)
 273 {
 274         b43_phy_write(dev, 0x0055,
 275                 (b43_phy_read(dev, 0x0055) & 0xFFC0) | 0x0004);
 276 }
 277
 278 static void b43_wa_mixedsignal(struct b43_wldev *dev)
 279 {
 280         b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 1, 3);
 281 }
 282
 283 static void b43_wa_msst(struct b43_wldev *dev) /* Min sigma square table */
 284 {
 285         struct b43_phy *phy = &dev->phy;
 286         int i;
 287         const u16 *tab;
 288
 289         if (phy->type == B43_PHYTYPE_A) {
 290                 tab = b43_tab_sigmasqr1;
 291         } else if (phy->type == B43_PHYTYPE_G) {
 292                 tab = b43_tab_sigmasqr2;
 293         } else {
 294                 B43_WARN_ON(1);
 295                 return;
 296         }
 297
 298         for (i = 0; i < B43_TAB_SIGMASQR_SIZE; i++) {
 299                 b43_ofdmtab_write16(dev, B43_OFDMTAB_MINSIGSQ,
 300                                         i, tab[i]);
 301         }
 302 }
 303
 304 static void b43_wa_iqadc(struct b43_wldev *dev)
 305 {
 306         if (dev->phy.analog == 4)
 307                 b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 0,
 308                         b43_ofdmtab_read16(dev, B43_OFDMTAB_DAC, 0) & ~0xF000);
 309 }
 310
 311 static void b43_wa_crs_ed(struct b43_wldev *dev)
 312 {
 313         struct b43_phy *phy = &dev->phy;
 314
 315         if (phy->rev == 1) {
 316                 b43_phy_write(dev, B43_PHY_CRSTHRES1_R1, 0x4F19);
 317         } else if (phy->rev == 2) {
 318                 b43_phy_write(dev, B43_PHY_CRSTHRES1, 0x1861);
 319                 b43_phy_write(dev, B43_PHY_CRSTHRES2, 0x0271);
 320                 b43_phy_set(dev, B43_PHY_ANTDWELL, 0x0800);
 321         } else {
 322                 b43_phy_write(dev, B43_PHY_CRSTHRES1, 0x0098);
 323                 b43_phy_write(dev, B43_PHY_CRSTHRES2, 0x0070);
 324                 b43_phy_write(dev, B43_PHY_OFDM(0xC9), 0x0080);
 325                 b43_phy_set(dev, B43_PHY_ANTDWELL, 0x0800);
 326         }
 327 }
 328
 329 static void b43_wa_crs_thr(struct b43_wldev *dev)
 330 {
 331         b43_phy_write(dev, B43_PHY_CRS0,
 332                         (b43_phy_read(dev, B43_PHY_CRS0) & ~0x03C0) | 0xD000);
 333 }
 334
 335 static void b43_wa_crs_blank(struct b43_wldev *dev)
 336 {
 337         b43_phy_write(dev, B43_PHY_OFDM(0x2C), 0x005A);
 338 }
 339
 340 static void b43_wa_cck_shiftbits(struct b43_wldev *dev)
 341 {
 342         b43_phy_write(dev, B43_PHY_CCKSHIFTBITS, 0x0026);
 343 }
 344
 345 static void b43_wa_wrssi_offset(struct b43_wldev *dev)
 346 {
 347         int i;
 348
 349         if (dev->phy.rev == 1) {
 350                 for (i = 0; i < 16; i++) {
 351                         b43_ofdmtab_write16(dev, B43_OFDMTAB_WRSSI_R1,
 352                                                 i, 0x0020);
 353                 }
 354         } else {
 355                 for (i = 0; i < 32; i++) {
 356                         b43_ofdmtab_write16(dev, B43_OFDMTAB_WRSSI,
 357                                                 i, 0x0820);
 358                 }
 359         }
 360 }
 361
 362 static void b43_wa_txpuoff_rxpuon(struct b43_wldev *dev)
 363 {
 364         b43_ofdmtab_write16(dev, B43_OFDMTAB_UNKNOWN_0F, 2, 15);
 365         b43_ofdmtab_write16(dev, B43_OFDMTAB_UNKNOWN_0F, 3, 20);
 366 }
 367
 368 static void b43_wa_altagc(struct b43_wldev *dev)
 369 {
 370         struct b43_phy *phy = &dev->phy;
 371
 372         if (phy->rev == 1) {
 373                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1_R1, 0, 254);
 374                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1_R1, 1, 13);
 375                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1_R1, 2, 19);
 376                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1_R1, 3, 25);
 377                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, 0, 0x2710);
 378                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, 1, 0x9B83);
 379                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, 2, 0x9B83);
 380                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, 3, 0x0F8D);
 381                 b43_phy_write(dev, B43_PHY_LMS, 4);
 382         } else {
 383                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 0, 254);
 384                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 1, 13);
 385                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 2, 19);
 386                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 3, 25);
 387         }
 388
 389         b43_phy_write(dev, B43_PHY_CCKSHIFTBITS_WA,
 390                 (b43_phy_read(dev, B43_PHY_CCKSHIFTBITS_WA) & ~0xFF00) | 0x5700);
 391         b43_phy_write(dev, B43_PHY_OFDM(0x1A),
 392                 (b43_phy_read(dev, B43_PHY_OFDM(0x1A)) & ~0x007F) | 0x000F);
 393         b43_phy_write(dev, B43_PHY_OFDM(0x1A),
 394                 (b43_phy_read(dev, B43_PHY_OFDM(0x1A)) & ~0x3F80) | 0x2B80);
 395         b43_phy_write(dev, B43_PHY_ANTWRSETT,
 396                 (b43_phy_read(dev, B43_PHY_ANTWRSETT) & 0xF0FF) | 0x0300);
 397         b43_radio_write16(dev, 0x7A,
 398                 b43_radio_read16(dev, 0x7A) | 0x0008);
 399         b43_phy_write(dev, B43_PHY_N1P1GAIN,
 400                 (b43_phy_read(dev, B43_PHY_N1P1GAIN) & ~0x000F) | 0x0008);
 401         b43_phy_write(dev, B43_PHY_P1P2GAIN,
 402                 (b43_phy_read(dev, B43_PHY_P1P2GAIN) & ~0x0F00) | 0x0600);
 403         b43_phy_write(dev, B43_PHY_N1N2GAIN,
 404                 (b43_phy_read(dev, B43_PHY_N1N2GAIN) & ~0x0F00) | 0x0700);
 405         b43_phy_write(dev, B43_PHY_N1P1GAIN,
 406                 (b43_phy_read(dev, B43_PHY_N1P1GAIN) & ~0x0F00) | 0x0100);
 407         if (phy->rev == 1) {
 408                 b43_phy_write(dev, B43_PHY_N1N2GAIN,
 409                                   (b43_phy_read(dev, B43_PHY_N1N2GAIN)
 410                                    & ~0x000F) | 0x0007);
 411         }
 412         b43_phy_write(dev, B43_PHY_OFDM(0x88),
 413                 (b43_phy_read(dev, B43_PHY_OFDM(0x88)) & ~0x00FF) | 0x001C);
 414         b43_phy_write(dev, B43_PHY_OFDM(0x88),
 415                 (b43_phy_read(dev, B43_PHY_OFDM(0x88)) & ~0x3F00) | 0x0200);
 416         b43_phy_write(dev, B43_PHY_OFDM(0x96),
 417                 (b43_phy_read(dev, B43_PHY_OFDM(0x96)) & ~0x00FF) | 0x001C);
 418         b43_phy_write(dev, B43_PHY_OFDM(0x89),
 419                 (b43_phy_read(dev, B43_PHY_OFDM(0x89)) & ~0x00FF) | 0x0020);
 420         b43_phy_write(dev, B43_PHY_OFDM(0x89),
 421                 (b43_phy_read(dev, B43_PHY_OFDM(0x89)) & ~0x3F00) | 0x0200);
 422         b43_phy_write(dev, B43_PHY_OFDM(0x82),
 423                 (b43_phy_read(dev, B43_PHY_OFDM(0x82)) & ~0x00FF) | 0x002E);
 424         b43_phy_write(dev, B43_PHY_OFDM(0x96),
 425                 (b43_phy_read(dev, B43_PHY_OFDM(0x96)) & ~0xFF00) | 0x1A00);
 426         b43_phy_write(dev, B43_PHY_OFDM(0x81),
 427                 (b43_phy_read(dev, B43_PHY_OFDM(0x81)) & ~0x00FF) | 0x0028);
 428         b43_phy_write(dev, B43_PHY_OFDM(0x81),
 429                 (b43_phy_read(dev, B43_PHY_OFDM(0x81)) & ~0xFF00) | 0x2C00);
 430         if (phy->rev == 1) {
 431                 b43_phy_write(dev, B43_PHY_PEAK_COUNT, 0x092B);
 432                 b43_phy_write(dev, B43_PHY_OFDM(0x1B),
 433                         (b43_phy_read(dev, B43_PHY_OFDM(0x1B)) & ~0x001E) | 0x0002);
 434         } else {
 435                 b43_phy_mask(dev, B43_PHY_OFDM(0x1B), ~0x001E);
 436                 b43_phy_write(dev, B43_PHY_OFDM(0x1F), 0x287A);
 437                 b43_phy_write(dev, B43_PHY_LPFGAINCTL,
 438                         (b43_phy_read(dev, B43_PHY_LPFGAINCTL) & ~0x000F) | 0x0004);
 439                 if (phy->rev >= 6) {
 440                         b43_phy_write(dev, B43_PHY_OFDM(0x22), 0x287A);
 441                         b43_phy_write(dev, B43_PHY_LPFGAINCTL,
 442                                 (b43_phy_read(dev, B43_PHY_LPFGAINCTL) & ~0xF000) | 0x3000);
 443                 }
 444         }
 445         b43_phy_write(dev, B43_PHY_DIVSRCHIDX,
 446                 (b43_phy_read(dev, B43_PHY_DIVSRCHIDX) & 0x8080) | 0x7874);
 447         b43_phy_write(dev, B43_PHY_OFDM(0x8E), 0x1C00);
 448         if (phy->rev == 1) {
 449                 b43_phy_write(dev, B43_PHY_DIVP1P2GAIN,
 450                         (b43_phy_read(dev, B43_PHY_DIVP1P2GAIN) & ~0x0F00) | 0x0600);
 451                 b43_phy_write(dev, B43_PHY_OFDM(0x8B), 0x005E);
 452                 b43_phy_write(dev, B43_PHY_ANTWRSETT,
 453                         (b43_phy_read(dev, B43_PHY_ANTWRSETT) & ~0x00FF) | 0x001E);
 454                 b43_phy_write(dev, B43_PHY_OFDM(0x8D), 0x0002);
 455                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3_R1, 0, 0);
 456                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3_R1, 1, 7);
 457                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3_R1, 2, 16);
 458                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3_R1, 3, 28);
 459         } else {
 460                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3, 0, 0);
 461                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3, 1, 7);
 462                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3, 2, 16);
 463                 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3, 3, 28);
 464         }
 465         if (phy->rev >= 6) {
 466                 b43_phy_mask(dev, B43_PHY_OFDM(0x26), ~0x0003);
 467                 b43_phy_mask(dev, B43_PHY_OFDM(0x26), ~0x1000);
 468         }
 469         b43_phy_read(dev, B43_PHY_VERSION_OFDM); /* Dummy read */
 470 }
 471
 472 static void b43_wa_tr_ltov(struct b43_wldev *dev) /* TR Lookup Table Original Values */
 473 {
 474         b43_gtab_write(dev, B43_GTAB_ORIGTR, 0, 0xC480);
 475 }
 476
 477 static void b43_wa_cpll_nonpilot(struct b43_wldev *dev)
 478 {
 479         b43_ofdmtab_write16(dev, B43_OFDMTAB_UNKNOWN_11, 0, 0);
 480         b43_ofdmtab_write16(dev, B43_OFDMTAB_UNKNOWN_11, 1, 0);
 481 }
 482
 483 static void b43_wa_rssi_adc(struct b43_wldev *dev)
 484 {
 485         if (dev->phy.analog == 4)
 486                 b43_phy_write(dev, 0x00DC, 0x7454);
 487 }
 488
 489 static void b43_wa_boards_a(struct b43_wldev *dev)
 490 {
 491         struct ssb_bus *bus = dev->dev->bus;
 492
 493         if (bus->boardinfo.vendor == SSB_BOARDVENDOR_BCM &&
 494             bus->boardinfo.type == SSB_BOARD_BU4306 &&
 495             bus->boardinfo.rev < 0x30) {
 496                 b43_phy_write(dev, 0x0010, 0xE000);
 497                 b43_phy_write(dev, 0x0013, 0x0140);
 498                 b43_phy_write(dev, 0x0014, 0x0280);
 499         } else {
 500                 if (bus->boardinfo.type == SSB_BOARD_MP4318 &&
 501                     bus->boardinfo.rev < 0x20) {
 502                         b43_phy_write(dev, 0x0013, 0x0210);
 503                         b43_phy_write(dev, 0x0014, 0x0840);
 504                 } else {
 505                         b43_phy_write(dev, 0x0013, 0x0140);
 506                         b43_phy_write(dev, 0x0014, 0x0280);
 507                 }
 508                 if (dev->phy.rev <= 4)
 509                         b43_phy_write(dev, 0x0010, 0xE000);
 510                 else
 511                         b43_phy_write(dev, 0x0010, 0x2000);
 512                 b43_ofdmtab_write16(dev, B43_OFDMTAB_DC, 1, 0x0039);
 513                 b43_ofdmtab_write16(dev, B43_OFDMTAB_UNKNOWN_APHY, 7, 0x0040);
 514         }
 515 }
 516
 517 static void b43_wa_boards_g(struct b43_wldev *dev)
 518 {
 519         struct ssb_bus *bus = dev->dev->bus;
 520         struct b43_phy *phy = &dev->phy;
 521
 522         if (bus->boardinfo.vendor != SSB_BOARDVENDOR_BCM ||
 523             bus->boardinfo.type != SSB_BOARD_BU4306 ||
 524             bus->boardinfo.rev != 0x17) {
 525                 if (phy->rev < 2) {
 526                         b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX_R1, 1, 0x0002);
 527                         b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX_R1, 2, 0x0001);
 528                 } else {
 529                         b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 1, 0x0002);
 530                         b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 2, 0x0001);
 531                         if ((bus->sprom.boardflags_lo & B43_BFL_EXTLNA) &&
 532                             (phy->rev >= 7)) {
 533                                 b43_phy_mask(dev, B43_PHY_EXTG(0x11), 0xF7FF);
 534                                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0020, 0x0001);
 535                                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0021, 0x0001);
 536                                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0022, 0x0001);
 537                                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0023, 0x0000);
 538                                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0000, 0x0000);
 539                                 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0003, 0x0002);
 540                         }
 541                 }
 542         }
 543         if (bus->sprom.boardflags_lo & B43_BFL_FEM) {
 544                 b43_phy_write(dev, B43_PHY_GTABCTL, 0x3120);
 545                 b43_phy_write(dev, B43_PHY_GTABDATA, 0xC480);
 546         }
 547 }
 548
 549 void b43_wa_all(struct b43_wldev *dev)
 550 {
 551         struct b43_phy *phy = &dev->phy;
 552
 553         if (phy->type == B43_PHYTYPE_A) {
 554                 switch (phy->rev) {
 555                 case 2:
 556                         b43_wa_papd(dev);
 557                         b43_wa_auxclipthr(dev);
 558                         b43_wa_afcdac(dev);
 559                         b43_wa_txdc_offset(dev);
 560                         b43_wa_initgains(dev);
 561                         b43_wa_divider(dev);
 562                         b43_wa_gt(dev);
 563                         b43_wa_rssi_lt(dev);
 564                         b43_wa_analog(dev);
 565                         b43_wa_dac(dev);
 566                         b43_wa_fft(dev);
 567                         b43_wa_nft(dev);
 568                         b43_wa_rt(dev);
 569                         b43_wa_nst(dev);
 570                         b43_wa_art(dev);
 571                         b43_wa_txlna_gain(dev);
 572                         b43_wa_crs_reset(dev);
 573                         b43_wa_2060txlna_gain(dev);
 574                         b43_wa_lms(dev);
 575                         break;
 576                 case 3:
 577                         b43_wa_papd(dev);
 578                         b43_wa_mixedsignal(dev);
 579                         b43_wa_rssi_lt(dev);
 580                         b43_wa_txdc_offset(dev);
 581                         b43_wa_initgains(dev);
 582                         b43_wa_dac(dev);
 583                         b43_wa_nft(dev);
 584                         b43_wa_nst(dev);
 585                         b43_wa_msst(dev);
 586                         b43_wa_analog(dev);
 587                         b43_wa_gt(dev);
 588                         b43_wa_txpuoff_rxpuon(dev);
 589                         b43_wa_txlna_gain(dev);
 590                         break;
 591                 case 5:
 592                         b43_wa_iqadc(dev);
 593                 case 6:
 594                         b43_wa_papd(dev);
 595                         b43_wa_rssi_lt(dev);
 596                         b43_wa_txdc_offset(dev);
 597                         b43_wa_initgains(dev);
 598                         b43_wa_dac(dev);
 599                         b43_wa_nft(dev);
 600                         b43_wa_nst(dev);
 601                         b43_wa_msst(dev);
 602                         b43_wa_analog(dev);
 603                         b43_wa_gt(dev);
 604                         b43_wa_txpuoff_rxpuon(dev);
 605                         b43_wa_txlna_gain(dev);
 606                         break;
 607                 case 7:
 608                         b43_wa_iqadc(dev);
 609                         b43_wa_papd(dev);
 610                         b43_wa_rssi_lt(dev);
 611                         b43_wa_txdc_offset(dev);
 612                         b43_wa_initgains(dev);
 613                         b43_wa_dac(dev);
 614                         b43_wa_nft(dev);
 615                         b43_wa_nst(dev);
 616                         b43_wa_msst(dev);
 617                         b43_wa_analog(dev);
 618                         b43_wa_gt(dev);
 619                         b43_wa_txpuoff_rxpuon(dev);
 620                         b43_wa_txlna_gain(dev);
 621                         b43_wa_rssi_adc(dev);
 622                 default:
 623                         B43_WARN_ON(1);
 624                 }
 625                 b43_wa_boards_a(dev);
 626         } else if (phy->type == B43_PHYTYPE_G) {
 627                 switch (phy->rev) {
 628                 case 1://XXX review rev1
 629                         b43_wa_crs_ed(dev);
 630                         b43_wa_crs_thr(dev);
 631                         b43_wa_crs_blank(dev);
 632                         b43_wa_cck_shiftbits(dev);
 633                         b43_wa_fft(dev);
 634                         b43_wa_nft(dev);
 635                         b43_wa_rt(dev);
 636                         b43_wa_nst(dev);
 637                         b43_wa_art(dev);
 638                         b43_wa_wrssi_offset(dev);
 639                         b43_wa_altagc(dev);
 640                         break;
 641                 case 2:
 642                 case 6:
 643                 case 7:
 644                 case 8:
 645                 case 9:
 646                         b43_wa_tr_ltov(dev);
 647                         b43_wa_crs_ed(dev);
 648                         b43_wa_rssi_lt(dev);
 649                         b43_wa_nft(dev);
 650                         b43_wa_nst(dev);
 651                         b43_wa_msst(dev);
 652                         b43_wa_wrssi_offset(dev);
 653                         b43_wa_altagc(dev);
 654                         b43_wa_analog(dev);
 655                         b43_wa_txpuoff_rxpuon(dev);
 656                         break;
 657                 default:
 658                         B43_WARN_ON(1);
 659                 }
 660                 b43_wa_boards_g(dev);
 661         } else { /* No N PHY support so far */
 662                 B43_WARN_ON(1);
 663         }
 664
 665         b43_wa_cpll_nonpilot(dev);
 666 }