2 * Copyright (c) 2008 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 /* mac80211 and PCI callbacks */
19 #include <linux/nl80211.h>
22 #define ATH_PCI_VERSION "0.1"
24 #define IEEE80211_HTCAP_MAXRXAMPDU_FACTOR 13
26 static char *dev_info = "ath9k";
28 MODULE_AUTHOR("Atheros Communications");
29 MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
30 MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
31 MODULE_LICENSE("Dual BSD/GPL");
33 static struct pci_device_id ath_pci_id_table[] __devinitdata = {
34 { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI */
35 { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
36 { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI */
37 { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */
38 { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
42 static int ath_get_channel(struct ath_softc *sc,
43 struct ieee80211_channel *chan)
47 for (i = 0; i < sc->sc_ah->ah_nchan; i++) {
48 if (sc->sc_ah->ah_channels[i].channel == chan->center_freq)
55 static u32 ath_get_extchanmode(struct ath_softc *sc,
56 struct ieee80211_channel *chan)
59 u8 ext_chan_offset = sc->sc_ht_info.ext_chan_offset;
60 enum ath9k_ht_macmode tx_chan_width = sc->sc_ht_info.tx_chan_width;
63 case IEEE80211_BAND_2GHZ:
64 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_NONE) &&
65 (tx_chan_width == ATH9K_HT_MACMODE_20))
66 chanmode = CHANNEL_G_HT20;
67 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
68 (tx_chan_width == ATH9K_HT_MACMODE_2040))
69 chanmode = CHANNEL_G_HT40PLUS;
70 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_BELOW) &&
71 (tx_chan_width == ATH9K_HT_MACMODE_2040))
72 chanmode = CHANNEL_G_HT40MINUS;
74 case IEEE80211_BAND_5GHZ:
75 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_NONE) &&
76 (tx_chan_width == ATH9K_HT_MACMODE_20))
77 chanmode = CHANNEL_A_HT20;
78 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
79 (tx_chan_width == ATH9K_HT_MACMODE_2040))
80 chanmode = CHANNEL_A_HT40PLUS;
81 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_BELOW) &&
82 (tx_chan_width == ATH9K_HT_MACMODE_2040))
83 chanmode = CHANNEL_A_HT40MINUS;
93 static int ath_setkey_tkip(struct ath_softc *sc,
94 struct ieee80211_key_conf *key,
95 struct ath9k_keyval *hk,
101 key_txmic = key->key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
102 key_rxmic = key->key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
105 /* Group key installation */
106 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
107 return ath_keyset(sc, key->keyidx, hk, addr);
109 if (!sc->sc_splitmic) {
111 * data key goes at first index,
112 * the hal handles the MIC keys at index+64.
114 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
115 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
116 return ath_keyset(sc, key->keyidx, hk, addr);
119 * TX key goes at first index, RX key at +32.
120 * The hal handles the MIC keys at index+64.
122 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
123 if (!ath_keyset(sc, key->keyidx, hk, NULL)) {
124 /* Txmic entry failed. No need to proceed further */
125 DPRINTF(sc, ATH_DBG_KEYCACHE,
126 "%s Setting TX MIC Key Failed\n", __func__);
130 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
131 /* XXX delete tx key on failure? */
132 return ath_keyset(sc, key->keyidx+32, hk, addr);
135 static int ath_key_config(struct ath_softc *sc,
137 struct ieee80211_key_conf *key)
139 struct ieee80211_vif *vif;
140 struct ath9k_keyval hk;
141 const u8 *mac = NULL;
143 enum ieee80211_if_types opmode;
145 memset(&hk, 0, sizeof(hk));
149 hk.kv_type = ATH9K_CIPHER_WEP;
152 hk.kv_type = ATH9K_CIPHER_TKIP;
155 hk.kv_type = ATH9K_CIPHER_AES_CCM;
161 hk.kv_len = key->keylen;
162 memcpy(hk.kv_val, key->key, key->keylen);
167 vif = sc->sc_vaps[0]->av_if_data;
172 * For _M_STA mc tx, we will not setup a key at all since we never
174 * _M_STA mc rx, we will use the keyID.
175 * for _M_IBSS mc tx, we will use the keyID, and no macaddr.
176 * for _M_IBSS mc rx, we will alloc a slot and plumb the mac of the
177 * peer node. BUT we will plumb a cleartext key so that we can do
178 * perSta default key table lookup in software.
180 if (is_broadcast_ether_addr(addr)) {
182 case IEEE80211_IF_TYPE_STA:
183 /* default key: could be group WPA key
184 * or could be static WEP key */
187 case IEEE80211_IF_TYPE_IBSS:
189 case IEEE80211_IF_TYPE_AP:
199 if (key->alg == ALG_TKIP)
200 ret = ath_setkey_tkip(sc, key, &hk, mac);
202 ret = ath_keyset(sc, key->keyidx, &hk, mac);
207 sc->sc_keytype = hk.kv_type;
211 static void ath_key_delete(struct ath_softc *sc, struct ieee80211_key_conf *key)
215 freeslot = (key->keyidx >= 4) ? 1 : 0;
216 ath_key_reset(sc, key->keyidx, freeslot);
219 static void setup_ht_cap(struct ieee80211_ht_info *ht_info)
221 #define ATH9K_HT_CAP_MAXRXAMPDU_65536 0x3 /* 2 ^ 16 */
222 #define ATH9K_HT_CAP_MPDUDENSITY_8 0x6 /* 8 usec */
224 ht_info->ht_supported = 1;
225 ht_info->cap = (u16)IEEE80211_HT_CAP_SUP_WIDTH
226 |(u16)IEEE80211_HT_CAP_MIMO_PS
227 |(u16)IEEE80211_HT_CAP_SGI_40
228 |(u16)IEEE80211_HT_CAP_DSSSCCK40;
230 ht_info->ampdu_factor = ATH9K_HT_CAP_MAXRXAMPDU_65536;
231 ht_info->ampdu_density = ATH9K_HT_CAP_MPDUDENSITY_8;
232 /* setup supported mcs set */
233 memset(ht_info->supp_mcs_set, 0, 16);
234 ht_info->supp_mcs_set[0] = 0xff;
235 ht_info->supp_mcs_set[1] = 0xff;
236 ht_info->supp_mcs_set[12] = IEEE80211_HT_CAP_MCS_TX_DEFINED;
239 static int ath_rate2idx(struct ath_softc *sc, int rate)
241 int i = 0, cur_band, n_rates;
242 struct ieee80211_hw *hw = sc->hw;
244 cur_band = hw->conf.channel->band;
245 n_rates = sc->sbands[cur_band].n_bitrates;
247 for (i = 0; i < n_rates; i++) {
248 if (sc->sbands[cur_band].bitrates[i].bitrate == rate)
253 * NB:mac80211 validates rx rate index against the supported legacy rate
254 * index only (should be done against ht rates also), return the highest
255 * legacy rate index for rx rate which does not match any one of the
256 * supported basic and extended rates to make mac80211 happy.
257 * The following hack will be cleaned up once the issue with
258 * the rx rate index validation in mac80211 is fixed.
265 static void ath9k_rx_prepare(struct ath_softc *sc,
267 struct ath_recv_status *status,
268 struct ieee80211_rx_status *rx_status)
270 struct ieee80211_hw *hw = sc->hw;
271 struct ieee80211_channel *curchan = hw->conf.channel;
273 memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
275 rx_status->mactime = status->tsf;
276 rx_status->band = curchan->band;
277 rx_status->freq = curchan->center_freq;
278 rx_status->noise = ATH_DEFAULT_NOISE_FLOOR;
279 rx_status->signal = rx_status->noise + status->rssi;
280 rx_status->rate_idx = ath_rate2idx(sc, (status->rateKbps / 100));
281 rx_status->antenna = status->antenna;
282 rx_status->qual = status->rssi * 100 / 64;
284 if (status->flags & ATH_RX_MIC_ERROR)
285 rx_status->flag |= RX_FLAG_MMIC_ERROR;
286 if (status->flags & ATH_RX_FCS_ERROR)
287 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
289 rx_status->flag |= RX_FLAG_TSFT;
292 static u8 parse_mpdudensity(u8 mpdudensity)
295 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
296 * 0 for no restriction
305 switch (mpdudensity) {
311 /* Our lower layer calculations limit our precision to
327 static int ath9k_start(struct ieee80211_hw *hw)
329 struct ath_softc *sc = hw->priv;
330 struct ieee80211_channel *curchan = hw->conf.channel;
333 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Starting driver with "
334 "initial channel: %d MHz\n", __func__, curchan->center_freq);
336 /* setup initial channel */
338 pos = ath_get_channel(sc, curchan);
340 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
344 sc->sc_ah->ah_channels[pos].chanmode =
345 (curchan->band == IEEE80211_BAND_2GHZ) ? CHANNEL_G : CHANNEL_A;
348 error = ath_open(sc, &sc->sc_ah->ah_channels[pos]);
350 DPRINTF(sc, ATH_DBG_FATAL,
351 "%s: Unable to complete ath_open\n", __func__);
355 ieee80211_wake_queues(hw);
359 static int ath9k_tx(struct ieee80211_hw *hw,
362 struct ath_softc *sc = hw->priv;
364 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
367 * As a temporary workaround, assign seq# here; this will likely need
368 * to be cleaned up to work better with Beacon transmission and virtual
371 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
372 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
373 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
375 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
376 hdr->seq_ctrl |= cpu_to_le16(sc->seq_no);
379 /* Add the padding after the header if this is not already done */
380 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
382 padsize = hdrlen % 4;
383 if (skb_headroom(skb) < padsize)
385 skb_push(skb, padsize);
386 memmove(skb->data, skb->data + padsize, hdrlen);
389 DPRINTF(sc, ATH_DBG_XMIT, "%s: transmitting packet, skb: %p\n",
393 if (ath_tx_start(sc, skb) != 0) {
394 DPRINTF(sc, ATH_DBG_XMIT, "%s: TX failed\n", __func__);
395 dev_kfree_skb_any(skb);
396 /* FIXME: Check for proper return value from ATH_DEV */
403 static void ath9k_stop(struct ieee80211_hw *hw)
405 struct ath_softc *sc = hw->priv;
408 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Driver halt\n", __func__);
410 error = ath_suspend(sc);
412 DPRINTF(sc, ATH_DBG_CONFIG,
413 "%s: Device is no longer present\n", __func__);
415 ieee80211_stop_queues(hw);
418 static int ath9k_add_interface(struct ieee80211_hw *hw,
419 struct ieee80211_if_init_conf *conf)
421 struct ath_softc *sc = hw->priv;
422 int error, ic_opmode = 0;
424 /* Support only vap for now */
429 switch (conf->type) {
430 case IEEE80211_IF_TYPE_STA:
431 ic_opmode = ATH9K_M_STA;
433 case IEEE80211_IF_TYPE_IBSS:
434 ic_opmode = ATH9K_M_IBSS;
436 case IEEE80211_IF_TYPE_AP:
437 ic_opmode = ATH9K_M_HOSTAP;
440 DPRINTF(sc, ATH_DBG_FATAL,
441 "%s: Interface type %d not yet supported\n",
442 __func__, conf->type);
446 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a VAP of type: %d\n",
450 error = ath_vap_attach(sc, 0, conf->vif, ic_opmode);
452 DPRINTF(sc, ATH_DBG_FATAL,
453 "%s: Unable to attach vap, error: %d\n",
461 static void ath9k_remove_interface(struct ieee80211_hw *hw,
462 struct ieee80211_if_init_conf *conf)
464 struct ath_softc *sc = hw->priv;
468 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach VAP\n", __func__);
470 avp = sc->sc_vaps[0];
472 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
477 #ifdef CONFIG_SLOW_ANT_DIV
478 ath_slow_ant_div_stop(&sc->sc_antdiv);
481 /* Update ratectrl */
482 ath_rate_newstate(sc, avp);
484 /* Reclaim beacon resources */
485 if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP ||
486 sc->sc_ah->ah_opmode == ATH9K_M_IBSS) {
487 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
488 ath_beacon_return(sc, avp);
491 /* Set interrupt mask */
492 sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
493 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_imask & ~ATH9K_INT_GLOBAL);
494 sc->sc_flags &= ~SC_OP_BEACONS;
496 error = ath_vap_detach(sc, 0);
498 DPRINTF(sc, ATH_DBG_FATAL,
499 "%s: Unable to detach vap, error: %d\n",
503 static int ath9k_config(struct ieee80211_hw *hw,
504 struct ieee80211_conf *conf)
506 struct ath_softc *sc = hw->priv;
507 struct ieee80211_channel *curchan = hw->conf.channel;
510 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
512 curchan->center_freq);
514 pos = ath_get_channel(sc, curchan);
516 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
520 sc->sc_ah->ah_channels[pos].chanmode =
521 (curchan->band == IEEE80211_BAND_2GHZ) ?
522 CHANNEL_G : CHANNEL_A;
524 if (sc->sc_curaid && hw->conf.ht_conf.ht_supported)
525 sc->sc_ah->ah_channels[pos].chanmode =
526 ath_get_extchanmode(sc, curchan);
528 sc->sc_config.txpowlimit = 2 * conf->power_level;
530 /* set h/w channel */
531 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
532 DPRINTF(sc, ATH_DBG_FATAL, "%s: Unable to set channel\n",
538 static int ath9k_config_interface(struct ieee80211_hw *hw,
539 struct ieee80211_vif *vif,
540 struct ieee80211_if_conf *conf)
542 struct ath_softc *sc = hw->priv;
543 struct ath_hal *ah = sc->sc_ah;
547 DECLARE_MAC_BUF(mac);
549 avp = sc->sc_vaps[0];
551 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
556 /* TODO: Need to decide which hw opmode to use for multi-interface
558 if (vif->type == IEEE80211_IF_TYPE_AP &&
559 ah->ah_opmode != ATH9K_M_HOSTAP) {
560 ah->ah_opmode = ATH9K_M_HOSTAP;
561 ath9k_hw_setopmode(ah);
562 ath9k_hw_write_associd(ah, sc->sc_myaddr, 0);
563 /* Request full reset to get hw opmode changed properly */
564 sc->sc_flags |= SC_OP_FULL_RESET;
567 if ((conf->changed & IEEE80211_IFCC_BSSID) &&
568 !is_zero_ether_addr(conf->bssid)) {
570 case IEEE80211_IF_TYPE_STA:
571 case IEEE80211_IF_TYPE_IBSS:
572 /* Update ratectrl about the new state */
573 ath_rate_newstate(sc, avp);
576 memcpy(sc->sc_curbssid, conf->bssid, ETH_ALEN);
578 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
581 /* Set aggregation protection mode parameters */
582 sc->sc_config.ath_aggr_prot = 0;
585 * Reset our TSF so that its value is lower than the
586 * beacon that we are trying to catch.
587 * Only then hw will update its TSF register with the
588 * new beacon. Reset the TSF before setting the BSSID
589 * to avoid allowing in any frames that would update
590 * our TSF only to have us clear it
591 * immediately thereafter.
593 ath9k_hw_reset_tsf(sc->sc_ah);
595 /* Disable BMISS interrupt when we're not associated */
596 ath9k_hw_set_interrupts(sc->sc_ah,
598 ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS));
599 sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
601 DPRINTF(sc, ATH_DBG_CONFIG,
602 "%s: RX filter 0x%x bssid %s aid 0x%x\n",
604 print_mac(mac, sc->sc_curbssid), sc->sc_curaid);
606 /* need to reconfigure the beacon */
607 sc->sc_flags &= ~SC_OP_BEACONS ;
615 if ((conf->changed & IEEE80211_IFCC_BEACON) &&
616 ((vif->type == IEEE80211_IF_TYPE_IBSS) ||
617 (vif->type == IEEE80211_IF_TYPE_AP))) {
619 * Allocate and setup the beacon frame.
621 * Stop any previous beacon DMA. This may be
622 * necessary, for example, when an ibss merge
623 * causes reconfiguration; we may be called
624 * with beacon transmission active.
626 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
628 error = ath_beacon_alloc(sc, 0);
632 ath_beacon_sync(sc, 0);
635 /* Check for WLAN_CAPABILITY_PRIVACY ? */
636 if ((avp->av_opmode != IEEE80211_IF_TYPE_STA)) {
637 for (i = 0; i < IEEE80211_WEP_NKID; i++)
638 if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i))
639 ath9k_hw_keysetmac(sc->sc_ah,
644 /* Only legacy IBSS for now */
645 if (vif->type == IEEE80211_IF_TYPE_IBSS)
646 ath_update_chainmask(sc, 0);
651 #define SUPPORTED_FILTERS \
652 (FIF_PROMISC_IN_BSS | \
656 FIF_BCN_PRBRESP_PROMISC | \
659 /* FIXME: sc->sc_full_reset ? */
660 static void ath9k_configure_filter(struct ieee80211_hw *hw,
661 unsigned int changed_flags,
662 unsigned int *total_flags,
664 struct dev_mc_list *mclist)
666 struct ath_softc *sc = hw->priv;
669 changed_flags &= SUPPORTED_FILTERS;
670 *total_flags &= SUPPORTED_FILTERS;
672 sc->rx_filter = *total_flags;
673 rfilt = ath_calcrxfilter(sc);
674 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
676 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
677 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
678 ath9k_hw_write_associd(sc->sc_ah, ath_bcast_mac, 0);
681 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set HW RX filter: 0x%x\n",
682 __func__, sc->rx_filter);
685 static void ath9k_sta_notify(struct ieee80211_hw *hw,
686 struct ieee80211_vif *vif,
687 enum sta_notify_cmd cmd,
690 struct ath_softc *sc = hw->priv;
693 DECLARE_MAC_BUF(mac);
695 spin_lock_irqsave(&sc->node_lock, flags);
696 an = ath_node_find(sc, (u8 *) addr);
697 spin_unlock_irqrestore(&sc->node_lock, flags);
701 spin_lock_irqsave(&sc->node_lock, flags);
703 ath_node_attach(sc, (u8 *)addr, 0);
704 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a node: %s\n",
706 print_mac(mac, addr));
708 ath_node_get(sc, (u8 *)addr);
710 spin_unlock_irqrestore(&sc->node_lock, flags);
712 case STA_NOTIFY_REMOVE:
714 DPRINTF(sc, ATH_DBG_FATAL,
715 "%s: Removal of a non-existent node\n",
718 ath_node_put(sc, an, ATH9K_BH_STATUS_INTACT);
719 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Put a node: %s\n",
721 print_mac(mac, addr));
729 static int ath9k_conf_tx(struct ieee80211_hw *hw,
731 const struct ieee80211_tx_queue_params *params)
733 struct ath_softc *sc = hw->priv;
734 struct ath9k_tx_queue_info qi;
737 if (queue >= WME_NUM_AC)
740 qi.tqi_aifs = params->aifs;
741 qi.tqi_cwmin = params->cw_min;
742 qi.tqi_cwmax = params->cw_max;
743 qi.tqi_burstTime = params->txop;
744 qnum = ath_get_hal_qnum(queue, sc);
746 DPRINTF(sc, ATH_DBG_CONFIG,
747 "%s: Configure tx [queue/halq] [%d/%d], "
748 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
757 ret = ath_txq_update(sc, qnum, &qi);
759 DPRINTF(sc, ATH_DBG_FATAL,
760 "%s: TXQ Update failed\n", __func__);
765 static int ath9k_set_key(struct ieee80211_hw *hw,
766 enum set_key_cmd cmd,
767 const u8 *local_addr,
769 struct ieee80211_key_conf *key)
771 struct ath_softc *sc = hw->priv;
774 DPRINTF(sc, ATH_DBG_KEYCACHE, " %s: Set HW Key\n", __func__);
778 ret = ath_key_config(sc, addr, key);
780 set_bit(key->keyidx, sc->sc_keymap);
781 key->hw_key_idx = key->keyidx;
782 /* push IV and Michael MIC generation to stack */
783 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
784 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
788 ath_key_delete(sc, key);
789 clear_bit(key->keyidx, sc->sc_keymap);
790 sc->sc_keytype = ATH9K_CIPHER_CLR;
799 static void ath9k_ht_conf(struct ath_softc *sc,
800 struct ieee80211_bss_conf *bss_conf)
802 #define IEEE80211_HT_CAP_40MHZ_INTOLERANT BIT(14)
803 struct ath_ht_info *ht_info = &sc->sc_ht_info;
805 if (bss_conf->assoc_ht) {
806 ht_info->ext_chan_offset =
807 bss_conf->ht_bss_conf->bss_cap &
808 IEEE80211_HT_IE_CHA_SEC_OFFSET;
810 if (!(bss_conf->ht_conf->cap &
811 IEEE80211_HT_CAP_40MHZ_INTOLERANT) &&
812 (bss_conf->ht_bss_conf->bss_cap &
813 IEEE80211_HT_IE_CHA_WIDTH))
814 ht_info->tx_chan_width = ATH9K_HT_MACMODE_2040;
816 ht_info->tx_chan_width = ATH9K_HT_MACMODE_20;
818 ath9k_hw_set11nmac2040(sc->sc_ah, ht_info->tx_chan_width);
819 ht_info->maxampdu = 1 << (IEEE80211_HTCAP_MAXRXAMPDU_FACTOR +
820 bss_conf->ht_conf->ampdu_factor);
821 ht_info->mpdudensity =
822 parse_mpdudensity(bss_conf->ht_conf->ampdu_density);
826 #undef IEEE80211_HT_CAP_40MHZ_INTOLERANT
829 static void ath9k_bss_assoc_info(struct ath_softc *sc,
830 struct ieee80211_bss_conf *bss_conf)
832 struct ieee80211_hw *hw = sc->hw;
833 struct ieee80211_channel *curchan = hw->conf.channel;
836 DECLARE_MAC_BUF(mac);
838 if (bss_conf->assoc) {
839 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Bss Info ASSOC %d\n",
843 avp = sc->sc_vaps[0];
845 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
850 /* New association, store aid */
851 if (avp->av_opmode == ATH9K_M_STA) {
852 sc->sc_curaid = bss_conf->aid;
853 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
857 /* Configure the beacon */
858 ath_beacon_config(sc, 0);
859 sc->sc_flags |= SC_OP_BEACONS;
861 /* Reset rssi stats */
862 sc->sc_halstats.ns_avgbrssi = ATH_RSSI_DUMMY_MARKER;
863 sc->sc_halstats.ns_avgrssi = ATH_RSSI_DUMMY_MARKER;
864 sc->sc_halstats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER;
865 sc->sc_halstats.ns_avgtxrate = ATH_RATE_DUMMY_MARKER;
867 /* Update chainmask */
868 ath_update_chainmask(sc, bss_conf->assoc_ht);
870 DPRINTF(sc, ATH_DBG_CONFIG,
871 "%s: bssid %s aid 0x%x\n",
873 print_mac(mac, sc->sc_curbssid), sc->sc_curaid);
875 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
877 curchan->center_freq);
879 pos = ath_get_channel(sc, curchan);
881 DPRINTF(sc, ATH_DBG_FATAL,
882 "%s: Invalid channel\n", __func__);
886 if (hw->conf.ht_conf.ht_supported)
887 sc->sc_ah->ah_channels[pos].chanmode =
888 ath_get_extchanmode(sc, curchan);
890 sc->sc_ah->ah_channels[pos].chanmode =
891 (curchan->band == IEEE80211_BAND_2GHZ) ?
892 CHANNEL_G : CHANNEL_A;
894 /* set h/w channel */
895 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
896 DPRINTF(sc, ATH_DBG_FATAL,
897 "%s: Unable to set channel\n",
900 ath_rate_newstate(sc, avp);
901 /* Update ratectrl about the new state */
902 ath_rc_node_update(hw, avp->rc_node);
904 DPRINTF(sc, ATH_DBG_CONFIG,
905 "%s: Bss Info DISSOC\n", __func__);
910 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
911 struct ieee80211_vif *vif,
912 struct ieee80211_bss_conf *bss_conf,
915 struct ath_softc *sc = hw->priv;
917 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
918 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed PREAMBLE %d\n",
920 bss_conf->use_short_preamble);
921 if (bss_conf->use_short_preamble)
922 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
924 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
927 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
928 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed CTS PROT %d\n",
930 bss_conf->use_cts_prot);
931 if (bss_conf->use_cts_prot &&
932 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
933 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
935 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
938 if (changed & BSS_CHANGED_HT) {
939 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed HT %d\n",
942 ath9k_ht_conf(sc, bss_conf);
945 if (changed & BSS_CHANGED_ASSOC) {
946 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed ASSOC %d\n",
949 ath9k_bss_assoc_info(sc, bss_conf);
953 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
956 struct ath_softc *sc = hw->priv;
957 struct ath_hal *ah = sc->sc_ah;
959 tsf = ath9k_hw_gettsf64(ah);
964 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
966 struct ath_softc *sc = hw->priv;
967 struct ath_hal *ah = sc->sc_ah;
969 ath9k_hw_reset_tsf(ah);
972 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
973 enum ieee80211_ampdu_mlme_action action,
978 struct ath_softc *sc = hw->priv;
982 case IEEE80211_AMPDU_RX_START:
983 ret = ath_rx_aggr_start(sc, addr, tid, ssn);
985 DPRINTF(sc, ATH_DBG_FATAL,
986 "%s: Unable to start RX aggregation\n",
989 case IEEE80211_AMPDU_RX_STOP:
990 ret = ath_rx_aggr_stop(sc, addr, tid);
992 DPRINTF(sc, ATH_DBG_FATAL,
993 "%s: Unable to stop RX aggregation\n",
996 case IEEE80211_AMPDU_TX_START:
997 ret = ath_tx_aggr_start(sc, addr, tid, ssn);
999 DPRINTF(sc, ATH_DBG_FATAL,
1000 "%s: Unable to start TX aggregation\n",
1003 ieee80211_start_tx_ba_cb_irqsafe(hw, (u8 *)addr, tid);
1005 case IEEE80211_AMPDU_TX_STOP:
1006 ret = ath_tx_aggr_stop(sc, addr, tid);
1008 DPRINTF(sc, ATH_DBG_FATAL,
1009 "%s: Unable to stop TX aggregation\n",
1012 ieee80211_stop_tx_ba_cb_irqsafe(hw, (u8 *)addr, tid);
1015 DPRINTF(sc, ATH_DBG_FATAL,
1016 "%s: Unknown AMPDU action\n", __func__);
1022 static struct ieee80211_ops ath9k_ops = {
1024 .start = ath9k_start,
1026 .add_interface = ath9k_add_interface,
1027 .remove_interface = ath9k_remove_interface,
1028 .config = ath9k_config,
1029 .config_interface = ath9k_config_interface,
1030 .configure_filter = ath9k_configure_filter,
1032 .sta_notify = ath9k_sta_notify,
1033 .conf_tx = ath9k_conf_tx,
1034 .get_tx_stats = NULL,
1035 .bss_info_changed = ath9k_bss_info_changed,
1037 .set_key = ath9k_set_key,
1039 .get_tkip_seq = NULL,
1040 .set_rts_threshold = NULL,
1041 .set_frag_threshold = NULL,
1042 .set_retry_limit = NULL,
1043 .get_tsf = ath9k_get_tsf,
1044 .reset_tsf = ath9k_reset_tsf,
1045 .tx_last_beacon = NULL,
1046 .ampdu_action = ath9k_ampdu_action
1049 void ath_get_beaconconfig(struct ath_softc *sc,
1051 struct ath_beacon_config *conf)
1053 struct ieee80211_hw *hw = sc->hw;
1055 /* fill in beacon config data */
1057 conf->beacon_interval = hw->conf.beacon_int;
1058 conf->listen_interval = 100;
1059 conf->dtim_count = 1;
1060 conf->bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf->listen_interval;
1063 void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
1064 struct ath_xmit_status *tx_status, struct ath_node *an)
1066 struct ieee80211_hw *hw = sc->hw;
1067 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
1069 DPRINTF(sc, ATH_DBG_XMIT,
1070 "%s: TX complete: skb: %p\n", __func__, skb);
1072 if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK ||
1073 tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED) {
1074 /* free driver's private data area of tx_info */
1075 if (tx_info->driver_data[0] != NULL)
1076 kfree(tx_info->driver_data[0]);
1077 tx_info->driver_data[0] = NULL;
1080 if (tx_status->flags & ATH_TX_BAR) {
1081 tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
1082 tx_status->flags &= ~ATH_TX_BAR;
1085 if (tx_status->flags & (ATH_TX_ERROR | ATH_TX_XRETRY)) {
1086 if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK)) {
1087 /* Frame was not ACKed, but an ACK was expected */
1088 tx_info->status.excessive_retries = 1;
1091 /* Frame was ACKed */
1092 tx_info->flags |= IEEE80211_TX_STAT_ACK;
1095 tx_info->status.retry_count = tx_status->retries;
1097 ieee80211_tx_status(hw, skb);
1099 ath_node_put(sc, an, ATH9K_BH_STATUS_CHANGE);
1102 int ath__rx_indicate(struct ath_softc *sc,
1103 struct sk_buff *skb,
1104 struct ath_recv_status *status,
1107 struct ieee80211_hw *hw = sc->hw;
1108 struct ath_node *an = NULL;
1109 struct ieee80211_rx_status rx_status;
1110 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1111 int hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1113 enum ATH_RX_TYPE st;
1115 /* see if any padding is done by the hw and remove it */
1117 padsize = hdrlen % 4;
1118 memmove(skb->data + padsize, skb->data, hdrlen);
1119 skb_pull(skb, padsize);
1122 /* remove FCS before passing up to protocol stack */
1123 skb_trim(skb, (skb->len - FCS_LEN));
1125 /* Prepare rx status */
1126 ath9k_rx_prepare(sc, skb, status, &rx_status);
1128 if (!(keyix == ATH9K_RXKEYIX_INVALID) &&
1129 !(status->flags & ATH_RX_DECRYPT_ERROR)) {
1130 rx_status.flag |= RX_FLAG_DECRYPTED;
1131 } else if ((le16_to_cpu(hdr->frame_control) & IEEE80211_FCTL_PROTECTED)
1132 && !(status->flags & ATH_RX_DECRYPT_ERROR)
1133 && skb->len >= hdrlen + 4) {
1134 keyix = skb->data[hdrlen + 3] >> 6;
1136 if (test_bit(keyix, sc->sc_keymap))
1137 rx_status.flag |= RX_FLAG_DECRYPTED;
1140 spin_lock_bh(&sc->node_lock);
1141 an = ath_node_find(sc, hdr->addr2);
1142 spin_unlock_bh(&sc->node_lock);
1145 ath_rx_input(sc, an,
1146 hw->conf.ht_conf.ht_supported,
1149 if (!an || (st != ATH_RX_CONSUMED))
1150 __ieee80211_rx(hw, skb, &rx_status);
1155 int ath_rx_subframe(struct ath_node *an,
1156 struct sk_buff *skb,
1157 struct ath_recv_status *status)
1159 struct ath_softc *sc = an->an_sc;
1160 struct ieee80211_hw *hw = sc->hw;
1161 struct ieee80211_rx_status rx_status;
1163 /* Prepare rx status */
1164 ath9k_rx_prepare(sc, skb, status, &rx_status);
1165 if (!(status->flags & ATH_RX_DECRYPT_ERROR))
1166 rx_status.flag |= RX_FLAG_DECRYPTED;
1168 __ieee80211_rx(hw, skb, &rx_status);
1173 enum ath9k_ht_macmode ath_cwm_macmode(struct ath_softc *sc)
1175 return sc->sc_ht_info.tx_chan_width;
1178 static int ath_detach(struct ath_softc *sc)
1180 struct ieee80211_hw *hw = sc->hw;
1182 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach ATH hw\n", __func__);
1186 ieee80211_unregister_hw(hw);
1188 /* unregister Rate control */
1189 ath_rate_control_unregister();
1203 static int ath_attach(u16 devid,
1204 struct ath_softc *sc)
1206 struct ieee80211_hw *hw = sc->hw;
1209 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach ATH hw\n", __func__);
1211 error = ath_init(devid, sc);
1217 INIT_LIST_HEAD(&sc->node_list);
1218 spin_lock_init(&sc->node_lock);
1220 /* get mac address from hardware and set in mac80211 */
1222 SET_IEEE80211_PERM_ADDR(hw, sc->sc_myaddr);
1224 /* setup channels and rates */
1226 sc->sbands[IEEE80211_BAND_2GHZ].channels =
1227 sc->channels[IEEE80211_BAND_2GHZ];
1228 sc->sbands[IEEE80211_BAND_2GHZ].bitrates =
1229 sc->rates[IEEE80211_BAND_2GHZ];
1230 sc->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
1232 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
1233 /* Setup HT capabilities for 2.4Ghz*/
1234 setup_ht_cap(&sc->sbands[IEEE80211_BAND_2GHZ].ht_info);
1236 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
1237 &sc->sbands[IEEE80211_BAND_2GHZ];
1239 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes)) {
1240 sc->sbands[IEEE80211_BAND_5GHZ].channels =
1241 sc->channels[IEEE80211_BAND_5GHZ];
1242 sc->sbands[IEEE80211_BAND_5GHZ].bitrates =
1243 sc->rates[IEEE80211_BAND_5GHZ];
1244 sc->sbands[IEEE80211_BAND_5GHZ].band =
1245 IEEE80211_BAND_5GHZ;
1247 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
1248 /* Setup HT capabilities for 5Ghz*/
1249 setup_ht_cap(&sc->sbands[IEEE80211_BAND_5GHZ].ht_info);
1251 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
1252 &sc->sbands[IEEE80211_BAND_5GHZ];
1255 /* FIXME: Have to figure out proper hw init values later */
1258 hw->ampdu_queues = 1;
1260 /* Register rate control */
1261 hw->rate_control_algorithm = "ath9k_rate_control";
1262 error = ath_rate_control_register();
1264 DPRINTF(sc, ATH_DBG_FATAL,
1265 "%s: Unable to register rate control "
1266 "algorithm:%d\n", __func__, error);
1267 ath_rate_control_unregister();
1271 error = ieee80211_register_hw(hw);
1273 ath_rate_control_unregister();
1277 /* initialize tx/rx engine */
1279 error = ath_tx_init(sc, ATH_TXBUF);
1283 error = ath_rx_init(sc, ATH_RXBUF);
1294 static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1297 struct ath_softc *sc;
1298 struct ieee80211_hw *hw;
1299 const char *athname;
1304 if (pci_enable_device(pdev))
1307 /* XXX 32-bit addressing only */
1308 if (pci_set_dma_mask(pdev, 0xffffffff)) {
1309 printk(KERN_ERR "ath_pci: 32-bit DMA not available\n");
1315 * Cache line size is used to size and align various
1316 * structures used to communicate with the hardware.
1318 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
1321 * Linux 2.4.18 (at least) writes the cache line size
1322 * register as a 16-bit wide register which is wrong.
1323 * We must have this setup properly for rx buffer
1324 * DMA to work so force a reasonable value here if it
1327 csz = L1_CACHE_BYTES / sizeof(u32);
1328 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
1331 * The default setting of latency timer yields poor results,
1332 * set it to the value used by other systems. It may be worth
1333 * tweaking this setting more.
1335 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
1337 pci_set_master(pdev);
1340 * Disable the RETRY_TIMEOUT register (0x41) to keep
1341 * PCI Tx retries from interfering with C3 CPU state.
1343 pci_read_config_dword(pdev, 0x40, &val);
1344 if ((val & 0x0000ff00) != 0)
1345 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1347 ret = pci_request_region(pdev, 0, "ath9k");
1349 dev_err(&pdev->dev, "PCI memory region reserve error\n");
1354 mem = pci_iomap(pdev, 0, 0);
1356 printk(KERN_ERR "PCI memory map error\n") ;
1361 hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
1363 printk(KERN_ERR "ath_pci: no memory for ieee80211_hw\n");
1367 hw->flags = IEEE80211_HW_SIGNAL_DBM |
1368 IEEE80211_HW_NOISE_DBM;
1370 SET_IEEE80211_DEV(hw, &pdev->dev);
1371 pci_set_drvdata(pdev, hw);
1378 if (ath_attach(id->device, sc) != 0) {
1383 /* setup interrupt service routine */
1385 if (request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath", sc)) {
1386 printk(KERN_ERR "%s: request_irq failed\n",
1387 wiphy_name(hw->wiphy));
1392 athname = ath9k_hw_probe(id->vendor, id->device);
1394 printk(KERN_INFO "%s: %s: mem=0x%lx, irq=%d\n",
1395 wiphy_name(hw->wiphy),
1396 athname ? athname : "Atheros ???",
1397 (unsigned long)mem, pdev->irq);
1403 ieee80211_free_hw(hw);
1405 pci_iounmap(pdev, mem);
1407 pci_release_region(pdev, 0);
1409 pci_disable_device(pdev);
1413 static void ath_pci_remove(struct pci_dev *pdev)
1415 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1416 struct ath_softc *sc = hw->priv;
1419 free_irq(pdev->irq, sc);
1421 pci_iounmap(pdev, sc->mem);
1422 pci_release_region(pdev, 0);
1423 pci_disable_device(pdev);
1424 ieee80211_free_hw(hw);
1429 static int ath_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1431 pci_save_state(pdev);
1432 pci_disable_device(pdev);
1433 pci_set_power_state(pdev, 3);
1438 static int ath_pci_resume(struct pci_dev *pdev)
1443 err = pci_enable_device(pdev);
1446 pci_restore_state(pdev);
1448 * Suspend/Resume resets the PCI configuration space, so we have to
1449 * re-disable the RETRY_TIMEOUT register (0x41) to keep
1450 * PCI Tx retries from interfering with C3 CPU state
1452 pci_read_config_dword(pdev, 0x40, &val);
1453 if ((val & 0x0000ff00) != 0)
1454 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1459 #endif /* CONFIG_PM */
1461 MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
1463 static struct pci_driver ath_pci_driver = {
1465 .id_table = ath_pci_id_table,
1466 .probe = ath_pci_probe,
1467 .remove = ath_pci_remove,
1469 .suspend = ath_pci_suspend,
1470 .resume = ath_pci_resume,
1471 #endif /* CONFIG_PM */
1474 static int __init init_ath_pci(void)
1476 printk(KERN_INFO "%s: %s\n", dev_info, ATH_PCI_VERSION);
1478 if (pci_register_driver(&ath_pci_driver) < 0) {
1480 "ath_pci: No devices found, driver not installed.\n");
1481 pci_unregister_driver(&ath_pci_driver);
1487 module_init(init_ath_pci);
1489 static void __exit exit_ath_pci(void)
1491 pci_unregister_driver(&ath_pci_driver);
1492 printk(KERN_INFO "%s: driver unloaded\n", dev_info);
1494 module_exit(exit_ath_pci);