2 * Intel Wireless WiMAX Connection 2400m
3 * Generic (non-bus specific) TX handling
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35 * Intel Corporation <linux-wimax@intel.com>
36 * Yanir Lubetkin <yanirx.lubetkin@intel.com>
37 * - Initial implementation
39 * Intel Corporation <linux-wimax@intel.com>
40 * Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
41 * - Rewritten to use a single FIFO to lower the memory allocation
42 * pressure and optimize cache hits when copying to the queue, as
43 * well as splitting out bus-specific code.
46 * Implements data transmission to the device; this is done through a
47 * software FIFO, as data/control frames can be coalesced (while the
48 * device is reading the previous tx transaction, others accumulate).
50 * A FIFO is used because at the end it is resource-cheaper that trying
51 * to implement scatter/gather over USB. As well, most traffic is going
52 * to be download (vs upload).
54 * The format for sending/receiving data to/from the i2400m is
55 * described in detail in rx.c:PROTOCOL FORMAT. In here we implement
56 * the transmission of that. This is split between a bus-independent
57 * part that just prepares everything and a bus-specific part that
58 * does the actual transmission over the bus to the device (in the
59 * bus-specific driver).
62 * The general format of a device-host transaction is MSG-HDR, PLD1,
63 * PLD2...PLDN, PL1, PL2,...PLN, PADDING.
65 * Because we need the send payload descriptors and then payloads and
66 * because it is kind of expensive to do scatterlists in USB (one URB
67 * per node), it becomes cheaper to append all the data to a FIFO
68 * (copying to a FIFO potentially in cache is cheaper).
70 * Then the bus-specific code takes the parts of that FIFO that are
71 * written and passes them to the device.
73 * So the concepts to keep in mind there are:
75 * We use a FIFO to queue the data in a linear buffer. We first append
76 * a MSG-HDR, space for I2400M_TX_PLD_MAX payload descriptors and then
77 * go appending payloads until we run out of space or of payload
78 * descriptors. Then we append padding to make the whole transaction a
79 * multiple of i2400m->bus_tx_block_size (as defined by the bus layer).
81 * - A TX message: a combination of a message header, payload
82 * descriptors and payloads.
84 * Open: it is marked as active (i2400m->tx_msg is valid) and we
85 * can keep adding payloads to it.
87 * Closed: we are not appending more payloads to this TX message
88 * (exahusted space in the queue, too many payloads or
89 * whichever). We have appended padding so the whole message
90 * length is aligned to i2400m->bus_tx_block_size (as set by the
91 * bus/transport layer).
93 * - Most of the time we keep a TX message open to which we append
96 * - If we are going to append and there is no more space (we are at
97 * the end of the FIFO), we close the message, mark the rest of the
98 * FIFO space unusable (skip_tail), create a new message at the
99 * beginning of the FIFO (if there is space) and append the message
102 * This is because we need to give linear TX messages to the bus
103 * engine. So we don't write a message to the remaining FIFO space
104 * until the tail and continue at the head of it.
106 * - We overload one of the fields in the message header to use it as
107 * 'size' of the TX message, so we can iterate over them. It also
108 * contains a flag that indicates if we have to skip it or not.
109 * When we send the buffer, we update that to its real on-the-wire
112 * - The MSG-HDR PLD1...PLD2 stuff has to be a size multiple of 16.
114 * It follows that if MSG-HDR says we have N messages, the whole
115 * header + descriptors is 16 + 4*N; for those to be a multiple of
116 * 16, it follows that N can be 4, 8, 12, ... (32, 48, 64, 80...
119 * So if we have only 1 payload, we have to submit a header that in
120 * all truth has space for 4.
122 * The implication is that we reserve space for 12 (64 bytes); but
123 * if we fill up only (eg) 2, our header becomes 32 bytes only. So
124 * the TX engine has to shift those 32 bytes of msg header and 2
125 * payloads and padding so that right after it the payloads start
126 * and the TX engine has to know about that.
128 * It is cheaper to move the header up than the whole payloads down.
130 * We do this in i2400m_tx_close(). See 'i2400m_msg_hdr->offset'.
132 * - Each payload has to be size-padded to 16 bytes; before appending
135 * - The whole message has to be padded to i2400m->bus_tx_block_size;
136 * we do this at close time. Thus, when reserving space for the
137 * payload, we always make sure there is also free space for this
138 * padding that sooner or later will happen.
140 * When we append a message, we tell the bus specific code to kick in
141 * TXs. It will TX (in parallel) until the buffer is exhausted--hence
142 * the lockin we do. The TX code will only send a TX message at the
143 * time (which remember, might contain more than one payload). Of
144 * course, when the bus-specific driver attempts to TX a message that
145 * is still open, it gets closed first.
147 * Gee, this is messy; well a picture. In the example below we have a
148 * partially full FIFO, with a closed message ready to be delivered
149 * (with a moved message header to make sure it is size-aligned to
150 * 16), TAIL room that was unusable (and thus is marked with a message
151 * header that says 'skip this') and at the head of the buffer, an
152 * imcomplete message with a couple of payloads.
154 * N ___________________________________________________
158 * | msg_hdr to skip (size |= 0x80000) |
159 * |---------------------------------------------------|-------
162 * | TX message padding | |
165 * |- - - - - - - - - - - - - - - - - - - - - - - - - -| |
168 * | | N * tx_block_size
170 * |- - - - - - - - - - - - - - - - - - - - - - - - - -| |
175 * |- - - - - - - - - - - - - - - - - - - - - - - - - -|- -|- - - -
176 * | padding 3 /|\ | | /|\
177 * | padding 2 | | | |
178 * | pld 1 32 bytes (2 * 16) | | |
180 * | moved msg_hdr \|/ | \|/ |
181 * |- - - - - - - - - - - - - - - - - - - - - - - - - -|- - - |
185 * |- - - - - - - - - - - - - - - - - - - - - - - - - -| |
186 * | msg_hdr (size X) [this message is closed] | \|/
187 * |===================================================|========== <=== OUT
201 * |===================================================|========== <=== IN
209 * |- - - - - - - - - - - - - - - - - - - - - - - - - -|
214 * |- - - - - - - - - - - - - - - - - - - - - - - - - -|
217 * | pld 1 64 bytes (2 * 16) |
219 * | msg_hdr (size X) \|/ [message is open] |
220 * 0 ---------------------------------------------------
225 * i2400m_tx_setup() Called by i2400m_setup
226 * i2400m_tx_release() Called by i2400m_release()
228 * i2400m_tx() Called to send data or control frames
229 * i2400m_tx_fifo_push() Allocates append-space in the FIFO
230 * i2400m_tx_new() Opens a new message in the FIFO
231 * i2400m_tx_fits() Checks if a new payload fits in the message
232 * i2400m_tx_close() Closes an open message in the FIFO
233 * i2400m_tx_skip_tail() Marks unusable FIFO tail space
234 * i2400m->bus_tx_kick()
236 * Now i2400m->bus_tx_kick() is the the bus-specific driver backend
237 * implementation; that would do:
239 * i2400m->bus_tx_kick()
240 * i2400m_tx_msg_get() Gets first message ready to go
242 * i2400m_tx_msg_sent() Ack the message is sent; repeat from
243 * _tx_msg_get() until it returns NULL
246 #include <linux/netdevice.h>
247 #include <linux/slab.h>
251 #define D_SUBMODULE tx
252 #include "debug-levels.h"
258 * Doc says maximum transaction is 16KiB. If we had 16KiB en
259 * route and 16KiB being queued, it boils down to needing
261 * 32KiB is insufficient for 1400 MTU, hence increasing
262 * tx buffer size to 64KiB.
264 I2400M_TX_BUF_SIZE = 65536,
266 * Message header and payload descriptors have to be 16
267 * aligned (16 + 4 * N = 16 * M). If we take that average sent
268 * packets are MTU size (~1400-~1500) it follows that we could
269 * fit at most 10-11 payloads in one transaction. To meet the
270 * alignment requirement, that means we need to leave space
271 * for 12 (64 bytes). To simplify, we leave space for that. If
272 * at the end there are less, we pad up to the nearest
276 * According to Intel Wimax i3200, i5x50 and i6x50 specification
277 * documents, the maximum number of payloads per message can be
278 * up to 60. Increasing the number of payloads to 60 per message
279 * helps to accommodate smaller payloads in a single transaction.
281 I2400M_TX_PLD_MAX = 60,
282 I2400M_TX_PLD_SIZE = sizeof(struct i2400m_msg_hdr)
283 + I2400M_TX_PLD_MAX * sizeof(struct i2400m_pld),
284 I2400M_TX_SKIP = 0x80000000,
286 * According to Intel Wimax i3200, i5x50 and i6x50 specification
287 * documents, the maximum size of each message can be up to 16KiB.
289 I2400M_TX_MSG_SIZE = 16384,
292 #define TAIL_FULL ((void *)~(unsigned long)NULL)
295 * Calculate how much tail room is available
297 * Note the trick here. This path is ONLY caleed for Case A (see
298 * i2400m_tx_fifo_push() below), where we have:
313 * When calculating the tail_room, tx_in might get to be zero if
314 * i2400m->tx_in is right at the end of the buffer (really full
315 * buffer) if there is no head room. In this case, tail_room would be
316 * I2400M_TX_BUF_SIZE, although it is actually zero. Hence the final
317 * mod (%) operation. However, when doing this kind of optimization,
318 * i2400m->tx_in being zero would fail, so we treat is an a special
322 size_t __i2400m_tx_tail_room(struct i2400m *i2400m)
327 if (unlikely(i2400m->tx_in == 0))
328 return I2400M_TX_BUF_SIZE;
329 tx_in = i2400m->tx_in % I2400M_TX_BUF_SIZE;
330 tail_room = I2400M_TX_BUF_SIZE - tx_in;
331 tail_room %= I2400M_TX_BUF_SIZE;
337 * Allocate @size bytes in the TX fifo, return a pointer to it
339 * @i2400m: device descriptor
340 * @size: size of the buffer we need to allocate
341 * @padding: ensure that there is at least this many bytes of free
342 * contiguous space in the fifo. This is needed because later on
343 * we might need to add padding.
347 * Pointer to the allocated space. NULL if there is no
348 * space. TAIL_FULL if there is no space at the tail but there is at
349 * the head (Case B below).
351 * These are the two basic cases we need to keep an eye for -- it is
352 * much better explained in linux/kernel/kfifo.c, but this code
353 * basically does the same. No rocket science here.
356 * N ___________ ___________
357 * | tail room | | data |
359 * |<- IN ->| |<- OUT ->|
363 * |<- OUT ->| |<- IN ->|
365 * | head room | | data |
366 * 0 ----------- -----------
368 * We allocate only *contiguous* space.
370 * We can allocate only from 'room'. In Case B, it is simple; in case
371 * A, we only try from the tail room; if it is not enough, we just
372 * fail and return TAIL_FULL and let the caller figure out if we wants to
373 * skip the tail room and try to allocate from the head.
377 * Assumes i2400m->tx_lock is taken, and we use that as a barrier
379 * The indexes keep increasing and we reset them to zero when we
380 * pop data off the queue
383 void *i2400m_tx_fifo_push(struct i2400m *i2400m, size_t size, size_t padding)
385 struct device *dev = i2400m_dev(i2400m);
386 size_t room, tail_room, needed_size;
389 needed_size = size + padding;
390 room = I2400M_TX_BUF_SIZE - (i2400m->tx_in - i2400m->tx_out);
391 if (room < needed_size) { /* this takes care of Case B */
392 d_printf(2, dev, "fifo push %zu/%zu: no space\n",
396 /* Is there space at the tail? */
397 tail_room = __i2400m_tx_tail_room(i2400m);
398 if (tail_room < needed_size) {
400 * If the tail room space is not enough to push the message
401 * in the TX FIFO, then there are two possibilities:
402 * 1. There is enough head room space to accommodate
403 * this message in the TX FIFO.
404 * 2. There is not enough space in the head room and
405 * in tail room of the TX FIFO to accommodate the message.
406 * In the case (1), return TAIL_FULL so that the caller
407 * can figure out, if the caller wants to push the message
408 * into the head room space.
409 * In the case (2), return NULL, indicating that the TX FIFO
410 * cannot accommodate the message.
412 if (room - tail_room >= needed_size) {
413 d_printf(2, dev, "fifo push %zu/%zu: tail full\n",
415 return TAIL_FULL; /* There might be head space */
417 d_printf(2, dev, "fifo push %zu/%zu: no head space\n",
419 return NULL; /* There is no space */
422 ptr = i2400m->tx_buf + i2400m->tx_in % I2400M_TX_BUF_SIZE;
423 d_printf(2, dev, "fifo push %zu/%zu: at @%zu\n", size, padding,
424 i2400m->tx_in % I2400M_TX_BUF_SIZE);
425 i2400m->tx_in += size;
431 * Mark the tail of the FIFO buffer as 'to-skip'
433 * We should never hit the BUG_ON() because all the sizes we push to
434 * the FIFO are padded to be a multiple of 16 -- the size of *msg
435 * (I2400M_PL_PAD for the payloads, I2400M_TX_PLD_SIZE for the
438 * Tail room can get to be zero if a message was opened when there was
439 * space only for a header. _tx_close() will mark it as to-skip (as it
440 * will have no payloads) and there will be no more space to flush, so
441 * nothing has to be done here. This is probably cheaper than ensuring
442 * in _tx_new() that there is some space for payloads...as we could
443 * always possibly hit the same problem if the payload wouldn't fit.
447 * Assumes i2400m->tx_lock is taken, and we use that as a barrier
449 * This path is only taken for Case A FIFO situations [see
450 * i2400m_tx_fifo_push()]
453 void i2400m_tx_skip_tail(struct i2400m *i2400m)
455 struct device *dev = i2400m_dev(i2400m);
456 size_t tx_in = i2400m->tx_in % I2400M_TX_BUF_SIZE;
457 size_t tail_room = __i2400m_tx_tail_room(i2400m);
458 struct i2400m_msg_hdr *msg = i2400m->tx_buf + tx_in;
459 if (unlikely(tail_room == 0))
461 BUG_ON(tail_room < sizeof(*msg));
462 msg->size = tail_room | I2400M_TX_SKIP;
463 d_printf(2, dev, "skip tail: skipping %zu bytes @%zu\n",
465 i2400m->tx_in += tail_room;
470 * Check if a skb will fit in the TX queue's current active TX
471 * message (if there are still descriptors left unused).
474 * 0 if the message won't fit, 1 if it will.
478 * Assumes a TX message is active (i2400m->tx_msg).
480 * Assumes i2400m->tx_lock is taken, and we use that as a barrier
483 unsigned i2400m_tx_fits(struct i2400m *i2400m)
485 struct i2400m_msg_hdr *msg_hdr = i2400m->tx_msg;
486 return le16_to_cpu(msg_hdr->num_pls) < I2400M_TX_PLD_MAX;
492 * Start a new TX message header in the queue.
494 * Reserve memory from the base FIFO engine and then just initialize
495 * the message header.
497 * We allocate the biggest TX message header we might need (one that'd
498 * fit I2400M_TX_PLD_MAX payloads) -- when it is closed it will be
499 * 'ironed it out' and the unneeded parts removed.
503 * Assumes that the previous message is CLOSED (eg: either
504 * there was none or 'i2400m_tx_close()' was called on it).
506 * Assumes i2400m->tx_lock is taken, and we use that as a barrier
509 void i2400m_tx_new(struct i2400m *i2400m)
511 struct device *dev = i2400m_dev(i2400m);
512 struct i2400m_msg_hdr *tx_msg;
513 BUG_ON(i2400m->tx_msg != NULL);
515 tx_msg = i2400m_tx_fifo_push(i2400m, I2400M_TX_PLD_SIZE, 0);
518 else if (tx_msg == TAIL_FULL) {
519 i2400m_tx_skip_tail(i2400m);
520 d_printf(2, dev, "new TX message: tail full, trying head\n");
523 memset(tx_msg, 0, I2400M_TX_PLD_SIZE);
524 tx_msg->size = I2400M_TX_PLD_SIZE;
526 i2400m->tx_msg = tx_msg;
527 d_printf(2, dev, "new TX message: %p @%zu\n",
528 tx_msg, (void *) tx_msg - i2400m->tx_buf);
533 * Finalize the current TX message header
535 * Sets the message header to be at the proper location depending on
536 * how many descriptors we have (check documentation at the file's
537 * header for more info on that).
539 * Appends padding bytes to make sure the whole TX message (counting
540 * from the 'relocated' message header) is aligned to
541 * tx_block_size. We assume the _append() code has left enough space
542 * in the FIFO for that. If there are no payloads, just pass, as it
543 * won't be transferred.
545 * The amount of padding bytes depends on how many payloads are in the
546 * TX message, as the "msg header and payload descriptors" will be
547 * shifted up in the buffer.
550 void i2400m_tx_close(struct i2400m *i2400m)
552 struct device *dev = i2400m_dev(i2400m);
553 struct i2400m_msg_hdr *tx_msg = i2400m->tx_msg;
554 struct i2400m_msg_hdr *tx_msg_moved;
555 size_t aligned_size, padding, hdr_size;
559 if (tx_msg->size & I2400M_TX_SKIP) /* a skipper? nothing to do */
561 num_pls = le16_to_cpu(tx_msg->num_pls);
562 /* We can get this situation when a new message was started
563 * and there was no space to add payloads before hitting the
564 tail (and taking padding into consideration). */
566 tx_msg->size |= I2400M_TX_SKIP;
569 /* Relocate the message header
571 * Find the current header size, align it to 16 and if we need
572 * to move it so the tail is next to the payloads, move it and
575 * If it moved, this header is good only for transmission; the
576 * original one (it is kept if we moved) is still used to
577 * figure out where the next TX message starts (and where the
578 * offset to the moved header is).
580 hdr_size = sizeof(*tx_msg)
581 + le16_to_cpu(tx_msg->num_pls) * sizeof(tx_msg->pld[0]);
582 hdr_size = ALIGN(hdr_size, I2400M_PL_ALIGN);
583 tx_msg->offset = I2400M_TX_PLD_SIZE - hdr_size;
584 tx_msg_moved = (void *) tx_msg + tx_msg->offset;
585 memmove(tx_msg_moved, tx_msg, hdr_size);
586 tx_msg_moved->size -= tx_msg->offset;
588 * Now figure out how much we have to add to the (moved!)
589 * message so the size is a multiple of i2400m->bus_tx_block_size.
591 aligned_size = ALIGN(tx_msg_moved->size, i2400m->bus_tx_block_size);
592 padding = aligned_size - tx_msg_moved->size;
594 pad_buf = i2400m_tx_fifo_push(i2400m, padding, 0);
595 if (unlikely(WARN_ON(pad_buf == NULL
596 || pad_buf == TAIL_FULL))) {
597 /* This should not happen -- append should verify
598 * there is always space left at least to append
601 "SW BUG! Possible data leakage from memory the "
602 "device should not read for padding - "
603 "size %lu aligned_size %zu tx_buf %p in "
605 (unsigned long) tx_msg_moved->size,
606 aligned_size, i2400m->tx_buf, i2400m->tx_in,
609 memset(pad_buf, 0xad, padding);
611 tx_msg_moved->padding = cpu_to_le16(padding);
612 tx_msg_moved->size += padding;
613 if (tx_msg != tx_msg_moved)
614 tx_msg->size += padding;
616 i2400m->tx_msg = NULL;
621 * i2400m_tx - send the data in a buffer to the device
623 * @buf: pointer to the buffer to transmit
625 * @buf_len: buffer size
627 * @pl_type: type of the payload we are sending.
630 * 0 if ok, < 0 errno code on error (-ENOSPC, if there is no more
631 * room for the message in the queue).
633 * Appends the buffer to the TX FIFO and notifies the bus-specific
634 * part of the driver that there is new data ready to transmit.
635 * Once this function returns, the buffer has been copied, so it can
638 * The steps followed to append are explained in detail in the file
641 * Whenever we write to a message, we increase msg->size, so it
642 * reflects exactly how big the message is. This is needed so that if
643 * we concatenate two messages before they can be sent, the code that
644 * sends the messages can find the boundaries (and it will replace the
645 * size with the real barker before sending).
649 * Cold and warm reset payloads need to be sent as a single
650 * payload, so we handle that.
652 int i2400m_tx(struct i2400m *i2400m, const void *buf, size_t buf_len,
653 enum i2400m_pt pl_type)
655 int result = -ENOSPC;
656 struct device *dev = i2400m_dev(i2400m);
660 unsigned is_singleton = pl_type == I2400M_PT_RESET_WARM
661 || pl_type == I2400M_PT_RESET_COLD;
663 d_fnstart(3, dev, "(i2400m %p skb %p [%zu bytes] pt %u)\n",
664 i2400m, buf, buf_len, pl_type);
665 padded_len = ALIGN(buf_len, I2400M_PL_ALIGN);
666 d_printf(5, dev, "padded_len %zd buf_len %zd\n", padded_len, buf_len);
667 /* If there is no current TX message, create one; if the
668 * current one is out of payload slots or we have a singleton,
669 * close it and start a new one */
670 spin_lock_irqsave(&i2400m->tx_lock, flags);
671 /* If tx_buf is NULL, device is shutdown */
672 if (i2400m->tx_buf == NULL) {
677 if (unlikely(i2400m->tx_msg == NULL))
678 i2400m_tx_new(i2400m);
679 else if (unlikely(!i2400m_tx_fits(i2400m)
680 || (is_singleton && i2400m->tx_msg->num_pls != 0))) {
681 d_printf(2, dev, "closing TX message (fits %u singleton "
682 "%u num_pls %u)\n", i2400m_tx_fits(i2400m),
683 is_singleton, i2400m->tx_msg->num_pls);
684 i2400m_tx_close(i2400m);
685 i2400m_tx_new(i2400m);
687 if (i2400m->tx_msg == NULL)
690 * Check if this skb will fit in the TX queue's current active
691 * TX message. The total message size must not exceed the maximum
692 * size of each message I2400M_TX_MSG_SIZE. If it exceeds,
693 * close the current message and push this skb into the new message.
695 if (i2400m->tx_msg->size + padded_len > I2400M_TX_MSG_SIZE) {
696 d_printf(2, dev, "TX: message too big, going new\n");
697 i2400m_tx_close(i2400m);
698 i2400m_tx_new(i2400m);
700 if (i2400m->tx_msg == NULL)
702 /* So we have a current message header; now append space for
703 * the message -- if there is not enough, try the head */
704 ptr = i2400m_tx_fifo_push(i2400m, padded_len,
705 i2400m->bus_tx_block_size);
706 if (ptr == TAIL_FULL) { /* Tail is full, try head */
707 d_printf(2, dev, "pl append: tail full\n");
708 i2400m_tx_close(i2400m);
709 i2400m_tx_skip_tail(i2400m);
711 } else if (ptr == NULL) { /* All full */
713 d_printf(2, dev, "pl append: all full\n");
714 } else { /* Got space, copy it, set padding */
715 struct i2400m_msg_hdr *tx_msg = i2400m->tx_msg;
716 unsigned num_pls = le16_to_cpu(tx_msg->num_pls);
717 memcpy(ptr, buf, buf_len);
718 memset(ptr + buf_len, 0xad, padded_len - buf_len);
719 i2400m_pld_set(&tx_msg->pld[num_pls], buf_len, pl_type);
720 d_printf(3, dev, "pld 0x%08x (type 0x%1x len 0x%04zx\n",
721 le32_to_cpu(tx_msg->pld[num_pls].val),
723 tx_msg->num_pls = le16_to_cpu(num_pls+1);
724 tx_msg->size += padded_len;
725 d_printf(2, dev, "TX: appended %zu b (up to %u b) pl #%u\n",
726 padded_len, tx_msg->size, num_pls+1);
728 "TX: appended hdr @%zu %zu b pl #%u @%zu %zu/%zu b\n",
729 (void *)tx_msg - i2400m->tx_buf, (size_t)tx_msg->size,
730 num_pls+1, ptr - i2400m->tx_buf, buf_len, padded_len);
733 i2400m_tx_close(i2400m);
736 spin_unlock_irqrestore(&i2400m->tx_lock, flags);
737 /* kick in most cases, except when the TX subsys is down, as
738 * it might free space */
739 if (likely(result != -ESHUTDOWN))
740 i2400m->bus_tx_kick(i2400m);
741 d_fnend(3, dev, "(i2400m %p skb %p [%zu bytes] pt %u) = %d\n",
742 i2400m, buf, buf_len, pl_type, result);
745 EXPORT_SYMBOL_GPL(i2400m_tx);
749 * i2400m_tx_msg_get - Get the first TX message in the FIFO to start sending it
751 * @i2400m: device descriptors
752 * @bus_size: where to place the size of the TX message
754 * Called by the bus-specific driver to get the first TX message at
755 * the FIF that is ready for transmission.
757 * It sets the state in @i2400m to indicate the bus-specific driver is
758 * transfering that message (i2400m->tx_msg_size).
760 * Once the transfer is completed, call i2400m_tx_msg_sent().
764 * The size of the TX message to be transmitted might be smaller than
765 * that of the TX message in the FIFO (in case the header was
766 * shorter). Hence, we copy it in @bus_size, for the bus layer to
767 * use. We keep the message's size in i2400m->tx_msg_size so that
768 * when the bus later is done transferring we know how much to
771 * We collect statistics here as all the data is available and we
772 * assume it is going to work [see i2400m_tx_msg_sent()].
774 struct i2400m_msg_hdr *i2400m_tx_msg_get(struct i2400m *i2400m,
777 struct device *dev = i2400m_dev(i2400m);
778 struct i2400m_msg_hdr *tx_msg, *tx_msg_moved;
779 unsigned long flags, pls;
781 d_fnstart(3, dev, "(i2400m %p bus_size %p)\n", i2400m, bus_size);
782 spin_lock_irqsave(&i2400m->tx_lock, flags);
784 if (i2400m->tx_buf == NULL)
788 if (i2400m->tx_in == i2400m->tx_out) { /* Empty FIFO? */
791 d_printf(2, dev, "TX: FIFO empty: resetting\n");
794 tx_msg = i2400m->tx_buf + i2400m->tx_out % I2400M_TX_BUF_SIZE;
795 if (tx_msg->size & I2400M_TX_SKIP) { /* skip? */
796 d_printf(2, dev, "TX: skip: msg @%zu (%zu b)\n",
797 i2400m->tx_out % I2400M_TX_BUF_SIZE,
798 (size_t) tx_msg->size & ~I2400M_TX_SKIP);
799 i2400m->tx_out += tx_msg->size & ~I2400M_TX_SKIP;
803 if (tx_msg->num_pls == 0) { /* No payloads? */
804 if (tx_msg == i2400m->tx_msg) { /* open, we are done */
806 "TX: FIFO empty: open msg w/o payloads @%zu\n",
807 (void *) tx_msg - i2400m->tx_buf);
810 } else { /* closed, skip it */
812 "TX: skip msg w/o payloads @%zu (%zu b)\n",
813 (void *) tx_msg - i2400m->tx_buf,
814 (size_t) tx_msg->size);
815 i2400m->tx_out += tx_msg->size & ~I2400M_TX_SKIP;
819 if (tx_msg == i2400m->tx_msg) /* open msg? */
820 i2400m_tx_close(i2400m);
822 /* Now we have a valid TX message (with payloads) to TX */
823 tx_msg_moved = (void *) tx_msg + tx_msg->offset;
824 i2400m->tx_msg_size = tx_msg->size;
825 *bus_size = tx_msg_moved->size;
826 d_printf(2, dev, "TX: pid %d msg hdr at @%zu offset +@%zu "
827 "size %zu bus_size %zu\n",
828 current->pid, (void *) tx_msg - i2400m->tx_buf,
829 (size_t) tx_msg->offset, (size_t) tx_msg->size,
830 (size_t) tx_msg_moved->size);
831 tx_msg_moved->barker = le32_to_cpu(I2400M_H2D_PREVIEW_BARKER);
832 tx_msg_moved->sequence = le32_to_cpu(i2400m->tx_sequence++);
834 pls = le32_to_cpu(tx_msg_moved->num_pls);
835 i2400m->tx_pl_num += pls; /* Update stats */
836 if (pls > i2400m->tx_pl_max)
837 i2400m->tx_pl_max = pls;
838 if (pls < i2400m->tx_pl_min)
839 i2400m->tx_pl_min = pls;
841 i2400m->tx_size_acc += *bus_size;
842 if (*bus_size < i2400m->tx_size_min)
843 i2400m->tx_size_min = *bus_size;
844 if (*bus_size > i2400m->tx_size_max)
845 i2400m->tx_size_max = *bus_size;
847 spin_unlock_irqrestore(&i2400m->tx_lock, flags);
848 d_fnstart(3, dev, "(i2400m %p bus_size %p [%zu]) = %p\n",
849 i2400m, bus_size, *bus_size, tx_msg_moved);
852 EXPORT_SYMBOL_GPL(i2400m_tx_msg_get);
856 * i2400m_tx_msg_sent - indicate the transmission of a TX message
858 * @i2400m: device descriptor
860 * Called by the bus-specific driver when a message has been sent;
861 * this pops it from the FIFO; and as there is space, start the queue
862 * in case it was stopped.
864 * Should be called even if the message send failed and we are
865 * dropping this TX message.
867 void i2400m_tx_msg_sent(struct i2400m *i2400m)
871 struct device *dev = i2400m_dev(i2400m);
873 d_fnstart(3, dev, "(i2400m %p)\n", i2400m);
874 spin_lock_irqsave(&i2400m->tx_lock, flags);
875 if (i2400m->tx_buf == NULL)
877 i2400m->tx_out += i2400m->tx_msg_size;
878 d_printf(2, dev, "TX: sent %zu b\n", (size_t) i2400m->tx_msg_size);
879 i2400m->tx_msg_size = 0;
880 BUG_ON(i2400m->tx_out > i2400m->tx_in);
881 /* level them FIFO markers off */
882 n = i2400m->tx_out / I2400M_TX_BUF_SIZE;
883 i2400m->tx_out %= I2400M_TX_BUF_SIZE;
884 i2400m->tx_in -= n * I2400M_TX_BUF_SIZE;
886 spin_unlock_irqrestore(&i2400m->tx_lock, flags);
887 d_fnend(3, dev, "(i2400m %p) = void\n", i2400m);
889 EXPORT_SYMBOL_GPL(i2400m_tx_msg_sent);
893 * i2400m_tx_setup - Initialize the TX queue and infrastructure
895 * Make sure we reset the TX sequence to zero, as when this function
896 * is called, the firmware has been just restarted. Same rational
897 * for tx_in, tx_out, tx_msg_size and tx_msg. We reset them since
898 * the memory for TX queue is reallocated.
900 int i2400m_tx_setup(struct i2400m *i2400m)
906 /* Do this here only once -- can't do on
907 * i2400m_hard_start_xmit() as we'll cause race conditions if
908 * the WS was scheduled on another CPU */
909 INIT_WORK(&i2400m->wake_tx_ws, i2400m_wake_tx_work);
911 tx_buf = kmalloc(I2400M_TX_BUF_SIZE, GFP_ATOMIC);
912 if (tx_buf == NULL) {
918 * Fail the build if we can't fit at least two maximum size messages
919 * on the TX FIFO [one being delivered while one is constructed].
921 BUILD_BUG_ON(2 * I2400M_TX_MSG_SIZE > I2400M_TX_BUF_SIZE);
922 spin_lock_irqsave(&i2400m->tx_lock, flags);
923 i2400m->tx_sequence = 0;
926 i2400m->tx_msg_size = 0;
927 i2400m->tx_msg = NULL;
928 i2400m->tx_buf = tx_buf;
929 spin_unlock_irqrestore(&i2400m->tx_lock, flags);
930 /* Huh? the bus layer has to define this... */
931 BUG_ON(i2400m->bus_tx_block_size == 0);
939 * i2400m_tx_release - Tear down the TX queue and infrastructure
941 void i2400m_tx_release(struct i2400m *i2400m)
944 spin_lock_irqsave(&i2400m->tx_lock, flags);
945 kfree(i2400m->tx_buf);
946 i2400m->tx_buf = NULL;
947 spin_unlock_irqrestore(&i2400m->tx_lock, flags);