SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/net/usb/smsc95xx.c

   1  /***************************************************************************
   2  *
   3  * Copyright (C) 2007-2008 SMSC
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License
   7  * as published by the Free Software Foundation; either version 2
   8  * of the License, or (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  18  *
  19  *****************************************************************************/
  20
  21 #include <linux/module.h>
  22 #include <linux/kmod.h>
  23 #include <linux/init.h>
  24 #include <linux/netdevice.h>
  25 #include <linux/etherdevice.h>
  26 #include <linux/ethtool.h>
  27 #include <linux/mii.h>
  28 #include <linux/usb.h>
  29 #include <linux/crc32.h>
  30 #include <linux/usb/usbnet.h>
  31 #include "smsc95xx.h"
  32
  33 #define SMSC_CHIPNAME                   "smsc95xx"
  34 #define SMSC_DRIVER_VERSION             "1.0.4"
  35 #define HS_USB_PKT_SIZE                 (512)
  36 #define FS_USB_PKT_SIZE                 (64)
  37 #define DEFAULT_HS_BURST_CAP_SIZE       (16 * 1024 + 5 * HS_USB_PKT_SIZE)
  38 #define DEFAULT_FS_BURST_CAP_SIZE       (6 * 1024 + 33 * FS_USB_PKT_SIZE)
  39 #define DEFAULT_BULK_IN_DELAY           (0x00002000)
  40 #define MAX_SINGLE_PACKET_SIZE          (2048)
  41 #define LAN95XX_EEPROM_MAGIC            (0x9500)
  42 #define EEPROM_MAC_OFFSET               (0x01)
  43 #define DEFAULT_TX_CSUM_ENABLE          (true)
  44 #define DEFAULT_RX_CSUM_ENABLE          (true)
  45 #define SMSC95XX_INTERNAL_PHY_ID        (1)
  46 #define SMSC95XX_TX_OVERHEAD            (8)
  47 #define SMSC95XX_TX_OVERHEAD_CSUM       (12)
  48
  49 struct smsc95xx_priv {
  50         u32 mac_cr;
  51         spinlock_t mac_cr_lock;
  52         bool use_tx_csum;
  53         bool use_rx_csum;
  54 };
  55
  56 struct usb_context {
  57         struct usb_ctrlrequest req;
  58         struct completion notify;
  59         struct usbnet *dev;
  60 };
  61
  62 int turbo_mode = true;
  63 module_param(turbo_mode, bool, 0644);
  64 MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
  65
  66 static int smsc95xx_read_reg(struct usbnet *dev, u32 index, u32 *data)
  67 {
  68         u32 *buf = kmalloc(4, GFP_KERNEL);
  69         int ret;
  70
  71         BUG_ON(!dev);
  72
  73         if (!buf)
  74                 return -ENOMEM;
  75
  76         ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0),
  77                 USB_VENDOR_REQUEST_READ_REGISTER,
  78                 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  79                 00, index, buf, 4, USB_CTRL_GET_TIMEOUT);
  80
  81         if (unlikely(ret < 0))
  82                 devwarn(dev, "Failed to read register index 0x%08x", index);
  83
  84         le32_to_cpus(buf);
  85         *data = *buf;
  86         kfree(buf);
  87
  88         return ret;
  89 }
  90
  91 static int smsc95xx_write_reg(struct usbnet *dev, u32 index, u32 data)
  92 {
  93         u32 *buf = kmalloc(4, GFP_KERNEL);
  94         int ret;
  95
  96         BUG_ON(!dev);
  97
  98         if (!buf)
  99                 return -ENOMEM;
 100
 101         *buf = data;
 102         cpu_to_le32s(buf);
 103
 104         ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
 105                 USB_VENDOR_REQUEST_WRITE_REGISTER,
 106                 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
 107                 00, index, buf, 4, USB_CTRL_SET_TIMEOUT);
 108
 109         if (unlikely(ret < 0))
 110                 devwarn(dev, "Failed to write register index 0x%08x", index);
 111
 112         kfree(buf);
 113
 114         return ret;
 115 }
 116
 117 /* Loop until the read is completed with timeout
 118  * called with phy_mutex held */
 119 static int smsc95xx_phy_wait_not_busy(struct usbnet *dev)
 120 {
 121         unsigned long start_time = jiffies;
 122         u32 val;
 123
 124         do {
 125                 smsc95xx_read_reg(dev, MII_ADDR, &val);
 126                 if (!(val & MII_BUSY_))
 127                         return 0;
 128         } while (!time_after(jiffies, start_time + HZ));
 129
 130         return -EIO;
 131 }
 132
 133 static int smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx)
 134 {
 135         struct usbnet *dev = netdev_priv(netdev);
 136         u32 val, addr;
 137
 138         mutex_lock(&dev->phy_mutex);
 139
 140         /* confirm MII not busy */
 141         if (smsc95xx_phy_wait_not_busy(dev)) {
 142                 devwarn(dev, "MII is busy in smsc95xx_mdio_read");
 143                 mutex_unlock(&dev->phy_mutex);
 144                 return -EIO;
 145         }
 146
 147         /* set the address, index & direction (read from PHY) */
 148         phy_id &= dev->mii.phy_id_mask;
 149         idx &= dev->mii.reg_num_mask;
 150         addr = (phy_id << 11) | (idx << 6) | MII_READ_;
 151         smsc95xx_write_reg(dev, MII_ADDR, addr);
 152
 153         if (smsc95xx_phy_wait_not_busy(dev)) {
 154                 devwarn(dev, "Timed out reading MII reg %02X", idx);
 155                 mutex_unlock(&dev->phy_mutex);
 156                 return -EIO;
 157         }
 158
 159         smsc95xx_read_reg(dev, MII_DATA, &val);
 160
 161         mutex_unlock(&dev->phy_mutex);
 162
 163         return (u16)(val & 0xFFFF);
 164 }
 165
 166 static void smsc95xx_mdio_write(struct net_device *netdev, int phy_id, int idx,
 167                                 int regval)
 168 {
 169         struct usbnet *dev = netdev_priv(netdev);
 170         u32 val, addr;
 171
 172         mutex_lock(&dev->phy_mutex);
 173
 174         /* confirm MII not busy */
 175         if (smsc95xx_phy_wait_not_busy(dev)) {
 176                 devwarn(dev, "MII is busy in smsc95xx_mdio_write");
 177                 mutex_unlock(&dev->phy_mutex);
 178                 return;
 179         }
 180
 181         val = regval;
 182         smsc95xx_write_reg(dev, MII_DATA, val);
 183
 184         /* set the address, index & direction (write to PHY) */
 185         phy_id &= dev->mii.phy_id_mask;
 186         idx &= dev->mii.reg_num_mask;
 187         addr = (phy_id << 11) | (idx << 6) | MII_WRITE_;
 188         smsc95xx_write_reg(dev, MII_ADDR, addr);
 189
 190         if (smsc95xx_phy_wait_not_busy(dev))
 191                 devwarn(dev, "Timed out writing MII reg %02X", idx);
 192
 193         mutex_unlock(&dev->phy_mutex);
 194 }
 195
 196 static int smsc95xx_wait_eeprom(struct usbnet *dev)
 197 {
 198         unsigned long start_time = jiffies;
 199         u32 val;
 200
 201         do {
 202                 smsc95xx_read_reg(dev, E2P_CMD, &val);
 203                 if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_))
 204                         break;
 205                 udelay(40);
 206         } while (!time_after(jiffies, start_time + HZ));
 207
 208         if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) {
 209                 devwarn(dev, "EEPROM read operation timeout");
 210                 return -EIO;
 211         }
 212
 213         return 0;
 214 }
 215
 216 static int smsc95xx_eeprom_confirm_not_busy(struct usbnet *dev)
 217 {
 218         unsigned long start_time = jiffies;
 219         u32 val;
 220
 221         do {
 222                 smsc95xx_read_reg(dev, E2P_CMD, &val);
 223
 224                 if (!(val & E2P_CMD_LOADED_)) {
 225                         devwarn(dev, "No EEPROM present");
 226                         return -EIO;
 227                 }
 228
 229                 if (!(val & E2P_CMD_BUSY_))
 230                         return 0;
 231
 232                 udelay(40);
 233         } while (!time_after(jiffies, start_time + HZ));
 234
 235         devwarn(dev, "EEPROM is busy");
 236         return -EIO;
 237 }
 238
 239 static int smsc95xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length,
 240                                 u8 *data)
 241 {
 242         u32 val;
 243         int i, ret;
 244
 245         BUG_ON(!dev);
 246         BUG_ON(!data);
 247
 248         ret = smsc95xx_eeprom_confirm_not_busy(dev);
 249         if (ret)
 250                 return ret;
 251
 252         for (i = 0; i < length; i++) {
 253                 val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_);
 254                 smsc95xx_write_reg(dev, E2P_CMD, val);
 255
 256                 ret = smsc95xx_wait_eeprom(dev);
 257                 if (ret < 0)
 258                         return ret;
 259
 260                 smsc95xx_read_reg(dev, E2P_DATA, &val);
 261
 262                 data[i] = val & 0xFF;
 263                 offset++;
 264         }
 265
 266         return 0;
 267 }
 268
 269 static int smsc95xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length,
 270                                  u8 *data)
 271 {
 272         u32 val;
 273         int i, ret;
 274
 275         BUG_ON(!dev);
 276         BUG_ON(!data);
 277
 278         ret = smsc95xx_eeprom_confirm_not_busy(dev);
 279         if (ret)
 280                 return ret;
 281
 282         /* Issue write/erase enable command */
 283         val = E2P_CMD_BUSY_ | E2P_CMD_EWEN_;
 284         smsc95xx_write_reg(dev, E2P_CMD, val);
 285
 286         ret = smsc95xx_wait_eeprom(dev);
 287         if (ret < 0)
 288                 return ret;
 289
 290         for (i = 0; i < length; i++) {
 291
 292                 /* Fill data register */
 293                 val = data[i];
 294                 smsc95xx_write_reg(dev, E2P_DATA, val);
 295
 296                 /* Send "write" command */
 297                 val = E2P_CMD_BUSY_ | E2P_CMD_WRITE_ | (offset & E2P_CMD_ADDR_);
 298                 smsc95xx_write_reg(dev, E2P_CMD, val);
 299
 300                 ret = smsc95xx_wait_eeprom(dev);
 301                 if (ret < 0)
 302                         return ret;
 303
 304                 offset++;
 305         }
 306
 307         return 0;
 308 }
 309
 310 static void smsc95xx_async_cmd_callback(struct urb *urb, struct pt_regs *regs)
 311 {
 312         struct usb_context *usb_context = urb->context;
 313         struct usbnet *dev = usb_context->dev;
 314         int status = urb->status;
 315
 316         if (status < 0)
 317                 devwarn(dev, "async callback failed with %d", status);
 318
 319         complete(&usb_context->notify);
 320
 321         kfree(usb_context);
 322         usb_free_urb(urb);
 323 }
 324
 325 static int smsc95xx_write_reg_async(struct usbnet *dev, u16 index, u32 *data)
 326 {
 327         struct usb_context *usb_context;
 328         int status;
 329         struct urb *urb;
 330         const u16 size = 4;
 331
 332         urb = usb_alloc_urb(0, GFP_ATOMIC);
 333         if (!urb) {
 334                 devwarn(dev, "Error allocating URB");
 335                 return -ENOMEM;
 336         }
 337
 338         usb_context = kmalloc(sizeof(struct usb_context), GFP_ATOMIC);
 339         if (usb_context == NULL) {
 340                 devwarn(dev, "Error allocating control msg");
 341                 usb_free_urb(urb);
 342                 return -ENOMEM;
 343         }
 344
 345         usb_context->req.bRequestType =
 346                 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE;
 347         usb_context->req.bRequest = USB_VENDOR_REQUEST_WRITE_REGISTER;
 348         usb_context->req.wValue = 00;
 349         usb_context->req.wIndex = cpu_to_le16(index);
 350         usb_context->req.wLength = cpu_to_le16(size);
 351         init_completion(&usb_context->notify);
 352
 353         usb_fill_control_urb(urb, dev->udev, usb_sndctrlpipe(dev->udev, 0),
 354                 (void *)&usb_context->req, data, size,
 355                 (usb_complete_t)smsc95xx_async_cmd_callback,
 356                 (void *)usb_context);
 357
 358         status = usb_submit_urb(urb, GFP_ATOMIC);
 359         if (status < 0) {
 360                 devwarn(dev, "Error submitting control msg, sts=%d", status);
 361                 kfree(usb_context);
 362                 usb_free_urb(urb);
 363         }
 364
 365         return status;
 366 }
 367
 368 /* returns hash bit number for given MAC address
 369  * example:
 370  * 01 00 5E 00 00 01 -> returns bit number 31 */
 371 static unsigned int smsc95xx_hash(char addr[ETH_ALEN])
 372 {
 373         return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
 374 }
 375
 376 static void smsc95xx_set_multicast(struct net_device *netdev)
 377 {
 378         struct usbnet *dev = netdev_priv(netdev);
 379         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 380         u32 hash_hi = 0;
 381         u32 hash_lo = 0;
 382         unsigned long flags;
 383
 384         spin_lock_irqsave(&pdata->mac_cr_lock, flags);
 385
 386         if (dev->net->flags & IFF_PROMISC) {
 387                 if (netif_msg_drv(dev))
 388                         devdbg(dev, "promiscuous mode enabled");
 389                 pdata->mac_cr |= MAC_CR_PRMS_;
 390                 pdata->mac_cr &= ~(MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
 391         } else if (dev->net->flags & IFF_ALLMULTI) {
 392                 if (netif_msg_drv(dev))
 393                         devdbg(dev, "receive all multicast enabled");
 394                 pdata->mac_cr |= MAC_CR_MCPAS_;
 395                 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_HPFILT_);
 396         } else if (dev->net->mc_count > 0) {
 397                 struct dev_mc_list *mc_list = dev->net->mc_list;
 398                 int count = 0;
 399
 400                 pdata->mac_cr |= MAC_CR_HPFILT_;
 401                 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
 402
 403                 while (mc_list) {
 404                         count++;
 405                         if (mc_list->dmi_addrlen == ETH_ALEN) {
 406                                 u32 bitnum = smsc95xx_hash(mc_list->dmi_addr);
 407                                 u32 mask = 0x01 << (bitnum & 0x1F);
 408                                 if (bitnum & 0x20)
 409                                         hash_hi |= mask;
 410                                 else
 411                                         hash_lo |= mask;
 412                         } else {
 413                                 devwarn(dev, "dmi_addrlen != 6");
 414                         }
 415                         mc_list = mc_list->next;
 416                 }
 417
 418                 if (count != ((u32)dev->net->mc_count))
 419                         devwarn(dev, "mc_count != dev->mc_count");
 420
 421                 if (netif_msg_drv(dev))
 422                         devdbg(dev, "HASHH=0x%08X, HASHL=0x%08X", hash_hi,
 423                                 hash_lo);
 424         } else {
 425                 if (netif_msg_drv(dev))
 426                         devdbg(dev, "receive own packets only");
 427                 pdata->mac_cr &=
 428                         ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
 429         }
 430
 431         spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
 432
 433         /* Initiate async writes, as we can't wait for completion here */
 434         smsc95xx_write_reg_async(dev, HASHH, &hash_hi);
 435         smsc95xx_write_reg_async(dev, HASHL, &hash_lo);
 436         smsc95xx_write_reg_async(dev, MAC_CR, &pdata->mac_cr);
 437 }
 438
 439 static void smsc95xx_phy_update_flowcontrol(struct usbnet *dev, u8 duplex,
 440                                             u16 lcladv, u16 rmtadv)
 441 {
 442         u32 flow, afc_cfg = 0;
 443
 444         int ret = smsc95xx_read_reg(dev, AFC_CFG, &afc_cfg);
 445         if (ret < 0) {
 446                 devwarn(dev, "error reading AFC_CFG");
 447                 return;
 448         }
 449
 450         if (duplex == DUPLEX_FULL) {
 451                 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
 452
 453                 if (cap & FLOW_CTRL_RX)
 454                         flow = 0xFFFF0002;
 455                 else
 456                         flow = 0;
 457
 458                 if (cap & FLOW_CTRL_TX)
 459                         afc_cfg |= 0xF;
 460                 else
 461                         afc_cfg &= ~0xF;
 462
 463                 if (netif_msg_link(dev))
 464                         devdbg(dev, "rx pause %s, tx pause %s",
 465                                 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
 466                                 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
 467         } else {
 468                 if (netif_msg_link(dev))
 469                         devdbg(dev, "half duplex");
 470                 flow = 0;
 471                 afc_cfg |= 0xF;
 472         }
 473
 474         smsc95xx_write_reg(dev, FLOW, flow);
 475         smsc95xx_write_reg(dev, AFC_CFG, afc_cfg);
 476 }
 477
 478 static int smsc95xx_link_reset(struct usbnet *dev)
 479 {
 480         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 481         struct mii_if_info *mii = &dev->mii;
 482         struct ethtool_cmd ecmd;
 483         unsigned long flags;
 484         u16 lcladv, rmtadv;
 485         u32 intdata;
 486
 487         /* clear interrupt status */
 488         smsc95xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC);
 489         intdata = 0xFFFFFFFF;
 490         smsc95xx_write_reg(dev, INT_STS, intdata);
 491
 492         mii_check_media(mii, 1, 1);
 493         mii_ethtool_gset(&dev->mii, &ecmd);
 494         lcladv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE);
 495         rmtadv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_LPA);
 496
 497         if (netif_msg_link(dev))
 498                 devdbg(dev, "speed: %d duplex: %d lcladv: %04x rmtadv: %04x",
 499                         ecmd.speed, ecmd.duplex, lcladv, rmtadv);
 500
 501         spin_lock_irqsave(&pdata->mac_cr_lock, flags);
 502         if (ecmd.duplex != DUPLEX_FULL) {
 503                 pdata->mac_cr &= ~MAC_CR_FDPX_;
 504                 pdata->mac_cr |= MAC_CR_RCVOWN_;
 505         } else {
 506                 pdata->mac_cr &= ~MAC_CR_RCVOWN_;
 507                 pdata->mac_cr |= MAC_CR_FDPX_;
 508         }
 509         spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
 510
 511         smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
 512
 513         smsc95xx_phy_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv);
 514
 515         return 0;
 516 }
 517
 518 static void smsc95xx_status(struct usbnet *dev, struct urb *urb)
 519 {
 520         u32 intdata;
 521
 522         if (urb->actual_length != 4) {
 523                 devwarn(dev, "unexpected urb length %d", urb->actual_length);
 524                 return;
 525         }
 526
 527         memcpy(&intdata, urb->transfer_buffer, 4);
 528         le32_to_cpus(&intdata);
 529
 530         if (netif_msg_link(dev))
 531                 devdbg(dev, "intdata: 0x%08X", intdata);
 532
 533         if (intdata & INT_ENP_PHY_INT_)
 534                 usbnet_defer_kevent(dev, EVENT_LINK_RESET);
 535         else
 536                 devwarn(dev, "unexpected interrupt, intdata=0x%08X", intdata);
 537 }
 538
 539 /* Enable or disable Tx & Rx checksum offload engines */
 540 static int smsc95xx_set_csums(struct usbnet *dev)
 541 {
 542         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 543         u32 read_buf;
 544         int ret = smsc95xx_read_reg(dev, COE_CR, &read_buf);
 545         if (ret < 0) {
 546                 devwarn(dev, "Failed to read COE_CR: %d", ret);
 547                 return ret;
 548         }
 549
 550         if (pdata->use_tx_csum)
 551                 read_buf |= Tx_COE_EN_;
 552         else
 553                 read_buf &= ~Tx_COE_EN_;
 554
 555         if (pdata->use_rx_csum)
 556                 read_buf |= Rx_COE_EN_;
 557         else
 558                 read_buf &= ~Rx_COE_EN_;
 559
 560         ret = smsc95xx_write_reg(dev, COE_CR, read_buf);
 561         if (ret < 0) {
 562                 devwarn(dev, "Failed to write COE_CR: %d", ret);
 563                 return ret;
 564         }
 565
 566         if (netif_msg_hw(dev))
 567                 devdbg(dev, "COE_CR = 0x%08x", read_buf);
 568         return 0;
 569 }
 570
 571 static int smsc95xx_ethtool_get_eeprom_len(struct net_device *net)
 572 {
 573         return MAX_EEPROM_SIZE;
 574 }
 575
 576 static int smsc95xx_ethtool_get_eeprom(struct net_device *netdev,
 577                                        struct ethtool_eeprom *ee, u8 *data)
 578 {
 579         struct usbnet *dev = netdev_priv(netdev);
 580
 581         ee->magic = LAN95XX_EEPROM_MAGIC;
 582
 583         return smsc95xx_read_eeprom(dev, ee->offset, ee->len, data);
 584 }
 585
 586 static int smsc95xx_ethtool_set_eeprom(struct net_device *netdev,
 587                                        struct ethtool_eeprom *ee, u8 *data)
 588 {
 589         struct usbnet *dev = netdev_priv(netdev);
 590
 591         if (ee->magic != LAN95XX_EEPROM_MAGIC) {
 592                 devwarn(dev, "EEPROM: magic value mismatch, magic = 0x%x",
 593                         ee->magic);
 594                 return -EINVAL;
 595         }
 596
 597         return smsc95xx_write_eeprom(dev, ee->offset, ee->len, data);
 598 }
 599
 600 static u32 smsc95xx_ethtool_get_rx_csum(struct net_device *netdev)
 601 {
 602         struct usbnet *dev = netdev_priv(netdev);
 603         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 604
 605         return pdata->use_rx_csum;
 606 }
 607
 608 static int smsc95xx_ethtool_set_rx_csum(struct net_device *netdev, u32 val)
 609 {
 610         struct usbnet *dev = netdev_priv(netdev);
 611         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 612
 613         pdata->use_rx_csum = !!val;
 614
 615         return smsc95xx_set_csums(dev);
 616 }
 617
 618 static u32 smsc95xx_ethtool_get_tx_csum(struct net_device *netdev)
 619 {
 620         struct usbnet *dev = netdev_priv(netdev);
 621         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 622
 623         return pdata->use_tx_csum;
 624 }
 625
 626 static int smsc95xx_ethtool_set_tx_csum(struct net_device *netdev, u32 val)
 627 {
 628         struct usbnet *dev = netdev_priv(netdev);
 629         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 630
 631         pdata->use_tx_csum = !!val;
 632
 633         ethtool_op_set_tx_hw_csum(netdev, pdata->use_tx_csum);
 634         return smsc95xx_set_csums(dev);
 635 }
 636
 637 static struct ethtool_ops smsc95xx_ethtool_ops = {
 638         .get_link       = usbnet_get_link,
 639         .nway_reset     = usbnet_nway_reset,
 640         .get_drvinfo    = usbnet_get_drvinfo,
 641         .get_msglevel   = usbnet_get_msglevel,
 642         .set_msglevel   = usbnet_set_msglevel,
 643         .get_settings   = usbnet_get_settings,
 644         .set_settings   = usbnet_set_settings,
 645         .get_eeprom_len = smsc95xx_ethtool_get_eeprom_len,
 646         .get_eeprom     = smsc95xx_ethtool_get_eeprom,
 647         .set_eeprom     = smsc95xx_ethtool_set_eeprom,
 648         .get_tx_csum    = smsc95xx_ethtool_get_tx_csum,
 649         .set_tx_csum    = smsc95xx_ethtool_set_tx_csum,
 650         .get_rx_csum    = smsc95xx_ethtool_get_rx_csum,
 651         .set_rx_csum    = smsc95xx_ethtool_set_rx_csum,
 652 };
 653
 654 static int smsc95xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
 655 {
 656         struct usbnet *dev = netdev_priv(netdev);
 657
 658         if (!netif_running(netdev))
 659                 return -EINVAL;
 660
 661         return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
 662 }
 663
 664 static void smsc95xx_init_mac_address(struct usbnet *dev)
 665 {
 666         /* try reading mac address from EEPROM */
 667         if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
 668                         dev->net->dev_addr) == 0) {
 669                 if (is_valid_ether_addr(dev->net->dev_addr)) {
 670                         /* eeprom values are valid so use them */
 671                         if (netif_msg_ifup(dev))
 672                                 devdbg(dev, "MAC address read from EEPROM");
 673                         return;
 674                 }
 675         }
 676
 677         /* no eeprom, or eeprom values are invalid. generate random MAC */
 678         random_ether_addr(dev->net->dev_addr);
 679         if (netif_msg_ifup(dev))
 680                 devdbg(dev, "MAC address set to random_ether_addr");
 681 }
 682
 683 static int smsc95xx_set_mac_address(struct usbnet *dev)
 684 {
 685         u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 |
 686                 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24;
 687         u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8;
 688         int ret;
 689
 690         ret = smsc95xx_write_reg(dev, ADDRL, addr_lo);
 691         if (ret < 0) {
 692                 devwarn(dev, "Failed to write ADDRL: %d", ret);
 693                 return ret;
 694         }
 695
 696         ret = smsc95xx_write_reg(dev, ADDRH, addr_hi);
 697         if (ret < 0) {
 698                 devwarn(dev, "Failed to write ADDRH: %d", ret);
 699                 return ret;
 700         }
 701
 702         return 0;
 703 }
 704
 705 /* starts the TX path */
 706 static void smsc95xx_start_tx_path(struct usbnet *dev)
 707 {
 708         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 709         unsigned long flags;
 710         u32 reg_val;
 711
 712         /* Enable Tx at MAC */
 713         spin_lock_irqsave(&pdata->mac_cr_lock, flags);
 714         pdata->mac_cr |= MAC_CR_TXEN_;
 715         spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
 716
 717         smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
 718
 719         /* Enable Tx at SCSRs */
 720         reg_val = TX_CFG_ON_;
 721         smsc95xx_write_reg(dev, TX_CFG, reg_val);
 722 }
 723
 724 /* Starts the Receive path */
 725 static void smsc95xx_start_rx_path(struct usbnet *dev)
 726 {
 727         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 728         unsigned long flags;
 729
 730         spin_lock_irqsave(&pdata->mac_cr_lock, flags);
 731         pdata->mac_cr |= MAC_CR_RXEN_;
 732         spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
 733
 734         smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
 735 }
 736
 737 static int smsc95xx_phy_initialize(struct usbnet *dev)
 738 {
 739         /* Initialize MII structure */
 740         dev->mii.dev = dev->net;
 741         dev->mii.mdio_read = smsc95xx_mdio_read;
 742         dev->mii.mdio_write = smsc95xx_mdio_write;
 743         dev->mii.phy_id_mask = 0x1f;
 744         dev->mii.reg_num_mask = 0x1f;
 745         dev->mii.phy_id = SMSC95XX_INTERNAL_PHY_ID;
 746
 747         smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
 748         smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
 749                 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |
 750                 ADVERTISE_PAUSE_ASYM);
 751
 752         /* read to clear */
 753         smsc95xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC);
 754
 755         smsc95xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK,
 756                 PHY_INT_MASK_DEFAULT_);
 757         mii_nway_restart(&dev->mii);
 758
 759         if (netif_msg_ifup(dev))
 760                 devdbg(dev, "phy initialised succesfully");
 761         return 0;
 762 }
 763
 764 static int smsc95xx_reset(struct usbnet *dev)
 765 {
 766         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 767         struct net_device *netdev = dev->net;
 768         u32 read_buf, write_buf, burst_cap;
 769         int ret = 0, timeout;
 770
 771         if (netif_msg_ifup(dev))
 772                 devdbg(dev, "entering smsc95xx_reset");
 773
 774         write_buf = HW_CFG_LRST_;
 775         ret = smsc95xx_write_reg(dev, HW_CFG, write_buf);
 776         if (ret < 0) {
 777                 devwarn(dev, "Failed to write HW_CFG_LRST_ bit in HW_CFG "
 778                         "register, ret = %d", ret);
 779                 return ret;
 780         }
 781
 782         timeout = 0;
 783         do {
 784                 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
 785                 if (ret < 0) {
 786                         devwarn(dev, "Failed to read HW_CFG: %d", ret);
 787                         return ret;
 788                 }
 789                 msleep(10);
 790                 timeout++;
 791         } while ((read_buf & HW_CFG_LRST_) && (timeout < 100));
 792
 793         if (timeout >= 100) {
 794                 devwarn(dev, "timeout waiting for completion of Lite Reset");
 795                 return ret;
 796         }
 797
 798         write_buf = PM_CTL_PHY_RST_;
 799         ret = smsc95xx_write_reg(dev, PM_CTRL, write_buf);
 800         if (ret < 0) {
 801                 devwarn(dev, "Failed to write PM_CTRL: %d", ret);
 802                 return ret;
 803         }
 804
 805         timeout = 0;
 806         do {
 807                 ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf);
 808                 if (ret < 0) {
 809                         devwarn(dev, "Failed to read PM_CTRL: %d", ret);
 810                         return ret;
 811                 }
 812                 msleep(10);
 813                 timeout++;
 814         } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100));
 815
 816         if (timeout >= 100) {
 817                 devwarn(dev, "timeout waiting for PHY Reset");
 818                 return ret;
 819         }
 820
 821         smsc95xx_init_mac_address(dev);
 822
 823         ret = smsc95xx_set_mac_address(dev);
 824         if (ret < 0)
 825                 return ret;
 826
 827         if (netif_msg_ifup(dev))
 828                 devdbg(dev, "MAC Address: %pM", dev->net->dev_addr);
 829
 830         ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
 831         if (ret < 0) {
 832                 devwarn(dev, "Failed to read HW_CFG: %d", ret);
 833                 return ret;
 834         }
 835
 836         if (netif_msg_ifup(dev))
 837                 devdbg(dev, "Read Value from HW_CFG : 0x%08x", read_buf);
 838
 839         read_buf |= HW_CFG_BIR_;
 840
 841         ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
 842         if (ret < 0) {
 843                 devwarn(dev, "Failed to write HW_CFG_BIR_ bit in HW_CFG "
 844                         "register, ret = %d", ret);
 845                 return ret;
 846         }
 847
 848         ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
 849         if (ret < 0) {
 850                 devwarn(dev, "Failed to read HW_CFG: %d", ret);
 851                 return ret;
 852         }
 853         if (netif_msg_ifup(dev))
 854                 devdbg(dev, "Read Value from HW_CFG after writing "
 855                         "HW_CFG_BIR_: 0x%08x", read_buf);
 856
 857         if (!turbo_mode) {
 858                 burst_cap = 0;
 859                 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
 860         } else if (dev->udev->speed == USB_SPEED_HIGH) {
 861                 burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
 862                 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
 863         } else {
 864                 burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
 865                 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
 866         }
 867
 868         if (netif_msg_ifup(dev))
 869                 devdbg(dev, "rx_urb_size=%ld", (ulong)dev->rx_urb_size);
 870
 871         ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap);
 872         if (ret < 0) {
 873                 devwarn(dev, "Failed to write BURST_CAP: %d", ret);
 874                 return ret;
 875         }
 876
 877         ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf);
 878         if (ret < 0) {
 879                 devwarn(dev, "Failed to read BURST_CAP: %d", ret);
 880                 return ret;
 881         }
 882         if (netif_msg_ifup(dev))
 883                 devdbg(dev, "Read Value from BURST_CAP after writing: 0x%08x",
 884                         read_buf);
 885
 886         read_buf = DEFAULT_BULK_IN_DELAY;
 887         ret = smsc95xx_write_reg(dev, BULK_IN_DLY, read_buf);
 888         if (ret < 0) {
 889                 devwarn(dev, "ret = %d", ret);
 890                 return ret;
 891         }
 892
 893         ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf);
 894         if (ret < 0) {
 895                 devwarn(dev, "Failed to read BULK_IN_DLY: %d", ret);
 896                 return ret;
 897         }
 898         if (netif_msg_ifup(dev))
 899                 devdbg(dev, "Read Value from BULK_IN_DLY after writing: "
 900                         "0x%08x", read_buf);
 901
 902         ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
 903         if (ret < 0) {
 904                 devwarn(dev, "Failed to read HW_CFG: %d", ret);
 905                 return ret;
 906         }
 907         if (netif_msg_ifup(dev))
 908                 devdbg(dev, "Read Value from HW_CFG: 0x%08x", read_buf);
 909
 910         if (turbo_mode)
 911                 read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_);
 912
 913         read_buf &= ~HW_CFG_RXDOFF_;
 914
 915         /* set Rx data offset=2, Make IP header aligns on word boundary. */
 916         read_buf |= NET_IP_ALIGN << 9;
 917
 918         ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
 919         if (ret < 0) {
 920                 devwarn(dev, "Failed to write HW_CFG register, ret=%d", ret);
 921                 return ret;
 922         }
 923
 924         ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
 925         if (ret < 0) {
 926                 devwarn(dev, "Failed to read HW_CFG: %d", ret);
 927                 return ret;
 928         }
 929         if (netif_msg_ifup(dev))
 930                 devdbg(dev, "Read Value from HW_CFG after writing: 0x%08x",
 931                         read_buf);
 932
 933         write_buf = 0xFFFFFFFF;
 934         ret = smsc95xx_write_reg(dev, INT_STS, write_buf);
 935         if (ret < 0) {
 936                 devwarn(dev, "Failed to write INT_STS register, ret=%d", ret);
 937                 return ret;
 938         }
 939
 940         ret = smsc95xx_read_reg(dev, ID_REV, &read_buf);
 941         if (ret < 0) {
 942                 devwarn(dev, "Failed to read ID_REV: %d", ret);
 943                 return ret;
 944         }
 945         if (netif_msg_ifup(dev))
 946                 devdbg(dev, "ID_REV = 0x%08x", read_buf);
 947
 948         /* Init Tx */
 949         write_buf = 0;
 950         ret = smsc95xx_write_reg(dev, FLOW, write_buf);
 951         if (ret < 0) {
 952                 devwarn(dev, "Failed to write FLOW: %d", ret);
 953                 return ret;
 954         }
 955
 956         read_buf = AFC_CFG_DEFAULT;
 957         ret = smsc95xx_write_reg(dev, AFC_CFG, read_buf);
 958         if (ret < 0) {
 959                 devwarn(dev, "Failed to write AFC_CFG: %d", ret);
 960                 return ret;
 961         }
 962
 963         /* Don't need mac_cr_lock during initialisation */
 964         ret = smsc95xx_read_reg(dev, MAC_CR, &pdata->mac_cr);
 965         if (ret < 0) {
 966                 devwarn(dev, "Failed to read MAC_CR: %d", ret);
 967                 return ret;
 968         }
 969
 970         /* Init Rx */
 971         /* Set Vlan */
 972         write_buf = (u32)ETH_P_8021Q;
 973         ret = smsc95xx_write_reg(dev, VLAN1, write_buf);
 974         if (ret < 0) {
 975                 devwarn(dev, "Failed to write VAN1: %d", ret);
 976                 return ret;
 977         }
 978
 979         /* Enable or disable checksum offload engines */
 980         ethtool_op_set_tx_hw_csum(netdev, pdata->use_tx_csum);
 981         ret = smsc95xx_set_csums(dev);
 982         if (ret < 0) {
 983                 devwarn(dev, "Failed to set csum offload: %d", ret);
 984                 return ret;
 985         }
 986
 987         smsc95xx_set_multicast(dev->net);
 988
 989         if (smsc95xx_phy_initialize(dev) < 0)
 990                 return -EIO;
 991
 992         ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf);
 993         if (ret < 0) {
 994                 devwarn(dev, "Failed to read INT_EP_CTL: %d", ret);
 995                 return ret;
 996         }
 997
 998         /* enable PHY interrupts */
 999         read_buf |= INT_EP_CTL_PHY_INT_;
1000
1001         ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf);
1002         if (ret < 0) {
1003                 devwarn(dev, "Failed to write INT_EP_CTL: %d", ret);
1004                 return ret;
1005         }
1006
1007         smsc95xx_start_tx_path(dev);
1008         smsc95xx_start_rx_path(dev);
1009
1010         if (netif_msg_ifup(dev))
1011                 devdbg(dev, "smsc95xx_reset, return 0");
1012         return 0;
1013 }
1014
1015 static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf)
1016 {
1017         struct smsc95xx_priv *pdata = NULL;
1018         int ret;
1019
1020         printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n");
1021
1022         ret = usbnet_get_endpoints(dev, intf);
1023         if (ret < 0) {
1024                 devwarn(dev, "usbnet_get_endpoints failed: %d", ret);
1025                 return ret;
1026         }
1027
1028         dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc95xx_priv),
1029                 GFP_KERNEL);
1030
1031         pdata = (struct smsc95xx_priv *)(dev->data[0]);
1032         if (!pdata) {
1033                 devwarn(dev, "Unable to allocate struct smsc95xx_priv");
1034                 return -ENOMEM;
1035         }
1036
1037         spin_lock_init(&pdata->mac_cr_lock);
1038
1039         pdata->use_tx_csum = DEFAULT_TX_CSUM_ENABLE;
1040         pdata->use_rx_csum = DEFAULT_RX_CSUM_ENABLE;
1041
1042         /* Init all registers */
1043         ret = smsc95xx_reset(dev);
1044
1045         dev->net->do_ioctl = smsc95xx_ioctl;
1046         dev->net->ethtool_ops = &smsc95xx_ethtool_ops;
1047         dev->net->set_multicast_list = smsc95xx_set_multicast;
1048         dev->net->flags |= IFF_MULTICAST;
1049         dev->net->hard_header_len += SMSC95XX_TX_OVERHEAD;
1050         return 0;
1051 }
1052
1053 static void smsc95xx_unbind(struct usbnet *dev, struct usb_interface *intf)
1054 {
1055         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1056         if (pdata) {
1057                 if (netif_msg_ifdown(dev))
1058                         devdbg(dev, "free pdata");
1059                 kfree(pdata);
1060                 pdata = NULL;
1061                 dev->data[0] = 0;
1062         }
1063 }
1064
1065 static void smsc95xx_rx_csum_offload(struct sk_buff *skb)
1066 {
1067         skb->csum = *(u16 *)(skb_tail_pointer(skb) - 2);
1068         skb->ip_summed = CHECKSUM_COMPLETE;
1069         skb_trim(skb, skb->len - 2);
1070 }
1071
1072 static int smsc95xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1073 {
1074         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1075
1076         while (skb->len > 0) {
1077                 u32 header, align_count;
1078                 struct sk_buff *ax_skb;
1079                 unsigned char *packet;
1080                 u16 size;
1081
1082                 memcpy(&header, skb->data, sizeof(header));
1083                 le32_to_cpus(&header);
1084                 skb_pull(skb, 4 + NET_IP_ALIGN);
1085                 packet = skb->data;
1086
1087                 /* get the packet length */
1088                 size = (u16)((header & RX_STS_FL_) >> 16);
1089                 align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4;
1090
1091                 if (unlikely(header & RX_STS_ES_)) {
1092                         if (netif_msg_rx_err(dev))
1093                                 devdbg(dev, "Error header=0x%08x", header);
1094                         dev->stats.rx_errors++;
1095                         dev->stats.rx_dropped++;
1096
1097                         if (header & RX_STS_CRC_) {
1098                                 dev->stats.rx_crc_errors++;
1099                         } else {
1100                                 if (header & (RX_STS_TL_ | RX_STS_RF_))
1101                                         dev->stats.rx_frame_errors++;
1102
1103                                 if ((header & RX_STS_LE_) &&
1104                                         (!(header & RX_STS_FT_)))
1105                                         dev->stats.rx_length_errors++;
1106                         }
1107                 } else {
1108                         /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */
1109                         if (unlikely(size > (ETH_FRAME_LEN + 12))) {
1110                                 if (netif_msg_rx_err(dev))
1111                                         devdbg(dev, "size err header=0x%08x",
1112                                                 header);
1113                                 return 0;
1114                         }
1115
1116                         /* last frame in this batch */
1117                         if (skb->len == size) {
1118                                 if (pdata->use_rx_csum)
1119                                         smsc95xx_rx_csum_offload(skb);
1120
1121                                 skb->truesize = size + sizeof(struct sk_buff);
1122
1123                                 return 1;
1124                         }
1125
1126                         ax_skb = skb_clone(skb, GFP_ATOMIC);
1127                         if (unlikely(!ax_skb)) {
1128                                 devwarn(dev, "Error allocating skb");
1129                                 return 0;
1130                         }
1131
1132                         ax_skb->len = size;
1133                         ax_skb->data = packet;
1134                         skb_set_tail_pointer(ax_skb, size);
1135
1136                         if (pdata->use_rx_csum)
1137                                 smsc95xx_rx_csum_offload(ax_skb);
1138
1139                         ax_skb->truesize = size + sizeof(struct sk_buff);
1140
1141                         usbnet_skb_return(dev, ax_skb);
1142                 }
1143
1144                 skb_pull(skb, size);
1145
1146                 /* padding bytes before the next frame starts */
1147                 if (skb->len)
1148                         skb_pull(skb, align_count);
1149         }
1150
1151         if (unlikely(skb->len < 0)) {
1152                 devwarn(dev, "invalid rx length<0 %d", skb->len);
1153                 return 0;
1154         }
1155
1156         return 1;
1157 }
1158
1159 static u32 smsc95xx_calc_csum_preamble(struct sk_buff *skb)
1160 {
1161         int len = skb->data - skb->head;
1162         u16 high_16 = (u16)(skb->csum_offset + skb->csum_start - len);
1163         u16 low_16 = (u16)(skb->csum_start - len);
1164         return (high_16 << 16) | low_16;
1165 }
1166
1167 static struct sk_buff *smsc95xx_tx_fixup(struct usbnet *dev,
1168                                          struct sk_buff *skb, gfp_t flags)
1169 {
1170         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1171         bool csum = pdata->use_tx_csum && (skb->ip_summed == CHECKSUM_PARTIAL);
1172         int overhead = csum ? SMSC95XX_TX_OVERHEAD_CSUM : SMSC95XX_TX_OVERHEAD;
1173         u32 tx_cmd_a, tx_cmd_b;
1174
1175         /* We do not advertise SG, so skbs should be already linearized */
1176         BUG_ON(skb_shinfo(skb)->nr_frags);
1177
1178         if (skb_headroom(skb) < overhead) {
1179                 struct sk_buff *skb2 = skb_copy_expand(skb,
1180                         overhead, 0, flags);
1181                 dev_kfree_skb_any(skb);
1182                 skb = skb2;
1183                 if (!skb)
1184                         return NULL;
1185         }
1186
1187         if (csum) {
1188                 u32 csum_preamble = smsc95xx_calc_csum_preamble(skb);
1189                 skb_push(skb, 4);
1190                 memcpy(skb->data, &csum_preamble, 4);
1191         }
1192
1193         skb_push(skb, 4);
1194         tx_cmd_b = (u32)(skb->len - 4);
1195         if (csum)
1196                 tx_cmd_b |= TX_CMD_B_CSUM_ENABLE;
1197         cpu_to_le32s(&tx_cmd_b);
1198         memcpy(skb->data, &tx_cmd_b, 4);
1199
1200         skb_push(skb, 4);
1201         tx_cmd_a = (u32)(skb->len - 8) | TX_CMD_A_FIRST_SEG_ |
1202                 TX_CMD_A_LAST_SEG_;
1203         cpu_to_le32s(&tx_cmd_a);
1204         memcpy(skb->data, &tx_cmd_a, 4);
1205
1206         return skb;
1207 }
1208
1209 static const struct driver_info smsc95xx_info = {
1210         .description    = "smsc95xx USB 2.0 Ethernet",
1211         .bind           = smsc95xx_bind,
1212         .unbind         = smsc95xx_unbind,
1213         .link_reset     = smsc95xx_link_reset,
1214         .reset          = smsc95xx_reset,
1215         .rx_fixup       = smsc95xx_rx_fixup,
1216         .tx_fixup       = smsc95xx_tx_fixup,
1217         .status         = smsc95xx_status,
1218         .flags          = FLAG_ETHER,
1219 };
1220
1221 static const struct usb_device_id products[] = {
1222         {
1223                 /* SMSC9500 USB Ethernet Device */
1224                 USB_DEVICE(0x0424, 0x9500),
1225                 .driver_info = (unsigned long) &smsc95xx_info,
1226         },
1227         { },            /* END */
1228 };
1229 MODULE_DEVICE_TABLE(usb, products);
1230
1231 static struct usb_driver smsc95xx_driver = {
1232         .name           = "smsc95xx",
1233         .id_table       = products,
1234         .probe          = usbnet_probe,
1235         .suspend        = usbnet_suspend,
1236         .resume         = usbnet_resume,
1237         .disconnect     = usbnet_disconnect,
1238 };
1239
1240 static int __init smsc95xx_init(void)
1241 {
1242         return usb_register(&smsc95xx_driver);
1243 }
1244 module_init(smsc95xx_init);
1245
1246 static void __exit smsc95xx_exit(void)
1247 {
1248         usb_deregister(&smsc95xx_driver);
1249 }
1250 module_exit(smsc95xx_exit);
1251
1252 MODULE_AUTHOR("Nancy Lin");
1253 MODULE_AUTHOR("Steve Glendinning <steve.glendinning@smsc.com>");
1254 MODULE_DESCRIPTION("SMSC95XX USB 2.0 Ethernet Devices");
1255 MODULE_LICENSE("GPL");