2 * tc35815.c: A TOSHIBA TC35815CF PCI 10/100Mbps ethernet driver for linux.
4 * Based on skelton.c by Donald Becker.
6 * This driver is a replacement of older and less maintained version.
7 * This is a header of the older version:
9 * Copyright 2001 MontaVista Software Inc.
10 * Author: MontaVista Software, Inc.
11 * ahennessy@mvista.com
12 * Copyright (C) 2000-2001 Toshiba Corporation
13 * static const char *version =
14 * "tc35815.c:v0.00 26/07/2000 by Toshiba Corporation\n";
17 * This file is subject to the terms and conditions of the GNU General Public
18 * License. See the file "COPYING" in the main directory of this archive
21 * (C) Copyright TOSHIBA CORPORATION 2004-2005
22 * All Rights Reserved.
26 * 1.14 Do not round-up transmit length.
27 * 1.15 Define TC35815_DMA_SYNC_ONDEMAND, cleanup.
28 * 1.16 Fix free_page bug introduced in 1.15
29 * 1.17 Add mii/ethtool ioctl support.
30 * Remove workaround for early TX4938. Cleanup.
32 * 1.21 Fix receive packet length (omit CRC).
33 * Call netif_carrier_on/netif_carrier_off.
34 * Add kernel/module options (speed, duplex, doforce).
35 * Do not try "force link mode" by default.
36 * Reconfigure CAM on restarting.
37 * Reset PHY on restarting.
38 * Add workaround for 100MHalf HUB.
41 * 1.24 Remove tc35815_setup since new stype option
42 * ("tc35815.speed=10", etc.) can be used for 2.6 kernel.
43 * 1.25 TX4939 support.
45 * 1.27 Move TX4939 PCFG.SPEEDn control code out from this driver.
46 * Cleanup init_dev_addr. (NETDEV_REGISTER event notifier
47 * can overwrite dev_addr)
48 * support ETHTOOL_GPERMADDR.
50 * 1.29 support netpoll.
52 * 1.31 NAPI support. (disabled by default)
53 * Use DMA_RxAlign_2 if possible.
54 * Do not use PackedBuffer.
56 * 1.32 Fix free buffer management on non-PackedBuffer mode.
57 * 1.33 Fix netpoll build.
58 * 1.34 Fix netpoll locking. "BH rule" for NAPI is not enough with
59 * netpoll, hard_start_xmit might be called from irq context.
64 #define DRV_VERSION "1.34-NAPI"
66 #define DRV_VERSION "1.34"
68 static const char *version = "tc35815.c:v" DRV_VERSION "\n";
69 #define MODNAME "tc35815"
71 #include <linux/module.h>
72 #include <linux/kernel.h>
73 #include <linux/types.h>
74 #include <linux/fcntl.h>
75 #include <linux/interrupt.h>
76 #include <linux/ioport.h>
78 #include <linux/slab.h>
79 #include <linux/string.h>
80 #include <linux/spinlock.h>
81 #include <linux/errno.h>
82 #include <linux/init.h>
83 #include <linux/netdevice.h>
84 #include <linux/etherdevice.h>
85 #include <linux/skbuff.h>
86 #include <linux/delay.h>
87 #include <linux/pci.h>
88 #include <linux/mii.h>
89 #include <linux/ethtool.h>
91 #include <asm/byteorder.h>
93 /* First, a few definitions that the brave might change. */
95 #define GATHER_TXINT /* On-Demand Tx Interrupt */
96 #define WORKAROUND_LOSTCAR
97 #define WORKAROUND_100HALF_PROMISC
98 /* #define TC35815_USE_PACKEDBUFFER */
106 /* indexed by board_t, above */
107 static const struct {
109 } board_info[] __devinitdata = {
110 { "TOSHIBA TC35815CF 10/100BaseTX" },
111 { "TOSHIBA TC35815 with Wake on LAN" },
112 { "TOSHIBA TC35815/TX4939" },
115 static const struct pci_device_id tc35815_pci_tbl[] = {
116 {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815CF), .driver_data = TC35815CF },
117 {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815_NWU), .driver_data = TC35815_NWU },
118 {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815_TX4939), .driver_data = TC35815_TX4939 },
121 MODULE_DEVICE_TABLE (pci, tc35815_pci_tbl);
123 /* see MODULE_PARM_DESC */
124 static struct tc35815_options {
133 struct tc35815_regs {
134 volatile __u32 DMA_Ctl; /* 0x00 */
135 volatile __u32 TxFrmPtr;
136 volatile __u32 TxThrsh;
137 volatile __u32 TxPollCtr;
138 volatile __u32 BLFrmPtr;
139 volatile __u32 RxFragSize;
140 volatile __u32 Int_En;
141 volatile __u32 FDA_Bas;
142 volatile __u32 FDA_Lim; /* 0x20 */
143 volatile __u32 Int_Src;
144 volatile __u32 unused0[2];
145 volatile __u32 PauseCnt;
146 volatile __u32 RemPauCnt;
147 volatile __u32 TxCtlFrmStat;
148 volatile __u32 unused1;
149 volatile __u32 MAC_Ctl; /* 0x40 */
150 volatile __u32 CAM_Ctl;
151 volatile __u32 Tx_Ctl;
152 volatile __u32 Tx_Stat;
153 volatile __u32 Rx_Ctl;
154 volatile __u32 Rx_Stat;
155 volatile __u32 MD_Data;
156 volatile __u32 MD_CA;
157 volatile __u32 CAM_Adr; /* 0x60 */
158 volatile __u32 CAM_Data;
159 volatile __u32 CAM_Ena;
160 volatile __u32 PROM_Ctl;
161 volatile __u32 PROM_Data;
162 volatile __u32 Algn_Cnt;
163 volatile __u32 CRC_Cnt;
164 volatile __u32 Miss_Cnt;
170 /* DMA_Ctl bit asign ------------------------------------------------------- */
171 #define DMA_RxAlign 0x00c00000 /* 1:Reception Alignment */
172 #define DMA_RxAlign_1 0x00400000
173 #define DMA_RxAlign_2 0x00800000
174 #define DMA_RxAlign_3 0x00c00000
175 #define DMA_M66EnStat 0x00080000 /* 1:66MHz Enable State */
176 #define DMA_IntMask 0x00040000 /* 1:Interupt mask */
177 #define DMA_SWIntReq 0x00020000 /* 1:Software Interrupt request */
178 #define DMA_TxWakeUp 0x00010000 /* 1:Transmit Wake Up */
179 #define DMA_RxBigE 0x00008000 /* 1:Receive Big Endian */
180 #define DMA_TxBigE 0x00004000 /* 1:Transmit Big Endian */
181 #define DMA_TestMode 0x00002000 /* 1:Test Mode */
182 #define DMA_PowrMgmnt 0x00001000 /* 1:Power Management */
183 #define DMA_DmBurst_Mask 0x000001fc /* DMA Burst size */
185 /* RxFragSize bit asign ---------------------------------------------------- */
186 #define RxFrag_EnPack 0x00008000 /* 1:Enable Packing */
187 #define RxFrag_MinFragMask 0x00000ffc /* Minimum Fragment */
189 /* MAC_Ctl bit asign ------------------------------------------------------- */
190 #define MAC_Link10 0x00008000 /* 1:Link Status 10Mbits */
191 #define MAC_EnMissRoll 0x00002000 /* 1:Enable Missed Roll */
192 #define MAC_MissRoll 0x00000400 /* 1:Missed Roll */
193 #define MAC_Loop10 0x00000080 /* 1:Loop 10 Mbps */
194 #define MAC_Conn_Auto 0x00000000 /*00:Connection mode (Automatic) */
195 #define MAC_Conn_10M 0x00000020 /*01: (10Mbps endec)*/
196 #define MAC_Conn_Mll 0x00000040 /*10: (Mll clock) */
197 #define MAC_MacLoop 0x00000010 /* 1:MAC Loopback */
198 #define MAC_FullDup 0x00000008 /* 1:Full Duplex 0:Half Duplex */
199 #define MAC_Reset 0x00000004 /* 1:Software Reset */
200 #define MAC_HaltImm 0x00000002 /* 1:Halt Immediate */
201 #define MAC_HaltReq 0x00000001 /* 1:Halt request */
203 /* PROM_Ctl bit asign ------------------------------------------------------ */
204 #define PROM_Busy 0x00008000 /* 1:Busy (Start Operation) */
205 #define PROM_Read 0x00004000 /*10:Read operation */
206 #define PROM_Write 0x00002000 /*01:Write operation */
207 #define PROM_Erase 0x00006000 /*11:Erase operation */
208 /*00:Enable or Disable Writting, */
209 /* as specified in PROM_Addr. */
210 #define PROM_Addr_Ena 0x00000030 /*11xxxx:PROM Write enable */
213 /* CAM_Ctl bit asign ------------------------------------------------------- */
214 #define CAM_CompEn 0x00000010 /* 1:CAM Compare Enable */
215 #define CAM_NegCAM 0x00000008 /* 1:Reject packets CAM recognizes,*/
217 #define CAM_BroadAcc 0x00000004 /* 1:Broadcast assept */
218 #define CAM_GroupAcc 0x00000002 /* 1:Multicast assept */
219 #define CAM_StationAcc 0x00000001 /* 1:unicast accept */
221 /* CAM_Ena bit asign ------------------------------------------------------- */
222 #define CAM_ENTRY_MAX 21 /* CAM Data entry max count */
223 #define CAM_Ena_Mask ((1<<CAM_ENTRY_MAX)-1) /* CAM Enable bits (Max 21bits) */
224 #define CAM_Ena_Bit(index) (1<<(index))
225 #define CAM_ENTRY_DESTINATION 0
226 #define CAM_ENTRY_SOURCE 1
227 #define CAM_ENTRY_MACCTL 20
229 /* Tx_Ctl bit asign -------------------------------------------------------- */
230 #define Tx_En 0x00000001 /* 1:Transmit enable */
231 #define Tx_TxHalt 0x00000002 /* 1:Transmit Halt Request */
232 #define Tx_NoPad 0x00000004 /* 1:Suppress Padding */
233 #define Tx_NoCRC 0x00000008 /* 1:Suppress Padding */
234 #define Tx_FBack 0x00000010 /* 1:Fast Back-off */
235 #define Tx_EnUnder 0x00000100 /* 1:Enable Underrun */
236 #define Tx_EnExDefer 0x00000200 /* 1:Enable Excessive Deferral */
237 #define Tx_EnLCarr 0x00000400 /* 1:Enable Lost Carrier */
238 #define Tx_EnExColl 0x00000800 /* 1:Enable Excessive Collision */
239 #define Tx_EnLateColl 0x00001000 /* 1:Enable Late Collision */
240 #define Tx_EnTxPar 0x00002000 /* 1:Enable Transmit Parity */
241 #define Tx_EnComp 0x00004000 /* 1:Enable Completion */
243 /* Tx_Stat bit asign ------------------------------------------------------- */
244 #define Tx_TxColl_MASK 0x0000000F /* Tx Collision Count */
245 #define Tx_ExColl 0x00000010 /* Excessive Collision */
246 #define Tx_TXDefer 0x00000020 /* Transmit Defered */
247 #define Tx_Paused 0x00000040 /* Transmit Paused */
248 #define Tx_IntTx 0x00000080 /* Interrupt on Tx */
249 #define Tx_Under 0x00000100 /* Underrun */
250 #define Tx_Defer 0x00000200 /* Deferral */
251 #define Tx_NCarr 0x00000400 /* No Carrier */
252 #define Tx_10Stat 0x00000800 /* 10Mbps Status */
253 #define Tx_LateColl 0x00001000 /* Late Collision */
254 #define Tx_TxPar 0x00002000 /* Tx Parity Error */
255 #define Tx_Comp 0x00004000 /* Completion */
256 #define Tx_Halted 0x00008000 /* Tx Halted */
257 #define Tx_SQErr 0x00010000 /* Signal Quality Error(SQE) */
259 /* Rx_Ctl bit asign -------------------------------------------------------- */
260 #define Rx_EnGood 0x00004000 /* 1:Enable Good */
261 #define Rx_EnRxPar 0x00002000 /* 1:Enable Receive Parity */
262 #define Rx_EnLongErr 0x00000800 /* 1:Enable Long Error */
263 #define Rx_EnOver 0x00000400 /* 1:Enable OverFlow */
264 #define Rx_EnCRCErr 0x00000200 /* 1:Enable CRC Error */
265 #define Rx_EnAlign 0x00000100 /* 1:Enable Alignment */
266 #define Rx_IgnoreCRC 0x00000040 /* 1:Ignore CRC Value */
267 #define Rx_StripCRC 0x00000010 /* 1:Strip CRC Value */
268 #define Rx_ShortEn 0x00000008 /* 1:Short Enable */
269 #define Rx_LongEn 0x00000004 /* 1:Long Enable */
270 #define Rx_RxHalt 0x00000002 /* 1:Receive Halt Request */
271 #define Rx_RxEn 0x00000001 /* 1:Receive Intrrupt Enable */
273 /* Rx_Stat bit asign ------------------------------------------------------- */
274 #define Rx_Halted 0x00008000 /* Rx Halted */
275 #define Rx_Good 0x00004000 /* Rx Good */
276 #define Rx_RxPar 0x00002000 /* Rx Parity Error */
277 /* 0x00001000 not use */
278 #define Rx_LongErr 0x00000800 /* Rx Long Error */
279 #define Rx_Over 0x00000400 /* Rx Overflow */
280 #define Rx_CRCErr 0x00000200 /* Rx CRC Error */
281 #define Rx_Align 0x00000100 /* Rx Alignment Error */
282 #define Rx_10Stat 0x00000080 /* Rx 10Mbps Status */
283 #define Rx_IntRx 0x00000040 /* Rx Interrupt */
284 #define Rx_CtlRecd 0x00000020 /* Rx Control Receive */
286 #define Rx_Stat_Mask 0x0000EFC0 /* Rx All Status Mask */
288 /* Int_En bit asign -------------------------------------------------------- */
289 #define Int_NRAbtEn 0x00000800 /* 1:Non-recoverable Abort Enable */
290 #define Int_TxCtlCmpEn 0x00000400 /* 1:Transmit Control Complete Enable */
291 #define Int_DmParErrEn 0x00000200 /* 1:DMA Parity Error Enable */
292 #define Int_DParDEn 0x00000100 /* 1:Data Parity Error Enable */
293 #define Int_EarNotEn 0x00000080 /* 1:Early Notify Enable */
294 #define Int_DParErrEn 0x00000040 /* 1:Detected Parity Error Enable */
295 #define Int_SSysErrEn 0x00000020 /* 1:Signalled System Error Enable */
296 #define Int_RMasAbtEn 0x00000010 /* 1:Received Master Abort Enable */
297 #define Int_RTargAbtEn 0x00000008 /* 1:Received Target Abort Enable */
298 #define Int_STargAbtEn 0x00000004 /* 1:Signalled Target Abort Enable */
299 #define Int_BLExEn 0x00000002 /* 1:Buffer List Exhausted Enable */
300 #define Int_FDAExEn 0x00000001 /* 1:Free Descriptor Area */
301 /* Exhausted Enable */
303 /* Int_Src bit asign ------------------------------------------------------- */
304 #define Int_NRabt 0x00004000 /* 1:Non Recoverable error */
305 #define Int_DmParErrStat 0x00002000 /* 1:DMA Parity Error & Clear */
306 #define Int_BLEx 0x00001000 /* 1:Buffer List Empty & Clear */
307 #define Int_FDAEx 0x00000800 /* 1:FDA Empty & Clear */
308 #define Int_IntNRAbt 0x00000400 /* 1:Non Recoverable Abort */
309 #define Int_IntCmp 0x00000200 /* 1:MAC control packet complete */
310 #define Int_IntExBD 0x00000100 /* 1:Interrupt Extra BD & Clear */
311 #define Int_DmParErr 0x00000080 /* 1:DMA Parity Error & Clear */
312 #define Int_IntEarNot 0x00000040 /* 1:Receive Data write & Clear */
313 #define Int_SWInt 0x00000020 /* 1:Software request & Clear */
314 #define Int_IntBLEx 0x00000010 /* 1:Buffer List Empty & Clear */
315 #define Int_IntFDAEx 0x00000008 /* 1:FDA Empty & Clear */
316 #define Int_IntPCI 0x00000004 /* 1:PCI controller & Clear */
317 #define Int_IntMacRx 0x00000002 /* 1:Rx controller & Clear */
318 #define Int_IntMacTx 0x00000001 /* 1:Tx controller & Clear */
320 /* MD_CA bit asign --------------------------------------------------------- */
321 #define MD_CA_PreSup 0x00001000 /* 1:Preamble Supress */
322 #define MD_CA_Busy 0x00000800 /* 1:Busy (Start Operation) */
323 #define MD_CA_Wr 0x00000400 /* 1:Write 0:Read */
330 /* Frame descripter */
332 volatile __u32 FDNext;
333 volatile __u32 FDSystem;
334 volatile __u32 FDStat;
335 volatile __u32 FDCtl;
338 /* Buffer descripter */
340 volatile __u32 BuffData;
341 volatile __u32 BDCtl;
346 /* Frame Descripter bit asign ---------------------------------------------- */
347 #define FD_FDLength_MASK 0x0000FFFF /* Length MASK */
348 #define FD_BDCnt_MASK 0x001F0000 /* BD count MASK in FD */
349 #define FD_FrmOpt_MASK 0x7C000000 /* Frame option MASK */
350 #define FD_FrmOpt_BigEndian 0x40000000 /* Tx/Rx */
351 #define FD_FrmOpt_IntTx 0x20000000 /* Tx only */
352 #define FD_FrmOpt_NoCRC 0x10000000 /* Tx only */
353 #define FD_FrmOpt_NoPadding 0x08000000 /* Tx only */
354 #define FD_FrmOpt_Packing 0x04000000 /* Rx only */
355 #define FD_CownsFD 0x80000000 /* FD Controller owner bit */
356 #define FD_Next_EOL 0x00000001 /* FD EOL indicator */
357 #define FD_BDCnt_SHIFT 16
359 /* Buffer Descripter bit asign --------------------------------------------- */
360 #define BD_BuffLength_MASK 0x0000FFFF /* Recieve Data Size */
361 #define BD_RxBDID_MASK 0x00FF0000 /* BD ID Number MASK */
362 #define BD_RxBDSeqN_MASK 0x7F000000 /* Rx BD Sequence Number */
363 #define BD_CownsBD 0x80000000 /* BD Controller owner bit */
364 #define BD_RxBDID_SHIFT 16
365 #define BD_RxBDSeqN_SHIFT 24
368 /* Some useful constants. */
369 #undef NO_CHECK_CARRIER /* Does not check No-Carrier with TP */
371 #ifdef NO_CHECK_CARRIER
372 #define TX_CTL_CMD (Tx_EnComp | Tx_EnTxPar | Tx_EnLateColl | \
373 Tx_EnExColl | Tx_EnExDefer | Tx_EnUnder | \
374 Tx_En) /* maybe 0x7b01 */
376 #define TX_CTL_CMD (Tx_EnComp | Tx_EnTxPar | Tx_EnLateColl | \
377 Tx_EnExColl | Tx_EnLCarr | Tx_EnExDefer | Tx_EnUnder | \
378 Tx_En) /* maybe 0x7b01 */
380 #define RX_CTL_CMD (Rx_EnGood | Rx_EnRxPar | Rx_EnLongErr | Rx_EnOver \
381 | Rx_EnCRCErr | Rx_EnAlign | Rx_RxEn) /* maybe 0x6f01 */
382 #define INT_EN_CMD (Int_NRAbtEn | \
383 Int_DmParErrEn | Int_DParDEn | Int_DParErrEn | \
384 Int_SSysErrEn | Int_RMasAbtEn | Int_RTargAbtEn | \
386 Int_BLExEn | Int_FDAExEn) /* maybe 0xb7f*/
387 #define DMA_CTL_CMD DMA_BURST_SIZE
388 #define HAVE_DMA_RXALIGN(lp) likely((lp)->boardtype != TC35815CF)
390 /* Tuning parameters */
391 #define DMA_BURST_SIZE 32
392 #define TX_THRESHOLD 1024
393 #define TX_THRESHOLD_MAX 1536 /* used threshold with packet max byte for low pci transfer ability.*/
394 #define TX_THRESHOLD_KEEP_LIMIT 10 /* setting threshold max value when overrun error occured this count. */
396 /* 16 + RX_BUF_NUM * 8 + RX_FD_NUM * 16 + TX_FD_NUM * 32 <= PAGE_SIZE*FD_PAGE_NUM */
397 #ifdef TC35815_USE_PACKEDBUFFER
398 #define FD_PAGE_NUM 2
399 #define RX_BUF_NUM 8 /* >= 2 */
400 #define RX_FD_NUM 250 /* >= 32 */
401 #define TX_FD_NUM 128
402 #define RX_BUF_SIZE PAGE_SIZE
403 #else /* TC35815_USE_PACKEDBUFFER */
404 #define FD_PAGE_NUM 4
405 #define RX_BUF_NUM 128 /* < 256 */
406 #define RX_FD_NUM 256 /* >= 32 */
407 #define TX_FD_NUM 128
408 #if RX_CTL_CMD & Rx_LongEn
409 #define RX_BUF_SIZE PAGE_SIZE
410 #elif RX_CTL_CMD & Rx_StripCRC
411 #define RX_BUF_SIZE ALIGN(ETH_FRAME_LEN + 4 + 2, 32) /* +2: reserve */
413 #define RX_BUF_SIZE ALIGN(ETH_FRAME_LEN + 2, 32) /* +2: reserve */
415 #endif /* TC35815_USE_PACKEDBUFFER */
416 #define RX_FD_RESERVE (2 / 2) /* max 2 BD per RxFD */
417 #define NAPI_WEIGHT 16
427 struct BDesc bd[0]; /* variable length */
432 struct BDesc bd[RX_BUF_NUM];
436 #define tc_readl(addr) readl(addr)
437 #define tc_writel(d, addr) writel(d, addr)
439 #define TC35815_TX_TIMEOUT msecs_to_jiffies(400)
441 /* Timer state engine. */
442 enum tc35815_timer_state {
443 arbwait = 0, /* Waiting for auto negotiation to complete. */
444 lupwait = 1, /* Auto-neg complete, awaiting link-up status. */
445 ltrywait = 2, /* Forcing try of all modes, from fastest to slowest. */
446 asleep = 3, /* Time inactive. */
447 lcheck = 4, /* Check link status. */
450 /* Information that need to be kept for each board. */
451 struct tc35815_local {
452 struct pci_dev *pci_dev;
455 struct net_device_stats stats;
463 /* Tx control lock. This protects the transmit buffer ring
464 * state along with the "tx full" state of the driver. This
465 * means all netif_queue flow control actions are protected
466 * by this lock as well.
472 unsigned short saved_lpa;
473 struct timer_list timer;
474 enum tc35815_timer_state timer_state; /* State of auto-neg timer. */
475 unsigned int timer_ticks; /* Number of clicks at each state */
478 * Transmitting: Batch Mode.
480 * Receiving: Packing Mode. (TC35815_USE_PACKEDBUFFER)
481 * 1 circular FD for Free Buffer List.
482 * RX_BUF_NUM BD in Free Buffer FD.
483 * One Free Buffer BD has PAGE_SIZE data buffer.
484 * Or Non-Packing Mode.
485 * 1 circular FD for Free Buffer List.
486 * RX_BUF_NUM BD in Free Buffer FD.
487 * One Free Buffer BD has ETH_FRAME_LEN data buffer.
489 void * fd_buf; /* for TxFD, RxFD, FrFD */
490 dma_addr_t fd_buf_dma;
491 struct TxFD *tfd_base;
492 unsigned int tfd_start;
493 unsigned int tfd_end;
494 struct RxFD *rfd_base;
495 struct RxFD *rfd_limit;
496 struct RxFD *rfd_cur;
497 struct FrFD *fbl_ptr;
498 #ifdef TC35815_USE_PACKEDBUFFER
499 unsigned char fbl_curid;
500 void * data_buf[RX_BUF_NUM]; /* packing */
501 dma_addr_t data_buf_dma[RX_BUF_NUM];
505 } tx_skbs[TX_FD_NUM];
507 unsigned int fbl_count;
511 } tx_skbs[TX_FD_NUM], rx_skbs[RX_BUF_NUM];
513 struct mii_if_info mii;
514 unsigned short mii_id[2];
519 static inline dma_addr_t fd_virt_to_bus(struct tc35815_local *lp, void *virt)
521 return lp->fd_buf_dma + ((u8 *)virt - (u8 *)lp->fd_buf);
524 static inline void *fd_bus_to_virt(struct tc35815_local *lp, dma_addr_t bus)
526 return (void *)((u8 *)lp->fd_buf + (bus - lp->fd_buf_dma));
529 #ifdef TC35815_USE_PACKEDBUFFER
530 static inline void *rxbuf_bus_to_virt(struct tc35815_local *lp, dma_addr_t bus)
533 for (i = 0; i < RX_BUF_NUM; i++) {
534 if (bus >= lp->data_buf_dma[i] &&
535 bus < lp->data_buf_dma[i] + PAGE_SIZE)
536 return (void *)((u8 *)lp->data_buf[i] +
537 (bus - lp->data_buf_dma[i]));
542 #define TC35815_DMA_SYNC_ONDEMAND
543 static void* alloc_rxbuf_page(struct pci_dev *hwdev, dma_addr_t *dma_handle)
545 #ifdef TC35815_DMA_SYNC_ONDEMAND
547 /* pci_map + pci_dma_sync will be more effective than
548 * pci_alloc_consistent on some archs. */
549 if ((buf = (void *)__get_free_page(GFP_ATOMIC)) == NULL)
551 *dma_handle = pci_map_single(hwdev, buf, PAGE_SIZE,
553 if (pci_dma_mapping_error(*dma_handle)) {
554 free_page((unsigned long)buf);
559 return pci_alloc_consistent(hwdev, PAGE_SIZE, dma_handle);
563 static void free_rxbuf_page(struct pci_dev *hwdev, void *buf, dma_addr_t dma_handle)
565 #ifdef TC35815_DMA_SYNC_ONDEMAND
566 pci_unmap_single(hwdev, dma_handle, PAGE_SIZE, PCI_DMA_FROMDEVICE);
567 free_page((unsigned long)buf);
569 pci_free_consistent(hwdev, PAGE_SIZE, buf, dma_handle);
572 #else /* TC35815_USE_PACKEDBUFFER */
573 static struct sk_buff *alloc_rxbuf_skb(struct net_device *dev,
574 struct pci_dev *hwdev,
575 dma_addr_t *dma_handle)
578 skb = dev_alloc_skb(RX_BUF_SIZE);
582 *dma_handle = pci_map_single(hwdev, skb->data, RX_BUF_SIZE,
584 if (pci_dma_mapping_error(*dma_handle)) {
585 dev_kfree_skb_any(skb);
588 skb_reserve(skb, 2); /* make IP header 4byte aligned */
592 static void free_rxbuf_skb(struct pci_dev *hwdev, struct sk_buff *skb, dma_addr_t dma_handle)
594 pci_unmap_single(hwdev, dma_handle, RX_BUF_SIZE,
596 dev_kfree_skb_any(skb);
598 #endif /* TC35815_USE_PACKEDBUFFER */
600 /* Index to functions, as function prototypes. */
602 static int tc35815_open(struct net_device *dev);
603 static int tc35815_send_packet(struct sk_buff *skb, struct net_device *dev);
604 static irqreturn_t tc35815_interrupt(int irq, void *dev_id);
606 static int tc35815_rx(struct net_device *dev, int limit);
607 static int tc35815_poll(struct net_device *dev, int *budget);
609 static void tc35815_rx(struct net_device *dev);
611 static void tc35815_txdone(struct net_device *dev);
612 static int tc35815_close(struct net_device *dev);
613 static struct net_device_stats *tc35815_get_stats(struct net_device *dev);
614 static void tc35815_set_multicast_list(struct net_device *dev);
615 static void tc35815_tx_timeout(struct net_device *dev);
616 static int tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
617 #ifdef CONFIG_NET_POLL_CONTROLLER
618 static void tc35815_poll_controller(struct net_device *dev);
620 static const struct ethtool_ops tc35815_ethtool_ops;
622 /* Example routines you must write ;->. */
623 static void tc35815_chip_reset(struct net_device *dev);
624 static void tc35815_chip_init(struct net_device *dev);
625 static void tc35815_find_phy(struct net_device *dev);
626 static void tc35815_phy_chip_init(struct net_device *dev);
629 static void panic_queues(struct net_device *dev);
632 static void tc35815_timer(unsigned long data);
633 static void tc35815_start_auto_negotiation(struct net_device *dev,
634 struct ethtool_cmd *ep);
635 static int tc_mdio_read(struct net_device *dev, int phy_id, int location);
636 static void tc_mdio_write(struct net_device *dev, int phy_id, int location,
639 static void __devinit tc35815_init_dev_addr (struct net_device *dev)
641 struct tc35815_regs __iomem *tr =
642 (struct tc35815_regs __iomem *)dev->base_addr;
645 /* dev_addr will be overwritten on NETDEV_REGISTER event */
646 while (tc_readl(&tr->PROM_Ctl) & PROM_Busy)
648 for (i = 0; i < 6; i += 2) {
650 tc_writel(PROM_Busy | PROM_Read | (i / 2 + 2), &tr->PROM_Ctl);
651 while (tc_readl(&tr->PROM_Ctl) & PROM_Busy)
653 data = tc_readl(&tr->PROM_Data);
654 dev->dev_addr[i] = data & 0xff;
655 dev->dev_addr[i+1] = data >> 8;
659 static int __devinit tc35815_init_one (struct pci_dev *pdev,
660 const struct pci_device_id *ent)
662 void __iomem *ioaddr = NULL;
663 struct net_device *dev;
664 struct tc35815_local *lp;
666 unsigned long mmio_start, mmio_end, mmio_flags, mmio_len;
668 static int printed_version;
669 if (!printed_version++) {
671 dev_printk(KERN_DEBUG, &pdev->dev,
672 "speed:%d duplex:%d doforce:%d\n",
673 options.speed, options.duplex, options.doforce);
677 dev_warn(&pdev->dev, "no IRQ assigned.\n");
681 /* dev zeroed in alloc_etherdev */
682 dev = alloc_etherdev (sizeof (*lp));
684 dev_err(&pdev->dev, "unable to alloc new ethernet\n");
687 SET_MODULE_OWNER(dev);
688 SET_NETDEV_DEV(dev, &pdev->dev);
691 /* enable device (incl. PCI PM wakeup), and bus-mastering */
692 rc = pci_enable_device (pdev);
696 mmio_start = pci_resource_start (pdev, 1);
697 mmio_end = pci_resource_end (pdev, 1);
698 mmio_flags = pci_resource_flags (pdev, 1);
699 mmio_len = pci_resource_len (pdev, 1);
701 /* set this immediately, we need to know before
702 * we talk to the chip directly */
704 /* make sure PCI base addr 1 is MMIO */
705 if (!(mmio_flags & IORESOURCE_MEM)) {
706 dev_err(&pdev->dev, "region #1 not an MMIO resource, aborting\n");
711 /* check for weird/broken PCI region reporting */
712 if ((mmio_len < sizeof(struct tc35815_regs))) {
713 dev_err(&pdev->dev, "Invalid PCI region size(s), aborting\n");
718 rc = pci_request_regions (pdev, MODNAME);
722 pci_set_master (pdev);
724 /* ioremap MMIO region */
725 ioaddr = ioremap (mmio_start, mmio_len);
726 if (ioaddr == NULL) {
727 dev_err(&pdev->dev, "cannot remap MMIO, aborting\n");
729 goto err_out_free_res;
732 /* Initialize the device structure. */
733 dev->open = tc35815_open;
734 dev->hard_start_xmit = tc35815_send_packet;
735 dev->stop = tc35815_close;
736 dev->get_stats = tc35815_get_stats;
737 dev->set_multicast_list = tc35815_set_multicast_list;
738 dev->do_ioctl = tc35815_ioctl;
739 dev->ethtool_ops = &tc35815_ethtool_ops;
740 dev->tx_timeout = tc35815_tx_timeout;
741 dev->watchdog_timeo = TC35815_TX_TIMEOUT;
743 dev->poll = tc35815_poll;
744 dev->weight = NAPI_WEIGHT;
746 #ifdef CONFIG_NET_POLL_CONTROLLER
747 dev->poll_controller = tc35815_poll_controller;
750 dev->irq = pdev->irq;
751 dev->base_addr = (unsigned long) ioaddr;
753 /* dev->priv/lp zeroed and aligned in alloc_etherdev */
755 spin_lock_init(&lp->lock);
757 lp->boardtype = ent->driver_data;
759 lp->msg_enable = NETIF_MSG_TX_ERR | NETIF_MSG_HW | NETIF_MSG_DRV | NETIF_MSG_LINK;
760 pci_set_drvdata(pdev, dev);
762 /* Soft reset the chip. */
763 tc35815_chip_reset(dev);
765 /* Retrieve the ethernet address. */
766 tc35815_init_dev_addr(dev);
768 rc = register_netdev (dev);
772 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
773 printk(KERN_INFO "%s: %s at 0x%lx, "
774 "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
777 board_info[ent->driver_data].name,
779 dev->dev_addr[0], dev->dev_addr[1],
780 dev->dev_addr[2], dev->dev_addr[3],
781 dev->dev_addr[4], dev->dev_addr[5],
784 setup_timer(&lp->timer, tc35815_timer, (unsigned long) dev);
786 lp->mii.mdio_read = tc_mdio_read;
787 lp->mii.mdio_write = tc_mdio_write;
788 lp->mii.phy_id_mask = 0x1f;
789 lp->mii.reg_num_mask = 0x1f;
790 tc35815_find_phy(dev);
791 lp->mii.phy_id = lp->phy_addr;
792 lp->mii.full_duplex = 0;
793 lp->mii.force_media = 0;
800 pci_release_regions (pdev);
807 static void __devexit tc35815_remove_one (struct pci_dev *pdev)
809 struct net_device *dev = pci_get_drvdata (pdev);
810 unsigned long mmio_addr;
812 mmio_addr = dev->base_addr;
814 unregister_netdev (dev);
817 iounmap ((void __iomem *)mmio_addr);
818 pci_release_regions (pdev);
823 pci_set_drvdata (pdev, NULL);
827 tc35815_init_queues(struct net_device *dev)
829 struct tc35815_local *lp = dev->priv;
831 unsigned long fd_addr;
834 BUG_ON(sizeof(struct FDesc) +
835 sizeof(struct BDesc) * RX_BUF_NUM +
836 sizeof(struct FDesc) * RX_FD_NUM +
837 sizeof(struct TxFD) * TX_FD_NUM >
838 PAGE_SIZE * FD_PAGE_NUM);
840 if ((lp->fd_buf = pci_alloc_consistent(lp->pci_dev, PAGE_SIZE * FD_PAGE_NUM, &lp->fd_buf_dma)) == 0)
842 for (i = 0; i < RX_BUF_NUM; i++) {
843 #ifdef TC35815_USE_PACKEDBUFFER
844 if ((lp->data_buf[i] = alloc_rxbuf_page(lp->pci_dev, &lp->data_buf_dma[i])) == NULL) {
846 free_rxbuf_page(lp->pci_dev,
848 lp->data_buf_dma[i]);
849 lp->data_buf[i] = NULL;
851 pci_free_consistent(lp->pci_dev,
852 PAGE_SIZE * FD_PAGE_NUM,
860 alloc_rxbuf_skb(dev, lp->pci_dev,
861 &lp->rx_skbs[i].skb_dma);
862 if (!lp->rx_skbs[i].skb) {
864 free_rxbuf_skb(lp->pci_dev,
866 lp->rx_skbs[i].skb_dma);
867 lp->rx_skbs[i].skb = NULL;
869 pci_free_consistent(lp->pci_dev,
870 PAGE_SIZE * FD_PAGE_NUM,
878 printk(KERN_DEBUG "%s: FD buf %p DataBuf",
879 dev->name, lp->fd_buf);
880 #ifdef TC35815_USE_PACKEDBUFFER
882 for (i = 0; i < RX_BUF_NUM; i++)
883 printk(" %p", lp->data_buf[i]);
887 for (i = 0; i < FD_PAGE_NUM; i++) {
888 clear_page((void *)((unsigned long)lp->fd_buf + i * PAGE_SIZE));
891 fd_addr = (unsigned long)lp->fd_buf;
893 /* Free Descriptors (for Receive) */
894 lp->rfd_base = (struct RxFD *)fd_addr;
895 fd_addr += sizeof(struct RxFD) * RX_FD_NUM;
896 for (i = 0; i < RX_FD_NUM; i++) {
897 lp->rfd_base[i].fd.FDCtl = cpu_to_le32(FD_CownsFD);
899 lp->rfd_cur = lp->rfd_base;
900 lp->rfd_limit = (struct RxFD *)fd_addr - (RX_FD_RESERVE + 1);
902 /* Transmit Descriptors */
903 lp->tfd_base = (struct TxFD *)fd_addr;
904 fd_addr += sizeof(struct TxFD) * TX_FD_NUM;
905 for (i = 0; i < TX_FD_NUM; i++) {
906 lp->tfd_base[i].fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, &lp->tfd_base[i+1]));
907 lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
908 lp->tfd_base[i].fd.FDCtl = cpu_to_le32(0);
910 lp->tfd_base[TX_FD_NUM-1].fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, &lp->tfd_base[0]));
914 /* Buffer List (for Receive) */
915 lp->fbl_ptr = (struct FrFD *)fd_addr;
916 lp->fbl_ptr->fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, lp->fbl_ptr));
917 lp->fbl_ptr->fd.FDCtl = cpu_to_le32(RX_BUF_NUM | FD_CownsFD);
918 #ifndef TC35815_USE_PACKEDBUFFER
920 * move all allocated skbs to head of rx_skbs[] array.
921 * fbl_count mighe not be RX_BUF_NUM if alloc_rxbuf_skb() in
922 * tc35815_rx() had failed.
925 for (i = 0; i < RX_BUF_NUM; i++) {
926 if (lp->rx_skbs[i].skb) {
927 if (i != lp->fbl_count) {
928 lp->rx_skbs[lp->fbl_count].skb =
930 lp->rx_skbs[lp->fbl_count].skb_dma =
931 lp->rx_skbs[i].skb_dma;
937 for (i = 0; i < RX_BUF_NUM; i++) {
938 #ifdef TC35815_USE_PACKEDBUFFER
939 lp->fbl_ptr->bd[i].BuffData = cpu_to_le32(lp->data_buf_dma[i]);
941 if (i >= lp->fbl_count) {
942 lp->fbl_ptr->bd[i].BuffData = 0;
943 lp->fbl_ptr->bd[i].BDCtl = 0;
946 lp->fbl_ptr->bd[i].BuffData =
947 cpu_to_le32(lp->rx_skbs[i].skb_dma);
949 /* BDID is index of FrFD.bd[] */
950 lp->fbl_ptr->bd[i].BDCtl =
951 cpu_to_le32(BD_CownsBD | (i << BD_RxBDID_SHIFT) |
954 #ifdef TC35815_USE_PACKEDBUFFER
958 printk(KERN_DEBUG "%s: TxFD %p RxFD %p FrFD %p\n",
959 dev->name, lp->tfd_base, lp->rfd_base, lp->fbl_ptr);
964 tc35815_clear_queues(struct net_device *dev)
966 struct tc35815_local *lp = dev->priv;
969 for (i = 0; i < TX_FD_NUM; i++) {
970 u32 fdsystem = le32_to_cpu(lp->tfd_base[i].fd.FDSystem);
971 struct sk_buff *skb =
972 fdsystem != 0xffffffff ?
973 lp->tx_skbs[fdsystem].skb : NULL;
975 if (lp->tx_skbs[i].skb != skb) {
976 printk("%s: tx_skbs mismatch(%d).\n", dev->name, i);
980 BUG_ON(lp->tx_skbs[i].skb != skb);
983 pci_unmap_single(lp->pci_dev, lp->tx_skbs[i].skb_dma, skb->len, PCI_DMA_TODEVICE);
984 lp->tx_skbs[i].skb = NULL;
985 lp->tx_skbs[i].skb_dma = 0;
986 dev_kfree_skb_any(skb);
988 lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
991 tc35815_init_queues(dev);
995 tc35815_free_queues(struct net_device *dev)
997 struct tc35815_local *lp = dev->priv;
1001 for (i = 0; i < TX_FD_NUM; i++) {
1002 u32 fdsystem = le32_to_cpu(lp->tfd_base[i].fd.FDSystem);
1003 struct sk_buff *skb =
1004 fdsystem != 0xffffffff ?
1005 lp->tx_skbs[fdsystem].skb : NULL;
1007 if (lp->tx_skbs[i].skb != skb) {
1008 printk("%s: tx_skbs mismatch(%d).\n", dev->name, i);
1012 BUG_ON(lp->tx_skbs[i].skb != skb);
1016 pci_unmap_single(lp->pci_dev, lp->tx_skbs[i].skb_dma, skb->len, PCI_DMA_TODEVICE);
1017 lp->tx_skbs[i].skb = NULL;
1018 lp->tx_skbs[i].skb_dma = 0;
1020 lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
1024 lp->rfd_base = NULL;
1025 lp->rfd_limit = NULL;
1029 for (i = 0; i < RX_BUF_NUM; i++) {
1030 #ifdef TC35815_USE_PACKEDBUFFER
1031 if (lp->data_buf[i]) {
1032 free_rxbuf_page(lp->pci_dev,
1033 lp->data_buf[i], lp->data_buf_dma[i]);
1034 lp->data_buf[i] = NULL;
1037 if (lp->rx_skbs[i].skb) {
1038 free_rxbuf_skb(lp->pci_dev, lp->rx_skbs[i].skb,
1039 lp->rx_skbs[i].skb_dma);
1040 lp->rx_skbs[i].skb = NULL;
1045 pci_free_consistent(lp->pci_dev, PAGE_SIZE * FD_PAGE_NUM,
1046 lp->fd_buf, lp->fd_buf_dma);
1052 dump_txfd(struct TxFD *fd)
1054 printk("TxFD(%p): %08x %08x %08x %08x\n", fd,
1055 le32_to_cpu(fd->fd.FDNext),
1056 le32_to_cpu(fd->fd.FDSystem),
1057 le32_to_cpu(fd->fd.FDStat),
1058 le32_to_cpu(fd->fd.FDCtl));
1060 printk(" %08x %08x",
1061 le32_to_cpu(fd->bd.BuffData),
1062 le32_to_cpu(fd->bd.BDCtl));
1067 dump_rxfd(struct RxFD *fd)
1069 int i, bd_count = (le32_to_cpu(fd->fd.FDCtl) & FD_BDCnt_MASK) >> FD_BDCnt_SHIFT;
1072 printk("RxFD(%p): %08x %08x %08x %08x\n", fd,
1073 le32_to_cpu(fd->fd.FDNext),
1074 le32_to_cpu(fd->fd.FDSystem),
1075 le32_to_cpu(fd->fd.FDStat),
1076 le32_to_cpu(fd->fd.FDCtl));
1077 if (le32_to_cpu(fd->fd.FDCtl) & FD_CownsFD)
1080 for (i = 0; i < bd_count; i++)
1081 printk(" %08x %08x",
1082 le32_to_cpu(fd->bd[i].BuffData),
1083 le32_to_cpu(fd->bd[i].BDCtl));
1088 #if defined(DEBUG) || defined(TC35815_USE_PACKEDBUFFER)
1090 dump_frfd(struct FrFD *fd)
1093 printk("FrFD(%p): %08x %08x %08x %08x\n", fd,
1094 le32_to_cpu(fd->fd.FDNext),
1095 le32_to_cpu(fd->fd.FDSystem),
1096 le32_to_cpu(fd->fd.FDStat),
1097 le32_to_cpu(fd->fd.FDCtl));
1099 for (i = 0; i < RX_BUF_NUM; i++)
1100 printk(" %08x %08x",
1101 le32_to_cpu(fd->bd[i].BuffData),
1102 le32_to_cpu(fd->bd[i].BDCtl));
1109 panic_queues(struct net_device *dev)
1111 struct tc35815_local *lp = dev->priv;
1114 printk("TxFD base %p, start %u, end %u\n",
1115 lp->tfd_base, lp->tfd_start, lp->tfd_end);
1116 printk("RxFD base %p limit %p cur %p\n",
1117 lp->rfd_base, lp->rfd_limit, lp->rfd_cur);
1118 printk("FrFD %p\n", lp->fbl_ptr);
1119 for (i = 0; i < TX_FD_NUM; i++)
1120 dump_txfd(&lp->tfd_base[i]);
1121 for (i = 0; i < RX_FD_NUM; i++) {
1122 int bd_count = dump_rxfd(&lp->rfd_base[i]);
1123 i += (bd_count + 1) / 2; /* skip BDs */
1125 dump_frfd(lp->fbl_ptr);
1126 panic("%s: Illegal queue state.", dev->name);
1130 static void print_eth(char *add)
1134 printk("print_eth(%p)\n", add);
1135 for (i = 0; i < 6; i++)
1136 printk(" %2.2X", (unsigned char) add[i + 6]);
1138 for (i = 0; i < 6; i++)
1139 printk(" %2.2X", (unsigned char) add[i]);
1140 printk(" : %2.2X%2.2X\n", (unsigned char) add[12], (unsigned char) add[13]);
1143 static int tc35815_tx_full(struct net_device *dev)
1145 struct tc35815_local *lp = dev->priv;
1146 return ((lp->tfd_start + 1) % TX_FD_NUM == lp->tfd_end);
1149 static void tc35815_restart(struct net_device *dev)
1151 struct tc35815_local *lp = dev->priv;
1152 int pid = lp->phy_addr;
1153 int do_phy_reset = 1;
1154 del_timer(&lp->timer); /* Kill if running */
1156 if (lp->mii_id[0] == 0x0016 && (lp->mii_id[1] & 0xfc00) == 0xf800) {
1157 /* Resetting PHY cause problem on some chip... (SEEQ 80221) */
1162 tc_mdio_write(dev, pid, MII_BMCR, BMCR_RESET);
1165 if (!(tc_mdio_read(dev, pid, MII_BMCR) & BMCR_RESET))
1170 printk(KERN_ERR "%s: BMCR reset failed.\n", dev->name);
1173 tc35815_chip_reset(dev);
1174 tc35815_clear_queues(dev);
1175 tc35815_chip_init(dev);
1176 /* Reconfigure CAM again since tc35815_chip_init() initialize it. */
1177 tc35815_set_multicast_list(dev);
1180 static void tc35815_tx_timeout(struct net_device *dev)
1182 struct tc35815_local *lp = dev->priv;
1183 struct tc35815_regs __iomem *tr =
1184 (struct tc35815_regs __iomem *)dev->base_addr;
1186 printk(KERN_WARNING "%s: transmit timed out, status %#x\n",
1187 dev->name, tc_readl(&tr->Tx_Stat));
1189 /* Try to restart the adaptor. */
1190 spin_lock_irq(&lp->lock);
1191 tc35815_restart(dev);
1192 spin_unlock_irq(&lp->lock);
1194 lp->stats.tx_errors++;
1196 /* If we have space available to accept new transmit
1197 * requests, wake up the queueing layer. This would
1198 * be the case if the chipset_init() call above just
1199 * flushes out the tx queue and empties it.
1201 * If instead, the tx queue is retained then the
1202 * netif_wake_queue() call should be placed in the
1203 * TX completion interrupt handler of the driver instead
1206 if (!tc35815_tx_full(dev))
1207 netif_wake_queue(dev);
1211 * Open/initialize the board. This is called (in the current kernel)
1212 * sometime after booting when the 'ifconfig' program is run.
1214 * This routine should set everything up anew at each open, even
1215 * registers that "should" only need to be set once at boot, so that
1216 * there is non-reboot way to recover if something goes wrong.
1219 tc35815_open(struct net_device *dev)
1221 struct tc35815_local *lp = dev->priv;
1224 * This is used if the interrupt line can turned off (shared).
1225 * See 3c503.c for an example of selecting the IRQ at config-time.
1227 if (request_irq(dev->irq, &tc35815_interrupt, IRQF_SHARED, dev->name, dev)) {
1231 del_timer(&lp->timer); /* Kill if running */
1232 tc35815_chip_reset(dev);
1234 if (tc35815_init_queues(dev) != 0) {
1235 free_irq(dev->irq, dev);
1239 /* Reset the hardware here. Don't forget to set the station address. */
1240 spin_lock_irq(&lp->lock);
1241 tc35815_chip_init(dev);
1242 spin_unlock_irq(&lp->lock);
1244 /* We are now ready to accept transmit requeusts from
1245 * the queueing layer of the networking.
1247 netif_start_queue(dev);
1252 /* This will only be invoked if your driver is _not_ in XOFF state.
1253 * What this means is that you need not check it, and that this
1254 * invariant will hold if you make sure that the netif_*_queue()
1255 * calls are done at the proper times.
1257 static int tc35815_send_packet(struct sk_buff *skb, struct net_device *dev)
1259 struct tc35815_local *lp = dev->priv;
1261 unsigned long flags;
1263 /* If some error occurs while trying to transmit this
1264 * packet, you should return '1' from this function.
1265 * In such a case you _may not_ do anything to the
1266 * SKB, it is still owned by the network queueing
1267 * layer when an error is returned. This means you
1268 * may not modify any SKB fields, you may not free
1272 /* This is the most common case for modern hardware.
1273 * The spinlock protects this code from the TX complete
1274 * hardware interrupt handler. Queue flow control is
1275 * thus managed under this lock as well.
1277 spin_lock_irqsave(&lp->lock, flags);
1279 /* failsafe... (handle txdone now if half of FDs are used) */
1280 if ((lp->tfd_start + TX_FD_NUM - lp->tfd_end) % TX_FD_NUM >
1282 tc35815_txdone(dev);
1284 if (netif_msg_pktdata(lp))
1285 print_eth(skb->data);
1287 if (lp->tx_skbs[lp->tfd_start].skb) {
1288 printk("%s: tx_skbs conflict.\n", dev->name);
1292 BUG_ON(lp->tx_skbs[lp->tfd_start].skb);
1294 lp->tx_skbs[lp->tfd_start].skb = skb;
1295 lp->tx_skbs[lp->tfd_start].skb_dma = pci_map_single(lp->pci_dev, skb->data, skb->len, PCI_DMA_TODEVICE);
1298 txfd = &lp->tfd_base[lp->tfd_start];
1299 txfd->bd.BuffData = cpu_to_le32(lp->tx_skbs[lp->tfd_start].skb_dma);
1300 txfd->bd.BDCtl = cpu_to_le32(skb->len);
1301 txfd->fd.FDSystem = cpu_to_le32(lp->tfd_start);
1302 txfd->fd.FDCtl = cpu_to_le32(FD_CownsFD | (1 << FD_BDCnt_SHIFT));
1304 if (lp->tfd_start == lp->tfd_end) {
1305 struct tc35815_regs __iomem *tr =
1306 (struct tc35815_regs __iomem *)dev->base_addr;
1307 /* Start DMA Transmitter. */
1308 txfd->fd.FDNext |= cpu_to_le32(FD_Next_EOL);
1310 txfd->fd.FDCtl |= cpu_to_le32(FD_FrmOpt_IntTx);
1312 if (netif_msg_tx_queued(lp)) {
1313 printk("%s: starting TxFD.\n", dev->name);
1316 tc_writel(fd_virt_to_bus(lp, txfd), &tr->TxFrmPtr);
1318 txfd->fd.FDNext &= cpu_to_le32(~FD_Next_EOL);
1319 if (netif_msg_tx_queued(lp)) {
1320 printk("%s: queueing TxFD.\n", dev->name);
1324 lp->tfd_start = (lp->tfd_start + 1) % TX_FD_NUM;
1326 dev->trans_start = jiffies;
1328 /* If we just used up the very last entry in the
1329 * TX ring on this device, tell the queueing
1330 * layer to send no more.
1332 if (tc35815_tx_full(dev)) {
1333 if (netif_msg_tx_queued(lp))
1334 printk(KERN_WARNING "%s: TxFD Exhausted.\n", dev->name);
1335 netif_stop_queue(dev);
1338 /* When the TX completion hw interrupt arrives, this
1339 * is when the transmit statistics are updated.
1342 spin_unlock_irqrestore(&lp->lock, flags);
1346 #define FATAL_ERROR_INT \
1347 (Int_IntPCI | Int_DmParErr | Int_IntNRAbt)
1348 static void tc35815_fatal_error_interrupt(struct net_device *dev, u32 status)
1351 printk(KERN_WARNING "%s: Fatal Error Intterrupt (%#x):",
1353 if (status & Int_IntPCI)
1355 if (status & Int_DmParErr)
1356 printk(" DmParErr");
1357 if (status & Int_IntNRAbt)
1358 printk(" IntNRAbt");
1361 panic("%s: Too many fatal errors.", dev->name);
1362 printk(KERN_WARNING "%s: Resetting ...\n", dev->name);
1363 /* Try to restart the adaptor. */
1364 tc35815_restart(dev);
1368 static int tc35815_do_interrupt(struct net_device *dev, u32 status, int limit)
1370 static int tc35815_do_interrupt(struct net_device *dev, u32 status)
1373 struct tc35815_local *lp = dev->priv;
1374 struct tc35815_regs __iomem *tr =
1375 (struct tc35815_regs __iomem *)dev->base_addr;
1378 /* Fatal errors... */
1379 if (status & FATAL_ERROR_INT) {
1380 tc35815_fatal_error_interrupt(dev, status);
1383 /* recoverable errors */
1384 if (status & Int_IntFDAEx) {
1385 /* disable FDAEx int. (until we make rooms...) */
1386 tc_writel(tc_readl(&tr->Int_En) & ~Int_FDAExEn, &tr->Int_En);
1388 "%s: Free Descriptor Area Exhausted (%#x).\n",
1390 lp->stats.rx_dropped++;
1393 if (status & Int_IntBLEx) {
1394 /* disable BLEx int. (until we make rooms...) */
1395 tc_writel(tc_readl(&tr->Int_En) & ~Int_BLExEn, &tr->Int_En);
1397 "%s: Buffer List Exhausted (%#x).\n",
1399 lp->stats.rx_dropped++;
1402 if (status & Int_IntExBD) {
1404 "%s: Excessive Buffer Descriptiors (%#x).\n",
1406 lp->stats.rx_length_errors++;
1410 /* normal notification */
1411 if (status & Int_IntMacRx) {
1412 /* Got a packet(s). */
1414 ret = tc35815_rx(dev, limit);
1419 lp->lstats.rx_ints++;
1421 if (status & Int_IntMacTx) {
1422 /* Transmit complete. */
1423 lp->lstats.tx_ints++;
1424 tc35815_txdone(dev);
1425 netif_wake_queue(dev);
1432 * The typical workload of the driver:
1433 * Handle the network interface interrupts.
1435 static irqreturn_t tc35815_interrupt(int irq, void *dev_id)
1437 struct net_device *dev = dev_id;
1438 struct tc35815_regs __iomem *tr =
1439 (struct tc35815_regs __iomem *)dev->base_addr;
1441 u32 dmactl = tc_readl(&tr->DMA_Ctl);
1443 if (!(dmactl & DMA_IntMask)) {
1444 /* disable interrupts */
1445 tc_writel(dmactl | DMA_IntMask, &tr->DMA_Ctl);
1446 if (netif_rx_schedule_prep(dev))
1447 __netif_rx_schedule(dev);
1449 printk(KERN_ERR "%s: interrupt taken in poll\n",
1453 (void)tc_readl(&tr->Int_Src); /* flush */
1458 struct tc35815_local *lp = dev->priv;
1462 spin_lock(&lp->lock);
1463 status = tc_readl(&tr->Int_Src);
1464 tc_writel(status, &tr->Int_Src); /* write to clear */
1465 handled = tc35815_do_interrupt(dev, status);
1466 (void)tc_readl(&tr->Int_Src); /* flush */
1467 spin_unlock(&lp->lock);
1468 return IRQ_RETVAL(handled >= 0);
1469 #endif /* TC35815_NAPI */
1472 #ifdef CONFIG_NET_POLL_CONTROLLER
1473 static void tc35815_poll_controller(struct net_device *dev)
1475 disable_irq(dev->irq);
1476 tc35815_interrupt(dev->irq, dev);
1477 enable_irq(dev->irq);
1481 /* We have a good packet(s), get it/them out of the buffers. */
1484 tc35815_rx(struct net_device *dev, int limit)
1487 tc35815_rx(struct net_device *dev)
1490 struct tc35815_local *lp = dev->priv;
1493 int buf_free_count = 0;
1494 int fd_free_count = 0;
1499 while (!((fdctl = le32_to_cpu(lp->rfd_cur->fd.FDCtl)) & FD_CownsFD)) {
1500 int status = le32_to_cpu(lp->rfd_cur->fd.FDStat);
1501 int pkt_len = fdctl & FD_FDLength_MASK;
1502 int bd_count = (fdctl & FD_BDCnt_MASK) >> FD_BDCnt_SHIFT;
1504 struct RxFD *next_rfd;
1506 #if (RX_CTL_CMD & Rx_StripCRC) == 0
1510 if (netif_msg_rx_status(lp))
1511 dump_rxfd(lp->rfd_cur);
1512 if (status & Rx_Good) {
1513 struct sk_buff *skb;
1514 unsigned char *data;
1516 #ifdef TC35815_USE_PACKEDBUFFER
1524 #ifdef TC35815_USE_PACKEDBUFFER
1525 BUG_ON(bd_count > 2);
1526 skb = dev_alloc_skb(pkt_len + 2); /* +2: for reserve */
1528 printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n",
1530 lp->stats.rx_dropped++;
1533 skb_reserve(skb, 2); /* 16 bit alignment */
1535 data = skb_put(skb, pkt_len);
1537 /* copy from receive buffer */
1540 while (offset < pkt_len && cur_bd < bd_count) {
1541 int len = le32_to_cpu(lp->rfd_cur->bd[cur_bd].BDCtl) &
1543 dma_addr_t dma = le32_to_cpu(lp->rfd_cur->bd[cur_bd].BuffData);
1544 void *rxbuf = rxbuf_bus_to_virt(lp, dma);
1545 if (offset + len > pkt_len)
1546 len = pkt_len - offset;
1547 #ifdef TC35815_DMA_SYNC_ONDEMAND
1548 pci_dma_sync_single_for_cpu(lp->pci_dev,
1550 PCI_DMA_FROMDEVICE);
1552 memcpy(data + offset, rxbuf, len);
1556 #else /* TC35815_USE_PACKEDBUFFER */
1557 BUG_ON(bd_count > 1);
1558 cur_bd = (le32_to_cpu(lp->rfd_cur->bd[0].BDCtl)
1559 & BD_RxBDID_MASK) >> BD_RxBDID_SHIFT;
1561 if (cur_bd >= RX_BUF_NUM) {
1562 printk("%s: invalid BDID.\n", dev->name);
1565 BUG_ON(lp->rx_skbs[cur_bd].skb_dma !=
1566 (le32_to_cpu(lp->rfd_cur->bd[0].BuffData) & ~3));
1567 if (!lp->rx_skbs[cur_bd].skb) {
1568 printk("%s: NULL skb.\n", dev->name);
1572 BUG_ON(cur_bd >= RX_BUF_NUM);
1574 skb = lp->rx_skbs[cur_bd].skb;
1575 prefetch(skb->data);
1576 lp->rx_skbs[cur_bd].skb = NULL;
1578 pci_unmap_single(lp->pci_dev,
1579 lp->rx_skbs[cur_bd].skb_dma,
1580 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1581 if (!HAVE_DMA_RXALIGN(lp))
1582 memmove(skb->data, skb->data - 2, pkt_len);
1583 data = skb_put(skb, pkt_len);
1584 #endif /* TC35815_USE_PACKEDBUFFER */
1585 if (netif_msg_pktdata(lp))
1587 skb->protocol = eth_type_trans(skb, dev);
1589 netif_receive_skb(skb);
1594 dev->last_rx = jiffies;
1595 lp->stats.rx_packets++;
1596 lp->stats.rx_bytes += pkt_len;
1598 lp->stats.rx_errors++;
1599 printk(KERN_DEBUG "%s: Rx error (status %x)\n",
1600 dev->name, status & Rx_Stat_Mask);
1601 /* WORKAROUND: LongErr and CRCErr means Overflow. */
1602 if ((status & Rx_LongErr) && (status & Rx_CRCErr)) {
1603 status &= ~(Rx_LongErr|Rx_CRCErr);
1606 if (status & Rx_LongErr) lp->stats.rx_length_errors++;
1607 if (status & Rx_Over) lp->stats.rx_fifo_errors++;
1608 if (status & Rx_CRCErr) lp->stats.rx_crc_errors++;
1609 if (status & Rx_Align) lp->stats.rx_frame_errors++;
1613 /* put Free Buffer back to controller */
1614 int bdctl = le32_to_cpu(lp->rfd_cur->bd[bd_count - 1].BDCtl);
1616 (bdctl & BD_RxBDID_MASK) >> BD_RxBDID_SHIFT;
1618 if (id >= RX_BUF_NUM) {
1619 printk("%s: invalid BDID.\n", dev->name);
1623 BUG_ON(id >= RX_BUF_NUM);
1625 /* free old buffers */
1626 #ifdef TC35815_USE_PACKEDBUFFER
1627 while (lp->fbl_curid != id)
1629 while (lp->fbl_count < RX_BUF_NUM)
1632 #ifdef TC35815_USE_PACKEDBUFFER
1633 unsigned char curid = lp->fbl_curid;
1635 unsigned char curid =
1636 (id + 1 + lp->fbl_count) % RX_BUF_NUM;
1638 struct BDesc *bd = &lp->fbl_ptr->bd[curid];
1640 bdctl = le32_to_cpu(bd->BDCtl);
1641 if (bdctl & BD_CownsBD) {
1642 printk("%s: Freeing invalid BD.\n",
1647 /* pass BD to controler */
1648 #ifndef TC35815_USE_PACKEDBUFFER
1649 if (!lp->rx_skbs[curid].skb) {
1650 lp->rx_skbs[curid].skb =
1651 alloc_rxbuf_skb(dev,
1653 &lp->rx_skbs[curid].skb_dma);
1654 if (!lp->rx_skbs[curid].skb)
1655 break; /* try on next reception */
1656 bd->BuffData = cpu_to_le32(lp->rx_skbs[curid].skb_dma);
1658 #endif /* TC35815_USE_PACKEDBUFFER */
1659 /* Note: BDLength was modified by chip. */
1660 bd->BDCtl = cpu_to_le32(BD_CownsBD |
1661 (curid << BD_RxBDID_SHIFT) |
1663 #ifdef TC35815_USE_PACKEDBUFFER
1664 lp->fbl_curid = (curid + 1) % RX_BUF_NUM;
1665 if (netif_msg_rx_status(lp)) {
1666 printk("%s: Entering new FBD %d\n",
1667 dev->name, lp->fbl_curid);
1668 dump_frfd(lp->fbl_ptr);
1677 /* put RxFD back to controller */
1679 next_rfd = fd_bus_to_virt(lp,
1680 le32_to_cpu(lp->rfd_cur->fd.FDNext));
1681 if (next_rfd < lp->rfd_base || next_rfd > lp->rfd_limit) {
1682 printk("%s: RxFD FDNext invalid.\n", dev->name);
1686 for (i = 0; i < (bd_count + 1) / 2 + 1; i++) {
1687 /* pass FD to controler */
1689 lp->rfd_cur->fd.FDNext = cpu_to_le32(0xdeaddead);
1691 lp->rfd_cur->fd.FDNext = cpu_to_le32(FD_Next_EOL);
1693 lp->rfd_cur->fd.FDCtl = cpu_to_le32(FD_CownsFD);
1697 if (lp->rfd_cur > lp->rfd_limit)
1698 lp->rfd_cur = lp->rfd_base;
1700 if (lp->rfd_cur != next_rfd)
1701 printk("rfd_cur = %p, next_rfd %p\n",
1702 lp->rfd_cur, next_rfd);
1706 /* re-enable BL/FDA Exhaust interrupts. */
1707 if (fd_free_count) {
1708 struct tc35815_regs __iomem *tr =
1709 (struct tc35815_regs __iomem *)dev->base_addr;
1710 u32 en, en_old = tc_readl(&tr->Int_En);
1711 en = en_old | Int_FDAExEn;
1715 tc_writel(en, &tr->Int_En);
1724 tc35815_poll(struct net_device *dev, int *budget)
1726 struct tc35815_local *lp = dev->priv;
1727 struct tc35815_regs __iomem *tr =
1728 (struct tc35815_regs __iomem *)dev->base_addr;
1729 int limit = min(*budget, dev->quota);
1730 int received = 0, handled;
1733 spin_lock(&lp->lock);
1734 status = tc_readl(&tr->Int_Src);
1736 tc_writel(status, &tr->Int_Src); /* write to clear */
1738 handled = tc35815_do_interrupt(dev, status, limit);
1740 received += handled;
1745 status = tc_readl(&tr->Int_Src);
1747 spin_unlock(&lp->lock);
1749 dev->quota -= received;
1750 *budget -= received;
1754 netif_rx_complete(dev);
1755 /* enable interrupts */
1756 tc_writel(tc_readl(&tr->DMA_Ctl) & ~DMA_IntMask, &tr->DMA_Ctl);
1761 #ifdef NO_CHECK_CARRIER
1762 #define TX_STA_ERR (Tx_ExColl|Tx_Under|Tx_Defer|Tx_LateColl|Tx_TxPar|Tx_SQErr)
1764 #define TX_STA_ERR (Tx_ExColl|Tx_Under|Tx_Defer|Tx_NCarr|Tx_LateColl|Tx_TxPar|Tx_SQErr)
1768 tc35815_check_tx_stat(struct net_device *dev, int status)
1770 struct tc35815_local *lp = dev->priv;
1771 const char *msg = NULL;
1773 /* count collisions */
1774 if (status & Tx_ExColl)
1775 lp->stats.collisions += 16;
1776 if (status & Tx_TxColl_MASK)
1777 lp->stats.collisions += status & Tx_TxColl_MASK;
1779 #ifndef NO_CHECK_CARRIER
1780 /* TX4939 does not have NCarr */
1781 if (lp->boardtype == TC35815_TX4939)
1782 status &= ~Tx_NCarr;
1783 #ifdef WORKAROUND_LOSTCAR
1784 /* WORKAROUND: ignore LostCrS in full duplex operation */
1785 if ((lp->timer_state != asleep && lp->timer_state != lcheck)
1787 status &= ~Tx_NCarr;
1791 if (!(status & TX_STA_ERR)) {
1793 lp->stats.tx_packets++;
1797 lp->stats.tx_errors++;
1798 if (status & Tx_ExColl) {
1799 lp->stats.tx_aborted_errors++;
1800 msg = "Excessive Collision.";
1802 if (status & Tx_Under) {
1803 lp->stats.tx_fifo_errors++;
1804 msg = "Tx FIFO Underrun.";
1805 if (lp->lstats.tx_underrun < TX_THRESHOLD_KEEP_LIMIT) {
1806 lp->lstats.tx_underrun++;
1807 if (lp->lstats.tx_underrun >= TX_THRESHOLD_KEEP_LIMIT) {
1808 struct tc35815_regs __iomem *tr =
1809 (struct tc35815_regs __iomem *)dev->base_addr;
1810 tc_writel(TX_THRESHOLD_MAX, &tr->TxThrsh);
1811 msg = "Tx FIFO Underrun.Change Tx threshold to max.";
1815 if (status & Tx_Defer) {
1816 lp->stats.tx_fifo_errors++;
1817 msg = "Excessive Deferral.";
1819 #ifndef NO_CHECK_CARRIER
1820 if (status & Tx_NCarr) {
1821 lp->stats.tx_carrier_errors++;
1822 msg = "Lost Carrier Sense.";
1825 if (status & Tx_LateColl) {
1826 lp->stats.tx_aborted_errors++;
1827 msg = "Late Collision.";
1829 if (status & Tx_TxPar) {
1830 lp->stats.tx_fifo_errors++;
1831 msg = "Transmit Parity Error.";
1833 if (status & Tx_SQErr) {
1834 lp->stats.tx_heartbeat_errors++;
1835 msg = "Signal Quality Error.";
1837 if (msg && netif_msg_tx_err(lp))
1838 printk(KERN_WARNING "%s: %s (%#x)\n", dev->name, msg, status);
1841 /* This handles TX complete events posted by the device
1845 tc35815_txdone(struct net_device *dev)
1847 struct tc35815_local *lp = dev->priv;
1851 txfd = &lp->tfd_base[lp->tfd_end];
1852 while (lp->tfd_start != lp->tfd_end &&
1853 !((fdctl = le32_to_cpu(txfd->fd.FDCtl)) & FD_CownsFD)) {
1854 int status = le32_to_cpu(txfd->fd.FDStat);
1855 struct sk_buff *skb;
1856 unsigned long fdnext = le32_to_cpu(txfd->fd.FDNext);
1857 u32 fdsystem = le32_to_cpu(txfd->fd.FDSystem);
1859 if (netif_msg_tx_done(lp)) {
1860 printk("%s: complete TxFD.\n", dev->name);
1863 tc35815_check_tx_stat(dev, status);
1865 skb = fdsystem != 0xffffffff ?
1866 lp->tx_skbs[fdsystem].skb : NULL;
1868 if (lp->tx_skbs[lp->tfd_end].skb != skb) {
1869 printk("%s: tx_skbs mismatch.\n", dev->name);
1873 BUG_ON(lp->tx_skbs[lp->tfd_end].skb != skb);
1876 lp->stats.tx_bytes += skb->len;
1877 pci_unmap_single(lp->pci_dev, lp->tx_skbs[lp->tfd_end].skb_dma, skb->len, PCI_DMA_TODEVICE);
1878 lp->tx_skbs[lp->tfd_end].skb = NULL;
1879 lp->tx_skbs[lp->tfd_end].skb_dma = 0;
1881 dev_kfree_skb_any(skb);
1883 dev_kfree_skb_irq(skb);
1886 txfd->fd.FDSystem = cpu_to_le32(0xffffffff);
1888 lp->tfd_end = (lp->tfd_end + 1) % TX_FD_NUM;
1889 txfd = &lp->tfd_base[lp->tfd_end];
1891 if ((fdnext & ~FD_Next_EOL) != fd_virt_to_bus(lp, txfd)) {
1892 printk("%s: TxFD FDNext invalid.\n", dev->name);
1896 if (fdnext & FD_Next_EOL) {
1897 /* DMA Transmitter has been stopping... */
1898 if (lp->tfd_end != lp->tfd_start) {
1899 struct tc35815_regs __iomem *tr =
1900 (struct tc35815_regs __iomem *)dev->base_addr;
1901 int head = (lp->tfd_start + TX_FD_NUM - 1) % TX_FD_NUM;
1902 struct TxFD* txhead = &lp->tfd_base[head];
1903 int qlen = (lp->tfd_start + TX_FD_NUM
1904 - lp->tfd_end) % TX_FD_NUM;
1907 if (!(le32_to_cpu(txfd->fd.FDCtl) & FD_CownsFD)) {
1908 printk("%s: TxFD FDCtl invalid.\n", dev->name);
1912 /* log max queue length */
1913 if (lp->lstats.max_tx_qlen < qlen)
1914 lp->lstats.max_tx_qlen = qlen;
1917 /* start DMA Transmitter again */
1918 txhead->fd.FDNext |= cpu_to_le32(FD_Next_EOL);
1920 txhead->fd.FDCtl |= cpu_to_le32(FD_FrmOpt_IntTx);
1922 if (netif_msg_tx_queued(lp)) {
1923 printk("%s: start TxFD on queue.\n",
1927 tc_writel(fd_virt_to_bus(lp, txfd), &tr->TxFrmPtr);
1933 /* If we had stopped the queue due to a "tx full"
1934 * condition, and space has now been made available,
1935 * wake up the queue.
1937 if (netif_queue_stopped(dev) && ! tc35815_tx_full(dev))
1938 netif_wake_queue(dev);
1941 /* The inverse routine to tc35815_open(). */
1943 tc35815_close(struct net_device *dev)
1945 struct tc35815_local *lp = dev->priv;
1946 netif_stop_queue(dev);
1948 /* Flush the Tx and disable Rx here. */
1950 del_timer(&lp->timer); /* Kill if running */
1951 tc35815_chip_reset(dev);
1952 free_irq(dev->irq, dev);
1954 tc35815_free_queues(dev);
1961 * Get the current statistics.
1962 * This may be called with the card open or closed.
1964 static struct net_device_stats *tc35815_get_stats(struct net_device *dev)
1966 struct tc35815_local *lp = dev->priv;
1967 struct tc35815_regs __iomem *tr =
1968 (struct tc35815_regs __iomem *)dev->base_addr;
1969 if (netif_running(dev)) {
1970 /* Update the statistics from the device registers. */
1971 lp->stats.rx_missed_errors = tc_readl(&tr->Miss_Cnt);
1977 static void tc35815_set_cam_entry(struct net_device *dev, int index, unsigned char *addr)
1979 struct tc35815_local *lp = dev->priv;
1980 struct tc35815_regs __iomem *tr =
1981 (struct tc35815_regs __iomem *)dev->base_addr;
1982 int cam_index = index * 6;
1985 saved_addr = tc_readl(&tr->CAM_Adr);
1987 if (netif_msg_hw(lp)) {
1989 printk(KERN_DEBUG "%s: CAM %d:", dev->name, index);
1990 for (i = 0; i < 6; i++)
1991 printk(" %02x", addr[i]);
1995 /* read modify write */
1996 tc_writel(cam_index - 2, &tr->CAM_Adr);
1997 cam_data = tc_readl(&tr->CAM_Data) & 0xffff0000;
1998 cam_data |= addr[0] << 8 | addr[1];
1999 tc_writel(cam_data, &tr->CAM_Data);
2000 /* write whole word */
2001 tc_writel(cam_index + 2, &tr->CAM_Adr);
2002 cam_data = (addr[2] << 24) | (addr[3] << 16) | (addr[4] << 8) | addr[5];
2003 tc_writel(cam_data, &tr->CAM_Data);
2005 /* write whole word */
2006 tc_writel(cam_index, &tr->CAM_Adr);
2007 cam_data = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) | addr[3];
2008 tc_writel(cam_data, &tr->CAM_Data);
2009 /* read modify write */
2010 tc_writel(cam_index + 4, &tr->CAM_Adr);
2011 cam_data = tc_readl(&tr->CAM_Data) & 0x0000ffff;
2012 cam_data |= addr[4] << 24 | (addr[5] << 16);
2013 tc_writel(cam_data, &tr->CAM_Data);
2016 tc_writel(saved_addr, &tr->CAM_Adr);
2021 * Set or clear the multicast filter for this adaptor.
2022 * num_addrs == -1 Promiscuous mode, receive all packets
2023 * num_addrs == 0 Normal mode, clear multicast list
2024 * num_addrs > 0 Multicast mode, receive normal and MC packets,
2025 * and do best-effort filtering.
2028 tc35815_set_multicast_list(struct net_device *dev)
2030 struct tc35815_regs __iomem *tr =
2031 (struct tc35815_regs __iomem *)dev->base_addr;
2033 if (dev->flags&IFF_PROMISC)
2035 #ifdef WORKAROUND_100HALF_PROMISC
2036 /* With some (all?) 100MHalf HUB, controller will hang
2037 * if we enabled promiscuous mode before linkup... */
2038 struct tc35815_local *lp = dev->priv;
2039 int pid = lp->phy_addr;
2040 if (!(tc_mdio_read(dev, pid, MII_BMSR) & BMSR_LSTATUS))
2043 /* Enable promiscuous mode */
2044 tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc | CAM_StationAcc, &tr->CAM_Ctl);
2046 else if((dev->flags&IFF_ALLMULTI) || dev->mc_count > CAM_ENTRY_MAX - 3)
2048 /* CAM 0, 1, 20 are reserved. */
2049 /* Disable promiscuous mode, use normal mode. */
2050 tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc, &tr->CAM_Ctl);
2052 else if(dev->mc_count)
2054 struct dev_mc_list* cur_addr = dev->mc_list;
2056 int ena_bits = CAM_Ena_Bit(CAM_ENTRY_SOURCE);
2058 tc_writel(0, &tr->CAM_Ctl);
2059 /* Walk the address list, and load the filter */
2060 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
2063 /* entry 0,1 is reserved. */
2064 tc35815_set_cam_entry(dev, i + 2, cur_addr->dmi_addr);
2065 ena_bits |= CAM_Ena_Bit(i + 2);
2067 tc_writel(ena_bits, &tr->CAM_Ena);
2068 tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
2071 tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena);
2072 tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
2076 static void tc35815_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
2078 struct tc35815_local *lp = dev->priv;
2079 strcpy(info->driver, MODNAME);
2080 strcpy(info->version, DRV_VERSION);
2081 strcpy(info->bus_info, pci_name(lp->pci_dev));
2084 static int tc35815_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2086 struct tc35815_local *lp = dev->priv;
2087 spin_lock_irq(&lp->lock);
2088 mii_ethtool_gset(&lp->mii, cmd);
2089 spin_unlock_irq(&lp->lock);
2093 static int tc35815_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2095 struct tc35815_local *lp = dev->priv;
2097 #if 1 /* use our negotiation method... */
2098 /* Verify the settings we care about. */
2099 if (cmd->autoneg != AUTONEG_ENABLE &&
2100 cmd->autoneg != AUTONEG_DISABLE)
2102 if (cmd->autoneg == AUTONEG_DISABLE &&
2103 ((cmd->speed != SPEED_100 &&
2104 cmd->speed != SPEED_10) ||
2105 (cmd->duplex != DUPLEX_HALF &&
2106 cmd->duplex != DUPLEX_FULL)))
2109 /* Ok, do it to it. */
2110 spin_lock_irq(&lp->lock);
2111 del_timer(&lp->timer);
2112 tc35815_start_auto_negotiation(dev, cmd);
2113 spin_unlock_irq(&lp->lock);
2116 spin_lock_irq(&lp->lock);
2117 rc = mii_ethtool_sset(&lp->mii, cmd);
2118 spin_unlock_irq(&lp->lock);
2123 static int tc35815_nway_reset(struct net_device *dev)
2125 struct tc35815_local *lp = dev->priv;
2127 spin_lock_irq(&lp->lock);
2128 rc = mii_nway_restart(&lp->mii);
2129 spin_unlock_irq(&lp->lock);
2133 static u32 tc35815_get_link(struct net_device *dev)
2135 struct tc35815_local *lp = dev->priv;
2137 spin_lock_irq(&lp->lock);
2138 rc = mii_link_ok(&lp->mii);
2139 spin_unlock_irq(&lp->lock);
2143 static u32 tc35815_get_msglevel(struct net_device *dev)
2145 struct tc35815_local *lp = dev->priv;
2146 return lp->msg_enable;
2149 static void tc35815_set_msglevel(struct net_device *dev, u32 datum)
2151 struct tc35815_local *lp = dev->priv;
2152 lp->msg_enable = datum;
2155 static int tc35815_get_stats_count(struct net_device *dev)
2157 struct tc35815_local *lp = dev->priv;
2158 return sizeof(lp->lstats) / sizeof(int);
2161 static void tc35815_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *stats, u64 *data)
2163 struct tc35815_local *lp = dev->priv;
2164 data[0] = lp->lstats.max_tx_qlen;
2165 data[1] = lp->lstats.tx_ints;
2166 data[2] = lp->lstats.rx_ints;
2167 data[3] = lp->lstats.tx_underrun;
2171 const char str[ETH_GSTRING_LEN];
2172 } ethtool_stats_keys[] = {
2179 static void tc35815_get_strings(struct net_device *dev, u32 stringset, u8 *data)
2181 memcpy(data, ethtool_stats_keys, sizeof(ethtool_stats_keys));
2184 static const struct ethtool_ops tc35815_ethtool_ops = {
2185 .get_drvinfo = tc35815_get_drvinfo,
2186 .get_settings = tc35815_get_settings,
2187 .set_settings = tc35815_set_settings,
2188 .nway_reset = tc35815_nway_reset,
2189 .get_link = tc35815_get_link,
2190 .get_msglevel = tc35815_get_msglevel,
2191 .set_msglevel = tc35815_set_msglevel,
2192 .get_strings = tc35815_get_strings,
2193 .get_stats_count = tc35815_get_stats_count,
2194 .get_ethtool_stats = tc35815_get_ethtool_stats,
2195 .get_perm_addr = ethtool_op_get_perm_addr,
2198 static int tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2200 struct tc35815_local *lp = dev->priv;
2203 if (!netif_running(dev))
2206 spin_lock_irq(&lp->lock);
2207 rc = generic_mii_ioctl(&lp->mii, if_mii(rq), cmd, NULL);
2208 spin_unlock_irq(&lp->lock);
2213 static int tc_mdio_read(struct net_device *dev, int phy_id, int location)
2215 struct tc35815_regs __iomem *tr =
2216 (struct tc35815_regs __iomem *)dev->base_addr;
2218 tc_writel(MD_CA_Busy | (phy_id << 5) | location, &tr->MD_CA);
2219 while (tc_readl(&tr->MD_CA) & MD_CA_Busy)
2221 data = tc_readl(&tr->MD_Data);
2222 return data & 0xffff;
2225 static void tc_mdio_write(struct net_device *dev, int phy_id, int location,
2228 struct tc35815_regs __iomem *tr =
2229 (struct tc35815_regs __iomem *)dev->base_addr;
2230 tc_writel(val, &tr->MD_Data);
2231 tc_writel(MD_CA_Busy | MD_CA_Wr | (phy_id << 5) | location, &tr->MD_CA);
2232 while (tc_readl(&tr->MD_CA) & MD_CA_Busy)
2236 /* Auto negotiation. The scheme is very simple. We have a timer routine
2237 * that keeps watching the auto negotiation process as it progresses.
2238 * The DP83840 is first told to start doing it's thing, we set up the time
2239 * and place the timer state machine in it's initial state.
2241 * Here the timer peeks at the DP83840 status registers at each click to see
2242 * if the auto negotiation has completed, we assume here that the DP83840 PHY
2243 * will time out at some point and just tell us what (didn't) happen. For
2244 * complete coverage we only allow so many of the ticks at this level to run,
2245 * when this has expired we print a warning message and try another strategy.
2246 * This "other" strategy is to force the interface into various speed/duplex
2247 * configurations and we stop when we see a link-up condition before the
2248 * maximum number of "peek" ticks have occurred.
2250 * Once a valid link status has been detected we configure the BigMAC and
2251 * the rest of the Happy Meal to speak the most efficient protocol we could
2252 * get a clean link for. The priority for link configurations, highest first
2254 * 100 Base-T Full Duplex
2255 * 100 Base-T Half Duplex
2256 * 10 Base-T Full Duplex
2257 * 10 Base-T Half Duplex
2259 * We start a new timer now, after a successful auto negotiation status has
2260 * been detected. This timer just waits for the link-up bit to get set in
2261 * the BMCR of the DP83840. When this occurs we print a kernel log message
2262 * describing the link type in use and the fact that it is up.
2264 * If a fatal error of some sort is signalled and detected in the interrupt
2265 * service routine, and the chip is reset, or the link is ifconfig'd down
2266 * and then back up, this entire process repeats itself all over again.
2268 /* Note: Above comments are come from sunhme driver. */
2270 static int tc35815_try_next_permutation(struct net_device *dev)
2272 struct tc35815_local *lp = dev->priv;
2273 int pid = lp->phy_addr;
2274 unsigned short bmcr;
2276 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2278 /* Downgrade from full to half duplex. Only possible via ethtool. */
2279 if (bmcr & BMCR_FULLDPLX) {
2280 bmcr &= ~BMCR_FULLDPLX;
2281 printk(KERN_DEBUG "%s: try next permutation (BMCR %x)\n", dev->name, bmcr);
2282 tc_mdio_write(dev, pid, MII_BMCR, bmcr);
2286 /* Downgrade from 100 to 10. */
2287 if (bmcr & BMCR_SPEED100) {
2288 bmcr &= ~BMCR_SPEED100;
2289 printk(KERN_DEBUG "%s: try next permutation (BMCR %x)\n", dev->name, bmcr);
2290 tc_mdio_write(dev, pid, MII_BMCR, bmcr);
2294 /* We've tried everything. */
2299 tc35815_display_link_mode(struct net_device *dev)
2301 struct tc35815_local *lp = dev->priv;
2302 int pid = lp->phy_addr;
2303 unsigned short lpa, bmcr;
2304 char *speed = "", *duplex = "";
2306 lpa = tc_mdio_read(dev, pid, MII_LPA);
2307 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2308 if (options.speed ? (bmcr & BMCR_SPEED100) : (lpa & (LPA_100HALF | LPA_100FULL)))
2312 if (options.duplex ? (bmcr & BMCR_FULLDPLX) : (lpa & (LPA_100FULL | LPA_10FULL)))
2313 duplex = "Full Duplex";
2315 duplex = "Half Duplex";
2317 if (netif_msg_link(lp))
2318 printk(KERN_INFO "%s: Link is up at %s, %s.\n",
2319 dev->name, speed, duplex);
2320 printk(KERN_DEBUG "%s: MII BMCR %04x BMSR %04x LPA %04x\n",
2322 bmcr, tc_mdio_read(dev, pid, MII_BMSR), lpa);
2325 static void tc35815_display_forced_link_mode(struct net_device *dev)
2327 struct tc35815_local *lp = dev->priv;
2328 int pid = lp->phy_addr;
2329 unsigned short bmcr;
2330 char *speed = "", *duplex = "";
2332 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2333 if (bmcr & BMCR_SPEED100)
2337 if (bmcr & BMCR_FULLDPLX)
2338 duplex = "Full Duplex.\n";
2340 duplex = "Half Duplex.\n";
2342 if (netif_msg_link(lp))
2343 printk(KERN_INFO "%s: Link has been forced up at %s, %s",
2344 dev->name, speed, duplex);
2347 static void tc35815_set_link_modes(struct net_device *dev)
2349 struct tc35815_local *lp = dev->priv;
2350 struct tc35815_regs __iomem *tr =
2351 (struct tc35815_regs __iomem *)dev->base_addr;
2352 int pid = lp->phy_addr;
2353 unsigned short bmcr, lpa;
2356 if (lp->timer_state == arbwait) {
2357 lpa = tc_mdio_read(dev, pid, MII_LPA);
2358 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2359 printk(KERN_DEBUG "%s: MII BMCR %04x BMSR %04x LPA %04x\n",
2361 bmcr, tc_mdio_read(dev, pid, MII_BMSR), lpa);
2362 if (!(lpa & (LPA_10HALF | LPA_10FULL |
2363 LPA_100HALF | LPA_100FULL))) {
2364 /* fall back to 10HALF */
2365 printk(KERN_INFO "%s: bad ability %04x - falling back to 10HD.\n",
2369 if (options.duplex ? (bmcr & BMCR_FULLDPLX) : (lpa & (LPA_100FULL | LPA_10FULL)))
2373 if (options.speed ? (bmcr & BMCR_SPEED100) : (lpa & (LPA_100HALF | LPA_100FULL)))
2378 /* Forcing a link mode. */
2379 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2380 if (bmcr & BMCR_FULLDPLX)
2384 if (bmcr & BMCR_SPEED100)
2390 tc_writel(tc_readl(&tr->MAC_Ctl) | MAC_HaltReq, &tr->MAC_Ctl);
2391 if (lp->fullduplex) {
2392 tc_writel(tc_readl(&tr->MAC_Ctl) | MAC_FullDup, &tr->MAC_Ctl);
2394 tc_writel(tc_readl(&tr->MAC_Ctl) & ~MAC_FullDup, &tr->MAC_Ctl);
2396 tc_writel(tc_readl(&tr->MAC_Ctl) & ~MAC_HaltReq, &tr->MAC_Ctl);
2398 /* TX4939 PCFG.SPEEDn bit will be changed on NETDEV_CHANGE event. */
2400 #ifndef NO_CHECK_CARRIER
2401 /* TX4939 does not have EnLCarr */
2402 if (lp->boardtype != TC35815_TX4939) {
2403 #ifdef WORKAROUND_LOSTCAR
2404 /* WORKAROUND: enable LostCrS only if half duplex operation */
2405 if (!lp->fullduplex && lp->boardtype != TC35815_TX4939)
2406 tc_writel(tc_readl(&tr->Tx_Ctl) | Tx_EnLCarr, &tr->Tx_Ctl);
2410 lp->mii.full_duplex = lp->fullduplex;
2413 static void tc35815_timer(unsigned long data)
2415 struct net_device *dev = (struct net_device *)data;
2416 struct tc35815_local *lp = dev->priv;
2417 int pid = lp->phy_addr;
2418 unsigned short bmsr, bmcr, lpa;
2419 int restart_timer = 0;
2421 spin_lock_irq(&lp->lock);
2424 switch (lp->timer_state) {
2427 * Only allow for 5 ticks, thats 10 seconds and much too
2428 * long to wait for arbitration to complete.
2430 /* TC35815 need more times... */
2431 if (lp->timer_ticks >= 10) {
2432 /* Enter force mode. */
2433 if (!options.doforce) {
2434 printk(KERN_NOTICE "%s: Auto-Negotiation unsuccessful,"
2435 " cable probblem?\n", dev->name);
2436 /* Try to restart the adaptor. */
2437 tc35815_restart(dev);
2440 printk(KERN_NOTICE "%s: Auto-Negotiation unsuccessful,"
2441 " trying force link mode\n", dev->name);
2442 printk(KERN_DEBUG "%s: BMCR %x BMSR %x\n", dev->name,
2443 tc_mdio_read(dev, pid, MII_BMCR),
2444 tc_mdio_read(dev, pid, MII_BMSR));
2445 bmcr = BMCR_SPEED100;
2446 tc_mdio_write(dev, pid, MII_BMCR, bmcr);
2449 * OK, seems we need do disable the transceiver
2450 * for the first tick to make sure we get an
2451 * accurate link state at the second tick.
2454 lp->timer_state = ltrywait;
2455 lp->timer_ticks = 0;
2458 /* Anything interesting happen? */
2459 bmsr = tc_mdio_read(dev, pid, MII_BMSR);
2460 if (bmsr & BMSR_ANEGCOMPLETE) {
2461 /* Just what we've been waiting for... */
2462 tc35815_set_link_modes(dev);
2465 * Success, at least so far, advance our state
2468 lp->timer_state = lupwait;
2478 * Auto negotiation was successful and we are awaiting a
2479 * link up status. I have decided to let this timer run
2480 * forever until some sort of error is signalled, reporting
2481 * a message to the user at 10 second intervals.
2483 bmsr = tc_mdio_read(dev, pid, MII_BMSR);
2484 if (bmsr & BMSR_LSTATUS) {
2486 * Wheee, it's up, display the link mode in use and put
2487 * the timer to sleep.
2489 tc35815_display_link_mode(dev);
2490 netif_carrier_on(dev);
2491 #ifdef WORKAROUND_100HALF_PROMISC
2492 /* delayed promiscuous enabling */
2493 if (dev->flags & IFF_PROMISC)
2494 tc35815_set_multicast_list(dev);
2497 lp->saved_lpa = tc_mdio_read(dev, pid, MII_LPA);
2498 lp->timer_state = lcheck;
2501 lp->timer_state = asleep;
2505 if (lp->timer_ticks >= 10) {
2506 printk(KERN_NOTICE "%s: Auto negotiation successful, link still "
2507 "not completely up.\n", dev->name);
2508 lp->timer_ticks = 0;
2518 * Making the timeout here too long can make it take
2519 * annoyingly long to attempt all of the link mode
2520 * permutations, but then again this is essentially
2521 * error recovery code for the most part.
2523 bmsr = tc_mdio_read(dev, pid, MII_BMSR);
2524 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2525 if (lp->timer_ticks == 1) {
2527 * Re-enable transceiver, we'll re-enable the
2528 * transceiver next tick, then check link state
2529 * on the following tick.
2534 if (lp->timer_ticks == 2) {
2538 if (bmsr & BMSR_LSTATUS) {
2539 /* Force mode selection success. */
2540 tc35815_display_forced_link_mode(dev);
2541 netif_carrier_on(dev);
2542 tc35815_set_link_modes(dev);
2543 #ifdef WORKAROUND_100HALF_PROMISC
2544 /* delayed promiscuous enabling */
2545 if (dev->flags & IFF_PROMISC)
2546 tc35815_set_multicast_list(dev);
2549 lp->saved_lpa = tc_mdio_read(dev, pid, MII_LPA);
2550 lp->timer_state = lcheck;
2553 lp->timer_state = asleep;
2557 if (lp->timer_ticks >= 4) { /* 6 seconds or so... */
2560 ret = tc35815_try_next_permutation(dev);
2563 * Aieee, tried them all, reset the
2564 * chip and try all over again.
2566 printk(KERN_NOTICE "%s: Link down, "
2570 /* Try to restart the adaptor. */
2571 tc35815_restart(dev);
2574 lp->timer_ticks = 0;
2583 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2584 lpa = tc_mdio_read(dev, pid, MII_LPA);
2585 if (bmcr & (BMCR_PDOWN | BMCR_ISOLATE | BMCR_RESET)) {
2586 printk(KERN_ERR "%s: PHY down? (BMCR %x)\n", dev->name,
2588 } else if ((lp->saved_lpa ^ lpa) &
2589 (LPA_100FULL|LPA_100HALF|LPA_10FULL|LPA_10HALF)) {
2590 printk(KERN_NOTICE "%s: link status changed"
2591 " (BMCR %x LPA %x->%x)\n", dev->name,
2592 bmcr, lp->saved_lpa, lpa);
2598 /* Try to restart the adaptor. */
2599 tc35815_restart(dev);
2604 /* Can't happens.... */
2605 printk(KERN_ERR "%s: Aieee, link timer is asleep but we got "
2606 "one anyways!\n", dev->name);
2608 lp->timer_ticks = 0;
2609 lp->timer_state = asleep; /* foo on you */
2613 if (restart_timer) {
2614 lp->timer.expires = jiffies + msecs_to_jiffies(1200);
2615 add_timer(&lp->timer);
2618 spin_unlock_irq(&lp->lock);
2621 static void tc35815_start_auto_negotiation(struct net_device *dev,
2622 struct ethtool_cmd *ep)
2624 struct tc35815_local *lp = dev->priv;
2625 int pid = lp->phy_addr;
2626 unsigned short bmsr, bmcr, advertize;
2629 netif_carrier_off(dev);
2630 bmsr = tc_mdio_read(dev, pid, MII_BMSR);
2631 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2632 advertize = tc_mdio_read(dev, pid, MII_ADVERTISE);
2634 if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
2635 if (options.speed || options.duplex) {
2636 /* Advertise only specified configuration. */
2637 advertize &= ~(ADVERTISE_10HALF |
2641 if (options.speed != 10) {
2642 if (options.duplex != 1)
2643 advertize |= ADVERTISE_100FULL;
2644 if (options.duplex != 2)
2645 advertize |= ADVERTISE_100HALF;
2647 if (options.speed != 100) {
2648 if (options.duplex != 1)
2649 advertize |= ADVERTISE_10FULL;
2650 if (options.duplex != 2)
2651 advertize |= ADVERTISE_10HALF;
2653 if (options.speed == 100)
2654 bmcr |= BMCR_SPEED100;
2655 else if (options.speed == 10)
2656 bmcr &= ~BMCR_SPEED100;
2657 if (options.duplex == 2)
2658 bmcr |= BMCR_FULLDPLX;
2659 else if (options.duplex == 1)
2660 bmcr &= ~BMCR_FULLDPLX;
2662 /* Advertise everything we can support. */
2663 if (bmsr & BMSR_10HALF)
2664 advertize |= ADVERTISE_10HALF;
2666 advertize &= ~ADVERTISE_10HALF;
2667 if (bmsr & BMSR_10FULL)
2668 advertize |= ADVERTISE_10FULL;
2670 advertize &= ~ADVERTISE_10FULL;
2671 if (bmsr & BMSR_100HALF)
2672 advertize |= ADVERTISE_100HALF;
2674 advertize &= ~ADVERTISE_100HALF;
2675 if (bmsr & BMSR_100FULL)
2676 advertize |= ADVERTISE_100FULL;
2678 advertize &= ~ADVERTISE_100FULL;
2681 tc_mdio_write(dev, pid, MII_ADVERTISE, advertize);
2683 /* Enable Auto-Negotiation, this is usually on already... */
2684 bmcr |= BMCR_ANENABLE;
2685 tc_mdio_write(dev, pid, MII_BMCR, bmcr);
2687 /* Restart it to make sure it is going. */
2688 bmcr |= BMCR_ANRESTART;
2689 tc_mdio_write(dev, pid, MII_BMCR, bmcr);
2690 printk(KERN_DEBUG "%s: ADVERTISE %x BMCR %x\n", dev->name, advertize, bmcr);
2692 /* BMCR_ANRESTART self clears when the process has begun. */
2693 timeout = 64; /* More than enough. */
2695 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2696 if (!(bmcr & BMCR_ANRESTART))
2697 break; /* got it. */
2701 printk(KERN_ERR "%s: TC35815 would not start auto "
2702 "negotiation BMCR=0x%04x\n",
2704 printk(KERN_NOTICE "%s: Performing force link "
2705 "detection.\n", dev->name);
2708 printk(KERN_DEBUG "%s: auto negotiation started.\n", dev->name);
2709 lp->timer_state = arbwait;
2713 /* Force the link up, trying first a particular mode.
2714 * Either we are here at the request of ethtool or
2715 * because the Happy Meal would not start to autoneg.
2718 /* Disable auto-negotiation in BMCR, enable the duplex and
2719 * speed setting, init the timer state machine, and fire it off.
2721 if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
2722 bmcr = BMCR_SPEED100;
2724 if (ep->speed == SPEED_100)
2725 bmcr = BMCR_SPEED100;
2728 if (ep->duplex == DUPLEX_FULL)
2729 bmcr |= BMCR_FULLDPLX;
2731 tc_mdio_write(dev, pid, MII_BMCR, bmcr);
2733 /* OK, seems we need do disable the transceiver for the first
2734 * tick to make sure we get an accurate link state at the
2737 lp->timer_state = ltrywait;
2740 del_timer(&lp->timer);
2741 lp->timer_ticks = 0;
2742 lp->timer.expires = jiffies + msecs_to_jiffies(1200);
2743 add_timer(&lp->timer);
2746 static void tc35815_find_phy(struct net_device *dev)
2748 struct tc35815_local *lp = dev->priv;
2749 int pid = lp->phy_addr;
2753 for (pid = 31; pid >= 0; pid--) {
2754 id0 = tc_mdio_read(dev, pid, MII_BMSR);
2755 if (id0 != 0xffff && id0 != 0x0000 &&
2756 (id0 & BMSR_RESV) != (0xffff & BMSR_RESV) /* paranoia? */
2763 printk(KERN_ERR "%s: No MII Phy found.\n",
2765 lp->phy_addr = pid = 0;
2768 lp->mii_id[0] = tc_mdio_read(dev, pid, MII_PHYSID1);
2769 lp->mii_id[1] = tc_mdio_read(dev, pid, MII_PHYSID2);
2770 if (netif_msg_hw(lp))
2771 printk(KERN_INFO "%s: PHY(%02x) ID %04x %04x\n", dev->name,
2772 pid, lp->mii_id[0], lp->mii_id[1]);
2775 static void tc35815_phy_chip_init(struct net_device *dev)
2777 struct tc35815_local *lp = dev->priv;
2778 int pid = lp->phy_addr;
2779 unsigned short bmcr;
2780 struct ethtool_cmd ecmd, *ep;
2782 /* dis-isolate if needed. */
2783 bmcr = tc_mdio_read(dev, pid, MII_BMCR);
2784 if (bmcr & BMCR_ISOLATE) {
2786 printk(KERN_DEBUG "%s: unisolating...", dev->name);
2787 tc_mdio_write(dev, pid, MII_BMCR, bmcr & ~BMCR_ISOLATE);
2789 if (!(tc_mdio_read(dev, pid, MII_BMCR) & BMCR_ISOLATE))
2793 printk(" %s.\n", count ? "done" : "failed");
2796 if (options.speed && options.duplex) {
2797 ecmd.autoneg = AUTONEG_DISABLE;
2798 ecmd.speed = options.speed == 10 ? SPEED_10 : SPEED_100;
2799 ecmd.duplex = options.duplex == 1 ? DUPLEX_HALF : DUPLEX_FULL;
2804 tc35815_start_auto_negotiation(dev, ep);
2807 static void tc35815_chip_reset(struct net_device *dev)
2809 struct tc35815_regs __iomem *tr =
2810 (struct tc35815_regs __iomem *)dev->base_addr;
2812 /* reset the controller */
2813 tc_writel(MAC_Reset, &tr->MAC_Ctl);
2814 udelay(4); /* 3200ns */
2816 while (tc_readl(&tr->MAC_Ctl) & MAC_Reset) {
2818 printk(KERN_ERR "%s: MAC reset failed.\n", dev->name);
2823 tc_writel(0, &tr->MAC_Ctl);
2825 /* initialize registers to default value */
2826 tc_writel(0, &tr->DMA_Ctl);
2827 tc_writel(0, &tr->TxThrsh);
2828 tc_writel(0, &tr->TxPollCtr);
2829 tc_writel(0, &tr->RxFragSize);
2830 tc_writel(0, &tr->Int_En);
2831 tc_writel(0, &tr->FDA_Bas);
2832 tc_writel(0, &tr->FDA_Lim);
2833 tc_writel(0xffffffff, &tr->Int_Src); /* Write 1 to clear */
2834 tc_writel(0, &tr->CAM_Ctl);
2835 tc_writel(0, &tr->Tx_Ctl);
2836 tc_writel(0, &tr->Rx_Ctl);
2837 tc_writel(0, &tr->CAM_Ena);
2838 (void)tc_readl(&tr->Miss_Cnt); /* Read to clear */
2840 /* initialize internal SRAM */
2841 tc_writel(DMA_TestMode, &tr->DMA_Ctl);
2842 for (i = 0; i < 0x1000; i += 4) {
2843 tc_writel(i, &tr->CAM_Adr);
2844 tc_writel(0, &tr->CAM_Data);
2846 tc_writel(0, &tr->DMA_Ctl);
2849 static void tc35815_chip_init(struct net_device *dev)
2851 struct tc35815_local *lp = dev->priv;
2852 struct tc35815_regs __iomem *tr =
2853 (struct tc35815_regs __iomem *)dev->base_addr;
2854 unsigned long txctl = TX_CTL_CMD;
2856 tc35815_phy_chip_init(dev);
2858 /* load station address to CAM */
2859 tc35815_set_cam_entry(dev, CAM_ENTRY_SOURCE, dev->dev_addr);
2861 /* Enable CAM (broadcast and unicast) */
2862 tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena);
2863 tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
2865 /* Use DMA_RxAlign_2 to make IP header 4-byte aligned. */
2866 if (HAVE_DMA_RXALIGN(lp))
2867 tc_writel(DMA_BURST_SIZE | DMA_RxAlign_2, &tr->DMA_Ctl);
2869 tc_writel(DMA_BURST_SIZE, &tr->DMA_Ctl);
2870 #ifdef TC35815_USE_PACKEDBUFFER
2871 tc_writel(RxFrag_EnPack | ETH_ZLEN, &tr->RxFragSize); /* Packing */
2873 tc_writel(ETH_ZLEN, &tr->RxFragSize);
2875 tc_writel(0, &tr->TxPollCtr); /* Batch mode */
2876 tc_writel(TX_THRESHOLD, &tr->TxThrsh);
2877 tc_writel(INT_EN_CMD, &tr->Int_En);
2880 tc_writel(fd_virt_to_bus(lp, lp->rfd_base), &tr->FDA_Bas);
2881 tc_writel((unsigned long)lp->rfd_limit - (unsigned long)lp->rfd_base,
2884 * Activation method:
2885 * First, enable the MAC Transmitter and the DMA Receive circuits.
2886 * Then enable the DMA Transmitter and the MAC Receive circuits.
2888 tc_writel(fd_virt_to_bus(lp, lp->fbl_ptr), &tr->BLFrmPtr); /* start DMA receiver */
2889 tc_writel(RX_CTL_CMD, &tr->Rx_Ctl); /* start MAC receiver */
2891 /* start MAC transmitter */
2892 #ifndef NO_CHECK_CARRIER
2893 /* TX4939 does not have EnLCarr */
2894 if (lp->boardtype == TC35815_TX4939)
2895 txctl &= ~Tx_EnLCarr;
2896 #ifdef WORKAROUND_LOSTCAR
2897 /* WORKAROUND: ignore LostCrS in full duplex operation */
2898 if ((lp->timer_state != asleep && lp->timer_state != lcheck) ||
2900 txctl &= ~Tx_EnLCarr;
2902 #endif /* !NO_CHECK_CARRIER */
2904 txctl &= ~Tx_EnComp; /* disable global tx completion int. */
2906 tc_writel(txctl, &tr->Tx_Ctl);
2910 static int tc35815_suspend(struct pci_dev *pdev, pm_message_t state)
2912 struct net_device *dev = pci_get_drvdata(pdev);
2913 struct tc35815_local *lp = dev->priv;
2914 unsigned long flags;
2916 pci_save_state(pdev);
2917 if (!netif_running(dev))
2919 netif_device_detach(dev);
2920 spin_lock_irqsave(&lp->lock, flags);
2921 del_timer(&lp->timer); /* Kill if running */
2922 tc35815_chip_reset(dev);
2923 spin_unlock_irqrestore(&lp->lock, flags);
2924 pci_set_power_state(pdev, PCI_D3hot);
2928 static int tc35815_resume(struct pci_dev *pdev)
2930 struct net_device *dev = pci_get_drvdata(pdev);
2931 struct tc35815_local *lp = dev->priv;
2932 unsigned long flags;
2934 pci_restore_state(pdev);
2935 if (!netif_running(dev))
2937 pci_set_power_state(pdev, PCI_D0);
2938 spin_lock_irqsave(&lp->lock, flags);
2939 tc35815_restart(dev);
2940 spin_unlock_irqrestore(&lp->lock, flags);
2941 netif_device_attach(dev);
2944 #endif /* CONFIG_PM */
2946 static struct pci_driver tc35815_pci_driver = {
2948 .id_table = tc35815_pci_tbl,
2949 .probe = tc35815_init_one,
2950 .remove = __devexit_p(tc35815_remove_one),
2952 .suspend = tc35815_suspend,
2953 .resume = tc35815_resume,
2957 module_param_named(speed, options.speed, int, 0);
2958 MODULE_PARM_DESC(speed, "0:auto, 10:10Mbps, 100:100Mbps");
2959 module_param_named(duplex, options.duplex, int, 0);
2960 MODULE_PARM_DESC(duplex, "0:auto, 1:half, 2:full");
2961 module_param_named(doforce, options.doforce, int, 0);
2962 MODULE_PARM_DESC(doforce, "try force link mode if auto-negotiation failed");
2964 static int __init tc35815_init_module(void)
2966 return pci_register_driver(&tc35815_pci_driver);
2969 static void __exit tc35815_cleanup_module(void)
2971 pci_unregister_driver(&tc35815_pci_driver);
2974 module_init(tc35815_init_module);
2975 module_exit(tc35815_cleanup_module);
2977 MODULE_DESCRIPTION("TOSHIBA TC35815 PCI 10M/100M Ethernet driver");
2978 MODULE_LICENSE("GPL");