69cc77192961f1044899a2c0cc966030896eb441
[safe/jmp/linux-2.6] / drivers / net / sunhme.c
1 /* sunhme.c: Sparc HME/BigMac 10/100baseT half/full duplex auto switching,
2  *           auto carrier detecting ethernet driver.  Also known as the
3  *           "Happy Meal Ethernet" found on SunSwift SBUS cards.
4  *
5  * Copyright (C) 1996, 1998, 1999, 2002, 2003,
6                  2006 David S. Miller (davem@davemloft.net)
7  *
8  * Changes :
9  * 2000/11/11 Willy Tarreau <willy AT meta-x.org>
10  *   - port to non-sparc architectures. Tested only on x86 and
11  *     only currently works with QFE PCI cards.
12  *   - ability to specify the MAC address at module load time by passing this
13  *     argument : macaddr=0x00,0x10,0x20,0x30,0x40,0x50
14  */
15
16 #include <linux/module.h>
17 #include <linux/kernel.h>
18 #include <linux/types.h>
19 #include <linux/fcntl.h>
20 #include <linux/interrupt.h>
21 #include <linux/ioport.h>
22 #include <linux/in.h>
23 #include <linux/slab.h>
24 #include <linux/string.h>
25 #include <linux/delay.h>
26 #include <linux/init.h>
27 #include <linux/ethtool.h>
28 #include <linux/mii.h>
29 #include <linux/crc32.h>
30 #include <linux/random.h>
31 #include <linux/errno.h>
32 #include <linux/netdevice.h>
33 #include <linux/etherdevice.h>
34 #include <linux/skbuff.h>
35 #include <linux/mm.h>
36 #include <linux/bitops.h>
37 #include <linux/dma-mapping.h>
38
39 #include <asm/system.h>
40 #include <asm/io.h>
41 #include <asm/dma.h>
42 #include <asm/byteorder.h>
43
44 #ifdef CONFIG_SPARC
45 #include <asm/idprom.h>
46 #include <asm/sbus.h>
47 #include <asm/openprom.h>
48 #include <asm/oplib.h>
49 #include <asm/prom.h>
50 #include <asm/auxio.h>
51 #endif
52 #include <asm/uaccess.h>
53
54 #include <asm/pgtable.h>
55 #include <asm/irq.h>
56
57 #ifdef CONFIG_PCI
58 #include <linux/pci.h>
59 #endif
60
61 #include "sunhme.h"
62
63 #define DRV_NAME        "sunhme"
64 #define DRV_VERSION     "3.00"
65 #define DRV_RELDATE     "June 23, 2006"
66 #define DRV_AUTHOR      "David S. Miller (davem@davemloft.net)"
67
68 static char version[] =
69         DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " " DRV_AUTHOR "\n";
70
71 MODULE_VERSION(DRV_VERSION);
72 MODULE_AUTHOR(DRV_AUTHOR);
73 MODULE_DESCRIPTION("Sun HappyMealEthernet(HME) 10/100baseT ethernet driver");
74 MODULE_LICENSE("GPL");
75
76 static int macaddr[6];
77
78 /* accept MAC address of the form macaddr=0x08,0x00,0x20,0x30,0x40,0x50 */
79 module_param_array(macaddr, int, NULL, 0);
80 MODULE_PARM_DESC(macaddr, "Happy Meal MAC address to set");
81
82 #ifdef CONFIG_SBUS
83 static struct quattro *qfe_sbus_list;
84 #endif
85
86 #ifdef CONFIG_PCI
87 static struct quattro *qfe_pci_list;
88 #endif
89
90 #undef HMEDEBUG
91 #undef SXDEBUG
92 #undef RXDEBUG
93 #undef TXDEBUG
94 #undef TXLOGGING
95
96 #ifdef TXLOGGING
97 struct hme_tx_logent {
98         unsigned int tstamp;
99         int tx_new, tx_old;
100         unsigned int action;
101 #define TXLOG_ACTION_IRQ        0x01
102 #define TXLOG_ACTION_TXMIT      0x02
103 #define TXLOG_ACTION_TBUSY      0x04
104 #define TXLOG_ACTION_NBUFS      0x08
105         unsigned int status;
106 };
107 #define TX_LOG_LEN      128
108 static struct hme_tx_logent tx_log[TX_LOG_LEN];
109 static int txlog_cur_entry;
110 static __inline__ void tx_add_log(struct happy_meal *hp, unsigned int a, unsigned int s)
111 {
112         struct hme_tx_logent *tlp;
113         unsigned long flags;
114
115         local_irq_save(flags);
116         tlp = &tx_log[txlog_cur_entry];
117         tlp->tstamp = (unsigned int)jiffies;
118         tlp->tx_new = hp->tx_new;
119         tlp->tx_old = hp->tx_old;
120         tlp->action = a;
121         tlp->status = s;
122         txlog_cur_entry = (txlog_cur_entry + 1) & (TX_LOG_LEN - 1);
123         local_irq_restore(flags);
124 }
125 static __inline__ void tx_dump_log(void)
126 {
127         int i, this;
128
129         this = txlog_cur_entry;
130         for (i = 0; i < TX_LOG_LEN; i++) {
131                 printk("TXLOG[%d]: j[%08x] tx[N(%d)O(%d)] action[%08x] stat[%08x]\n", i,
132                        tx_log[this].tstamp,
133                        tx_log[this].tx_new, tx_log[this].tx_old,
134                        tx_log[this].action, tx_log[this].status);
135                 this = (this + 1) & (TX_LOG_LEN - 1);
136         }
137 }
138 static __inline__ void tx_dump_ring(struct happy_meal *hp)
139 {
140         struct hmeal_init_block *hb = hp->happy_block;
141         struct happy_meal_txd *tp = &hb->happy_meal_txd[0];
142         int i;
143
144         for (i = 0; i < TX_RING_SIZE; i+=4) {
145                 printk("TXD[%d..%d]: [%08x:%08x] [%08x:%08x] [%08x:%08x] [%08x:%08x]\n",
146                        i, i + 4,
147                        le32_to_cpu(tp[i].tx_flags), le32_to_cpu(tp[i].tx_addr),
148                        le32_to_cpu(tp[i + 1].tx_flags), le32_to_cpu(tp[i + 1].tx_addr),
149                        le32_to_cpu(tp[i + 2].tx_flags), le32_to_cpu(tp[i + 2].tx_addr),
150                        le32_to_cpu(tp[i + 3].tx_flags), le32_to_cpu(tp[i + 3].tx_addr));
151         }
152 }
153 #else
154 #define tx_add_log(hp, a, s)            do { } while(0)
155 #define tx_dump_log()                   do { } while(0)
156 #define tx_dump_ring(hp)                do { } while(0)
157 #endif
158
159 #ifdef HMEDEBUG
160 #define HMD(x)  printk x
161 #else
162 #define HMD(x)
163 #endif
164
165 /* #define AUTO_SWITCH_DEBUG */
166
167 #ifdef AUTO_SWITCH_DEBUG
168 #define ASD(x)  printk x
169 #else
170 #define ASD(x)
171 #endif
172
173 #define DEFAULT_IPG0      16 /* For lance-mode only */
174 #define DEFAULT_IPG1       8 /* For all modes */
175 #define DEFAULT_IPG2       4 /* For all modes */
176 #define DEFAULT_JAMSIZE    4 /* Toe jam */
177
178 /* NOTE: In the descriptor writes one _must_ write the address
179  *       member _first_.  The card must not be allowed to see
180  *       the updated descriptor flags until the address is
181  *       correct.  I've added a write memory barrier between
182  *       the two stores so that I can sleep well at night... -DaveM
183  */
184
185 #if defined(CONFIG_SBUS) && defined(CONFIG_PCI)
186 static void sbus_hme_write32(void __iomem *reg, u32 val)
187 {
188         sbus_writel(val, reg);
189 }
190
191 static u32 sbus_hme_read32(void __iomem *reg)
192 {
193         return sbus_readl(reg);
194 }
195
196 static void sbus_hme_write_rxd(struct happy_meal_rxd *rxd, u32 flags, u32 addr)
197 {
198         rxd->rx_addr = (__force hme32)addr;
199         wmb();
200         rxd->rx_flags = (__force hme32)flags;
201 }
202
203 static void sbus_hme_write_txd(struct happy_meal_txd *txd, u32 flags, u32 addr)
204 {
205         txd->tx_addr = (__force hme32)addr;
206         wmb();
207         txd->tx_flags = (__force hme32)flags;
208 }
209
210 static u32 sbus_hme_read_desc32(hme32 *p)
211 {
212         return (__force u32)*p;
213 }
214
215 static void pci_hme_write32(void __iomem *reg, u32 val)
216 {
217         writel(val, reg);
218 }
219
220 static u32 pci_hme_read32(void __iomem *reg)
221 {
222         return readl(reg);
223 }
224
225 static void pci_hme_write_rxd(struct happy_meal_rxd *rxd, u32 flags, u32 addr)
226 {
227         rxd->rx_addr = (__force hme32)cpu_to_le32(addr);
228         wmb();
229         rxd->rx_flags = (__force hme32)cpu_to_le32(flags);
230 }
231
232 static void pci_hme_write_txd(struct happy_meal_txd *txd, u32 flags, u32 addr)
233 {
234         txd->tx_addr = (__force hme32)cpu_to_le32(addr);
235         wmb();
236         txd->tx_flags = (__force hme32)cpu_to_le32(flags);
237 }
238
239 static u32 pci_hme_read_desc32(hme32 *p)
240 {
241         return le32_to_cpup((__le32 *)p);
242 }
243
244 #define hme_write32(__hp, __reg, __val) \
245         ((__hp)->write32((__reg), (__val)))
246 #define hme_read32(__hp, __reg) \
247         ((__hp)->read32(__reg))
248 #define hme_write_rxd(__hp, __rxd, __flags, __addr) \
249         ((__hp)->write_rxd((__rxd), (__flags), (__addr)))
250 #define hme_write_txd(__hp, __txd, __flags, __addr) \
251         ((__hp)->write_txd((__txd), (__flags), (__addr)))
252 #define hme_read_desc32(__hp, __p) \
253         ((__hp)->read_desc32(__p))
254 #define hme_dma_map(__hp, __ptr, __size, __dir) \
255         ((__hp)->dma_map((__hp)->dma_dev, (__ptr), (__size), (__dir)))
256 #define hme_dma_unmap(__hp, __addr, __size, __dir) \
257         ((__hp)->dma_unmap((__hp)->dma_dev, (__addr), (__size), (__dir)))
258 #define hme_dma_sync_for_cpu(__hp, __addr, __size, __dir) \
259         ((__hp)->dma_sync_for_cpu((__hp)->dma_dev, (__addr), (__size), (__dir)))
260 #define hme_dma_sync_for_device(__hp, __addr, __size, __dir) \
261         ((__hp)->dma_sync_for_device((__hp)->dma_dev, (__addr), (__size), (__dir)))
262 #else
263 #ifdef CONFIG_SBUS
264 /* SBUS only compilation */
265 #define hme_write32(__hp, __reg, __val) \
266         sbus_writel((__val), (__reg))
267 #define hme_read32(__hp, __reg) \
268         sbus_readl(__reg)
269 #define hme_write_rxd(__hp, __rxd, __flags, __addr) \
270 do {    (__rxd)->rx_addr = (__force hme32)(u32)(__addr); \
271         wmb(); \
272         (__rxd)->rx_flags = (__force hme32)(u32)(__flags); \
273 } while(0)
274 #define hme_write_txd(__hp, __txd, __flags, __addr) \
275 do {    (__txd)->tx_addr = (__force hme32)(u32)(__addr); \
276         wmb(); \
277         (__txd)->tx_flags = (__force hme32)(u32)(__flags); \
278 } while(0)
279 #define hme_read_desc32(__hp, __p)      ((__force u32)(hme32)*(__p))
280 #define hme_dma_map(__hp, __ptr, __size, __dir) \
281         dma_map_single((__hp)->dma_dev, (__ptr), (__size), (__dir))
282 #define hme_dma_unmap(__hp, __addr, __size, __dir) \
283         dma_unmap_single((__hp)->dma_dev, (__addr), (__size), (__dir))
284 #define hme_dma_sync_for_cpu(__hp, __addr, __size, __dir) \
285         dma_dma_sync_single_for_cpu((__hp)->dma_dev, (__addr), (__size), (__dir))
286 #define hme_dma_sync_for_device(__hp, __addr, __size, __dir) \
287         dma_dma_sync_single_for_device((__hp)->dma_dev, (__addr), (__size), (__dir))
288 #else
289 /* PCI only compilation */
290 #define hme_write32(__hp, __reg, __val) \
291         writel((__val), (__reg))
292 #define hme_read32(__hp, __reg) \
293         readl(__reg)
294 #define hme_write_rxd(__hp, __rxd, __flags, __addr) \
295 do {    (__rxd)->rx_addr = (__force hme32)cpu_to_le32(__addr); \
296         wmb(); \
297         (__rxd)->rx_flags = (__force hme32)cpu_to_le32(__flags); \
298 } while(0)
299 #define hme_write_txd(__hp, __txd, __flags, __addr) \
300 do {    (__txd)->tx_addr = (__force hme32)cpu_to_le32(__addr); \
301         wmb(); \
302         (__txd)->tx_flags = (__force hme32)cpu_to_le32(__flags); \
303 } while(0)
304 static inline u32 hme_read_desc32(struct happy_meal *hp, hme32 *p)
305 {
306         return le32_to_cpup((__le32 *)p);
307 }
308 #define hme_dma_map(__hp, __ptr, __size, __dir) \
309         pci_map_single((__hp)->dma_dev, (__ptr), (__size), (__dir))
310 #define hme_dma_unmap(__hp, __addr, __size, __dir) \
311         pci_unmap_single((__hp)->dma_dev, (__addr), (__size), (__dir))
312 #define hme_dma_sync_for_cpu(__hp, __addr, __size, __dir) \
313         pci_dma_sync_single_for_cpu((__hp)->dma_dev, (__addr), (__size), (__dir))
314 #define hme_dma_sync_for_device(__hp, __addr, __size, __dir) \
315         pci_dma_sync_single_for_device((__hp)->dma_dev, (__addr), (__size), (__dir))
316 #endif
317 #endif
318
319
320 /* Oh yes, the MIF BitBang is mighty fun to program.  BitBucket is more like it. */
321 static void BB_PUT_BIT(struct happy_meal *hp, void __iomem *tregs, int bit)
322 {
323         hme_write32(hp, tregs + TCVR_BBDATA, bit);
324         hme_write32(hp, tregs + TCVR_BBCLOCK, 0);
325         hme_write32(hp, tregs + TCVR_BBCLOCK, 1);
326 }
327
328 #if 0
329 static u32 BB_GET_BIT(struct happy_meal *hp, void __iomem *tregs, int internal)
330 {
331         u32 ret;
332
333         hme_write32(hp, tregs + TCVR_BBCLOCK, 0);
334         hme_write32(hp, tregs + TCVR_BBCLOCK, 1);
335         ret = hme_read32(hp, tregs + TCVR_CFG);
336         if (internal)
337                 ret &= TCV_CFG_MDIO0;
338         else
339                 ret &= TCV_CFG_MDIO1;
340
341         return ret;
342 }
343 #endif
344
345 static u32 BB_GET_BIT2(struct happy_meal *hp, void __iomem *tregs, int internal)
346 {
347         u32 retval;
348
349         hme_write32(hp, tregs + TCVR_BBCLOCK, 0);
350         udelay(1);
351         retval = hme_read32(hp, tregs + TCVR_CFG);
352         if (internal)
353                 retval &= TCV_CFG_MDIO0;
354         else
355                 retval &= TCV_CFG_MDIO1;
356         hme_write32(hp, tregs + TCVR_BBCLOCK, 1);
357
358         return retval;
359 }
360
361 #define TCVR_FAILURE      0x80000000     /* Impossible MIF read value */
362
363 static int happy_meal_bb_read(struct happy_meal *hp,
364                               void __iomem *tregs, int reg)
365 {
366         u32 tmp;
367         int retval = 0;
368         int i;
369
370         ASD(("happy_meal_bb_read: reg=%d ", reg));
371
372         /* Enable the MIF BitBang outputs. */
373         hme_write32(hp, tregs + TCVR_BBOENAB, 1);
374
375         /* Force BitBang into the idle state. */
376         for (i = 0; i < 32; i++)
377                 BB_PUT_BIT(hp, tregs, 1);
378
379         /* Give it the read sequence. */
380         BB_PUT_BIT(hp, tregs, 0);
381         BB_PUT_BIT(hp, tregs, 1);
382         BB_PUT_BIT(hp, tregs, 1);
383         BB_PUT_BIT(hp, tregs, 0);
384
385         /* Give it the PHY address. */
386         tmp = hp->paddr & 0xff;
387         for (i = 4; i >= 0; i--)
388                 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
389
390         /* Tell it what register we want to read. */
391         tmp = (reg & 0xff);
392         for (i = 4; i >= 0; i--)
393                 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
394
395         /* Close down the MIF BitBang outputs. */
396         hme_write32(hp, tregs + TCVR_BBOENAB, 0);
397
398         /* Now read in the value. */
399         (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
400         for (i = 15; i >= 0; i--)
401                 retval |= BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
402         (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
403         (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
404         (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
405         ASD(("value=%x\n", retval));
406         return retval;
407 }
408
409 static void happy_meal_bb_write(struct happy_meal *hp,
410                                 void __iomem *tregs, int reg,
411                                 unsigned short value)
412 {
413         u32 tmp;
414         int i;
415
416         ASD(("happy_meal_bb_write: reg=%d value=%x\n", reg, value));
417
418         /* Enable the MIF BitBang outputs. */
419         hme_write32(hp, tregs + TCVR_BBOENAB, 1);
420
421         /* Force BitBang into the idle state. */
422         for (i = 0; i < 32; i++)
423                 BB_PUT_BIT(hp, tregs, 1);
424
425         /* Give it write sequence. */
426         BB_PUT_BIT(hp, tregs, 0);
427         BB_PUT_BIT(hp, tregs, 1);
428         BB_PUT_BIT(hp, tregs, 0);
429         BB_PUT_BIT(hp, tregs, 1);
430
431         /* Give it the PHY address. */
432         tmp = (hp->paddr & 0xff);
433         for (i = 4; i >= 0; i--)
434                 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
435
436         /* Tell it what register we will be writing. */
437         tmp = (reg & 0xff);
438         for (i = 4; i >= 0; i--)
439                 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
440
441         /* Tell it to become ready for the bits. */
442         BB_PUT_BIT(hp, tregs, 1);
443         BB_PUT_BIT(hp, tregs, 0);
444
445         for (i = 15; i >= 0; i--)
446                 BB_PUT_BIT(hp, tregs, ((value >> i) & 1));
447
448         /* Close down the MIF BitBang outputs. */
449         hme_write32(hp, tregs + TCVR_BBOENAB, 0);
450 }
451
452 #define TCVR_READ_TRIES   16
453
454 static int happy_meal_tcvr_read(struct happy_meal *hp,
455                                 void __iomem *tregs, int reg)
456 {
457         int tries = TCVR_READ_TRIES;
458         int retval;
459
460         ASD(("happy_meal_tcvr_read: reg=0x%02x ", reg));
461         if (hp->tcvr_type == none) {
462                 ASD(("no transceiver, value=TCVR_FAILURE\n"));
463                 return TCVR_FAILURE;
464         }
465
466         if (!(hp->happy_flags & HFLAG_FENABLE)) {
467                 ASD(("doing bit bang\n"));
468                 return happy_meal_bb_read(hp, tregs, reg);
469         }
470
471         hme_write32(hp, tregs + TCVR_FRAME,
472                     (FRAME_READ | (hp->paddr << 23) | ((reg & 0xff) << 18)));
473         while (!(hme_read32(hp, tregs + TCVR_FRAME) & 0x10000) && --tries)
474                 udelay(20);
475         if (!tries) {
476                 printk(KERN_ERR "happy meal: Aieee, transceiver MIF read bolixed\n");
477                 return TCVR_FAILURE;
478         }
479         retval = hme_read32(hp, tregs + TCVR_FRAME) & 0xffff;
480         ASD(("value=%04x\n", retval));
481         return retval;
482 }
483
484 #define TCVR_WRITE_TRIES  16
485
486 static void happy_meal_tcvr_write(struct happy_meal *hp,
487                                   void __iomem *tregs, int reg,
488                                   unsigned short value)
489 {
490         int tries = TCVR_WRITE_TRIES;
491
492         ASD(("happy_meal_tcvr_write: reg=0x%02x value=%04x\n", reg, value));
493
494         /* Welcome to Sun Microsystems, can I take your order please? */
495         if (!(hp->happy_flags & HFLAG_FENABLE)) {
496                 happy_meal_bb_write(hp, tregs, reg, value);
497                 return;
498         }
499
500         /* Would you like fries with that? */
501         hme_write32(hp, tregs + TCVR_FRAME,
502                     (FRAME_WRITE | (hp->paddr << 23) |
503                      ((reg & 0xff) << 18) | (value & 0xffff)));
504         while (!(hme_read32(hp, tregs + TCVR_FRAME) & 0x10000) && --tries)
505                 udelay(20);
506
507         /* Anything else? */
508         if (!tries)
509                 printk(KERN_ERR "happy meal: Aieee, transceiver MIF write bolixed\n");
510
511         /* Fifty-two cents is your change, have a nice day. */
512 }
513
514 /* Auto negotiation.  The scheme is very simple.  We have a timer routine
515  * that keeps watching the auto negotiation process as it progresses.
516  * The DP83840 is first told to start doing it's thing, we set up the time
517  * and place the timer state machine in it's initial state.
518  *
519  * Here the timer peeks at the DP83840 status registers at each click to see
520  * if the auto negotiation has completed, we assume here that the DP83840 PHY
521  * will time out at some point and just tell us what (didn't) happen.  For
522  * complete coverage we only allow so many of the ticks at this level to run,
523  * when this has expired we print a warning message and try another strategy.
524  * This "other" strategy is to force the interface into various speed/duplex
525  * configurations and we stop when we see a link-up condition before the
526  * maximum number of "peek" ticks have occurred.
527  *
528  * Once a valid link status has been detected we configure the BigMAC and
529  * the rest of the Happy Meal to speak the most efficient protocol we could
530  * get a clean link for.  The priority for link configurations, highest first
531  * is:
532  *                 100 Base-T Full Duplex
533  *                 100 Base-T Half Duplex
534  *                 10 Base-T Full Duplex
535  *                 10 Base-T Half Duplex
536  *
537  * We start a new timer now, after a successful auto negotiation status has
538  * been detected.  This timer just waits for the link-up bit to get set in
539  * the BMCR of the DP83840.  When this occurs we print a kernel log message
540  * describing the link type in use and the fact that it is up.
541  *
542  * If a fatal error of some sort is signalled and detected in the interrupt
543  * service routine, and the chip is reset, or the link is ifconfig'd down
544  * and then back up, this entire process repeats itself all over again.
545  */
546 static int try_next_permutation(struct happy_meal *hp, void __iomem *tregs)
547 {
548         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
549
550         /* Downgrade from full to half duplex.  Only possible
551          * via ethtool.
552          */
553         if (hp->sw_bmcr & BMCR_FULLDPLX) {
554                 hp->sw_bmcr &= ~(BMCR_FULLDPLX);
555                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
556                 return 0;
557         }
558
559         /* Downgrade from 100 to 10. */
560         if (hp->sw_bmcr & BMCR_SPEED100) {
561                 hp->sw_bmcr &= ~(BMCR_SPEED100);
562                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
563                 return 0;
564         }
565
566         /* We've tried everything. */
567         return -1;
568 }
569
570 static void display_link_mode(struct happy_meal *hp, void __iomem *tregs)
571 {
572         printk(KERN_INFO "%s: Link is up using ", hp->dev->name);
573         if (hp->tcvr_type == external)
574                 printk("external ");
575         else
576                 printk("internal ");
577         printk("transceiver at ");
578         hp->sw_lpa = happy_meal_tcvr_read(hp, tregs, MII_LPA);
579         if (hp->sw_lpa & (LPA_100HALF | LPA_100FULL)) {
580                 if (hp->sw_lpa & LPA_100FULL)
581                         printk("100Mb/s, Full Duplex.\n");
582                 else
583                         printk("100Mb/s, Half Duplex.\n");
584         } else {
585                 if (hp->sw_lpa & LPA_10FULL)
586                         printk("10Mb/s, Full Duplex.\n");
587                 else
588                         printk("10Mb/s, Half Duplex.\n");
589         }
590 }
591
592 static void display_forced_link_mode(struct happy_meal *hp, void __iomem *tregs)
593 {
594         printk(KERN_INFO "%s: Link has been forced up using ", hp->dev->name);
595         if (hp->tcvr_type == external)
596                 printk("external ");
597         else
598                 printk("internal ");
599         printk("transceiver at ");
600         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
601         if (hp->sw_bmcr & BMCR_SPEED100)
602                 printk("100Mb/s, ");
603         else
604                 printk("10Mb/s, ");
605         if (hp->sw_bmcr & BMCR_FULLDPLX)
606                 printk("Full Duplex.\n");
607         else
608                 printk("Half Duplex.\n");
609 }
610
611 static int set_happy_link_modes(struct happy_meal *hp, void __iomem *tregs)
612 {
613         int full;
614
615         /* All we care about is making sure the bigmac tx_cfg has a
616          * proper duplex setting.
617          */
618         if (hp->timer_state == arbwait) {
619                 hp->sw_lpa = happy_meal_tcvr_read(hp, tregs, MII_LPA);
620                 if (!(hp->sw_lpa & (LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL)))
621                         goto no_response;
622                 if (hp->sw_lpa & LPA_100FULL)
623                         full = 1;
624                 else if (hp->sw_lpa & LPA_100HALF)
625                         full = 0;
626                 else if (hp->sw_lpa & LPA_10FULL)
627                         full = 1;
628                 else
629                         full = 0;
630         } else {
631                 /* Forcing a link mode. */
632                 hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
633                 if (hp->sw_bmcr & BMCR_FULLDPLX)
634                         full = 1;
635                 else
636                         full = 0;
637         }
638
639         /* Before changing other bits in the tx_cfg register, and in
640          * general any of other the TX config registers too, you
641          * must:
642          * 1) Clear Enable
643          * 2) Poll with reads until that bit reads back as zero
644          * 3) Make TX configuration changes
645          * 4) Set Enable once more
646          */
647         hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
648                     hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) &
649                     ~(BIGMAC_TXCFG_ENABLE));
650         while (hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) & BIGMAC_TXCFG_ENABLE)
651                 barrier();
652         if (full) {
653                 hp->happy_flags |= HFLAG_FULL;
654                 hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
655                             hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) |
656                             BIGMAC_TXCFG_FULLDPLX);
657         } else {
658                 hp->happy_flags &= ~(HFLAG_FULL);
659                 hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
660                             hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) &
661                             ~(BIGMAC_TXCFG_FULLDPLX));
662         }
663         hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
664                     hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) |
665                     BIGMAC_TXCFG_ENABLE);
666         return 0;
667 no_response:
668         return 1;
669 }
670
671 static int happy_meal_init(struct happy_meal *hp);
672
673 static int is_lucent_phy(struct happy_meal *hp)
674 {
675         void __iomem *tregs = hp->tcvregs;
676         unsigned short mr2, mr3;
677         int ret = 0;
678
679         mr2 = happy_meal_tcvr_read(hp, tregs, 2);
680         mr3 = happy_meal_tcvr_read(hp, tregs, 3);
681         if ((mr2 & 0xffff) == 0x0180 &&
682             ((mr3 & 0xffff) >> 10) == 0x1d)
683                 ret = 1;
684
685         return ret;
686 }
687
688 static void happy_meal_timer(unsigned long data)
689 {
690         struct happy_meal *hp = (struct happy_meal *) data;
691         void __iomem *tregs = hp->tcvregs;
692         int restart_timer = 0;
693
694         spin_lock_irq(&hp->happy_lock);
695
696         hp->timer_ticks++;
697         switch(hp->timer_state) {
698         case arbwait:
699                 /* Only allow for 5 ticks, thats 10 seconds and much too
700                  * long to wait for arbitration to complete.
701                  */
702                 if (hp->timer_ticks >= 10) {
703                         /* Enter force mode. */
704         do_force_mode:
705                         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
706                         printk(KERN_NOTICE "%s: Auto-Negotiation unsuccessful, trying force link mode\n",
707                                hp->dev->name);
708                         hp->sw_bmcr = BMCR_SPEED100;
709                         happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
710
711                         if (!is_lucent_phy(hp)) {
712                                 /* OK, seems we need do disable the transceiver for the first
713                                  * tick to make sure we get an accurate link state at the
714                                  * second tick.
715                                  */
716                                 hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs, DP83840_CSCONFIG);
717                                 hp->sw_csconfig &= ~(CSCONFIG_TCVDISAB);
718                                 happy_meal_tcvr_write(hp, tregs, DP83840_CSCONFIG, hp->sw_csconfig);
719                         }
720                         hp->timer_state = ltrywait;
721                         hp->timer_ticks = 0;
722                         restart_timer = 1;
723                 } else {
724                         /* Anything interesting happen? */
725                         hp->sw_bmsr = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
726                         if (hp->sw_bmsr & BMSR_ANEGCOMPLETE) {
727                                 int ret;
728
729                                 /* Just what we've been waiting for... */
730                                 ret = set_happy_link_modes(hp, tregs);
731                                 if (ret) {
732                                         /* Ooops, something bad happened, go to force
733                                          * mode.
734                                          *
735                                          * XXX Broken hubs which don't support 802.3u
736                                          * XXX auto-negotiation make this happen as well.
737                                          */
738                                         goto do_force_mode;
739                                 }
740
741                                 /* Success, at least so far, advance our state engine. */
742                                 hp->timer_state = lupwait;
743                                 restart_timer = 1;
744                         } else {
745                                 restart_timer = 1;
746                         }
747                 }
748                 break;
749
750         case lupwait:
751                 /* Auto negotiation was successful and we are awaiting a
752                  * link up status.  I have decided to let this timer run
753                  * forever until some sort of error is signalled, reporting
754                  * a message to the user at 10 second intervals.
755                  */
756                 hp->sw_bmsr = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
757                 if (hp->sw_bmsr & BMSR_LSTATUS) {
758                         /* Wheee, it's up, display the link mode in use and put
759                          * the timer to sleep.
760                          */
761                         display_link_mode(hp, tregs);
762                         hp->timer_state = asleep;
763                         restart_timer = 0;
764                 } else {
765                         if (hp->timer_ticks >= 10) {
766                                 printk(KERN_NOTICE "%s: Auto negotiation successful, link still "
767                                        "not completely up.\n", hp->dev->name);
768                                 hp->timer_ticks = 0;
769                                 restart_timer = 1;
770                         } else {
771                                 restart_timer = 1;
772                         }
773                 }
774                 break;
775
776         case ltrywait:
777                 /* Making the timeout here too long can make it take
778                  * annoyingly long to attempt all of the link mode
779                  * permutations, but then again this is essentially
780                  * error recovery code for the most part.
781                  */
782                 hp->sw_bmsr = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
783                 hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs, DP83840_CSCONFIG);
784                 if (hp->timer_ticks == 1) {
785                         if (!is_lucent_phy(hp)) {
786                                 /* Re-enable transceiver, we'll re-enable the transceiver next
787                                  * tick, then check link state on the following tick.
788                                  */
789                                 hp->sw_csconfig |= CSCONFIG_TCVDISAB;
790                                 happy_meal_tcvr_write(hp, tregs,
791                                                       DP83840_CSCONFIG, hp->sw_csconfig);
792                         }
793                         restart_timer = 1;
794                         break;
795                 }
796                 if (hp->timer_ticks == 2) {
797                         if (!is_lucent_phy(hp)) {
798                                 hp->sw_csconfig &= ~(CSCONFIG_TCVDISAB);
799                                 happy_meal_tcvr_write(hp, tregs,
800                                                       DP83840_CSCONFIG, hp->sw_csconfig);
801                         }
802                         restart_timer = 1;
803                         break;
804                 }
805                 if (hp->sw_bmsr & BMSR_LSTATUS) {
806                         /* Force mode selection success. */
807                         display_forced_link_mode(hp, tregs);
808                         set_happy_link_modes(hp, tregs); /* XXX error? then what? */
809                         hp->timer_state = asleep;
810                         restart_timer = 0;
811                 } else {
812                         if (hp->timer_ticks >= 4) { /* 6 seconds or so... */
813                                 int ret;
814
815                                 ret = try_next_permutation(hp, tregs);
816                                 if (ret == -1) {
817                                         /* Aieee, tried them all, reset the
818                                          * chip and try all over again.
819                                          */
820
821                                         /* Let the user know... */
822                                         printk(KERN_NOTICE "%s: Link down, cable problem?\n",
823                                                hp->dev->name);
824
825                                         ret = happy_meal_init(hp);
826                                         if (ret) {
827                                                 /* ho hum... */
828                                                 printk(KERN_ERR "%s: Error, cannot re-init the "
829                                                        "Happy Meal.\n", hp->dev->name);
830                                         }
831                                         goto out;
832                                 }
833                                 if (!is_lucent_phy(hp)) {
834                                         hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs,
835                                                                                DP83840_CSCONFIG);
836                                         hp->sw_csconfig |= CSCONFIG_TCVDISAB;
837                                         happy_meal_tcvr_write(hp, tregs,
838                                                               DP83840_CSCONFIG, hp->sw_csconfig);
839                                 }
840                                 hp->timer_ticks = 0;
841                                 restart_timer = 1;
842                         } else {
843                                 restart_timer = 1;
844                         }
845                 }
846                 break;
847
848         case asleep:
849         default:
850                 /* Can't happens.... */
851                 printk(KERN_ERR "%s: Aieee, link timer is asleep but we got one anyways!\n",
852                        hp->dev->name);
853                 restart_timer = 0;
854                 hp->timer_ticks = 0;
855                 hp->timer_state = asleep; /* foo on you */
856                 break;
857         };
858
859         if (restart_timer) {
860                 hp->happy_timer.expires = jiffies + ((12 * HZ)/10); /* 1.2 sec. */
861                 add_timer(&hp->happy_timer);
862         }
863
864 out:
865         spin_unlock_irq(&hp->happy_lock);
866 }
867
868 #define TX_RESET_TRIES     32
869 #define RX_RESET_TRIES     32
870
871 /* hp->happy_lock must be held */
872 static void happy_meal_tx_reset(struct happy_meal *hp, void __iomem *bregs)
873 {
874         int tries = TX_RESET_TRIES;
875
876         HMD(("happy_meal_tx_reset: reset, "));
877
878         /* Would you like to try our SMCC Delux? */
879         hme_write32(hp, bregs + BMAC_TXSWRESET, 0);
880         while ((hme_read32(hp, bregs + BMAC_TXSWRESET) & 1) && --tries)
881                 udelay(20);
882
883         /* Lettuce, tomato, buggy hardware (no extra charge)? */
884         if (!tries)
885                 printk(KERN_ERR "happy meal: Transceiver BigMac ATTACK!");
886
887         /* Take care. */
888         HMD(("done\n"));
889 }
890
891 /* hp->happy_lock must be held */
892 static void happy_meal_rx_reset(struct happy_meal *hp, void __iomem *bregs)
893 {
894         int tries = RX_RESET_TRIES;
895
896         HMD(("happy_meal_rx_reset: reset, "));
897
898         /* We have a special on GNU/Viking hardware bugs today. */
899         hme_write32(hp, bregs + BMAC_RXSWRESET, 0);
900         while ((hme_read32(hp, bregs + BMAC_RXSWRESET) & 1) && --tries)
901                 udelay(20);
902
903         /* Will that be all? */
904         if (!tries)
905                 printk(KERN_ERR "happy meal: Receiver BigMac ATTACK!");
906
907         /* Don't forget your vik_1137125_wa.  Have a nice day. */
908         HMD(("done\n"));
909 }
910
911 #define STOP_TRIES         16
912
913 /* hp->happy_lock must be held */
914 static void happy_meal_stop(struct happy_meal *hp, void __iomem *gregs)
915 {
916         int tries = STOP_TRIES;
917
918         HMD(("happy_meal_stop: reset, "));
919
920         /* We're consolidating our STB products, it's your lucky day. */
921         hme_write32(hp, gregs + GREG_SWRESET, GREG_RESET_ALL);
922         while (hme_read32(hp, gregs + GREG_SWRESET) && --tries)
923                 udelay(20);
924
925         /* Come back next week when we are "Sun Microelectronics". */
926         if (!tries)
927                 printk(KERN_ERR "happy meal: Fry guys.");
928
929         /* Remember: "Different name, same old buggy as shit hardware." */
930         HMD(("done\n"));
931 }
932
933 /* hp->happy_lock must be held */
934 static void happy_meal_get_counters(struct happy_meal *hp, void __iomem *bregs)
935 {
936         struct net_device_stats *stats = &hp->net_stats;
937
938         stats->rx_crc_errors += hme_read32(hp, bregs + BMAC_RCRCECTR);
939         hme_write32(hp, bregs + BMAC_RCRCECTR, 0);
940
941         stats->rx_frame_errors += hme_read32(hp, bregs + BMAC_UNALECTR);
942         hme_write32(hp, bregs + BMAC_UNALECTR, 0);
943
944         stats->rx_length_errors += hme_read32(hp, bregs + BMAC_GLECTR);
945         hme_write32(hp, bregs + BMAC_GLECTR, 0);
946
947         stats->tx_aborted_errors += hme_read32(hp, bregs + BMAC_EXCTR);
948
949         stats->collisions +=
950                 (hme_read32(hp, bregs + BMAC_EXCTR) +
951                  hme_read32(hp, bregs + BMAC_LTCTR));
952         hme_write32(hp, bregs + BMAC_EXCTR, 0);
953         hme_write32(hp, bregs + BMAC_LTCTR, 0);
954 }
955
956 /* hp->happy_lock must be held */
957 static void happy_meal_poll_stop(struct happy_meal *hp, void __iomem *tregs)
958 {
959         ASD(("happy_meal_poll_stop: "));
960
961         /* If polling disabled or not polling already, nothing to do. */
962         if ((hp->happy_flags & (HFLAG_POLLENABLE | HFLAG_POLL)) !=
963            (HFLAG_POLLENABLE | HFLAG_POLL)) {
964                 HMD(("not polling, return\n"));
965                 return;
966         }
967
968         /* Shut up the MIF. */
969         ASD(("were polling, mif ints off, "));
970         hme_write32(hp, tregs + TCVR_IMASK, 0xffff);
971
972         /* Turn off polling. */
973         ASD(("polling off, "));
974         hme_write32(hp, tregs + TCVR_CFG,
975                     hme_read32(hp, tregs + TCVR_CFG) & ~(TCV_CFG_PENABLE));
976
977         /* We are no longer polling. */
978         hp->happy_flags &= ~(HFLAG_POLL);
979
980         /* Let the bits set. */
981         udelay(200);
982         ASD(("done\n"));
983 }
984
985 /* Only Sun can take such nice parts and fuck up the programming interface
986  * like this.  Good job guys...
987  */
988 #define TCVR_RESET_TRIES       16 /* It should reset quickly        */
989 #define TCVR_UNISOLATE_TRIES   32 /* Dis-isolation can take longer. */
990
991 /* hp->happy_lock must be held */
992 static int happy_meal_tcvr_reset(struct happy_meal *hp, void __iomem *tregs)
993 {
994         u32 tconfig;
995         int result, tries = TCVR_RESET_TRIES;
996
997         tconfig = hme_read32(hp, tregs + TCVR_CFG);
998         ASD(("happy_meal_tcvr_reset: tcfg<%08lx> ", tconfig));
999         if (hp->tcvr_type == external) {
1000                 ASD(("external<"));
1001                 hme_write32(hp, tregs + TCVR_CFG, tconfig & ~(TCV_CFG_PSELECT));
1002                 hp->tcvr_type = internal;
1003                 hp->paddr = TCV_PADDR_ITX;
1004                 ASD(("ISOLATE,"));
1005                 happy_meal_tcvr_write(hp, tregs, MII_BMCR,
1006                                       (BMCR_LOOPBACK|BMCR_PDOWN|BMCR_ISOLATE));
1007                 result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1008                 if (result == TCVR_FAILURE) {
1009                         ASD(("phyread_fail>\n"));
1010                         return -1;
1011                 }
1012                 ASD(("phyread_ok,PSELECT>"));
1013                 hme_write32(hp, tregs + TCVR_CFG, tconfig | TCV_CFG_PSELECT);
1014                 hp->tcvr_type = external;
1015                 hp->paddr = TCV_PADDR_ETX;
1016         } else {
1017                 if (tconfig & TCV_CFG_MDIO1) {
1018                         ASD(("internal<PSELECT,"));
1019                         hme_write32(hp, tregs + TCVR_CFG, (tconfig | TCV_CFG_PSELECT));
1020                         ASD(("ISOLATE,"));
1021                         happy_meal_tcvr_write(hp, tregs, MII_BMCR,
1022                                               (BMCR_LOOPBACK|BMCR_PDOWN|BMCR_ISOLATE));
1023                         result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1024                         if (result == TCVR_FAILURE) {
1025                                 ASD(("phyread_fail>\n"));
1026                                 return -1;
1027                         }
1028                         ASD(("phyread_ok,~PSELECT>"));
1029                         hme_write32(hp, tregs + TCVR_CFG, (tconfig & ~(TCV_CFG_PSELECT)));
1030                         hp->tcvr_type = internal;
1031                         hp->paddr = TCV_PADDR_ITX;
1032                 }
1033         }
1034
1035         ASD(("BMCR_RESET "));
1036         happy_meal_tcvr_write(hp, tregs, MII_BMCR, BMCR_RESET);
1037
1038         while (--tries) {
1039                 result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1040                 if (result == TCVR_FAILURE)
1041                         return -1;
1042                 hp->sw_bmcr = result;
1043                 if (!(result & BMCR_RESET))
1044                         break;
1045                 udelay(20);
1046         }
1047         if (!tries) {
1048                 ASD(("BMCR RESET FAILED!\n"));
1049                 return -1;
1050         }
1051         ASD(("RESET_OK\n"));
1052
1053         /* Get fresh copies of the PHY registers. */
1054         hp->sw_bmsr      = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
1055         hp->sw_physid1   = happy_meal_tcvr_read(hp, tregs, MII_PHYSID1);
1056         hp->sw_physid2   = happy_meal_tcvr_read(hp, tregs, MII_PHYSID2);
1057         hp->sw_advertise = happy_meal_tcvr_read(hp, tregs, MII_ADVERTISE);
1058
1059         ASD(("UNISOLATE"));
1060         hp->sw_bmcr &= ~(BMCR_ISOLATE);
1061         happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1062
1063         tries = TCVR_UNISOLATE_TRIES;
1064         while (--tries) {
1065                 result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1066                 if (result == TCVR_FAILURE)
1067                         return -1;
1068                 if (!(result & BMCR_ISOLATE))
1069                         break;
1070                 udelay(20);
1071         }
1072         if (!tries) {
1073                 ASD((" FAILED!\n"));
1074                 return -1;
1075         }
1076         ASD((" SUCCESS and CSCONFIG_DFBYPASS\n"));
1077         if (!is_lucent_phy(hp)) {
1078                 result = happy_meal_tcvr_read(hp, tregs,
1079                                               DP83840_CSCONFIG);
1080                 happy_meal_tcvr_write(hp, tregs,
1081                                       DP83840_CSCONFIG, (result | CSCONFIG_DFBYPASS));
1082         }
1083         return 0;
1084 }
1085
1086 /* Figure out whether we have an internal or external transceiver.
1087  *
1088  * hp->happy_lock must be held
1089  */
1090 static void happy_meal_transceiver_check(struct happy_meal *hp, void __iomem *tregs)
1091 {
1092         unsigned long tconfig = hme_read32(hp, tregs + TCVR_CFG);
1093
1094         ASD(("happy_meal_transceiver_check: tcfg=%08lx ", tconfig));
1095         if (hp->happy_flags & HFLAG_POLL) {
1096                 /* If we are polling, we must stop to get the transceiver type. */
1097                 ASD(("<polling> "));
1098                 if (hp->tcvr_type == internal) {
1099                         if (tconfig & TCV_CFG_MDIO1) {
1100                                 ASD(("<internal> <poll stop> "));
1101                                 happy_meal_poll_stop(hp, tregs);
1102                                 hp->paddr = TCV_PADDR_ETX;
1103                                 hp->tcvr_type = external;
1104                                 ASD(("<external>\n"));
1105                                 tconfig &= ~(TCV_CFG_PENABLE);
1106                                 tconfig |= TCV_CFG_PSELECT;
1107                                 hme_write32(hp, tregs + TCVR_CFG, tconfig);
1108                         }
1109                 } else {
1110                         if (hp->tcvr_type == external) {
1111                                 ASD(("<external> "));
1112                                 if (!(hme_read32(hp, tregs + TCVR_STATUS) >> 16)) {
1113                                         ASD(("<poll stop> "));
1114                                         happy_meal_poll_stop(hp, tregs);
1115                                         hp->paddr = TCV_PADDR_ITX;
1116                                         hp->tcvr_type = internal;
1117                                         ASD(("<internal>\n"));
1118                                         hme_write32(hp, tregs + TCVR_CFG,
1119                                                     hme_read32(hp, tregs + TCVR_CFG) &
1120                                                     ~(TCV_CFG_PSELECT));
1121                                 }
1122                                 ASD(("\n"));
1123                         } else {
1124                                 ASD(("<none>\n"));
1125                         }
1126                 }
1127         } else {
1128                 u32 reread = hme_read32(hp, tregs + TCVR_CFG);
1129
1130                 /* Else we can just work off of the MDIO bits. */
1131                 ASD(("<not polling> "));
1132                 if (reread & TCV_CFG_MDIO1) {
1133                         hme_write32(hp, tregs + TCVR_CFG, tconfig | TCV_CFG_PSELECT);
1134                         hp->paddr = TCV_PADDR_ETX;
1135                         hp->tcvr_type = external;
1136                         ASD(("<external>\n"));
1137                 } else {
1138                         if (reread & TCV_CFG_MDIO0) {
1139                                 hme_write32(hp, tregs + TCVR_CFG,
1140                                             tconfig & ~(TCV_CFG_PSELECT));
1141                                 hp->paddr = TCV_PADDR_ITX;
1142                                 hp->tcvr_type = internal;
1143                                 ASD(("<internal>\n"));
1144                         } else {
1145                                 printk(KERN_ERR "happy meal: Transceiver and a coke please.");
1146                                 hp->tcvr_type = none; /* Grrr... */
1147                                 ASD(("<none>\n"));
1148                         }
1149                 }
1150         }
1151 }
1152
1153 /* The receive ring buffers are a bit tricky to get right.  Here goes...
1154  *
1155  * The buffers we dma into must be 64 byte aligned.  So we use a special
1156  * alloc_skb() routine for the happy meal to allocate 64 bytes more than
1157  * we really need.
1158  *
1159  * We use skb_reserve() to align the data block we get in the skb.  We
1160  * also program the etxregs->cfg register to use an offset of 2.  This
1161  * imperical constant plus the ethernet header size will always leave
1162  * us with a nicely aligned ip header once we pass things up to the
1163  * protocol layers.
1164  *
1165  * The numbers work out to:
1166  *
1167  *         Max ethernet frame size         1518
1168  *         Ethernet header size              14
1169  *         Happy Meal base offset             2
1170  *
1171  * Say a skb data area is at 0xf001b010, and its size alloced is
1172  * (ETH_FRAME_LEN + 64 + 2) = (1514 + 64 + 2) = 1580 bytes.
1173  *
1174  * First our alloc_skb() routine aligns the data base to a 64 byte
1175  * boundary.  We now have 0xf001b040 as our skb data address.  We
1176  * plug this into the receive descriptor address.
1177  *
1178  * Next, we skb_reserve() 2 bytes to account for the Happy Meal offset.
1179  * So now the data we will end up looking at starts at 0xf001b042.  When
1180  * the packet arrives, we will check out the size received and subtract
1181  * this from the skb->length.  Then we just pass the packet up to the
1182  * protocols as is, and allocate a new skb to replace this slot we have
1183  * just received from.
1184  *
1185  * The ethernet layer will strip the ether header from the front of the
1186  * skb we just sent to it, this leaves us with the ip header sitting
1187  * nicely aligned at 0xf001b050.  Also, for tcp and udp packets the
1188  * Happy Meal has even checksummed the tcp/udp data for us.  The 16
1189  * bit checksum is obtained from the low bits of the receive descriptor
1190  * flags, thus:
1191  *
1192  *      skb->csum = rxd->rx_flags & 0xffff;
1193  *      skb->ip_summed = CHECKSUM_COMPLETE;
1194  *
1195  * before sending off the skb to the protocols, and we are good as gold.
1196  */
1197 static void happy_meal_clean_rings(struct happy_meal *hp)
1198 {
1199         int i;
1200
1201         for (i = 0; i < RX_RING_SIZE; i++) {
1202                 if (hp->rx_skbs[i] != NULL) {
1203                         struct sk_buff *skb = hp->rx_skbs[i];
1204                         struct happy_meal_rxd *rxd;
1205                         u32 dma_addr;
1206
1207                         rxd = &hp->happy_block->happy_meal_rxd[i];
1208                         dma_addr = hme_read_desc32(hp, &rxd->rx_addr);
1209                         hme_dma_unmap(hp, dma_addr, RX_BUF_ALLOC_SIZE, DMA_FROM_DEVICE);
1210                         dev_kfree_skb_any(skb);
1211                         hp->rx_skbs[i] = NULL;
1212                 }
1213         }
1214
1215         for (i = 0; i < TX_RING_SIZE; i++) {
1216                 if (hp->tx_skbs[i] != NULL) {
1217                         struct sk_buff *skb = hp->tx_skbs[i];
1218                         struct happy_meal_txd *txd;
1219                         u32 dma_addr;
1220                         int frag;
1221
1222                         hp->tx_skbs[i] = NULL;
1223
1224                         for (frag = 0; frag <= skb_shinfo(skb)->nr_frags; frag++) {
1225                                 txd = &hp->happy_block->happy_meal_txd[i];
1226                                 dma_addr = hme_read_desc32(hp, &txd->tx_addr);
1227                                 hme_dma_unmap(hp, dma_addr,
1228                                               (hme_read_desc32(hp, &txd->tx_flags)
1229                                                & TXFLAG_SIZE),
1230                                               DMA_TO_DEVICE);
1231
1232                                 if (frag != skb_shinfo(skb)->nr_frags)
1233                                         i++;
1234                         }
1235
1236                         dev_kfree_skb_any(skb);
1237                 }
1238         }
1239 }
1240
1241 /* hp->happy_lock must be held */
1242 static void happy_meal_init_rings(struct happy_meal *hp)
1243 {
1244         struct hmeal_init_block *hb = hp->happy_block;
1245         struct net_device *dev = hp->dev;
1246         int i;
1247
1248         HMD(("happy_meal_init_rings: counters to zero, "));
1249         hp->rx_new = hp->rx_old = hp->tx_new = hp->tx_old = 0;
1250
1251         /* Free any skippy bufs left around in the rings. */
1252         HMD(("clean, "));
1253         happy_meal_clean_rings(hp);
1254
1255         /* Now get new skippy bufs for the receive ring. */
1256         HMD(("init rxring, "));
1257         for (i = 0; i < RX_RING_SIZE; i++) {
1258                 struct sk_buff *skb;
1259
1260                 skb = happy_meal_alloc_skb(RX_BUF_ALLOC_SIZE, GFP_ATOMIC);
1261                 if (!skb) {
1262                         hme_write_rxd(hp, &hb->happy_meal_rxd[i], 0, 0);
1263                         continue;
1264                 }
1265                 hp->rx_skbs[i] = skb;
1266                 skb->dev = dev;
1267
1268                 /* Because we reserve afterwards. */
1269                 skb_put(skb, (ETH_FRAME_LEN + RX_OFFSET + 4));
1270                 hme_write_rxd(hp, &hb->happy_meal_rxd[i],
1271                               (RXFLAG_OWN | ((RX_BUF_ALLOC_SIZE - RX_OFFSET) << 16)),
1272                               hme_dma_map(hp, skb->data, RX_BUF_ALLOC_SIZE, DMA_FROM_DEVICE));
1273                 skb_reserve(skb, RX_OFFSET);
1274         }
1275
1276         HMD(("init txring, "));
1277         for (i = 0; i < TX_RING_SIZE; i++)
1278                 hme_write_txd(hp, &hb->happy_meal_txd[i], 0, 0);
1279
1280         HMD(("done\n"));
1281 }
1282
1283 /* hp->happy_lock must be held */
1284 static void happy_meal_begin_auto_negotiation(struct happy_meal *hp,
1285                                               void __iomem *tregs,
1286                                               struct ethtool_cmd *ep)
1287 {
1288         int timeout;
1289
1290         /* Read all of the registers we are interested in now. */
1291         hp->sw_bmsr      = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
1292         hp->sw_bmcr      = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1293         hp->sw_physid1   = happy_meal_tcvr_read(hp, tregs, MII_PHYSID1);
1294         hp->sw_physid2   = happy_meal_tcvr_read(hp, tregs, MII_PHYSID2);
1295
1296         /* XXX Check BMSR_ANEGCAPABLE, should not be necessary though. */
1297
1298         hp->sw_advertise = happy_meal_tcvr_read(hp, tregs, MII_ADVERTISE);
1299         if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
1300                 /* Advertise everything we can support. */
1301                 if (hp->sw_bmsr & BMSR_10HALF)
1302                         hp->sw_advertise |= (ADVERTISE_10HALF);
1303                 else
1304                         hp->sw_advertise &= ~(ADVERTISE_10HALF);
1305
1306                 if (hp->sw_bmsr & BMSR_10FULL)
1307                         hp->sw_advertise |= (ADVERTISE_10FULL);
1308                 else
1309                         hp->sw_advertise &= ~(ADVERTISE_10FULL);
1310                 if (hp->sw_bmsr & BMSR_100HALF)
1311                         hp->sw_advertise |= (ADVERTISE_100HALF);
1312                 else
1313                         hp->sw_advertise &= ~(ADVERTISE_100HALF);
1314                 if (hp->sw_bmsr & BMSR_100FULL)
1315                         hp->sw_advertise |= (ADVERTISE_100FULL);
1316                 else
1317                         hp->sw_advertise &= ~(ADVERTISE_100FULL);
1318                 happy_meal_tcvr_write(hp, tregs, MII_ADVERTISE, hp->sw_advertise);
1319
1320                 /* XXX Currently no Happy Meal cards I know off support 100BaseT4,
1321                  * XXX and this is because the DP83840 does not support it, changes
1322                  * XXX would need to be made to the tx/rx logic in the driver as well
1323                  * XXX so I completely skip checking for it in the BMSR for now.
1324                  */
1325
1326 #ifdef AUTO_SWITCH_DEBUG
1327                 ASD(("%s: Advertising [ ", hp->dev->name));
1328                 if (hp->sw_advertise & ADVERTISE_10HALF)
1329                         ASD(("10H "));
1330                 if (hp->sw_advertise & ADVERTISE_10FULL)
1331                         ASD(("10F "));
1332                 if (hp->sw_advertise & ADVERTISE_100HALF)
1333                         ASD(("100H "));
1334                 if (hp->sw_advertise & ADVERTISE_100FULL)
1335                         ASD(("100F "));
1336 #endif
1337
1338                 /* Enable Auto-Negotiation, this is usually on already... */
1339                 hp->sw_bmcr |= BMCR_ANENABLE;
1340                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1341
1342                 /* Restart it to make sure it is going. */
1343                 hp->sw_bmcr |= BMCR_ANRESTART;
1344                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1345
1346                 /* BMCR_ANRESTART self clears when the process has begun. */
1347
1348                 timeout = 64;  /* More than enough. */
1349                 while (--timeout) {
1350                         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1351                         if (!(hp->sw_bmcr & BMCR_ANRESTART))
1352                                 break; /* got it. */
1353                         udelay(10);
1354                 }
1355                 if (!timeout) {
1356                         printk(KERN_ERR "%s: Happy Meal would not start auto negotiation "
1357                                "BMCR=0x%04x\n", hp->dev->name, hp->sw_bmcr);
1358                         printk(KERN_NOTICE "%s: Performing force link detection.\n",
1359                                hp->dev->name);
1360                         goto force_link;
1361                 } else {
1362                         hp->timer_state = arbwait;
1363                 }
1364         } else {
1365 force_link:
1366                 /* Force the link up, trying first a particular mode.
1367                  * Either we are here at the request of ethtool or
1368                  * because the Happy Meal would not start to autoneg.
1369                  */
1370
1371                 /* Disable auto-negotiation in BMCR, enable the duplex and
1372                  * speed setting, init the timer state machine, and fire it off.
1373                  */
1374                 if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
1375                         hp->sw_bmcr = BMCR_SPEED100;
1376                 } else {
1377                         if (ep->speed == SPEED_100)
1378                                 hp->sw_bmcr = BMCR_SPEED100;
1379                         else
1380                                 hp->sw_bmcr = 0;
1381                         if (ep->duplex == DUPLEX_FULL)
1382                                 hp->sw_bmcr |= BMCR_FULLDPLX;
1383                 }
1384                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1385
1386                 if (!is_lucent_phy(hp)) {
1387                         /* OK, seems we need do disable the transceiver for the first
1388                          * tick to make sure we get an accurate link state at the
1389                          * second tick.
1390                          */
1391                         hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs,
1392                                                                DP83840_CSCONFIG);
1393                         hp->sw_csconfig &= ~(CSCONFIG_TCVDISAB);
1394                         happy_meal_tcvr_write(hp, tregs, DP83840_CSCONFIG,
1395                                               hp->sw_csconfig);
1396                 }
1397                 hp->timer_state = ltrywait;
1398         }
1399
1400         hp->timer_ticks = 0;
1401         hp->happy_timer.expires = jiffies + (12 * HZ)/10;  /* 1.2 sec. */
1402         hp->happy_timer.data = (unsigned long) hp;
1403         hp->happy_timer.function = &happy_meal_timer;
1404         add_timer(&hp->happy_timer);
1405 }
1406
1407 /* hp->happy_lock must be held */
1408 static int happy_meal_init(struct happy_meal *hp)
1409 {
1410         void __iomem *gregs        = hp->gregs;
1411         void __iomem *etxregs      = hp->etxregs;
1412         void __iomem *erxregs      = hp->erxregs;
1413         void __iomem *bregs        = hp->bigmacregs;
1414         void __iomem *tregs        = hp->tcvregs;
1415         u32 regtmp, rxcfg;
1416         unsigned char *e = &hp->dev->dev_addr[0];
1417
1418         /* If auto-negotiation timer is running, kill it. */
1419         del_timer(&hp->happy_timer);
1420
1421         HMD(("happy_meal_init: happy_flags[%08x] ",
1422              hp->happy_flags));
1423         if (!(hp->happy_flags & HFLAG_INIT)) {
1424                 HMD(("set HFLAG_INIT, "));
1425                 hp->happy_flags |= HFLAG_INIT;
1426                 happy_meal_get_counters(hp, bregs);
1427         }
1428
1429         /* Stop polling. */
1430         HMD(("to happy_meal_poll_stop\n"));
1431         happy_meal_poll_stop(hp, tregs);
1432
1433         /* Stop transmitter and receiver. */
1434         HMD(("happy_meal_init: to happy_meal_stop\n"));
1435         happy_meal_stop(hp, gregs);
1436
1437         /* Alloc and reset the tx/rx descriptor chains. */
1438         HMD(("happy_meal_init: to happy_meal_init_rings\n"));
1439         happy_meal_init_rings(hp);
1440
1441         /* Shut up the MIF. */
1442         HMD(("happy_meal_init: Disable all MIF irqs (old[%08x]), ",
1443              hme_read32(hp, tregs + TCVR_IMASK)));
1444         hme_write32(hp, tregs + TCVR_IMASK, 0xffff);
1445
1446         /* See if we can enable the MIF frame on this card to speak to the DP83840. */
1447         if (hp->happy_flags & HFLAG_FENABLE) {
1448                 HMD(("use frame old[%08x], ",
1449                      hme_read32(hp, tregs + TCVR_CFG)));
1450                 hme_write32(hp, tregs + TCVR_CFG,
1451                             hme_read32(hp, tregs + TCVR_CFG) & ~(TCV_CFG_BENABLE));
1452         } else {
1453                 HMD(("use bitbang old[%08x], ",
1454                      hme_read32(hp, tregs + TCVR_CFG)));
1455                 hme_write32(hp, tregs + TCVR_CFG,
1456                             hme_read32(hp, tregs + TCVR_CFG) | TCV_CFG_BENABLE);
1457         }
1458
1459         /* Check the state of the transceiver. */
1460         HMD(("to happy_meal_transceiver_check\n"));
1461         happy_meal_transceiver_check(hp, tregs);
1462
1463         /* Put the Big Mac into a sane state. */
1464         HMD(("happy_meal_init: "));
1465         switch(hp->tcvr_type) {
1466         case none:
1467                 /* Cannot operate if we don't know the transceiver type! */
1468                 HMD(("AAIEEE no transceiver type, EAGAIN"));
1469                 return -EAGAIN;
1470
1471         case internal:
1472                 /* Using the MII buffers. */
1473                 HMD(("internal, using MII, "));
1474                 hme_write32(hp, bregs + BMAC_XIFCFG, 0);
1475                 break;
1476
1477         case external:
1478                 /* Not using the MII, disable it. */
1479                 HMD(("external, disable MII, "));
1480                 hme_write32(hp, bregs + BMAC_XIFCFG, BIGMAC_XCFG_MIIDISAB);
1481                 break;
1482         };
1483
1484         if (happy_meal_tcvr_reset(hp, tregs))
1485                 return -EAGAIN;
1486
1487         /* Reset the Happy Meal Big Mac transceiver and the receiver. */
1488         HMD(("tx/rx reset, "));
1489         happy_meal_tx_reset(hp, bregs);
1490         happy_meal_rx_reset(hp, bregs);
1491
1492         /* Set jam size and inter-packet gaps to reasonable defaults. */
1493         HMD(("jsize/ipg1/ipg2, "));
1494         hme_write32(hp, bregs + BMAC_JSIZE, DEFAULT_JAMSIZE);
1495         hme_write32(hp, bregs + BMAC_IGAP1, DEFAULT_IPG1);
1496         hme_write32(hp, bregs + BMAC_IGAP2, DEFAULT_IPG2);
1497
1498         /* Load up the MAC address and random seed. */
1499         HMD(("rseed/macaddr, "));
1500
1501         /* The docs recommend to use the 10LSB of our MAC here. */
1502         hme_write32(hp, bregs + BMAC_RSEED, ((e[5] | e[4]<<8)&0x3ff));
1503
1504         hme_write32(hp, bregs + BMAC_MACADDR2, ((e[4] << 8) | e[5]));
1505         hme_write32(hp, bregs + BMAC_MACADDR1, ((e[2] << 8) | e[3]));
1506         hme_write32(hp, bregs + BMAC_MACADDR0, ((e[0] << 8) | e[1]));
1507
1508         HMD(("htable, "));
1509         if ((hp->dev->flags & IFF_ALLMULTI) ||
1510             (hp->dev->mc_count > 64)) {
1511                 hme_write32(hp, bregs + BMAC_HTABLE0, 0xffff);
1512                 hme_write32(hp, bregs + BMAC_HTABLE1, 0xffff);
1513                 hme_write32(hp, bregs + BMAC_HTABLE2, 0xffff);
1514                 hme_write32(hp, bregs + BMAC_HTABLE3, 0xffff);
1515         } else if ((hp->dev->flags & IFF_PROMISC) == 0) {
1516                 u16 hash_table[4];
1517                 struct dev_mc_list *dmi = hp->dev->mc_list;
1518                 char *addrs;
1519                 int i;
1520                 u32 crc;
1521
1522                 for (i = 0; i < 4; i++)
1523                         hash_table[i] = 0;
1524
1525                 for (i = 0; i < hp->dev->mc_count; i++) {
1526                         addrs = dmi->dmi_addr;
1527                         dmi = dmi->next;
1528
1529                         if (!(*addrs & 1))
1530                                 continue;
1531
1532                         crc = ether_crc_le(6, addrs);
1533                         crc >>= 26;
1534                         hash_table[crc >> 4] |= 1 << (crc & 0xf);
1535                 }
1536                 hme_write32(hp, bregs + BMAC_HTABLE0, hash_table[0]);
1537                 hme_write32(hp, bregs + BMAC_HTABLE1, hash_table[1]);
1538                 hme_write32(hp, bregs + BMAC_HTABLE2, hash_table[2]);
1539                 hme_write32(hp, bregs + BMAC_HTABLE3, hash_table[3]);
1540         } else {
1541                 hme_write32(hp, bregs + BMAC_HTABLE3, 0);
1542                 hme_write32(hp, bregs + BMAC_HTABLE2, 0);
1543                 hme_write32(hp, bregs + BMAC_HTABLE1, 0);
1544                 hme_write32(hp, bregs + BMAC_HTABLE0, 0);
1545         }
1546
1547         /* Set the RX and TX ring ptrs. */
1548         HMD(("ring ptrs rxr[%08x] txr[%08x]\n",
1549              ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0)),
1550              ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_txd, 0))));
1551         hme_write32(hp, erxregs + ERX_RING,
1552                     ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0)));
1553         hme_write32(hp, etxregs + ETX_RING,
1554                     ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_txd, 0)));
1555
1556         /* Parity issues in the ERX unit of some HME revisions can cause some
1557          * registers to not be written unless their parity is even.  Detect such
1558          * lost writes and simply rewrite with a low bit set (which will be ignored
1559          * since the rxring needs to be 2K aligned).
1560          */
1561         if (hme_read32(hp, erxregs + ERX_RING) !=
1562             ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0)))
1563                 hme_write32(hp, erxregs + ERX_RING,
1564                             ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0))
1565                             | 0x4);
1566
1567         /* Set the supported burst sizes. */
1568         HMD(("happy_meal_init: old[%08x] bursts<",
1569              hme_read32(hp, gregs + GREG_CFG)));
1570
1571 #ifndef CONFIG_SPARC
1572         /* It is always PCI and can handle 64byte bursts. */
1573         hme_write32(hp, gregs + GREG_CFG, GREG_CFG_BURST64);
1574 #else
1575         if ((hp->happy_bursts & DMA_BURST64) &&
1576             ((hp->happy_flags & HFLAG_PCI) != 0
1577 #ifdef CONFIG_SBUS
1578              || sbus_can_burst64(hp->happy_dev)
1579 #endif
1580              || 0)) {
1581                 u32 gcfg = GREG_CFG_BURST64;
1582
1583                 /* I have no idea if I should set the extended
1584                  * transfer mode bit for Cheerio, so for now I
1585                  * do not.  -DaveM
1586                  */
1587 #ifdef CONFIG_SBUS
1588                 if ((hp->happy_flags & HFLAG_PCI) == 0 &&
1589                     sbus_can_dma_64bit(hp->happy_dev)) {
1590                         sbus_set_sbus64(hp->happy_dev,
1591                                         hp->happy_bursts);
1592                         gcfg |= GREG_CFG_64BIT;
1593                 }
1594 #endif
1595
1596                 HMD(("64>"));
1597                 hme_write32(hp, gregs + GREG_CFG, gcfg);
1598         } else if (hp->happy_bursts & DMA_BURST32) {
1599                 HMD(("32>"));
1600                 hme_write32(hp, gregs + GREG_CFG, GREG_CFG_BURST32);
1601         } else if (hp->happy_bursts & DMA_BURST16) {
1602                 HMD(("16>"));
1603                 hme_write32(hp, gregs + GREG_CFG, GREG_CFG_BURST16);
1604         } else {
1605                 HMD(("XXX>"));
1606                 hme_write32(hp, gregs + GREG_CFG, 0);
1607         }
1608 #endif /* CONFIG_SPARC */
1609
1610         /* Turn off interrupts we do not want to hear. */
1611         HMD((", enable global interrupts, "));
1612         hme_write32(hp, gregs + GREG_IMASK,
1613                     (GREG_IMASK_GOTFRAME | GREG_IMASK_RCNTEXP |
1614                      GREG_IMASK_SENTFRAME | GREG_IMASK_TXPERR));
1615
1616         /* Set the transmit ring buffer size. */
1617         HMD(("tx rsize=%d oreg[%08x], ", (int)TX_RING_SIZE,
1618              hme_read32(hp, etxregs + ETX_RSIZE)));
1619         hme_write32(hp, etxregs + ETX_RSIZE, (TX_RING_SIZE >> ETX_RSIZE_SHIFT) - 1);
1620
1621         /* Enable transmitter DVMA. */
1622         HMD(("tx dma enable old[%08x], ",
1623              hme_read32(hp, etxregs + ETX_CFG)));
1624         hme_write32(hp, etxregs + ETX_CFG,
1625                     hme_read32(hp, etxregs + ETX_CFG) | ETX_CFG_DMAENABLE);
1626
1627         /* This chip really rots, for the receiver sometimes when you
1628          * write to its control registers not all the bits get there
1629          * properly.  I cannot think of a sane way to provide complete
1630          * coverage for this hardware bug yet.
1631          */
1632         HMD(("erx regs bug old[%08x]\n",
1633              hme_read32(hp, erxregs + ERX_CFG)));
1634         hme_write32(hp, erxregs + ERX_CFG, ERX_CFG_DEFAULT(RX_OFFSET));
1635         regtmp = hme_read32(hp, erxregs + ERX_CFG);
1636         hme_write32(hp, erxregs + ERX_CFG, ERX_CFG_DEFAULT(RX_OFFSET));
1637         if (hme_read32(hp, erxregs + ERX_CFG) != ERX_CFG_DEFAULT(RX_OFFSET)) {
1638                 printk(KERN_ERR "happy meal: Eieee, rx config register gets greasy fries.\n");
1639                 printk(KERN_ERR "happy meal: Trying to set %08x, reread gives %08x\n",
1640                        ERX_CFG_DEFAULT(RX_OFFSET), regtmp);
1641                 /* XXX Should return failure here... */
1642         }
1643
1644         /* Enable Big Mac hash table filter. */
1645         HMD(("happy_meal_init: enable hash rx_cfg_old[%08x], ",
1646              hme_read32(hp, bregs + BMAC_RXCFG)));
1647         rxcfg = BIGMAC_RXCFG_HENABLE | BIGMAC_RXCFG_REJME;
1648         if (hp->dev->flags & IFF_PROMISC)
1649                 rxcfg |= BIGMAC_RXCFG_PMISC;
1650         hme_write32(hp, bregs + BMAC_RXCFG, rxcfg);
1651
1652         /* Let the bits settle in the chip. */
1653         udelay(10);
1654
1655         /* Ok, configure the Big Mac transmitter. */
1656         HMD(("BIGMAC init, "));
1657         regtmp = 0;
1658         if (hp->happy_flags & HFLAG_FULL)
1659                 regtmp |= BIGMAC_TXCFG_FULLDPLX;
1660
1661         /* Don't turn on the "don't give up" bit for now.  It could cause hme
1662          * to deadlock with the PHY if a Jabber occurs.
1663          */
1664         hme_write32(hp, bregs + BMAC_TXCFG, regtmp /*| BIGMAC_TXCFG_DGIVEUP*/);
1665
1666         /* Give up after 16 TX attempts. */
1667         hme_write32(hp, bregs + BMAC_ALIMIT, 16);
1668
1669         /* Enable the output drivers no matter what. */
1670         regtmp = BIGMAC_XCFG_ODENABLE;
1671
1672         /* If card can do lance mode, enable it. */
1673         if (hp->happy_flags & HFLAG_LANCE)
1674                 regtmp |= (DEFAULT_IPG0 << 5) | BIGMAC_XCFG_LANCE;
1675
1676         /* Disable the MII buffers if using external transceiver. */
1677         if (hp->tcvr_type == external)
1678                 regtmp |= BIGMAC_XCFG_MIIDISAB;
1679
1680         HMD(("XIF config old[%08x], ",
1681              hme_read32(hp, bregs + BMAC_XIFCFG)));
1682         hme_write32(hp, bregs + BMAC_XIFCFG, regtmp);
1683
1684         /* Start things up. */
1685         HMD(("tx old[%08x] and rx [%08x] ON!\n",
1686              hme_read32(hp, bregs + BMAC_TXCFG),
1687              hme_read32(hp, bregs + BMAC_RXCFG)));
1688
1689         /* Set larger TX/RX size to allow for 802.1q */
1690         hme_write32(hp, bregs + BMAC_TXMAX, ETH_FRAME_LEN + 8);
1691         hme_write32(hp, bregs + BMAC_RXMAX, ETH_FRAME_LEN + 8);
1692
1693         hme_write32(hp, bregs + BMAC_TXCFG,
1694                     hme_read32(hp, bregs + BMAC_TXCFG) | BIGMAC_TXCFG_ENABLE);
1695         hme_write32(hp, bregs + BMAC_RXCFG,
1696                     hme_read32(hp, bregs + BMAC_RXCFG) | BIGMAC_RXCFG_ENABLE);
1697
1698         /* Get the autonegotiation started, and the watch timer ticking. */
1699         happy_meal_begin_auto_negotiation(hp, tregs, NULL);
1700
1701         /* Success. */
1702         return 0;
1703 }
1704
1705 /* hp->happy_lock must be held */
1706 static void happy_meal_set_initial_advertisement(struct happy_meal *hp)
1707 {
1708         void __iomem *tregs     = hp->tcvregs;
1709         void __iomem *bregs     = hp->bigmacregs;
1710         void __iomem *gregs     = hp->gregs;
1711
1712         happy_meal_stop(hp, gregs);
1713         hme_write32(hp, tregs + TCVR_IMASK, 0xffff);
1714         if (hp->happy_flags & HFLAG_FENABLE)
1715                 hme_write32(hp, tregs + TCVR_CFG,
1716                             hme_read32(hp, tregs + TCVR_CFG) & ~(TCV_CFG_BENABLE));
1717         else
1718                 hme_write32(hp, tregs + TCVR_CFG,
1719                             hme_read32(hp, tregs + TCVR_CFG) | TCV_CFG_BENABLE);
1720         happy_meal_transceiver_check(hp, tregs);
1721         switch(hp->tcvr_type) {
1722         case none:
1723                 return;
1724         case internal:
1725                 hme_write32(hp, bregs + BMAC_XIFCFG, 0);
1726                 break;
1727         case external:
1728                 hme_write32(hp, bregs + BMAC_XIFCFG, BIGMAC_XCFG_MIIDISAB);
1729                 break;
1730         };
1731         if (happy_meal_tcvr_reset(hp, tregs))
1732                 return;
1733
1734         /* Latch PHY registers as of now. */
1735         hp->sw_bmsr      = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
1736         hp->sw_advertise = happy_meal_tcvr_read(hp, tregs, MII_ADVERTISE);
1737
1738         /* Advertise everything we can support. */
1739         if (hp->sw_bmsr & BMSR_10HALF)
1740                 hp->sw_advertise |= (ADVERTISE_10HALF);
1741         else
1742                 hp->sw_advertise &= ~(ADVERTISE_10HALF);
1743
1744         if (hp->sw_bmsr & BMSR_10FULL)
1745                 hp->sw_advertise |= (ADVERTISE_10FULL);
1746         else
1747                 hp->sw_advertise &= ~(ADVERTISE_10FULL);
1748         if (hp->sw_bmsr & BMSR_100HALF)
1749                 hp->sw_advertise |= (ADVERTISE_100HALF);
1750         else
1751                 hp->sw_advertise &= ~(ADVERTISE_100HALF);
1752         if (hp->sw_bmsr & BMSR_100FULL)
1753                 hp->sw_advertise |= (ADVERTISE_100FULL);
1754         else
1755                 hp->sw_advertise &= ~(ADVERTISE_100FULL);
1756
1757         /* Update the PHY advertisement register. */
1758         happy_meal_tcvr_write(hp, tregs, MII_ADVERTISE, hp->sw_advertise);
1759 }
1760
1761 /* Once status is latched (by happy_meal_interrupt) it is cleared by
1762  * the hardware, so we cannot re-read it and get a correct value.
1763  *
1764  * hp->happy_lock must be held
1765  */
1766 static int happy_meal_is_not_so_happy(struct happy_meal *hp, u32 status)
1767 {
1768         int reset = 0;
1769
1770         /* Only print messages for non-counter related interrupts. */
1771         if (status & (GREG_STAT_STSTERR | GREG_STAT_TFIFO_UND |
1772                       GREG_STAT_MAXPKTERR | GREG_STAT_RXERR |
1773                       GREG_STAT_RXPERR | GREG_STAT_RXTERR | GREG_STAT_EOPERR |
1774                       GREG_STAT_MIFIRQ | GREG_STAT_TXEACK | GREG_STAT_TXLERR |
1775                       GREG_STAT_TXPERR | GREG_STAT_TXTERR | GREG_STAT_SLVERR |
1776                       GREG_STAT_SLVPERR))
1777                 printk(KERN_ERR "%s: Error interrupt for happy meal, status = %08x\n",
1778                        hp->dev->name, status);
1779
1780         if (status & GREG_STAT_RFIFOVF) {
1781                 /* Receive FIFO overflow is harmless and the hardware will take
1782                    care of it, just some packets are lost. Who cares. */
1783                 printk(KERN_DEBUG "%s: Happy Meal receive FIFO overflow.\n", hp->dev->name);
1784         }
1785
1786         if (status & GREG_STAT_STSTERR) {
1787                 /* BigMAC SQE link test failed. */
1788                 printk(KERN_ERR "%s: Happy Meal BigMAC SQE test failed.\n", hp->dev->name);
1789                 reset = 1;
1790         }
1791
1792         if (status & GREG_STAT_TFIFO_UND) {
1793                 /* Transmit FIFO underrun, again DMA error likely. */
1794                 printk(KERN_ERR "%s: Happy Meal transmitter FIFO underrun, DMA error.\n",
1795                        hp->dev->name);
1796                 reset = 1;
1797         }
1798
1799         if (status & GREG_STAT_MAXPKTERR) {
1800                 /* Driver error, tried to transmit something larger
1801                  * than ethernet max mtu.
1802                  */
1803                 printk(KERN_ERR "%s: Happy Meal MAX Packet size error.\n", hp->dev->name);
1804                 reset = 1;
1805         }
1806
1807         if (status & GREG_STAT_NORXD) {
1808                 /* This is harmless, it just means the system is
1809                  * quite loaded and the incoming packet rate was
1810                  * faster than the interrupt handler could keep up
1811                  * with.
1812                  */
1813                 printk(KERN_INFO "%s: Happy Meal out of receive "
1814                        "descriptors, packet dropped.\n",
1815                        hp->dev->name);
1816         }
1817
1818         if (status & (GREG_STAT_RXERR|GREG_STAT_RXPERR|GREG_STAT_RXTERR)) {
1819                 /* All sorts of DMA receive errors. */
1820                 printk(KERN_ERR "%s: Happy Meal rx DMA errors [ ", hp->dev->name);
1821                 if (status & GREG_STAT_RXERR)
1822                         printk("GenericError ");
1823                 if (status & GREG_STAT_RXPERR)
1824                         printk("ParityError ");
1825                 if (status & GREG_STAT_RXTERR)
1826                         printk("RxTagBotch ");
1827                 printk("]\n");
1828                 reset = 1;
1829         }
1830
1831         if (status & GREG_STAT_EOPERR) {
1832                 /* Driver bug, didn't set EOP bit in tx descriptor given
1833                  * to the happy meal.
1834                  */
1835                 printk(KERN_ERR "%s: EOP not set in happy meal transmit descriptor!\n",
1836                        hp->dev->name);
1837                 reset = 1;
1838         }
1839
1840         if (status & GREG_STAT_MIFIRQ) {
1841                 /* MIF signalled an interrupt, were we polling it? */
1842                 printk(KERN_ERR "%s: Happy Meal MIF interrupt.\n", hp->dev->name);
1843         }
1844
1845         if (status &
1846             (GREG_STAT_TXEACK|GREG_STAT_TXLERR|GREG_STAT_TXPERR|GREG_STAT_TXTERR)) {
1847                 /* All sorts of transmit DMA errors. */
1848                 printk(KERN_ERR "%s: Happy Meal tx DMA errors [ ", hp->dev->name);
1849                 if (status & GREG_STAT_TXEACK)
1850                         printk("GenericError ");
1851                 if (status & GREG_STAT_TXLERR)
1852                         printk("LateError ");
1853                 if (status & GREG_STAT_TXPERR)
1854                         printk("ParityErro ");
1855                 if (status & GREG_STAT_TXTERR)
1856                         printk("TagBotch ");
1857                 printk("]\n");
1858                 reset = 1;
1859         }
1860
1861         if (status & (GREG_STAT_SLVERR|GREG_STAT_SLVPERR)) {
1862                 /* Bus or parity error when cpu accessed happy meal registers
1863                  * or it's internal FIFO's.  Should never see this.
1864                  */
1865                 printk(KERN_ERR "%s: Happy Meal register access SBUS slave (%s) error.\n",
1866                        hp->dev->name,
1867                        (status & GREG_STAT_SLVPERR) ? "parity" : "generic");
1868                 reset = 1;
1869         }
1870
1871         if (reset) {
1872                 printk(KERN_NOTICE "%s: Resetting...\n", hp->dev->name);
1873                 happy_meal_init(hp);
1874                 return 1;
1875         }
1876         return 0;
1877 }
1878
1879 /* hp->happy_lock must be held */
1880 static void happy_meal_mif_interrupt(struct happy_meal *hp)
1881 {
1882         void __iomem *tregs = hp->tcvregs;
1883
1884         printk(KERN_INFO "%s: Link status change.\n", hp->dev->name);
1885         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1886         hp->sw_lpa = happy_meal_tcvr_read(hp, tregs, MII_LPA);
1887
1888         /* Use the fastest transmission protocol possible. */
1889         if (hp->sw_lpa & LPA_100FULL) {
1890                 printk(KERN_INFO "%s: Switching to 100Mbps at full duplex.", hp->dev->name);
1891                 hp->sw_bmcr |= (BMCR_FULLDPLX | BMCR_SPEED100);
1892         } else if (hp->sw_lpa & LPA_100HALF) {
1893                 printk(KERN_INFO "%s: Switching to 100MBps at half duplex.", hp->dev->name);
1894                 hp->sw_bmcr |= BMCR_SPEED100;
1895         } else if (hp->sw_lpa & LPA_10FULL) {
1896                 printk(KERN_INFO "%s: Switching to 10MBps at full duplex.", hp->dev->name);
1897                 hp->sw_bmcr |= BMCR_FULLDPLX;
1898         } else {
1899                 printk(KERN_INFO "%s: Using 10Mbps at half duplex.", hp->dev->name);
1900         }
1901         happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1902
1903         /* Finally stop polling and shut up the MIF. */
1904         happy_meal_poll_stop(hp, tregs);
1905 }
1906
1907 #ifdef TXDEBUG
1908 #define TXD(x) printk x
1909 #else
1910 #define TXD(x)
1911 #endif
1912
1913 /* hp->happy_lock must be held */
1914 static void happy_meal_tx(struct happy_meal *hp)
1915 {
1916         struct happy_meal_txd *txbase = &hp->happy_block->happy_meal_txd[0];
1917         struct happy_meal_txd *this;
1918         struct net_device *dev = hp->dev;
1919         int elem;
1920
1921         elem = hp->tx_old;
1922         TXD(("TX<"));
1923         while (elem != hp->tx_new) {
1924                 struct sk_buff *skb;
1925                 u32 flags, dma_addr, dma_len;
1926                 int frag;
1927
1928                 TXD(("[%d]", elem));
1929                 this = &txbase[elem];
1930                 flags = hme_read_desc32(hp, &this->tx_flags);
1931                 if (flags & TXFLAG_OWN)
1932                         break;
1933                 skb = hp->tx_skbs[elem];
1934                 if (skb_shinfo(skb)->nr_frags) {
1935                         int last;
1936
1937                         last = elem + skb_shinfo(skb)->nr_frags;
1938                         last &= (TX_RING_SIZE - 1);
1939                         flags = hme_read_desc32(hp, &txbase[last].tx_flags);
1940                         if (flags & TXFLAG_OWN)
1941                                 break;
1942                 }
1943                 hp->tx_skbs[elem] = NULL;
1944                 hp->net_stats.tx_bytes += skb->len;
1945
1946                 for (frag = 0; frag <= skb_shinfo(skb)->nr_frags; frag++) {
1947                         dma_addr = hme_read_desc32(hp, &this->tx_addr);
1948                         dma_len = hme_read_desc32(hp, &this->tx_flags);
1949
1950                         dma_len &= TXFLAG_SIZE;
1951                         hme_dma_unmap(hp, dma_addr, dma_len, DMA_TO_DEVICE);
1952
1953                         elem = NEXT_TX(elem);
1954                         this = &txbase[elem];
1955                 }
1956
1957                 dev_kfree_skb_irq(skb);
1958                 hp->net_stats.tx_packets++;
1959         }
1960         hp->tx_old = elem;
1961         TXD((">"));
1962
1963         if (netif_queue_stopped(dev) &&
1964             TX_BUFFS_AVAIL(hp) > (MAX_SKB_FRAGS + 1))
1965                 netif_wake_queue(dev);
1966 }
1967
1968 #ifdef RXDEBUG
1969 #define RXD(x) printk x
1970 #else
1971 #define RXD(x)
1972 #endif
1973
1974 /* Originally I used to handle the allocation failure by just giving back just
1975  * that one ring buffer to the happy meal.  Problem is that usually when that
1976  * condition is triggered, the happy meal expects you to do something reasonable
1977  * with all of the packets it has DMA'd in.  So now I just drop the entire
1978  * ring when we cannot get a new skb and give them all back to the happy meal,
1979  * maybe things will be "happier" now.
1980  *
1981  * hp->happy_lock must be held
1982  */
1983 static void happy_meal_rx(struct happy_meal *hp, struct net_device *dev)
1984 {
1985         struct happy_meal_rxd *rxbase = &hp->happy_block->happy_meal_rxd[0];
1986         struct happy_meal_rxd *this;
1987         int elem = hp->rx_new, drops = 0;
1988         u32 flags;
1989
1990         RXD(("RX<"));
1991         this = &rxbase[elem];
1992         while (!((flags = hme_read_desc32(hp, &this->rx_flags)) & RXFLAG_OWN)) {
1993                 struct sk_buff *skb;
1994                 int len = flags >> 16;
1995                 u16 csum = flags & RXFLAG_CSUM;
1996                 u32 dma_addr = hme_read_desc32(hp, &this->rx_addr);
1997
1998                 RXD(("[%d ", elem));
1999
2000                 /* Check for errors. */
2001                 if ((len < ETH_ZLEN) || (flags & RXFLAG_OVERFLOW)) {
2002                         RXD(("ERR(%08x)]", flags));
2003                         hp->net_stats.rx_errors++;
2004                         if (len < ETH_ZLEN)
2005                                 hp->net_stats.rx_length_errors++;
2006                         if (len & (RXFLAG_OVERFLOW >> 16)) {
2007                                 hp->net_stats.rx_over_errors++;
2008                                 hp->net_stats.rx_fifo_errors++;
2009                         }
2010
2011                         /* Return it to the Happy meal. */
2012         drop_it:
2013                         hp->net_stats.rx_dropped++;
2014                         hme_write_rxd(hp, this,
2015                                       (RXFLAG_OWN|((RX_BUF_ALLOC_SIZE-RX_OFFSET)<<16)),
2016                                       dma_addr);
2017                         goto next;
2018                 }
2019                 skb = hp->rx_skbs[elem];
2020                 if (len > RX_COPY_THRESHOLD) {
2021                         struct sk_buff *new_skb;
2022
2023                         /* Now refill the entry, if we can. */
2024                         new_skb = happy_meal_alloc_skb(RX_BUF_ALLOC_SIZE, GFP_ATOMIC);
2025                         if (new_skb == NULL) {
2026                                 drops++;
2027                                 goto drop_it;
2028                         }
2029                         hme_dma_unmap(hp, dma_addr, RX_BUF_ALLOC_SIZE, DMA_FROM_DEVICE);
2030                         hp->rx_skbs[elem] = new_skb;
2031                         new_skb->dev = dev;
2032                         skb_put(new_skb, (ETH_FRAME_LEN + RX_OFFSET + 4));
2033                         hme_write_rxd(hp, this,
2034                                       (RXFLAG_OWN|((RX_BUF_ALLOC_SIZE-RX_OFFSET)<<16)),
2035                                       hme_dma_map(hp, new_skb->data, RX_BUF_ALLOC_SIZE, DMA_FROM_DEVICE));
2036                         skb_reserve(new_skb, RX_OFFSET);
2037
2038                         /* Trim the original skb for the netif. */
2039                         skb_trim(skb, len);
2040                 } else {
2041                         struct sk_buff *copy_skb = dev_alloc_skb(len + 2);
2042
2043                         if (copy_skb == NULL) {
2044                                 drops++;
2045                                 goto drop_it;
2046                         }
2047
2048                         skb_reserve(copy_skb, 2);
2049                         skb_put(copy_skb, len);
2050                         hme_dma_sync_for_cpu(hp, dma_addr, len, DMA_FROM_DEVICE);
2051                         skb_copy_from_linear_data(skb, copy_skb->data, len);
2052                         hme_dma_sync_for_device(hp, dma_addr, len, DMA_FROM_DEVICE);
2053
2054                         /* Reuse original ring buffer. */
2055                         hme_write_rxd(hp, this,
2056                                       (RXFLAG_OWN|((RX_BUF_ALLOC_SIZE-RX_OFFSET)<<16)),
2057                                       dma_addr);
2058
2059                         skb = copy_skb;
2060                 }
2061
2062                 /* This card is _fucking_ hot... */
2063                 skb->csum = csum_unfold(~(__force __sum16)htons(csum));
2064                 skb->ip_summed = CHECKSUM_COMPLETE;
2065
2066                 RXD(("len=%d csum=%4x]", len, csum));
2067                 skb->protocol = eth_type_trans(skb, dev);
2068                 netif_rx(skb);
2069
2070                 dev->last_rx = jiffies;
2071                 hp->net_stats.rx_packets++;
2072                 hp->net_stats.rx_bytes += len;
2073         next:
2074                 elem = NEXT_RX(elem);
2075                 this = &rxbase[elem];
2076         }
2077         hp->rx_new = elem;
2078         if (drops)
2079                 printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n", hp->dev->name);
2080         RXD((">"));
2081 }
2082
2083 static irqreturn_t happy_meal_interrupt(int irq, void *dev_id)
2084 {
2085         struct net_device *dev = dev_id;
2086         struct happy_meal *hp  = netdev_priv(dev);
2087         u32 happy_status       = hme_read32(hp, hp->gregs + GREG_STAT);
2088
2089         HMD(("happy_meal_interrupt: status=%08x ", happy_status));
2090
2091         spin_lock(&hp->happy_lock);
2092
2093         if (happy_status & GREG_STAT_ERRORS) {
2094                 HMD(("ERRORS "));
2095                 if (happy_meal_is_not_so_happy(hp, /* un- */ happy_status))
2096                         goto out;
2097         }
2098
2099         if (happy_status & GREG_STAT_MIFIRQ) {
2100                 HMD(("MIFIRQ "));
2101                 happy_meal_mif_interrupt(hp);
2102         }
2103
2104         if (happy_status & GREG_STAT_TXALL) {
2105                 HMD(("TXALL "));
2106                 happy_meal_tx(hp);
2107         }
2108
2109         if (happy_status & GREG_STAT_RXTOHOST) {
2110                 HMD(("RXTOHOST "));
2111                 happy_meal_rx(hp, dev);
2112         }
2113
2114         HMD(("done\n"));
2115 out:
2116         spin_unlock(&hp->happy_lock);
2117
2118         return IRQ_HANDLED;
2119 }
2120
2121 #ifdef CONFIG_SBUS
2122 static irqreturn_t quattro_sbus_interrupt(int irq, void *cookie)
2123 {
2124         struct quattro *qp = (struct quattro *) cookie;
2125         int i;
2126
2127         for (i = 0; i < 4; i++) {
2128                 struct net_device *dev = qp->happy_meals[i];
2129                 struct happy_meal *hp  = dev->priv;
2130                 u32 happy_status       = hme_read32(hp, hp->gregs + GREG_STAT);
2131
2132                 HMD(("quattro_interrupt: status=%08x ", happy_status));
2133
2134                 if (!(happy_status & (GREG_STAT_ERRORS |
2135                                       GREG_STAT_MIFIRQ |
2136                                       GREG_STAT_TXALL |
2137                                       GREG_STAT_RXTOHOST)))
2138                         continue;
2139
2140                 spin_lock(&hp->happy_lock);
2141
2142                 if (happy_status & GREG_STAT_ERRORS) {
2143                         HMD(("ERRORS "));
2144                         if (happy_meal_is_not_so_happy(hp, happy_status))
2145                                 goto next;
2146                 }
2147
2148                 if (happy_status & GREG_STAT_MIFIRQ) {
2149                         HMD(("MIFIRQ "));
2150                         happy_meal_mif_interrupt(hp);
2151                 }
2152
2153                 if (happy_status & GREG_STAT_TXALL) {
2154                         HMD(("TXALL "));
2155                         happy_meal_tx(hp);
2156                 }
2157
2158                 if (happy_status & GREG_STAT_RXTOHOST) {
2159                         HMD(("RXTOHOST "));
2160                         happy_meal_rx(hp, dev);
2161                 }
2162
2163         next:
2164                 spin_unlock(&hp->happy_lock);
2165         }
2166         HMD(("done\n"));
2167
2168         return IRQ_HANDLED;
2169 }
2170 #endif
2171
2172 static int happy_meal_open(struct net_device *dev)
2173 {
2174         struct happy_meal *hp = dev->priv;
2175         int res;
2176
2177         HMD(("happy_meal_open: "));
2178
2179         /* On SBUS Quattro QFE cards, all hme interrupts are concentrated
2180          * into a single source which we register handling at probe time.
2181          */
2182         if ((hp->happy_flags & (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO) {
2183                 if (request_irq(dev->irq, &happy_meal_interrupt,
2184                                 IRQF_SHARED, dev->name, (void *)dev)) {
2185                         HMD(("EAGAIN\n"));
2186                         printk(KERN_ERR "happy_meal(SBUS): Can't order irq %d to go.\n",
2187                                dev->irq);
2188
2189                         return -EAGAIN;
2190                 }
2191         }
2192
2193         HMD(("to happy_meal_init\n"));
2194
2195         spin_lock_irq(&hp->happy_lock);
2196         res = happy_meal_init(hp);
2197         spin_unlock_irq(&hp->happy_lock);
2198
2199         if (res && ((hp->happy_flags & (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO))
2200                 free_irq(dev->irq, dev);
2201         return res;
2202 }
2203
2204 static int happy_meal_close(struct net_device *dev)
2205 {
2206         struct happy_meal *hp = dev->priv;
2207
2208         spin_lock_irq(&hp->happy_lock);
2209         happy_meal_stop(hp, hp->gregs);
2210         happy_meal_clean_rings(hp);
2211
2212         /* If auto-negotiation timer is running, kill it. */
2213         del_timer(&hp->happy_timer);
2214
2215         spin_unlock_irq(&hp->happy_lock);
2216
2217         /* On Quattro QFE cards, all hme interrupts are concentrated
2218          * into a single source which we register handling at probe
2219          * time and never unregister.
2220          */
2221         if ((hp->happy_flags & (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO)
2222                 free_irq(dev->irq, dev);
2223
2224         return 0;
2225 }
2226
2227 #ifdef SXDEBUG
2228 #define SXD(x) printk x
2229 #else
2230 #define SXD(x)
2231 #endif
2232
2233 static void happy_meal_tx_timeout(struct net_device *dev)
2234 {
2235         struct happy_meal *hp = dev->priv;
2236
2237         printk (KERN_ERR "%s: transmit timed out, resetting\n", dev->name);
2238         tx_dump_log();
2239         printk (KERN_ERR "%s: Happy Status %08x TX[%08x:%08x]\n", dev->name,
2240                 hme_read32(hp, hp->gregs + GREG_STAT),
2241                 hme_read32(hp, hp->etxregs + ETX_CFG),
2242                 hme_read32(hp, hp->bigmacregs + BMAC_TXCFG));
2243
2244         spin_lock_irq(&hp->happy_lock);
2245         happy_meal_init(hp);
2246         spin_unlock_irq(&hp->happy_lock);
2247
2248         netif_wake_queue(dev);
2249 }
2250
2251 static int happy_meal_start_xmit(struct sk_buff *skb, struct net_device *dev)
2252 {
2253         struct happy_meal *hp = dev->priv;
2254         int entry;
2255         u32 tx_flags;
2256
2257         tx_flags = TXFLAG_OWN;
2258         if (skb->ip_summed == CHECKSUM_PARTIAL) {
2259                 const u32 csum_start_off = skb_transport_offset(skb);
2260                 const u32 csum_stuff_off = csum_start_off + skb->csum_offset;
2261
2262                 tx_flags = (TXFLAG_OWN | TXFLAG_CSENABLE |
2263                             ((csum_start_off << 14) & TXFLAG_CSBUFBEGIN) |
2264                             ((csum_stuff_off << 20) & TXFLAG_CSLOCATION));
2265         }
2266
2267         spin_lock_irq(&hp->happy_lock);
2268
2269         if (TX_BUFFS_AVAIL(hp) <= (skb_shinfo(skb)->nr_frags + 1)) {
2270                 netif_stop_queue(dev);
2271                 spin_unlock_irq(&hp->happy_lock);
2272                 printk(KERN_ERR "%s: BUG! Tx Ring full when queue awake!\n",
2273                        dev->name);
2274                 return 1;
2275         }
2276
2277         entry = hp->tx_new;
2278         SXD(("SX<l[%d]e[%d]>", len, entry));
2279         hp->tx_skbs[entry] = skb;
2280
2281         if (skb_shinfo(skb)->nr_frags == 0) {
2282                 u32 mapping, len;
2283
2284                 len = skb->len;
2285                 mapping = hme_dma_map(hp, skb->data, len, DMA_TO_DEVICE);
2286                 tx_flags |= (TXFLAG_SOP | TXFLAG_EOP);
2287                 hme_write_txd(hp, &hp->happy_block->happy_meal_txd[entry],
2288                               (tx_flags | (len & TXFLAG_SIZE)),
2289                               mapping);
2290                 entry = NEXT_TX(entry);
2291         } else {
2292                 u32 first_len, first_mapping;
2293                 int frag, first_entry = entry;
2294
2295                 /* We must give this initial chunk to the device last.
2296                  * Otherwise we could race with the device.
2297                  */
2298                 first_len = skb_headlen(skb);
2299                 first_mapping = hme_dma_map(hp, skb->data, first_len, DMA_TO_DEVICE);
2300                 entry = NEXT_TX(entry);
2301
2302                 for (frag = 0; frag < skb_shinfo(skb)->nr_frags; frag++) {
2303                         skb_frag_t *this_frag = &skb_shinfo(skb)->frags[frag];
2304                         u32 len, mapping, this_txflags;
2305
2306                         len = this_frag->size;
2307                         mapping = hme_dma_map(hp,
2308                                               ((void *) page_address(this_frag->page) +
2309                                                this_frag->page_offset),
2310                                               len, DMA_TO_DEVICE);
2311                         this_txflags = tx_flags;
2312                         if (frag == skb_shinfo(skb)->nr_frags - 1)
2313                                 this_txflags |= TXFLAG_EOP;
2314                         hme_write_txd(hp, &hp->happy_block->happy_meal_txd[entry],
2315                                       (this_txflags | (len & TXFLAG_SIZE)),
2316                                       mapping);
2317                         entry = NEXT_TX(entry);
2318                 }
2319                 hme_write_txd(hp, &hp->happy_block->happy_meal_txd[first_entry],
2320                               (tx_flags | TXFLAG_SOP | (first_len & TXFLAG_SIZE)),
2321                               first_mapping);
2322         }
2323
2324         hp->tx_new = entry;
2325
2326         if (TX_BUFFS_AVAIL(hp) <= (MAX_SKB_FRAGS + 1))
2327                 netif_stop_queue(dev);
2328
2329         /* Get it going. */
2330         hme_write32(hp, hp->etxregs + ETX_PENDING, ETX_TP_DMAWAKEUP);
2331
2332         spin_unlock_irq(&hp->happy_lock);
2333
2334         dev->trans_start = jiffies;
2335
2336         tx_add_log(hp, TXLOG_ACTION_TXMIT, 0);
2337         return 0;
2338 }
2339
2340 static struct net_device_stats *happy_meal_get_stats(struct net_device *dev)
2341 {
2342         struct happy_meal *hp = dev->priv;
2343
2344         spin_lock_irq(&hp->happy_lock);
2345         happy_meal_get_counters(hp, hp->bigmacregs);
2346         spin_unlock_irq(&hp->happy_lock);
2347
2348         return &hp->net_stats;
2349 }
2350
2351 static void happy_meal_set_multicast(struct net_device *dev)
2352 {
2353         struct happy_meal *hp = dev->priv;
2354         void __iomem *bregs = hp->bigmacregs;
2355         struct dev_mc_list *dmi = dev->mc_list;
2356         char *addrs;
2357         int i;
2358         u32 crc;
2359
2360         spin_lock_irq(&hp->happy_lock);
2361
2362         if ((dev->flags & IFF_ALLMULTI) || (dev->mc_count > 64)) {
2363                 hme_write32(hp, bregs + BMAC_HTABLE0, 0xffff);
2364                 hme_write32(hp, bregs + BMAC_HTABLE1, 0xffff);
2365                 hme_write32(hp, bregs + BMAC_HTABLE2, 0xffff);
2366                 hme_write32(hp, bregs + BMAC_HTABLE3, 0xffff);
2367         } else if (dev->flags & IFF_PROMISC) {
2368                 hme_write32(hp, bregs + BMAC_RXCFG,
2369                             hme_read32(hp, bregs + BMAC_RXCFG) | BIGMAC_RXCFG_PMISC);
2370         } else {
2371                 u16 hash_table[4];
2372
2373                 for (i = 0; i < 4; i++)
2374                         hash_table[i] = 0;
2375
2376                 for (i = 0; i < dev->mc_count; i++) {
2377                         addrs = dmi->dmi_addr;
2378                         dmi = dmi->next;
2379
2380                         if (!(*addrs & 1))
2381                                 continue;
2382
2383                         crc = ether_crc_le(6, addrs);
2384                         crc >>= 26;
2385                         hash_table[crc >> 4] |= 1 << (crc & 0xf);
2386                 }
2387                 hme_write32(hp, bregs + BMAC_HTABLE0, hash_table[0]);
2388                 hme_write32(hp, bregs + BMAC_HTABLE1, hash_table[1]);
2389                 hme_write32(hp, bregs + BMAC_HTABLE2, hash_table[2]);
2390                 hme_write32(hp, bregs + BMAC_HTABLE3, hash_table[3]);
2391         }
2392
2393         spin_unlock_irq(&hp->happy_lock);
2394 }
2395
2396 /* Ethtool support... */
2397 static int hme_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2398 {
2399         struct happy_meal *hp = dev->priv;
2400
2401         cmd->supported =
2402                 (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
2403                  SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
2404                  SUPPORTED_Autoneg | SUPPORTED_TP | SUPPORTED_MII);
2405
2406         /* XXX hardcoded stuff for now */
2407         cmd->port = PORT_TP; /* XXX no MII support */
2408         cmd->transceiver = XCVR_INTERNAL; /* XXX no external xcvr support */
2409         cmd->phy_address = 0; /* XXX fixed PHYAD */
2410
2411         /* Record PHY settings. */
2412         spin_lock_irq(&hp->happy_lock);
2413         hp->sw_bmcr = happy_meal_tcvr_read(hp, hp->tcvregs, MII_BMCR);
2414         hp->sw_lpa = happy_meal_tcvr_read(hp, hp->tcvregs, MII_LPA);
2415         spin_unlock_irq(&hp->happy_lock);
2416
2417         if (hp->sw_bmcr & BMCR_ANENABLE) {
2418                 cmd->autoneg = AUTONEG_ENABLE;
2419                 cmd->speed =
2420                         (hp->sw_lpa & (LPA_100HALF | LPA_100FULL)) ?
2421                         SPEED_100 : SPEED_10;
2422                 if (cmd->speed == SPEED_100)
2423                         cmd->duplex =
2424                                 (hp->sw_lpa & (LPA_100FULL)) ?
2425                                 DUPLEX_FULL : DUPLEX_HALF;
2426                 else
2427                         cmd->duplex =
2428                                 (hp->sw_lpa & (LPA_10FULL)) ?
2429                                 DUPLEX_FULL : DUPLEX_HALF;
2430         } else {
2431                 cmd->autoneg = AUTONEG_DISABLE;
2432                 cmd->speed =
2433                         (hp->sw_bmcr & BMCR_SPEED100) ?
2434                         SPEED_100 : SPEED_10;
2435                 cmd->duplex =
2436                         (hp->sw_bmcr & BMCR_FULLDPLX) ?
2437                         DUPLEX_FULL : DUPLEX_HALF;
2438         }
2439         return 0;
2440 }
2441
2442 static int hme_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2443 {
2444         struct happy_meal *hp = dev->priv;
2445
2446         /* Verify the settings we care about. */
2447         if (cmd->autoneg != AUTONEG_ENABLE &&
2448             cmd->autoneg != AUTONEG_DISABLE)
2449                 return -EINVAL;
2450         if (cmd->autoneg == AUTONEG_DISABLE &&
2451             ((cmd->speed != SPEED_100 &&
2452               cmd->speed != SPEED_10) ||
2453              (cmd->duplex != DUPLEX_HALF &&
2454               cmd->duplex != DUPLEX_FULL)))
2455                 return -EINVAL;
2456
2457         /* Ok, do it to it. */
2458         spin_lock_irq(&hp->happy_lock);
2459         del_timer(&hp->happy_timer);
2460         happy_meal_begin_auto_negotiation(hp, hp->tcvregs, cmd);
2461         spin_unlock_irq(&hp->happy_lock);
2462
2463         return 0;
2464 }
2465
2466 static void hme_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
2467 {
2468         struct happy_meal *hp = dev->priv;
2469
2470         strcpy(info->driver, "sunhme");
2471         strcpy(info->version, "2.02");
2472         if (hp->happy_flags & HFLAG_PCI) {
2473                 struct pci_dev *pdev = hp->happy_dev;
2474                 strcpy(info->bus_info, pci_name(pdev));
2475         }
2476 #ifdef CONFIG_SBUS
2477         else {
2478                 struct sbus_dev *sdev = hp->happy_dev;
2479                 sprintf(info->bus_info, "SBUS:%d",
2480                         sdev->slot);
2481         }
2482 #endif
2483 }
2484
2485 static u32 hme_get_link(struct net_device *dev)
2486 {
2487         struct happy_meal *hp = dev->priv;
2488
2489         spin_lock_irq(&hp->happy_lock);
2490         hp->sw_bmcr = happy_meal_tcvr_read(hp, hp->tcvregs, MII_BMCR);
2491         spin_unlock_irq(&hp->happy_lock);
2492
2493         return (hp->sw_bmsr & BMSR_LSTATUS);
2494 }
2495
2496 static const struct ethtool_ops hme_ethtool_ops = {
2497         .get_settings           = hme_get_settings,
2498         .set_settings           = hme_set_settings,
2499         .get_drvinfo            = hme_get_drvinfo,
2500         .get_link               = hme_get_link,
2501 };
2502
2503 static int hme_version_printed;
2504
2505 #ifdef CONFIG_SBUS
2506 void __devinit quattro_get_ranges(struct quattro *qp)
2507 {
2508         struct sbus_dev *sdev = qp->quattro_dev;
2509         int err;
2510
2511         err = prom_getproperty(sdev->prom_node,
2512                                "ranges",
2513                                (char *)&qp->ranges[0],
2514                                sizeof(qp->ranges));
2515         if (err == 0 || err == -1) {
2516                 qp->nranges = 0;
2517                 return;
2518         }
2519         qp->nranges = (err / sizeof(struct linux_prom_ranges));
2520 }
2521
2522 static void __devinit quattro_apply_ranges(struct quattro *qp, struct happy_meal *hp)
2523 {
2524         struct sbus_dev *sdev = hp->happy_dev;
2525         int rng;
2526
2527         for (rng = 0; rng < qp->nranges; rng++) {
2528                 struct linux_prom_ranges *rngp = &qp->ranges[rng];
2529                 int reg;
2530
2531                 for (reg = 0; reg < 5; reg++) {
2532                         if (sdev->reg_addrs[reg].which_io ==
2533                             rngp->ot_child_space)
2534                                 break;
2535                 }
2536                 if (reg == 5)
2537                         continue;
2538
2539                 sdev->reg_addrs[reg].which_io = rngp->ot_parent_space;
2540                 sdev->reg_addrs[reg].phys_addr += rngp->ot_parent_base;
2541         }
2542 }
2543
2544 /* Given a happy meal sbus device, find it's quattro parent.
2545  * If none exist, allocate and return a new one.
2546  *
2547  * Return NULL on failure.
2548  */
2549 static struct quattro * __devinit quattro_sbus_find(struct sbus_dev *goal_sdev)
2550 {
2551         struct sbus_dev *sdev;
2552         struct quattro *qp;
2553         int i;
2554
2555         for (qp = qfe_sbus_list; qp != NULL; qp = qp->next) {
2556                 for (i = 0, sdev = qp->quattro_dev;
2557                      (sdev != NULL) && (i < 4);
2558                      sdev = sdev->next, i++) {
2559                         if (sdev == goal_sdev)
2560                                 return qp;
2561                 }
2562         }
2563
2564         qp = kmalloc(sizeof(struct quattro), GFP_KERNEL);
2565         if (qp != NULL) {
2566                 int i;
2567
2568                 for (i = 0; i < 4; i++)
2569                         qp->happy_meals[i] = NULL;
2570
2571                 qp->quattro_dev = goal_sdev;
2572                 qp->next = qfe_sbus_list;
2573                 qfe_sbus_list = qp;
2574                 quattro_get_ranges(qp);
2575         }
2576         return qp;
2577 }
2578
2579 /* After all quattro cards have been probed, we call these functions
2580  * to register the IRQ handlers.
2581  */
2582 static void __init quattro_sbus_register_irqs(void)
2583 {
2584         struct quattro *qp;
2585
2586         for (qp = qfe_sbus_list; qp != NULL; qp = qp->next) {
2587                 struct sbus_dev *sdev = qp->quattro_dev;
2588                 int err;
2589
2590                 err = request_irq(sdev->irqs[0],
2591                                   quattro_sbus_interrupt,
2592                                   IRQF_SHARED, "Quattro",
2593                                   qp);
2594                 if (err != 0) {
2595                         printk(KERN_ERR "Quattro: Fatal IRQ registery error %d.\n", err);
2596                         panic("QFE request irq");
2597                 }
2598         }
2599 }
2600
2601 static void quattro_sbus_free_irqs(void)
2602 {
2603         struct quattro *qp;
2604
2605         for (qp = qfe_sbus_list; qp != NULL; qp = qp->next) {
2606                 struct sbus_dev *sdev = qp->quattro_dev;
2607
2608                 free_irq(sdev->irqs[0], qp);
2609         }
2610 }
2611 #endif /* CONFIG_SBUS */
2612
2613 #ifdef CONFIG_PCI
2614 static struct quattro * __devinit quattro_pci_find(struct pci_dev *pdev)
2615 {
2616         struct pci_dev *bdev = pdev->bus->self;
2617         struct quattro *qp;
2618
2619         if (!bdev) return NULL;
2620         for (qp = qfe_pci_list; qp != NULL; qp = qp->next) {
2621                 struct pci_dev *qpdev = qp->quattro_dev;
2622
2623                 if (qpdev == bdev)
2624                         return qp;
2625         }
2626         qp = kmalloc(sizeof(struct quattro), GFP_KERNEL);
2627         if (qp != NULL) {
2628                 int i;
2629
2630                 for (i = 0; i < 4; i++)
2631                         qp->happy_meals[i] = NULL;
2632
2633                 qp->quattro_dev = bdev;
2634                 qp->next = qfe_pci_list;
2635                 qfe_pci_list = qp;
2636
2637                 /* No range tricks necessary on PCI. */
2638                 qp->nranges = 0;
2639         }
2640         return qp;
2641 }
2642 #endif /* CONFIG_PCI */
2643
2644 #ifdef CONFIG_SBUS
2645 static int __devinit happy_meal_sbus_probe_one(struct sbus_dev *sdev, int is_qfe)
2646 {
2647         struct device_node *dp = sdev->ofdev.node;
2648         struct quattro *qp = NULL;
2649         struct happy_meal *hp;
2650         struct net_device *dev;
2651         int i, qfe_slot = -1;
2652         int err = -ENODEV;
2653         DECLARE_MAC_BUF(mac);
2654
2655         if (is_qfe) {
2656                 qp = quattro_sbus_find(sdev);
2657                 if (qp == NULL)
2658                         goto err_out;
2659                 for (qfe_slot = 0; qfe_slot < 4; qfe_slot++)
2660                         if (qp->happy_meals[qfe_slot] == NULL)
2661                                 break;
2662                 if (qfe_slot == 4)
2663                         goto err_out;
2664         }
2665
2666         err = -ENOMEM;
2667         dev = alloc_etherdev(sizeof(struct happy_meal));
2668         if (!dev)
2669                 goto err_out;
2670         SET_NETDEV_DEV(dev, &sdev->ofdev.dev);
2671
2672         if (hme_version_printed++ == 0)
2673                 printk(KERN_INFO "%s", version);
2674
2675         /* If user did not specify a MAC address specifically, use
2676          * the Quattro local-mac-address property...
2677          */
2678         for (i = 0; i < 6; i++) {
2679                 if (macaddr[i] != 0)
2680                         break;
2681         }
2682         if (i < 6) { /* a mac address was given */
2683                 for (i = 0; i < 6; i++)
2684                         dev->dev_addr[i] = macaddr[i];
2685                 macaddr[5]++;
2686         } else {
2687                 const unsigned char *addr;
2688                 int len;
2689
2690                 addr = of_get_property(dp, "local-mac-address", &len);
2691
2692                 if (qfe_slot != -1 && addr && len == 6)
2693                         memcpy(dev->dev_addr, addr, 6);
2694                 else
2695                         memcpy(dev->dev_addr, idprom->id_ethaddr, 6);
2696         }
2697
2698         hp = dev->priv;
2699
2700         hp->happy_dev = sdev;
2701         hp->dma_dev = &sdev->ofdev.dev;
2702
2703         spin_lock_init(&hp->happy_lock);
2704
2705         err = -ENODEV;
2706         if (sdev->num_registers != 5) {
2707                 printk(KERN_ERR "happymeal: Device needs 5 regs, has %d.\n",
2708                        sdev->num_registers);
2709                 goto err_out_free_netdev;
2710         }
2711
2712         if (qp != NULL) {
2713                 hp->qfe_parent = qp;
2714                 hp->qfe_ent = qfe_slot;
2715                 qp->happy_meals[qfe_slot] = dev;
2716                 quattro_apply_ranges(qp, hp);
2717         }
2718
2719         hp->gregs = sbus_ioremap(&sdev->resource[0], 0,
2720                                  GREG_REG_SIZE, "HME Global Regs");
2721         if (!hp->gregs) {
2722                 printk(KERN_ERR "happymeal: Cannot map global registers.\n");
2723                 goto err_out_free_netdev;
2724         }
2725
2726         hp->etxregs = sbus_ioremap(&sdev->resource[1], 0,
2727                                    ETX_REG_SIZE, "HME TX Regs");
2728         if (!hp->etxregs) {
2729                 printk(KERN_ERR "happymeal: Cannot map MAC TX registers.\n");
2730                 goto err_out_iounmap;
2731         }
2732
2733         hp->erxregs = sbus_ioremap(&sdev->resource[2], 0,
2734                                    ERX_REG_SIZE, "HME RX Regs");
2735         if (!hp->erxregs) {
2736                 printk(KERN_ERR "happymeal: Cannot map MAC RX registers.\n");
2737                 goto err_out_iounmap;
2738         }
2739
2740         hp->bigmacregs = sbus_ioremap(&sdev->resource[3], 0,
2741                                       BMAC_REG_SIZE, "HME BIGMAC Regs");
2742         if (!hp->bigmacregs) {
2743                 printk(KERN_ERR "happymeal: Cannot map BIGMAC registers.\n");
2744                 goto err_out_iounmap;
2745         }
2746
2747         hp->tcvregs = sbus_ioremap(&sdev->resource[4], 0,
2748                                    TCVR_REG_SIZE, "HME Tranceiver Regs");
2749         if (!hp->tcvregs) {
2750                 printk(KERN_ERR "happymeal: Cannot map TCVR registers.\n");
2751                 goto err_out_iounmap;
2752         }
2753
2754         hp->hm_revision = of_getintprop_default(dp, "hm-rev", 0xff);
2755         if (hp->hm_revision == 0xff)
2756                 hp->hm_revision = 0xa0;
2757
2758         /* Now enable the feature flags we can. */
2759         if (hp->hm_revision == 0x20 || hp->hm_revision == 0x21)
2760                 hp->happy_flags = HFLAG_20_21;
2761         else if (hp->hm_revision != 0xa0)
2762                 hp->happy_flags = HFLAG_NOT_A0;
2763
2764         if (qp != NULL)
2765                 hp->happy_flags |= HFLAG_QUATTRO;
2766
2767         /* Get the supported DVMA burst sizes from our Happy SBUS. */
2768         hp->happy_bursts = of_getintprop_default(sdev->bus->ofdev.node,
2769                                                  "burst-sizes", 0x00);
2770
2771         hp->happy_block = dma_alloc_coherent(hp->dma_dev,
2772                                              PAGE_SIZE,
2773                                              &hp->hblock_dvma,
2774                                              GFP_ATOMIC);
2775         err = -ENOMEM;
2776         if (!hp->happy_block) {
2777                 printk(KERN_ERR "happymeal: Cannot allocate descriptors.\n");
2778                 goto err_out_iounmap;
2779         }
2780
2781         /* Force check of the link first time we are brought up. */
2782         hp->linkcheck = 0;
2783
2784         /* Force timer state to 'asleep' with count of zero. */
2785         hp->timer_state = asleep;
2786         hp->timer_ticks = 0;
2787
2788         init_timer(&hp->happy_timer);
2789
2790         hp->dev = dev;
2791         dev->open = &happy_meal_open;
2792         dev->stop = &happy_meal_close;
2793         dev->hard_start_xmit = &happy_meal_start_xmit;
2794         dev->get_stats = &happy_meal_get_stats;
2795         dev->set_multicast_list = &happy_meal_set_multicast;
2796         dev->tx_timeout = &happy_meal_tx_timeout;
2797         dev->watchdog_timeo = 5*HZ;
2798         dev->ethtool_ops = &hme_ethtool_ops;
2799
2800         /* Happy Meal can do it all... */
2801         dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM;
2802
2803         dev->irq = sdev->irqs[0];
2804
2805 #if defined(CONFIG_SBUS) && defined(CONFIG_PCI)
2806         /* Hook up PCI register/dma accessors. */
2807         hp->read_desc32 = sbus_hme_read_desc32;
2808         hp->write_txd = sbus_hme_write_txd;
2809         hp->write_rxd = sbus_hme_write_rxd;
2810         hp->dma_map = (u32 (*)(void *, void *, long, int))dma_map_single;
2811         hp->dma_unmap = (void (*)(void *, u32, long, int))dma_unmap_single;
2812         hp->dma_sync_for_cpu = (void (*)(void *, u32, long, int))
2813                 dma_sync_single_for_cpu;
2814         hp->dma_sync_for_device = (void (*)(void *, u32, long, int))
2815                 dma_sync_single_for_device;
2816         hp->read32 = sbus_hme_read32;
2817         hp->write32 = sbus_hme_write32;
2818 #endif
2819
2820         /* Grrr, Happy Meal comes up by default not advertising
2821          * full duplex 100baseT capabilities, fix this.
2822          */
2823         spin_lock_irq(&hp->happy_lock);
2824         happy_meal_set_initial_advertisement(hp);
2825         spin_unlock_irq(&hp->happy_lock);
2826
2827         if (register_netdev(hp->dev)) {
2828                 printk(KERN_ERR "happymeal: Cannot register net device, "
2829                        "aborting.\n");
2830                 goto err_out_free_coherent;
2831         }
2832
2833         dev_set_drvdata(&sdev->ofdev.dev, hp);
2834
2835         if (qfe_slot != -1)
2836                 printk(KERN_INFO "%s: Quattro HME slot %d (SBUS) 10/100baseT Ethernet ",
2837                        dev->name, qfe_slot);
2838         else
2839                 printk(KERN_INFO "%s: HAPPY MEAL (SBUS) 10/100baseT Ethernet ",
2840                        dev->name);
2841
2842         printk("%s\n", print_mac(mac, dev->dev_addr));
2843
2844         return 0;
2845
2846 err_out_free_coherent:
2847         dma_free_coherent(hp->dma_dev,
2848                           PAGE_SIZE,
2849                           hp->happy_block,
2850                           hp->hblock_dvma);
2851
2852 err_out_iounmap:
2853         if (hp->gregs)
2854                 sbus_iounmap(hp->gregs, GREG_REG_SIZE);
2855         if (hp->etxregs)
2856                 sbus_iounmap(hp->etxregs, ETX_REG_SIZE);
2857         if (hp->erxregs)
2858                 sbus_iounmap(hp->erxregs, ERX_REG_SIZE);
2859         if (hp->bigmacregs)
2860                 sbus_iounmap(hp->bigmacregs, BMAC_REG_SIZE);
2861         if (hp->tcvregs)
2862                 sbus_iounmap(hp->tcvregs, TCVR_REG_SIZE);
2863
2864 err_out_free_netdev:
2865         free_netdev(dev);
2866
2867 err_out:
2868         return err;
2869 }
2870 #endif
2871
2872 #ifdef CONFIG_PCI
2873 #ifndef CONFIG_SPARC
2874 static int is_quattro_p(struct pci_dev *pdev)
2875 {
2876         struct pci_dev *busdev = pdev->bus->self;
2877         struct list_head *tmp;
2878         int n_hmes;
2879
2880         if (busdev == NULL ||
2881             busdev->vendor != PCI_VENDOR_ID_DEC ||
2882             busdev->device != PCI_DEVICE_ID_DEC_21153)
2883                 return 0;
2884
2885         n_hmes = 0;
2886         tmp = pdev->bus->devices.next;
2887         while (tmp != &pdev->bus->devices) {
2888                 struct pci_dev *this_pdev = pci_dev_b(tmp);
2889
2890                 if (this_pdev->vendor == PCI_VENDOR_ID_SUN &&
2891                     this_pdev->device == PCI_DEVICE_ID_SUN_HAPPYMEAL)
2892                         n_hmes++;
2893
2894                 tmp = tmp->next;
2895         }
2896
2897         if (n_hmes != 4)
2898                 return 0;
2899
2900         return 1;
2901 }
2902
2903 /* Fetch MAC address from vital product data of PCI ROM. */
2904 static int find_eth_addr_in_vpd(void __iomem *rom_base, int len, int index, unsigned char *dev_addr)
2905 {
2906         int this_offset;
2907
2908         for (this_offset = 0x20; this_offset < len; this_offset++) {
2909                 void __iomem *p = rom_base + this_offset;
2910
2911                 if (readb(p + 0) != 0x90 ||
2912                     readb(p + 1) != 0x00 ||
2913                     readb(p + 2) != 0x09 ||
2914                     readb(p + 3) != 0x4e ||
2915                     readb(p + 4) != 0x41 ||
2916                     readb(p + 5) != 0x06)
2917                         continue;
2918
2919                 this_offset += 6;
2920                 p += 6;
2921
2922                 if (index == 0) {
2923                         int i;
2924
2925                         for (i = 0; i < 6; i++)
2926                                 dev_addr[i] = readb(p + i);
2927                         return 1;
2928                 }
2929                 index--;
2930         }
2931         return 0;
2932 }
2933
2934 static void get_hme_mac_nonsparc(struct pci_dev *pdev, unsigned char *dev_addr)
2935 {
2936         size_t size;
2937         void __iomem *p = pci_map_rom(pdev, &size);
2938
2939         if (p) {
2940                 int index = 0;
2941                 int found;
2942
2943                 if (is_quattro_p(pdev))
2944                         index = PCI_SLOT(pdev->devfn);
2945
2946                 found = readb(p) == 0x55 &&
2947                         readb(p + 1) == 0xaa &&
2948                         find_eth_addr_in_vpd(p, (64 * 1024), index, dev_addr);
2949                 pci_unmap_rom(pdev, p);
2950                 if (found)
2951                         return;
2952         }
2953
2954         /* Sun MAC prefix then 3 random bytes. */
2955         dev_addr[0] = 0x08;
2956         dev_addr[1] = 0x00;
2957         dev_addr[2] = 0x20;
2958         get_random_bytes(&dev_addr[3], 3);
2959         return;
2960 }
2961 #endif /* !(CONFIG_SPARC) */
2962
2963 static int __devinit happy_meal_pci_probe(struct pci_dev *pdev,
2964                                           const struct pci_device_id *ent)
2965 {
2966         struct quattro *qp = NULL;
2967 #ifdef CONFIG_SPARC
2968         struct device_node *dp;
2969 #endif
2970         struct happy_meal *hp;
2971         struct net_device *dev;
2972         void __iomem *hpreg_base;
2973         unsigned long hpreg_res;
2974         int i, qfe_slot = -1;
2975         char prom_name[64];
2976         int err;
2977         DECLARE_MAC_BUF(mac);
2978
2979         /* Now make sure pci_dev cookie is there. */
2980 #ifdef CONFIG_SPARC
2981         dp = pci_device_to_OF_node(pdev);
2982         strcpy(prom_name, dp->name);
2983 #else
2984         if (is_quattro_p(pdev))
2985                 strcpy(prom_name, "SUNW,qfe");
2986         else
2987                 strcpy(prom_name, "SUNW,hme");
2988 #endif
2989
2990         err = -ENODEV;
2991
2992         if (pci_enable_device(pdev))
2993                 goto err_out;
2994         pci_set_master(pdev);
2995
2996         if (!strcmp(prom_name, "SUNW,qfe") || !strcmp(prom_name, "qfe")) {
2997                 qp = quattro_pci_find(pdev);
2998                 if (qp == NULL)
2999                         goto err_out;
3000                 for (qfe_slot = 0; qfe_slot < 4; qfe_slot++)
3001                         if (qp->happy_meals[qfe_slot] == NULL)
3002                                 break;
3003                 if (qfe_slot == 4)
3004                         goto err_out;
3005         }
3006
3007         dev = alloc_etherdev(sizeof(struct happy_meal));
3008         err = -ENOMEM;
3009         if (!dev)
3010                 goto err_out;
3011         SET_NETDEV_DEV(dev, &pdev->dev);
3012
3013         if (hme_version_printed++ == 0)
3014                 printk(KERN_INFO "%s", version);
3015
3016         dev->base_addr = (long) pdev;
3017
3018         hp = (struct happy_meal *)dev->priv;
3019         memset(hp, 0, sizeof(*hp));
3020
3021         hp->happy_dev = pdev;
3022         hp->dma_dev = pdev;
3023
3024         spin_lock_init(&hp->happy_lock);
3025
3026         if (qp != NULL) {
3027                 hp->qfe_parent = qp;
3028                 hp->qfe_ent = qfe_slot;
3029                 qp->happy_meals[qfe_slot] = dev;
3030         }
3031
3032         hpreg_res = pci_resource_start(pdev, 0);
3033         err = -ENODEV;
3034         if ((pci_resource_flags(pdev, 0) & IORESOURCE_IO) != 0) {
3035                 printk(KERN_ERR "happymeal(PCI): Cannot find proper PCI device base address.\n");
3036                 goto err_out_clear_quattro;
3037         }
3038         if (pci_request_regions(pdev, DRV_NAME)) {
3039                 printk(KERN_ERR "happymeal(PCI): Cannot obtain PCI resources, "
3040                        "aborting.\n");
3041                 goto err_out_clear_quattro;
3042         }
3043
3044         if ((hpreg_base = ioremap(hpreg_res, 0x8000)) == NULL) {
3045                 printk(KERN_ERR "happymeal(PCI): Unable to remap card memory.\n");
3046                 goto err_out_free_res;
3047         }
3048
3049         for (i = 0; i < 6; i++) {
3050                 if (macaddr[i] != 0)
3051                         break;
3052         }
3053         if (i < 6) { /* a mac address was given */
3054                 for (i = 0; i < 6; i++)
3055                         dev->dev_addr[i] = macaddr[i];
3056                 macaddr[5]++;
3057         } else {
3058 #ifdef CONFIG_SPARC
3059                 const unsigned char *addr;
3060                 int len;
3061
3062                 if (qfe_slot != -1 &&
3063                     (addr = of_get_property(dp,
3064                                             "local-mac-address", &len)) != NULL
3065                     && len == 6) {
3066                         memcpy(dev->dev_addr, addr, 6);
3067                 } else {
3068                         memcpy(dev->dev_addr, idprom->id_ethaddr, 6);
3069                 }
3070 #else
3071                 get_hme_mac_nonsparc(pdev, &dev->dev_addr[0]);
3072 #endif
3073         }
3074
3075         /* Layout registers. */
3076         hp->gregs      = (hpreg_base + 0x0000UL);
3077         hp->etxregs    = (hpreg_base + 0x2000UL);
3078         hp->erxregs    = (hpreg_base + 0x4000UL);
3079         hp->bigmacregs = (hpreg_base + 0x6000UL);
3080         hp->tcvregs    = (hpreg_base + 0x7000UL);
3081
3082 #ifdef CONFIG_SPARC
3083         hp->hm_revision = of_getintprop_default(dp, "hm-rev", 0xff);
3084         if (hp->hm_revision == 0xff)
3085                 hp->hm_revision = 0xc0 | (pdev->revision & 0x0f);
3086 #else
3087         /* works with this on non-sparc hosts */
3088         hp->hm_revision = 0x20;
3089 #endif
3090
3091         /* Now enable the feature flags we can. */
3092         if (hp->hm_revision == 0x20 || hp->hm_revision == 0x21)
3093                 hp->happy_flags = HFLAG_20_21;
3094         else if (hp->hm_revision != 0xa0 && hp->hm_revision != 0xc0)
3095                 hp->happy_flags = HFLAG_NOT_A0;
3096
3097         if (qp != NULL)
3098                 hp->happy_flags |= HFLAG_QUATTRO;
3099
3100         /* And of course, indicate this is PCI. */
3101         hp->happy_flags |= HFLAG_PCI;
3102
3103 #ifdef CONFIG_SPARC
3104         /* Assume PCI happy meals can handle all burst sizes. */
3105         hp->happy_bursts = DMA_BURSTBITS;
3106 #endif
3107
3108         hp->happy_block = (struct hmeal_init_block *)
3109                 pci_alloc_consistent(pdev, PAGE_SIZE, &hp->hblock_dvma);
3110
3111         err = -ENODEV;
3112         if (!hp->happy_block) {
3113                 printk(KERN_ERR "happymeal(PCI): Cannot get hme init block.\n");
3114                 goto err_out_iounmap;
3115         }
3116
3117         hp->linkcheck = 0;
3118         hp->timer_state = asleep;
3119         hp->timer_ticks = 0;
3120
3121         init_timer(&hp->happy_timer);
3122
3123         hp->dev = dev;
3124         dev->open = &happy_meal_open;
3125         dev->stop = &happy_meal_close;
3126         dev->hard_start_xmit = &happy_meal_start_xmit;
3127         dev->get_stats = &happy_meal_get_stats;
3128         dev->set_multicast_list = &happy_meal_set_multicast;
3129         dev->tx_timeout = &happy_meal_tx_timeout;
3130         dev->watchdog_timeo = 5*HZ;
3131         dev->ethtool_ops = &hme_ethtool_ops;
3132         dev->irq = pdev->irq;
3133         dev->dma = 0;
3134
3135         /* Happy Meal can do it all... */
3136         dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM;
3137
3138 #if defined(CONFIG_SBUS) && defined(CONFIG_PCI)
3139         /* Hook up PCI register/dma accessors. */
3140         hp->read_desc32 = pci_hme_read_desc32;
3141         hp->write_txd = pci_hme_write_txd;
3142         hp->write_rxd = pci_hme_write_rxd;
3143         hp->dma_map = (u32 (*)(void *, void *, long, int))pci_map_single;
3144         hp->dma_unmap = (void (*)(void *, u32, long, int))pci_unmap_single;
3145         hp->dma_sync_for_cpu = (void (*)(void *, u32, long, int))
3146                 pci_dma_sync_single_for_cpu;
3147         hp->dma_sync_for_device = (void (*)(void *, u32, long, int))
3148                 pci_dma_sync_single_for_device;
3149         hp->read32 = pci_hme_read32;
3150         hp->write32 = pci_hme_write32;
3151 #endif
3152
3153         /* Grrr, Happy Meal comes up by default not advertising
3154          * full duplex 100baseT capabilities, fix this.
3155          */
3156         spin_lock_irq(&hp->happy_lock);
3157         happy_meal_set_initial_advertisement(hp);
3158         spin_unlock_irq(&hp->happy_lock);
3159
3160         if (register_netdev(hp->dev)) {
3161                 printk(KERN_ERR "happymeal(PCI): Cannot register net device, "
3162                        "aborting.\n");
3163                 goto err_out_iounmap;
3164         }
3165
3166         dev_set_drvdata(&pdev->dev, hp);
3167
3168         if (!qfe_slot) {
3169                 struct pci_dev *qpdev = qp->quattro_dev;
3170
3171                 prom_name[0] = 0;
3172                 if (!strncmp(dev->name, "eth", 3)) {
3173                         int i = simple_strtoul(dev->name + 3, NULL, 10);
3174                         sprintf(prom_name, "-%d", i + 3);
3175                 }
3176                 printk(KERN_INFO "%s%s: Quattro HME (PCI/CheerIO) 10/100baseT Ethernet ", dev->name, prom_name);
3177                 if (qpdev->vendor == PCI_VENDOR_ID_DEC &&
3178                     qpdev->device == PCI_DEVICE_ID_DEC_21153)
3179                         printk("DEC 21153 PCI Bridge\n");
3180                 else
3181                         printk("unknown bridge %04x.%04x\n",
3182                                 qpdev->vendor, qpdev->device);
3183         }
3184
3185         if (qfe_slot != -1)
3186                 printk(KERN_INFO "%s: Quattro HME slot %d (PCI/CheerIO) 10/100baseT Ethernet ",
3187                        dev->name, qfe_slot);
3188         else
3189                 printk(KERN_INFO "%s: HAPPY MEAL (PCI/CheerIO) 10/100BaseT Ethernet ",
3190                        dev->name);
3191
3192         printk("%s\n", print_mac(mac, dev->dev_addr));
3193
3194         return 0;
3195
3196 err_out_iounmap:
3197         iounmap(hp->gregs);
3198
3199 err_out_free_res:
3200         pci_release_regions(pdev);
3201
3202 err_out_clear_quattro:
3203         if (qp != NULL)
3204                 qp->happy_meals[qfe_slot] = NULL;
3205
3206         free_netdev(dev);
3207
3208 err_out:
3209         return err;
3210 }
3211
3212 static void __devexit happy_meal_pci_remove(struct pci_dev *pdev)
3213 {
3214         struct happy_meal *hp = dev_get_drvdata(&pdev->dev);
3215         struct net_device *net_dev = hp->dev;
3216
3217         unregister_netdev(net_dev);
3218
3219         pci_free_consistent(hp->dma_dev,
3220                             PAGE_SIZE,
3221                             hp->happy_block,
3222                             hp->hblock_dvma);
3223         iounmap(hp->gregs);
3224         pci_release_regions(hp->dma_dev);
3225
3226         free_netdev(net_dev);
3227
3228         dev_set_drvdata(&pdev->dev, NULL);
3229 }
3230
3231 static struct pci_device_id happymeal_pci_ids[] = {
3232         { PCI_DEVICE(PCI_VENDOR_ID_SUN, PCI_DEVICE_ID_SUN_HAPPYMEAL) },
3233         { }                     /* Terminating entry */
3234 };
3235
3236 MODULE_DEVICE_TABLE(pci, happymeal_pci_ids);
3237
3238 static struct pci_driver hme_pci_driver = {
3239         .name           = "hme",
3240         .id_table       = happymeal_pci_ids,
3241         .probe          = happy_meal_pci_probe,
3242         .remove         = __devexit_p(happy_meal_pci_remove),
3243 };
3244
3245 static int __init happy_meal_pci_init(void)
3246 {
3247         return pci_register_driver(&hme_pci_driver);
3248 }
3249
3250 static void happy_meal_pci_exit(void)
3251 {
3252         pci_unregister_driver(&hme_pci_driver);
3253
3254         while (qfe_pci_list) {
3255                 struct quattro *qfe = qfe_pci_list;
3256                 struct quattro *next = qfe->next;
3257
3258                 kfree(qfe);
3259
3260                 qfe_pci_list = next;
3261         }
3262 }
3263
3264 #endif
3265
3266 #ifdef CONFIG_SBUS
3267 static int __devinit hme_sbus_probe(struct of_device *dev, const struct of_device_id *match)
3268 {
3269         struct sbus_dev *sdev = to_sbus_device(&dev->dev);
3270         struct device_node *dp = dev->node;
3271         const char *model = of_get_property(dp, "model", NULL);
3272         int is_qfe = (match->data != NULL);
3273
3274         if (!is_qfe && model && !strcmp(model, "SUNW,sbus-qfe"))
3275                 is_qfe = 1;
3276
3277         return happy_meal_sbus_probe_one(sdev, is_qfe);
3278 }
3279
3280 static int __devexit hme_sbus_remove(struct of_device *dev)
3281 {
3282         struct happy_meal *hp = dev_get_drvdata(&dev->dev);
3283         struct net_device *net_dev = hp->dev;
3284
3285         unregister_netdev(net_dev);
3286
3287         /* XXX qfe parent interrupt... */
3288
3289         sbus_iounmap(hp->gregs, GREG_REG_SIZE);
3290         sbus_iounmap(hp->etxregs, ETX_REG_SIZE);
3291         sbus_iounmap(hp->erxregs, ERX_REG_SIZE);
3292         sbus_iounmap(hp->bigmacregs, BMAC_REG_SIZE);
3293         sbus_iounmap(hp->tcvregs, TCVR_REG_SIZE);
3294         dma_free_coherent(hp->dma_dev,
3295                           PAGE_SIZE,
3296                           hp->happy_block,
3297                           hp->hblock_dvma);
3298
3299         free_netdev(net_dev);
3300
3301         dev_set_drvdata(&dev->dev, NULL);
3302
3303         return 0;
3304 }
3305
3306 static struct of_device_id hme_sbus_match[] = {
3307         {
3308                 .name = "SUNW,hme",
3309         },
3310         {
3311                 .name = "SUNW,qfe",
3312                 .data = (void *) 1,
3313         },
3314         {
3315                 .name = "qfe",
3316                 .data = (void *) 1,
3317         },
3318         {},
3319 };
3320
3321 MODULE_DEVICE_TABLE(of, hme_sbus_match);
3322
3323 static struct of_platform_driver hme_sbus_driver = {
3324         .name           = "hme",
3325         .match_table    = hme_sbus_match,
3326         .probe          = hme_sbus_probe,
3327         .remove         = __devexit_p(hme_sbus_remove),
3328 };
3329
3330 static int __init happy_meal_sbus_init(void)
3331 {
3332         int err;
3333
3334         err = of_register_driver(&hme_sbus_driver, &sbus_bus_type);
3335         if (!err)
3336                 quattro_sbus_register_irqs();
3337
3338         return err;
3339 }
3340
3341 static void happy_meal_sbus_exit(void)
3342 {
3343         of_unregister_driver(&hme_sbus_driver);
3344         quattro_sbus_free_irqs();
3345
3346         while (qfe_sbus_list) {
3347                 struct quattro *qfe = qfe_sbus_list;
3348                 struct quattro *next = qfe->next;
3349
3350                 kfree(qfe);
3351
3352                 qfe_sbus_list = next;
3353         }
3354 }
3355 #endif
3356
3357 static int __init happy_meal_probe(void)
3358 {
3359         int err = 0;
3360
3361 #ifdef CONFIG_SBUS
3362         err = happy_meal_sbus_init();
3363 #endif
3364 #ifdef CONFIG_PCI
3365         if (!err) {
3366                 err = happy_meal_pci_init();
3367 #ifdef CONFIG_SBUS
3368                 if (err)
3369                         happy_meal_sbus_exit();
3370 #endif
3371         }
3372 #endif
3373
3374         return err;
3375 }
3376
3377
3378 static void __exit happy_meal_exit(void)
3379 {
3380 #ifdef CONFIG_SBUS
3381         happy_meal_sbus_exit();
3382 #endif
3383 #ifdef CONFIG_PCI
3384         happy_meal_pci_exit();
3385 #endif
3386 }
3387
3388 module_init(happy_meal_probe);
3389 module_exit(happy_meal_exit);