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   1 /*
   2 =========================================================================
   3  r8169.c: A RealTek RTL-8169 Gigabit Ethernet driver for Linux kernel 2.4.x.
   4  --------------------------------------------------------------------
   5
   6  History:
   7  Feb  4 2002    - created initially by ShuChen <shuchen@realtek.com.tw>.
   8  May 20 2002    - Add link status force-mode and TBI mode support.
   9         2004    - Massive updates. See kernel SCM system for details.
  10 =========================================================================
  11   1. [DEPRECATED: use ethtool instead] The media can be forced in 5 modes.
  12          Command: 'insmod r8169 media = SET_MEDIA'
  13          Ex:      'insmod r8169 media = 0x04' will force PHY to operate in 100Mpbs Half-duplex.
  14
  15          SET_MEDIA can be:
  16                 _10_Half        = 0x01
  17                 _10_Full        = 0x02
  18                 _100_Half       = 0x04
  19                 _100_Full       = 0x08
  20                 _1000_Full      = 0x10
  21
  22   2. Support TBI mode.
  23 =========================================================================
  24 VERSION 1.1     <2002/10/4>
  25
  26         The bit4:0 of MII register 4 is called "selector field", and have to be
  27         00001b to indicate support of IEEE std 802.3 during NWay process of
  28         exchanging Link Code Word (FLP).
  29
  30 VERSION 1.2     <2002/11/30>
  31
  32         - Large style cleanup
  33         - Use ether_crc in stock kernel (linux/crc32.h)
  34         - Copy mc_filter setup code from 8139cp
  35           (includes an optimization, and avoids set_bit use)
  36
  37 VERSION 1.6LK   <2004/04/14>
  38
  39         - Merge of Realtek's version 1.6
  40         - Conversion to DMA API
  41         - Suspend/resume
  42         - Endianness
  43         - Misc Rx/Tx bugs
  44
  45 VERSION 2.2LK   <2005/01/25>
  46
  47         - RX csum, TX csum/SG, TSO
  48         - VLAN
  49         - baby (< 7200) Jumbo frames support
  50         - Merge of Realtek's version 2.2 (new phy)
  51  */
  52
  53 #include <linux/module.h>
  54 #include <linux/moduleparam.h>
  55 #include <linux/pci.h>
  56 #include <linux/netdevice.h>
  57 #include <linux/etherdevice.h>
  58 #include <linux/delay.h>
  59 #include <linux/ethtool.h>
  60 #include <linux/mii.h>
  61 #include <linux/if_vlan.h>
  62 #include <linux/crc32.h>
  63 #include <linux/in.h>
  64 #include <linux/ip.h>
  65 #include <linux/tcp.h>
  66 #include <linux/init.h>
  67 #include <linux/dma-mapping.h>
  68
  69 #include <asm/io.h>
  70 #include <asm/irq.h>
  71
  72 #ifdef CONFIG_R8169_NAPI
  73 #define NAPI_SUFFIX     "-NAPI"
  74 #else
  75 #define NAPI_SUFFIX     ""
  76 #endif
  77
  78 #define RTL8169_VERSION "2.2LK" NAPI_SUFFIX
  79 #define MODULENAME "r8169"
  80 #define PFX MODULENAME ": "
  81
  82 #ifdef RTL8169_DEBUG
  83 #define assert(expr) \
  84         if(!(expr)) {                                   \
  85                 printk( "Assertion failed! %s,%s,%s,line=%d\n", \
  86                 #expr,__FILE__,__FUNCTION__,__LINE__);          \
  87         }
  88 #define dprintk(fmt, args...)   do { printk(PFX fmt, ## args); } while (0)
  89 #else
  90 #define assert(expr) do {} while (0)
  91 #define dprintk(fmt, args...)   do {} while (0)
  92 #endif /* RTL8169_DEBUG */
  93
  94 #define R8169_MSG_DEFAULT \
  95         (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN)
  96
  97 #define TX_BUFFS_AVAIL(tp) \
  98         (tp->dirty_tx + NUM_TX_DESC - tp->cur_tx - 1)
  99
 100 #ifdef CONFIG_R8169_NAPI
 101 #define rtl8169_rx_skb                  netif_receive_skb
 102 #define rtl8169_rx_hwaccel_skb          vlan_hwaccel_receive_skb
 103 #define rtl8169_rx_quota(count, quota)  min(count, quota)
 104 #else
 105 #define rtl8169_rx_skb                  netif_rx
 106 #define rtl8169_rx_hwaccel_skb          vlan_hwaccel_rx
 107 #define rtl8169_rx_quota(count, quota)  count
 108 #endif
 109
 110 /* media options */
 111 #define MAX_UNITS 8
 112 static int media[MAX_UNITS] = { -1, -1, -1, -1, -1, -1, -1, -1 };
 113 static int num_media = 0;
 114
 115 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
 116 static const int max_interrupt_work = 20;
 117
 118 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
 119    The RTL chips use a 64 element hash table based on the Ethernet CRC. */
 120 static const int multicast_filter_limit = 32;
 121
 122 /* MAC address length */
 123 #define MAC_ADDR_LEN    6
 124
 125 #define RX_FIFO_THRESH  7       /* 7 means NO threshold, Rx buffer level before first PCI xfer. */
 126 #define RX_DMA_BURST    6       /* Maximum PCI burst, '6' is 1024 */
 127 #define TX_DMA_BURST    6       /* Maximum PCI burst, '6' is 1024 */
 128 #define EarlyTxThld     0x3F    /* 0x3F means NO early transmit */
 129 #define RxPacketMaxSize 0x3FE8  /* 16K - 1 - ETH_HLEN - VLAN - CRC... */
 130 #define SafeMtu         0x1c20  /* ... actually life sucks beyond ~7k */
 131 #define InterFrameGap   0x03    /* 3 means InterFrameGap = the shortest one */
 132
 133 #define R8169_REGS_SIZE         256
 134 #define R8169_NAPI_WEIGHT       64
 135 #define NUM_TX_DESC     64      /* Number of Tx descriptor registers */
 136 #define NUM_RX_DESC     256     /* Number of Rx descriptor registers */
 137 #define RX_BUF_SIZE     1536    /* Rx Buffer size */
 138 #define R8169_TX_RING_BYTES     (NUM_TX_DESC * sizeof(struct TxDesc))
 139 #define R8169_RX_RING_BYTES     (NUM_RX_DESC * sizeof(struct RxDesc))
 140
 141 #define RTL8169_TX_TIMEOUT      (6*HZ)
 142 #define RTL8169_PHY_TIMEOUT     (10*HZ)
 143
 144 /* write/read MMIO register */
 145 #define RTL_W8(reg, val8)       writeb ((val8), ioaddr + (reg))
 146 #define RTL_W16(reg, val16)     writew ((val16), ioaddr + (reg))
 147 #define RTL_W32(reg, val32)     writel ((val32), ioaddr + (reg))
 148 #define RTL_R8(reg)             readb (ioaddr + (reg))
 149 #define RTL_R16(reg)            readw (ioaddr + (reg))
 150 #define RTL_R32(reg)            ((unsigned long) readl (ioaddr + (reg)))
 151
 152 enum mac_version {
 153         RTL_GIGA_MAC_VER_B = 0x00,
 154         /* RTL_GIGA_MAC_VER_C = 0x03, */
 155         RTL_GIGA_MAC_VER_D = 0x01,
 156         RTL_GIGA_MAC_VER_E = 0x02,
 157         RTL_GIGA_MAC_VER_X = 0x04       /* Greater than RTL_GIGA_MAC_VER_E */
 158 };
 159
 160 enum phy_version {
 161         RTL_GIGA_PHY_VER_C = 0x03, /* PHY Reg 0x03 bit0-3 == 0x0000 */
 162         RTL_GIGA_PHY_VER_D = 0x04, /* PHY Reg 0x03 bit0-3 == 0x0000 */
 163         RTL_GIGA_PHY_VER_E = 0x05, /* PHY Reg 0x03 bit0-3 == 0x0000 */
 164         RTL_GIGA_PHY_VER_F = 0x06, /* PHY Reg 0x03 bit0-3 == 0x0001 */
 165         RTL_GIGA_PHY_VER_G = 0x07, /* PHY Reg 0x03 bit0-3 == 0x0002 */
 166         RTL_GIGA_PHY_VER_H = 0x08, /* PHY Reg 0x03 bit0-3 == 0x0003 */
 167 };
 168
 169
 170 #define _R(NAME,MAC,MASK) \
 171         { .name = NAME, .mac_version = MAC, .RxConfigMask = MASK }
 172
 173 static const struct {
 174         const char *name;
 175         u8 mac_version;
 176         u32 RxConfigMask;       /* Clears the bits supported by this chip */
 177 } rtl_chip_info[] = {
 178         _R("RTL8169",           RTL_GIGA_MAC_VER_B, 0xff7e1880),
 179         _R("RTL8169s/8110s",    RTL_GIGA_MAC_VER_D, 0xff7e1880),
 180         _R("RTL8169s/8110s",    RTL_GIGA_MAC_VER_E, 0xff7e1880),
 181         _R("RTL8169s/8110s",    RTL_GIGA_MAC_VER_X, 0xff7e1880),
 182 };
 183 #undef _R
 184
 185 static struct pci_device_id rtl8169_pci_tbl[] = {
 186         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK,     0x8169), },
 187         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK,     0x8129), },
 188         { PCI_DEVICE(PCI_VENDOR_ID_DLINK,       0x4300), },
 189         { PCI_DEVICE(0x16ec,                    0x0116), },
 190         { PCI_VENDOR_ID_LINKSYS,                0x1032, PCI_ANY_ID, 0x0024, },
 191         {0,},
 192 };
 193
 194 MODULE_DEVICE_TABLE(pci, rtl8169_pci_tbl);
 195
 196 static int rx_copybreak = 200;
 197 static int use_dac;
 198 static struct {
 199         u32 msg_enable;
 200 } debug = { -1 };
 201
 202 enum RTL8169_registers {
 203         MAC0 = 0,               /* Ethernet hardware address. */
 204         MAR0 = 8,               /* Multicast filter. */
 205         CounterAddrLow = 0x10,
 206         CounterAddrHigh = 0x14,
 207         TxDescStartAddrLow = 0x20,
 208         TxDescStartAddrHigh = 0x24,
 209         TxHDescStartAddrLow = 0x28,
 210         TxHDescStartAddrHigh = 0x2c,
 211         FLASH = 0x30,
 212         ERSR = 0x36,
 213         ChipCmd = 0x37,
 214         TxPoll = 0x38,
 215         IntrMask = 0x3C,
 216         IntrStatus = 0x3E,
 217         TxConfig = 0x40,
 218         RxConfig = 0x44,
 219         RxMissed = 0x4C,
 220         Cfg9346 = 0x50,
 221         Config0 = 0x51,
 222         Config1 = 0x52,
 223         Config2 = 0x53,
 224         Config3 = 0x54,
 225         Config4 = 0x55,
 226         Config5 = 0x56,
 227         MultiIntr = 0x5C,
 228         PHYAR = 0x60,
 229         TBICSR = 0x64,
 230         TBI_ANAR = 0x68,
 231         TBI_LPAR = 0x6A,
 232         PHYstatus = 0x6C,
 233         RxMaxSize = 0xDA,
 234         CPlusCmd = 0xE0,
 235         IntrMitigate = 0xE2,
 236         RxDescAddrLow = 0xE4,
 237         RxDescAddrHigh = 0xE8,
 238         EarlyTxThres = 0xEC,
 239         FuncEvent = 0xF0,
 240         FuncEventMask = 0xF4,
 241         FuncPresetState = 0xF8,
 242         FuncForceEvent = 0xFC,
 243 };
 244
 245 enum RTL8169_register_content {
 246         /* InterruptStatusBits */
 247         SYSErr = 0x8000,
 248         PCSTimeout = 0x4000,
 249         SWInt = 0x0100,
 250         TxDescUnavail = 0x80,
 251         RxFIFOOver = 0x40,
 252         LinkChg = 0x20,
 253         RxOverflow = 0x10,
 254         TxErr = 0x08,
 255         TxOK = 0x04,
 256         RxErr = 0x02,
 257         RxOK = 0x01,
 258
 259         /* RxStatusDesc */
 260         RxFOVF  = (1 << 23),
 261         RxRWT   = (1 << 22),
 262         RxRES   = (1 << 21),
 263         RxRUNT  = (1 << 20),
 264         RxCRC   = (1 << 19),
 265
 266         /* ChipCmdBits */
 267         CmdReset = 0x10,
 268         CmdRxEnb = 0x08,
 269         CmdTxEnb = 0x04,
 270         RxBufEmpty = 0x01,
 271
 272         /* Cfg9346Bits */
 273         Cfg9346_Lock = 0x00,
 274         Cfg9346_Unlock = 0xC0,
 275
 276         /* rx_mode_bits */
 277         AcceptErr = 0x20,
 278         AcceptRunt = 0x10,
 279         AcceptBroadcast = 0x08,
 280         AcceptMulticast = 0x04,
 281         AcceptMyPhys = 0x02,
 282         AcceptAllPhys = 0x01,
 283
 284         /* RxConfigBits */
 285         RxCfgFIFOShift = 13,
 286         RxCfgDMAShift = 8,
 287
 288         /* TxConfigBits */
 289         TxInterFrameGapShift = 24,
 290         TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */
 291
 292         /* Config1 register p.24 */
 293         PMEnable        = (1 << 0),     /* Power Management Enable */
 294
 295         /* Config3 register p.25 */
 296         MagicPacket     = (1 << 5),     /* Wake up when receives a Magic Packet */
 297         LinkUp          = (1 << 4),     /* Wake up when the cable connection is re-established */
 298
 299         /* Config5 register p.27 */
 300         BWF             = (1 << 6),     /* Accept Broadcast wakeup frame */
 301         MWF             = (1 << 5),     /* Accept Multicast wakeup frame */
 302         UWF             = (1 << 4),     /* Accept Unicast wakeup frame */
 303         LanWake         = (1 << 1),     /* LanWake enable/disable */
 304         PMEStatus       = (1 << 0),     /* PME status can be reset by PCI RST# */
 305
 306         /* TBICSR p.28 */
 307         TBIReset        = 0x80000000,
 308         TBILoopback     = 0x40000000,
 309         TBINwEnable     = 0x20000000,
 310         TBINwRestart    = 0x10000000,
 311         TBILinkOk       = 0x02000000,
 312         TBINwComplete   = 0x01000000,
 313
 314         /* CPlusCmd p.31 */
 315         RxVlan          = (1 << 6),
 316         RxChkSum        = (1 << 5),
 317         PCIDAC          = (1 << 4),
 318         PCIMulRW        = (1 << 3),
 319
 320         /* rtl8169_PHYstatus */
 321         TBI_Enable = 0x80,
 322         TxFlowCtrl = 0x40,
 323         RxFlowCtrl = 0x20,
 324         _1000bpsF = 0x10,
 325         _100bps = 0x08,
 326         _10bps = 0x04,
 327         LinkStatus = 0x02,
 328         FullDup = 0x01,
 329
 330         /* GIGABIT_PHY_registers */
 331         PHY_CTRL_REG = 0,
 332         PHY_STAT_REG = 1,
 333         PHY_AUTO_NEGO_REG = 4,
 334         PHY_1000_CTRL_REG = 9,
 335
 336         /* GIGABIT_PHY_REG_BIT */
 337         PHY_Restart_Auto_Nego = 0x0200,
 338         PHY_Enable_Auto_Nego = 0x1000,
 339
 340         /* PHY_STAT_REG = 1 */
 341         PHY_Auto_Neco_Comp = 0x0020,
 342
 343         /* PHY_AUTO_NEGO_REG = 4 */
 344         PHY_Cap_10_Half = 0x0020,
 345         PHY_Cap_10_Full = 0x0040,
 346         PHY_Cap_100_Half = 0x0080,
 347         PHY_Cap_100_Full = 0x0100,
 348
 349         /* PHY_1000_CTRL_REG = 9 */
 350         PHY_Cap_1000_Full = 0x0200,
 351
 352         PHY_Cap_Null = 0x0,
 353
 354         /* _MediaType */
 355         _10_Half = 0x01,
 356         _10_Full = 0x02,
 357         _100_Half = 0x04,
 358         _100_Full = 0x08,
 359         _1000_Full = 0x10,
 360
 361         /* _TBICSRBit */
 362         TBILinkOK = 0x02000000,
 363
 364         /* DumpCounterCommand */
 365         CounterDump = 0x8,
 366 };
 367
 368 enum _DescStatusBit {
 369         DescOwn         = (1 << 31), /* Descriptor is owned by NIC */
 370         RingEnd         = (1 << 30), /* End of descriptor ring */
 371         FirstFrag       = (1 << 29), /* First segment of a packet */
 372         LastFrag        = (1 << 28), /* Final segment of a packet */
 373
 374         /* Tx private */
 375         LargeSend       = (1 << 27), /* TCP Large Send Offload (TSO) */
 376         MSSShift        = 16,        /* MSS value position */
 377         MSSMask         = 0xfff,     /* MSS value + LargeSend bit: 12 bits */
 378         IPCS            = (1 << 18), /* Calculate IP checksum */
 379         UDPCS           = (1 << 17), /* Calculate UDP/IP checksum */
 380         TCPCS           = (1 << 16), /* Calculate TCP/IP checksum */
 381         TxVlanTag       = (1 << 17), /* Add VLAN tag */
 382
 383         /* Rx private */
 384         PID1            = (1 << 18), /* Protocol ID bit 1/2 */
 385         PID0            = (1 << 17), /* Protocol ID bit 2/2 */
 386
 387 #define RxProtoUDP      (PID1)
 388 #define RxProtoTCP      (PID0)
 389 #define RxProtoIP       (PID1 | PID0)
 390 #define RxProtoMask     RxProtoIP
 391
 392         IPFail          = (1 << 16), /* IP checksum failed */
 393         UDPFail         = (1 << 15), /* UDP/IP checksum failed */
 394         TCPFail         = (1 << 14), /* TCP/IP checksum failed */
 395         RxVlanTag       = (1 << 16), /* VLAN tag available */
 396 };
 397
 398 #define RsvdMask        0x3fffc000
 399
 400 struct TxDesc {
 401         u32 opts1;
 402         u32 opts2;
 403         u64 addr;
 404 };
 405
 406 struct RxDesc {
 407         u32 opts1;
 408         u32 opts2;
 409         u64 addr;
 410 };
 411
 412 struct ring_info {
 413         struct sk_buff  *skb;
 414         u32             len;
 415         u8              __pad[sizeof(void *) - sizeof(u32)];
 416 };
 417
 418 struct rtl8169_private {
 419         void __iomem *mmio_addr;        /* memory map physical address */
 420         struct pci_dev *pci_dev;        /* Index of PCI device */
 421         struct net_device_stats stats;  /* statistics of net device */
 422         spinlock_t lock;                /* spin lock flag */
 423         u32 msg_enable;
 424         int chipset;
 425         int mac_version;
 426         int phy_version;
 427         u32 cur_rx; /* Index into the Rx descriptor buffer of next Rx pkt. */
 428         u32 cur_tx; /* Index into the Tx descriptor buffer of next Rx pkt. */
 429         u32 dirty_rx;
 430         u32 dirty_tx;
 431         struct TxDesc *TxDescArray;     /* 256-aligned Tx descriptor ring */
 432         struct RxDesc *RxDescArray;     /* 256-aligned Rx descriptor ring */
 433         dma_addr_t TxPhyAddr;
 434         dma_addr_t RxPhyAddr;
 435         struct sk_buff *Rx_skbuff[NUM_RX_DESC]; /* Rx data buffers */
 436         struct ring_info tx_skb[NUM_TX_DESC];   /* Tx data buffers */
 437         unsigned rx_buf_sz;
 438         struct timer_list timer;
 439         u16 cp_cmd;
 440         u16 intr_mask;
 441         int phy_auto_nego_reg;
 442         int phy_1000_ctrl_reg;
 443 #ifdef CONFIG_R8169_VLAN
 444         struct vlan_group *vlgrp;
 445 #endif
 446         int (*set_speed)(struct net_device *, u8 autoneg, u16 speed, u8 duplex);
 447         void (*get_settings)(struct net_device *, struct ethtool_cmd *);
 448         void (*phy_reset_enable)(void __iomem *);
 449         unsigned int (*phy_reset_pending)(void __iomem *);
 450         unsigned int (*link_ok)(void __iomem *);
 451         struct work_struct task;
 452         unsigned wol_enabled : 1;
 453 };
 454
 455 MODULE_AUTHOR("Realtek and the Linux r8169 crew <netdev@vger.kernel.org>");
 456 MODULE_DESCRIPTION("RealTek RTL-8169 Gigabit Ethernet driver");
 457 module_param_array(media, int, &num_media, 0);
 458 MODULE_PARM_DESC(media, "force phy operation. Deprecated by ethtool (8).");
 459 module_param(rx_copybreak, int, 0);
 460 MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");
 461 module_param(use_dac, int, 0);
 462 MODULE_PARM_DESC(use_dac, "Enable PCI DAC. Unsafe on 32 bit PCI slot.");
 463 module_param_named(debug, debug.msg_enable, int, 0);
 464 MODULE_PARM_DESC(debug, "Debug verbosity level (0=none, ..., 16=all)");
 465 MODULE_LICENSE("GPL");
 466 MODULE_VERSION(RTL8169_VERSION);
 467
 468 static int rtl8169_open(struct net_device *dev);
 469 static int rtl8169_start_xmit(struct sk_buff *skb, struct net_device *dev);
 470 static irqreturn_t rtl8169_interrupt(int irq, void *dev_instance,
 471                               struct pt_regs *regs);
 472 static int rtl8169_init_ring(struct net_device *dev);
 473 static void rtl8169_hw_start(struct net_device *dev);
 474 static int rtl8169_close(struct net_device *dev);
 475 static void rtl8169_set_rx_mode(struct net_device *dev);
 476 static void rtl8169_tx_timeout(struct net_device *dev);
 477 static struct net_device_stats *rtl8169_get_stats(struct net_device *dev);
 478 static int rtl8169_rx_interrupt(struct net_device *, struct rtl8169_private *,
 479                                 void __iomem *);
 480 static int rtl8169_change_mtu(struct net_device *dev, int new_mtu);
 481 static void rtl8169_down(struct net_device *dev);
 482
 483 #ifdef CONFIG_R8169_NAPI
 484 static int rtl8169_poll(struct net_device *dev, int *budget);
 485 #endif
 486
 487 static const u16 rtl8169_intr_mask =
 488         SYSErr | LinkChg | RxOverflow | RxFIFOOver | TxErr | TxOK | RxErr | RxOK;
 489 static const u16 rtl8169_napi_event =
 490         RxOK | RxOverflow | RxFIFOOver | TxOK | TxErr;
 491 static const unsigned int rtl8169_rx_config =
 492     (RX_FIFO_THRESH << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift);
 493
 494 #define PHY_Cap_10_Half_Or_Less PHY_Cap_10_Half
 495 #define PHY_Cap_10_Full_Or_Less PHY_Cap_10_Full | PHY_Cap_10_Half_Or_Less
 496 #define PHY_Cap_100_Half_Or_Less PHY_Cap_100_Half | PHY_Cap_10_Full_Or_Less
 497 #define PHY_Cap_100_Full_Or_Less PHY_Cap_100_Full | PHY_Cap_100_Half_Or_Less
 498
 499 static void mdio_write(void __iomem *ioaddr, int RegAddr, int value)
 500 {
 501         int i;
 502
 503         RTL_W32(PHYAR, 0x80000000 | (RegAddr & 0xFF) << 16 | value);
 504
 505         for (i = 20; i > 0; i--) {
 506                 /* Check if the RTL8169 has completed writing to the specified MII register */
 507                 if (!(RTL_R32(PHYAR) & 0x80000000))
 508                         break;
 509                 udelay(25);
 510         }
 511 }
 512
 513 static int mdio_read(void __iomem *ioaddr, int RegAddr)
 514 {
 515         int i, value = -1;
 516
 517         RTL_W32(PHYAR, 0x0 | (RegAddr & 0xFF) << 16);
 518
 519         for (i = 20; i > 0; i--) {
 520                 /* Check if the RTL8169 has completed retrieving data from the specified MII register */
 521                 if (RTL_R32(PHYAR) & 0x80000000) {
 522                         value = (int) (RTL_R32(PHYAR) & 0xFFFF);
 523                         break;
 524                 }
 525                 udelay(25);
 526         }
 527         return value;
 528 }
 529
 530 static void rtl8169_irq_mask_and_ack(void __iomem *ioaddr)
 531 {
 532         RTL_W16(IntrMask, 0x0000);
 533
 534         RTL_W16(IntrStatus, 0xffff);
 535 }
 536
 537 static void rtl8169_asic_down(void __iomem *ioaddr)
 538 {
 539         RTL_W8(ChipCmd, 0x00);
 540         rtl8169_irq_mask_and_ack(ioaddr);
 541         RTL_R16(CPlusCmd);
 542 }
 543
 544 static unsigned int rtl8169_tbi_reset_pending(void __iomem *ioaddr)
 545 {
 546         return RTL_R32(TBICSR) & TBIReset;
 547 }
 548
 549 static unsigned int rtl8169_xmii_reset_pending(void __iomem *ioaddr)
 550 {
 551         return mdio_read(ioaddr, 0) & 0x8000;
 552 }
 553
 554 static unsigned int rtl8169_tbi_link_ok(void __iomem *ioaddr)
 555 {
 556         return RTL_R32(TBICSR) & TBILinkOk;
 557 }
 558
 559 static unsigned int rtl8169_xmii_link_ok(void __iomem *ioaddr)
 560 {
 561         return RTL_R8(PHYstatus) & LinkStatus;
 562 }
 563
 564 static void rtl8169_tbi_reset_enable(void __iomem *ioaddr)
 565 {
 566         RTL_W32(TBICSR, RTL_R32(TBICSR) | TBIReset);
 567 }
 568
 569 static void rtl8169_xmii_reset_enable(void __iomem *ioaddr)
 570 {
 571         unsigned int val;
 572
 573         val = (mdio_read(ioaddr, PHY_CTRL_REG) | 0x8000) & 0xffff;
 574         mdio_write(ioaddr, PHY_CTRL_REG, val);
 575 }
 576
 577 static void rtl8169_check_link_status(struct net_device *dev,
 578                                       struct rtl8169_private *tp, void __iomem *ioaddr)
 579 {
 580         unsigned long flags;
 581
 582         spin_lock_irqsave(&tp->lock, flags);
 583         if (tp->link_ok(ioaddr)) {
 584                 netif_carrier_on(dev);
 585                 if (netif_msg_ifup(tp))
 586                         printk(KERN_INFO PFX "%s: link up\n", dev->name);
 587         } else {
 588                 if (netif_msg_ifdown(tp))
 589                         printk(KERN_INFO PFX "%s: link down\n", dev->name);
 590                 netif_carrier_off(dev);
 591         }
 592         spin_unlock_irqrestore(&tp->lock, flags);
 593 }
 594
 595 static void rtl8169_link_option(int idx, u8 *autoneg, u16 *speed, u8 *duplex)
 596 {
 597         struct {
 598                 u16 speed;
 599                 u8 duplex;
 600                 u8 autoneg;
 601                 u8 media;
 602         } link_settings[] = {
 603                 { SPEED_10,     DUPLEX_HALF, AUTONEG_DISABLE,   _10_Half },
 604                 { SPEED_10,     DUPLEX_FULL, AUTONEG_DISABLE,   _10_Full },
 605                 { SPEED_100,    DUPLEX_HALF, AUTONEG_DISABLE,   _100_Half },
 606                 { SPEED_100,    DUPLEX_FULL, AUTONEG_DISABLE,   _100_Full },
 607                 { SPEED_1000,   DUPLEX_FULL, AUTONEG_DISABLE,   _1000_Full },
 608                 /* Make TBI happy */
 609                 { SPEED_1000,   DUPLEX_FULL, AUTONEG_ENABLE,    0xff }
 610         }, *p;
 611         unsigned char option;
 612
 613         option = ((idx < MAX_UNITS) && (idx >= 0)) ? media[idx] : 0xff;
 614
 615         if ((option != 0xff) && !idx && netif_msg_drv(&debug))
 616                 printk(KERN_WARNING PFX "media option is deprecated.\n");
 617
 618         for (p = link_settings; p->media != 0xff; p++) {
 619                 if (p->media == option)
 620                         break;
 621         }
 622         *autoneg = p->autoneg;
 623         *speed = p->speed;
 624         *duplex = p->duplex;
 625 }
 626
 627 static void rtl8169_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
 628 {
 629         struct rtl8169_private *tp = netdev_priv(dev);
 630         void __iomem *ioaddr = tp->mmio_addr;
 631         u8 options;
 632
 633         wol->wolopts = 0;
 634
 635 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
 636         wol->supported = WAKE_ANY;
 637
 638         spin_lock_irq(&tp->lock);
 639
 640         options = RTL_R8(Config1);
 641         if (!(options & PMEnable))
 642                 goto out_unlock;
 643
 644         options = RTL_R8(Config3);
 645         if (options & LinkUp)
 646                 wol->wolopts |= WAKE_PHY;
 647         if (options & MagicPacket)
 648                 wol->wolopts |= WAKE_MAGIC;
 649
 650         options = RTL_R8(Config5);
 651         if (options & UWF)
 652                 wol->wolopts |= WAKE_UCAST;
 653         if (options & BWF)
 654                 wol->wolopts |= WAKE_BCAST;
 655         if (options & MWF)
 656                 wol->wolopts |= WAKE_MCAST;
 657
 658 out_unlock:
 659         spin_unlock_irq(&tp->lock);
 660 }
 661
 662 static int rtl8169_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
 663 {
 664         struct rtl8169_private *tp = netdev_priv(dev);
 665         void __iomem *ioaddr = tp->mmio_addr;
 666         int i;
 667         static struct {
 668                 u32 opt;
 669                 u16 reg;
 670                 u8  mask;
 671         } cfg[] = {
 672                 { WAKE_ANY,   Config1, PMEnable },
 673                 { WAKE_PHY,   Config3, LinkUp },
 674                 { WAKE_MAGIC, Config3, MagicPacket },
 675                 { WAKE_UCAST, Config5, UWF },
 676                 { WAKE_BCAST, Config5, BWF },
 677                 { WAKE_MCAST, Config5, MWF },
 678                 { WAKE_ANY,   Config5, LanWake }
 679         };
 680
 681         spin_lock_irq(&tp->lock);
 682
 683         RTL_W8(Cfg9346, Cfg9346_Unlock);
 684
 685         for (i = 0; i < ARRAY_SIZE(cfg); i++) {
 686                 u8 options = RTL_R8(cfg[i].reg) & ~cfg[i].mask;
 687                 if (wol->wolopts & cfg[i].opt)
 688                         options |= cfg[i].mask;
 689                 RTL_W8(cfg[i].reg, options);
 690         }
 691
 692         RTL_W8(Cfg9346, Cfg9346_Lock);
 693
 694         tp->wol_enabled = (wol->wolopts) ? 1 : 0;
 695
 696         spin_unlock_irq(&tp->lock);
 697
 698         return 0;
 699 }
 700
 701 static void rtl8169_get_drvinfo(struct net_device *dev,
 702                                 struct ethtool_drvinfo *info)
 703 {
 704         struct rtl8169_private *tp = netdev_priv(dev);
 705
 706         strcpy(info->driver, MODULENAME);
 707         strcpy(info->version, RTL8169_VERSION);
 708         strcpy(info->bus_info, pci_name(tp->pci_dev));
 709 }
 710
 711 static int rtl8169_get_regs_len(struct net_device *dev)
 712 {
 713         return R8169_REGS_SIZE;
 714 }
 715
 716 static int rtl8169_set_speed_tbi(struct net_device *dev,
 717                                  u8 autoneg, u16 speed, u8 duplex)
 718 {
 719         struct rtl8169_private *tp = netdev_priv(dev);
 720         void __iomem *ioaddr = tp->mmio_addr;
 721         int ret = 0;
 722         u32 reg;
 723
 724         reg = RTL_R32(TBICSR);
 725         if ((autoneg == AUTONEG_DISABLE) && (speed == SPEED_1000) &&
 726             (duplex == DUPLEX_FULL)) {
 727                 RTL_W32(TBICSR, reg & ~(TBINwEnable | TBINwRestart));
 728         } else if (autoneg == AUTONEG_ENABLE)
 729                 RTL_W32(TBICSR, reg | TBINwEnable | TBINwRestart);
 730         else {
 731                 if (netif_msg_link(tp)) {
 732                         printk(KERN_WARNING "%s: "
 733                                "incorrect speed setting refused in TBI mode\n",
 734                                dev->name);
 735                 }
 736                 ret = -EOPNOTSUPP;
 737         }
 738
 739         return ret;
 740 }
 741
 742 static int rtl8169_set_speed_xmii(struct net_device *dev,
 743                                   u8 autoneg, u16 speed, u8 duplex)
 744 {
 745         struct rtl8169_private *tp = netdev_priv(dev);
 746         void __iomem *ioaddr = tp->mmio_addr;
 747         int auto_nego, giga_ctrl;
 748
 749         auto_nego = mdio_read(ioaddr, PHY_AUTO_NEGO_REG);
 750         auto_nego &= ~(PHY_Cap_10_Half | PHY_Cap_10_Full |
 751                        PHY_Cap_100_Half | PHY_Cap_100_Full);
 752         giga_ctrl = mdio_read(ioaddr, PHY_1000_CTRL_REG);
 753         giga_ctrl &= ~(PHY_Cap_1000_Full | PHY_Cap_Null);
 754
 755         if (autoneg == AUTONEG_ENABLE) {
 756                 auto_nego |= (PHY_Cap_10_Half | PHY_Cap_10_Full |
 757                               PHY_Cap_100_Half | PHY_Cap_100_Full);
 758                 giga_ctrl |= PHY_Cap_1000_Full;
 759         } else {
 760                 if (speed == SPEED_10)
 761                         auto_nego |= PHY_Cap_10_Half | PHY_Cap_10_Full;
 762                 else if (speed == SPEED_100)
 763                         auto_nego |= PHY_Cap_100_Half | PHY_Cap_100_Full;
 764                 else if (speed == SPEED_1000)
 765                         giga_ctrl |= PHY_Cap_1000_Full;
 766
 767                 if (duplex == DUPLEX_HALF)
 768                         auto_nego &= ~(PHY_Cap_10_Full | PHY_Cap_100_Full);
 769
 770                 if (duplex == DUPLEX_FULL)
 771                         auto_nego &= ~(PHY_Cap_10_Half | PHY_Cap_100_Half);
 772         }
 773
 774         auto_nego |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
 775
 776         tp->phy_auto_nego_reg = auto_nego;
 777         tp->phy_1000_ctrl_reg = giga_ctrl;
 778
 779         mdio_write(ioaddr, PHY_AUTO_NEGO_REG, auto_nego);
 780         mdio_write(ioaddr, PHY_1000_CTRL_REG, giga_ctrl);
 781         mdio_write(ioaddr, PHY_CTRL_REG, PHY_Enable_Auto_Nego |
 782                                          PHY_Restart_Auto_Nego);
 783         return 0;
 784 }
 785
 786 static int rtl8169_set_speed(struct net_device *dev,
 787                              u8 autoneg, u16 speed, u8 duplex)
 788 {
 789         struct rtl8169_private *tp = netdev_priv(dev);
 790         int ret;
 791
 792         ret = tp->set_speed(dev, autoneg, speed, duplex);
 793
 794         if (netif_running(dev) && (tp->phy_1000_ctrl_reg & PHY_Cap_1000_Full))
 795                 mod_timer(&tp->timer, jiffies + RTL8169_PHY_TIMEOUT);
 796
 797         return ret;
 798 }
 799
 800 static int rtl8169_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
 801 {
 802         struct rtl8169_private *tp = netdev_priv(dev);
 803         unsigned long flags;
 804         int ret;
 805
 806         spin_lock_irqsave(&tp->lock, flags);
 807         ret = rtl8169_set_speed(dev, cmd->autoneg, cmd->speed, cmd->duplex);
 808         spin_unlock_irqrestore(&tp->lock, flags);
 809
 810         return ret;
 811 }
 812
 813 static u32 rtl8169_get_rx_csum(struct net_device *dev)
 814 {
 815         struct rtl8169_private *tp = netdev_priv(dev);
 816
 817         return tp->cp_cmd & RxChkSum;
 818 }
 819
 820 static int rtl8169_set_rx_csum(struct net_device *dev, u32 data)
 821 {
 822         struct rtl8169_private *tp = netdev_priv(dev);
 823         void __iomem *ioaddr = tp->mmio_addr;
 824         unsigned long flags;
 825
 826         spin_lock_irqsave(&tp->lock, flags);
 827
 828         if (data)
 829                 tp->cp_cmd |= RxChkSum;
 830         else
 831                 tp->cp_cmd &= ~RxChkSum;
 832
 833         RTL_W16(CPlusCmd, tp->cp_cmd);
 834         RTL_R16(CPlusCmd);
 835
 836         spin_unlock_irqrestore(&tp->lock, flags);
 837
 838         return 0;
 839 }
 840
 841 #ifdef CONFIG_R8169_VLAN
 842
 843 static inline u32 rtl8169_tx_vlan_tag(struct rtl8169_private *tp,
 844                                       struct sk_buff *skb)
 845 {
 846         return (tp->vlgrp && vlan_tx_tag_present(skb)) ?
 847                 TxVlanTag | swab16(vlan_tx_tag_get(skb)) : 0x00;
 848 }
 849
 850 static void rtl8169_vlan_rx_register(struct net_device *dev,
 851                                      struct vlan_group *grp)
 852 {
 853         struct rtl8169_private *tp = netdev_priv(dev);
 854         void __iomem *ioaddr = tp->mmio_addr;
 855         unsigned long flags;
 856
 857         spin_lock_irqsave(&tp->lock, flags);
 858         tp->vlgrp = grp;
 859         if (tp->vlgrp)
 860                 tp->cp_cmd |= RxVlan;
 861         else
 862                 tp->cp_cmd &= ~RxVlan;
 863         RTL_W16(CPlusCmd, tp->cp_cmd);
 864         RTL_R16(CPlusCmd);
 865         spin_unlock_irqrestore(&tp->lock, flags);
 866 }
 867
 868 static void rtl8169_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
 869 {
 870         struct rtl8169_private *tp = netdev_priv(dev);
 871         unsigned long flags;
 872
 873         spin_lock_irqsave(&tp->lock, flags);
 874         if (tp->vlgrp)
 875                 tp->vlgrp->vlan_devices[vid] = NULL;
 876         spin_unlock_irqrestore(&tp->lock, flags);
 877 }
 878
 879 static int rtl8169_rx_vlan_skb(struct rtl8169_private *tp, struct RxDesc *desc,
 880                                struct sk_buff *skb)
 881 {
 882         u32 opts2 = le32_to_cpu(desc->opts2);
 883         int ret;
 884
 885         if (tp->vlgrp && (opts2 & RxVlanTag)) {
 886                 rtl8169_rx_hwaccel_skb(skb, tp->vlgrp,
 887                                        swab16(opts2 & 0xffff));
 888                 ret = 0;
 889         } else
 890                 ret = -1;
 891         desc->opts2 = 0;
 892         return ret;
 893 }
 894
 895 #else /* !CONFIG_R8169_VLAN */
 896
 897 static inline u32 rtl8169_tx_vlan_tag(struct rtl8169_private *tp,
 898                                       struct sk_buff *skb)
 899 {
 900         return 0;
 901 }
 902
 903 static int rtl8169_rx_vlan_skb(struct rtl8169_private *tp, struct RxDesc *desc,
 904                                struct sk_buff *skb)
 905 {
 906         return -1;
 907 }
 908
 909 #endif
 910
 911 static void rtl8169_gset_tbi(struct net_device *dev, struct ethtool_cmd *cmd)
 912 {
 913         struct rtl8169_private *tp = netdev_priv(dev);
 914         void __iomem *ioaddr = tp->mmio_addr;
 915         u32 status;
 916
 917         cmd->supported =
 918                 SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg | SUPPORTED_FIBRE;
 919         cmd->port = PORT_FIBRE;
 920         cmd->transceiver = XCVR_INTERNAL;
 921
 922         status = RTL_R32(TBICSR);
 923         cmd->advertising = (status & TBINwEnable) ?  ADVERTISED_Autoneg : 0;
 924         cmd->autoneg = !!(status & TBINwEnable);
 925
 926         cmd->speed = SPEED_1000;
 927         cmd->duplex = DUPLEX_FULL; /* Always set */
 928 }
 929
 930 static void rtl8169_gset_xmii(struct net_device *dev, struct ethtool_cmd *cmd)
 931 {
 932         struct rtl8169_private *tp = netdev_priv(dev);
 933         void __iomem *ioaddr = tp->mmio_addr;
 934         u8 status;
 935
 936         cmd->supported = SUPPORTED_10baseT_Half |
 937                          SUPPORTED_10baseT_Full |
 938                          SUPPORTED_100baseT_Half |
 939                          SUPPORTED_100baseT_Full |
 940                          SUPPORTED_1000baseT_Full |
 941                          SUPPORTED_Autoneg |
 942                          SUPPORTED_TP;
 943
 944         cmd->autoneg = 1;
 945         cmd->advertising = ADVERTISED_TP | ADVERTISED_Autoneg;
 946
 947         if (tp->phy_auto_nego_reg & PHY_Cap_10_Half)
 948                 cmd->advertising |= ADVERTISED_10baseT_Half;
 949         if (tp->phy_auto_nego_reg & PHY_Cap_10_Full)
 950                 cmd->advertising |= ADVERTISED_10baseT_Full;
 951         if (tp->phy_auto_nego_reg & PHY_Cap_100_Half)
 952                 cmd->advertising |= ADVERTISED_100baseT_Half;
 953         if (tp->phy_auto_nego_reg & PHY_Cap_100_Full)
 954                 cmd->advertising |= ADVERTISED_100baseT_Full;
 955         if (tp->phy_1000_ctrl_reg & PHY_Cap_1000_Full)
 956                 cmd->advertising |= ADVERTISED_1000baseT_Full;
 957
 958         status = RTL_R8(PHYstatus);
 959
 960         if (status & _1000bpsF)
 961                 cmd->speed = SPEED_1000;
 962         else if (status & _100bps)
 963                 cmd->speed = SPEED_100;
 964         else if (status & _10bps)
 965                 cmd->speed = SPEED_10;
 966
 967         if (status & TxFlowCtrl)
 968                 cmd->advertising |= ADVERTISED_Asym_Pause;
 969         if (status & RxFlowCtrl)
 970                 cmd->advertising |= ADVERTISED_Pause;
 971
 972         cmd->duplex = ((status & _1000bpsF) || (status & FullDup)) ?
 973                       DUPLEX_FULL : DUPLEX_HALF;
 974 }
 975
 976 static int rtl8169_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
 977 {
 978         struct rtl8169_private *tp = netdev_priv(dev);
 979         unsigned long flags;
 980
 981         spin_lock_irqsave(&tp->lock, flags);
 982
 983         tp->get_settings(dev, cmd);
 984
 985         spin_unlock_irqrestore(&tp->lock, flags);
 986         return 0;
 987 }
 988
 989 static void rtl8169_get_regs(struct net_device *dev, struct ethtool_regs *regs,
 990                              void *p)
 991 {
 992         struct rtl8169_private *tp = netdev_priv(dev);
 993         unsigned long flags;
 994
 995         if (regs->len > R8169_REGS_SIZE)
 996                 regs->len = R8169_REGS_SIZE;
 997
 998         spin_lock_irqsave(&tp->lock, flags);
 999         memcpy_fromio(p, tp->mmio_addr, regs->len);
1000         spin_unlock_irqrestore(&tp->lock, flags);
1001 }
1002
1003 static u32 rtl8169_get_msglevel(struct net_device *dev)
1004 {
1005         struct rtl8169_private *tp = netdev_priv(dev);
1006
1007         return tp->msg_enable;
1008 }
1009
1010 static void rtl8169_set_msglevel(struct net_device *dev, u32 value)
1011 {
1012         struct rtl8169_private *tp = netdev_priv(dev);
1013
1014         tp->msg_enable = value;
1015 }
1016
1017 static const char rtl8169_gstrings[][ETH_GSTRING_LEN] = {
1018         "tx_packets",
1019         "rx_packets",
1020         "tx_errors",
1021         "rx_errors",
1022         "rx_missed",
1023         "align_errors",
1024         "tx_single_collisions",
1025         "tx_multi_collisions",
1026         "unicast",
1027         "broadcast",
1028         "multicast",
1029         "tx_aborted",
1030         "tx_underrun",
1031 };
1032
1033 struct rtl8169_counters {
1034         u64     tx_packets;
1035         u64     rx_packets;
1036         u64     tx_errors;
1037         u32     rx_errors;
1038         u16     rx_missed;
1039         u16     align_errors;
1040         u32     tx_one_collision;
1041         u32     tx_multi_collision;
1042         u64     rx_unicast;
1043         u64     rx_broadcast;
1044         u32     rx_multicast;
1045         u16     tx_aborted;
1046         u16     tx_underun;
1047 };
1048
1049 static int rtl8169_get_stats_count(struct net_device *dev)
1050 {
1051         return ARRAY_SIZE(rtl8169_gstrings);
1052 }
1053
1054 static void rtl8169_get_ethtool_stats(struct net_device *dev,
1055                                       struct ethtool_stats *stats, u64 *data)
1056 {
1057         struct rtl8169_private *tp = netdev_priv(dev);
1058         void __iomem *ioaddr = tp->mmio_addr;
1059         struct rtl8169_counters *counters;
1060         dma_addr_t paddr;
1061         u32 cmd;
1062
1063         ASSERT_RTNL();
1064
1065         counters = pci_alloc_consistent(tp->pci_dev, sizeof(*counters), &paddr);
1066         if (!counters)
1067                 return;
1068
1069         RTL_W32(CounterAddrHigh, (u64)paddr >> 32);
1070         cmd = (u64)paddr & DMA_32BIT_MASK;
1071         RTL_W32(CounterAddrLow, cmd);
1072         RTL_W32(CounterAddrLow, cmd | CounterDump);
1073
1074         while (RTL_R32(CounterAddrLow) & CounterDump) {
1075                 if (msleep_interruptible(1))
1076                         break;
1077         }
1078
1079         RTL_W32(CounterAddrLow, 0);
1080         RTL_W32(CounterAddrHigh, 0);
1081
1082         data[0] = le64_to_cpu(counters->tx_packets);
1083         data[1] = le64_to_cpu(counters->rx_packets);
1084         data[2] = le64_to_cpu(counters->tx_errors);
1085         data[3] = le32_to_cpu(counters->rx_errors);
1086         data[4] = le16_to_cpu(counters->rx_missed);
1087         data[5] = le16_to_cpu(counters->align_errors);
1088         data[6] = le32_to_cpu(counters->tx_one_collision);
1089         data[7] = le32_to_cpu(counters->tx_multi_collision);
1090         data[8] = le64_to_cpu(counters->rx_unicast);
1091         data[9] = le64_to_cpu(counters->rx_broadcast);
1092         data[10] = le32_to_cpu(counters->rx_multicast);
1093         data[11] = le16_to_cpu(counters->tx_aborted);
1094         data[12] = le16_to_cpu(counters->tx_underun);
1095
1096         pci_free_consistent(tp->pci_dev, sizeof(*counters), counters, paddr);
1097 }
1098
1099 static void rtl8169_get_strings(struct net_device *dev, u32 stringset, u8 *data)
1100 {
1101         switch(stringset) {
1102         case ETH_SS_STATS:
1103                 memcpy(data, *rtl8169_gstrings, sizeof(rtl8169_gstrings));
1104                 break;
1105         }
1106 }
1107
1108
1109 static struct ethtool_ops rtl8169_ethtool_ops = {
1110         .get_drvinfo            = rtl8169_get_drvinfo,
1111         .get_regs_len           = rtl8169_get_regs_len,
1112         .get_link               = ethtool_op_get_link,
1113         .get_settings           = rtl8169_get_settings,
1114         .set_settings           = rtl8169_set_settings,
1115         .get_msglevel           = rtl8169_get_msglevel,
1116         .set_msglevel           = rtl8169_set_msglevel,
1117         .get_rx_csum            = rtl8169_get_rx_csum,
1118         .set_rx_csum            = rtl8169_set_rx_csum,
1119         .get_tx_csum            = ethtool_op_get_tx_csum,
1120         .set_tx_csum            = ethtool_op_set_tx_csum,
1121         .get_sg                 = ethtool_op_get_sg,
1122         .set_sg                 = ethtool_op_set_sg,
1123         .get_tso                = ethtool_op_get_tso,
1124         .set_tso                = ethtool_op_set_tso,
1125         .get_regs               = rtl8169_get_regs,
1126         .get_wol                = rtl8169_get_wol,
1127         .set_wol                = rtl8169_set_wol,
1128         .get_strings            = rtl8169_get_strings,
1129         .get_stats_count        = rtl8169_get_stats_count,
1130         .get_ethtool_stats      = rtl8169_get_ethtool_stats,
1131         .get_perm_addr          = ethtool_op_get_perm_addr,
1132 };
1133
1134 static void rtl8169_write_gmii_reg_bit(void __iomem *ioaddr, int reg, int bitnum,
1135                                        int bitval)
1136 {
1137         int val;
1138
1139         val = mdio_read(ioaddr, reg);
1140         val = (bitval == 1) ?
1141                 val | (bitval << bitnum) :  val & ~(0x0001 << bitnum);
1142         mdio_write(ioaddr, reg, val & 0xffff);
1143 }
1144
1145 static void rtl8169_get_mac_version(struct rtl8169_private *tp, void __iomem *ioaddr)
1146 {
1147         const struct {
1148                 u32 mask;
1149                 int mac_version;
1150         } mac_info[] = {
1151                 { 0x1 << 28,    RTL_GIGA_MAC_VER_X },
1152                 { 0x1 << 26,    RTL_GIGA_MAC_VER_E },
1153                 { 0x1 << 23,    RTL_GIGA_MAC_VER_D },
1154                 { 0x00000000,   RTL_GIGA_MAC_VER_B } /* Catch-all */
1155         }, *p = mac_info;
1156         u32 reg;
1157
1158         reg = RTL_R32(TxConfig) & 0x7c800000;
1159         while ((reg & p->mask) != p->mask)
1160                 p++;
1161         tp->mac_version = p->mac_version;
1162 }
1163
1164 static void rtl8169_print_mac_version(struct rtl8169_private *tp)
1165 {
1166         struct {
1167                 int version;
1168                 char *msg;
1169         } mac_print[] = {
1170                 { RTL_GIGA_MAC_VER_E, "RTL_GIGA_MAC_VER_E" },
1171                 { RTL_GIGA_MAC_VER_D, "RTL_GIGA_MAC_VER_D" },
1172                 { RTL_GIGA_MAC_VER_B, "RTL_GIGA_MAC_VER_B" },
1173                 { 0, NULL }
1174         }, *p;
1175
1176         for (p = mac_print; p->msg; p++) {
1177                 if (tp->mac_version == p->version) {
1178                         dprintk("mac_version == %s (%04d)\n", p->msg,
1179                                   p->version);
1180                         return;
1181                 }
1182         }
1183         dprintk("mac_version == Unknown\n");
1184 }
1185
1186 static void rtl8169_get_phy_version(struct rtl8169_private *tp, void __iomem *ioaddr)
1187 {
1188         const struct {
1189                 u16 mask;
1190                 u16 set;
1191                 int phy_version;
1192         } phy_info[] = {
1193                 { 0x000f, 0x0002, RTL_GIGA_PHY_VER_G },
1194                 { 0x000f, 0x0001, RTL_GIGA_PHY_VER_F },
1195                 { 0x000f, 0x0000, RTL_GIGA_PHY_VER_E },
1196                 { 0x0000, 0x0000, RTL_GIGA_PHY_VER_D } /* Catch-all */
1197         }, *p = phy_info;
1198         u16 reg;
1199
1200         reg = mdio_read(ioaddr, 3) & 0xffff;
1201         while ((reg & p->mask) != p->set)
1202                 p++;
1203         tp->phy_version = p->phy_version;
1204 }
1205
1206 static void rtl8169_print_phy_version(struct rtl8169_private *tp)
1207 {
1208         struct {
1209                 int version;
1210                 char *msg;
1211                 u32 reg;
1212         } phy_print[] = {
1213                 { RTL_GIGA_PHY_VER_G, "RTL_GIGA_PHY_VER_G", 0x0002 },
1214                 { RTL_GIGA_PHY_VER_F, "RTL_GIGA_PHY_VER_F", 0x0001 },
1215                 { RTL_GIGA_PHY_VER_E, "RTL_GIGA_PHY_VER_E", 0x0000 },
1216                 { RTL_GIGA_PHY_VER_D, "RTL_GIGA_PHY_VER_D", 0x0000 },
1217                 { 0, NULL, 0x0000 }
1218         }, *p;
1219
1220         for (p = phy_print; p->msg; p++) {
1221                 if (tp->phy_version == p->version) {
1222                         dprintk("phy_version == %s (%04x)\n", p->msg, p->reg);
1223                         return;
1224                 }
1225         }
1226         dprintk("phy_version == Unknown\n");
1227 }
1228
1229 static void rtl8169_hw_phy_config(struct net_device *dev)
1230 {
1231         struct rtl8169_private *tp = netdev_priv(dev);
1232         void __iomem *ioaddr = tp->mmio_addr;
1233         struct {
1234                 u16 regs[5]; /* Beware of bit-sign propagation */
1235         } phy_magic[5] = { {
1236                 { 0x0000,       //w 4 15 12 0
1237                   0x00a1,       //w 3 15 0 00a1
1238                   0x0008,       //w 2 15 0 0008
1239                   0x1020,       //w 1 15 0 1020
1240                   0x1000 } },{  //w 0 15 0 1000
1241                 { 0x7000,       //w 4 15 12 7
1242                   0xff41,       //w 3 15 0 ff41
1243                   0xde60,       //w 2 15 0 de60
1244                   0x0140,       //w 1 15 0 0140
1245                   0x0077 } },{  //w 0 15 0 0077
1246                 { 0xa000,       //w 4 15 12 a
1247                   0xdf01,       //w 3 15 0 df01
1248                   0xdf20,       //w 2 15 0 df20
1249                   0xff95,       //w 1 15 0 ff95
1250                   0xfa00 } },{  //w 0 15 0 fa00
1251                 { 0xb000,       //w 4 15 12 b
1252                   0xff41,       //w 3 15 0 ff41
1253                   0xde20,       //w 2 15 0 de20
1254                   0x0140,       //w 1 15 0 0140
1255                   0x00bb } },{  //w 0 15 0 00bb
1256                 { 0xf000,       //w 4 15 12 f
1257                   0xdf01,       //w 3 15 0 df01
1258                   0xdf20,       //w 2 15 0 df20
1259                   0xff95,       //w 1 15 0 ff95
1260                   0xbf00 }      //w 0 15 0 bf00
1261                 }
1262         }, *p = phy_magic;
1263         int i;
1264
1265         rtl8169_print_mac_version(tp);
1266         rtl8169_print_phy_version(tp);
1267
1268         if (tp->mac_version <= RTL_GIGA_MAC_VER_B)
1269                 return;
1270         if (tp->phy_version >= RTL_GIGA_PHY_VER_H)
1271                 return;
1272
1273         dprintk("MAC version != 0 && PHY version == 0 or 1\n");
1274         dprintk("Do final_reg2.cfg\n");
1275
1276         /* Shazam ! */
1277
1278         if (tp->mac_version == RTL_GIGA_MAC_VER_X) {
1279                 mdio_write(ioaddr, 31, 0x0001);
1280                 mdio_write(ioaddr,  9, 0x273a);
1281                 mdio_write(ioaddr, 14, 0x7bfb);
1282                 mdio_write(ioaddr, 27, 0x841e);
1283
1284                 mdio_write(ioaddr, 31, 0x0002);
1285                 mdio_write(ioaddr,  1, 0x90d0);
1286                 mdio_write(ioaddr, 31, 0x0000);
1287                 return;
1288         }
1289
1290         /* phy config for RTL8169s mac_version C chip */
1291         mdio_write(ioaddr, 31, 0x0001);                 //w 31 2 0 1
1292         mdio_write(ioaddr, 21, 0x1000);                 //w 21 15 0 1000
1293         mdio_write(ioaddr, 24, 0x65c7);                 //w 24 15 0 65c7
1294         rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 0);   //w 4 11 11 0
1295
1296         for (i = 0; i < ARRAY_SIZE(phy_magic); i++, p++) {
1297                 int val, pos = 4;
1298
1299                 val = (mdio_read(ioaddr, pos) & 0x0fff) | (p->regs[0] & 0xffff);
1300                 mdio_write(ioaddr, pos, val);
1301                 while (--pos >= 0)
1302                         mdio_write(ioaddr, pos, p->regs[4 - pos] & 0xffff);
1303                 rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 1); //w 4 11 11 1
1304                 rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 0); //w 4 11 11 0
1305         }
1306         mdio_write(ioaddr, 31, 0x0000); //w 31 2 0 0
1307 }
1308
1309 static void rtl8169_phy_timer(unsigned long __opaque)
1310 {
1311         struct net_device *dev = (struct net_device *)__opaque;
1312         struct rtl8169_private *tp = netdev_priv(dev);
1313         struct timer_list *timer = &tp->timer;
1314         void __iomem *ioaddr = tp->mmio_addr;
1315         unsigned long timeout = RTL8169_PHY_TIMEOUT;
1316
1317         assert(tp->mac_version > RTL_GIGA_MAC_VER_B);
1318         assert(tp->phy_version < RTL_GIGA_PHY_VER_H);
1319
1320         if (!(tp->phy_1000_ctrl_reg & PHY_Cap_1000_Full))
1321                 return;
1322
1323         spin_lock_irq(&tp->lock);
1324
1325         if (tp->phy_reset_pending(ioaddr)) {
1326                 /*
1327                  * A busy loop could burn quite a few cycles on nowadays CPU.
1328                  * Let's delay the execution of the timer for a few ticks.
1329                  */
1330                 timeout = HZ/10;
1331                 goto out_mod_timer;
1332         }
1333
1334         if (tp->link_ok(ioaddr))
1335                 goto out_unlock;
1336
1337         if (netif_msg_link(tp))
1338                 printk(KERN_WARNING "%s: PHY reset until link up\n", dev->name);
1339
1340         tp->phy_reset_enable(ioaddr);
1341
1342 out_mod_timer:
1343         mod_timer(timer, jiffies + timeout);
1344 out_unlock:
1345         spin_unlock_irq(&tp->lock);
1346 }
1347
1348 static inline void rtl8169_delete_timer(struct net_device *dev)
1349 {
1350         struct rtl8169_private *tp = netdev_priv(dev);
1351         struct timer_list *timer = &tp->timer;
1352
1353         if ((tp->mac_version <= RTL_GIGA_MAC_VER_B) ||
1354             (tp->phy_version >= RTL_GIGA_PHY_VER_H))
1355                 return;
1356
1357         del_timer_sync(timer);
1358 }
1359
1360 static inline void rtl8169_request_timer(struct net_device *dev)
1361 {
1362         struct rtl8169_private *tp = netdev_priv(dev);
1363         struct timer_list *timer = &tp->timer;
1364
1365         if ((tp->mac_version <= RTL_GIGA_MAC_VER_B) ||
1366             (tp->phy_version >= RTL_GIGA_PHY_VER_H))
1367                 return;
1368
1369         init_timer(timer);
1370         timer->expires = jiffies + RTL8169_PHY_TIMEOUT;
1371         timer->data = (unsigned long)(dev);
1372         timer->function = rtl8169_phy_timer;
1373         add_timer(timer);
1374 }
1375
1376 #ifdef CONFIG_NET_POLL_CONTROLLER
1377 /*
1378  * Polling 'interrupt' - used by things like netconsole to send skbs
1379  * without having to re-enable interrupts. It's not called while
1380  * the interrupt routine is executing.
1381  */
1382 static void rtl8169_netpoll(struct net_device *dev)
1383 {
1384         struct rtl8169_private *tp = netdev_priv(dev);
1385         struct pci_dev *pdev = tp->pci_dev;
1386
1387         disable_irq(pdev->irq);
1388         rtl8169_interrupt(pdev->irq, dev, NULL);
1389         enable_irq(pdev->irq);
1390 }
1391 #endif
1392
1393 static void __rtl8169_set_mac_addr(struct net_device *dev, void __iomem *ioaddr)
1394 {
1395         unsigned int i, j;
1396
1397         RTL_W8(Cfg9346, Cfg9346_Unlock);
1398         for (i = 0; i < 2; i++) {
1399                 __le32 l = 0;
1400
1401                 for (j = 0; j < 4; j++) {
1402                         l <<= 8;
1403                         l |= dev->dev_addr[4*i + j];
1404                 }
1405                 RTL_W32(MAC0 + 4*i, cpu_to_be32(l));
1406         }
1407         RTL_W8(Cfg9346, Cfg9346_Lock);
1408 }
1409
1410 static int rtl8169_set_mac_addr(struct net_device *dev, void *p)
1411 {
1412         struct rtl8169_private *tp = netdev_priv(dev);
1413         struct sockaddr *addr = p;
1414
1415         if (!is_valid_ether_addr(addr->sa_data))
1416                 return -EINVAL;
1417
1418         memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1419
1420         if (netif_running(dev)) {
1421                 spin_lock_irq(&tp->lock);
1422                 __rtl8169_set_mac_addr(dev, tp->mmio_addr);
1423                 spin_unlock_irq(&tp->lock);
1424         }
1425         return 0;
1426 }
1427
1428 static void rtl8169_release_board(struct pci_dev *pdev, struct net_device *dev,
1429                                   void __iomem *ioaddr)
1430 {
1431         iounmap(ioaddr);
1432         pci_release_regions(pdev);
1433         pci_disable_device(pdev);
1434         free_netdev(dev);
1435 }
1436
1437 static int __devinit
1438 rtl8169_init_board(struct pci_dev *pdev, struct net_device **dev_out,
1439                    void __iomem **ioaddr_out)
1440 {
1441         void __iomem *ioaddr;
1442         struct net_device *dev;
1443         struct rtl8169_private *tp;
1444         int rc = -ENOMEM, i, acpi_idle_state = 0, pm_cap;
1445
1446         assert(ioaddr_out != NULL);
1447
1448         /* dev zeroed in alloc_etherdev */
1449         dev = alloc_etherdev(sizeof (*tp));
1450         if (dev == NULL) {
1451                 if (netif_msg_drv(&debug))
1452                         dev_err(&pdev->dev, "unable to alloc new ethernet\n");
1453                 goto err_out;
1454         }
1455
1456         SET_MODULE_OWNER(dev);
1457         SET_NETDEV_DEV(dev, &pdev->dev);
1458         tp = netdev_priv(dev);
1459         tp->msg_enable = netif_msg_init(debug.msg_enable, R8169_MSG_DEFAULT);
1460
1461         /* enable device (incl. PCI PM wakeup and hotplug setup) */
1462         rc = pci_enable_device(pdev);
1463         if (rc < 0) {
1464                 if (netif_msg_probe(tp))
1465                         dev_err(&pdev->dev, "enable failure\n");
1466                 goto err_out_free_dev;
1467         }
1468
1469         rc = pci_set_mwi(pdev);
1470         if (rc < 0)
1471                 goto err_out_disable;
1472
1473         /* save power state before pci_enable_device overwrites it */
1474         pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM);
1475         if (pm_cap) {
1476                 u16 pwr_command;
1477
1478                 pci_read_config_word(pdev, pm_cap + PCI_PM_CTRL, &pwr_command);
1479                 acpi_idle_state = pwr_command & PCI_PM_CTRL_STATE_MASK;
1480         } else {
1481                 if (netif_msg_probe(tp))
1482                         dev_err(&pdev->dev,
1483                                "PowerManagement capability not found.\n");
1484         }
1485
1486         /* make sure PCI base addr 1 is MMIO */
1487         if (!(pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
1488                 if (netif_msg_probe(tp))
1489                         dev_err(&pdev->dev,
1490                                "region #1 not an MMIO resource, aborting\n");
1491                 rc = -ENODEV;
1492                 goto err_out_mwi;
1493         }
1494         /* check for weird/broken PCI region reporting */
1495         if (pci_resource_len(pdev, 1) < R8169_REGS_SIZE) {
1496                 if (netif_msg_probe(tp))
1497                         dev_err(&pdev->dev,
1498                                "Invalid PCI region size(s), aborting\n");
1499                 rc = -ENODEV;
1500                 goto err_out_mwi;
1501         }
1502
1503         rc = pci_request_regions(pdev, MODULENAME);
1504         if (rc < 0) {
1505                 if (netif_msg_probe(tp))
1506                         dev_err(&pdev->dev, "could not request regions.\n");
1507                 goto err_out_mwi;
1508         }
1509
1510         tp->cp_cmd = PCIMulRW | RxChkSum;
1511
1512         if ((sizeof(dma_addr_t) > 4) &&
1513             !pci_set_dma_mask(pdev, DMA_64BIT_MASK) && use_dac) {
1514                 tp->cp_cmd |= PCIDAC;
1515                 dev->features |= NETIF_F_HIGHDMA;
1516         } else {
1517                 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1518                 if (rc < 0) {
1519                         if (netif_msg_probe(tp))
1520                                 dev_err(&pdev->dev,
1521                                        "DMA configuration failed.\n");
1522                         goto err_out_free_res;
1523                 }
1524         }
1525
1526         pci_set_master(pdev);
1527
1528         /* ioremap MMIO region */
1529         ioaddr = ioremap(pci_resource_start(pdev, 1), R8169_REGS_SIZE);
1530         if (ioaddr == NULL) {
1531                 if (netif_msg_probe(tp))
1532                         dev_err(&pdev->dev, "cannot remap MMIO, aborting\n");
1533                 rc = -EIO;
1534                 goto err_out_free_res;
1535         }
1536
1537         /* Unneeded ? Don't mess with Mrs. Murphy. */
1538         rtl8169_irq_mask_and_ack(ioaddr);
1539
1540         /* Soft reset the chip. */
1541         RTL_W8(ChipCmd, CmdReset);
1542
1543         /* Check that the chip has finished the reset. */
1544         for (i = 1000; i > 0; i--) {
1545                 if ((RTL_R8(ChipCmd) & CmdReset) == 0)
1546                         break;
1547                 udelay(10);
1548         }
1549
1550         /* Identify chip attached to board */
1551         rtl8169_get_mac_version(tp, ioaddr);
1552         rtl8169_get_phy_version(tp, ioaddr);
1553
1554         rtl8169_print_mac_version(tp);
1555         rtl8169_print_phy_version(tp);
1556
1557         for (i = ARRAY_SIZE(rtl_chip_info) - 1; i >= 0; i--) {
1558                 if (tp->mac_version == rtl_chip_info[i].mac_version)
1559                         break;
1560         }
1561         if (i < 0) {
1562                 /* Unknown chip: assume array element #0, original RTL-8169 */
1563                 if (netif_msg_probe(tp)) {
1564                         dev_printk(KERN_DEBUG, &pdev->dev,
1565                                "unknown chip version, assuming %s\n",
1566                                rtl_chip_info[0].name);
1567                 }
1568                 i++;
1569         }
1570         tp->chipset = i;
1571
1572         RTL_W8(Cfg9346, Cfg9346_Unlock);
1573         RTL_W8(Config1, RTL_R8(Config1) | PMEnable);
1574         RTL_W8(Config5, RTL_R8(Config5) & PMEStatus);
1575         RTL_W8(Cfg9346, Cfg9346_Lock);
1576
1577         *ioaddr_out = ioaddr;
1578         *dev_out = dev;
1579 out:
1580         return rc;
1581
1582 err_out_free_res:
1583         pci_release_regions(pdev);
1584
1585 err_out_mwi:
1586         pci_clear_mwi(pdev);
1587
1588 err_out_disable:
1589         pci_disable_device(pdev);
1590
1591 err_out_free_dev:
1592         free_netdev(dev);
1593 err_out:
1594         *ioaddr_out = NULL;
1595         *dev_out = NULL;
1596         goto out;
1597 }
1598
1599 static int __devinit
1600 rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1601 {
1602         struct net_device *dev = NULL;
1603         struct rtl8169_private *tp;
1604         void __iomem *ioaddr = NULL;
1605         static int board_idx = -1;
1606         u8 autoneg, duplex;
1607         u16 speed;
1608         int i, rc;
1609
1610         assert(pdev != NULL);
1611         assert(ent != NULL);
1612
1613         board_idx++;
1614
1615         if (netif_msg_drv(&debug)) {
1616                 printk(KERN_INFO "%s Gigabit Ethernet driver %s loaded\n",
1617                        MODULENAME, RTL8169_VERSION);
1618         }
1619
1620         rc = rtl8169_init_board(pdev, &dev, &ioaddr);
1621         if (rc)
1622                 return rc;
1623
1624         tp = netdev_priv(dev);
1625         assert(ioaddr != NULL);
1626
1627         if (RTL_R8(PHYstatus) & TBI_Enable) {
1628                 tp->set_speed = rtl8169_set_speed_tbi;
1629                 tp->get_settings = rtl8169_gset_tbi;
1630                 tp->phy_reset_enable = rtl8169_tbi_reset_enable;
1631                 tp->phy_reset_pending = rtl8169_tbi_reset_pending;
1632                 tp->link_ok = rtl8169_tbi_link_ok;
1633
1634                 tp->phy_1000_ctrl_reg = PHY_Cap_1000_Full; /* Implied by TBI */
1635         } else {
1636                 tp->set_speed = rtl8169_set_speed_xmii;
1637                 tp->get_settings = rtl8169_gset_xmii;
1638                 tp->phy_reset_enable = rtl8169_xmii_reset_enable;
1639                 tp->phy_reset_pending = rtl8169_xmii_reset_pending;
1640                 tp->link_ok = rtl8169_xmii_link_ok;
1641         }
1642
1643         /* Get MAC address.  FIXME: read EEPROM */
1644         for (i = 0; i < MAC_ADDR_LEN; i++)
1645                 dev->dev_addr[i] = RTL_R8(MAC0 + i);
1646         memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
1647
1648         dev->open = rtl8169_open;
1649         dev->hard_start_xmit = rtl8169_start_xmit;
1650         dev->get_stats = rtl8169_get_stats;
1651         SET_ETHTOOL_OPS(dev, &rtl8169_ethtool_ops);
1652         dev->stop = rtl8169_close;
1653         dev->tx_timeout = rtl8169_tx_timeout;
1654         dev->set_multicast_list = rtl8169_set_rx_mode;
1655         dev->set_mac_address = rtl8169_set_mac_addr;
1656         dev->watchdog_timeo = RTL8169_TX_TIMEOUT;
1657         dev->irq = pdev->irq;
1658         dev->base_addr = (unsigned long) ioaddr;
1659         dev->change_mtu = rtl8169_change_mtu;
1660
1661 #ifdef CONFIG_R8169_NAPI
1662         dev->poll = rtl8169_poll;
1663         dev->weight = R8169_NAPI_WEIGHT;
1664 #endif
1665
1666 #ifdef CONFIG_R8169_VLAN
1667         dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
1668         dev->vlan_rx_register = rtl8169_vlan_rx_register;
1669         dev->vlan_rx_kill_vid = rtl8169_vlan_rx_kill_vid;
1670 #endif
1671
1672 #ifdef CONFIG_NET_POLL_CONTROLLER
1673         dev->poll_controller = rtl8169_netpoll;
1674 #endif
1675
1676         tp->intr_mask = 0xffff;
1677         tp->pci_dev = pdev;
1678         tp->mmio_addr = ioaddr;
1679
1680         spin_lock_init(&tp->lock);
1681
1682         rc = register_netdev(dev);
1683         if (rc) {
1684                 rtl8169_release_board(pdev, dev, ioaddr);
1685                 return rc;
1686         }
1687
1688         if (netif_msg_probe(tp)) {
1689                 printk(KERN_DEBUG "%s: Identified chip type is '%s'.\n",
1690                        dev->name, rtl_chip_info[tp->chipset].name);
1691         }
1692
1693         pci_set_drvdata(pdev, dev);
1694
1695         if (netif_msg_probe(tp)) {
1696                 printk(KERN_INFO "%s: %s at 0x%lx, "
1697                        "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
1698                        "IRQ %d\n",
1699                        dev->name,
1700                        rtl_chip_info[ent->driver_data].name,
1701                        dev->base_addr,
1702                        dev->dev_addr[0], dev->dev_addr[1],
1703                        dev->dev_addr[2], dev->dev_addr[3],
1704                        dev->dev_addr[4], dev->dev_addr[5], dev->irq);
1705         }
1706
1707         rtl8169_hw_phy_config(dev);
1708
1709         dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
1710         RTL_W8(0x82, 0x01);
1711
1712         if (tp->mac_version < RTL_GIGA_MAC_VER_E) {
1713                 dprintk("Set PCI Latency=0x40\n");
1714                 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x40);
1715         }
1716
1717         if (tp->mac_version == RTL_GIGA_MAC_VER_D) {
1718                 dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
1719                 RTL_W8(0x82, 0x01);
1720                 dprintk("Set PHY Reg 0x0bh = 0x00h\n");
1721                 mdio_write(ioaddr, 0x0b, 0x0000); //w 0x0b 15 0 0
1722         }
1723
1724         rtl8169_link_option(board_idx, &autoneg, &speed, &duplex);
1725
1726         rtl8169_set_speed(dev, autoneg, speed, duplex);
1727
1728         if ((RTL_R8(PHYstatus) & TBI_Enable) && netif_msg_link(tp))
1729                 printk(KERN_INFO PFX "%s: TBI auto-negotiating\n", dev->name);
1730
1731         return 0;
1732 }
1733
1734 static void __devexit
1735 rtl8169_remove_one(struct pci_dev *pdev)
1736 {
1737         struct net_device *dev = pci_get_drvdata(pdev);
1738         struct rtl8169_private *tp = netdev_priv(dev);
1739
1740         assert(dev != NULL);
1741         assert(tp != NULL);
1742
1743         unregister_netdev(dev);
1744         rtl8169_release_board(pdev, dev, tp->mmio_addr);
1745         pci_set_drvdata(pdev, NULL);
1746 }
1747
1748 static void rtl8169_set_rxbufsize(struct rtl8169_private *tp,
1749                                   struct net_device *dev)
1750 {
1751         unsigned int mtu = dev->mtu;
1752
1753         tp->rx_buf_sz = (mtu > RX_BUF_SIZE) ? mtu + ETH_HLEN + 8 : RX_BUF_SIZE;
1754 }
1755
1756 static int rtl8169_open(struct net_device *dev)
1757 {
1758         struct rtl8169_private *tp = netdev_priv(dev);
1759         struct pci_dev *pdev = tp->pci_dev;
1760         int retval;
1761
1762         rtl8169_set_rxbufsize(tp, dev);
1763
1764         retval =
1765             request_irq(dev->irq, rtl8169_interrupt, IRQF_SHARED, dev->name, dev);
1766         if (retval < 0)
1767                 goto out;
1768
1769         retval = -ENOMEM;
1770
1771         /*
1772          * Rx and Tx desscriptors needs 256 bytes alignment.
1773          * pci_alloc_consistent provides more.
1774          */
1775         tp->TxDescArray = pci_alloc_consistent(pdev, R8169_TX_RING_BYTES,
1776                                                &tp->TxPhyAddr);
1777         if (!tp->TxDescArray)
1778                 goto err_free_irq;
1779
1780         tp->RxDescArray = pci_alloc_consistent(pdev, R8169_RX_RING_BYTES,
1781                                                &tp->RxPhyAddr);
1782         if (!tp->RxDescArray)
1783                 goto err_free_tx;
1784
1785         retval = rtl8169_init_ring(dev);
1786         if (retval < 0)
1787                 goto err_free_rx;
1788
1789         INIT_WORK(&tp->task, NULL, dev);
1790
1791         rtl8169_hw_start(dev);
1792
1793         rtl8169_request_timer(dev);
1794
1795         rtl8169_check_link_status(dev, tp, tp->mmio_addr);
1796 out:
1797         return retval;
1798
1799 err_free_rx:
1800         pci_free_consistent(pdev, R8169_RX_RING_BYTES, tp->RxDescArray,
1801                             tp->RxPhyAddr);
1802 err_free_tx:
1803         pci_free_consistent(pdev, R8169_TX_RING_BYTES, tp->TxDescArray,
1804                             tp->TxPhyAddr);
1805 err_free_irq:
1806         free_irq(dev->irq, dev);
1807         goto out;
1808 }
1809
1810 static void rtl8169_hw_reset(void __iomem *ioaddr)
1811 {
1812         /* Disable interrupts */
1813         rtl8169_irq_mask_and_ack(ioaddr);
1814
1815         /* Reset the chipset */
1816         RTL_W8(ChipCmd, CmdReset);
1817
1818         /* PCI commit */
1819         RTL_R8(ChipCmd);
1820 }
1821
1822 static void
1823 rtl8169_hw_start(struct net_device *dev)
1824 {
1825         struct rtl8169_private *tp = netdev_priv(dev);
1826         void __iomem *ioaddr = tp->mmio_addr;
1827         u32 i;
1828
1829         /* Soft reset the chip. */
1830         RTL_W8(ChipCmd, CmdReset);
1831
1832         /* Check that the chip has finished the reset. */
1833         for (i = 1000; i > 0; i--) {
1834                 if ((RTL_R8(ChipCmd) & CmdReset) == 0)
1835                         break;
1836                 udelay(10);
1837         }
1838
1839         RTL_W8(Cfg9346, Cfg9346_Unlock);
1840         RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
1841         RTL_W8(EarlyTxThres, EarlyTxThld);
1842
1843         /* Low hurts. Let's disable the filtering. */
1844         RTL_W16(RxMaxSize, 16383);
1845
1846         /* Set Rx Config register */
1847         i = rtl8169_rx_config |
1848                 (RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask);
1849         RTL_W32(RxConfig, i);
1850
1851         /* Set DMA burst size and Interframe Gap Time */
1852         RTL_W32(TxConfig,
1853                 (TX_DMA_BURST << TxDMAShift) | (InterFrameGap <<
1854                                                 TxInterFrameGapShift));
1855         tp->cp_cmd |= RTL_R16(CPlusCmd);
1856         RTL_W16(CPlusCmd, tp->cp_cmd);
1857
1858         if ((tp->mac_version == RTL_GIGA_MAC_VER_D) ||
1859             (tp->mac_version == RTL_GIGA_MAC_VER_E)) {
1860                 dprintk(KERN_INFO PFX "Set MAC Reg C+CR Offset 0xE0. "
1861                         "Bit-3 and bit-14 MUST be 1\n");
1862                 tp->cp_cmd |= (1 << 14) | PCIMulRW;
1863                 RTL_W16(CPlusCmd, tp->cp_cmd);
1864         }
1865
1866         /*
1867          * Undocumented corner. Supposedly:
1868          * (TxTimer << 12) | (TxPackets << 8) | (RxTimer << 4) | RxPackets
1869          */
1870         RTL_W16(IntrMitigate, 0x0000);
1871
1872         RTL_W32(TxDescStartAddrLow, ((u64) tp->TxPhyAddr & DMA_32BIT_MASK));
1873         RTL_W32(TxDescStartAddrHigh, ((u64) tp->TxPhyAddr >> 32));
1874         RTL_W32(RxDescAddrLow, ((u64) tp->RxPhyAddr & DMA_32BIT_MASK));
1875         RTL_W32(RxDescAddrHigh, ((u64) tp->RxPhyAddr >> 32));
1876         RTL_W8(Cfg9346, Cfg9346_Lock);
1877         udelay(10);
1878
1879         RTL_W32(RxMissed, 0);
1880
1881         rtl8169_set_rx_mode(dev);
1882
1883         /* no early-rx interrupts */
1884         RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xF000);
1885
1886         /* Enable all known interrupts by setting the interrupt mask. */
1887         RTL_W16(IntrMask, rtl8169_intr_mask);
1888
1889         __rtl8169_set_mac_addr(dev, ioaddr);
1890
1891         netif_start_queue(dev);
1892 }
1893
1894 static int rtl8169_change_mtu(struct net_device *dev, int new_mtu)
1895 {
1896         struct rtl8169_private *tp = netdev_priv(dev);
1897         int ret = 0;
1898
1899         if (new_mtu < ETH_ZLEN || new_mtu > SafeMtu)
1900                 return -EINVAL;
1901
1902         dev->mtu = new_mtu;
1903
1904         if (!netif_running(dev))
1905                 goto out;
1906
1907         rtl8169_down(dev);
1908
1909         rtl8169_set_rxbufsize(tp, dev);
1910
1911         ret = rtl8169_init_ring(dev);
1912         if (ret < 0)
1913                 goto out;
1914
1915         netif_poll_enable(dev);
1916
1917         rtl8169_hw_start(dev);
1918
1919         rtl8169_request_timer(dev);
1920
1921 out:
1922         return ret;
1923 }
1924
1925 static inline void rtl8169_make_unusable_by_asic(struct RxDesc *desc)
1926 {
1927         desc->addr = 0x0badbadbadbadbadull;
1928         desc->opts1 &= ~cpu_to_le32(DescOwn | RsvdMask);
1929 }
1930
1931 static void rtl8169_free_rx_skb(struct rtl8169_private *tp,
1932                                 struct sk_buff **sk_buff, struct RxDesc *desc)
1933 {
1934         struct pci_dev *pdev = tp->pci_dev;
1935
1936         pci_unmap_single(pdev, le64_to_cpu(desc->addr), tp->rx_buf_sz,
1937                          PCI_DMA_FROMDEVICE);
1938         dev_kfree_skb(*sk_buff);
1939         *sk_buff = NULL;
1940         rtl8169_make_unusable_by_asic(desc);
1941 }
1942
1943 static inline void rtl8169_mark_to_asic(struct RxDesc *desc, u32 rx_buf_sz)
1944 {
1945         u32 eor = le32_to_cpu(desc->opts1) & RingEnd;
1946
1947         desc->opts1 = cpu_to_le32(DescOwn | eor | rx_buf_sz);
1948 }
1949
1950 static inline void rtl8169_map_to_asic(struct RxDesc *desc, dma_addr_t mapping,
1951                                        u32 rx_buf_sz)
1952 {
1953         desc->addr = cpu_to_le64(mapping);
1954         wmb();
1955         rtl8169_mark_to_asic(desc, rx_buf_sz);
1956 }
1957
1958 static int rtl8169_alloc_rx_skb(struct pci_dev *pdev, struct sk_buff **sk_buff,
1959                                 struct RxDesc *desc, int rx_buf_sz)
1960 {
1961         struct sk_buff *skb;
1962         dma_addr_t mapping;
1963         int ret = 0;
1964
1965         skb = dev_alloc_skb(rx_buf_sz + NET_IP_ALIGN);
1966         if (!skb)
1967                 goto err_out;
1968
1969         skb_reserve(skb, NET_IP_ALIGN);
1970         *sk_buff = skb;
1971
1972         mapping = pci_map_single(pdev, skb->data, rx_buf_sz,
1973                                  PCI_DMA_FROMDEVICE);
1974
1975         rtl8169_map_to_asic(desc, mapping, rx_buf_sz);
1976
1977 out:
1978         return ret;
1979
1980 err_out:
1981         ret = -ENOMEM;
1982         rtl8169_make_unusable_by_asic(desc);
1983         goto out;
1984 }
1985
1986 static void rtl8169_rx_clear(struct rtl8169_private *tp)
1987 {
1988         int i;
1989
1990         for (i = 0; i < NUM_RX_DESC; i++) {
1991                 if (tp->Rx_skbuff[i]) {
1992                         rtl8169_free_rx_skb(tp, tp->Rx_skbuff + i,
1993                                             tp->RxDescArray + i);
1994                 }
1995         }
1996 }
1997
1998 static u32 rtl8169_rx_fill(struct rtl8169_private *tp, struct net_device *dev,
1999                            u32 start, u32 end)
2000 {
2001         u32 cur;
2002
2003         for (cur = start; end - cur > 0; cur++) {
2004                 int ret, i = cur % NUM_RX_DESC;
2005
2006                 if (tp->Rx_skbuff[i])
2007                         continue;
2008
2009                 ret = rtl8169_alloc_rx_skb(tp->pci_dev, tp->Rx_skbuff + i,
2010                                            tp->RxDescArray + i, tp->rx_buf_sz);
2011                 if (ret < 0)
2012                         break;
2013         }
2014         return cur - start;
2015 }
2016
2017 static inline void rtl8169_mark_as_last_descriptor(struct RxDesc *desc)
2018 {
2019         desc->opts1 |= cpu_to_le32(RingEnd);
2020 }
2021
2022 static void rtl8169_init_ring_indexes(struct rtl8169_private *tp)
2023 {
2024         tp->dirty_tx = tp->dirty_rx = tp->cur_tx = tp->cur_rx = 0;
2025 }
2026
2027 static int rtl8169_init_ring(struct net_device *dev)
2028 {
2029         struct rtl8169_private *tp = netdev_priv(dev);
2030
2031         rtl8169_init_ring_indexes(tp);
2032
2033         memset(tp->tx_skb, 0x0, NUM_TX_DESC * sizeof(struct ring_info));
2034         memset(tp->Rx_skbuff, 0x0, NUM_RX_DESC * sizeof(struct sk_buff *));
2035
2036         if (rtl8169_rx_fill(tp, dev, 0, NUM_RX_DESC) != NUM_RX_DESC)
2037                 goto err_out;
2038
2039         rtl8169_mark_as_last_descriptor(tp->RxDescArray + NUM_RX_DESC - 1);
2040
2041         return 0;
2042
2043 err_out:
2044         rtl8169_rx_clear(tp);
2045         return -ENOMEM;
2046 }
2047
2048 static void rtl8169_unmap_tx_skb(struct pci_dev *pdev, struct ring_info *tx_skb,
2049                                  struct TxDesc *desc)
2050 {
2051         unsigned int len = tx_skb->len;
2052
2053         pci_unmap_single(pdev, le64_to_cpu(desc->addr), len, PCI_DMA_TODEVICE);
2054         desc->opts1 = 0x00;
2055         desc->opts2 = 0x00;
2056         desc->addr = 0x00;
2057         tx_skb->len = 0;
2058 }
2059
2060 static void rtl8169_tx_clear(struct rtl8169_private *tp)
2061 {
2062         unsigned int i;
2063
2064         for (i = tp->dirty_tx; i < tp->dirty_tx + NUM_TX_DESC; i++) {
2065                 unsigned int entry = i % NUM_TX_DESC;
2066                 struct ring_info *tx_skb = tp->tx_skb + entry;
2067                 unsigned int len = tx_skb->len;
2068
2069                 if (len) {
2070                         struct sk_buff *skb = tx_skb->skb;
2071
2072                         rtl8169_unmap_tx_skb(tp->pci_dev, tx_skb,
2073                                              tp->TxDescArray + entry);
2074                         if (skb) {
2075                                 dev_kfree_skb(skb);
2076                                 tx_skb->skb = NULL;
2077                         }
2078                         tp->stats.tx_dropped++;
2079                 }
2080         }
2081         tp->cur_tx = tp->dirty_tx = 0;
2082 }
2083
2084 static void rtl8169_schedule_work(struct net_device *dev, void (*task)(void *))
2085 {
2086         struct rtl8169_private *tp = netdev_priv(dev);
2087
2088         PREPARE_WORK(&tp->task, task, dev);
2089         schedule_delayed_work(&tp->task, 4);
2090 }
2091
2092 static void rtl8169_wait_for_quiescence(struct net_device *dev)
2093 {
2094         struct rtl8169_private *tp = netdev_priv(dev);
2095         void __iomem *ioaddr = tp->mmio_addr;
2096
2097         synchronize_irq(dev->irq);
2098
2099         /* Wait for any pending NAPI task to complete */
2100         netif_poll_disable(dev);
2101
2102         rtl8169_irq_mask_and_ack(ioaddr);
2103
2104         netif_poll_enable(dev);
2105 }
2106
2107 static void rtl8169_reinit_task(void *_data)
2108 {
2109         struct net_device *dev = _data;
2110         int ret;
2111
2112         if (netif_running(dev)) {
2113                 rtl8169_wait_for_quiescence(dev);
2114                 rtl8169_close(dev);
2115         }
2116
2117         ret = rtl8169_open(dev);
2118         if (unlikely(ret < 0)) {
2119                 if (net_ratelimit()) {
2120                         struct rtl8169_private *tp = netdev_priv(dev);
2121
2122                         if (netif_msg_drv(tp)) {
2123                                 printk(PFX KERN_ERR
2124                                        "%s: reinit failure (status = %d)."
2125                                        " Rescheduling.\n", dev->name, ret);
2126                         }
2127                 }
2128                 rtl8169_schedule_work(dev, rtl8169_reinit_task);
2129         }
2130 }
2131
2132 static void rtl8169_reset_task(void *_data)
2133 {
2134         struct net_device *dev = _data;
2135         struct rtl8169_private *tp = netdev_priv(dev);
2136
2137         if (!netif_running(dev))
2138                 return;
2139
2140         rtl8169_wait_for_quiescence(dev);
2141
2142         rtl8169_rx_interrupt(dev, tp, tp->mmio_addr);
2143         rtl8169_tx_clear(tp);
2144
2145         if (tp->dirty_rx == tp->cur_rx) {
2146                 rtl8169_init_ring_indexes(tp);
2147                 rtl8169_hw_start(dev);
2148                 netif_wake_queue(dev);
2149         } else {
2150                 if (net_ratelimit()) {
2151                         struct rtl8169_private *tp = netdev_priv(dev);
2152
2153                         if (netif_msg_intr(tp)) {
2154                                 printk(PFX KERN_EMERG
2155                                        "%s: Rx buffers shortage\n", dev->name);
2156                         }
2157                 }
2158                 rtl8169_schedule_work(dev, rtl8169_reset_task);
2159         }
2160 }
2161
2162 static void rtl8169_tx_timeout(struct net_device *dev)
2163 {
2164         struct rtl8169_private *tp = netdev_priv(dev);
2165
2166         rtl8169_hw_reset(tp->mmio_addr);
2167
2168         /* Let's wait a bit while any (async) irq lands on */
2169         rtl8169_schedule_work(dev, rtl8169_reset_task);
2170 }
2171
2172 static int rtl8169_xmit_frags(struct rtl8169_private *tp, struct sk_buff *skb,
2173                               u32 opts1)
2174 {
2175         struct skb_shared_info *info = skb_shinfo(skb);
2176         unsigned int cur_frag, entry;
2177         struct TxDesc *txd;
2178
2179         entry = tp->cur_tx;
2180         for (cur_frag = 0; cur_frag < info->nr_frags; cur_frag++) {
2181                 skb_frag_t *frag = info->frags + cur_frag;
2182                 dma_addr_t mapping;
2183                 u32 status, len;
2184                 void *addr;
2185
2186                 entry = (entry + 1) % NUM_TX_DESC;
2187
2188                 txd = tp->TxDescArray + entry;
2189                 len = frag->size;
2190                 addr = ((void *) page_address(frag->page)) + frag->page_offset;
2191                 mapping = pci_map_single(tp->pci_dev, addr, len, PCI_DMA_TODEVICE);
2192
2193                 /* anti gcc 2.95.3 bugware (sic) */
2194                 status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC));
2195
2196                 txd->opts1 = cpu_to_le32(status);
2197                 txd->addr = cpu_to_le64(mapping);
2198
2199                 tp->tx_skb[entry].len = len;
2200         }
2201
2202         if (cur_frag) {
2203                 tp->tx_skb[entry].skb = skb;
2204                 txd->opts1 |= cpu_to_le32(LastFrag);
2205         }
2206
2207         return cur_frag;
2208 }
2209
2210 static inline u32 rtl8169_tso_csum(struct sk_buff *skb, struct net_device *dev)
2211 {
2212         if (dev->features & NETIF_F_TSO) {
2213                 u32 mss = skb_shinfo(skb)->gso_size;
2214
2215                 if (mss)
2216                         return LargeSend | ((mss & MSSMask) << MSSShift);
2217         }
2218         if (skb->ip_summed == CHECKSUM_HW) {
2219                 const struct iphdr *ip = skb->nh.iph;
2220
2221                 if (ip->protocol == IPPROTO_TCP)
2222                         return IPCS | TCPCS;
2223                 else if (ip->protocol == IPPROTO_UDP)
2224                         return IPCS | UDPCS;
2225                 WARN_ON(1);     /* we need a WARN() */
2226         }
2227         return 0;
2228 }
2229
2230 static int rtl8169_start_xmit(struct sk_buff *skb, struct net_device *dev)
2231 {
2232         struct rtl8169_private *tp = netdev_priv(dev);
2233         unsigned int frags, entry = tp->cur_tx % NUM_TX_DESC;
2234         struct TxDesc *txd = tp->TxDescArray + entry;
2235         void __iomem *ioaddr = tp->mmio_addr;
2236         dma_addr_t mapping;
2237         u32 status, len;
2238         u32 opts1;
2239         int ret = 0;
2240
2241         if (unlikely(TX_BUFFS_AVAIL(tp) < skb_shinfo(skb)->nr_frags)) {
2242                 if (netif_msg_drv(tp)) {
2243                         printk(KERN_ERR
2244                                "%s: BUG! Tx Ring full when queue awake!\n",
2245                                dev->name);
2246                 }
2247                 goto err_stop;
2248         }
2249
2250         if (unlikely(le32_to_cpu(txd->opts1) & DescOwn))
2251                 goto err_stop;
2252
2253         opts1 = DescOwn | rtl8169_tso_csum(skb, dev);
2254
2255         frags = rtl8169_xmit_frags(tp, skb, opts1);
2256         if (frags) {
2257                 len = skb_headlen(skb);
2258                 opts1 |= FirstFrag;
2259         } else {
2260                 len = skb->len;
2261
2262                 if (unlikely(len < ETH_ZLEN)) {
2263                         if (skb_padto(skb, ETH_ZLEN))
2264                                 goto err_update_stats;
2265                         len = ETH_ZLEN;
2266                 }
2267
2268                 opts1 |= FirstFrag | LastFrag;
2269                 tp->tx_skb[entry].skb = skb;
2270         }
2271
2272         mapping = pci_map_single(tp->pci_dev, skb->data, len, PCI_DMA_TODEVICE);
2273
2274         tp->tx_skb[entry].len = len;
2275         txd->addr = cpu_to_le64(mapping);
2276         txd->opts2 = cpu_to_le32(rtl8169_tx_vlan_tag(tp, skb));
2277
2278         wmb();
2279
2280         /* anti gcc 2.95.3 bugware (sic) */
2281         status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC));
2282         txd->opts1 = cpu_to_le32(status);
2283
2284         dev->trans_start = jiffies;
2285
2286         tp->cur_tx += frags + 1;
2287
2288         smp_wmb();
2289
2290         RTL_W8(TxPoll, 0x40);   /* set polling bit */
2291
2292         if (TX_BUFFS_AVAIL(tp) < MAX_SKB_FRAGS) {
2293                 netif_stop_queue(dev);
2294                 smp_rmb();
2295                 if (TX_BUFFS_AVAIL(tp) >= MAX_SKB_FRAGS)
2296                         netif_wake_queue(dev);
2297         }
2298
2299 out:
2300         return ret;
2301
2302 err_stop:
2303         netif_stop_queue(dev);
2304         ret = 1;
2305 err_update_stats:
2306         tp->stats.tx_dropped++;
2307         goto out;
2308 }
2309
2310 static void rtl8169_pcierr_interrupt(struct net_device *dev)
2311 {
2312         struct rtl8169_private *tp = netdev_priv(dev);
2313         struct pci_dev *pdev = tp->pci_dev;
2314         void __iomem *ioaddr = tp->mmio_addr;
2315         u16 pci_status, pci_cmd;
2316
2317         pci_read_config_word(pdev, PCI_COMMAND, &pci_cmd);
2318         pci_read_config_word(pdev, PCI_STATUS, &pci_status);
2319
2320         if (netif_msg_intr(tp)) {
2321                 printk(KERN_ERR
2322                        "%s: PCI error (cmd = 0x%04x, status = 0x%04x).\n",
2323                        dev->name, pci_cmd, pci_status);
2324         }
2325
2326         /*
2327          * The recovery sequence below admits a very elaborated explanation:
2328          * - it seems to work;
2329          * - I did not see what else could be done.
2330          *
2331          * Feel free to adjust to your needs.
2332          */
2333         pci_write_config_word(pdev, PCI_COMMAND,
2334                               pci_cmd | PCI_COMMAND_SERR | PCI_COMMAND_PARITY);
2335
2336         pci_write_config_word(pdev, PCI_STATUS,
2337                 pci_status & (PCI_STATUS_DETECTED_PARITY |
2338                 PCI_STATUS_SIG_SYSTEM_ERROR | PCI_STATUS_REC_MASTER_ABORT |
2339                 PCI_STATUS_REC_TARGET_ABORT | PCI_STATUS_SIG_TARGET_ABORT));
2340
2341         /* The infamous DAC f*ckup only happens at boot time */
2342         if ((tp->cp_cmd & PCIDAC) && !tp->dirty_rx && !tp->cur_rx) {
2343                 if (netif_msg_intr(tp))
2344                         printk(KERN_INFO "%s: disabling PCI DAC.\n", dev->name);
2345                 tp->cp_cmd &= ~PCIDAC;
2346                 RTL_W16(CPlusCmd, tp->cp_cmd);
2347                 dev->features &= ~NETIF_F_HIGHDMA;
2348                 rtl8169_schedule_work(dev, rtl8169_reinit_task);
2349         }
2350
2351         rtl8169_hw_reset(ioaddr);
2352 }
2353
2354 static void
2355 rtl8169_tx_interrupt(struct net_device *dev, struct rtl8169_private *tp,
2356                      void __iomem *ioaddr)
2357 {
2358         unsigned int dirty_tx, tx_left;
2359
2360         assert(dev != NULL);
2361         assert(tp != NULL);
2362         assert(ioaddr != NULL);
2363
2364         dirty_tx = tp->dirty_tx;
2365         smp_rmb();
2366         tx_left = tp->cur_tx - dirty_tx;
2367
2368         while (tx_left > 0) {
2369                 unsigned int entry = dirty_tx % NUM_TX_DESC;
2370                 struct ring_info *tx_skb = tp->tx_skb + entry;
2371                 u32 len = tx_skb->len;
2372                 u32 status;
2373
2374                 rmb();
2375                 status = le32_to_cpu(tp->TxDescArray[entry].opts1);
2376                 if (status & DescOwn)
2377                         break;
2378
2379                 tp->stats.tx_bytes += len;
2380                 tp->stats.tx_packets++;
2381
2382                 rtl8169_unmap_tx_skb(tp->pci_dev, tx_skb, tp->TxDescArray + entry);
2383
2384                 if (status & LastFrag) {
2385                         dev_kfree_skb_irq(tx_skb->skb);
2386                         tx_skb->skb = NULL;
2387                 }
2388                 dirty_tx++;
2389                 tx_left--;
2390         }
2391
2392         if (tp->dirty_tx != dirty_tx) {
2393                 tp->dirty_tx = dirty_tx;
2394                 smp_wmb();
2395                 if (netif_queue_stopped(dev) &&
2396                     (TX_BUFFS_AVAIL(tp) >= MAX_SKB_FRAGS)) {
2397                         netif_wake_queue(dev);
2398                 }
2399         }
2400 }
2401
2402 static inline int rtl8169_fragmented_frame(u32 status)
2403 {
2404         return (status & (FirstFrag | LastFrag)) != (FirstFrag | LastFrag);
2405 }
2406
2407 static inline void rtl8169_rx_csum(struct sk_buff *skb, struct RxDesc *desc)
2408 {
2409         u32 opts1 = le32_to_cpu(desc->opts1);
2410         u32 status = opts1 & RxProtoMask;
2411
2412         if (((status == RxProtoTCP) && !(opts1 & TCPFail)) ||
2413             ((status == RxProtoUDP) && !(opts1 & UDPFail)) ||
2414             ((status == RxProtoIP) && !(opts1 & IPFail)))
2415                 skb->ip_summed = CHECKSUM_UNNECESSARY;
2416         else
2417                 skb->ip_summed = CHECKSUM_NONE;
2418 }
2419
2420 static inline int rtl8169_try_rx_copy(struct sk_buff **sk_buff, int pkt_size,
2421                                       struct RxDesc *desc, int rx_buf_sz)
2422 {
2423         int ret = -1;
2424
2425         if (pkt_size < rx_copybreak) {
2426                 struct sk_buff *skb;
2427
2428                 skb = dev_alloc_skb(pkt_size + NET_IP_ALIGN);
2429                 if (skb) {
2430                         skb_reserve(skb, NET_IP_ALIGN);
2431                         eth_copy_and_sum(skb, sk_buff[0]->data, pkt_size, 0);
2432                         *sk_buff = skb;
2433                         rtl8169_mark_to_asic(desc, rx_buf_sz);
2434                         ret = 0;
2435                 }
2436         }
2437         return ret;
2438 }
2439
2440 static int
2441 rtl8169_rx_interrupt(struct net_device *dev, struct rtl8169_private *tp,
2442                      void __iomem *ioaddr)
2443 {
2444         unsigned int cur_rx, rx_left;
2445         unsigned int delta, count;
2446
2447         assert(dev != NULL);
2448         assert(tp != NULL);
2449         assert(ioaddr != NULL);
2450
2451         cur_rx = tp->cur_rx;
2452         rx_left = NUM_RX_DESC + tp->dirty_rx - cur_rx;
2453         rx_left = rtl8169_rx_quota(rx_left, (u32) dev->quota);
2454
2455         for (; rx_left > 0; rx_left--, cur_rx++) {
2456                 unsigned int entry = cur_rx % NUM_RX_DESC;
2457                 struct RxDesc *desc = tp->RxDescArray + entry;
2458                 u32 status;
2459
2460                 rmb();
2461                 status = le32_to_cpu(desc->opts1);
2462
2463                 if (status & DescOwn)
2464                         break;
2465                 if (unlikely(status & RxRES)) {
2466                         if (netif_msg_rx_err(tp)) {
2467                                 printk(KERN_INFO
2468                                        "%s: Rx ERROR. status = %08x\n",
2469                                        dev->name, status);
2470                         }
2471                         tp->stats.rx_errors++;
2472                         if (status & (RxRWT | RxRUNT))
2473                                 tp->stats.rx_length_errors++;
2474                         if (status & RxCRC)
2475                                 tp->stats.rx_crc_errors++;
2476                         if (status & RxFOVF) {
2477                                 rtl8169_schedule_work(dev, rtl8169_reset_task);
2478                                 tp->stats.rx_fifo_errors++;
2479                         }
2480                         rtl8169_mark_to_asic(desc, tp->rx_buf_sz);
2481                 } else {
2482                         struct sk_buff *skb = tp->Rx_skbuff[entry];
2483                         int pkt_size = (status & 0x00001FFF) - 4;
2484                         void (*pci_action)(struct pci_dev *, dma_addr_t,
2485                                 size_t, int) = pci_dma_sync_single_for_device;
2486
2487                         /*
2488                          * The driver does not support incoming fragmented
2489                          * frames. They are seen as a symptom of over-mtu
2490                          * sized frames.
2491                          */
2492                         if (unlikely(rtl8169_fragmented_frame(status))) {
2493                                 tp->stats.rx_dropped++;
2494                                 tp->stats.rx_length_errors++;
2495                                 rtl8169_mark_to_asic(desc, tp->rx_buf_sz);
2496                                 continue;
2497                         }
2498
2499                         rtl8169_rx_csum(skb, desc);
2500
2501                         pci_dma_sync_single_for_cpu(tp->pci_dev,
2502                                 le64_to_cpu(desc->addr), tp->rx_buf_sz,
2503                                 PCI_DMA_FROMDEVICE);
2504
2505                         if (rtl8169_try_rx_copy(&skb, pkt_size, desc,
2506                                                 tp->rx_buf_sz)) {
2507                                 pci_action = pci_unmap_single;
2508                                 tp->Rx_skbuff[entry] = NULL;
2509                         }
2510
2511                         pci_action(tp->pci_dev, le64_to_cpu(desc->addr),
2512                                    tp->rx_buf_sz, PCI_DMA_FROMDEVICE);
2513
2514                         skb->dev = dev;
2515                         skb_put(skb, pkt_size);
2516                         skb->protocol = eth_type_trans(skb, dev);
2517
2518                         if (rtl8169_rx_vlan_skb(tp, desc, skb) < 0)
2519                                 rtl8169_rx_skb(skb);
2520
2521                         dev->last_rx = jiffies;
2522                         tp->stats.rx_bytes += pkt_size;
2523                         tp->stats.rx_packets++;
2524                 }
2525         }
2526
2527         count = cur_rx - tp->cur_rx;
2528         tp->cur_rx = cur_rx;
2529
2530         delta = rtl8169_rx_fill(tp, dev, tp->dirty_rx, tp->cur_rx);
2531         if (!delta && count && netif_msg_intr(tp))
2532                 printk(KERN_INFO "%s: no Rx buffer allocated\n", dev->name);
2533         tp->dirty_rx += delta;
2534
2535         /*
2536          * FIXME: until there is periodic timer to try and refill the ring,
2537          * a temporary shortage may definitely kill the Rx process.
2538          * - disable the asic to try and avoid an overflow and kick it again
2539          *   after refill ?
2540          * - how do others driver handle this condition (Uh oh...).
2541          */
2542         if ((tp->dirty_rx + NUM_RX_DESC == tp->cur_rx) && netif_msg_intr(tp))
2543                 printk(KERN_EMERG "%s: Rx buffers exhausted\n", dev->name);
2544
2545         return count;
2546 }
2547
2548 /* The interrupt handler does all of the Rx thread work and cleans up after the Tx thread. */
2549 static irqreturn_t
2550 rtl8169_interrupt(int irq, void *dev_instance, struct pt_regs *regs)
2551 {
2552         struct net_device *dev = (struct net_device *) dev_instance;
2553         struct rtl8169_private *tp = netdev_priv(dev);
2554         int boguscnt = max_interrupt_work;
2555         void __iomem *ioaddr = tp->mmio_addr;
2556         int status;
2557         int handled = 0;
2558
2559         do {
2560                 status = RTL_R16(IntrStatus);
2561
2562                 /* hotplug/major error/no more work/shared irq */
2563                 if ((status == 0xFFFF) || !status)
2564                         break;
2565
2566                 handled = 1;
2567
2568                 if (unlikely(!netif_running(dev))) {
2569                         rtl8169_asic_down(ioaddr);
2570                         goto out;
2571                 }
2572
2573                 status &= tp->intr_mask;
2574                 RTL_W16(IntrStatus,
2575                         (status & RxFIFOOver) ? (status | RxOverflow) : status);
2576
2577                 if (!(status & rtl8169_intr_mask))
2578                         break;
2579
2580                 if (unlikely(status & SYSErr)) {
2581                         rtl8169_pcierr_interrupt(dev);
2582                         break;
2583                 }
2584
2585                 if (status & LinkChg)
2586                         rtl8169_check_link_status(dev, tp, ioaddr);
2587
2588 #ifdef CONFIG_R8169_NAPI
2589                 RTL_W16(IntrMask, rtl8169_intr_mask & ~rtl8169_napi_event);
2590                 tp->intr_mask = ~rtl8169_napi_event;
2591
2592                 if (likely(netif_rx_schedule_prep(dev)))
2593                         __netif_rx_schedule(dev);
2594                 else if (netif_msg_intr(tp)) {
2595                         printk(KERN_INFO "%s: interrupt %04x taken in poll\n",
2596                                dev->name, status);
2597                 }
2598                 break;
2599 #else
2600                 /* Rx interrupt */
2601                 if (status & (RxOK | RxOverflow | RxFIFOOver)) {
2602                         rtl8169_rx_interrupt(dev, tp, ioaddr);
2603                 }
2604                 /* Tx interrupt */
2605                 if (status & (TxOK | TxErr))
2606                         rtl8169_tx_interrupt(dev, tp, ioaddr);
2607 #endif
2608
2609                 boguscnt--;
2610         } while (boguscnt > 0);
2611
2612         if (boguscnt <= 0) {
2613                 if (netif_msg_intr(tp) && net_ratelimit() ) {
2614                         printk(KERN_WARNING
2615                                "%s: Too much work at interrupt!\n", dev->name);
2616                 }
2617                 /* Clear all interrupt sources. */
2618                 RTL_W16(IntrStatus, 0xffff);
2619         }
2620 out:
2621         return IRQ_RETVAL(handled);
2622 }
2623
2624 #ifdef CONFIG_R8169_NAPI
2625 static int rtl8169_poll(struct net_device *dev, int *budget)
2626 {
2627         unsigned int work_done, work_to_do = min(*budget, dev->quota);
2628         struct rtl8169_private *tp = netdev_priv(dev);
2629         void __iomem *ioaddr = tp->mmio_addr;
2630
2631         work_done = rtl8169_rx_interrupt(dev, tp, ioaddr);
2632         rtl8169_tx_interrupt(dev, tp, ioaddr);
2633
2634         *budget -= work_done;
2635         dev->quota -= work_done;
2636
2637         if (work_done < work_to_do) {
2638                 netif_rx_complete(dev);
2639                 tp->intr_mask = 0xffff;
2640                 /*
2641                  * 20040426: the barrier is not strictly required but the
2642                  * behavior of the irq handler could be less predictable
2643                  * without it. Btw, the lack of flush for the posted pci
2644                  * write is safe - FR
2645                  */
2646                 smp_wmb();
2647                 RTL_W16(IntrMask, rtl8169_intr_mask);
2648         }
2649
2650         return (work_done >= work_to_do);
2651 }
2652 #endif
2653
2654 static void rtl8169_down(struct net_device *dev)
2655 {
2656         struct rtl8169_private *tp = netdev_priv(dev);
2657         void __iomem *ioaddr = tp->mmio_addr;
2658         unsigned int poll_locked = 0;
2659
2660         rtl8169_delete_timer(dev);
2661
2662         netif_stop_queue(dev);
2663
2664         flush_scheduled_work();
2665
2666 core_down:
2667         spin_lock_irq(&tp->lock);
2668
2669         rtl8169_asic_down(ioaddr);
2670
2671         /* Update the error counts. */
2672         tp->stats.rx_missed_errors += RTL_R32(RxMissed);
2673         RTL_W32(RxMissed, 0);
2674
2675         spin_unlock_irq(&tp->lock);
2676
2677         synchronize_irq(dev->irq);
2678
2679         if (!poll_locked) {
2680                 netif_poll_disable(dev);
2681                 poll_locked++;
2682         }
2683
2684         /* Give a racing hard_start_xmit a few cycles to complete. */
2685         synchronize_sched();  /* FIXME: should this be synchronize_irq()? */
2686
2687         /*
2688          * And now for the 50k$ question: are IRQ disabled or not ?
2689          *
2690          * Two paths lead here:
2691          * 1) dev->close
2692          *    -> netif_running() is available to sync the current code and the
2693          *       IRQ handler. See rtl8169_interrupt for details.
2694          * 2) dev->change_mtu
2695          *    -> rtl8169_poll can not be issued again and re-enable the
2696          *       interruptions. Let's simply issue the IRQ down sequence again.
2697          */
2698         if (RTL_R16(IntrMask))
2699                 goto core_down;
2700
2701         rtl8169_tx_clear(tp);
2702
2703         rtl8169_rx_clear(tp);
2704 }
2705
2706 static int rtl8169_close(struct net_device *dev)
2707 {
2708         struct rtl8169_private *tp = netdev_priv(dev);
2709         struct pci_dev *pdev = tp->pci_dev;
2710
2711         rtl8169_down(dev);
2712
2713         free_irq(dev->irq, dev);
2714
2715         netif_poll_enable(dev);
2716
2717         pci_free_consistent(pdev, R8169_RX_RING_BYTES, tp->RxDescArray,
2718                             tp->RxPhyAddr);
2719         pci_free_consistent(pdev, R8169_TX_RING_BYTES, tp->TxDescArray,
2720                             tp->TxPhyAddr);
2721         tp->TxDescArray = NULL;
2722         tp->RxDescArray = NULL;
2723
2724         return 0;
2725 }
2726
2727 static void
2728 rtl8169_set_rx_mode(struct net_device *dev)
2729 {
2730         struct rtl8169_private *tp = netdev_priv(dev);
2731         void __iomem *ioaddr = tp->mmio_addr;
2732         unsigned long flags;
2733         u32 mc_filter[2];       /* Multicast hash filter */
2734         int i, rx_mode;
2735         u32 tmp = 0;
2736
2737         if (dev->flags & IFF_PROMISC) {
2738                 /* Unconditionally log net taps. */
2739                 if (netif_msg_link(tp)) {
2740                         printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n",
2741                                dev->name);
2742                 }
2743                 rx_mode =
2744                     AcceptBroadcast | AcceptMulticast | AcceptMyPhys |
2745                     AcceptAllPhys;
2746                 mc_filter[1] = mc_filter[0] = 0xffffffff;
2747         } else if ((dev->mc_count > multicast_filter_limit)
2748                    || (dev->flags & IFF_ALLMULTI)) {
2749                 /* Too many to filter perfectly -- accept all multicasts. */
2750                 rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
2751                 mc_filter[1] = mc_filter[0] = 0xffffffff;
2752         } else {
2753                 struct dev_mc_list *mclist;
2754                 rx_mode = AcceptBroadcast | AcceptMyPhys;
2755                 mc_filter[1] = mc_filter[0] = 0;
2756                 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
2757                      i++, mclist = mclist->next) {
2758                         int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
2759                         mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
2760                         rx_mode |= AcceptMulticast;
2761                 }
2762         }
2763
2764         spin_lock_irqsave(&tp->lock, flags);
2765
2766         tmp = rtl8169_rx_config | rx_mode |
2767               (RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask);
2768
2769         RTL_W32(RxConfig, tmp);
2770         RTL_W32(MAR0 + 0, mc_filter[0]);
2771         RTL_W32(MAR0 + 4, mc_filter[1]);
2772
2773         spin_unlock_irqrestore(&tp->lock, flags);
2774 }
2775
2776 /**
2777  *  rtl8169_get_stats - Get rtl8169 read/write statistics
2778  *  @dev: The Ethernet Device to get statistics for
2779  *
2780  *  Get TX/RX statistics for rtl8169
2781  */
2782 static struct net_device_stats *rtl8169_get_stats(struct net_device *dev)
2783 {
2784         struct rtl8169_private *tp = netdev_priv(dev);
2785         void __iomem *ioaddr = tp->mmio_addr;
2786         unsigned long flags;
2787
2788         if (netif_running(dev)) {
2789                 spin_lock_irqsave(&tp->lock, flags);
2790                 tp->stats.rx_missed_errors += RTL_R32(RxMissed);
2791                 RTL_W32(RxMissed, 0);
2792                 spin_unlock_irqrestore(&tp->lock, flags);
2793         }
2794
2795         return &tp->stats;
2796 }
2797
2798 #ifdef CONFIG_PM
2799
2800 static int rtl8169_suspend(struct pci_dev *pdev, pm_message_t state)
2801 {
2802         struct net_device *dev = pci_get_drvdata(pdev);
2803         struct rtl8169_private *tp = netdev_priv(dev);
2804         void __iomem *ioaddr = tp->mmio_addr;
2805
2806         if (!netif_running(dev))
2807                 goto out;
2808
2809         netif_device_detach(dev);
2810         netif_stop_queue(dev);
2811
2812         spin_lock_irq(&tp->lock);
2813
2814         rtl8169_asic_down(ioaddr);
2815
2816         tp->stats.rx_missed_errors += RTL_R32(RxMissed);
2817         RTL_W32(RxMissed, 0);
2818
2819         spin_unlock_irq(&tp->lock);
2820
2821         pci_save_state(pdev);
2822         pci_enable_wake(pdev, pci_choose_state(pdev, state), tp->wol_enabled);
2823         pci_set_power_state(pdev, pci_choose_state(pdev, state));
2824 out:
2825         return 0;
2826 }
2827
2828 static int rtl8169_resume(struct pci_dev *pdev)
2829 {
2830         struct net_device *dev = pci_get_drvdata(pdev);
2831
2832         if (!netif_running(dev))
2833                 goto out;
2834
2835         netif_device_attach(dev);
2836
2837         pci_set_power_state(pdev, PCI_D0);
2838         pci_restore_state(pdev);
2839         pci_enable_wake(pdev, PCI_D0, 0);
2840
2841         rtl8169_schedule_work(dev, rtl8169_reset_task);
2842 out:
2843         return 0;
2844 }
2845
2846 #endif /* CONFIG_PM */
2847
2848 static struct pci_driver rtl8169_pci_driver = {
2849         .name           = MODULENAME,
2850         .id_table       = rtl8169_pci_tbl,
2851         .probe          = rtl8169_init_one,
2852         .remove         = __devexit_p(rtl8169_remove_one),
2853 #ifdef CONFIG_PM
2854         .suspend        = rtl8169_suspend,
2855         .resume         = rtl8169_resume,
2856 #endif
2857 };
2858
2859 static int __init
2860 rtl8169_init_module(void)
2861 {
2862         return pci_module_init(&rtl8169_pci_driver);
2863 }
2864
2865 static void __exit
2866 rtl8169_cleanup_module(void)
2867 {
2868         pci_unregister_driver(&rtl8169_pci_driver);
2869 }
2870
2871 module_init(rtl8169_init_module);
2872 module_exit(rtl8169_cleanup_module);