[PATCH] orinoco: Bump version to 0.15rc3.
[safe/jmp/linux-2.6] / drivers / net / r8169.c
1 /*
2 =========================================================================
3  r8169.c: A RealTek RTL-8169 Gigabit Ethernet driver for Linux kernel 2.4.x.
4  --------------------------------------------------------------------
5
6  History:
7  Feb  4 2002    - created initially by ShuChen <shuchen@realtek.com.tw>.
8  May 20 2002    - Add link status force-mode and TBI mode support.
9         2004    - Massive updates. See kernel SCM system for details.
10 =========================================================================
11   1. [DEPRECATED: use ethtool instead] The media can be forced in 5 modes.
12          Command: 'insmod r8169 media = SET_MEDIA'
13          Ex:      'insmod r8169 media = 0x04' will force PHY to operate in 100Mpbs Half-duplex.
14         
15          SET_MEDIA can be:
16                 _10_Half        = 0x01
17                 _10_Full        = 0x02
18                 _100_Half       = 0x04
19                 _100_Full       = 0x08
20                 _1000_Full      = 0x10
21   
22   2. Support TBI mode.
23 =========================================================================
24 VERSION 1.1     <2002/10/4>
25
26         The bit4:0 of MII register 4 is called "selector field", and have to be
27         00001b to indicate support of IEEE std 802.3 during NWay process of
28         exchanging Link Code Word (FLP). 
29
30 VERSION 1.2     <2002/11/30>
31
32         - Large style cleanup
33         - Use ether_crc in stock kernel (linux/crc32.h)
34         - Copy mc_filter setup code from 8139cp
35           (includes an optimization, and avoids set_bit use)
36
37 VERSION 1.6LK   <2004/04/14>
38
39         - Merge of Realtek's version 1.6
40         - Conversion to DMA API
41         - Suspend/resume
42         - Endianness
43         - Misc Rx/Tx bugs
44
45 VERSION 2.2LK   <2005/01/25>
46
47         - RX csum, TX csum/SG, TSO
48         - VLAN
49         - baby (< 7200) Jumbo frames support
50         - Merge of Realtek's version 2.2 (new phy)
51  */
52
53 #include <linux/module.h>
54 #include <linux/moduleparam.h>
55 #include <linux/pci.h>
56 #include <linux/netdevice.h>
57 #include <linux/etherdevice.h>
58 #include <linux/delay.h>
59 #include <linux/ethtool.h>
60 #include <linux/mii.h>
61 #include <linux/if_vlan.h>
62 #include <linux/crc32.h>
63 #include <linux/in.h>
64 #include <linux/ip.h>
65 #include <linux/tcp.h>
66 #include <linux/init.h>
67 #include <linux/dma-mapping.h>
68
69 #include <asm/io.h>
70 #include <asm/irq.h>
71
72 #ifdef CONFIG_R8169_NAPI
73 #define NAPI_SUFFIX     "-NAPI"
74 #else
75 #define NAPI_SUFFIX     ""
76 #endif
77
78 #define RTL8169_VERSION "2.2LK" NAPI_SUFFIX
79 #define MODULENAME "r8169"
80 #define PFX MODULENAME ": "
81
82 #ifdef RTL8169_DEBUG
83 #define assert(expr) \
84         if(!(expr)) {                                   \
85                 printk( "Assertion failed! %s,%s,%s,line=%d\n", \
86                 #expr,__FILE__,__FUNCTION__,__LINE__);          \
87         }
88 #define dprintk(fmt, args...)   do { printk(PFX fmt, ## args); } while (0)
89 #else
90 #define assert(expr) do {} while (0)
91 #define dprintk(fmt, args...)   do {} while (0)
92 #endif /* RTL8169_DEBUG */
93
94 #define R8169_MSG_DEFAULT \
95         (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK | NETIF_MSG_IFUP | \
96          NETIF_MSG_IFDOWN)
97
98 #define TX_BUFFS_AVAIL(tp) \
99         (tp->dirty_tx + NUM_TX_DESC - tp->cur_tx - 1)
100
101 #ifdef CONFIG_R8169_NAPI
102 #define rtl8169_rx_skb                  netif_receive_skb
103 #define rtl8169_rx_hwaccel_skb          vlan_hwaccel_receive_skb
104 #define rtl8169_rx_quota(count, quota)  min(count, quota)
105 #else
106 #define rtl8169_rx_skb                  netif_rx
107 #define rtl8169_rx_hwaccel_skb          vlan_hwaccel_rx
108 #define rtl8169_rx_quota(count, quota)  count
109 #endif
110
111 /* media options */
112 #define MAX_UNITS 8
113 static int media[MAX_UNITS] = { -1, -1, -1, -1, -1, -1, -1, -1 };
114 static int num_media = 0;
115
116 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
117 static int max_interrupt_work = 20;
118
119 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
120    The RTL chips use a 64 element hash table based on the Ethernet CRC. */
121 static int multicast_filter_limit = 32;
122
123 /* MAC address length */
124 #define MAC_ADDR_LEN    6
125
126 #define RX_FIFO_THRESH  7       /* 7 means NO threshold, Rx buffer level before first PCI xfer. */
127 #define RX_DMA_BURST    6       /* Maximum PCI burst, '6' is 1024 */
128 #define TX_DMA_BURST    6       /* Maximum PCI burst, '6' is 1024 */
129 #define EarlyTxThld     0x3F    /* 0x3F means NO early transmit */
130 #define RxPacketMaxSize 0x3FE8  /* 16K - 1 - ETH_HLEN - VLAN - CRC... */
131 #define SafeMtu         0x1c20  /* ... actually life sucks beyond ~7k */
132 #define InterFrameGap   0x03    /* 3 means InterFrameGap = the shortest one */
133
134 #define R8169_REGS_SIZE         256
135 #define R8169_NAPI_WEIGHT       64
136 #define NUM_TX_DESC     64      /* Number of Tx descriptor registers */
137 #define NUM_RX_DESC     256     /* Number of Rx descriptor registers */
138 #define RX_BUF_SIZE     1536    /* Rx Buffer size */
139 #define R8169_TX_RING_BYTES     (NUM_TX_DESC * sizeof(struct TxDesc))
140 #define R8169_RX_RING_BYTES     (NUM_RX_DESC * sizeof(struct RxDesc))
141
142 #define RTL8169_TX_TIMEOUT      (6*HZ)
143 #define RTL8169_PHY_TIMEOUT     (10*HZ)
144
145 /* write/read MMIO register */
146 #define RTL_W8(reg, val8)       writeb ((val8), ioaddr + (reg))
147 #define RTL_W16(reg, val16)     writew ((val16), ioaddr + (reg))
148 #define RTL_W32(reg, val32)     writel ((val32), ioaddr + (reg))
149 #define RTL_R8(reg)             readb (ioaddr + (reg))
150 #define RTL_R16(reg)            readw (ioaddr + (reg))
151 #define RTL_R32(reg)            ((unsigned long) readl (ioaddr + (reg)))
152
153 enum mac_version {
154         RTL_GIGA_MAC_VER_B = 0x00,
155         /* RTL_GIGA_MAC_VER_C = 0x03, */
156         RTL_GIGA_MAC_VER_D = 0x01,
157         RTL_GIGA_MAC_VER_E = 0x02,
158         RTL_GIGA_MAC_VER_X = 0x04       /* Greater than RTL_GIGA_MAC_VER_E */
159 };
160
161 enum phy_version {
162         RTL_GIGA_PHY_VER_C = 0x03, /* PHY Reg 0x03 bit0-3 == 0x0000 */
163         RTL_GIGA_PHY_VER_D = 0x04, /* PHY Reg 0x03 bit0-3 == 0x0000 */
164         RTL_GIGA_PHY_VER_E = 0x05, /* PHY Reg 0x03 bit0-3 == 0x0000 */
165         RTL_GIGA_PHY_VER_F = 0x06, /* PHY Reg 0x03 bit0-3 == 0x0001 */
166         RTL_GIGA_PHY_VER_G = 0x07, /* PHY Reg 0x03 bit0-3 == 0x0002 */
167         RTL_GIGA_PHY_VER_H = 0x08, /* PHY Reg 0x03 bit0-3 == 0x0003 */
168 };
169
170
171 #define _R(NAME,MAC,MASK) \
172         { .name = NAME, .mac_version = MAC, .RxConfigMask = MASK }
173
174 const static struct {
175         const char *name;
176         u8 mac_version;
177         u32 RxConfigMask;       /* Clears the bits supported by this chip */
178 } rtl_chip_info[] = {
179         _R("RTL8169",           RTL_GIGA_MAC_VER_B, 0xff7e1880),
180         _R("RTL8169s/8110s",    RTL_GIGA_MAC_VER_D, 0xff7e1880),
181         _R("RTL8169s/8110s",    RTL_GIGA_MAC_VER_E, 0xff7e1880),
182         _R("RTL8169s/8110s",    RTL_GIGA_MAC_VER_X, 0xff7e1880),
183 };
184 #undef _R
185
186 static struct pci_device_id rtl8169_pci_tbl[] = {
187         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK,     0x8169), },
188         { PCI_DEVICE(PCI_VENDOR_ID_DLINK,       0x4300), },
189         { PCI_DEVICE(0x16ec,                    0x0116), },
190         { PCI_VENDOR_ID_LINKSYS,                0x1032, PCI_ANY_ID, 0x0024, },
191         {0,},
192 };
193
194 MODULE_DEVICE_TABLE(pci, rtl8169_pci_tbl);
195
196 static int rx_copybreak = 200;
197 static int use_dac;
198 static struct {
199         u32 msg_enable;
200 } debug = { -1 };
201
202 enum RTL8169_registers {
203         MAC0 = 0,               /* Ethernet hardware address. */
204         MAR0 = 8,               /* Multicast filter. */
205         CounterAddrLow = 0x10,
206         CounterAddrHigh = 0x14,
207         TxDescStartAddrLow = 0x20,
208         TxDescStartAddrHigh = 0x24,
209         TxHDescStartAddrLow = 0x28,
210         TxHDescStartAddrHigh = 0x2c,
211         FLASH = 0x30,
212         ERSR = 0x36,
213         ChipCmd = 0x37,
214         TxPoll = 0x38,
215         IntrMask = 0x3C,
216         IntrStatus = 0x3E,
217         TxConfig = 0x40,
218         RxConfig = 0x44,
219         RxMissed = 0x4C,
220         Cfg9346 = 0x50,
221         Config0 = 0x51,
222         Config1 = 0x52,
223         Config2 = 0x53,
224         Config3 = 0x54,
225         Config4 = 0x55,
226         Config5 = 0x56,
227         MultiIntr = 0x5C,
228         PHYAR = 0x60,
229         TBICSR = 0x64,
230         TBI_ANAR = 0x68,
231         TBI_LPAR = 0x6A,
232         PHYstatus = 0x6C,
233         RxMaxSize = 0xDA,
234         CPlusCmd = 0xE0,
235         IntrMitigate = 0xE2,
236         RxDescAddrLow = 0xE4,
237         RxDescAddrHigh = 0xE8,
238         EarlyTxThres = 0xEC,
239         FuncEvent = 0xF0,
240         FuncEventMask = 0xF4,
241         FuncPresetState = 0xF8,
242         FuncForceEvent = 0xFC,
243 };
244
245 enum RTL8169_register_content {
246         /* InterruptStatusBits */
247         SYSErr = 0x8000,
248         PCSTimeout = 0x4000,
249         SWInt = 0x0100,
250         TxDescUnavail = 0x80,
251         RxFIFOOver = 0x40,
252         LinkChg = 0x20,
253         RxOverflow = 0x10,
254         TxErr = 0x08,
255         TxOK = 0x04,
256         RxErr = 0x02,
257         RxOK = 0x01,
258
259         /* RxStatusDesc */
260         RxRES = 0x00200000,
261         RxCRC = 0x00080000,
262         RxRUNT = 0x00100000,
263         RxRWT = 0x00400000,
264
265         /* ChipCmdBits */
266         CmdReset = 0x10,
267         CmdRxEnb = 0x08,
268         CmdTxEnb = 0x04,
269         RxBufEmpty = 0x01,
270
271         /* Cfg9346Bits */
272         Cfg9346_Lock = 0x00,
273         Cfg9346_Unlock = 0xC0,
274
275         /* rx_mode_bits */
276         AcceptErr = 0x20,
277         AcceptRunt = 0x10,
278         AcceptBroadcast = 0x08,
279         AcceptMulticast = 0x04,
280         AcceptMyPhys = 0x02,
281         AcceptAllPhys = 0x01,
282
283         /* RxConfigBits */
284         RxCfgFIFOShift = 13,
285         RxCfgDMAShift = 8,
286
287         /* TxConfigBits */
288         TxInterFrameGapShift = 24,
289         TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */
290
291         /* TBICSR p.28 */
292         TBIReset        = 0x80000000,
293         TBILoopback     = 0x40000000,
294         TBINwEnable     = 0x20000000,
295         TBINwRestart    = 0x10000000,
296         TBILinkOk       = 0x02000000,
297         TBINwComplete   = 0x01000000,
298
299         /* CPlusCmd p.31 */
300         RxVlan          = (1 << 6),
301         RxChkSum        = (1 << 5),
302         PCIDAC          = (1 << 4),
303         PCIMulRW        = (1 << 3),
304
305         /* rtl8169_PHYstatus */
306         TBI_Enable = 0x80,
307         TxFlowCtrl = 0x40,
308         RxFlowCtrl = 0x20,
309         _1000bpsF = 0x10,
310         _100bps = 0x08,
311         _10bps = 0x04,
312         LinkStatus = 0x02,
313         FullDup = 0x01,
314
315         /* GIGABIT_PHY_registers */
316         PHY_CTRL_REG = 0,
317         PHY_STAT_REG = 1,
318         PHY_AUTO_NEGO_REG = 4,
319         PHY_1000_CTRL_REG = 9,
320
321         /* GIGABIT_PHY_REG_BIT */
322         PHY_Restart_Auto_Nego = 0x0200,
323         PHY_Enable_Auto_Nego = 0x1000,
324
325         /* PHY_STAT_REG = 1 */
326         PHY_Auto_Neco_Comp = 0x0020,
327
328         /* PHY_AUTO_NEGO_REG = 4 */
329         PHY_Cap_10_Half = 0x0020,
330         PHY_Cap_10_Full = 0x0040,
331         PHY_Cap_100_Half = 0x0080,
332         PHY_Cap_100_Full = 0x0100,
333
334         /* PHY_1000_CTRL_REG = 9 */
335         PHY_Cap_1000_Full = 0x0200,
336
337         PHY_Cap_Null = 0x0,
338
339         /* _MediaType */
340         _10_Half = 0x01,
341         _10_Full = 0x02,
342         _100_Half = 0x04,
343         _100_Full = 0x08,
344         _1000_Full = 0x10,
345
346         /* _TBICSRBit */
347         TBILinkOK = 0x02000000,
348
349         /* DumpCounterCommand */
350         CounterDump = 0x8,
351 };
352
353 enum _DescStatusBit {
354         DescOwn         = (1 << 31), /* Descriptor is owned by NIC */
355         RingEnd         = (1 << 30), /* End of descriptor ring */
356         FirstFrag       = (1 << 29), /* First segment of a packet */
357         LastFrag        = (1 << 28), /* Final segment of a packet */
358
359         /* Tx private */
360         LargeSend       = (1 << 27), /* TCP Large Send Offload (TSO) */
361         MSSShift        = 16,        /* MSS value position */
362         MSSMask         = 0xfff,     /* MSS value + LargeSend bit: 12 bits */
363         IPCS            = (1 << 18), /* Calculate IP checksum */
364         UDPCS           = (1 << 17), /* Calculate UDP/IP checksum */
365         TCPCS           = (1 << 16), /* Calculate TCP/IP checksum */
366         TxVlanTag       = (1 << 17), /* Add VLAN tag */
367
368         /* Rx private */
369         PID1            = (1 << 18), /* Protocol ID bit 1/2 */
370         PID0            = (1 << 17), /* Protocol ID bit 2/2 */
371
372 #define RxProtoUDP      (PID1)
373 #define RxProtoTCP      (PID0)
374 #define RxProtoIP       (PID1 | PID0)
375 #define RxProtoMask     RxProtoIP
376
377         IPFail          = (1 << 16), /* IP checksum failed */
378         UDPFail         = (1 << 15), /* UDP/IP checksum failed */
379         TCPFail         = (1 << 14), /* TCP/IP checksum failed */
380         RxVlanTag       = (1 << 16), /* VLAN tag available */
381 };
382
383 #define RsvdMask        0x3fffc000
384
385 struct TxDesc {
386         u32 opts1;
387         u32 opts2;
388         u64 addr;
389 };
390
391 struct RxDesc {
392         u32 opts1;
393         u32 opts2;
394         u64 addr;
395 };
396
397 struct ring_info {
398         struct sk_buff  *skb;
399         u32             len;
400         u8              __pad[sizeof(void *) - sizeof(u32)];
401 };
402
403 struct rtl8169_private {
404         void __iomem *mmio_addr;        /* memory map physical address */
405         struct pci_dev *pci_dev;        /* Index of PCI device */
406         struct net_device_stats stats;  /* statistics of net device */
407         spinlock_t lock;                /* spin lock flag */
408         u32 msg_enable;
409         int chipset;
410         int mac_version;
411         int phy_version;
412         u32 cur_rx; /* Index into the Rx descriptor buffer of next Rx pkt. */
413         u32 cur_tx; /* Index into the Tx descriptor buffer of next Rx pkt. */
414         u32 dirty_rx;
415         u32 dirty_tx;
416         struct TxDesc *TxDescArray;     /* 256-aligned Tx descriptor ring */
417         struct RxDesc *RxDescArray;     /* 256-aligned Rx descriptor ring */
418         dma_addr_t TxPhyAddr;
419         dma_addr_t RxPhyAddr;
420         struct sk_buff *Rx_skbuff[NUM_RX_DESC]; /* Rx data buffers */
421         struct ring_info tx_skb[NUM_TX_DESC];   /* Tx data buffers */
422         unsigned rx_buf_sz;
423         struct timer_list timer;
424         u16 cp_cmd;
425         u16 intr_mask;
426         int phy_auto_nego_reg;
427         int phy_1000_ctrl_reg;
428 #ifdef CONFIG_R8169_VLAN
429         struct vlan_group *vlgrp;
430 #endif
431         int (*set_speed)(struct net_device *, u8 autoneg, u16 speed, u8 duplex);
432         void (*get_settings)(struct net_device *, struct ethtool_cmd *);
433         void (*phy_reset_enable)(void __iomem *);
434         unsigned int (*phy_reset_pending)(void __iomem *);
435         unsigned int (*link_ok)(void __iomem *);
436         struct work_struct task;
437 };
438
439 MODULE_AUTHOR("Realtek and the Linux r8169 crew <netdev@vger.kernel.org>");
440 MODULE_DESCRIPTION("RealTek RTL-8169 Gigabit Ethernet driver");
441 module_param_array(media, int, &num_media, 0);
442 MODULE_PARM_DESC(media, "force phy operation. Deprecated by ethtool (8).");
443 module_param(rx_copybreak, int, 0);
444 MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");
445 module_param(use_dac, int, 0);
446 MODULE_PARM_DESC(use_dac, "Enable PCI DAC. Unsafe on 32 bit PCI slot.");
447 module_param_named(debug, debug.msg_enable, int, 0);
448 MODULE_PARM_DESC(debug, "Debug verbosity level (0=none, ..., 16=all)");
449 MODULE_LICENSE("GPL");
450 MODULE_VERSION(RTL8169_VERSION);
451
452 static int rtl8169_open(struct net_device *dev);
453 static int rtl8169_start_xmit(struct sk_buff *skb, struct net_device *dev);
454 static irqreturn_t rtl8169_interrupt(int irq, void *dev_instance,
455                               struct pt_regs *regs);
456 static int rtl8169_init_ring(struct net_device *dev);
457 static void rtl8169_hw_start(struct net_device *dev);
458 static int rtl8169_close(struct net_device *dev);
459 static void rtl8169_set_rx_mode(struct net_device *dev);
460 static void rtl8169_tx_timeout(struct net_device *dev);
461 static struct net_device_stats *rtl8169_get_stats(struct net_device *dev);
462 static int rtl8169_rx_interrupt(struct net_device *, struct rtl8169_private *,
463                                 void __iomem *);
464 static int rtl8169_change_mtu(struct net_device *dev, int new_mtu);
465 static void rtl8169_down(struct net_device *dev);
466
467 #ifdef CONFIG_R8169_NAPI
468 static int rtl8169_poll(struct net_device *dev, int *budget);
469 #endif
470
471 static const u16 rtl8169_intr_mask =
472         SYSErr | LinkChg | RxOverflow | RxFIFOOver | TxErr | TxOK | RxErr | RxOK;
473 static const u16 rtl8169_napi_event =
474         RxOK | RxOverflow | RxFIFOOver | TxOK | TxErr;
475 static const unsigned int rtl8169_rx_config =
476     (RX_FIFO_THRESH << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift);
477
478 #define PHY_Cap_10_Half_Or_Less PHY_Cap_10_Half
479 #define PHY_Cap_10_Full_Or_Less PHY_Cap_10_Full | PHY_Cap_10_Half_Or_Less
480 #define PHY_Cap_100_Half_Or_Less PHY_Cap_100_Half | PHY_Cap_10_Full_Or_Less
481 #define PHY_Cap_100_Full_Or_Less PHY_Cap_100_Full | PHY_Cap_100_Half_Or_Less
482
483 static void mdio_write(void __iomem *ioaddr, int RegAddr, int value)
484 {
485         int i;
486
487         RTL_W32(PHYAR, 0x80000000 | (RegAddr & 0xFF) << 16 | value);
488         udelay(1000);
489
490         for (i = 2000; i > 0; i--) {
491                 /* Check if the RTL8169 has completed writing to the specified MII register */
492                 if (!(RTL_R32(PHYAR) & 0x80000000)) 
493                         break;
494                 udelay(100);
495         }
496 }
497
498 static int mdio_read(void __iomem *ioaddr, int RegAddr)
499 {
500         int i, value = -1;
501
502         RTL_W32(PHYAR, 0x0 | (RegAddr & 0xFF) << 16);
503         udelay(1000);
504
505         for (i = 2000; i > 0; i--) {
506                 /* Check if the RTL8169 has completed retrieving data from the specified MII register */
507                 if (RTL_R32(PHYAR) & 0x80000000) {
508                         value = (int) (RTL_R32(PHYAR) & 0xFFFF);
509                         break;
510                 }
511                 udelay(100);
512         }
513         return value;
514 }
515
516 static void rtl8169_irq_mask_and_ack(void __iomem *ioaddr)
517 {
518         RTL_W16(IntrMask, 0x0000);
519
520         RTL_W16(IntrStatus, 0xffff);
521 }
522
523 static void rtl8169_asic_down(void __iomem *ioaddr)
524 {
525         RTL_W8(ChipCmd, 0x00);
526         rtl8169_irq_mask_and_ack(ioaddr);
527         RTL_R16(CPlusCmd);
528 }
529
530 static unsigned int rtl8169_tbi_reset_pending(void __iomem *ioaddr)
531 {
532         return RTL_R32(TBICSR) & TBIReset;
533 }
534
535 static unsigned int rtl8169_xmii_reset_pending(void __iomem *ioaddr)
536 {
537         return mdio_read(ioaddr, 0) & 0x8000;
538 }
539
540 static unsigned int rtl8169_tbi_link_ok(void __iomem *ioaddr)
541 {
542         return RTL_R32(TBICSR) & TBILinkOk;
543 }
544
545 static unsigned int rtl8169_xmii_link_ok(void __iomem *ioaddr)
546 {
547         return RTL_R8(PHYstatus) & LinkStatus;
548 }
549
550 static void rtl8169_tbi_reset_enable(void __iomem *ioaddr)
551 {
552         RTL_W32(TBICSR, RTL_R32(TBICSR) | TBIReset);
553 }
554
555 static void rtl8169_xmii_reset_enable(void __iomem *ioaddr)
556 {
557         unsigned int val;
558
559         val = (mdio_read(ioaddr, PHY_CTRL_REG) | 0x8000) & 0xffff;
560         mdio_write(ioaddr, PHY_CTRL_REG, val);
561 }
562
563 static void rtl8169_check_link_status(struct net_device *dev,
564                                       struct rtl8169_private *tp, void __iomem *ioaddr)
565 {
566         unsigned long flags;
567
568         spin_lock_irqsave(&tp->lock, flags);
569         if (tp->link_ok(ioaddr)) {
570                 netif_carrier_on(dev);
571                 if (netif_msg_ifup(tp))
572                         printk(KERN_INFO PFX "%s: link up\n", dev->name);
573         } else {
574                 if (netif_msg_ifdown(tp))
575                         printk(KERN_INFO PFX "%s: link down\n", dev->name);
576                 netif_carrier_off(dev);
577         }
578         spin_unlock_irqrestore(&tp->lock, flags);
579 }
580
581 static void rtl8169_link_option(int idx, u8 *autoneg, u16 *speed, u8 *duplex)
582 {
583         struct {
584                 u16 speed;
585                 u8 duplex;
586                 u8 autoneg;
587                 u8 media;
588         } link_settings[] = {
589                 { SPEED_10,     DUPLEX_HALF, AUTONEG_DISABLE,   _10_Half },
590                 { SPEED_10,     DUPLEX_FULL, AUTONEG_DISABLE,   _10_Full },
591                 { SPEED_100,    DUPLEX_HALF, AUTONEG_DISABLE,   _100_Half },
592                 { SPEED_100,    DUPLEX_FULL, AUTONEG_DISABLE,   _100_Full },
593                 { SPEED_1000,   DUPLEX_FULL, AUTONEG_DISABLE,   _1000_Full },
594                 /* Make TBI happy */
595                 { SPEED_1000,   DUPLEX_FULL, AUTONEG_ENABLE,    0xff }
596         }, *p;
597         unsigned char option;
598         
599         option = ((idx < MAX_UNITS) && (idx >= 0)) ? media[idx] : 0xff;
600
601         if ((option != 0xff) && !idx && netif_msg_drv(&debug))
602                 printk(KERN_WARNING PFX "media option is deprecated.\n");
603
604         for (p = link_settings; p->media != 0xff; p++) {
605                 if (p->media == option)
606                         break;
607         }
608         *autoneg = p->autoneg;
609         *speed = p->speed;
610         *duplex = p->duplex;
611 }
612
613 static void rtl8169_get_drvinfo(struct net_device *dev,
614                                 struct ethtool_drvinfo *info)
615 {
616         struct rtl8169_private *tp = netdev_priv(dev);
617
618         strcpy(info->driver, MODULENAME);
619         strcpy(info->version, RTL8169_VERSION);
620         strcpy(info->bus_info, pci_name(tp->pci_dev));
621 }
622
623 static int rtl8169_get_regs_len(struct net_device *dev)
624 {
625         return R8169_REGS_SIZE;
626 }
627
628 static int rtl8169_set_speed_tbi(struct net_device *dev,
629                                  u8 autoneg, u16 speed, u8 duplex)
630 {
631         struct rtl8169_private *tp = netdev_priv(dev);
632         void __iomem *ioaddr = tp->mmio_addr;
633         int ret = 0;
634         u32 reg;
635
636         reg = RTL_R32(TBICSR);
637         if ((autoneg == AUTONEG_DISABLE) && (speed == SPEED_1000) &&
638             (duplex == DUPLEX_FULL)) {
639                 RTL_W32(TBICSR, reg & ~(TBINwEnable | TBINwRestart));
640         } else if (autoneg == AUTONEG_ENABLE)
641                 RTL_W32(TBICSR, reg | TBINwEnable | TBINwRestart);
642         else {
643                 if (netif_msg_link(tp)) {
644                         printk(KERN_WARNING "%s: "
645                                "incorrect speed setting refused in TBI mode\n",
646                                dev->name);
647                 }
648                 ret = -EOPNOTSUPP;
649         }
650
651         return ret;
652 }
653
654 static int rtl8169_set_speed_xmii(struct net_device *dev,
655                                   u8 autoneg, u16 speed, u8 duplex)
656 {
657         struct rtl8169_private *tp = netdev_priv(dev);
658         void __iomem *ioaddr = tp->mmio_addr;
659         int auto_nego, giga_ctrl;
660
661         auto_nego = mdio_read(ioaddr, PHY_AUTO_NEGO_REG);
662         auto_nego &= ~(PHY_Cap_10_Half | PHY_Cap_10_Full |
663                        PHY_Cap_100_Half | PHY_Cap_100_Full);
664         giga_ctrl = mdio_read(ioaddr, PHY_1000_CTRL_REG);
665         giga_ctrl &= ~(PHY_Cap_1000_Full | PHY_Cap_Null);
666
667         if (autoneg == AUTONEG_ENABLE) {
668                 auto_nego |= (PHY_Cap_10_Half | PHY_Cap_10_Full |
669                               PHY_Cap_100_Half | PHY_Cap_100_Full);
670                 giga_ctrl |= PHY_Cap_1000_Full;
671         } else {
672                 if (speed == SPEED_10)
673                         auto_nego |= PHY_Cap_10_Half | PHY_Cap_10_Full;
674                 else if (speed == SPEED_100)
675                         auto_nego |= PHY_Cap_100_Half | PHY_Cap_100_Full;
676                 else if (speed == SPEED_1000)
677                         giga_ctrl |= PHY_Cap_1000_Full;
678
679                 if (duplex == DUPLEX_HALF)
680                         auto_nego &= ~(PHY_Cap_10_Full | PHY_Cap_100_Full);
681         }
682
683         tp->phy_auto_nego_reg = auto_nego;
684         tp->phy_1000_ctrl_reg = giga_ctrl;
685
686         mdio_write(ioaddr, PHY_AUTO_NEGO_REG, auto_nego);
687         mdio_write(ioaddr, PHY_1000_CTRL_REG, giga_ctrl);
688         mdio_write(ioaddr, PHY_CTRL_REG, PHY_Enable_Auto_Nego |
689                                          PHY_Restart_Auto_Nego);
690         return 0;
691 }
692
693 static int rtl8169_set_speed(struct net_device *dev,
694                              u8 autoneg, u16 speed, u8 duplex)
695 {
696         struct rtl8169_private *tp = netdev_priv(dev);
697         int ret;
698
699         ret = tp->set_speed(dev, autoneg, speed, duplex);
700
701         if (netif_running(dev) && (tp->phy_1000_ctrl_reg & PHY_Cap_1000_Full))
702                 mod_timer(&tp->timer, jiffies + RTL8169_PHY_TIMEOUT);
703
704         return ret;
705 }
706
707 static int rtl8169_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
708 {
709         struct rtl8169_private *tp = netdev_priv(dev);
710         unsigned long flags;
711         int ret;
712
713         spin_lock_irqsave(&tp->lock, flags);
714         ret = rtl8169_set_speed(dev, cmd->autoneg, cmd->speed, cmd->duplex);
715         spin_unlock_irqrestore(&tp->lock, flags);
716         
717         return ret;
718 }
719
720 static u32 rtl8169_get_rx_csum(struct net_device *dev)
721 {
722         struct rtl8169_private *tp = netdev_priv(dev);
723
724         return tp->cp_cmd & RxChkSum;
725 }
726
727 static int rtl8169_set_rx_csum(struct net_device *dev, u32 data)
728 {
729         struct rtl8169_private *tp = netdev_priv(dev);
730         void __iomem *ioaddr = tp->mmio_addr;
731         unsigned long flags;
732
733         spin_lock_irqsave(&tp->lock, flags);
734
735         if (data)
736                 tp->cp_cmd |= RxChkSum;
737         else
738                 tp->cp_cmd &= ~RxChkSum;
739
740         RTL_W16(CPlusCmd, tp->cp_cmd);
741         RTL_R16(CPlusCmd);
742
743         spin_unlock_irqrestore(&tp->lock, flags);
744
745         return 0;
746 }
747
748 #ifdef CONFIG_R8169_VLAN
749
750 static inline u32 rtl8169_tx_vlan_tag(struct rtl8169_private *tp,
751                                       struct sk_buff *skb)
752 {
753         return (tp->vlgrp && vlan_tx_tag_present(skb)) ?
754                 TxVlanTag | swab16(vlan_tx_tag_get(skb)) : 0x00;
755 }
756
757 static void rtl8169_vlan_rx_register(struct net_device *dev,
758                                      struct vlan_group *grp)
759 {
760         struct rtl8169_private *tp = netdev_priv(dev);
761         void __iomem *ioaddr = tp->mmio_addr;
762         unsigned long flags;
763
764         spin_lock_irqsave(&tp->lock, flags);
765         tp->vlgrp = grp;
766         if (tp->vlgrp)
767                 tp->cp_cmd |= RxVlan;
768         else
769                 tp->cp_cmd &= ~RxVlan;
770         RTL_W16(CPlusCmd, tp->cp_cmd);
771         RTL_R16(CPlusCmd);
772         spin_unlock_irqrestore(&tp->lock, flags);
773 }
774
775 static void rtl8169_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
776 {
777         struct rtl8169_private *tp = netdev_priv(dev);
778         unsigned long flags;
779
780         spin_lock_irqsave(&tp->lock, flags);
781         if (tp->vlgrp)
782                 tp->vlgrp->vlan_devices[vid] = NULL;
783         spin_unlock_irqrestore(&tp->lock, flags);
784 }
785
786 static int rtl8169_rx_vlan_skb(struct rtl8169_private *tp, struct RxDesc *desc,
787                                struct sk_buff *skb)
788 {
789         u32 opts2 = le32_to_cpu(desc->opts2);
790         int ret;
791
792         if (tp->vlgrp && (opts2 & RxVlanTag)) {
793                 rtl8169_rx_hwaccel_skb(skb, tp->vlgrp,
794                                        swab16(opts2 & 0xffff));
795                 ret = 0;
796         } else
797                 ret = -1;
798         desc->opts2 = 0;
799         return ret;
800 }
801
802 #else /* !CONFIG_R8169_VLAN */
803
804 static inline u32 rtl8169_tx_vlan_tag(struct rtl8169_private *tp,
805                                       struct sk_buff *skb)
806 {
807         return 0;
808 }
809
810 static int rtl8169_rx_vlan_skb(struct rtl8169_private *tp, struct RxDesc *desc,
811                                struct sk_buff *skb)
812 {
813         return -1;
814 }
815
816 #endif
817
818 static void rtl8169_gset_tbi(struct net_device *dev, struct ethtool_cmd *cmd)
819 {
820         struct rtl8169_private *tp = netdev_priv(dev);
821         void __iomem *ioaddr = tp->mmio_addr;
822         u32 status;
823
824         cmd->supported =
825                 SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg | SUPPORTED_FIBRE;
826         cmd->port = PORT_FIBRE;
827         cmd->transceiver = XCVR_INTERNAL;
828
829         status = RTL_R32(TBICSR);
830         cmd->advertising = (status & TBINwEnable) ?  ADVERTISED_Autoneg : 0;
831         cmd->autoneg = !!(status & TBINwEnable);
832
833         cmd->speed = SPEED_1000;
834         cmd->duplex = DUPLEX_FULL; /* Always set */
835 }
836
837 static void rtl8169_gset_xmii(struct net_device *dev, struct ethtool_cmd *cmd)
838 {
839         struct rtl8169_private *tp = netdev_priv(dev);
840         void __iomem *ioaddr = tp->mmio_addr;
841         u8 status;
842
843         cmd->supported = SUPPORTED_10baseT_Half |
844                          SUPPORTED_10baseT_Full |
845                          SUPPORTED_100baseT_Half |
846                          SUPPORTED_100baseT_Full |
847                          SUPPORTED_1000baseT_Full |
848                          SUPPORTED_Autoneg |
849                          SUPPORTED_TP;
850
851         cmd->autoneg = 1;
852         cmd->advertising = ADVERTISED_TP | ADVERTISED_Autoneg;
853
854         if (tp->phy_auto_nego_reg & PHY_Cap_10_Half)
855                 cmd->advertising |= ADVERTISED_10baseT_Half;
856         if (tp->phy_auto_nego_reg & PHY_Cap_10_Full)
857                 cmd->advertising |= ADVERTISED_10baseT_Full;
858         if (tp->phy_auto_nego_reg & PHY_Cap_100_Half)
859                 cmd->advertising |= ADVERTISED_100baseT_Half;
860         if (tp->phy_auto_nego_reg & PHY_Cap_100_Full)
861                 cmd->advertising |= ADVERTISED_100baseT_Full;
862         if (tp->phy_1000_ctrl_reg & PHY_Cap_1000_Full)
863                 cmd->advertising |= ADVERTISED_1000baseT_Full;
864
865         status = RTL_R8(PHYstatus);
866
867         if (status & _1000bpsF)
868                 cmd->speed = SPEED_1000;
869         else if (status & _100bps)
870                 cmd->speed = SPEED_100;
871         else if (status & _10bps)
872                 cmd->speed = SPEED_10;
873
874         cmd->duplex = ((status & _1000bpsF) || (status & FullDup)) ?
875                       DUPLEX_FULL : DUPLEX_HALF;
876 }
877
878 static int rtl8169_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
879 {
880         struct rtl8169_private *tp = netdev_priv(dev);
881         unsigned long flags;
882
883         spin_lock_irqsave(&tp->lock, flags);
884
885         tp->get_settings(dev, cmd);
886
887         spin_unlock_irqrestore(&tp->lock, flags);
888         return 0;
889 }
890
891 static void rtl8169_get_regs(struct net_device *dev, struct ethtool_regs *regs,
892                              void *p)
893 {
894         struct rtl8169_private *tp = netdev_priv(dev);
895         unsigned long flags;
896
897         if (regs->len > R8169_REGS_SIZE)
898                 regs->len = R8169_REGS_SIZE;
899
900         spin_lock_irqsave(&tp->lock, flags);
901         memcpy_fromio(p, tp->mmio_addr, regs->len);
902         spin_unlock_irqrestore(&tp->lock, flags);
903 }
904
905 static u32 rtl8169_get_msglevel(struct net_device *dev)
906 {
907         struct rtl8169_private *tp = netdev_priv(dev);
908
909         return tp->msg_enable;
910 }
911
912 static void rtl8169_set_msglevel(struct net_device *dev, u32 value)
913 {
914         struct rtl8169_private *tp = netdev_priv(dev);
915
916         tp->msg_enable = value;
917 }
918
919 static const char rtl8169_gstrings[][ETH_GSTRING_LEN] = {
920         "tx_packets",
921         "rx_packets",
922         "tx_errors",
923         "rx_errors",
924         "rx_missed",
925         "align_errors",
926         "tx_single_collisions",
927         "tx_multi_collisions",
928         "unicast",
929         "broadcast",
930         "multicast",
931         "tx_aborted",
932         "tx_underrun",
933 };
934
935 struct rtl8169_counters {
936         u64     tx_packets;
937         u64     rx_packets;
938         u64     tx_errors;
939         u32     rx_errors;
940         u16     rx_missed;
941         u16     align_errors;
942         u32     tx_one_collision;
943         u32     tx_multi_collision;
944         u64     rx_unicast;
945         u64     rx_broadcast;
946         u32     rx_multicast;
947         u16     tx_aborted;
948         u16     tx_underun;
949 };
950
951 static int rtl8169_get_stats_count(struct net_device *dev)
952 {
953         return ARRAY_SIZE(rtl8169_gstrings);
954 }
955
956 static void rtl8169_get_ethtool_stats(struct net_device *dev,
957                                       struct ethtool_stats *stats, u64 *data)
958 {
959         struct rtl8169_private *tp = netdev_priv(dev);
960         void __iomem *ioaddr = tp->mmio_addr;
961         struct rtl8169_counters *counters;
962         dma_addr_t paddr;
963         u32 cmd;
964
965         ASSERT_RTNL();
966
967         counters = pci_alloc_consistent(tp->pci_dev, sizeof(*counters), &paddr);
968         if (!counters)
969                 return;
970
971         RTL_W32(CounterAddrHigh, (u64)paddr >> 32);
972         cmd = (u64)paddr & DMA_32BIT_MASK;
973         RTL_W32(CounterAddrLow, cmd);
974         RTL_W32(CounterAddrLow, cmd | CounterDump);
975
976         while (RTL_R32(CounterAddrLow) & CounterDump) {
977                 if (msleep_interruptible(1))
978                         break;
979         }
980
981         RTL_W32(CounterAddrLow, 0);
982         RTL_W32(CounterAddrHigh, 0);
983
984         data[0] = le64_to_cpu(counters->tx_packets);
985         data[1] = le64_to_cpu(counters->rx_packets);
986         data[2] = le64_to_cpu(counters->tx_errors);
987         data[3] = le32_to_cpu(counters->rx_errors);
988         data[4] = le16_to_cpu(counters->rx_missed);
989         data[5] = le16_to_cpu(counters->align_errors);
990         data[6] = le32_to_cpu(counters->tx_one_collision);
991         data[7] = le32_to_cpu(counters->tx_multi_collision);
992         data[8] = le64_to_cpu(counters->rx_unicast);
993         data[9] = le64_to_cpu(counters->rx_broadcast);
994         data[10] = le32_to_cpu(counters->rx_multicast);
995         data[11] = le16_to_cpu(counters->tx_aborted);
996         data[12] = le16_to_cpu(counters->tx_underun);
997
998         pci_free_consistent(tp->pci_dev, sizeof(*counters), counters, paddr);
999 }
1000
1001 static void rtl8169_get_strings(struct net_device *dev, u32 stringset, u8 *data)
1002 {
1003         switch(stringset) {
1004         case ETH_SS_STATS:
1005                 memcpy(data, *rtl8169_gstrings, sizeof(rtl8169_gstrings));
1006                 break;
1007         }
1008 }
1009
1010
1011 static struct ethtool_ops rtl8169_ethtool_ops = {
1012         .get_drvinfo            = rtl8169_get_drvinfo,
1013         .get_regs_len           = rtl8169_get_regs_len,
1014         .get_link               = ethtool_op_get_link,
1015         .get_settings           = rtl8169_get_settings,
1016         .set_settings           = rtl8169_set_settings,
1017         .get_msglevel           = rtl8169_get_msglevel,
1018         .set_msglevel           = rtl8169_set_msglevel,
1019         .get_rx_csum            = rtl8169_get_rx_csum,
1020         .set_rx_csum            = rtl8169_set_rx_csum,
1021         .get_tx_csum            = ethtool_op_get_tx_csum,
1022         .set_tx_csum            = ethtool_op_set_tx_csum,
1023         .get_sg                 = ethtool_op_get_sg,
1024         .set_sg                 = ethtool_op_set_sg,
1025         .get_tso                = ethtool_op_get_tso,
1026         .set_tso                = ethtool_op_set_tso,
1027         .get_regs               = rtl8169_get_regs,
1028         .get_strings            = rtl8169_get_strings,
1029         .get_stats_count        = rtl8169_get_stats_count,
1030         .get_ethtool_stats      = rtl8169_get_ethtool_stats,
1031         .get_perm_addr          = ethtool_op_get_perm_addr,
1032 };
1033
1034 static void rtl8169_write_gmii_reg_bit(void __iomem *ioaddr, int reg, int bitnum,
1035                                        int bitval)
1036 {
1037         int val;
1038
1039         val = mdio_read(ioaddr, reg);
1040         val = (bitval == 1) ?
1041                 val | (bitval << bitnum) :  val & ~(0x0001 << bitnum);
1042         mdio_write(ioaddr, reg, val & 0xffff); 
1043 }
1044
1045 static void rtl8169_get_mac_version(struct rtl8169_private *tp, void __iomem *ioaddr)
1046 {
1047         const struct {
1048                 u32 mask;
1049                 int mac_version;
1050         } mac_info[] = {
1051                 { 0x1 << 28,    RTL_GIGA_MAC_VER_X },
1052                 { 0x1 << 26,    RTL_GIGA_MAC_VER_E },
1053                 { 0x1 << 23,    RTL_GIGA_MAC_VER_D }, 
1054                 { 0x00000000,   RTL_GIGA_MAC_VER_B } /* Catch-all */
1055         }, *p = mac_info;
1056         u32 reg;
1057
1058         reg = RTL_R32(TxConfig) & 0x7c800000;
1059         while ((reg & p->mask) != p->mask)
1060                 p++;
1061         tp->mac_version = p->mac_version;
1062 }
1063
1064 static void rtl8169_print_mac_version(struct rtl8169_private *tp)
1065 {
1066         struct {
1067                 int version;
1068                 char *msg;
1069         } mac_print[] = {
1070                 { RTL_GIGA_MAC_VER_E, "RTL_GIGA_MAC_VER_E" },
1071                 { RTL_GIGA_MAC_VER_D, "RTL_GIGA_MAC_VER_D" },
1072                 { RTL_GIGA_MAC_VER_B, "RTL_GIGA_MAC_VER_B" },
1073                 { 0, NULL }
1074         }, *p;
1075
1076         for (p = mac_print; p->msg; p++) {
1077                 if (tp->mac_version == p->version) {
1078                         dprintk("mac_version == %s (%04d)\n", p->msg,
1079                                   p->version);
1080                         return;
1081                 }
1082         }
1083         dprintk("mac_version == Unknown\n");
1084 }
1085
1086 static void rtl8169_get_phy_version(struct rtl8169_private *tp, void __iomem *ioaddr)
1087 {
1088         const struct {
1089                 u16 mask;
1090                 u16 set;
1091                 int phy_version;
1092         } phy_info[] = {
1093                 { 0x000f, 0x0002, RTL_GIGA_PHY_VER_G },
1094                 { 0x000f, 0x0001, RTL_GIGA_PHY_VER_F },
1095                 { 0x000f, 0x0000, RTL_GIGA_PHY_VER_E },
1096                 { 0x0000, 0x0000, RTL_GIGA_PHY_VER_D } /* Catch-all */
1097         }, *p = phy_info;
1098         u16 reg;
1099
1100         reg = mdio_read(ioaddr, 3) & 0xffff;
1101         while ((reg & p->mask) != p->set)
1102                 p++;
1103         tp->phy_version = p->phy_version;
1104 }
1105
1106 static void rtl8169_print_phy_version(struct rtl8169_private *tp)
1107 {
1108         struct {
1109                 int version;
1110                 char *msg;
1111                 u32 reg;
1112         } phy_print[] = {
1113                 { RTL_GIGA_PHY_VER_G, "RTL_GIGA_PHY_VER_G", 0x0002 },
1114                 { RTL_GIGA_PHY_VER_F, "RTL_GIGA_PHY_VER_F", 0x0001 },
1115                 { RTL_GIGA_PHY_VER_E, "RTL_GIGA_PHY_VER_E", 0x0000 },
1116                 { RTL_GIGA_PHY_VER_D, "RTL_GIGA_PHY_VER_D", 0x0000 },
1117                 { 0, NULL, 0x0000 }
1118         }, *p;
1119
1120         for (p = phy_print; p->msg; p++) {
1121                 if (tp->phy_version == p->version) {
1122                         dprintk("phy_version == %s (%04x)\n", p->msg, p->reg);
1123                         return;
1124                 }
1125         }
1126         dprintk("phy_version == Unknown\n");
1127 }
1128
1129 static void rtl8169_hw_phy_config(struct net_device *dev)
1130 {
1131         struct rtl8169_private *tp = netdev_priv(dev);
1132         void __iomem *ioaddr = tp->mmio_addr;
1133         struct {
1134                 u16 regs[5]; /* Beware of bit-sign propagation */
1135         } phy_magic[5] = { {
1136                 { 0x0000,       //w 4 15 12 0
1137                   0x00a1,       //w 3 15 0 00a1
1138                   0x0008,       //w 2 15 0 0008
1139                   0x1020,       //w 1 15 0 1020
1140                   0x1000 } },{  //w 0 15 0 1000
1141                 { 0x7000,       //w 4 15 12 7
1142                   0xff41,       //w 3 15 0 ff41
1143                   0xde60,       //w 2 15 0 de60
1144                   0x0140,       //w 1 15 0 0140
1145                   0x0077 } },{  //w 0 15 0 0077
1146                 { 0xa000,       //w 4 15 12 a
1147                   0xdf01,       //w 3 15 0 df01
1148                   0xdf20,       //w 2 15 0 df20
1149                   0xff95,       //w 1 15 0 ff95
1150                   0xfa00 } },{  //w 0 15 0 fa00
1151                 { 0xb000,       //w 4 15 12 b
1152                   0xff41,       //w 3 15 0 ff41
1153                   0xde20,       //w 2 15 0 de20
1154                   0x0140,       //w 1 15 0 0140
1155                   0x00bb } },{  //w 0 15 0 00bb
1156                 { 0xf000,       //w 4 15 12 f
1157                   0xdf01,       //w 3 15 0 df01
1158                   0xdf20,       //w 2 15 0 df20
1159                   0xff95,       //w 1 15 0 ff95
1160                   0xbf00 }      //w 0 15 0 bf00
1161                 }
1162         }, *p = phy_magic;
1163         int i;
1164
1165         rtl8169_print_mac_version(tp);
1166         rtl8169_print_phy_version(tp);
1167
1168         if (tp->mac_version <= RTL_GIGA_MAC_VER_B)
1169                 return;
1170         if (tp->phy_version >= RTL_GIGA_PHY_VER_H)
1171                 return;
1172
1173         dprintk("MAC version != 0 && PHY version == 0 or 1\n");
1174         dprintk("Do final_reg2.cfg\n");
1175
1176         /* Shazam ! */
1177
1178         if (tp->mac_version == RTL_GIGA_MAC_VER_X) {
1179                 mdio_write(ioaddr, 31, 0x0001);
1180                 mdio_write(ioaddr,  9, 0x273a);
1181                 mdio_write(ioaddr, 14, 0x7bfb);
1182                 mdio_write(ioaddr, 27, 0x841e);
1183
1184                 mdio_write(ioaddr, 31, 0x0002);
1185                 mdio_write(ioaddr,  1, 0x90d0);
1186                 mdio_write(ioaddr, 31, 0x0000);
1187                 return;
1188         }
1189
1190         /* phy config for RTL8169s mac_version C chip */
1191         mdio_write(ioaddr, 31, 0x0001);                 //w 31 2 0 1
1192         mdio_write(ioaddr, 21, 0x1000);                 //w 21 15 0 1000
1193         mdio_write(ioaddr, 24, 0x65c7);                 //w 24 15 0 65c7
1194         rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 0);   //w 4 11 11 0
1195
1196         for (i = 0; i < ARRAY_SIZE(phy_magic); i++, p++) {
1197                 int val, pos = 4;
1198
1199                 val = (mdio_read(ioaddr, pos) & 0x0fff) | (p->regs[0] & 0xffff);
1200                 mdio_write(ioaddr, pos, val);
1201                 while (--pos >= 0)
1202                         mdio_write(ioaddr, pos, p->regs[4 - pos] & 0xffff);
1203                 rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 1); //w 4 11 11 1
1204                 rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 0); //w 4 11 11 0
1205         }
1206         mdio_write(ioaddr, 31, 0x0000); //w 31 2 0 0
1207 }
1208
1209 static void rtl8169_phy_timer(unsigned long __opaque)
1210 {
1211         struct net_device *dev = (struct net_device *)__opaque;
1212         struct rtl8169_private *tp = netdev_priv(dev);
1213         struct timer_list *timer = &tp->timer;
1214         void __iomem *ioaddr = tp->mmio_addr;
1215         unsigned long timeout = RTL8169_PHY_TIMEOUT;
1216
1217         assert(tp->mac_version > RTL_GIGA_MAC_VER_B);
1218         assert(tp->phy_version < RTL_GIGA_PHY_VER_H);
1219
1220         if (!(tp->phy_1000_ctrl_reg & PHY_Cap_1000_Full))
1221                 return;
1222
1223         spin_lock_irq(&tp->lock);
1224
1225         if (tp->phy_reset_pending(ioaddr)) {
1226                 /* 
1227                  * A busy loop could burn quite a few cycles on nowadays CPU.
1228                  * Let's delay the execution of the timer for a few ticks.
1229                  */
1230                 timeout = HZ/10;
1231                 goto out_mod_timer;
1232         }
1233
1234         if (tp->link_ok(ioaddr))
1235                 goto out_unlock;
1236
1237         if (netif_msg_link(tp))
1238                 printk(KERN_WARNING "%s: PHY reset until link up\n", dev->name);
1239
1240         tp->phy_reset_enable(ioaddr);
1241
1242 out_mod_timer:
1243         mod_timer(timer, jiffies + timeout);
1244 out_unlock:
1245         spin_unlock_irq(&tp->lock);
1246 }
1247
1248 static inline void rtl8169_delete_timer(struct net_device *dev)
1249 {
1250         struct rtl8169_private *tp = netdev_priv(dev);
1251         struct timer_list *timer = &tp->timer;
1252
1253         if ((tp->mac_version <= RTL_GIGA_MAC_VER_B) ||
1254             (tp->phy_version >= RTL_GIGA_PHY_VER_H))
1255                 return;
1256
1257         del_timer_sync(timer);
1258 }
1259
1260 static inline void rtl8169_request_timer(struct net_device *dev)
1261 {
1262         struct rtl8169_private *tp = netdev_priv(dev);
1263         struct timer_list *timer = &tp->timer;
1264
1265         if ((tp->mac_version <= RTL_GIGA_MAC_VER_B) ||
1266             (tp->phy_version >= RTL_GIGA_PHY_VER_H))
1267                 return;
1268
1269         init_timer(timer);
1270         timer->expires = jiffies + RTL8169_PHY_TIMEOUT;
1271         timer->data = (unsigned long)(dev);
1272         timer->function = rtl8169_phy_timer;
1273         add_timer(timer);
1274 }
1275
1276 #ifdef CONFIG_NET_POLL_CONTROLLER
1277 /*
1278  * Polling 'interrupt' - used by things like netconsole to send skbs
1279  * without having to re-enable interrupts. It's not called while
1280  * the interrupt routine is executing.
1281  */
1282 static void rtl8169_netpoll(struct net_device *dev)
1283 {
1284         struct rtl8169_private *tp = netdev_priv(dev);
1285         struct pci_dev *pdev = tp->pci_dev;
1286
1287         disable_irq(pdev->irq);
1288         rtl8169_interrupt(pdev->irq, dev, NULL);
1289         enable_irq(pdev->irq);
1290 }
1291 #endif
1292
1293 static void rtl8169_release_board(struct pci_dev *pdev, struct net_device *dev,
1294                                   void __iomem *ioaddr)
1295 {
1296         iounmap(ioaddr);
1297         pci_release_regions(pdev);
1298         pci_disable_device(pdev);
1299         free_netdev(dev);
1300 }
1301
1302 static int __devinit
1303 rtl8169_init_board(struct pci_dev *pdev, struct net_device **dev_out,
1304                    void __iomem **ioaddr_out)
1305 {
1306         void __iomem *ioaddr;
1307         struct net_device *dev;
1308         struct rtl8169_private *tp;
1309         int rc = -ENOMEM, i, acpi_idle_state = 0, pm_cap;
1310
1311         assert(ioaddr_out != NULL);
1312
1313         /* dev zeroed in alloc_etherdev */
1314         dev = alloc_etherdev(sizeof (*tp));
1315         if (dev == NULL) {
1316                 if (netif_msg_drv(&debug))
1317                         printk(KERN_ERR PFX "unable to alloc new ethernet\n");
1318                 goto err_out;
1319         }
1320
1321         SET_MODULE_OWNER(dev);
1322         SET_NETDEV_DEV(dev, &pdev->dev);
1323         tp = netdev_priv(dev);
1324         tp->msg_enable = netif_msg_init(debug.msg_enable, R8169_MSG_DEFAULT);
1325
1326         /* enable device (incl. PCI PM wakeup and hotplug setup) */
1327         rc = pci_enable_device(pdev);
1328         if (rc < 0) {
1329                 if (netif_msg_probe(tp)) {
1330                         printk(KERN_ERR PFX "%s: enable failure\n",
1331                                pci_name(pdev));
1332                 }
1333                 goto err_out_free_dev;
1334         }
1335
1336         rc = pci_set_mwi(pdev);
1337         if (rc < 0)
1338                 goto err_out_disable;
1339
1340         /* save power state before pci_enable_device overwrites it */
1341         pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM);
1342         if (pm_cap) {
1343                 u16 pwr_command;
1344
1345                 pci_read_config_word(pdev, pm_cap + PCI_PM_CTRL, &pwr_command);
1346                 acpi_idle_state = pwr_command & PCI_PM_CTRL_STATE_MASK;
1347         } else {
1348                 if (netif_msg_probe(tp)) {
1349                         printk(KERN_ERR PFX
1350                                "Cannot find PowerManagement capability. "
1351                                "Aborting.\n");
1352                 }
1353                 goto err_out_mwi;
1354         }
1355
1356         /* make sure PCI base addr 1 is MMIO */
1357         if (!(pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
1358                 if (netif_msg_probe(tp)) {
1359                         printk(KERN_ERR PFX
1360                                "region #1 not an MMIO resource, aborting\n");
1361                 }
1362                 rc = -ENODEV;
1363                 goto err_out_mwi;
1364         }
1365         /* check for weird/broken PCI region reporting */
1366         if (pci_resource_len(pdev, 1) < R8169_REGS_SIZE) {
1367                 if (netif_msg_probe(tp)) {
1368                         printk(KERN_ERR PFX
1369                                "Invalid PCI region size(s), aborting\n");
1370                 }
1371                 rc = -ENODEV;
1372                 goto err_out_mwi;
1373         }
1374
1375         rc = pci_request_regions(pdev, MODULENAME);
1376         if (rc < 0) {
1377                 if (netif_msg_probe(tp)) {
1378                         printk(KERN_ERR PFX "%s: could not request regions.\n",
1379                                pci_name(pdev));
1380                 }
1381                 goto err_out_mwi;
1382         }
1383
1384         tp->cp_cmd = PCIMulRW | RxChkSum;
1385
1386         if ((sizeof(dma_addr_t) > 4) &&
1387             !pci_set_dma_mask(pdev, DMA_64BIT_MASK) && use_dac) {
1388                 tp->cp_cmd |= PCIDAC;
1389                 dev->features |= NETIF_F_HIGHDMA;
1390         } else {
1391                 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1392                 if (rc < 0) {
1393                         if (netif_msg_probe(tp)) {
1394                                 printk(KERN_ERR PFX
1395                                        "DMA configuration failed.\n");
1396                         }
1397                         goto err_out_free_res;
1398                 }
1399         }
1400
1401         pci_set_master(pdev);
1402
1403         /* ioremap MMIO region */
1404         ioaddr = ioremap(pci_resource_start(pdev, 1), R8169_REGS_SIZE);
1405         if (ioaddr == NULL) {
1406                 if (netif_msg_probe(tp))
1407                         printk(KERN_ERR PFX "cannot remap MMIO, aborting\n");
1408                 rc = -EIO;
1409                 goto err_out_free_res;
1410         }
1411
1412         /* Unneeded ? Don't mess with Mrs. Murphy. */
1413         rtl8169_irq_mask_and_ack(ioaddr);
1414
1415         /* Soft reset the chip. */
1416         RTL_W8(ChipCmd, CmdReset);
1417
1418         /* Check that the chip has finished the reset. */
1419         for (i = 1000; i > 0; i--) {
1420                 if ((RTL_R8(ChipCmd) & CmdReset) == 0)
1421                         break;
1422                 udelay(10);
1423         }
1424
1425         /* Identify chip attached to board */
1426         rtl8169_get_mac_version(tp, ioaddr);
1427         rtl8169_get_phy_version(tp, ioaddr);
1428
1429         rtl8169_print_mac_version(tp);
1430         rtl8169_print_phy_version(tp);
1431
1432         for (i = ARRAY_SIZE(rtl_chip_info) - 1; i >= 0; i--) {
1433                 if (tp->mac_version == rtl_chip_info[i].mac_version)
1434                         break;
1435         }
1436         if (i < 0) {
1437                 /* Unknown chip: assume array element #0, original RTL-8169 */
1438                 if (netif_msg_probe(tp)) {
1439                         printk(KERN_DEBUG PFX "PCI device %s: "
1440                                "unknown chip version, assuming %s\n",
1441                                pci_name(pdev), rtl_chip_info[0].name);
1442                 }
1443                 i++;
1444         }
1445         tp->chipset = i;
1446
1447         *ioaddr_out = ioaddr;
1448         *dev_out = dev;
1449 out:
1450         return rc;
1451
1452 err_out_free_res:
1453         pci_release_regions(pdev);
1454
1455 err_out_mwi:
1456         pci_clear_mwi(pdev);
1457
1458 err_out_disable:
1459         pci_disable_device(pdev);
1460
1461 err_out_free_dev:
1462         free_netdev(dev);
1463 err_out:
1464         *ioaddr_out = NULL;
1465         *dev_out = NULL;
1466         goto out;
1467 }
1468
1469 static int __devinit
1470 rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1471 {
1472         struct net_device *dev = NULL;
1473         struct rtl8169_private *tp;
1474         void __iomem *ioaddr = NULL;
1475         static int board_idx = -1;
1476         u8 autoneg, duplex;
1477         u16 speed;
1478         int i, rc;
1479
1480         assert(pdev != NULL);
1481         assert(ent != NULL);
1482
1483         board_idx++;
1484
1485         if (netif_msg_drv(&debug)) {
1486                 printk(KERN_INFO "%s Gigabit Ethernet driver %s loaded\n",
1487                        MODULENAME, RTL8169_VERSION);
1488         }
1489
1490         rc = rtl8169_init_board(pdev, &dev, &ioaddr);
1491         if (rc)
1492                 return rc;
1493
1494         tp = netdev_priv(dev);
1495         assert(ioaddr != NULL);
1496
1497         if (RTL_R8(PHYstatus) & TBI_Enable) {
1498                 tp->set_speed = rtl8169_set_speed_tbi;
1499                 tp->get_settings = rtl8169_gset_tbi;
1500                 tp->phy_reset_enable = rtl8169_tbi_reset_enable;
1501                 tp->phy_reset_pending = rtl8169_tbi_reset_pending;
1502                 tp->link_ok = rtl8169_tbi_link_ok;
1503
1504                 tp->phy_1000_ctrl_reg = PHY_Cap_1000_Full; /* Implied by TBI */
1505         } else {
1506                 tp->set_speed = rtl8169_set_speed_xmii;
1507                 tp->get_settings = rtl8169_gset_xmii;
1508                 tp->phy_reset_enable = rtl8169_xmii_reset_enable;
1509                 tp->phy_reset_pending = rtl8169_xmii_reset_pending;
1510                 tp->link_ok = rtl8169_xmii_link_ok;
1511         }
1512
1513         /* Get MAC address.  FIXME: read EEPROM */
1514         for (i = 0; i < MAC_ADDR_LEN; i++)
1515                 dev->dev_addr[i] = RTL_R8(MAC0 + i);
1516         memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
1517
1518         dev->open = rtl8169_open;
1519         dev->hard_start_xmit = rtl8169_start_xmit;
1520         dev->get_stats = rtl8169_get_stats;
1521         SET_ETHTOOL_OPS(dev, &rtl8169_ethtool_ops);
1522         dev->stop = rtl8169_close;
1523         dev->tx_timeout = rtl8169_tx_timeout;
1524         dev->set_multicast_list = rtl8169_set_rx_mode;
1525         dev->watchdog_timeo = RTL8169_TX_TIMEOUT;
1526         dev->irq = pdev->irq;
1527         dev->base_addr = (unsigned long) ioaddr;
1528         dev->change_mtu = rtl8169_change_mtu;
1529
1530 #ifdef CONFIG_R8169_NAPI
1531         dev->poll = rtl8169_poll;
1532         dev->weight = R8169_NAPI_WEIGHT;
1533 #endif
1534
1535 #ifdef CONFIG_R8169_VLAN
1536         dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
1537         dev->vlan_rx_register = rtl8169_vlan_rx_register;
1538         dev->vlan_rx_kill_vid = rtl8169_vlan_rx_kill_vid;
1539 #endif
1540
1541 #ifdef CONFIG_NET_POLL_CONTROLLER
1542         dev->poll_controller = rtl8169_netpoll;
1543 #endif
1544
1545         tp->intr_mask = 0xffff;
1546         tp->pci_dev = pdev;
1547         tp->mmio_addr = ioaddr;
1548
1549         spin_lock_init(&tp->lock);
1550
1551         rc = register_netdev(dev);
1552         if (rc) {
1553                 rtl8169_release_board(pdev, dev, ioaddr);
1554                 return rc;
1555         }
1556
1557         if (netif_msg_probe(tp)) {
1558                 printk(KERN_DEBUG "%s: Identified chip type is '%s'.\n",
1559                        dev->name, rtl_chip_info[tp->chipset].name);
1560         }
1561
1562         pci_set_drvdata(pdev, dev);
1563
1564         if (netif_msg_probe(tp)) {
1565                 printk(KERN_INFO "%s: %s at 0x%lx, "
1566                        "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
1567                        "IRQ %d\n",
1568                        dev->name,
1569                        rtl_chip_info[ent->driver_data].name,
1570                        dev->base_addr,
1571                        dev->dev_addr[0], dev->dev_addr[1],
1572                        dev->dev_addr[2], dev->dev_addr[3],
1573                        dev->dev_addr[4], dev->dev_addr[5], dev->irq);
1574         }
1575
1576         rtl8169_hw_phy_config(dev);
1577
1578         dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
1579         RTL_W8(0x82, 0x01);
1580
1581         if (tp->mac_version < RTL_GIGA_MAC_VER_E) {
1582                 dprintk("Set PCI Latency=0x40\n");
1583                 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x40);
1584         }
1585
1586         if (tp->mac_version == RTL_GIGA_MAC_VER_D) {
1587                 dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
1588                 RTL_W8(0x82, 0x01);
1589                 dprintk("Set PHY Reg 0x0bh = 0x00h\n");
1590                 mdio_write(ioaddr, 0x0b, 0x0000); //w 0x0b 15 0 0
1591         }
1592
1593         rtl8169_link_option(board_idx, &autoneg, &speed, &duplex);
1594
1595         rtl8169_set_speed(dev, autoneg, speed, duplex);
1596         
1597         if ((RTL_R8(PHYstatus) & TBI_Enable) && netif_msg_link(tp))
1598                 printk(KERN_INFO PFX "%s: TBI auto-negotiating\n", dev->name);
1599
1600         return 0;
1601 }
1602
1603 static void __devexit
1604 rtl8169_remove_one(struct pci_dev *pdev)
1605 {
1606         struct net_device *dev = pci_get_drvdata(pdev);
1607         struct rtl8169_private *tp = netdev_priv(dev);
1608
1609         assert(dev != NULL);
1610         assert(tp != NULL);
1611
1612         unregister_netdev(dev);
1613         rtl8169_release_board(pdev, dev, tp->mmio_addr);
1614         pci_set_drvdata(pdev, NULL);
1615 }
1616
1617 #ifdef CONFIG_PM
1618
1619 static int rtl8169_suspend(struct pci_dev *pdev, pm_message_t state)
1620 {
1621         struct net_device *dev = pci_get_drvdata(pdev);
1622         struct rtl8169_private *tp = netdev_priv(dev);
1623         void __iomem *ioaddr = tp->mmio_addr;
1624         unsigned long flags;
1625
1626         if (!netif_running(dev))
1627                 return 0;
1628         
1629         netif_device_detach(dev);
1630         netif_stop_queue(dev);
1631         spin_lock_irqsave(&tp->lock, flags);
1632
1633         /* Disable interrupts, stop Rx and Tx */
1634         RTL_W16(IntrMask, 0);
1635         RTL_W8(ChipCmd, 0);
1636                 
1637         /* Update the error counts. */
1638         tp->stats.rx_missed_errors += RTL_R32(RxMissed);
1639         RTL_W32(RxMissed, 0);
1640         spin_unlock_irqrestore(&tp->lock, flags);
1641         
1642         return 0;
1643 }
1644
1645 static int rtl8169_resume(struct pci_dev *pdev)
1646 {
1647         struct net_device *dev = pci_get_drvdata(pdev);
1648
1649         if (!netif_running(dev))
1650             return 0;
1651
1652         netif_device_attach(dev);
1653         rtl8169_hw_start(dev);
1654
1655         return 0;
1656 }
1657                                                                                 
1658 #endif /* CONFIG_PM */
1659
1660 static void rtl8169_set_rxbufsize(struct rtl8169_private *tp,
1661                                   struct net_device *dev)
1662 {
1663         unsigned int mtu = dev->mtu;
1664
1665         tp->rx_buf_sz = (mtu > RX_BUF_SIZE) ? mtu + ETH_HLEN + 8 : RX_BUF_SIZE;
1666 }
1667
1668 static int rtl8169_open(struct net_device *dev)
1669 {
1670         struct rtl8169_private *tp = netdev_priv(dev);
1671         struct pci_dev *pdev = tp->pci_dev;
1672         int retval;
1673
1674         rtl8169_set_rxbufsize(tp, dev);
1675
1676         retval =
1677             request_irq(dev->irq, rtl8169_interrupt, SA_SHIRQ, dev->name, dev);
1678         if (retval < 0)
1679                 goto out;
1680
1681         retval = -ENOMEM;
1682
1683         /*
1684          * Rx and Tx desscriptors needs 256 bytes alignment.
1685          * pci_alloc_consistent provides more.
1686          */
1687         tp->TxDescArray = pci_alloc_consistent(pdev, R8169_TX_RING_BYTES,
1688                                                &tp->TxPhyAddr);
1689         if (!tp->TxDescArray)
1690                 goto err_free_irq;
1691
1692         tp->RxDescArray = pci_alloc_consistent(pdev, R8169_RX_RING_BYTES,
1693                                                &tp->RxPhyAddr);
1694         if (!tp->RxDescArray)
1695                 goto err_free_tx;
1696
1697         retval = rtl8169_init_ring(dev);
1698         if (retval < 0)
1699                 goto err_free_rx;
1700
1701         INIT_WORK(&tp->task, NULL, dev);
1702
1703         rtl8169_hw_start(dev);
1704
1705         rtl8169_request_timer(dev);
1706
1707         rtl8169_check_link_status(dev, tp, tp->mmio_addr);
1708 out:
1709         return retval;
1710
1711 err_free_rx:
1712         pci_free_consistent(pdev, R8169_RX_RING_BYTES, tp->RxDescArray,
1713                             tp->RxPhyAddr);
1714 err_free_tx:
1715         pci_free_consistent(pdev, R8169_TX_RING_BYTES, tp->TxDescArray,
1716                             tp->TxPhyAddr);
1717 err_free_irq:
1718         free_irq(dev->irq, dev);
1719         goto out;
1720 }
1721
1722 static void rtl8169_hw_reset(void __iomem *ioaddr)
1723 {
1724         /* Disable interrupts */
1725         rtl8169_irq_mask_and_ack(ioaddr);
1726
1727         /* Reset the chipset */
1728         RTL_W8(ChipCmd, CmdReset);
1729
1730         /* PCI commit */
1731         RTL_R8(ChipCmd);
1732 }
1733
1734 static void
1735 rtl8169_hw_start(struct net_device *dev)
1736 {
1737         struct rtl8169_private *tp = netdev_priv(dev);
1738         void __iomem *ioaddr = tp->mmio_addr;
1739         u32 i;
1740
1741         /* Soft reset the chip. */
1742         RTL_W8(ChipCmd, CmdReset);
1743
1744         /* Check that the chip has finished the reset. */
1745         for (i = 1000; i > 0; i--) {
1746                 if ((RTL_R8(ChipCmd) & CmdReset) == 0)
1747                         break;
1748                 udelay(10);
1749         }
1750
1751         RTL_W8(Cfg9346, Cfg9346_Unlock);
1752         RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
1753         RTL_W8(EarlyTxThres, EarlyTxThld);
1754
1755         /* Low hurts. Let's disable the filtering. */
1756         RTL_W16(RxMaxSize, 16383);
1757
1758         /* Set Rx Config register */
1759         i = rtl8169_rx_config |
1760                 (RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask);
1761         RTL_W32(RxConfig, i);
1762
1763         /* Set DMA burst size and Interframe Gap Time */
1764         RTL_W32(TxConfig,
1765                 (TX_DMA_BURST << TxDMAShift) | (InterFrameGap <<
1766                                                 TxInterFrameGapShift));
1767         tp->cp_cmd |= RTL_R16(CPlusCmd);
1768         RTL_W16(CPlusCmd, tp->cp_cmd);
1769
1770         if ((tp->mac_version == RTL_GIGA_MAC_VER_D) ||
1771             (tp->mac_version == RTL_GIGA_MAC_VER_E)) {
1772                 dprintk(KERN_INFO PFX "Set MAC Reg C+CR Offset 0xE0. "
1773                         "Bit-3 and bit-14 MUST be 1\n");
1774                 tp->cp_cmd |= (1 << 14) | PCIMulRW;
1775                 RTL_W16(CPlusCmd, tp->cp_cmd);
1776         }
1777
1778         /*
1779          * Undocumented corner. Supposedly:
1780          * (TxTimer << 12) | (TxPackets << 8) | (RxTimer << 4) | RxPackets
1781          */
1782         RTL_W16(IntrMitigate, 0x0000);
1783
1784         RTL_W32(TxDescStartAddrLow, ((u64) tp->TxPhyAddr & DMA_32BIT_MASK));
1785         RTL_W32(TxDescStartAddrHigh, ((u64) tp->TxPhyAddr >> 32));
1786         RTL_W32(RxDescAddrLow, ((u64) tp->RxPhyAddr & DMA_32BIT_MASK));
1787         RTL_W32(RxDescAddrHigh, ((u64) tp->RxPhyAddr >> 32));
1788         RTL_W8(Cfg9346, Cfg9346_Lock);
1789         udelay(10);
1790
1791         RTL_W32(RxMissed, 0);
1792
1793         rtl8169_set_rx_mode(dev);
1794
1795         /* no early-rx interrupts */
1796         RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xF000);
1797
1798         /* Enable all known interrupts by setting the interrupt mask. */
1799         RTL_W16(IntrMask, rtl8169_intr_mask);
1800
1801         netif_start_queue(dev);
1802 }
1803
1804 static int rtl8169_change_mtu(struct net_device *dev, int new_mtu)
1805 {
1806         struct rtl8169_private *tp = netdev_priv(dev);
1807         int ret = 0;
1808
1809         if (new_mtu < ETH_ZLEN || new_mtu > SafeMtu)
1810                 return -EINVAL;
1811
1812         dev->mtu = new_mtu;
1813
1814         if (!netif_running(dev))
1815                 goto out;
1816
1817         rtl8169_down(dev);
1818
1819         rtl8169_set_rxbufsize(tp, dev);
1820
1821         ret = rtl8169_init_ring(dev);
1822         if (ret < 0)
1823                 goto out;
1824
1825         netif_poll_enable(dev);
1826
1827         rtl8169_hw_start(dev);
1828
1829         rtl8169_request_timer(dev);
1830
1831 out:
1832         return ret;
1833 }
1834
1835 static inline void rtl8169_make_unusable_by_asic(struct RxDesc *desc)
1836 {
1837         desc->addr = 0x0badbadbadbadbadull;
1838         desc->opts1 &= ~cpu_to_le32(DescOwn | RsvdMask);
1839 }
1840
1841 static void rtl8169_free_rx_skb(struct rtl8169_private *tp,
1842                                 struct sk_buff **sk_buff, struct RxDesc *desc)
1843 {
1844         struct pci_dev *pdev = tp->pci_dev;
1845
1846         pci_unmap_single(pdev, le64_to_cpu(desc->addr), tp->rx_buf_sz,
1847                          PCI_DMA_FROMDEVICE);
1848         dev_kfree_skb(*sk_buff);
1849         *sk_buff = NULL;
1850         rtl8169_make_unusable_by_asic(desc);
1851 }
1852
1853 static inline void rtl8169_mark_to_asic(struct RxDesc *desc, u32 rx_buf_sz)
1854 {
1855         u32 eor = le32_to_cpu(desc->opts1) & RingEnd;
1856
1857         desc->opts1 = cpu_to_le32(DescOwn | eor | rx_buf_sz);
1858 }
1859
1860 static inline void rtl8169_map_to_asic(struct RxDesc *desc, dma_addr_t mapping,
1861                                        u32 rx_buf_sz)
1862 {
1863         desc->addr = cpu_to_le64(mapping);
1864         wmb();
1865         rtl8169_mark_to_asic(desc, rx_buf_sz);
1866 }
1867
1868 static int rtl8169_alloc_rx_skb(struct pci_dev *pdev, struct sk_buff **sk_buff,
1869                                 struct RxDesc *desc, int rx_buf_sz)
1870 {
1871         struct sk_buff *skb;
1872         dma_addr_t mapping;
1873         int ret = 0;
1874
1875         skb = dev_alloc_skb(rx_buf_sz + NET_IP_ALIGN);
1876         if (!skb)
1877                 goto err_out;
1878
1879         skb_reserve(skb, NET_IP_ALIGN);
1880         *sk_buff = skb;
1881
1882         mapping = pci_map_single(pdev, skb->data, rx_buf_sz,
1883                                  PCI_DMA_FROMDEVICE);
1884
1885         rtl8169_map_to_asic(desc, mapping, rx_buf_sz);
1886
1887 out:
1888         return ret;
1889
1890 err_out:
1891         ret = -ENOMEM;
1892         rtl8169_make_unusable_by_asic(desc);
1893         goto out;
1894 }
1895
1896 static void rtl8169_rx_clear(struct rtl8169_private *tp)
1897 {
1898         int i;
1899
1900         for (i = 0; i < NUM_RX_DESC; i++) {
1901                 if (tp->Rx_skbuff[i]) {
1902                         rtl8169_free_rx_skb(tp, tp->Rx_skbuff + i,
1903                                             tp->RxDescArray + i);
1904                 }
1905         }
1906 }
1907
1908 static u32 rtl8169_rx_fill(struct rtl8169_private *tp, struct net_device *dev,
1909                            u32 start, u32 end)
1910 {
1911         u32 cur;
1912         
1913         for (cur = start; end - cur > 0; cur++) {
1914                 int ret, i = cur % NUM_RX_DESC;
1915
1916                 if (tp->Rx_skbuff[i])
1917                         continue;
1918                         
1919                 ret = rtl8169_alloc_rx_skb(tp->pci_dev, tp->Rx_skbuff + i,
1920                                            tp->RxDescArray + i, tp->rx_buf_sz);
1921                 if (ret < 0)
1922                         break;
1923         }
1924         return cur - start;
1925 }
1926
1927 static inline void rtl8169_mark_as_last_descriptor(struct RxDesc *desc)
1928 {
1929         desc->opts1 |= cpu_to_le32(RingEnd);
1930 }
1931
1932 static void rtl8169_init_ring_indexes(struct rtl8169_private *tp)
1933 {
1934         tp->dirty_tx = tp->dirty_rx = tp->cur_tx = tp->cur_rx = 0;
1935 }
1936
1937 static int rtl8169_init_ring(struct net_device *dev)
1938 {
1939         struct rtl8169_private *tp = netdev_priv(dev);
1940
1941         rtl8169_init_ring_indexes(tp);
1942
1943         memset(tp->tx_skb, 0x0, NUM_TX_DESC * sizeof(struct ring_info));
1944         memset(tp->Rx_skbuff, 0x0, NUM_RX_DESC * sizeof(struct sk_buff *));
1945
1946         if (rtl8169_rx_fill(tp, dev, 0, NUM_RX_DESC) != NUM_RX_DESC)
1947                 goto err_out;
1948
1949         rtl8169_mark_as_last_descriptor(tp->RxDescArray + NUM_RX_DESC - 1);
1950
1951         return 0;
1952
1953 err_out:
1954         rtl8169_rx_clear(tp);
1955         return -ENOMEM;
1956 }
1957
1958 static void rtl8169_unmap_tx_skb(struct pci_dev *pdev, struct ring_info *tx_skb,
1959                                  struct TxDesc *desc)
1960 {
1961         unsigned int len = tx_skb->len;
1962
1963         pci_unmap_single(pdev, le64_to_cpu(desc->addr), len, PCI_DMA_TODEVICE);
1964         desc->opts1 = 0x00;
1965         desc->opts2 = 0x00;
1966         desc->addr = 0x00;
1967         tx_skb->len = 0;
1968 }
1969
1970 static void rtl8169_tx_clear(struct rtl8169_private *tp)
1971 {
1972         unsigned int i;
1973
1974         for (i = tp->dirty_tx; i < tp->dirty_tx + NUM_TX_DESC; i++) {
1975                 unsigned int entry = i % NUM_TX_DESC;
1976                 struct ring_info *tx_skb = tp->tx_skb + entry;
1977                 unsigned int len = tx_skb->len;
1978
1979                 if (len) {
1980                         struct sk_buff *skb = tx_skb->skb;
1981
1982                         rtl8169_unmap_tx_skb(tp->pci_dev, tx_skb,
1983                                              tp->TxDescArray + entry);
1984                         if (skb) {
1985                                 dev_kfree_skb(skb);
1986                                 tx_skb->skb = NULL;
1987                         }
1988                         tp->stats.tx_dropped++;
1989                 }
1990         }
1991         tp->cur_tx = tp->dirty_tx = 0;
1992 }
1993
1994 static void rtl8169_schedule_work(struct net_device *dev, void (*task)(void *))
1995 {
1996         struct rtl8169_private *tp = netdev_priv(dev);
1997
1998         PREPARE_WORK(&tp->task, task, dev);
1999         schedule_delayed_work(&tp->task, 4);
2000 }
2001
2002 static void rtl8169_wait_for_quiescence(struct net_device *dev)
2003 {
2004         struct rtl8169_private *tp = netdev_priv(dev);
2005         void __iomem *ioaddr = tp->mmio_addr;
2006
2007         synchronize_irq(dev->irq);
2008
2009         /* Wait for any pending NAPI task to complete */
2010         netif_poll_disable(dev);
2011
2012         rtl8169_irq_mask_and_ack(ioaddr);
2013
2014         netif_poll_enable(dev);
2015 }
2016
2017 static void rtl8169_reinit_task(void *_data)
2018 {
2019         struct net_device *dev = _data;
2020         int ret;
2021
2022         if (netif_running(dev)) {
2023                 rtl8169_wait_for_quiescence(dev);
2024                 rtl8169_close(dev);
2025         }
2026
2027         ret = rtl8169_open(dev);
2028         if (unlikely(ret < 0)) {
2029                 if (net_ratelimit()) {
2030                         struct rtl8169_private *tp = netdev_priv(dev);
2031
2032                         if (netif_msg_drv(tp)) {
2033                                 printk(PFX KERN_ERR
2034                                        "%s: reinit failure (status = %d)."
2035                                        " Rescheduling.\n", dev->name, ret);
2036                         }
2037                 }
2038                 rtl8169_schedule_work(dev, rtl8169_reinit_task);
2039         }
2040 }
2041
2042 static void rtl8169_reset_task(void *_data)
2043 {
2044         struct net_device *dev = _data;
2045         struct rtl8169_private *tp = netdev_priv(dev);
2046
2047         if (!netif_running(dev))
2048                 return;
2049
2050         rtl8169_wait_for_quiescence(dev);
2051
2052         rtl8169_rx_interrupt(dev, tp, tp->mmio_addr);
2053         rtl8169_tx_clear(tp);
2054
2055         if (tp->dirty_rx == tp->cur_rx) {
2056                 rtl8169_init_ring_indexes(tp);
2057                 rtl8169_hw_start(dev);
2058                 netif_wake_queue(dev);
2059         } else {
2060                 if (net_ratelimit()) {
2061                         struct rtl8169_private *tp = netdev_priv(dev);
2062
2063                         if (netif_msg_intr(tp)) {
2064                                 printk(PFX KERN_EMERG
2065                                        "%s: Rx buffers shortage\n", dev->name);
2066                         }
2067                 }
2068                 rtl8169_schedule_work(dev, rtl8169_reset_task);
2069         }
2070 }
2071
2072 static void rtl8169_tx_timeout(struct net_device *dev)
2073 {
2074         struct rtl8169_private *tp = netdev_priv(dev);
2075
2076         rtl8169_hw_reset(tp->mmio_addr);
2077
2078         /* Let's wait a bit while any (async) irq lands on */
2079         rtl8169_schedule_work(dev, rtl8169_reset_task);
2080 }
2081
2082 static int rtl8169_xmit_frags(struct rtl8169_private *tp, struct sk_buff *skb,
2083                               u32 opts1)
2084 {
2085         struct skb_shared_info *info = skb_shinfo(skb);
2086         unsigned int cur_frag, entry;
2087         struct TxDesc *txd;
2088
2089         entry = tp->cur_tx;
2090         for (cur_frag = 0; cur_frag < info->nr_frags; cur_frag++) {
2091                 skb_frag_t *frag = info->frags + cur_frag;
2092                 dma_addr_t mapping;
2093                 u32 status, len;
2094                 void *addr;
2095
2096                 entry = (entry + 1) % NUM_TX_DESC;
2097
2098                 txd = tp->TxDescArray + entry;
2099                 len = frag->size;
2100                 addr = ((void *) page_address(frag->page)) + frag->page_offset;
2101                 mapping = pci_map_single(tp->pci_dev, addr, len, PCI_DMA_TODEVICE);
2102
2103                 /* anti gcc 2.95.3 bugware (sic) */
2104                 status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC));
2105
2106                 txd->opts1 = cpu_to_le32(status);
2107                 txd->addr = cpu_to_le64(mapping);
2108
2109                 tp->tx_skb[entry].len = len;
2110         }
2111
2112         if (cur_frag) {
2113                 tp->tx_skb[entry].skb = skb;
2114                 txd->opts1 |= cpu_to_le32(LastFrag);
2115         }
2116
2117         return cur_frag;
2118 }
2119
2120 static inline u32 rtl8169_tso_csum(struct sk_buff *skb, struct net_device *dev)
2121 {
2122         if (dev->features & NETIF_F_TSO) {
2123                 u32 mss = skb_shinfo(skb)->tso_size;
2124
2125                 if (mss)
2126                         return LargeSend | ((mss & MSSMask) << MSSShift);
2127         }
2128         if (skb->ip_summed == CHECKSUM_HW) {
2129                 const struct iphdr *ip = skb->nh.iph;
2130
2131                 if (ip->protocol == IPPROTO_TCP)
2132                         return IPCS | TCPCS;
2133                 else if (ip->protocol == IPPROTO_UDP)
2134                         return IPCS | UDPCS;
2135                 WARN_ON(1);     /* we need a WARN() */
2136         }
2137         return 0;
2138 }
2139
2140 static int rtl8169_start_xmit(struct sk_buff *skb, struct net_device *dev)
2141 {
2142         struct rtl8169_private *tp = netdev_priv(dev);
2143         unsigned int frags, entry = tp->cur_tx % NUM_TX_DESC;
2144         struct TxDesc *txd = tp->TxDescArray + entry;
2145         void __iomem *ioaddr = tp->mmio_addr;
2146         dma_addr_t mapping;
2147         u32 status, len;
2148         u32 opts1;
2149         int ret = 0;
2150         
2151         if (unlikely(TX_BUFFS_AVAIL(tp) < skb_shinfo(skb)->nr_frags)) {
2152                 if (netif_msg_drv(tp)) {
2153                         printk(KERN_ERR
2154                                "%s: BUG! Tx Ring full when queue awake!\n",
2155                                dev->name);
2156                 }
2157                 goto err_stop;
2158         }
2159
2160         if (unlikely(le32_to_cpu(txd->opts1) & DescOwn))
2161                 goto err_stop;
2162
2163         opts1 = DescOwn | rtl8169_tso_csum(skb, dev);
2164
2165         frags = rtl8169_xmit_frags(tp, skb, opts1);
2166         if (frags) {
2167                 len = skb_headlen(skb);
2168                 opts1 |= FirstFrag;
2169         } else {
2170                 len = skb->len;
2171
2172                 if (unlikely(len < ETH_ZLEN)) {
2173                         skb = skb_padto(skb, ETH_ZLEN);
2174                         if (!skb)
2175                                 goto err_update_stats;
2176                         len = ETH_ZLEN;
2177                 }
2178
2179                 opts1 |= FirstFrag | LastFrag;
2180                 tp->tx_skb[entry].skb = skb;
2181         }
2182
2183         mapping = pci_map_single(tp->pci_dev, skb->data, len, PCI_DMA_TODEVICE);
2184
2185         tp->tx_skb[entry].len = len;
2186         txd->addr = cpu_to_le64(mapping);
2187         txd->opts2 = cpu_to_le32(rtl8169_tx_vlan_tag(tp, skb));
2188
2189         wmb();
2190
2191         /* anti gcc 2.95.3 bugware (sic) */
2192         status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC));
2193         txd->opts1 = cpu_to_le32(status);
2194
2195         dev->trans_start = jiffies;
2196
2197         tp->cur_tx += frags + 1;
2198
2199         smp_wmb();
2200
2201         RTL_W8(TxPoll, 0x40);   /* set polling bit */
2202
2203         if (TX_BUFFS_AVAIL(tp) < MAX_SKB_FRAGS) {
2204                 netif_stop_queue(dev);
2205                 smp_rmb();
2206                 if (TX_BUFFS_AVAIL(tp) >= MAX_SKB_FRAGS)
2207                         netif_wake_queue(dev);
2208         }
2209
2210 out:
2211         return ret;
2212
2213 err_stop:
2214         netif_stop_queue(dev);
2215         ret = 1;
2216 err_update_stats:
2217         tp->stats.tx_dropped++;
2218         goto out;
2219 }
2220
2221 static void rtl8169_pcierr_interrupt(struct net_device *dev)
2222 {
2223         struct rtl8169_private *tp = netdev_priv(dev);
2224         struct pci_dev *pdev = tp->pci_dev;
2225         void __iomem *ioaddr = tp->mmio_addr;
2226         u16 pci_status, pci_cmd;
2227
2228         pci_read_config_word(pdev, PCI_COMMAND, &pci_cmd);
2229         pci_read_config_word(pdev, PCI_STATUS, &pci_status);
2230
2231         if (netif_msg_intr(tp)) {
2232                 printk(KERN_ERR
2233                        "%s: PCI error (cmd = 0x%04x, status = 0x%04x).\n",
2234                        dev->name, pci_cmd, pci_status);
2235         }
2236
2237         /*
2238          * The recovery sequence below admits a very elaborated explanation:
2239          * - it seems to work;
2240          * - I did not see what else could be done.
2241          *
2242          * Feel free to adjust to your needs.
2243          */
2244         pci_write_config_word(pdev, PCI_COMMAND,
2245                               pci_cmd | PCI_COMMAND_SERR | PCI_COMMAND_PARITY);
2246
2247         pci_write_config_word(pdev, PCI_STATUS,
2248                 pci_status & (PCI_STATUS_DETECTED_PARITY |
2249                 PCI_STATUS_SIG_SYSTEM_ERROR | PCI_STATUS_REC_MASTER_ABORT |
2250                 PCI_STATUS_REC_TARGET_ABORT | PCI_STATUS_SIG_TARGET_ABORT));
2251
2252         /* The infamous DAC f*ckup only happens at boot time */
2253         if ((tp->cp_cmd & PCIDAC) && !tp->dirty_rx && !tp->cur_rx) {
2254                 if (netif_msg_intr(tp))
2255                         printk(KERN_INFO "%s: disabling PCI DAC.\n", dev->name);
2256                 tp->cp_cmd &= ~PCIDAC;
2257                 RTL_W16(CPlusCmd, tp->cp_cmd);
2258                 dev->features &= ~NETIF_F_HIGHDMA;
2259                 rtl8169_schedule_work(dev, rtl8169_reinit_task);
2260         }
2261
2262         rtl8169_hw_reset(ioaddr);
2263 }
2264
2265 static void
2266 rtl8169_tx_interrupt(struct net_device *dev, struct rtl8169_private *tp,
2267                      void __iomem *ioaddr)
2268 {
2269         unsigned int dirty_tx, tx_left;
2270
2271         assert(dev != NULL);
2272         assert(tp != NULL);
2273         assert(ioaddr != NULL);
2274
2275         dirty_tx = tp->dirty_tx;
2276         smp_rmb();
2277         tx_left = tp->cur_tx - dirty_tx;
2278
2279         while (tx_left > 0) {
2280                 unsigned int entry = dirty_tx % NUM_TX_DESC;
2281                 struct ring_info *tx_skb = tp->tx_skb + entry;
2282                 u32 len = tx_skb->len;
2283                 u32 status;
2284
2285                 rmb();
2286                 status = le32_to_cpu(tp->TxDescArray[entry].opts1);
2287                 if (status & DescOwn)
2288                         break;
2289
2290                 tp->stats.tx_bytes += len;
2291                 tp->stats.tx_packets++;
2292
2293                 rtl8169_unmap_tx_skb(tp->pci_dev, tx_skb, tp->TxDescArray + entry);
2294
2295                 if (status & LastFrag) {
2296                         dev_kfree_skb_irq(tx_skb->skb);
2297                         tx_skb->skb = NULL;
2298                 }
2299                 dirty_tx++;
2300                 tx_left--;
2301         }
2302
2303         if (tp->dirty_tx != dirty_tx) {
2304                 tp->dirty_tx = dirty_tx;
2305                 smp_wmb();
2306                 if (netif_queue_stopped(dev) &&
2307                     (TX_BUFFS_AVAIL(tp) >= MAX_SKB_FRAGS)) {
2308                         netif_wake_queue(dev);
2309                 }
2310         }
2311 }
2312
2313 static inline int rtl8169_fragmented_frame(u32 status)
2314 {
2315         return (status & (FirstFrag | LastFrag)) != (FirstFrag | LastFrag);
2316 }
2317
2318 static inline void rtl8169_rx_csum(struct sk_buff *skb, struct RxDesc *desc)
2319 {
2320         u32 opts1 = le32_to_cpu(desc->opts1);
2321         u32 status = opts1 & RxProtoMask;
2322
2323         if (((status == RxProtoTCP) && !(opts1 & TCPFail)) ||
2324             ((status == RxProtoUDP) && !(opts1 & UDPFail)) ||
2325             ((status == RxProtoIP) && !(opts1 & IPFail)))
2326                 skb->ip_summed = CHECKSUM_UNNECESSARY;
2327         else
2328                 skb->ip_summed = CHECKSUM_NONE;
2329 }
2330
2331 static inline int rtl8169_try_rx_copy(struct sk_buff **sk_buff, int pkt_size,
2332                                       struct RxDesc *desc, int rx_buf_sz)
2333 {
2334         int ret = -1;
2335
2336         if (pkt_size < rx_copybreak) {
2337                 struct sk_buff *skb;
2338
2339                 skb = dev_alloc_skb(pkt_size + NET_IP_ALIGN);
2340                 if (skb) {
2341                         skb_reserve(skb, NET_IP_ALIGN);
2342                         eth_copy_and_sum(skb, sk_buff[0]->data, pkt_size, 0);
2343                         *sk_buff = skb;
2344                         rtl8169_mark_to_asic(desc, rx_buf_sz);
2345                         ret = 0;
2346                 }
2347         }
2348         return ret;
2349 }
2350
2351 static int
2352 rtl8169_rx_interrupt(struct net_device *dev, struct rtl8169_private *tp,
2353                      void __iomem *ioaddr)
2354 {
2355         unsigned int cur_rx, rx_left;
2356         unsigned int delta, count;
2357
2358         assert(dev != NULL);
2359         assert(tp != NULL);
2360         assert(ioaddr != NULL);
2361
2362         cur_rx = tp->cur_rx;
2363         rx_left = NUM_RX_DESC + tp->dirty_rx - cur_rx;
2364         rx_left = rtl8169_rx_quota(rx_left, (u32) dev->quota);
2365
2366         for (; rx_left > 0; rx_left--, cur_rx++) {
2367                 unsigned int entry = cur_rx % NUM_RX_DESC;
2368                 struct RxDesc *desc = tp->RxDescArray + entry;
2369                 u32 status;
2370
2371                 rmb();
2372                 status = le32_to_cpu(desc->opts1);
2373
2374                 if (status & DescOwn)
2375                         break;
2376                 if (unlikely(status & RxRES)) {
2377                         if (netif_msg_rx_err(tp)) {
2378                                 printk(KERN_INFO
2379                                        "%s: Rx ERROR. status = %08x\n",
2380                                        dev->name, status);
2381                         }
2382                         tp->stats.rx_errors++;
2383                         if (status & (RxRWT | RxRUNT))
2384                                 tp->stats.rx_length_errors++;
2385                         if (status & RxCRC)
2386                                 tp->stats.rx_crc_errors++;
2387                         rtl8169_mark_to_asic(desc, tp->rx_buf_sz);
2388                 } else {
2389                         struct sk_buff *skb = tp->Rx_skbuff[entry];
2390                         int pkt_size = (status & 0x00001FFF) - 4;
2391                         void (*pci_action)(struct pci_dev *, dma_addr_t,
2392                                 size_t, int) = pci_dma_sync_single_for_device;
2393
2394                         /*
2395                          * The driver does not support incoming fragmented
2396                          * frames. They are seen as a symptom of over-mtu
2397                          * sized frames.
2398                          */
2399                         if (unlikely(rtl8169_fragmented_frame(status))) {
2400                                 tp->stats.rx_dropped++;
2401                                 tp->stats.rx_length_errors++;
2402                                 rtl8169_mark_to_asic(desc, tp->rx_buf_sz);
2403                                 continue;
2404                         }
2405
2406                         rtl8169_rx_csum(skb, desc);
2407                         
2408                         pci_dma_sync_single_for_cpu(tp->pci_dev,
2409                                 le64_to_cpu(desc->addr), tp->rx_buf_sz,
2410                                 PCI_DMA_FROMDEVICE);
2411
2412                         if (rtl8169_try_rx_copy(&skb, pkt_size, desc,
2413                                                 tp->rx_buf_sz)) {
2414                                 pci_action = pci_unmap_single;
2415                                 tp->Rx_skbuff[entry] = NULL;
2416                         }
2417
2418                         pci_action(tp->pci_dev, le64_to_cpu(desc->addr),
2419                                    tp->rx_buf_sz, PCI_DMA_FROMDEVICE);
2420
2421                         skb->dev = dev;
2422                         skb_put(skb, pkt_size);
2423                         skb->protocol = eth_type_trans(skb, dev);
2424
2425                         if (rtl8169_rx_vlan_skb(tp, desc, skb) < 0)
2426                                 rtl8169_rx_skb(skb);
2427
2428                         dev->last_rx = jiffies;
2429                         tp->stats.rx_bytes += pkt_size;
2430                         tp->stats.rx_packets++;
2431                 }
2432         }
2433
2434         count = cur_rx - tp->cur_rx;
2435         tp->cur_rx = cur_rx;
2436
2437         delta = rtl8169_rx_fill(tp, dev, tp->dirty_rx, tp->cur_rx);
2438         if (!delta && count && netif_msg_intr(tp))
2439                 printk(KERN_INFO "%s: no Rx buffer allocated\n", dev->name);
2440         tp->dirty_rx += delta;
2441
2442         /*
2443          * FIXME: until there is periodic timer to try and refill the ring,
2444          * a temporary shortage may definitely kill the Rx process.
2445          * - disable the asic to try and avoid an overflow and kick it again
2446          *   after refill ?
2447          * - how do others driver handle this condition (Uh oh...).
2448          */
2449         if ((tp->dirty_rx + NUM_RX_DESC == tp->cur_rx) && netif_msg_intr(tp))
2450                 printk(KERN_EMERG "%s: Rx buffers exhausted\n", dev->name);
2451
2452         return count;
2453 }
2454
2455 /* The interrupt handler does all of the Rx thread work and cleans up after the Tx thread. */
2456 static irqreturn_t
2457 rtl8169_interrupt(int irq, void *dev_instance, struct pt_regs *regs)
2458 {
2459         struct net_device *dev = (struct net_device *) dev_instance;
2460         struct rtl8169_private *tp = netdev_priv(dev);
2461         int boguscnt = max_interrupt_work;
2462         void __iomem *ioaddr = tp->mmio_addr;
2463         int status;
2464         int handled = 0;
2465
2466         do {
2467                 status = RTL_R16(IntrStatus);
2468
2469                 /* hotplug/major error/no more work/shared irq */
2470                 if ((status == 0xFFFF) || !status)
2471                         break;
2472
2473                 handled = 1;
2474
2475                 if (unlikely(!netif_running(dev))) {
2476                         rtl8169_asic_down(ioaddr);
2477                         goto out;
2478                 }
2479
2480                 status &= tp->intr_mask;
2481                 RTL_W16(IntrStatus,
2482                         (status & RxFIFOOver) ? (status | RxOverflow) : status);
2483
2484                 if (!(status & rtl8169_intr_mask))
2485                         break;
2486
2487                 if (unlikely(status & SYSErr)) {
2488                         rtl8169_pcierr_interrupt(dev);
2489                         break;
2490                 }
2491
2492                 if (status & LinkChg)
2493                         rtl8169_check_link_status(dev, tp, ioaddr);
2494
2495 #ifdef CONFIG_R8169_NAPI
2496                 RTL_W16(IntrMask, rtl8169_intr_mask & ~rtl8169_napi_event);
2497                 tp->intr_mask = ~rtl8169_napi_event;
2498
2499                 if (likely(netif_rx_schedule_prep(dev)))
2500                         __netif_rx_schedule(dev);
2501                 else if (netif_msg_intr(tp)) {
2502                         printk(KERN_INFO "%s: interrupt %04x taken in poll\n",
2503                                dev->name, status);      
2504                 }
2505                 break;
2506 #else
2507                 /* Rx interrupt */
2508                 if (status & (RxOK | RxOverflow | RxFIFOOver)) {
2509                         rtl8169_rx_interrupt(dev, tp, ioaddr);
2510                 }
2511                 /* Tx interrupt */
2512                 if (status & (TxOK | TxErr))
2513                         rtl8169_tx_interrupt(dev, tp, ioaddr);
2514 #endif
2515
2516                 boguscnt--;
2517         } while (boguscnt > 0);
2518
2519         if (boguscnt <= 0) {
2520                 if (net_ratelimit() && netif_msg_intr(tp)) {
2521                         printk(KERN_WARNING
2522                                "%s: Too much work at interrupt!\n", dev->name);
2523                 }
2524                 /* Clear all interrupt sources. */
2525                 RTL_W16(IntrStatus, 0xffff);
2526         }
2527 out:
2528         return IRQ_RETVAL(handled);
2529 }
2530
2531 #ifdef CONFIG_R8169_NAPI
2532 static int rtl8169_poll(struct net_device *dev, int *budget)
2533 {
2534         unsigned int work_done, work_to_do = min(*budget, dev->quota);
2535         struct rtl8169_private *tp = netdev_priv(dev);
2536         void __iomem *ioaddr = tp->mmio_addr;
2537
2538         work_done = rtl8169_rx_interrupt(dev, tp, ioaddr);
2539         rtl8169_tx_interrupt(dev, tp, ioaddr);
2540
2541         *budget -= work_done;
2542         dev->quota -= work_done;
2543
2544         if (work_done < work_to_do) {
2545                 netif_rx_complete(dev);
2546                 tp->intr_mask = 0xffff;
2547                 /*
2548                  * 20040426: the barrier is not strictly required but the
2549                  * behavior of the irq handler could be less predictable
2550                  * without it. Btw, the lack of flush for the posted pci
2551                  * write is safe - FR
2552                  */
2553                 smp_wmb();
2554                 RTL_W16(IntrMask, rtl8169_intr_mask);
2555         }
2556
2557         return (work_done >= work_to_do);
2558 }
2559 #endif
2560
2561 static void rtl8169_down(struct net_device *dev)
2562 {
2563         struct rtl8169_private *tp = netdev_priv(dev);
2564         void __iomem *ioaddr = tp->mmio_addr;
2565         unsigned int poll_locked = 0;
2566
2567         rtl8169_delete_timer(dev);
2568
2569         netif_stop_queue(dev);
2570
2571         flush_scheduled_work();
2572
2573 core_down:
2574         spin_lock_irq(&tp->lock);
2575
2576         rtl8169_asic_down(ioaddr);
2577
2578         /* Update the error counts. */
2579         tp->stats.rx_missed_errors += RTL_R32(RxMissed);
2580         RTL_W32(RxMissed, 0);
2581
2582         spin_unlock_irq(&tp->lock);
2583
2584         synchronize_irq(dev->irq);
2585
2586         if (!poll_locked) {
2587                 netif_poll_disable(dev);
2588                 poll_locked++;
2589         }
2590
2591         /* Give a racing hard_start_xmit a few cycles to complete. */
2592         synchronize_sched();  /* FIXME: should this be synchronize_irq()? */
2593
2594         /*
2595          * And now for the 50k$ question: are IRQ disabled or not ?
2596          *
2597          * Two paths lead here:
2598          * 1) dev->close
2599          *    -> netif_running() is available to sync the current code and the
2600          *       IRQ handler. See rtl8169_interrupt for details.
2601          * 2) dev->change_mtu
2602          *    -> rtl8169_poll can not be issued again and re-enable the
2603          *       interruptions. Let's simply issue the IRQ down sequence again.
2604          */
2605         if (RTL_R16(IntrMask))
2606                 goto core_down;
2607
2608         rtl8169_tx_clear(tp);
2609
2610         rtl8169_rx_clear(tp);
2611 }
2612
2613 static int rtl8169_close(struct net_device *dev)
2614 {
2615         struct rtl8169_private *tp = netdev_priv(dev);
2616         struct pci_dev *pdev = tp->pci_dev;
2617
2618         rtl8169_down(dev);
2619
2620         free_irq(dev->irq, dev);
2621
2622         netif_poll_enable(dev);
2623
2624         pci_free_consistent(pdev, R8169_RX_RING_BYTES, tp->RxDescArray,
2625                             tp->RxPhyAddr);
2626         pci_free_consistent(pdev, R8169_TX_RING_BYTES, tp->TxDescArray,
2627                             tp->TxPhyAddr);
2628         tp->TxDescArray = NULL;
2629         tp->RxDescArray = NULL;
2630
2631         return 0;
2632 }
2633
2634 static void
2635 rtl8169_set_rx_mode(struct net_device *dev)
2636 {
2637         struct rtl8169_private *tp = netdev_priv(dev);
2638         void __iomem *ioaddr = tp->mmio_addr;
2639         unsigned long flags;
2640         u32 mc_filter[2];       /* Multicast hash filter */
2641         int i, rx_mode;
2642         u32 tmp = 0;
2643
2644         if (dev->flags & IFF_PROMISC) {
2645                 /* Unconditionally log net taps. */
2646                 if (netif_msg_link(tp)) {
2647                         printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n",
2648                                dev->name);
2649                 }
2650                 rx_mode =
2651                     AcceptBroadcast | AcceptMulticast | AcceptMyPhys |
2652                     AcceptAllPhys;
2653                 mc_filter[1] = mc_filter[0] = 0xffffffff;
2654         } else if ((dev->mc_count > multicast_filter_limit)
2655                    || (dev->flags & IFF_ALLMULTI)) {
2656                 /* Too many to filter perfectly -- accept all multicasts. */
2657                 rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
2658                 mc_filter[1] = mc_filter[0] = 0xffffffff;
2659         } else {
2660                 struct dev_mc_list *mclist;
2661                 rx_mode = AcceptBroadcast | AcceptMyPhys;
2662                 mc_filter[1] = mc_filter[0] = 0;
2663                 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
2664                      i++, mclist = mclist->next) {
2665                         int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
2666                         mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
2667                         rx_mode |= AcceptMulticast;
2668                 }
2669         }
2670
2671         spin_lock_irqsave(&tp->lock, flags);
2672
2673         tmp = rtl8169_rx_config | rx_mode |
2674               (RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask);
2675
2676         RTL_W32(RxConfig, tmp);
2677         RTL_W32(MAR0 + 0, mc_filter[0]);
2678         RTL_W32(MAR0 + 4, mc_filter[1]);
2679
2680         spin_unlock_irqrestore(&tp->lock, flags);
2681 }
2682
2683 /**
2684  *  rtl8169_get_stats - Get rtl8169 read/write statistics
2685  *  @dev: The Ethernet Device to get statistics for
2686  *
2687  *  Get TX/RX statistics for rtl8169
2688  */
2689 static struct net_device_stats *rtl8169_get_stats(struct net_device *dev)
2690 {
2691         struct rtl8169_private *tp = netdev_priv(dev);
2692         void __iomem *ioaddr = tp->mmio_addr;
2693         unsigned long flags;
2694
2695         if (netif_running(dev)) {
2696                 spin_lock_irqsave(&tp->lock, flags);
2697                 tp->stats.rx_missed_errors += RTL_R32(RxMissed);
2698                 RTL_W32(RxMissed, 0);
2699                 spin_unlock_irqrestore(&tp->lock, flags);
2700         }
2701                 
2702         return &tp->stats;
2703 }
2704
2705 static struct pci_driver rtl8169_pci_driver = {
2706         .name           = MODULENAME,
2707         .id_table       = rtl8169_pci_tbl,
2708         .probe          = rtl8169_init_one,
2709         .remove         = __devexit_p(rtl8169_remove_one),
2710 #ifdef CONFIG_PM
2711         .suspend        = rtl8169_suspend,
2712         .resume         = rtl8169_resume,
2713 #endif
2714 };
2715
2716 static int __init
2717 rtl8169_init_module(void)
2718 {
2719         return pci_module_init(&rtl8169_pci_driver);
2720 }
2721
2722 static void __exit
2723 rtl8169_cleanup_module(void)
2724 {
2725         pci_unregister_driver(&rtl8169_pci_driver);
2726 }
2727
2728 module_init(rtl8169_init_module);
2729 module_exit(rtl8169_cleanup_module);