1 /* ----------------------------------------------------------------------------
2 Linux PCMCIA ethernet adapter driver for the New Media Ethernet LAN.
3 nmclan_cs.c,v 0.16 1995/07/01 06:42:17 rpao Exp rpao
5 The Ethernet LAN uses the Advanced Micro Devices (AMD) Am79C940 Media
6 Access Controller for Ethernet (MACE). It is essentially the Am2150
7 PCMCIA Ethernet card contained in the Am2150 Demo Kit.
9 Written by Roger C. Pao <rpao@paonet.org>
10 Copyright 1995 Roger C. Pao
11 Linux 2.5 cleanups Copyright Red Hat 2003
13 This software may be used and distributed according to the terms of
14 the GNU General Public License.
16 Ported to Linux 1.3.* network driver environment by
17 Matti Aarnio <mea@utu.fi>
21 Am2150 Technical Reference Manual, Revision 1.0, August 17, 1993
22 Am79C940 (MACE) Data Sheet, 1994
23 Am79C90 (C-LANCE) Data Sheet, 1994
24 Linux PCMCIA Programmer's Guide v1.17
25 /usr/src/linux/net/inet/dev.c, Linux kernel 1.2.8
27 Eric Mears, New Media Corporation
28 Tom Pollard, New Media Corporation
29 Dean Siasoyco, New Media Corporation
30 Ken Lesniak, Silicon Graphics, Inc. <lesniak@boston.sgi.com>
31 Donald Becker <becker@scyld.com>
32 David Hinds <dahinds@users.sourceforge.net>
34 The Linux client driver is based on the 3c589_cs.c client driver by
37 The Linux network driver outline is based on the 3c589_cs.c driver,
38 the 8390.c driver, and the example skeleton.c kernel code, which are
41 The Am2150 network driver hardware interface code is based on the
42 OS/9000 driver for the New Media Ethernet LAN by Eric Mears.
44 Special thanks for testing and help in debugging this driver goes
47 -------------------------------------------------------------------------------
48 Driver Notes and Issues
49 -------------------------------------------------------------------------------
51 1. Developed on a Dell 320SLi
52 PCMCIA Card Services 2.6.2
53 Linux dell 1.2.10 #1 Thu Jun 29 20:23:41 PDT 1995 i386
55 2. rc.pcmcia may require loading pcmcia_core with io_speed=300:
56 'insmod pcmcia_core.o io_speed=300'.
57 This will avoid problems with fast systems which causes rx_framecnt
58 to return random values.
60 3. If hot extraction does not work for you, use 'ifconfig eth0 down'
63 4. There is a bad slow-down problem in this driver.
65 5. Future: Multicast processing. In the meantime, do _not_ compile your
66 kernel with multicast ip enabled.
68 -------------------------------------------------------------------------------
70 -------------------------------------------------------------------------------
72 * 2.5.75-ac1 2003/07/11 Alan Cox <alan@redhat.com>
73 * Fixed hang on card eject as we probe it
74 * Cleaned up to use new style locking.
76 * Revision 0.16 1995/07/01 06:42:17 rpao
77 * Bug fix: nmclan_reset() called CardServices incorrectly.
79 * Revision 0.15 1995/05/24 08:09:47 rpao
80 * Re-implement MULTI_TX dev->tbusy handling.
82 * Revision 0.14 1995/05/23 03:19:30 rpao
83 * Added, in nmclan_config(), "tuple.Attributes = 0;".
84 * Modified MACE ID check to ignore chip revision level.
85 * Avoid tx_free_frames race condition between _start_xmit and _interrupt.
87 * Revision 0.13 1995/05/18 05:56:34 rpao
89 * Bug fix: nmclan_reset did not enable TX and RX: call restore_multicast_list.
90 * Bug fix: mace_interrupt checks ~MACE_IMR_DEFAULT. Fixes driver lockup.
92 * Revision 0.12 1995/05/14 00:12:23 rpao
93 * Statistics overhaul.
97 Bug fix: MACE statistics counters used wrong I/O ports.
98 Bug fix: mace_interrupt() needed to allow statistics to be
99 processed without RX or TX interrupts pending.
101 Multiple transmit request processing.
102 Modified statistics to use MACE counters where possible.
103 95/05/10 rpao V0.09 Bug fix: Must use IO_DATA_PATH_WIDTH_AUTO.
106 Bug fix: Make all non-exported functions private by using
108 Bug fix: Test IntrCnt _before_ reading MACE_IR.
109 95/05/10 rpao V0.07 Statistics.
110 95/05/09 rpao V0.06 Fix rx_framecnt problem by addition of PCIC wait states.
112 ---------------------------------------------------------------------------- */
114 #define DRV_NAME "nmclan_cs"
115 #define DRV_VERSION "0.16"
118 /* ----------------------------------------------------------------------------
119 Conditional Compilation Options
120 ---------------------------------------------------------------------------- */
123 #define RESET_ON_TIMEOUT 1
124 #define TX_INTERRUPTABLE 1
125 #define RESET_XILINX 0
127 /* ----------------------------------------------------------------------------
129 ---------------------------------------------------------------------------- */
131 #include <linux/module.h>
132 #include <linux/kernel.h>
133 #include <linux/init.h>
134 #include <linux/ptrace.h>
135 #include <linux/slab.h>
136 #include <linux/string.h>
137 #include <linux/timer.h>
138 #include <linux/interrupt.h>
139 #include <linux/in.h>
140 #include <linux/delay.h>
141 #include <linux/ethtool.h>
142 #include <linux/netdevice.h>
143 #include <linux/etherdevice.h>
144 #include <linux/skbuff.h>
145 #include <linux/if_arp.h>
146 #include <linux/ioport.h>
147 #include <linux/bitops.h>
149 #include <pcmcia/cs_types.h>
150 #include <pcmcia/cs.h>
151 #include <pcmcia/cisreg.h>
152 #include <pcmcia/cistpl.h>
153 #include <pcmcia/ds.h>
155 #include <asm/uaccess.h>
157 #include <asm/system.h>
159 /* ----------------------------------------------------------------------------
161 ---------------------------------------------------------------------------- */
163 #define ETHER_ADDR_LEN ETH_ALEN
164 /* 6 bytes in an Ethernet Address */
165 #define MACE_LADRF_LEN 8
166 /* 8 bytes in Logical Address Filter */
168 /* Loop Control Defines */
169 #define MACE_MAX_IR_ITERATIONS 10
170 #define MACE_MAX_RX_ITERATIONS 12
172 TBD: Dean brought this up, and I assumed the hardware would
175 If MACE_MAX_RX_ITERATIONS is > 1, rx_framecnt may still be
176 non-zero when the isr exits. We may not get another interrupt
177 to process the remaining packets for some time.
181 The Am2150 has a Xilinx XC3042 field programmable gate array (FPGA)
182 which manages the interface between the MACE and the PCMCIA bus. It
183 also includes buffer management for the 32K x 8 SRAM to control up to
184 four transmit and 12 receive frames at a time.
186 #define AM2150_MAX_TX_FRAMES 4
187 #define AM2150_MAX_RX_FRAMES 12
189 /* Am2150 Ethernet Card I/O Mapping */
190 #define AM2150_RCV 0x00
191 #define AM2150_XMT 0x04
192 #define AM2150_XMT_SKIP 0x09
193 #define AM2150_RCV_NEXT 0x0A
194 #define AM2150_RCV_FRAME_COUNT 0x0B
195 #define AM2150_MACE_BANK 0x0C
196 #define AM2150_MACE_BASE 0x10
199 #define MACE_RCVFIFO 0
200 #define MACE_XMTFIFO 1
206 #define MACE_FIFOFC 7
210 #define MACE_BIUCC 11
211 #define MACE_FIFOCC 12
212 #define MACE_MACCC 13
213 #define MACE_PLSCC 14
214 #define MACE_PHYCC 15
215 #define MACE_CHIPIDL 16
216 #define MACE_CHIPIDH 17
219 #define MACE_LADRF 20
225 #define MACE_RNTPC 26
226 #define MACE_RCVCC 27
233 #define MACE_XMTRC_EXDEF 0x80
234 #define MACE_XMTRC_XMTRC 0x0F
236 #define MACE_XMTFS_XMTSV 0x80
237 #define MACE_XMTFS_UFLO 0x40
238 #define MACE_XMTFS_LCOL 0x20
239 #define MACE_XMTFS_MORE 0x10
240 #define MACE_XMTFS_ONE 0x08
241 #define MACE_XMTFS_DEFER 0x04
242 #define MACE_XMTFS_LCAR 0x02
243 #define MACE_XMTFS_RTRY 0x01
245 #define MACE_RCVFS_RCVSTS 0xF000
246 #define MACE_RCVFS_OFLO 0x8000
247 #define MACE_RCVFS_CLSN 0x4000
248 #define MACE_RCVFS_FRAM 0x2000
249 #define MACE_RCVFS_FCS 0x1000
251 #define MACE_FIFOFC_RCVFC 0xF0
252 #define MACE_FIFOFC_XMTFC 0x0F
254 #define MACE_IR_JAB 0x80
255 #define MACE_IR_BABL 0x40
256 #define MACE_IR_CERR 0x20
257 #define MACE_IR_RCVCCO 0x10
258 #define MACE_IR_RNTPCO 0x08
259 #define MACE_IR_MPCO 0x04
260 #define MACE_IR_RCVINT 0x02
261 #define MACE_IR_XMTINT 0x01
263 #define MACE_MACCC_PROM 0x80
264 #define MACE_MACCC_DXMT2PD 0x40
265 #define MACE_MACCC_EMBA 0x20
266 #define MACE_MACCC_RESERVED 0x10
267 #define MACE_MACCC_DRCVPA 0x08
268 #define MACE_MACCC_DRCVBC 0x04
269 #define MACE_MACCC_ENXMT 0x02
270 #define MACE_MACCC_ENRCV 0x01
272 #define MACE_PHYCC_LNKFL 0x80
273 #define MACE_PHYCC_DLNKTST 0x40
274 #define MACE_PHYCC_REVPOL 0x20
275 #define MACE_PHYCC_DAPC 0x10
276 #define MACE_PHYCC_LRT 0x08
277 #define MACE_PHYCC_ASEL 0x04
278 #define MACE_PHYCC_RWAKE 0x02
279 #define MACE_PHYCC_AWAKE 0x01
281 #define MACE_IAC_ADDRCHG 0x80
282 #define MACE_IAC_PHYADDR 0x04
283 #define MACE_IAC_LOGADDR 0x02
285 #define MACE_UTR_RTRE 0x80
286 #define MACE_UTR_RTRD 0x40
287 #define MACE_UTR_RPA 0x20
288 #define MACE_UTR_FCOLL 0x10
289 #define MACE_UTR_RCVFCSE 0x08
290 #define MACE_UTR_LOOP_INCL_MENDEC 0x06
291 #define MACE_UTR_LOOP_NO_MENDEC 0x04
292 #define MACE_UTR_LOOP_EXTERNAL 0x02
293 #define MACE_UTR_LOOP_NONE 0x00
294 #define MACE_UTR_RESERVED 0x01
296 /* Switch MACE register bank (only 0 and 1 are valid) */
297 #define MACEBANK(win_num) outb((win_num), ioaddr + AM2150_MACE_BANK)
299 #define MACE_IMR_DEFAULT \
310 #undef MACE_IMR_DEFAULT
311 #define MACE_IMR_DEFAULT 0x00 /* New statistics handling: grab everything */
313 #define TX_TIMEOUT ((400*HZ)/1000)
315 /* ----------------------------------------------------------------------------
317 ---------------------------------------------------------------------------- */
319 typedef struct _mace_statistics {
334 /* RFS1--Receive Status (RCVSTS) */
340 /* RFS2--Runt Packet Count (RNTPC) */
343 /* RFS3--Receive Collision Count (RCVCC) */
364 typedef struct _mace_private {
365 struct pcmcia_device *p_dev;
367 struct net_device_stats linux_stats; /* Linux statistics counters */
368 mace_statistics mace_stats; /* MACE chip statistics counters */
370 /* restore_multicast_list() state variables */
371 int multicast_ladrf[MACE_LADRF_LEN]; /* Logical address filter */
372 int multicast_num_addrs;
374 char tx_free_frames; /* Number of free transmit frame buffers */
375 char tx_irq_disabled; /* MACE TX interrupt disabled */
377 spinlock_t bank_lock; /* Must be held if you step off bank 0 */
380 /* ----------------------------------------------------------------------------
381 Private Global Variables
382 ---------------------------------------------------------------------------- */
385 static char rcsid[] =
386 "nmclan_cs.c,v 0.16 1995/07/01 06:42:17 rpao Exp rpao";
387 static char *version =
388 DRV_NAME " " DRV_VERSION " (Roger C. Pao)";
391 static const char *if_names[]={
392 "Auto", "10baseT", "BNC",
395 /* ----------------------------------------------------------------------------
397 These are the parameters that can be set during loading with
399 ---------------------------------------------------------------------------- */
401 MODULE_DESCRIPTION("New Media PCMCIA ethernet driver");
402 MODULE_LICENSE("GPL");
404 #define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0)
406 /* 0=auto, 1=10baseT, 2 = 10base2, default=auto */
407 INT_MODULE_PARM(if_port, 0);
410 INT_MODULE_PARM(pc_debug, PCMCIA_DEBUG);
411 #define DEBUG(n, args...) if (pc_debug>(n)) printk(KERN_DEBUG args)
413 #define DEBUG(n, args...)
416 /* ----------------------------------------------------------------------------
418 ---------------------------------------------------------------------------- */
420 static int nmclan_config(struct pcmcia_device *link);
421 static void nmclan_release(struct pcmcia_device *link);
423 static void nmclan_reset(struct net_device *dev);
424 static int mace_config(struct net_device *dev, struct ifmap *map);
425 static int mace_open(struct net_device *dev);
426 static int mace_close(struct net_device *dev);
427 static int mace_start_xmit(struct sk_buff *skb, struct net_device *dev);
428 static void mace_tx_timeout(struct net_device *dev);
429 static irqreturn_t mace_interrupt(int irq, void *dev_id, struct pt_regs *regs);
430 static struct net_device_stats *mace_get_stats(struct net_device *dev);
431 static int mace_rx(struct net_device *dev, unsigned char RxCnt);
432 static void restore_multicast_list(struct net_device *dev);
433 static void set_multicast_list(struct net_device *dev);
434 static struct ethtool_ops netdev_ethtool_ops;
437 static void nmclan_detach(struct pcmcia_device *p_dev);
439 /* ----------------------------------------------------------------------------
441 Creates an "instance" of the driver, allocating local data
442 structures for one device. The device is registered with Card
444 ---------------------------------------------------------------------------- */
446 static int nmclan_probe(struct pcmcia_device *link)
449 struct net_device *dev;
451 DEBUG(0, "nmclan_attach()\n");
452 DEBUG(1, "%s\n", rcsid);
454 /* Create new ethernet device */
455 dev = alloc_etherdev(sizeof(mace_private));
458 lp = netdev_priv(dev);
462 spin_lock_init(&lp->bank_lock);
463 link->io.NumPorts1 = 32;
464 link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
465 link->io.IOAddrLines = 5;
466 link->irq.Attributes = IRQ_TYPE_EXCLUSIVE | IRQ_HANDLE_PRESENT;
467 link->irq.IRQInfo1 = IRQ_LEVEL_ID;
468 link->irq.Handler = &mace_interrupt;
469 link->irq.Instance = dev;
470 link->conf.Attributes = CONF_ENABLE_IRQ;
471 link->conf.IntType = INT_MEMORY_AND_IO;
472 link->conf.ConfigIndex = 1;
473 link->conf.Present = PRESENT_OPTION;
475 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
477 SET_MODULE_OWNER(dev);
478 dev->hard_start_xmit = &mace_start_xmit;
479 dev->set_config = &mace_config;
480 dev->get_stats = &mace_get_stats;
481 dev->set_multicast_list = &set_multicast_list;
482 SET_ETHTOOL_OPS(dev, &netdev_ethtool_ops);
483 dev->open = &mace_open;
484 dev->stop = &mace_close;
485 #ifdef HAVE_TX_TIMEOUT
486 dev->tx_timeout = mace_tx_timeout;
487 dev->watchdog_timeo = TX_TIMEOUT;
490 link->state |= DEV_PRESENT | DEV_CONFIG_PENDING;
491 return nmclan_config(link);
492 } /* nmclan_attach */
494 /* ----------------------------------------------------------------------------
496 This deletes a driver "instance". The device is de-registered
497 with Card Services. If it has been released, all local data
498 structures are freed. Otherwise, the structures will be freed
499 when the device is released.
500 ---------------------------------------------------------------------------- */
502 static void nmclan_detach(struct pcmcia_device *link)
504 struct net_device *dev = link->priv;
506 DEBUG(0, "nmclan_detach(0x%p)\n", link);
509 unregister_netdev(dev);
511 if (link->state & DEV_CONFIG)
512 nmclan_release(link);
515 } /* nmclan_detach */
517 /* ----------------------------------------------------------------------------
519 Reads a MACE register. This is bank independent; however, the
520 caller must ensure that this call is not interruptable. We are
521 assuming that during normal operation, the MACE is always in
523 ---------------------------------------------------------------------------- */
524 static int mace_read(mace_private *lp, kio_addr_t ioaddr, int reg)
530 case 0: /* register 0-15 */
531 data = inb(ioaddr + AM2150_MACE_BASE + reg);
533 case 1: /* register 16-31 */
534 spin_lock_irqsave(&lp->bank_lock, flags);
536 data = inb(ioaddr + AM2150_MACE_BASE + (reg & 0x0F));
538 spin_unlock_irqrestore(&lp->bank_lock, flags);
541 return (data & 0xFF);
544 /* ----------------------------------------------------------------------------
546 Writes to a MACE register. This is bank independent; however,
547 the caller must ensure that this call is not interruptable. We
548 are assuming that during normal operation, the MACE is always in
550 ---------------------------------------------------------------------------- */
551 static void mace_write(mace_private *lp, kio_addr_t ioaddr, int reg, int data)
556 case 0: /* register 0-15 */
557 outb(data & 0xFF, ioaddr + AM2150_MACE_BASE + reg);
559 case 1: /* register 16-31 */
560 spin_lock_irqsave(&lp->bank_lock, flags);
562 outb(data & 0xFF, ioaddr + AM2150_MACE_BASE + (reg & 0x0F));
564 spin_unlock_irqrestore(&lp->bank_lock, flags);
569 /* ----------------------------------------------------------------------------
571 Resets the MACE chip.
572 ---------------------------------------------------------------------------- */
573 static int mace_init(mace_private *lp, kio_addr_t ioaddr, char *enet_addr)
578 /* MACE Software reset */
579 mace_write(lp, ioaddr, MACE_BIUCC, 1);
580 while (mace_read(lp, ioaddr, MACE_BIUCC) & 0x01) {
581 /* Wait for reset bit to be cleared automatically after <= 200ns */;
584 printk(KERN_ERR "mace: reset failed, card removed ?\n");
589 mace_write(lp, ioaddr, MACE_BIUCC, 0);
591 /* The Am2150 requires that the MACE FIFOs operate in burst mode. */
592 mace_write(lp, ioaddr, MACE_FIFOCC, 0x0F);
594 mace_write(lp,ioaddr, MACE_RCVFC, 0); /* Disable Auto Strip Receive */
595 mace_write(lp, ioaddr, MACE_IMR, 0xFF); /* Disable all interrupts until _open */
598 * Bit 2-1 PORTSEL[1-0] Port Select.
601 * 10 DAI Port (reserved in Am2150)
603 * For this card, only the first two are valid.
604 * So, PLSCC should be set to
607 * Or just set ASEL in PHYCC below!
611 mace_write(lp, ioaddr, MACE_PLSCC, 0x02);
614 mace_write(lp, ioaddr, MACE_PLSCC, 0x00);
617 mace_write(lp, ioaddr, MACE_PHYCC, /* ASEL */ 4);
618 /* ASEL Auto Select. When set, the PORTSEL[1-0] bits are overridden,
619 and the MACE device will automatically select the operating media
624 mace_write(lp, ioaddr, MACE_IAC, MACE_IAC_ADDRCHG | MACE_IAC_PHYADDR);
625 /* Poll ADDRCHG bit */
627 while (mace_read(lp, ioaddr, MACE_IAC) & MACE_IAC_ADDRCHG)
631 printk(KERN_ERR "mace: ADDRCHG timeout, card removed ?\n");
635 /* Set PADR register */
636 for (i = 0; i < ETHER_ADDR_LEN; i++)
637 mace_write(lp, ioaddr, MACE_PADR, enet_addr[i]);
639 /* MAC Configuration Control Register should be written last */
640 /* Let set_multicast_list set this. */
641 /* mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV); */
642 mace_write(lp, ioaddr, MACE_MACCC, 0x00);
646 /* ----------------------------------------------------------------------------
648 This routine is scheduled to run after a CARD_INSERTION event
649 is received, to configure the PCMCIA socket, and to make the
650 ethernet device available to the system.
651 ---------------------------------------------------------------------------- */
653 #define CS_CHECK(fn, ret) \
654 do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
656 static int nmclan_config(struct pcmcia_device *link)
658 struct net_device *dev = link->priv;
659 mace_private *lp = netdev_priv(dev);
663 int i, last_ret, last_fn;
666 DEBUG(0, "nmclan_config(0x%p)\n", link);
668 tuple.Attributes = 0;
669 tuple.TupleData = buf;
670 tuple.TupleDataMax = 64;
671 tuple.TupleOffset = 0;
672 tuple.DesiredTuple = CISTPL_CONFIG;
673 CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple));
674 CS_CHECK(GetTupleData, pcmcia_get_tuple_data(link, &tuple));
675 CS_CHECK(ParseTuple, pcmcia_parse_tuple(link, &tuple, &parse));
676 link->conf.ConfigBase = parse.config.base;
679 link->state |= DEV_CONFIG;
681 CS_CHECK(RequestIO, pcmcia_request_io(link, &link->io));
682 CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq));
683 CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf));
684 dev->irq = link->irq.AssignedIRQ;
685 dev->base_addr = link->io.BasePort1;
687 ioaddr = dev->base_addr;
689 /* Read the ethernet address from the CIS. */
690 tuple.DesiredTuple = 0x80 /* CISTPL_CFTABLE_ENTRY_MISC */;
691 tuple.TupleData = buf;
692 tuple.TupleDataMax = 64;
693 tuple.TupleOffset = 0;
694 CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple));
695 CS_CHECK(GetTupleData, pcmcia_get_tuple_data(link, &tuple));
696 memcpy(dev->dev_addr, tuple.TupleData, ETHER_ADDR_LEN);
698 /* Verify configuration by reading the MACE ID. */
702 sig[0] = mace_read(lp, ioaddr, MACE_CHIPIDL);
703 sig[1] = mace_read(lp, ioaddr, MACE_CHIPIDH);
704 if ((sig[0] == 0x40) && ((sig[1] & 0x0F) == 0x09)) {
705 DEBUG(0, "nmclan_cs configured: mace id=%x %x\n",
708 printk(KERN_NOTICE "nmclan_cs: mace id not found: %x %x should"
709 " be 0x40 0x?9\n", sig[0], sig[1]);
710 link->state &= ~DEV_CONFIG_PENDING;
715 if(mace_init(lp, ioaddr, dev->dev_addr) == -1)
718 /* The if_port symbol can be set when the module is loaded */
720 dev->if_port = if_port;
722 printk(KERN_NOTICE "nmclan_cs: invalid if_port requested\n");
724 link->dev_node = &lp->node;
725 link->state &= ~DEV_CONFIG_PENDING;
726 SET_NETDEV_DEV(dev, &handle_to_dev(link));
728 i = register_netdev(dev);
730 printk(KERN_NOTICE "nmclan_cs: register_netdev() failed\n");
731 link->dev_node = NULL;
735 strcpy(lp->node.dev_name, dev->name);
737 printk(KERN_INFO "%s: nmclan: port %#3lx, irq %d, %s port, hw_addr ",
738 dev->name, dev->base_addr, dev->irq, if_names[dev->if_port]);
739 for (i = 0; i < 6; i++)
740 printk("%02X%s", dev->dev_addr[i], ((i<5) ? ":" : "\n"));
744 cs_error(link, last_fn, last_ret);
746 nmclan_release(link);
748 } /* nmclan_config */
750 /* ----------------------------------------------------------------------------
752 After a card is removed, nmclan_release() will unregister the
753 net device, and release the PCMCIA configuration. If the device
754 is still open, this will be postponed until it is closed.
755 ---------------------------------------------------------------------------- */
756 static void nmclan_release(struct pcmcia_device *link)
758 DEBUG(0, "nmclan_release(0x%p)\n", link);
759 pcmcia_disable_device(link);
762 static int nmclan_suspend(struct pcmcia_device *link)
764 struct net_device *dev = link->priv;
766 if ((link->state & DEV_CONFIG) && (link->open))
767 netif_device_detach(dev);
772 static int nmclan_resume(struct pcmcia_device *link)
774 struct net_device *dev = link->priv;
776 if ((link->state & DEV_CONFIG) && (link->open)) {
778 netif_device_attach(dev);
785 /* ----------------------------------------------------------------------------
787 Reset and restore all of the Xilinx and MACE registers.
788 ---------------------------------------------------------------------------- */
789 static void nmclan_reset(struct net_device *dev)
791 mace_private *lp = netdev_priv(dev);
794 struct pcmcia_device *link = &lp->link;
798 /* Save original COR value */
800 reg.Action = CS_READ;
801 reg.Offset = CISREG_COR;
803 pcmcia_access_configuration_register(link, ®);
804 OrigCorValue = reg.Value;
807 reg.Action = CS_WRITE;
808 reg.Offset = CISREG_COR;
809 DEBUG(1, "nmclan_reset: OrigCorValue=0x%lX, resetting...\n",
811 reg.Value = COR_SOFT_RESET;
812 pcmcia_access_configuration_register(link, ®);
813 /* Need to wait for 20 ms for PCMCIA to finish reset. */
815 /* Restore original COR configuration index */
816 reg.Value = COR_LEVEL_REQ | (OrigCorValue & COR_CONFIG_MASK);
817 pcmcia_access_configuration_register(link, ®);
818 /* Xilinx is now completely reset along with the MACE chip. */
819 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
821 #endif /* #if RESET_XILINX */
823 /* Xilinx is now completely reset along with the MACE chip. */
824 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
826 /* Reinitialize the MACE chip for operation. */
827 mace_init(lp, dev->base_addr, dev->dev_addr);
828 mace_write(lp, dev->base_addr, MACE_IMR, MACE_IMR_DEFAULT);
830 /* Restore the multicast list and enable TX and RX. */
831 restore_multicast_list(dev);
834 /* ----------------------------------------------------------------------------
836 [Someone tell me what this is supposed to do? Is if_port a defined
837 standard? If so, there should be defines to indicate 1=10Base-T,
838 2=10Base-2, etc. including limited automatic detection.]
839 ---------------------------------------------------------------------------- */
840 static int mace_config(struct net_device *dev, struct ifmap *map)
842 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
843 if (map->port <= 2) {
844 dev->if_port = map->port;
845 printk(KERN_INFO "%s: switched to %s port\n", dev->name,
846 if_names[dev->if_port]);
853 /* ----------------------------------------------------------------------------
856 ---------------------------------------------------------------------------- */
857 static int mace_open(struct net_device *dev)
859 kio_addr_t ioaddr = dev->base_addr;
860 mace_private *lp = netdev_priv(dev);
861 struct pcmcia_device *link = lp->p_dev;
870 netif_start_queue(dev);
873 return 0; /* Always succeed */
876 /* ----------------------------------------------------------------------------
878 Closes device driver.
879 ---------------------------------------------------------------------------- */
880 static int mace_close(struct net_device *dev)
882 kio_addr_t ioaddr = dev->base_addr;
883 mace_private *lp = netdev_priv(dev);
884 struct pcmcia_device *link = lp->p_dev;
886 DEBUG(2, "%s: shutting down ethercard.\n", dev->name);
888 /* Mask off all interrupts from the MACE chip. */
889 outb(0xFF, ioaddr + AM2150_MACE_BASE + MACE_IMR);
892 netif_stop_queue(dev);
897 static void netdev_get_drvinfo(struct net_device *dev,
898 struct ethtool_drvinfo *info)
900 strcpy(info->driver, DRV_NAME);
901 strcpy(info->version, DRV_VERSION);
902 sprintf(info->bus_info, "PCMCIA 0x%lx", dev->base_addr);
906 static u32 netdev_get_msglevel(struct net_device *dev)
911 static void netdev_set_msglevel(struct net_device *dev, u32 level)
915 #endif /* PCMCIA_DEBUG */
917 static struct ethtool_ops netdev_ethtool_ops = {
918 .get_drvinfo = netdev_get_drvinfo,
920 .get_msglevel = netdev_get_msglevel,
921 .set_msglevel = netdev_set_msglevel,
922 #endif /* PCMCIA_DEBUG */
925 /* ----------------------------------------------------------------------------
927 This routine begins the packet transmit function. When completed,
928 it will generate a transmit interrupt.
930 According to /usr/src/linux/net/inet/dev.c, if _start_xmit
931 returns 0, the "packet is now solely the responsibility of the
932 driver." If _start_xmit returns non-zero, the "transmission
933 failed, put skb back into a list."
934 ---------------------------------------------------------------------------- */
936 static void mace_tx_timeout(struct net_device *dev)
938 mace_private *lp = netdev_priv(dev);
939 struct pcmcia_device *link = lp->p_dev;
941 printk(KERN_NOTICE "%s: transmit timed out -- ", dev->name);
943 printk("resetting card\n");
944 pcmcia_reset_card(link, NULL);
945 #else /* #if RESET_ON_TIMEOUT */
946 printk("NOT resetting card\n");
947 #endif /* #if RESET_ON_TIMEOUT */
948 dev->trans_start = jiffies;
949 netif_wake_queue(dev);
952 static int mace_start_xmit(struct sk_buff *skb, struct net_device *dev)
954 mace_private *lp = netdev_priv(dev);
955 kio_addr_t ioaddr = dev->base_addr;
957 netif_stop_queue(dev);
959 DEBUG(3, "%s: mace_start_xmit(length = %ld) called.\n",
960 dev->name, (long)skb->len);
962 #if (!TX_INTERRUPTABLE)
963 /* Disable MACE TX interrupts. */
964 outb(MACE_IMR_DEFAULT | MACE_IR_XMTINT,
965 ioaddr + AM2150_MACE_BASE + MACE_IMR);
966 lp->tx_irq_disabled=1;
967 #endif /* #if (!TX_INTERRUPTABLE) */
970 /* This block must not be interrupted by another transmit request!
971 mace_tx_timeout will take care of timer-based retransmissions from
972 the upper layers. The interrupt handler is guaranteed never to
973 service a transmit interrupt while we are in here.
976 lp->linux_stats.tx_bytes += skb->len;
977 lp->tx_free_frames--;
979 /* WARNING: Write the _exact_ number of bytes written in the header! */
980 /* Put out the word header [must be an outw()] . . . */
981 outw(skb->len, ioaddr + AM2150_XMT);
982 /* . . . and the packet [may be any combination of outw() and outb()] */
983 outsw(ioaddr + AM2150_XMT, skb->data, skb->len >> 1);
985 /* Odd byte transfer */
986 outb(skb->data[skb->len-1], ioaddr + AM2150_XMT);
989 dev->trans_start = jiffies;
992 if (lp->tx_free_frames > 0)
993 netif_start_queue(dev);
994 #endif /* #if MULTI_TX */
997 #if (!TX_INTERRUPTABLE)
998 /* Re-enable MACE TX interrupts. */
999 lp->tx_irq_disabled=0;
1000 outb(MACE_IMR_DEFAULT, ioaddr + AM2150_MACE_BASE + MACE_IMR);
1001 #endif /* #if (!TX_INTERRUPTABLE) */
1006 } /* mace_start_xmit */
1008 /* ----------------------------------------------------------------------------
1010 The interrupt handler.
1011 ---------------------------------------------------------------------------- */
1012 static irqreturn_t mace_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1014 struct net_device *dev = (struct net_device *) dev_id;
1015 mace_private *lp = netdev_priv(dev);
1016 kio_addr_t ioaddr = dev->base_addr;
1018 int IntrCnt = MACE_MAX_IR_ITERATIONS;
1021 DEBUG(2, "mace_interrupt(): irq 0x%X for unknown device.\n",
1026 if (lp->tx_irq_disabled) {
1028 (lp->tx_irq_disabled?
1029 KERN_NOTICE "%s: Interrupt with tx_irq_disabled "
1030 "[isr=%02X, imr=%02X]\n":
1031 KERN_NOTICE "%s: Re-entering the interrupt handler "
1032 "[isr=%02X, imr=%02X]\n"),
1034 inb(ioaddr + AM2150_MACE_BASE + MACE_IR),
1035 inb(ioaddr + AM2150_MACE_BASE + MACE_IMR)
1037 /* WARNING: MACE_IR has been read! */
1041 if (!netif_device_present(dev)) {
1042 DEBUG(2, "%s: interrupt from dead card\n", dev->name);
1047 /* WARNING: MACE_IR is a READ/CLEAR port! */
1048 status = inb(ioaddr + AM2150_MACE_BASE + MACE_IR);
1050 DEBUG(3, "mace_interrupt: irq 0x%X status 0x%X.\n", irq, status);
1052 if (status & MACE_IR_RCVINT) {
1053 mace_rx(dev, MACE_MAX_RX_ITERATIONS);
1056 if (status & MACE_IR_XMTINT) {
1057 unsigned char fifofc;
1058 unsigned char xmtrc;
1059 unsigned char xmtfs;
1061 fifofc = inb(ioaddr + AM2150_MACE_BASE + MACE_FIFOFC);
1062 if ((fifofc & MACE_FIFOFC_XMTFC)==0) {
1063 lp->linux_stats.tx_errors++;
1064 outb(0xFF, ioaddr + AM2150_XMT_SKIP);
1067 /* Transmit Retry Count (XMTRC, reg 4) */
1068 xmtrc = inb(ioaddr + AM2150_MACE_BASE + MACE_XMTRC);
1069 if (xmtrc & MACE_XMTRC_EXDEF) lp->mace_stats.exdef++;
1070 lp->mace_stats.xmtrc += (xmtrc & MACE_XMTRC_XMTRC);
1073 (xmtfs = inb(ioaddr + AM2150_MACE_BASE + MACE_XMTFS)) &
1074 MACE_XMTFS_XMTSV /* Transmit Status Valid */
1076 lp->mace_stats.xmtsv++;
1078 if (xmtfs & ~MACE_XMTFS_XMTSV) {
1079 if (xmtfs & MACE_XMTFS_UFLO) {
1080 /* Underflow. Indicates that the Transmit FIFO emptied before
1081 the end of frame was reached. */
1082 lp->mace_stats.uflo++;
1084 if (xmtfs & MACE_XMTFS_LCOL) {
1085 /* Late Collision */
1086 lp->mace_stats.lcol++;
1088 if (xmtfs & MACE_XMTFS_MORE) {
1089 /* MORE than one retry was needed */
1090 lp->mace_stats.more++;
1092 if (xmtfs & MACE_XMTFS_ONE) {
1093 /* Exactly ONE retry occurred */
1094 lp->mace_stats.one++;
1096 if (xmtfs & MACE_XMTFS_DEFER) {
1097 /* Transmission was defered */
1098 lp->mace_stats.defer++;
1100 if (xmtfs & MACE_XMTFS_LCAR) {
1101 /* Loss of carrier */
1102 lp->mace_stats.lcar++;
1104 if (xmtfs & MACE_XMTFS_RTRY) {
1105 /* Retry error: transmit aborted after 16 attempts */
1106 lp->mace_stats.rtry++;
1108 } /* if (xmtfs & ~MACE_XMTFS_XMTSV) */
1110 } /* if (xmtfs & MACE_XMTFS_XMTSV) */
1112 lp->linux_stats.tx_packets++;
1113 lp->tx_free_frames++;
1114 netif_wake_queue(dev);
1115 } /* if (status & MACE_IR_XMTINT) */
1117 if (status & ~MACE_IMR_DEFAULT & ~MACE_IR_RCVINT & ~MACE_IR_XMTINT) {
1118 if (status & MACE_IR_JAB) {
1119 /* Jabber Error. Excessive transmit duration (20-150ms). */
1120 lp->mace_stats.jab++;
1122 if (status & MACE_IR_BABL) {
1123 /* Babble Error. >1518 bytes transmitted. */
1124 lp->mace_stats.babl++;
1126 if (status & MACE_IR_CERR) {
1127 /* Collision Error. CERR indicates the absence of the
1128 Signal Quality Error Test message after a packet
1130 lp->mace_stats.cerr++;
1132 if (status & MACE_IR_RCVCCO) {
1133 /* Receive Collision Count Overflow; */
1134 lp->mace_stats.rcvcco++;
1136 if (status & MACE_IR_RNTPCO) {
1137 /* Runt Packet Count Overflow */
1138 lp->mace_stats.rntpco++;
1140 if (status & MACE_IR_MPCO) {
1141 /* Missed Packet Count Overflow */
1142 lp->mace_stats.mpco++;
1144 } /* if (status & ~MACE_IMR_DEFAULT & ~MACE_IR_RCVINT & ~MACE_IR_XMTINT) */
1146 } while ((status & ~MACE_IMR_DEFAULT) && (--IntrCnt));
1149 } /* mace_interrupt */
1151 /* ----------------------------------------------------------------------------
1154 ---------------------------------------------------------------------------- */
1155 static int mace_rx(struct net_device *dev, unsigned char RxCnt)
1157 mace_private *lp = netdev_priv(dev);
1158 kio_addr_t ioaddr = dev->base_addr;
1159 unsigned char rx_framecnt;
1160 unsigned short rx_status;
1163 ((rx_framecnt = inb(ioaddr + AM2150_RCV_FRAME_COUNT)) > 0) &&
1164 (rx_framecnt <= 12) && /* rx_framecnt==0xFF if card is extracted. */
1167 rx_status = inw(ioaddr + AM2150_RCV);
1169 DEBUG(3, "%s: in mace_rx(), framecnt 0x%X, rx_status"
1170 " 0x%X.\n", dev->name, rx_framecnt, rx_status);
1172 if (rx_status & MACE_RCVFS_RCVSTS) { /* Error, update stats. */
1173 lp->linux_stats.rx_errors++;
1174 if (rx_status & MACE_RCVFS_OFLO) {
1175 lp->mace_stats.oflo++;
1177 if (rx_status & MACE_RCVFS_CLSN) {
1178 lp->mace_stats.clsn++;
1180 if (rx_status & MACE_RCVFS_FRAM) {
1181 lp->mace_stats.fram++;
1183 if (rx_status & MACE_RCVFS_FCS) {
1184 lp->mace_stats.fcs++;
1187 short pkt_len = (rx_status & ~MACE_RCVFS_RCVSTS) - 4;
1188 /* Auto Strip is off, always subtract 4 */
1189 struct sk_buff *skb;
1191 lp->mace_stats.rfs_rntpc += inb(ioaddr + AM2150_RCV);
1192 /* runt packet count */
1193 lp->mace_stats.rfs_rcvcc += inb(ioaddr + AM2150_RCV);
1194 /* rcv collision count */
1196 DEBUG(3, " receiving packet size 0x%X rx_status"
1197 " 0x%X.\n", pkt_len, rx_status);
1199 skb = dev_alloc_skb(pkt_len+2);
1204 skb_reserve(skb, 2);
1205 insw(ioaddr + AM2150_RCV, skb_put(skb, pkt_len), pkt_len>>1);
1207 *(skb->tail-1) = inb(ioaddr + AM2150_RCV);
1208 skb->protocol = eth_type_trans(skb, dev);
1210 netif_rx(skb); /* Send the packet to the upper (protocol) layers. */
1212 dev->last_rx = jiffies;
1213 lp->linux_stats.rx_packets++;
1214 lp->linux_stats.rx_bytes += skb->len;
1215 outb(0xFF, ioaddr + AM2150_RCV_NEXT); /* skip to next frame */
1218 DEBUG(1, "%s: couldn't allocate a sk_buff of size"
1219 " %d.\n", dev->name, pkt_len);
1220 lp->linux_stats.rx_dropped++;
1223 outb(0xFF, ioaddr + AM2150_RCV_NEXT); /* skip to next frame */
1229 /* ----------------------------------------------------------------------------
1231 ---------------------------------------------------------------------------- */
1232 static void pr_linux_stats(struct net_device_stats *pstats)
1234 DEBUG(2, "pr_linux_stats\n");
1235 DEBUG(2, " rx_packets=%-7ld tx_packets=%ld\n",
1236 (long)pstats->rx_packets, (long)pstats->tx_packets);
1237 DEBUG(2, " rx_errors=%-7ld tx_errors=%ld\n",
1238 (long)pstats->rx_errors, (long)pstats->tx_errors);
1239 DEBUG(2, " rx_dropped=%-7ld tx_dropped=%ld\n",
1240 (long)pstats->rx_dropped, (long)pstats->tx_dropped);
1241 DEBUG(2, " multicast=%-7ld collisions=%ld\n",
1242 (long)pstats->multicast, (long)pstats->collisions);
1244 DEBUG(2, " rx_length_errors=%-7ld rx_over_errors=%ld\n",
1245 (long)pstats->rx_length_errors, (long)pstats->rx_over_errors);
1246 DEBUG(2, " rx_crc_errors=%-7ld rx_frame_errors=%ld\n",
1247 (long)pstats->rx_crc_errors, (long)pstats->rx_frame_errors);
1248 DEBUG(2, " rx_fifo_errors=%-7ld rx_missed_errors=%ld\n",
1249 (long)pstats->rx_fifo_errors, (long)pstats->rx_missed_errors);
1251 DEBUG(2, " tx_aborted_errors=%-7ld tx_carrier_errors=%ld\n",
1252 (long)pstats->tx_aborted_errors, (long)pstats->tx_carrier_errors);
1253 DEBUG(2, " tx_fifo_errors=%-7ld tx_heartbeat_errors=%ld\n",
1254 (long)pstats->tx_fifo_errors, (long)pstats->tx_heartbeat_errors);
1255 DEBUG(2, " tx_window_errors=%ld\n",
1256 (long)pstats->tx_window_errors);
1257 } /* pr_linux_stats */
1259 /* ----------------------------------------------------------------------------
1261 ---------------------------------------------------------------------------- */
1262 static void pr_mace_stats(mace_statistics *pstats)
1264 DEBUG(2, "pr_mace_stats\n");
1266 DEBUG(2, " xmtsv=%-7d uflo=%d\n",
1267 pstats->xmtsv, pstats->uflo);
1268 DEBUG(2, " lcol=%-7d more=%d\n",
1269 pstats->lcol, pstats->more);
1270 DEBUG(2, " one=%-7d defer=%d\n",
1271 pstats->one, pstats->defer);
1272 DEBUG(2, " lcar=%-7d rtry=%d\n",
1273 pstats->lcar, pstats->rtry);
1276 DEBUG(2, " exdef=%-7d xmtrc=%d\n",
1277 pstats->exdef, pstats->xmtrc);
1279 /* RFS1--Receive Status (RCVSTS) */
1280 DEBUG(2, " oflo=%-7d clsn=%d\n",
1281 pstats->oflo, pstats->clsn);
1282 DEBUG(2, " fram=%-7d fcs=%d\n",
1283 pstats->fram, pstats->fcs);
1285 /* RFS2--Runt Packet Count (RNTPC) */
1286 /* RFS3--Receive Collision Count (RCVCC) */
1287 DEBUG(2, " rfs_rntpc=%-7d rfs_rcvcc=%d\n",
1288 pstats->rfs_rntpc, pstats->rfs_rcvcc);
1291 DEBUG(2, " jab=%-7d babl=%d\n",
1292 pstats->jab, pstats->babl);
1293 DEBUG(2, " cerr=%-7d rcvcco=%d\n",
1294 pstats->cerr, pstats->rcvcco);
1295 DEBUG(2, " rntpco=%-7d mpco=%d\n",
1296 pstats->rntpco, pstats->mpco);
1299 DEBUG(2, " mpc=%d\n", pstats->mpc);
1302 DEBUG(2, " rntpc=%d\n", pstats->rntpc);
1305 DEBUG(2, " rcvcc=%d\n", pstats->rcvcc);
1307 } /* pr_mace_stats */
1309 /* ----------------------------------------------------------------------------
1311 Update statistics. We change to register window 1, so this
1312 should be run single-threaded if the device is active. This is
1313 expected to be a rare operation, and it's simpler for the rest
1314 of the driver to assume that window 0 is always valid rather
1315 than use a special window-state variable.
1317 oflo & uflo should _never_ occur since it would mean the Xilinx
1318 was not able to transfer data between the MACE FIFO and the
1319 card's SRAM fast enough. If this happens, something is
1320 seriously wrong with the hardware.
1321 ---------------------------------------------------------------------------- */
1322 static void update_stats(kio_addr_t ioaddr, struct net_device *dev)
1324 mace_private *lp = netdev_priv(dev);
1326 lp->mace_stats.rcvcc += mace_read(lp, ioaddr, MACE_RCVCC);
1327 lp->mace_stats.rntpc += mace_read(lp, ioaddr, MACE_RNTPC);
1328 lp->mace_stats.mpc += mace_read(lp, ioaddr, MACE_MPC);
1329 /* At this point, mace_stats is fully updated for this call.
1330 We may now update the linux_stats. */
1332 /* The MACE has no equivalent for linux_stats field which are commented
1335 /* lp->linux_stats.multicast; */
1336 lp->linux_stats.collisions =
1337 lp->mace_stats.rcvcco * 256 + lp->mace_stats.rcvcc;
1338 /* Collision: The MACE may retry sending a packet 15 times
1339 before giving up. The retry count is in XMTRC.
1340 Does each retry constitute a collision?
1341 If so, why doesn't the RCVCC record these collisions? */
1343 /* detailed rx_errors: */
1344 lp->linux_stats.rx_length_errors =
1345 lp->mace_stats.rntpco * 256 + lp->mace_stats.rntpc;
1346 /* lp->linux_stats.rx_over_errors */
1347 lp->linux_stats.rx_crc_errors = lp->mace_stats.fcs;
1348 lp->linux_stats.rx_frame_errors = lp->mace_stats.fram;
1349 lp->linux_stats.rx_fifo_errors = lp->mace_stats.oflo;
1350 lp->linux_stats.rx_missed_errors =
1351 lp->mace_stats.mpco * 256 + lp->mace_stats.mpc;
1353 /* detailed tx_errors */
1354 lp->linux_stats.tx_aborted_errors = lp->mace_stats.rtry;
1355 lp->linux_stats.tx_carrier_errors = lp->mace_stats.lcar;
1356 /* LCAR usually results from bad cabling. */
1357 lp->linux_stats.tx_fifo_errors = lp->mace_stats.uflo;
1358 lp->linux_stats.tx_heartbeat_errors = lp->mace_stats.cerr;
1359 /* lp->linux_stats.tx_window_errors; */
1362 } /* update_stats */
1364 /* ----------------------------------------------------------------------------
1366 Gathers ethernet statistics from the MACE chip.
1367 ---------------------------------------------------------------------------- */
1368 static struct net_device_stats *mace_get_stats(struct net_device *dev)
1370 mace_private *lp = netdev_priv(dev);
1372 update_stats(dev->base_addr, dev);
1374 DEBUG(1, "%s: updating the statistics.\n", dev->name);
1375 pr_linux_stats(&lp->linux_stats);
1376 pr_mace_stats(&lp->mace_stats);
1378 return &lp->linux_stats;
1379 } /* net_device_stats */
1381 /* ----------------------------------------------------------------------------
1383 Modified from Am79C90 data sheet.
1384 ---------------------------------------------------------------------------- */
1386 #ifdef BROKEN_MULTICAST
1388 static void updateCRC(int *CRC, int bit)
1395 }; /* CRC polynomial. poly[n] = coefficient of the x**n term of the
1396 CRC generator polynomial. */
1400 /* shift CRC and control bit (CRC[32]) */
1401 for (j = 32; j > 0; j--)
1405 /* If bit XOR(control bit) = 1, set CRC = CRC XOR polynomial. */
1407 for (j = 0; j < 32; j++)
1411 /* ----------------------------------------------------------------------------
1413 Build logical address filter.
1414 Modified from Am79C90 data sheet.
1417 ladrf: logical address filter (contents initialized to 0)
1418 adr: ethernet address
1419 ---------------------------------------------------------------------------- */
1420 static void BuildLAF(int *ladrf, int *adr)
1422 int CRC[33]={1}; /* CRC register, 1 word/bit + extra control bit */
1424 int i, byte; /* temporary array indices */
1425 int hashcode; /* the output object */
1429 for (byte = 0; byte < 6; byte++)
1430 for (i = 0; i < 8; i++)
1431 updateCRC(CRC, (adr[byte] >> i) & 1);
1434 for (i = 0; i < 6; i++)
1435 hashcode = (hashcode << 1) + CRC[i];
1437 byte = hashcode >> 3;
1438 ladrf[byte] |= (1 << (hashcode & 7));
1442 printk(KERN_DEBUG " adr =");
1443 for (i = 0; i < 6; i++)
1444 printk(" %02X", adr[i]);
1445 printk("\n" KERN_DEBUG " hashcode = %d(decimal), ladrf[0:63]"
1447 for (i = 0; i < 8; i++)
1448 printk(" %02X", ladrf[i]);
1454 /* ----------------------------------------------------------------------------
1455 restore_multicast_list
1456 Restores the multicast filter for MACE chip to the last
1457 set_multicast_list() call.
1462 ---------------------------------------------------------------------------- */
1463 static void restore_multicast_list(struct net_device *dev)
1465 mace_private *lp = netdev_priv(dev);
1466 int num_addrs = lp->multicast_num_addrs;
1467 int *ladrf = lp->multicast_ladrf;
1468 kio_addr_t ioaddr = dev->base_addr;
1471 DEBUG(2, "%s: restoring Rx mode to %d addresses.\n",
1472 dev->name, num_addrs);
1474 if (num_addrs > 0) {
1476 DEBUG(1, "Attempt to restore multicast list detected.\n");
1478 mace_write(lp, ioaddr, MACE_IAC, MACE_IAC_ADDRCHG | MACE_IAC_LOGADDR);
1479 /* Poll ADDRCHG bit */
1480 while (mace_read(lp, ioaddr, MACE_IAC) & MACE_IAC_ADDRCHG)
1482 /* Set LADRF register */
1483 for (i = 0; i < MACE_LADRF_LEN; i++)
1484 mace_write(lp, ioaddr, MACE_LADRF, ladrf[i]);
1486 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_RCVFCSE | MACE_UTR_LOOP_EXTERNAL);
1487 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1489 } else if (num_addrs < 0) {
1491 /* Promiscuous mode: receive all packets */
1492 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1493 mace_write(lp, ioaddr, MACE_MACCC,
1494 MACE_MACCC_PROM | MACE_MACCC_ENXMT | MACE_MACCC_ENRCV
1500 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1501 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1504 } /* restore_multicast_list */
1506 /* ----------------------------------------------------------------------------
1508 Set or clear the multicast filter for this adaptor.
1511 num_addrs == -1 Promiscuous mode, receive all packets
1512 num_addrs == 0 Normal mode, clear multicast list
1513 num_addrs > 0 Multicast mode, receive normal and MC packets, and do
1514 best-effort filtering.
1518 ---------------------------------------------------------------------------- */
1520 static void set_multicast_list(struct net_device *dev)
1522 mace_private *lp = netdev_priv(dev);
1523 int adr[ETHER_ADDR_LEN] = {0}; /* Ethernet address */
1525 struct dev_mc_list *dmi = dev->mc_list;
1530 if (dev->mc_count != old) {
1531 old = dev->mc_count;
1532 DEBUG(0, "%s: setting Rx mode to %d addresses.\n",
1538 /* Set multicast_num_addrs. */
1539 lp->multicast_num_addrs = dev->mc_count;
1541 /* Set multicast_ladrf. */
1542 if (num_addrs > 0) {
1543 /* Calculate multicast logical address filter */
1544 memset(lp->multicast_ladrf, 0, MACE_LADRF_LEN);
1545 for (i = 0; i < dev->mc_count; i++) {
1546 memcpy(adr, dmi->dmi_addr, ETHER_ADDR_LEN);
1548 BuildLAF(lp->multicast_ladrf, adr);
1552 restore_multicast_list(dev);
1554 } /* set_multicast_list */
1556 #endif /* BROKEN_MULTICAST */
1558 static void restore_multicast_list(struct net_device *dev)
1560 kio_addr_t ioaddr = dev->base_addr;
1561 mace_private *lp = netdev_priv(dev);
1563 DEBUG(2, "%s: restoring Rx mode to %d addresses.\n", dev->name,
1564 lp->multicast_num_addrs);
1566 if (dev->flags & IFF_PROMISC) {
1567 /* Promiscuous mode: receive all packets */
1568 mace_write(lp,ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1569 mace_write(lp, ioaddr, MACE_MACCC,
1570 MACE_MACCC_PROM | MACE_MACCC_ENXMT | MACE_MACCC_ENRCV
1574 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1575 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1577 } /* restore_multicast_list */
1579 static void set_multicast_list(struct net_device *dev)
1581 mace_private *lp = netdev_priv(dev);
1586 if (dev->mc_count != old) {
1587 old = dev->mc_count;
1588 DEBUG(0, "%s: setting Rx mode to %d addresses.\n",
1594 lp->multicast_num_addrs = dev->mc_count;
1595 restore_multicast_list(dev);
1597 } /* set_multicast_list */
1599 static struct pcmcia_device_id nmclan_ids[] = {
1600 PCMCIA_DEVICE_PROD_ID12("New Media Corporation", "Ethernet", 0x085a850b, 0x00b2e941),
1601 PCMCIA_DEVICE_PROD_ID12("Portable Add-ons", "Ethernet+", 0xebf1d60, 0xad673aaf),
1604 MODULE_DEVICE_TABLE(pcmcia, nmclan_ids);
1606 static struct pcmcia_driver nmclan_cs_driver = {
1607 .owner = THIS_MODULE,
1609 .name = "nmclan_cs",
1611 .probe = nmclan_probe,
1612 .remove = nmclan_detach,
1613 .id_table = nmclan_ids,
1614 .suspend = nmclan_suspend,
1615 .resume = nmclan_resume,
1618 static int __init init_nmclan_cs(void)
1620 return pcmcia_register_driver(&nmclan_cs_driver);
1623 static void __exit exit_nmclan_cs(void)
1625 pcmcia_unregister_driver(&nmclan_cs_driver);
1628 module_init(init_nmclan_cs);
1629 module_exit(exit_nmclan_cs);