1 /* ----------------------------------------------------------------------------
2 Linux PCMCIA ethernet adapter driver for the New Media Ethernet LAN.
3 nmclan_cs.c,v 0.16 1995/07/01 06:42:17 rpao Exp rpao
5 The Ethernet LAN uses the Advanced Micro Devices (AMD) Am79C940 Media
6 Access Controller for Ethernet (MACE). It is essentially the Am2150
7 PCMCIA Ethernet card contained in the Am2150 Demo Kit.
9 Written by Roger C. Pao <rpao@paonet.org>
10 Copyright 1995 Roger C. Pao
11 Linux 2.5 cleanups Copyright Red Hat 2003
13 This software may be used and distributed according to the terms of
14 the GNU General Public License.
16 Ported to Linux 1.3.* network driver environment by
17 Matti Aarnio <mea@utu.fi>
21 Am2150 Technical Reference Manual, Revision 1.0, August 17, 1993
22 Am79C940 (MACE) Data Sheet, 1994
23 Am79C90 (C-LANCE) Data Sheet, 1994
24 Linux PCMCIA Programmer's Guide v1.17
25 /usr/src/linux/net/inet/dev.c, Linux kernel 1.2.8
27 Eric Mears, New Media Corporation
28 Tom Pollard, New Media Corporation
29 Dean Siasoyco, New Media Corporation
30 Ken Lesniak, Silicon Graphics, Inc. <lesniak@boston.sgi.com>
31 Donald Becker <becker@scyld.com>
32 David Hinds <dahinds@users.sourceforge.net>
34 The Linux client driver is based on the 3c589_cs.c client driver by
37 The Linux network driver outline is based on the 3c589_cs.c driver,
38 the 8390.c driver, and the example skeleton.c kernel code, which are
41 The Am2150 network driver hardware interface code is based on the
42 OS/9000 driver for the New Media Ethernet LAN by Eric Mears.
44 Special thanks for testing and help in debugging this driver goes
47 -------------------------------------------------------------------------------
48 Driver Notes and Issues
49 -------------------------------------------------------------------------------
51 1. Developed on a Dell 320SLi
52 PCMCIA Card Services 2.6.2
53 Linux dell 1.2.10 #1 Thu Jun 29 20:23:41 PDT 1995 i386
55 2. rc.pcmcia may require loading pcmcia_core with io_speed=300:
56 'insmod pcmcia_core.o io_speed=300'.
57 This will avoid problems with fast systems which causes rx_framecnt
58 to return random values.
60 3. If hot extraction does not work for you, use 'ifconfig eth0 down'
63 4. There is a bad slow-down problem in this driver.
65 5. Future: Multicast processing. In the meantime, do _not_ compile your
66 kernel with multicast ip enabled.
68 -------------------------------------------------------------------------------
70 -------------------------------------------------------------------------------
72 * 2.5.75-ac1 2003/07/11 Alan Cox <alan@lxorguk.ukuu.org.uk>
73 * Fixed hang on card eject as we probe it
74 * Cleaned up to use new style locking.
76 * Revision 0.16 1995/07/01 06:42:17 rpao
77 * Bug fix: nmclan_reset() called CardServices incorrectly.
79 * Revision 0.15 1995/05/24 08:09:47 rpao
80 * Re-implement MULTI_TX dev->tbusy handling.
82 * Revision 0.14 1995/05/23 03:19:30 rpao
83 * Added, in nmclan_config(), "tuple.Attributes = 0;".
84 * Modified MACE ID check to ignore chip revision level.
85 * Avoid tx_free_frames race condition between _start_xmit and _interrupt.
87 * Revision 0.13 1995/05/18 05:56:34 rpao
89 * Bug fix: nmclan_reset did not enable TX and RX: call restore_multicast_list.
90 * Bug fix: mace_interrupt checks ~MACE_IMR_DEFAULT. Fixes driver lockup.
92 * Revision 0.12 1995/05/14 00:12:23 rpao
93 * Statistics overhaul.
97 Bug fix: MACE statistics counters used wrong I/O ports.
98 Bug fix: mace_interrupt() needed to allow statistics to be
99 processed without RX or TX interrupts pending.
101 Multiple transmit request processing.
102 Modified statistics to use MACE counters where possible.
103 95/05/10 rpao V0.09 Bug fix: Must use IO_DATA_PATH_WIDTH_AUTO.
106 Bug fix: Make all non-exported functions private by using
108 Bug fix: Test IntrCnt _before_ reading MACE_IR.
109 95/05/10 rpao V0.07 Statistics.
110 95/05/09 rpao V0.06 Fix rx_framecnt problem by addition of PCIC wait states.
112 ---------------------------------------------------------------------------- */
114 #define DRV_NAME "nmclan_cs"
115 #define DRV_VERSION "0.16"
118 /* ----------------------------------------------------------------------------
119 Conditional Compilation Options
120 ---------------------------------------------------------------------------- */
123 #define RESET_ON_TIMEOUT 1
124 #define TX_INTERRUPTABLE 1
125 #define RESET_XILINX 0
127 /* ----------------------------------------------------------------------------
129 ---------------------------------------------------------------------------- */
131 #include <linux/module.h>
132 #include <linux/kernel.h>
133 #include <linux/init.h>
134 #include <linux/ptrace.h>
135 #include <linux/slab.h>
136 #include <linux/string.h>
137 #include <linux/timer.h>
138 #include <linux/interrupt.h>
139 #include <linux/in.h>
140 #include <linux/delay.h>
141 #include <linux/ethtool.h>
142 #include <linux/netdevice.h>
143 #include <linux/etherdevice.h>
144 #include <linux/skbuff.h>
145 #include <linux/if_arp.h>
146 #include <linux/ioport.h>
147 #include <linux/bitops.h>
149 #include <pcmcia/cs_types.h>
150 #include <pcmcia/cs.h>
151 #include <pcmcia/cisreg.h>
152 #include <pcmcia/cistpl.h>
153 #include <pcmcia/ds.h>
155 #include <asm/uaccess.h>
157 #include <asm/system.h>
159 /* ----------------------------------------------------------------------------
161 ---------------------------------------------------------------------------- */
163 #define ETHER_ADDR_LEN ETH_ALEN
164 /* 6 bytes in an Ethernet Address */
165 #define MACE_LADRF_LEN 8
166 /* 8 bytes in Logical Address Filter */
168 /* Loop Control Defines */
169 #define MACE_MAX_IR_ITERATIONS 10
170 #define MACE_MAX_RX_ITERATIONS 12
172 TBD: Dean brought this up, and I assumed the hardware would
175 If MACE_MAX_RX_ITERATIONS is > 1, rx_framecnt may still be
176 non-zero when the isr exits. We may not get another interrupt
177 to process the remaining packets for some time.
181 The Am2150 has a Xilinx XC3042 field programmable gate array (FPGA)
182 which manages the interface between the MACE and the PCMCIA bus. It
183 also includes buffer management for the 32K x 8 SRAM to control up to
184 four transmit and 12 receive frames at a time.
186 #define AM2150_MAX_TX_FRAMES 4
187 #define AM2150_MAX_RX_FRAMES 12
189 /* Am2150 Ethernet Card I/O Mapping */
190 #define AM2150_RCV 0x00
191 #define AM2150_XMT 0x04
192 #define AM2150_XMT_SKIP 0x09
193 #define AM2150_RCV_NEXT 0x0A
194 #define AM2150_RCV_FRAME_COUNT 0x0B
195 #define AM2150_MACE_BANK 0x0C
196 #define AM2150_MACE_BASE 0x10
199 #define MACE_RCVFIFO 0
200 #define MACE_XMTFIFO 1
206 #define MACE_FIFOFC 7
210 #define MACE_BIUCC 11
211 #define MACE_FIFOCC 12
212 #define MACE_MACCC 13
213 #define MACE_PLSCC 14
214 #define MACE_PHYCC 15
215 #define MACE_CHIPIDL 16
216 #define MACE_CHIPIDH 17
219 #define MACE_LADRF 20
225 #define MACE_RNTPC 26
226 #define MACE_RCVCC 27
233 #define MACE_XMTRC_EXDEF 0x80
234 #define MACE_XMTRC_XMTRC 0x0F
236 #define MACE_XMTFS_XMTSV 0x80
237 #define MACE_XMTFS_UFLO 0x40
238 #define MACE_XMTFS_LCOL 0x20
239 #define MACE_XMTFS_MORE 0x10
240 #define MACE_XMTFS_ONE 0x08
241 #define MACE_XMTFS_DEFER 0x04
242 #define MACE_XMTFS_LCAR 0x02
243 #define MACE_XMTFS_RTRY 0x01
245 #define MACE_RCVFS_RCVSTS 0xF000
246 #define MACE_RCVFS_OFLO 0x8000
247 #define MACE_RCVFS_CLSN 0x4000
248 #define MACE_RCVFS_FRAM 0x2000
249 #define MACE_RCVFS_FCS 0x1000
251 #define MACE_FIFOFC_RCVFC 0xF0
252 #define MACE_FIFOFC_XMTFC 0x0F
254 #define MACE_IR_JAB 0x80
255 #define MACE_IR_BABL 0x40
256 #define MACE_IR_CERR 0x20
257 #define MACE_IR_RCVCCO 0x10
258 #define MACE_IR_RNTPCO 0x08
259 #define MACE_IR_MPCO 0x04
260 #define MACE_IR_RCVINT 0x02
261 #define MACE_IR_XMTINT 0x01
263 #define MACE_MACCC_PROM 0x80
264 #define MACE_MACCC_DXMT2PD 0x40
265 #define MACE_MACCC_EMBA 0x20
266 #define MACE_MACCC_RESERVED 0x10
267 #define MACE_MACCC_DRCVPA 0x08
268 #define MACE_MACCC_DRCVBC 0x04
269 #define MACE_MACCC_ENXMT 0x02
270 #define MACE_MACCC_ENRCV 0x01
272 #define MACE_PHYCC_LNKFL 0x80
273 #define MACE_PHYCC_DLNKTST 0x40
274 #define MACE_PHYCC_REVPOL 0x20
275 #define MACE_PHYCC_DAPC 0x10
276 #define MACE_PHYCC_LRT 0x08
277 #define MACE_PHYCC_ASEL 0x04
278 #define MACE_PHYCC_RWAKE 0x02
279 #define MACE_PHYCC_AWAKE 0x01
281 #define MACE_IAC_ADDRCHG 0x80
282 #define MACE_IAC_PHYADDR 0x04
283 #define MACE_IAC_LOGADDR 0x02
285 #define MACE_UTR_RTRE 0x80
286 #define MACE_UTR_RTRD 0x40
287 #define MACE_UTR_RPA 0x20
288 #define MACE_UTR_FCOLL 0x10
289 #define MACE_UTR_RCVFCSE 0x08
290 #define MACE_UTR_LOOP_INCL_MENDEC 0x06
291 #define MACE_UTR_LOOP_NO_MENDEC 0x04
292 #define MACE_UTR_LOOP_EXTERNAL 0x02
293 #define MACE_UTR_LOOP_NONE 0x00
294 #define MACE_UTR_RESERVED 0x01
296 /* Switch MACE register bank (only 0 and 1 are valid) */
297 #define MACEBANK(win_num) outb((win_num), ioaddr + AM2150_MACE_BANK)
299 #define MACE_IMR_DEFAULT \
310 #undef MACE_IMR_DEFAULT
311 #define MACE_IMR_DEFAULT 0x00 /* New statistics handling: grab everything */
313 #define TX_TIMEOUT ((400*HZ)/1000)
315 /* ----------------------------------------------------------------------------
317 ---------------------------------------------------------------------------- */
319 typedef struct _mace_statistics {
334 /* RFS1--Receive Status (RCVSTS) */
340 /* RFS2--Runt Packet Count (RNTPC) */
343 /* RFS3--Receive Collision Count (RCVCC) */
364 typedef struct _mace_private {
365 struct pcmcia_device *p_dev;
367 struct net_device_stats linux_stats; /* Linux statistics counters */
368 mace_statistics mace_stats; /* MACE chip statistics counters */
370 /* restore_multicast_list() state variables */
371 int multicast_ladrf[MACE_LADRF_LEN]; /* Logical address filter */
372 int multicast_num_addrs;
374 char tx_free_frames; /* Number of free transmit frame buffers */
375 char tx_irq_disabled; /* MACE TX interrupt disabled */
377 spinlock_t bank_lock; /* Must be held if you step off bank 0 */
380 /* ----------------------------------------------------------------------------
381 Private Global Variables
382 ---------------------------------------------------------------------------- */
384 static const char *if_names[]={
385 "Auto", "10baseT", "BNC",
388 /* ----------------------------------------------------------------------------
390 These are the parameters that can be set during loading with
392 ---------------------------------------------------------------------------- */
394 MODULE_DESCRIPTION("New Media PCMCIA ethernet driver");
395 MODULE_LICENSE("GPL");
397 #define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0)
399 /* 0=auto, 1=10baseT, 2 = 10base2, default=auto */
400 INT_MODULE_PARM(if_port, 0);
403 /* ----------------------------------------------------------------------------
405 ---------------------------------------------------------------------------- */
407 static int nmclan_config(struct pcmcia_device *link);
408 static void nmclan_release(struct pcmcia_device *link);
410 static void nmclan_reset(struct net_device *dev);
411 static int mace_config(struct net_device *dev, struct ifmap *map);
412 static int mace_open(struct net_device *dev);
413 static int mace_close(struct net_device *dev);
414 static netdev_tx_t mace_start_xmit(struct sk_buff *skb,
415 struct net_device *dev);
416 static void mace_tx_timeout(struct net_device *dev);
417 static irqreturn_t mace_interrupt(int irq, void *dev_id);
418 static struct net_device_stats *mace_get_stats(struct net_device *dev);
419 static int mace_rx(struct net_device *dev, unsigned char RxCnt);
420 static void restore_multicast_list(struct net_device *dev);
421 static void set_multicast_list(struct net_device *dev);
422 static const struct ethtool_ops netdev_ethtool_ops;
425 static void nmclan_detach(struct pcmcia_device *p_dev);
427 static const struct net_device_ops mace_netdev_ops = {
428 .ndo_open = mace_open,
429 .ndo_stop = mace_close,
430 .ndo_start_xmit = mace_start_xmit,
431 .ndo_tx_timeout = mace_tx_timeout,
432 .ndo_set_config = mace_config,
433 .ndo_get_stats = mace_get_stats,
434 .ndo_set_multicast_list = set_multicast_list,
435 .ndo_change_mtu = eth_change_mtu,
436 .ndo_set_mac_address = eth_mac_addr,
437 .ndo_validate_addr = eth_validate_addr,
440 /* ----------------------------------------------------------------------------
442 Creates an "instance" of the driver, allocating local data
443 structures for one device. The device is registered with Card
445 ---------------------------------------------------------------------------- */
447 static int nmclan_probe(struct pcmcia_device *link)
450 struct net_device *dev;
452 dev_dbg(&link->dev, "nmclan_attach()\n");
454 /* Create new ethernet device */
455 dev = alloc_etherdev(sizeof(mace_private));
458 lp = netdev_priv(dev);
462 spin_lock_init(&lp->bank_lock);
463 link->io.NumPorts1 = 32;
464 link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
465 link->io.IOAddrLines = 5;
466 link->irq.Attributes = IRQ_TYPE_EXCLUSIVE;
467 link->irq.Handler = mace_interrupt;
468 link->conf.Attributes = CONF_ENABLE_IRQ;
469 link->conf.IntType = INT_MEMORY_AND_IO;
470 link->conf.ConfigIndex = 1;
471 link->conf.Present = PRESENT_OPTION;
473 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
475 dev->netdev_ops = &mace_netdev_ops;
476 SET_ETHTOOL_OPS(dev, &netdev_ethtool_ops);
477 dev->watchdog_timeo = TX_TIMEOUT;
479 return nmclan_config(link);
480 } /* nmclan_attach */
482 /* ----------------------------------------------------------------------------
484 This deletes a driver "instance". The device is de-registered
485 with Card Services. If it has been released, all local data
486 structures are freed. Otherwise, the structures will be freed
487 when the device is released.
488 ---------------------------------------------------------------------------- */
490 static void nmclan_detach(struct pcmcia_device *link)
492 struct net_device *dev = link->priv;
494 dev_dbg(&link->dev, "nmclan_detach\n");
497 unregister_netdev(dev);
499 nmclan_release(link);
502 } /* nmclan_detach */
504 /* ----------------------------------------------------------------------------
506 Reads a MACE register. This is bank independent; however, the
507 caller must ensure that this call is not interruptable. We are
508 assuming that during normal operation, the MACE is always in
510 ---------------------------------------------------------------------------- */
511 static int mace_read(mace_private *lp, unsigned int ioaddr, int reg)
517 case 0: /* register 0-15 */
518 data = inb(ioaddr + AM2150_MACE_BASE + reg);
520 case 1: /* register 16-31 */
521 spin_lock_irqsave(&lp->bank_lock, flags);
523 data = inb(ioaddr + AM2150_MACE_BASE + (reg & 0x0F));
525 spin_unlock_irqrestore(&lp->bank_lock, flags);
528 return (data & 0xFF);
531 /* ----------------------------------------------------------------------------
533 Writes to a MACE register. This is bank independent; however,
534 the caller must ensure that this call is not interruptable. We
535 are assuming that during normal operation, the MACE is always in
537 ---------------------------------------------------------------------------- */
538 static void mace_write(mace_private *lp, unsigned int ioaddr, int reg,
544 case 0: /* register 0-15 */
545 outb(data & 0xFF, ioaddr + AM2150_MACE_BASE + reg);
547 case 1: /* register 16-31 */
548 spin_lock_irqsave(&lp->bank_lock, flags);
550 outb(data & 0xFF, ioaddr + AM2150_MACE_BASE + (reg & 0x0F));
552 spin_unlock_irqrestore(&lp->bank_lock, flags);
557 /* ----------------------------------------------------------------------------
559 Resets the MACE chip.
560 ---------------------------------------------------------------------------- */
561 static int mace_init(mace_private *lp, unsigned int ioaddr, char *enet_addr)
566 /* MACE Software reset */
567 mace_write(lp, ioaddr, MACE_BIUCC, 1);
568 while (mace_read(lp, ioaddr, MACE_BIUCC) & 0x01) {
569 /* Wait for reset bit to be cleared automatically after <= 200ns */;
572 printk(KERN_ERR "mace: reset failed, card removed ?\n");
577 mace_write(lp, ioaddr, MACE_BIUCC, 0);
579 /* The Am2150 requires that the MACE FIFOs operate in burst mode. */
580 mace_write(lp, ioaddr, MACE_FIFOCC, 0x0F);
582 mace_write(lp,ioaddr, MACE_RCVFC, 0); /* Disable Auto Strip Receive */
583 mace_write(lp, ioaddr, MACE_IMR, 0xFF); /* Disable all interrupts until _open */
586 * Bit 2-1 PORTSEL[1-0] Port Select.
589 * 10 DAI Port (reserved in Am2150)
591 * For this card, only the first two are valid.
592 * So, PLSCC should be set to
595 * Or just set ASEL in PHYCC below!
599 mace_write(lp, ioaddr, MACE_PLSCC, 0x02);
602 mace_write(lp, ioaddr, MACE_PLSCC, 0x00);
605 mace_write(lp, ioaddr, MACE_PHYCC, /* ASEL */ 4);
606 /* ASEL Auto Select. When set, the PORTSEL[1-0] bits are overridden,
607 and the MACE device will automatically select the operating media
612 mace_write(lp, ioaddr, MACE_IAC, MACE_IAC_ADDRCHG | MACE_IAC_PHYADDR);
613 /* Poll ADDRCHG bit */
615 while (mace_read(lp, ioaddr, MACE_IAC) & MACE_IAC_ADDRCHG)
619 printk(KERN_ERR "mace: ADDRCHG timeout, card removed ?\n");
623 /* Set PADR register */
624 for (i = 0; i < ETHER_ADDR_LEN; i++)
625 mace_write(lp, ioaddr, MACE_PADR, enet_addr[i]);
627 /* MAC Configuration Control Register should be written last */
628 /* Let set_multicast_list set this. */
629 /* mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV); */
630 mace_write(lp, ioaddr, MACE_MACCC, 0x00);
634 /* ----------------------------------------------------------------------------
636 This routine is scheduled to run after a CARD_INSERTION event
637 is received, to configure the PCMCIA socket, and to make the
638 ethernet device available to the system.
639 ---------------------------------------------------------------------------- */
641 static int nmclan_config(struct pcmcia_device *link)
643 struct net_device *dev = link->priv;
644 mace_private *lp = netdev_priv(dev);
650 dev_dbg(&link->dev, "nmclan_config\n");
652 ret = pcmcia_request_io(link, &link->io);
655 ret = pcmcia_request_irq(link, &link->irq);
658 ret = pcmcia_request_configuration(link, &link->conf);
662 dev->irq = link->irq.AssignedIRQ;
663 dev->base_addr = link->io.BasePort1;
665 ioaddr = dev->base_addr;
667 /* Read the ethernet address from the CIS. */
668 len = pcmcia_get_tuple(link, 0x80, &buf);
669 if (!buf || len < ETHER_ADDR_LEN) {
673 memcpy(dev->dev_addr, buf, ETHER_ADDR_LEN);
676 /* Verify configuration by reading the MACE ID. */
680 sig[0] = mace_read(lp, ioaddr, MACE_CHIPIDL);
681 sig[1] = mace_read(lp, ioaddr, MACE_CHIPIDH);
682 if ((sig[0] == 0x40) && ((sig[1] & 0x0F) == 0x09)) {
683 dev_dbg(&link->dev, "nmclan_cs configured: mace id=%x %x\n",
686 printk(KERN_NOTICE "nmclan_cs: mace id not found: %x %x should"
687 " be 0x40 0x?9\n", sig[0], sig[1]);
692 if(mace_init(lp, ioaddr, dev->dev_addr) == -1)
695 /* The if_port symbol can be set when the module is loaded */
697 dev->if_port = if_port;
699 printk(KERN_NOTICE "nmclan_cs: invalid if_port requested\n");
701 link->dev_node = &lp->node;
702 SET_NETDEV_DEV(dev, &link->dev);
704 i = register_netdev(dev);
706 printk(KERN_NOTICE "nmclan_cs: register_netdev() failed\n");
707 link->dev_node = NULL;
711 strcpy(lp->node.dev_name, dev->name);
713 printk(KERN_INFO "%s: nmclan: port %#3lx, irq %d, %s port,"
715 dev->name, dev->base_addr, dev->irq, if_names[dev->if_port],
720 nmclan_release(link);
722 } /* nmclan_config */
724 /* ----------------------------------------------------------------------------
726 After a card is removed, nmclan_release() will unregister the
727 net device, and release the PCMCIA configuration. If the device
728 is still open, this will be postponed until it is closed.
729 ---------------------------------------------------------------------------- */
730 static void nmclan_release(struct pcmcia_device *link)
732 dev_dbg(&link->dev, "nmclan_release\n");
733 pcmcia_disable_device(link);
736 static int nmclan_suspend(struct pcmcia_device *link)
738 struct net_device *dev = link->priv;
741 netif_device_detach(dev);
746 static int nmclan_resume(struct pcmcia_device *link)
748 struct net_device *dev = link->priv;
752 netif_device_attach(dev);
759 /* ----------------------------------------------------------------------------
761 Reset and restore all of the Xilinx and MACE registers.
762 ---------------------------------------------------------------------------- */
763 static void nmclan_reset(struct net_device *dev)
765 mace_private *lp = netdev_priv(dev);
768 struct pcmcia_device *link = &lp->link;
772 /* Save original COR value */
774 reg.Action = CS_READ;
775 reg.Offset = CISREG_COR;
777 pcmcia_access_configuration_register(link, ®);
778 OrigCorValue = reg.Value;
781 reg.Action = CS_WRITE;
782 reg.Offset = CISREG_COR;
783 dev_dbg(&link->dev, "nmclan_reset: OrigCorValue=0x%lX, resetting...\n",
785 reg.Value = COR_SOFT_RESET;
786 pcmcia_access_configuration_register(link, ®);
787 /* Need to wait for 20 ms for PCMCIA to finish reset. */
789 /* Restore original COR configuration index */
790 reg.Value = COR_LEVEL_REQ | (OrigCorValue & COR_CONFIG_MASK);
791 pcmcia_access_configuration_register(link, ®);
792 /* Xilinx is now completely reset along with the MACE chip. */
793 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
795 #endif /* #if RESET_XILINX */
797 /* Xilinx is now completely reset along with the MACE chip. */
798 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
800 /* Reinitialize the MACE chip for operation. */
801 mace_init(lp, dev->base_addr, dev->dev_addr);
802 mace_write(lp, dev->base_addr, MACE_IMR, MACE_IMR_DEFAULT);
804 /* Restore the multicast list and enable TX and RX. */
805 restore_multicast_list(dev);
808 /* ----------------------------------------------------------------------------
810 [Someone tell me what this is supposed to do? Is if_port a defined
811 standard? If so, there should be defines to indicate 1=10Base-T,
812 2=10Base-2, etc. including limited automatic detection.]
813 ---------------------------------------------------------------------------- */
814 static int mace_config(struct net_device *dev, struct ifmap *map)
816 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
817 if (map->port <= 2) {
818 dev->if_port = map->port;
819 printk(KERN_INFO "%s: switched to %s port\n", dev->name,
820 if_names[dev->if_port]);
827 /* ----------------------------------------------------------------------------
830 ---------------------------------------------------------------------------- */
831 static int mace_open(struct net_device *dev)
833 unsigned int ioaddr = dev->base_addr;
834 mace_private *lp = netdev_priv(dev);
835 struct pcmcia_device *link = lp->p_dev;
837 if (!pcmcia_dev_present(link))
844 netif_start_queue(dev);
847 return 0; /* Always succeed */
850 /* ----------------------------------------------------------------------------
852 Closes device driver.
853 ---------------------------------------------------------------------------- */
854 static int mace_close(struct net_device *dev)
856 unsigned int ioaddr = dev->base_addr;
857 mace_private *lp = netdev_priv(dev);
858 struct pcmcia_device *link = lp->p_dev;
860 dev_dbg(&link->dev, "%s: shutting down ethercard.\n", dev->name);
862 /* Mask off all interrupts from the MACE chip. */
863 outb(0xFF, ioaddr + AM2150_MACE_BASE + MACE_IMR);
866 netif_stop_queue(dev);
871 static void netdev_get_drvinfo(struct net_device *dev,
872 struct ethtool_drvinfo *info)
874 strcpy(info->driver, DRV_NAME);
875 strcpy(info->version, DRV_VERSION);
876 sprintf(info->bus_info, "PCMCIA 0x%lx", dev->base_addr);
879 static const struct ethtool_ops netdev_ethtool_ops = {
880 .get_drvinfo = netdev_get_drvinfo,
883 /* ----------------------------------------------------------------------------
885 This routine begins the packet transmit function. When completed,
886 it will generate a transmit interrupt.
888 According to /usr/src/linux/net/inet/dev.c, if _start_xmit
889 returns 0, the "packet is now solely the responsibility of the
890 driver." If _start_xmit returns non-zero, the "transmission
891 failed, put skb back into a list."
892 ---------------------------------------------------------------------------- */
894 static void mace_tx_timeout(struct net_device *dev)
896 mace_private *lp = netdev_priv(dev);
897 struct pcmcia_device *link = lp->p_dev;
899 printk(KERN_NOTICE "%s: transmit timed out -- ", dev->name);
901 printk("resetting card\n");
902 pcmcia_reset_card(link->socket);
903 #else /* #if RESET_ON_TIMEOUT */
904 printk("NOT resetting card\n");
905 #endif /* #if RESET_ON_TIMEOUT */
906 dev->trans_start = jiffies; /* prevent tx timeout */
907 netif_wake_queue(dev);
910 static netdev_tx_t mace_start_xmit(struct sk_buff *skb,
911 struct net_device *dev)
913 mace_private *lp = netdev_priv(dev);
914 unsigned int ioaddr = dev->base_addr;
916 netif_stop_queue(dev);
918 pr_debug("%s: mace_start_xmit(length = %ld) called.\n",
919 dev->name, (long)skb->len);
921 #if (!TX_INTERRUPTABLE)
922 /* Disable MACE TX interrupts. */
923 outb(MACE_IMR_DEFAULT | MACE_IR_XMTINT,
924 ioaddr + AM2150_MACE_BASE + MACE_IMR);
925 lp->tx_irq_disabled=1;
926 #endif /* #if (!TX_INTERRUPTABLE) */
929 /* This block must not be interrupted by another transmit request!
930 mace_tx_timeout will take care of timer-based retransmissions from
931 the upper layers. The interrupt handler is guaranteed never to
932 service a transmit interrupt while we are in here.
935 lp->linux_stats.tx_bytes += skb->len;
936 lp->tx_free_frames--;
938 /* WARNING: Write the _exact_ number of bytes written in the header! */
939 /* Put out the word header [must be an outw()] . . . */
940 outw(skb->len, ioaddr + AM2150_XMT);
941 /* . . . and the packet [may be any combination of outw() and outb()] */
942 outsw(ioaddr + AM2150_XMT, skb->data, skb->len >> 1);
944 /* Odd byte transfer */
945 outb(skb->data[skb->len-1], ioaddr + AM2150_XMT);
949 if (lp->tx_free_frames > 0)
950 netif_start_queue(dev);
951 #endif /* #if MULTI_TX */
954 #if (!TX_INTERRUPTABLE)
955 /* Re-enable MACE TX interrupts. */
956 lp->tx_irq_disabled=0;
957 outb(MACE_IMR_DEFAULT, ioaddr + AM2150_MACE_BASE + MACE_IMR);
958 #endif /* #if (!TX_INTERRUPTABLE) */
963 } /* mace_start_xmit */
965 /* ----------------------------------------------------------------------------
967 The interrupt handler.
968 ---------------------------------------------------------------------------- */
969 static irqreturn_t mace_interrupt(int irq, void *dev_id)
971 struct net_device *dev = (struct net_device *) dev_id;
972 mace_private *lp = netdev_priv(dev);
975 int IntrCnt = MACE_MAX_IR_ITERATIONS;
978 pr_debug("mace_interrupt(): irq 0x%X for unknown device.\n",
983 ioaddr = dev->base_addr;
985 if (lp->tx_irq_disabled) {
987 (lp->tx_irq_disabled?
988 KERN_NOTICE "%s: Interrupt with tx_irq_disabled "
989 "[isr=%02X, imr=%02X]\n":
990 KERN_NOTICE "%s: Re-entering the interrupt handler "
991 "[isr=%02X, imr=%02X]\n"),
993 inb(ioaddr + AM2150_MACE_BASE + MACE_IR),
994 inb(ioaddr + AM2150_MACE_BASE + MACE_IMR)
996 /* WARNING: MACE_IR has been read! */
1000 if (!netif_device_present(dev)) {
1001 pr_debug("%s: interrupt from dead card\n", dev->name);
1006 /* WARNING: MACE_IR is a READ/CLEAR port! */
1007 status = inb(ioaddr + AM2150_MACE_BASE + MACE_IR);
1009 pr_debug("mace_interrupt: irq 0x%X status 0x%X.\n", irq, status);
1011 if (status & MACE_IR_RCVINT) {
1012 mace_rx(dev, MACE_MAX_RX_ITERATIONS);
1015 if (status & MACE_IR_XMTINT) {
1016 unsigned char fifofc;
1017 unsigned char xmtrc;
1018 unsigned char xmtfs;
1020 fifofc = inb(ioaddr + AM2150_MACE_BASE + MACE_FIFOFC);
1021 if ((fifofc & MACE_FIFOFC_XMTFC)==0) {
1022 lp->linux_stats.tx_errors++;
1023 outb(0xFF, ioaddr + AM2150_XMT_SKIP);
1026 /* Transmit Retry Count (XMTRC, reg 4) */
1027 xmtrc = inb(ioaddr + AM2150_MACE_BASE + MACE_XMTRC);
1028 if (xmtrc & MACE_XMTRC_EXDEF) lp->mace_stats.exdef++;
1029 lp->mace_stats.xmtrc += (xmtrc & MACE_XMTRC_XMTRC);
1032 (xmtfs = inb(ioaddr + AM2150_MACE_BASE + MACE_XMTFS)) &
1033 MACE_XMTFS_XMTSV /* Transmit Status Valid */
1035 lp->mace_stats.xmtsv++;
1037 if (xmtfs & ~MACE_XMTFS_XMTSV) {
1038 if (xmtfs & MACE_XMTFS_UFLO) {
1039 /* Underflow. Indicates that the Transmit FIFO emptied before
1040 the end of frame was reached. */
1041 lp->mace_stats.uflo++;
1043 if (xmtfs & MACE_XMTFS_LCOL) {
1044 /* Late Collision */
1045 lp->mace_stats.lcol++;
1047 if (xmtfs & MACE_XMTFS_MORE) {
1048 /* MORE than one retry was needed */
1049 lp->mace_stats.more++;
1051 if (xmtfs & MACE_XMTFS_ONE) {
1052 /* Exactly ONE retry occurred */
1053 lp->mace_stats.one++;
1055 if (xmtfs & MACE_XMTFS_DEFER) {
1056 /* Transmission was defered */
1057 lp->mace_stats.defer++;
1059 if (xmtfs & MACE_XMTFS_LCAR) {
1060 /* Loss of carrier */
1061 lp->mace_stats.lcar++;
1063 if (xmtfs & MACE_XMTFS_RTRY) {
1064 /* Retry error: transmit aborted after 16 attempts */
1065 lp->mace_stats.rtry++;
1067 } /* if (xmtfs & ~MACE_XMTFS_XMTSV) */
1069 } /* if (xmtfs & MACE_XMTFS_XMTSV) */
1071 lp->linux_stats.tx_packets++;
1072 lp->tx_free_frames++;
1073 netif_wake_queue(dev);
1074 } /* if (status & MACE_IR_XMTINT) */
1076 if (status & ~MACE_IMR_DEFAULT & ~MACE_IR_RCVINT & ~MACE_IR_XMTINT) {
1077 if (status & MACE_IR_JAB) {
1078 /* Jabber Error. Excessive transmit duration (20-150ms). */
1079 lp->mace_stats.jab++;
1081 if (status & MACE_IR_BABL) {
1082 /* Babble Error. >1518 bytes transmitted. */
1083 lp->mace_stats.babl++;
1085 if (status & MACE_IR_CERR) {
1086 /* Collision Error. CERR indicates the absence of the
1087 Signal Quality Error Test message after a packet
1089 lp->mace_stats.cerr++;
1091 if (status & MACE_IR_RCVCCO) {
1092 /* Receive Collision Count Overflow; */
1093 lp->mace_stats.rcvcco++;
1095 if (status & MACE_IR_RNTPCO) {
1096 /* Runt Packet Count Overflow */
1097 lp->mace_stats.rntpco++;
1099 if (status & MACE_IR_MPCO) {
1100 /* Missed Packet Count Overflow */
1101 lp->mace_stats.mpco++;
1103 } /* if (status & ~MACE_IMR_DEFAULT & ~MACE_IR_RCVINT & ~MACE_IR_XMTINT) */
1105 } while ((status & ~MACE_IMR_DEFAULT) && (--IntrCnt));
1108 } /* mace_interrupt */
1110 /* ----------------------------------------------------------------------------
1113 ---------------------------------------------------------------------------- */
1114 static int mace_rx(struct net_device *dev, unsigned char RxCnt)
1116 mace_private *lp = netdev_priv(dev);
1117 unsigned int ioaddr = dev->base_addr;
1118 unsigned char rx_framecnt;
1119 unsigned short rx_status;
1122 ((rx_framecnt = inb(ioaddr + AM2150_RCV_FRAME_COUNT)) > 0) &&
1123 (rx_framecnt <= 12) && /* rx_framecnt==0xFF if card is extracted. */
1126 rx_status = inw(ioaddr + AM2150_RCV);
1128 pr_debug("%s: in mace_rx(), framecnt 0x%X, rx_status"
1129 " 0x%X.\n", dev->name, rx_framecnt, rx_status);
1131 if (rx_status & MACE_RCVFS_RCVSTS) { /* Error, update stats. */
1132 lp->linux_stats.rx_errors++;
1133 if (rx_status & MACE_RCVFS_OFLO) {
1134 lp->mace_stats.oflo++;
1136 if (rx_status & MACE_RCVFS_CLSN) {
1137 lp->mace_stats.clsn++;
1139 if (rx_status & MACE_RCVFS_FRAM) {
1140 lp->mace_stats.fram++;
1142 if (rx_status & MACE_RCVFS_FCS) {
1143 lp->mace_stats.fcs++;
1146 short pkt_len = (rx_status & ~MACE_RCVFS_RCVSTS) - 4;
1147 /* Auto Strip is off, always subtract 4 */
1148 struct sk_buff *skb;
1150 lp->mace_stats.rfs_rntpc += inb(ioaddr + AM2150_RCV);
1151 /* runt packet count */
1152 lp->mace_stats.rfs_rcvcc += inb(ioaddr + AM2150_RCV);
1153 /* rcv collision count */
1155 pr_debug(" receiving packet size 0x%X rx_status"
1156 " 0x%X.\n", pkt_len, rx_status);
1158 skb = dev_alloc_skb(pkt_len+2);
1161 skb_reserve(skb, 2);
1162 insw(ioaddr + AM2150_RCV, skb_put(skb, pkt_len), pkt_len>>1);
1164 *(skb_tail_pointer(skb) - 1) = inb(ioaddr + AM2150_RCV);
1165 skb->protocol = eth_type_trans(skb, dev);
1167 netif_rx(skb); /* Send the packet to the upper (protocol) layers. */
1169 lp->linux_stats.rx_packets++;
1170 lp->linux_stats.rx_bytes += pkt_len;
1171 outb(0xFF, ioaddr + AM2150_RCV_NEXT); /* skip to next frame */
1174 pr_debug("%s: couldn't allocate a sk_buff of size"
1175 " %d.\n", dev->name, pkt_len);
1176 lp->linux_stats.rx_dropped++;
1179 outb(0xFF, ioaddr + AM2150_RCV_NEXT); /* skip to next frame */
1185 /* ----------------------------------------------------------------------------
1187 ---------------------------------------------------------------------------- */
1188 static void pr_linux_stats(struct net_device_stats *pstats)
1190 pr_debug("pr_linux_stats\n");
1191 pr_debug(" rx_packets=%-7ld tx_packets=%ld\n",
1192 (long)pstats->rx_packets, (long)pstats->tx_packets);
1193 pr_debug(" rx_errors=%-7ld tx_errors=%ld\n",
1194 (long)pstats->rx_errors, (long)pstats->tx_errors);
1195 pr_debug(" rx_dropped=%-7ld tx_dropped=%ld\n",
1196 (long)pstats->rx_dropped, (long)pstats->tx_dropped);
1197 pr_debug(" multicast=%-7ld collisions=%ld\n",
1198 (long)pstats->multicast, (long)pstats->collisions);
1200 pr_debug(" rx_length_errors=%-7ld rx_over_errors=%ld\n",
1201 (long)pstats->rx_length_errors, (long)pstats->rx_over_errors);
1202 pr_debug(" rx_crc_errors=%-7ld rx_frame_errors=%ld\n",
1203 (long)pstats->rx_crc_errors, (long)pstats->rx_frame_errors);
1204 pr_debug(" rx_fifo_errors=%-7ld rx_missed_errors=%ld\n",
1205 (long)pstats->rx_fifo_errors, (long)pstats->rx_missed_errors);
1207 pr_debug(" tx_aborted_errors=%-7ld tx_carrier_errors=%ld\n",
1208 (long)pstats->tx_aborted_errors, (long)pstats->tx_carrier_errors);
1209 pr_debug(" tx_fifo_errors=%-7ld tx_heartbeat_errors=%ld\n",
1210 (long)pstats->tx_fifo_errors, (long)pstats->tx_heartbeat_errors);
1211 pr_debug(" tx_window_errors=%ld\n",
1212 (long)pstats->tx_window_errors);
1213 } /* pr_linux_stats */
1215 /* ----------------------------------------------------------------------------
1217 ---------------------------------------------------------------------------- */
1218 static void pr_mace_stats(mace_statistics *pstats)
1220 pr_debug("pr_mace_stats\n");
1222 pr_debug(" xmtsv=%-7d uflo=%d\n",
1223 pstats->xmtsv, pstats->uflo);
1224 pr_debug(" lcol=%-7d more=%d\n",
1225 pstats->lcol, pstats->more);
1226 pr_debug(" one=%-7d defer=%d\n",
1227 pstats->one, pstats->defer);
1228 pr_debug(" lcar=%-7d rtry=%d\n",
1229 pstats->lcar, pstats->rtry);
1232 pr_debug(" exdef=%-7d xmtrc=%d\n",
1233 pstats->exdef, pstats->xmtrc);
1235 /* RFS1--Receive Status (RCVSTS) */
1236 pr_debug(" oflo=%-7d clsn=%d\n",
1237 pstats->oflo, pstats->clsn);
1238 pr_debug(" fram=%-7d fcs=%d\n",
1239 pstats->fram, pstats->fcs);
1241 /* RFS2--Runt Packet Count (RNTPC) */
1242 /* RFS3--Receive Collision Count (RCVCC) */
1243 pr_debug(" rfs_rntpc=%-7d rfs_rcvcc=%d\n",
1244 pstats->rfs_rntpc, pstats->rfs_rcvcc);
1247 pr_debug(" jab=%-7d babl=%d\n",
1248 pstats->jab, pstats->babl);
1249 pr_debug(" cerr=%-7d rcvcco=%d\n",
1250 pstats->cerr, pstats->rcvcco);
1251 pr_debug(" rntpco=%-7d mpco=%d\n",
1252 pstats->rntpco, pstats->mpco);
1255 pr_debug(" mpc=%d\n", pstats->mpc);
1258 pr_debug(" rntpc=%d\n", pstats->rntpc);
1261 pr_debug(" rcvcc=%d\n", pstats->rcvcc);
1263 } /* pr_mace_stats */
1265 /* ----------------------------------------------------------------------------
1267 Update statistics. We change to register window 1, so this
1268 should be run single-threaded if the device is active. This is
1269 expected to be a rare operation, and it's simpler for the rest
1270 of the driver to assume that window 0 is always valid rather
1271 than use a special window-state variable.
1273 oflo & uflo should _never_ occur since it would mean the Xilinx
1274 was not able to transfer data between the MACE FIFO and the
1275 card's SRAM fast enough. If this happens, something is
1276 seriously wrong with the hardware.
1277 ---------------------------------------------------------------------------- */
1278 static void update_stats(unsigned int ioaddr, struct net_device *dev)
1280 mace_private *lp = netdev_priv(dev);
1282 lp->mace_stats.rcvcc += mace_read(lp, ioaddr, MACE_RCVCC);
1283 lp->mace_stats.rntpc += mace_read(lp, ioaddr, MACE_RNTPC);
1284 lp->mace_stats.mpc += mace_read(lp, ioaddr, MACE_MPC);
1285 /* At this point, mace_stats is fully updated for this call.
1286 We may now update the linux_stats. */
1288 /* The MACE has no equivalent for linux_stats field which are commented
1291 /* lp->linux_stats.multicast; */
1292 lp->linux_stats.collisions =
1293 lp->mace_stats.rcvcco * 256 + lp->mace_stats.rcvcc;
1294 /* Collision: The MACE may retry sending a packet 15 times
1295 before giving up. The retry count is in XMTRC.
1296 Does each retry constitute a collision?
1297 If so, why doesn't the RCVCC record these collisions? */
1299 /* detailed rx_errors: */
1300 lp->linux_stats.rx_length_errors =
1301 lp->mace_stats.rntpco * 256 + lp->mace_stats.rntpc;
1302 /* lp->linux_stats.rx_over_errors */
1303 lp->linux_stats.rx_crc_errors = lp->mace_stats.fcs;
1304 lp->linux_stats.rx_frame_errors = lp->mace_stats.fram;
1305 lp->linux_stats.rx_fifo_errors = lp->mace_stats.oflo;
1306 lp->linux_stats.rx_missed_errors =
1307 lp->mace_stats.mpco * 256 + lp->mace_stats.mpc;
1309 /* detailed tx_errors */
1310 lp->linux_stats.tx_aborted_errors = lp->mace_stats.rtry;
1311 lp->linux_stats.tx_carrier_errors = lp->mace_stats.lcar;
1312 /* LCAR usually results from bad cabling. */
1313 lp->linux_stats.tx_fifo_errors = lp->mace_stats.uflo;
1314 lp->linux_stats.tx_heartbeat_errors = lp->mace_stats.cerr;
1315 /* lp->linux_stats.tx_window_errors; */
1316 } /* update_stats */
1318 /* ----------------------------------------------------------------------------
1320 Gathers ethernet statistics from the MACE chip.
1321 ---------------------------------------------------------------------------- */
1322 static struct net_device_stats *mace_get_stats(struct net_device *dev)
1324 mace_private *lp = netdev_priv(dev);
1326 update_stats(dev->base_addr, dev);
1328 pr_debug("%s: updating the statistics.\n", dev->name);
1329 pr_linux_stats(&lp->linux_stats);
1330 pr_mace_stats(&lp->mace_stats);
1332 return &lp->linux_stats;
1333 } /* net_device_stats */
1335 /* ----------------------------------------------------------------------------
1337 Modified from Am79C90 data sheet.
1338 ---------------------------------------------------------------------------- */
1340 #ifdef BROKEN_MULTICAST
1342 static void updateCRC(int *CRC, int bit)
1349 }; /* CRC polynomial. poly[n] = coefficient of the x**n term of the
1350 CRC generator polynomial. */
1354 /* shift CRC and control bit (CRC[32]) */
1355 for (j = 32; j > 0; j--)
1359 /* If bit XOR(control bit) = 1, set CRC = CRC XOR polynomial. */
1361 for (j = 0; j < 32; j++)
1365 /* ----------------------------------------------------------------------------
1367 Build logical address filter.
1368 Modified from Am79C90 data sheet.
1371 ladrf: logical address filter (contents initialized to 0)
1372 adr: ethernet address
1373 ---------------------------------------------------------------------------- */
1374 static void BuildLAF(int *ladrf, int *adr)
1376 int CRC[33]={1}; /* CRC register, 1 word/bit + extra control bit */
1378 int i, byte; /* temporary array indices */
1379 int hashcode; /* the output object */
1383 for (byte = 0; byte < 6; byte++)
1384 for (i = 0; i < 8; i++)
1385 updateCRC(CRC, (adr[byte] >> i) & 1);
1388 for (i = 0; i < 6; i++)
1389 hashcode = (hashcode << 1) + CRC[i];
1391 byte = hashcode >> 3;
1392 ladrf[byte] |= (1 << (hashcode & 7));
1396 printk(KERN_DEBUG " adr =%pM\n", adr);
1397 printk(KERN_DEBUG " hashcode = %d(decimal), ladrf[0:63] =", hashcode);
1398 for (i = 0; i < 8; i++)
1399 printk(KERN_CONT " %02X", ladrf[i]);
1400 printk(KERN_CONT "\n");
1404 /* ----------------------------------------------------------------------------
1405 restore_multicast_list
1406 Restores the multicast filter for MACE chip to the last
1407 set_multicast_list() call.
1412 ---------------------------------------------------------------------------- */
1413 static void restore_multicast_list(struct net_device *dev)
1415 mace_private *lp = netdev_priv(dev);
1416 int num_addrs = lp->multicast_num_addrs;
1417 int *ladrf = lp->multicast_ladrf;
1418 unsigned int ioaddr = dev->base_addr;
1421 pr_debug("%s: restoring Rx mode to %d addresses.\n",
1422 dev->name, num_addrs);
1424 if (num_addrs > 0) {
1426 pr_debug("Attempt to restore multicast list detected.\n");
1428 mace_write(lp, ioaddr, MACE_IAC, MACE_IAC_ADDRCHG | MACE_IAC_LOGADDR);
1429 /* Poll ADDRCHG bit */
1430 while (mace_read(lp, ioaddr, MACE_IAC) & MACE_IAC_ADDRCHG)
1432 /* Set LADRF register */
1433 for (i = 0; i < MACE_LADRF_LEN; i++)
1434 mace_write(lp, ioaddr, MACE_LADRF, ladrf[i]);
1436 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_RCVFCSE | MACE_UTR_LOOP_EXTERNAL);
1437 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1439 } else if (num_addrs < 0) {
1441 /* Promiscuous mode: receive all packets */
1442 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1443 mace_write(lp, ioaddr, MACE_MACCC,
1444 MACE_MACCC_PROM | MACE_MACCC_ENXMT | MACE_MACCC_ENRCV
1450 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1451 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1454 } /* restore_multicast_list */
1456 /* ----------------------------------------------------------------------------
1458 Set or clear the multicast filter for this adaptor.
1461 num_addrs == -1 Promiscuous mode, receive all packets
1462 num_addrs == 0 Normal mode, clear multicast list
1463 num_addrs > 0 Multicast mode, receive normal and MC packets, and do
1464 best-effort filtering.
1468 ---------------------------------------------------------------------------- */
1470 static void set_multicast_list(struct net_device *dev)
1472 mace_private *lp = netdev_priv(dev);
1473 int adr[ETHER_ADDR_LEN] = {0}; /* Ethernet address */
1474 struct netdev_hw_addr *ha;
1479 if (netdev_mc_count(dev) != old) {
1480 old = netdev_mc_count(dev);
1481 pr_debug("%s: setting Rx mode to %d addresses.\n",
1487 /* Set multicast_num_addrs. */
1488 lp->multicast_num_addrs = netdev_mc_count(dev);
1490 /* Set multicast_ladrf. */
1491 if (num_addrs > 0) {
1492 /* Calculate multicast logical address filter */
1493 memset(lp->multicast_ladrf, 0, MACE_LADRF_LEN);
1494 netdev_for_each_mc_addr(ha, dev) {
1495 memcpy(adr, ha->addr, ETHER_ADDR_LEN);
1496 BuildLAF(lp->multicast_ladrf, adr);
1500 restore_multicast_list(dev);
1502 } /* set_multicast_list */
1504 #endif /* BROKEN_MULTICAST */
1506 static void restore_multicast_list(struct net_device *dev)
1508 unsigned int ioaddr = dev->base_addr;
1509 mace_private *lp = netdev_priv(dev);
1511 pr_debug("%s: restoring Rx mode to %d addresses.\n", dev->name,
1512 lp->multicast_num_addrs);
1514 if (dev->flags & IFF_PROMISC) {
1515 /* Promiscuous mode: receive all packets */
1516 mace_write(lp,ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1517 mace_write(lp, ioaddr, MACE_MACCC,
1518 MACE_MACCC_PROM | MACE_MACCC_ENXMT | MACE_MACCC_ENRCV
1522 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1523 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1525 } /* restore_multicast_list */
1527 static void set_multicast_list(struct net_device *dev)
1529 mace_private *lp = netdev_priv(dev);
1534 if (netdev_mc_count(dev) != old) {
1535 old = netdev_mc_count(dev);
1536 pr_debug("%s: setting Rx mode to %d addresses.\n",
1542 lp->multicast_num_addrs = netdev_mc_count(dev);
1543 restore_multicast_list(dev);
1545 } /* set_multicast_list */
1547 static struct pcmcia_device_id nmclan_ids[] = {
1548 PCMCIA_DEVICE_PROD_ID12("New Media Corporation", "Ethernet", 0x085a850b, 0x00b2e941),
1549 PCMCIA_DEVICE_PROD_ID12("Portable Add-ons", "Ethernet+", 0xebf1d60, 0xad673aaf),
1552 MODULE_DEVICE_TABLE(pcmcia, nmclan_ids);
1554 static struct pcmcia_driver nmclan_cs_driver = {
1555 .owner = THIS_MODULE,
1557 .name = "nmclan_cs",
1559 .probe = nmclan_probe,
1560 .remove = nmclan_detach,
1561 .id_table = nmclan_ids,
1562 .suspend = nmclan_suspend,
1563 .resume = nmclan_resume,
1566 static int __init init_nmclan_cs(void)
1568 return pcmcia_register_driver(&nmclan_cs_driver);
1571 static void __exit exit_nmclan_cs(void)
1573 pcmcia_unregister_driver(&nmclan_cs_driver);
1576 module_init(init_nmclan_cs);
1577 module_exit(exit_nmclan_cs);