pasemi_mac: Add msglevel support and "debug" module param
[safe/jmp/linux-2.6] / drivers / net / pasemi_mac.c
1 /*
2  * Copyright (C) 2006-2007 PA Semi, Inc
3  *
4  * Driver for the PA Semi PWRficient onchip 1G/10G Ethernet MACs
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
18  */
19
20 #include <linux/init.h>
21 #include <linux/module.h>
22 #include <linux/pci.h>
23 #include <linux/interrupt.h>
24 #include <linux/dmaengine.h>
25 #include <linux/delay.h>
26 #include <linux/netdevice.h>
27 #include <linux/etherdevice.h>
28 #include <asm/dma-mapping.h>
29 #include <linux/in.h>
30 #include <linux/skbuff.h>
31
32 #include <linux/ip.h>
33 #include <linux/tcp.h>
34 #include <net/checksum.h>
35
36 #include <asm/irq.h>
37
38 #include "pasemi_mac.h"
39
40
41 /* TODO list
42  *
43  * - Get rid of pci_{read,write}_config(), map registers with ioremap
44  *   for performance
45  * - PHY support
46  * - Multicast support
47  * - Large MTU support
48  * - Other performance improvements
49  */
50
51
52 /* Must be a power of two */
53 #define RX_RING_SIZE 512
54 #define TX_RING_SIZE 512
55
56 #define DEFAULT_MSG_ENABLE        \
57         (NETIF_MSG_DRV          | \
58          NETIF_MSG_PROBE        | \
59          NETIF_MSG_LINK         | \
60          NETIF_MSG_TIMER        | \
61          NETIF_MSG_IFDOWN       | \
62          NETIF_MSG_IFUP         | \
63          NETIF_MSG_RX_ERR       | \
64          NETIF_MSG_TX_ERR)
65
66 #define TX_DESC(mac, num)       ((mac)->tx->desc[(num) & (TX_RING_SIZE-1)])
67 #define TX_DESC_INFO(mac, num)  ((mac)->tx->desc_info[(num) & (TX_RING_SIZE-1)])
68 #define RX_DESC(mac, num)       ((mac)->rx->desc[(num) & (RX_RING_SIZE-1)])
69 #define RX_DESC_INFO(mac, num)  ((mac)->rx->desc_info[(num) & (RX_RING_SIZE-1)])
70 #define RX_BUFF(mac, num)       ((mac)->rx->buffers[(num) & (RX_RING_SIZE-1)])
71
72 #define BUF_SIZE 1646 /* 1500 MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
73
74 MODULE_LICENSE("GPL");
75 MODULE_AUTHOR ("Olof Johansson <olof@lixom.net>");
76 MODULE_DESCRIPTION("PA Semi PWRficient Ethernet driver");
77
78 static int debug = -1;  /* -1 == use DEFAULT_MSG_ENABLE as value */
79 module_param(debug, int, 0);
80 MODULE_PARM_DESC(debug, "PA Semi MAC bitmapped debugging message enable value");
81
82 static struct pasdma_status *dma_status;
83
84 static int pasemi_get_mac_addr(struct pasemi_mac *mac)
85 {
86         struct pci_dev *pdev = mac->pdev;
87         struct device_node *dn = pci_device_to_OF_node(pdev);
88         const u8 *maddr;
89         u8 addr[6];
90
91         if (!dn) {
92                 dev_dbg(&pdev->dev,
93                           "No device node for mac, not configuring\n");
94                 return -ENOENT;
95         }
96
97         maddr = get_property(dn, "mac-address", NULL);
98         if (maddr == NULL) {
99                 dev_warn(&pdev->dev,
100                          "no mac address in device tree, not configuring\n");
101                 return -ENOENT;
102         }
103
104         if (sscanf(maddr, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", &addr[0],
105                    &addr[1], &addr[2], &addr[3], &addr[4], &addr[5]) != 6) {
106                 dev_warn(&pdev->dev,
107                          "can't parse mac address, not configuring\n");
108                 return -EINVAL;
109         }
110
111         memcpy(mac->mac_addr, addr, sizeof(addr));
112         return 0;
113 }
114
115 static int pasemi_mac_setup_rx_resources(struct net_device *dev)
116 {
117         struct pasemi_mac_rxring *ring;
118         struct pasemi_mac *mac = netdev_priv(dev);
119         int chan_id = mac->dma_rxch;
120
121         ring = kzalloc(sizeof(*ring), GFP_KERNEL);
122
123         if (!ring)
124                 goto out_ring;
125
126         spin_lock_init(&ring->lock);
127
128         ring->desc_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
129                                   RX_RING_SIZE, GFP_KERNEL);
130
131         if (!ring->desc_info)
132                 goto out_desc_info;
133
134         /* Allocate descriptors */
135         ring->desc = dma_alloc_coherent(&mac->dma_pdev->dev,
136                                         RX_RING_SIZE *
137                                         sizeof(struct pas_dma_xct_descr),
138                                         &ring->dma, GFP_KERNEL);
139
140         if (!ring->desc)
141                 goto out_desc;
142
143         memset(ring->desc, 0, RX_RING_SIZE * sizeof(struct pas_dma_xct_descr));
144
145         ring->buffers = dma_alloc_coherent(&mac->dma_pdev->dev,
146                                            RX_RING_SIZE * sizeof(u64),
147                                            &ring->buf_dma, GFP_KERNEL);
148         if (!ring->buffers)
149                 goto out_buffers;
150
151         memset(ring->buffers, 0, RX_RING_SIZE * sizeof(u64));
152
153         pci_write_config_dword(mac->dma_pdev, PAS_DMA_RXCHAN_BASEL(chan_id),
154                                PAS_DMA_RXCHAN_BASEL_BRBL(ring->dma));
155
156         pci_write_config_dword(mac->dma_pdev, PAS_DMA_RXCHAN_BASEU(chan_id),
157                                PAS_DMA_RXCHAN_BASEU_BRBH(ring->dma >> 32) |
158                                PAS_DMA_RXCHAN_BASEU_SIZ(RX_RING_SIZE >> 2));
159
160         pci_write_config_dword(mac->dma_pdev, PAS_DMA_RXCHAN_CFG(chan_id),
161                                PAS_DMA_RXCHAN_CFG_HBU(1));
162
163         pci_write_config_dword(mac->dma_pdev, PAS_DMA_RXINT_BASEL(mac->dma_if),
164                                PAS_DMA_RXINT_BASEL_BRBL(__pa(ring->buffers)));
165
166         pci_write_config_dword(mac->dma_pdev, PAS_DMA_RXINT_BASEU(mac->dma_if),
167                                PAS_DMA_RXINT_BASEU_BRBH(__pa(ring->buffers) >> 32) |
168                                PAS_DMA_RXINT_BASEU_SIZ(RX_RING_SIZE >> 3));
169
170         ring->next_to_fill = 0;
171         ring->next_to_clean = 0;
172
173         snprintf(ring->irq_name, sizeof(ring->irq_name),
174                  "%s rx", dev->name);
175         mac->rx = ring;
176
177         return 0;
178
179 out_buffers:
180         dma_free_coherent(&mac->dma_pdev->dev,
181                           RX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
182                           mac->rx->desc, mac->rx->dma);
183 out_desc:
184         kfree(ring->desc_info);
185 out_desc_info:
186         kfree(ring);
187 out_ring:
188         return -ENOMEM;
189 }
190
191
192 static int pasemi_mac_setup_tx_resources(struct net_device *dev)
193 {
194         struct pasemi_mac *mac = netdev_priv(dev);
195         u32 val;
196         int chan_id = mac->dma_txch;
197         struct pasemi_mac_txring *ring;
198
199         ring = kzalloc(sizeof(*ring), GFP_KERNEL);
200         if (!ring)
201                 goto out_ring;
202
203         spin_lock_init(&ring->lock);
204
205         ring->desc_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
206                                   TX_RING_SIZE, GFP_KERNEL);
207         if (!ring->desc_info)
208                 goto out_desc_info;
209
210         /* Allocate descriptors */
211         ring->desc = dma_alloc_coherent(&mac->dma_pdev->dev,
212                                         TX_RING_SIZE *
213                                         sizeof(struct pas_dma_xct_descr),
214                                         &ring->dma, GFP_KERNEL);
215         if (!ring->desc)
216                 goto out_desc;
217
218         memset(ring->desc, 0, TX_RING_SIZE * sizeof(struct pas_dma_xct_descr));
219
220         pci_write_config_dword(mac->dma_pdev, PAS_DMA_TXCHAN_BASEL(chan_id),
221                                PAS_DMA_TXCHAN_BASEL_BRBL(ring->dma));
222         val = PAS_DMA_TXCHAN_BASEU_BRBH(ring->dma >> 32);
223         val |= PAS_DMA_TXCHAN_BASEU_SIZ(TX_RING_SIZE >> 2);
224
225         pci_write_config_dword(mac->dma_pdev, PAS_DMA_TXCHAN_BASEU(chan_id), val);
226
227         pci_write_config_dword(mac->dma_pdev, PAS_DMA_TXCHAN_CFG(chan_id),
228                                PAS_DMA_TXCHAN_CFG_TY_IFACE |
229                                PAS_DMA_TXCHAN_CFG_TATTR(mac->dma_if) |
230                                PAS_DMA_TXCHAN_CFG_UP |
231                                PAS_DMA_TXCHAN_CFG_WT(2));
232
233         ring->next_to_use = 0;
234         ring->next_to_clean = 0;
235
236         snprintf(ring->irq_name, sizeof(ring->irq_name),
237                  "%s tx", dev->name);
238         mac->tx = ring;
239
240         return 0;
241
242 out_desc:
243         kfree(ring->desc_info);
244 out_desc_info:
245         kfree(ring);
246 out_ring:
247         return -ENOMEM;
248 }
249
250 static void pasemi_mac_free_tx_resources(struct net_device *dev)
251 {
252         struct pasemi_mac *mac = netdev_priv(dev);
253         unsigned int i;
254         struct pasemi_mac_buffer *info;
255         struct pas_dma_xct_descr *dp;
256
257         for (i = 0; i < TX_RING_SIZE; i++) {
258                 info = &TX_DESC_INFO(mac, i);
259                 dp = &TX_DESC(mac, i);
260                 if (info->dma) {
261                         if (info->skb) {
262                                 pci_unmap_single(mac->dma_pdev,
263                                                  info->dma,
264                                                  info->skb->len,
265                                                  PCI_DMA_TODEVICE);
266                                 dev_kfree_skb_any(info->skb);
267                         }
268                         info->dma = 0;
269                         info->skb = NULL;
270                         dp->mactx = 0;
271                         dp->ptr = 0;
272                 }
273         }
274
275         dma_free_coherent(&mac->dma_pdev->dev,
276                           TX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
277                           mac->tx->desc, mac->tx->dma);
278
279         kfree(mac->tx->desc_info);
280         kfree(mac->tx);
281         mac->tx = NULL;
282 }
283
284 static void pasemi_mac_free_rx_resources(struct net_device *dev)
285 {
286         struct pasemi_mac *mac = netdev_priv(dev);
287         unsigned int i;
288         struct pasemi_mac_buffer *info;
289         struct pas_dma_xct_descr *dp;
290
291         for (i = 0; i < RX_RING_SIZE; i++) {
292                 info = &RX_DESC_INFO(mac, i);
293                 dp = &RX_DESC(mac, i);
294                 if (info->skb) {
295                         if (info->dma) {
296                                 pci_unmap_single(mac->dma_pdev,
297                                                  info->dma,
298                                                  info->skb->len,
299                                                  PCI_DMA_FROMDEVICE);
300                                 dev_kfree_skb_any(info->skb);
301                         }
302                         info->dma = 0;
303                         info->skb = NULL;
304                         dp->macrx = 0;
305                         dp->ptr = 0;
306                 }
307         }
308
309         dma_free_coherent(&mac->dma_pdev->dev,
310                           RX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
311                           mac->rx->desc, mac->rx->dma);
312
313         dma_free_coherent(&mac->dma_pdev->dev, RX_RING_SIZE * sizeof(u64),
314                           mac->rx->buffers, mac->rx->buf_dma);
315
316         kfree(mac->rx->desc_info);
317         kfree(mac->rx);
318         mac->rx = NULL;
319 }
320
321 static void pasemi_mac_replenish_rx_ring(struct net_device *dev)
322 {
323         struct pasemi_mac *mac = netdev_priv(dev);
324         unsigned int i;
325         int start = mac->rx->next_to_fill;
326         unsigned int limit, count;
327
328         limit = (mac->rx->next_to_clean + RX_RING_SIZE -
329                  mac->rx->next_to_fill) & (RX_RING_SIZE - 1);
330
331         /* Check to see if we're doing first-time setup */
332         if (unlikely(mac->rx->next_to_clean == 0 && mac->rx->next_to_fill == 0))
333                 limit = RX_RING_SIZE;
334
335         if (limit <= 0)
336                 return;
337
338         i = start;
339         for (count = limit; count; count--) {
340                 struct pasemi_mac_buffer *info = &RX_DESC_INFO(mac, i);
341                 u64 *buff = &RX_BUFF(mac, i);
342                 struct sk_buff *skb;
343                 dma_addr_t dma;
344
345                 /* skb might still be in there for recycle on short receives */
346                 if (info->skb)
347                         skb = info->skb;
348                 else
349                         skb = dev_alloc_skb(BUF_SIZE);
350
351                 if (unlikely(!skb))
352                         break;
353
354                 dma = pci_map_single(mac->dma_pdev, skb->data, skb->len,
355                                      PCI_DMA_FROMDEVICE);
356
357                 if (unlikely(dma_mapping_error(dma))) {
358                         dev_kfree_skb_irq(info->skb);
359                         break;
360                 }
361
362                 info->skb = skb;
363                 info->dma = dma;
364                 *buff = XCT_RXB_LEN(BUF_SIZE) | XCT_RXB_ADDR(dma);
365                 i++;
366         }
367
368         wmb();
369
370         pci_write_config_dword(mac->dma_pdev,
371                                PAS_DMA_RXCHAN_INCR(mac->dma_rxch),
372                                limit - count);
373         pci_write_config_dword(mac->dma_pdev,
374                                PAS_DMA_RXINT_INCR(mac->dma_if),
375                                limit - count);
376
377         mac->rx->next_to_fill += limit - count;
378 }
379
380 static void pasemi_mac_restart_rx_intr(struct pasemi_mac *mac)
381 {
382         unsigned int reg, stat;
383         /* Re-enable packet count interrupts: finally
384          * ack the packet count interrupt we got in rx_intr.
385          */
386
387         pci_read_config_dword(mac->iob_pdev,
388                               PAS_IOB_DMA_RXCH_STAT(mac->dma_rxch),
389                               &stat);
390
391         reg = PAS_IOB_DMA_RXCH_RESET_PCNT(stat & PAS_IOB_DMA_RXCH_STAT_CNTDEL_M)
392                 | PAS_IOB_DMA_RXCH_RESET_PINTC;
393
394         pci_write_config_dword(mac->iob_pdev,
395                                PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch),
396                                reg);
397 }
398
399 static void pasemi_mac_restart_tx_intr(struct pasemi_mac *mac)
400 {
401         unsigned int reg, stat;
402
403         /* Re-enable packet count interrupts */
404         pci_read_config_dword(mac->iob_pdev,
405                               PAS_IOB_DMA_TXCH_STAT(mac->dma_txch), &stat);
406
407         reg = PAS_IOB_DMA_TXCH_RESET_PCNT(stat & PAS_IOB_DMA_TXCH_STAT_CNTDEL_M)
408                 | PAS_IOB_DMA_TXCH_RESET_PINTC;
409
410         pci_write_config_dword(mac->iob_pdev,
411                                PAS_IOB_DMA_TXCH_RESET(mac->dma_txch), reg);
412 }
413
414
415 static int pasemi_mac_clean_rx(struct pasemi_mac *mac, int limit)
416 {
417         unsigned int n;
418         int count;
419         struct pas_dma_xct_descr *dp;
420         struct pasemi_mac_buffer *info;
421         struct sk_buff *skb;
422         unsigned int i, len;
423         u64 macrx;
424         dma_addr_t dma;
425
426         spin_lock(&mac->rx->lock);
427
428         n = mac->rx->next_to_clean;
429
430         for (count = limit; count; count--) {
431
432                 rmb();
433
434                 dp = &RX_DESC(mac, n);
435                 macrx = dp->macrx;
436
437                 if (!(macrx & XCT_MACRX_O))
438                         break;
439
440
441                 info = NULL;
442
443                 /* We have to scan for our skb since there's no way
444                  * to back-map them from the descriptor, and if we
445                  * have several receive channels then they might not
446                  * show up in the same order as they were put on the
447                  * interface ring.
448                  */
449
450                 dma = (dp->ptr & XCT_PTR_ADDR_M);
451                 for (i = n; i < (n + RX_RING_SIZE); i++) {
452                         info = &RX_DESC_INFO(mac, i);
453                         if (info->dma == dma)
454                                 break;
455                 }
456
457                 skb = info->skb;
458                 info->dma = 0;
459
460                 pci_unmap_single(mac->dma_pdev, dma, skb->len,
461                                  PCI_DMA_FROMDEVICE);
462
463                 len = (macrx & XCT_MACRX_LLEN_M) >> XCT_MACRX_LLEN_S;
464
465                 if (len < 256) {
466                         struct sk_buff *new_skb =
467                             netdev_alloc_skb(mac->netdev, len + NET_IP_ALIGN);
468                         if (new_skb) {
469                                 skb_reserve(new_skb, NET_IP_ALIGN);
470                                 memcpy(new_skb->data - NET_IP_ALIGN,
471                                         skb->data - NET_IP_ALIGN,
472                                         len + NET_IP_ALIGN);
473                                 /* save the skb in buffer_info as good */
474                                 skb = new_skb;
475                         }
476                         /* else just continue with the old one */
477                 } else
478                         info->skb = NULL;
479
480                 skb_put(skb, len);
481
482                 skb->protocol = eth_type_trans(skb, mac->netdev);
483
484                 if ((macrx & XCT_MACRX_HTY_M) == XCT_MACRX_HTY_IPV4_OK) {
485                         skb->ip_summed = CHECKSUM_COMPLETE;
486                         skb->csum = (macrx & XCT_MACRX_CSUM_M) >>
487                                            XCT_MACRX_CSUM_S;
488                 } else
489                         skb->ip_summed = CHECKSUM_NONE;
490
491                 mac->stats.rx_bytes += len;
492                 mac->stats.rx_packets++;
493
494                 netif_receive_skb(skb);
495
496                 dp->ptr = 0;
497                 dp->macrx = 0;
498
499                 n++;
500         }
501
502         mac->rx->next_to_clean += limit - count;
503         pasemi_mac_replenish_rx_ring(mac->netdev);
504
505         spin_unlock(&mac->rx->lock);
506
507         return count;
508 }
509
510 static int pasemi_mac_clean_tx(struct pasemi_mac *mac)
511 {
512         int i;
513         struct pasemi_mac_buffer *info;
514         struct pas_dma_xct_descr *dp;
515         int start, count;
516         int flags;
517
518         spin_lock_irqsave(&mac->tx->lock, flags);
519
520         start = mac->tx->next_to_clean;
521         count = 0;
522
523         for (i = start; i < mac->tx->next_to_use; i++) {
524                 dp = &TX_DESC(mac, i);
525                 if (!dp || (dp->mactx & XCT_MACTX_O))
526                         break;
527
528                 count++;
529
530                 info = &TX_DESC_INFO(mac, i);
531
532                 pci_unmap_single(mac->dma_pdev, info->dma,
533                                  info->skb->len, PCI_DMA_TODEVICE);
534                 dev_kfree_skb_irq(info->skb);
535
536                 info->skb = NULL;
537                 info->dma = 0;
538                 dp->mactx = 0;
539                 dp->ptr = 0;
540         }
541         mac->tx->next_to_clean += count;
542         spin_unlock_irqrestore(&mac->tx->lock, flags);
543
544         netif_wake_queue(mac->netdev);
545
546         return count;
547 }
548
549
550 static irqreturn_t pasemi_mac_rx_intr(int irq, void *data)
551 {
552         struct net_device *dev = data;
553         struct pasemi_mac *mac = netdev_priv(dev);
554         unsigned int reg;
555
556         if (!(*mac->rx_status & PAS_STATUS_CAUSE_M))
557                 return IRQ_NONE;
558
559         if (*mac->rx_status & PAS_STATUS_ERROR)
560                 printk("rx_status reported error\n");
561
562         /* Don't reset packet count so it won't fire again but clear
563          * all others.
564          */
565
566         pci_read_config_dword(mac->dma_pdev, PAS_DMA_RXINT_RCMDSTA(mac->dma_if), &reg);
567
568         reg = 0;
569         if (*mac->rx_status & PAS_STATUS_SOFT)
570                 reg |= PAS_IOB_DMA_RXCH_RESET_SINTC;
571         if (*mac->rx_status & PAS_STATUS_ERROR)
572                 reg |= PAS_IOB_DMA_RXCH_RESET_DINTC;
573         if (*mac->rx_status & PAS_STATUS_TIMER)
574                 reg |= PAS_IOB_DMA_RXCH_RESET_TINTC;
575
576         netif_rx_schedule(dev);
577
578         pci_write_config_dword(mac->iob_pdev,
579                                PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch), reg);
580
581
582         return IRQ_HANDLED;
583 }
584
585 static irqreturn_t pasemi_mac_tx_intr(int irq, void *data)
586 {
587         struct net_device *dev = data;
588         struct pasemi_mac *mac = netdev_priv(dev);
589         unsigned int reg;
590
591         if (!(*mac->tx_status & PAS_STATUS_CAUSE_M))
592                 return IRQ_NONE;
593
594         pasemi_mac_clean_tx(mac);
595
596         reg = PAS_IOB_DMA_TXCH_RESET_PINTC;
597
598         if (*mac->tx_status & PAS_STATUS_SOFT)
599                 reg |= PAS_IOB_DMA_TXCH_RESET_SINTC;
600         if (*mac->tx_status & PAS_STATUS_ERROR)
601                 reg |= PAS_IOB_DMA_TXCH_RESET_DINTC;
602
603         pci_write_config_dword(mac->iob_pdev, PAS_IOB_DMA_TXCH_RESET(mac->dma_txch),
604                                reg);
605
606         return IRQ_HANDLED;
607 }
608
609 static int pasemi_mac_open(struct net_device *dev)
610 {
611         struct pasemi_mac *mac = netdev_priv(dev);
612         int base_irq;
613         unsigned int flags;
614         int ret;
615
616         /* enable rx section */
617         pci_write_config_dword(mac->dma_pdev, PAS_DMA_COM_RXCMD,
618                                PAS_DMA_COM_RXCMD_EN);
619
620         /* enable tx section */
621         pci_write_config_dword(mac->dma_pdev, PAS_DMA_COM_TXCMD,
622                                PAS_DMA_COM_TXCMD_EN);
623
624         flags = PAS_MAC_CFG_TXP_FCE | PAS_MAC_CFG_TXP_FPC(3) |
625                 PAS_MAC_CFG_TXP_SL(3) | PAS_MAC_CFG_TXP_COB(0xf) |
626                 PAS_MAC_CFG_TXP_TIFT(8) | PAS_MAC_CFG_TXP_TIFG(12);
627
628         pci_write_config_dword(mac->pdev, PAS_MAC_CFG_TXP, flags);
629
630         flags = PAS_MAC_CFG_PCFG_S1 | PAS_MAC_CFG_PCFG_PE |
631                 PAS_MAC_CFG_PCFG_PR | PAS_MAC_CFG_PCFG_CE;
632
633         flags |= PAS_MAC_CFG_PCFG_TSR_1G | PAS_MAC_CFG_PCFG_SPD_1G;
634
635         pci_write_config_dword(mac->iob_pdev, PAS_IOB_DMA_RXCH_CFG(mac->dma_rxch),
636                                PAS_IOB_DMA_RXCH_CFG_CNTTH(1));
637
638         pci_write_config_dword(mac->iob_pdev, PAS_IOB_DMA_TXCH_CFG(mac->dma_txch),
639                                PAS_IOB_DMA_TXCH_CFG_CNTTH(32));
640
641         /* Clear out any residual packet count state from firmware */
642         pasemi_mac_restart_rx_intr(mac);
643         pasemi_mac_restart_tx_intr(mac);
644
645         /* 0xffffff is max value, about 16ms */
646         pci_write_config_dword(mac->iob_pdev, PAS_IOB_DMA_COM_TIMEOUTCFG,
647                                PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(0xffffff));
648
649         pci_write_config_dword(mac->pdev, PAS_MAC_CFG_PCFG, flags);
650
651         ret = pasemi_mac_setup_rx_resources(dev);
652         if (ret)
653                 goto out_rx_resources;
654
655         ret = pasemi_mac_setup_tx_resources(dev);
656         if (ret)
657                 goto out_tx_resources;
658
659         pci_write_config_dword(mac->pdev, PAS_MAC_IPC_CHNL,
660                                PAS_MAC_IPC_CHNL_DCHNO(mac->dma_rxch) |
661                                PAS_MAC_IPC_CHNL_BCH(mac->dma_rxch));
662
663         /* enable rx if */
664         pci_write_config_dword(mac->dma_pdev,
665                                PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
666                                PAS_DMA_RXINT_RCMDSTA_EN);
667
668         /* enable rx channel */
669         pci_write_config_dword(mac->dma_pdev,
670                                PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch),
671                                PAS_DMA_RXCHAN_CCMDSTA_EN |
672                                PAS_DMA_RXCHAN_CCMDSTA_DU);
673
674         /* enable tx channel */
675         pci_write_config_dword(mac->dma_pdev,
676                                PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch),
677                                PAS_DMA_TXCHAN_TCMDSTA_EN);
678
679         pasemi_mac_replenish_rx_ring(dev);
680
681         netif_start_queue(dev);
682         netif_poll_enable(dev);
683
684         /* Interrupts are a bit different for our DMA controller: While
685          * it's got one a regular PCI device header, the interrupt there
686          * is really the base of the range it's using. Each tx and rx
687          * channel has it's own interrupt source.
688          */
689
690         base_irq = virq_to_hw(mac->dma_pdev->irq);
691
692         mac->tx_irq = irq_create_mapping(NULL, base_irq + mac->dma_txch);
693         mac->rx_irq = irq_create_mapping(NULL, base_irq + 20 + mac->dma_txch);
694
695         ret = request_irq(mac->tx_irq, &pasemi_mac_tx_intr, IRQF_DISABLED,
696                           mac->tx->irq_name, dev);
697         if (ret) {
698                 dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
699                         base_irq + mac->dma_txch, ret);
700                 goto out_tx_int;
701         }
702
703         ret = request_irq(mac->rx_irq, &pasemi_mac_rx_intr, IRQF_DISABLED,
704                           mac->rx->irq_name, dev);
705         if (ret) {
706                 dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
707                         base_irq + 20 + mac->dma_rxch, ret);
708                 goto out_rx_int;
709         }
710
711         return 0;
712
713 out_rx_int:
714         free_irq(mac->tx_irq, dev);
715 out_tx_int:
716         netif_poll_disable(dev);
717         netif_stop_queue(dev);
718         pasemi_mac_free_tx_resources(dev);
719 out_tx_resources:
720         pasemi_mac_free_rx_resources(dev);
721 out_rx_resources:
722
723         return ret;
724 }
725
726 #define MAX_RETRIES 5000
727
728 static int pasemi_mac_close(struct net_device *dev)
729 {
730         struct pasemi_mac *mac = netdev_priv(dev);
731         unsigned int stat;
732         int retries;
733
734         netif_stop_queue(dev);
735
736         /* Clean out any pending buffers */
737         pasemi_mac_clean_tx(mac);
738         pasemi_mac_clean_rx(mac, RX_RING_SIZE);
739
740         /* Disable interface */
741         pci_write_config_dword(mac->dma_pdev,
742                                PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch),
743                                PAS_DMA_TXCHAN_TCMDSTA_ST);
744         pci_write_config_dword(mac->dma_pdev,
745                       PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
746                       PAS_DMA_RXINT_RCMDSTA_ST);
747         pci_write_config_dword(mac->dma_pdev,
748                       PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch),
749                       PAS_DMA_RXCHAN_CCMDSTA_ST);
750
751         for (retries = 0; retries < MAX_RETRIES; retries++) {
752                 pci_read_config_dword(mac->dma_pdev,
753                                       PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch),
754                                       &stat);
755                 if (!(stat & PAS_DMA_TXCHAN_TCMDSTA_ACT))
756                         break;
757                 cond_resched();
758         }
759
760         if (stat & PAS_DMA_TXCHAN_TCMDSTA_ACT)
761                 dev_err(&mac->dma_pdev->dev, "Failed to stop tx channel\n");
762
763         for (retries = 0; retries < MAX_RETRIES; retries++) {
764                 pci_read_config_dword(mac->dma_pdev,
765                                       PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch),
766                                       &stat);
767                 if (!(stat & PAS_DMA_RXCHAN_CCMDSTA_ACT))
768                         break;
769                 cond_resched();
770         }
771
772         if (stat & PAS_DMA_RXCHAN_CCMDSTA_ACT)
773                 dev_err(&mac->dma_pdev->dev, "Failed to stop rx channel\n");
774
775         for (retries = 0; retries < MAX_RETRIES; retries++) {
776                 pci_read_config_dword(mac->dma_pdev,
777                                       PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
778                                       &stat);
779                 if (!(stat & PAS_DMA_RXINT_RCMDSTA_ACT))
780                         break;
781                 cond_resched();
782         }
783
784         if (stat & PAS_DMA_RXINT_RCMDSTA_ACT)
785                 dev_err(&mac->dma_pdev->dev, "Failed to stop rx interface\n");
786
787         /* Then, disable the channel. This must be done separately from
788          * stopping, since you can't disable when active.
789          */
790
791         pci_write_config_dword(mac->dma_pdev,
792                                PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch), 0);
793         pci_write_config_dword(mac->dma_pdev,
794                                PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch), 0);
795         pci_write_config_dword(mac->dma_pdev,
796                                PAS_DMA_RXINT_RCMDSTA(mac->dma_if), 0);
797
798         free_irq(mac->tx_irq, dev);
799         free_irq(mac->rx_irq, dev);
800
801         /* Free resources */
802         pasemi_mac_free_rx_resources(dev);
803         pasemi_mac_free_tx_resources(dev);
804
805         return 0;
806 }
807
808 static int pasemi_mac_start_tx(struct sk_buff *skb, struct net_device *dev)
809 {
810         struct pasemi_mac *mac = netdev_priv(dev);
811         struct pasemi_mac_txring *txring;
812         struct pasemi_mac_buffer *info;
813         struct pas_dma_xct_descr *dp;
814         u64 dflags;
815         dma_addr_t map;
816         int flags;
817
818         dflags = XCT_MACTX_O | XCT_MACTX_ST | XCT_MACTX_SS | XCT_MACTX_CRC_PAD;
819
820         if (skb->ip_summed == CHECKSUM_PARTIAL) {
821                 const unsigned char *nh = skb_network_header(skb);
822
823                 switch (ip_hdr(skb)->protocol) {
824                 case IPPROTO_TCP:
825                         dflags |= XCT_MACTX_CSUM_TCP;
826                         dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
827                         dflags |= XCT_MACTX_IPO(nh - skb->data);
828                         break;
829                 case IPPROTO_UDP:
830                         dflags |= XCT_MACTX_CSUM_UDP;
831                         dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
832                         dflags |= XCT_MACTX_IPO(nh - skb->data);
833                         break;
834                 }
835         }
836
837         map = pci_map_single(mac->dma_pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
838
839         if (dma_mapping_error(map))
840                 return NETDEV_TX_BUSY;
841
842         txring = mac->tx;
843
844         spin_lock_irqsave(&txring->lock, flags);
845
846         if (txring->next_to_clean - txring->next_to_use == TX_RING_SIZE) {
847                 spin_unlock_irqrestore(&txring->lock, flags);
848                 pasemi_mac_clean_tx(mac);
849                 spin_lock_irqsave(&txring->lock, flags);
850
851                 if (txring->next_to_clean - txring->next_to_use ==
852                     TX_RING_SIZE) {
853                         /* Still no room -- stop the queue and wait for tx
854                          * intr when there's room.
855                          */
856                         netif_stop_queue(dev);
857                         goto out_err;
858                 }
859         }
860
861
862         dp = &TX_DESC(mac, txring->next_to_use);
863         info = &TX_DESC_INFO(mac, txring->next_to_use);
864
865         dp->mactx = dflags | XCT_MACTX_LLEN(skb->len);
866         dp->ptr   = XCT_PTR_LEN(skb->len) | XCT_PTR_ADDR(map);
867         info->dma = map;
868         info->skb = skb;
869
870         txring->next_to_use++;
871         mac->stats.tx_packets++;
872         mac->stats.tx_bytes += skb->len;
873
874         spin_unlock_irqrestore(&txring->lock, flags);
875
876         pci_write_config_dword(mac->dma_pdev,
877                                PAS_DMA_TXCHAN_INCR(mac->dma_txch), 1);
878
879         return NETDEV_TX_OK;
880
881 out_err:
882         spin_unlock_irqrestore(&txring->lock, flags);
883         pci_unmap_single(mac->dma_pdev, map, skb->len, PCI_DMA_TODEVICE);
884         return NETDEV_TX_BUSY;
885 }
886
887 static struct net_device_stats *pasemi_mac_get_stats(struct net_device *dev)
888 {
889         struct pasemi_mac *mac = netdev_priv(dev);
890
891         return &mac->stats;
892 }
893
894
895 static void pasemi_mac_set_rx_mode(struct net_device *dev)
896 {
897         struct pasemi_mac *mac = netdev_priv(dev);
898         unsigned int flags;
899
900         pci_read_config_dword(mac->pdev, PAS_MAC_CFG_PCFG, &flags);
901
902         /* Set promiscuous */
903         if (dev->flags & IFF_PROMISC)
904                 flags |= PAS_MAC_CFG_PCFG_PR;
905         else
906                 flags &= ~PAS_MAC_CFG_PCFG_PR;
907
908         pci_write_config_dword(mac->pdev, PAS_MAC_CFG_PCFG, flags);
909 }
910
911
912 static int pasemi_mac_poll(struct net_device *dev, int *budget)
913 {
914         int pkts, limit = min(*budget, dev->quota);
915         struct pasemi_mac *mac = netdev_priv(dev);
916
917         pkts = pasemi_mac_clean_rx(mac, limit);
918
919         dev->quota -= pkts;
920         *budget -= pkts;
921
922         if (pkts < limit) {
923                 /* all done, no more packets present */
924                 netif_rx_complete(dev);
925
926                 pasemi_mac_restart_rx_intr(mac);
927                 return 0;
928         } else {
929                 /* used up our quantum, so reschedule */
930                 return 1;
931         }
932 }
933
934 static int __devinit
935 pasemi_mac_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
936 {
937         static int index = 0;
938         struct net_device *dev;
939         struct pasemi_mac *mac;
940         int err;
941
942         err = pci_enable_device(pdev);
943         if (err)
944                 return err;
945
946         dev = alloc_etherdev(sizeof(struct pasemi_mac));
947         if (dev == NULL) {
948                 dev_err(&pdev->dev,
949                         "pasemi_mac: Could not allocate ethernet device.\n");
950                 err = -ENOMEM;
951                 goto out_disable_device;
952         }
953
954         SET_MODULE_OWNER(dev);
955         pci_set_drvdata(pdev, dev);
956         SET_NETDEV_DEV(dev, &pdev->dev);
957
958         mac = netdev_priv(dev);
959
960         mac->pdev = pdev;
961         mac->netdev = dev;
962         mac->dma_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa007, NULL);
963
964         if (!mac->dma_pdev) {
965                 dev_err(&pdev->dev, "Can't find DMA Controller\n");
966                 err = -ENODEV;
967                 goto out_free_netdev;
968         }
969
970         mac->iob_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa001, NULL);
971
972         if (!mac->iob_pdev) {
973                 dev_err(&pdev->dev, "Can't find I/O Bridge\n");
974                 err = -ENODEV;
975                 goto out_put_dma_pdev;
976         }
977
978         /* These should come out of the device tree eventually */
979         mac->dma_txch = index;
980         mac->dma_rxch = index;
981
982         /* We probe GMAC before XAUI, but the DMA interfaces are
983          * in XAUI, GMAC order.
984          */
985         if (index < 4)
986                 mac->dma_if = index + 2;
987         else
988                 mac->dma_if = index - 4;
989         index++;
990
991         switch (pdev->device) {
992         case 0xa005:
993                 mac->type = MAC_TYPE_GMAC;
994                 break;
995         case 0xa006:
996                 mac->type = MAC_TYPE_XAUI;
997                 break;
998         default:
999                 err = -ENODEV;
1000                 goto out;
1001         }
1002
1003         /* get mac addr from device tree */
1004         if (pasemi_get_mac_addr(mac) || !is_valid_ether_addr(mac->mac_addr)) {
1005                 err = -ENODEV;
1006                 goto out;
1007         }
1008         memcpy(dev->dev_addr, mac->mac_addr, sizeof(mac->mac_addr));
1009
1010         dev->open = pasemi_mac_open;
1011         dev->stop = pasemi_mac_close;
1012         dev->hard_start_xmit = pasemi_mac_start_tx;
1013         dev->get_stats = pasemi_mac_get_stats;
1014         dev->set_multicast_list = pasemi_mac_set_rx_mode;
1015         dev->weight = 64;
1016         dev->poll = pasemi_mac_poll;
1017         dev->features = NETIF_F_HW_CSUM;
1018
1019         /* The dma status structure is located in the I/O bridge, and
1020          * is cache coherent.
1021          */
1022         if (!dma_status)
1023                 /* XXXOJN This should come from the device tree */
1024                 dma_status = __ioremap(0xfd800000, 0x1000, 0);
1025
1026         mac->rx_status = &dma_status->rx_sta[mac->dma_rxch];
1027         mac->tx_status = &dma_status->tx_sta[mac->dma_txch];
1028
1029         mac->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
1030
1031         err = register_netdev(dev);
1032
1033         if (err) {
1034                 dev_err(&mac->pdev->dev, "register_netdev failed with error %d\n",
1035                         err);
1036                 goto out;
1037         } else
1038                 printk(KERN_INFO "%s: PA Semi %s: intf %d, txch %d, rxch %d, "
1039                        "hw addr %02x:%02x:%02x:%02x:%02x:%02x\n",
1040                        dev->name, mac->type == MAC_TYPE_GMAC ? "GMAC" : "XAUI",
1041                        mac->dma_if, mac->dma_txch, mac->dma_rxch,
1042                        dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
1043                        dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
1044
1045         return err;
1046
1047 out:
1048         pci_dev_put(mac->iob_pdev);
1049 out_put_dma_pdev:
1050         pci_dev_put(mac->dma_pdev);
1051 out_free_netdev:
1052         free_netdev(dev);
1053 out_disable_device:
1054         pci_disable_device(pdev);
1055         return err;
1056
1057 }
1058
1059 static void __devexit pasemi_mac_remove(struct pci_dev *pdev)
1060 {
1061         struct net_device *netdev = pci_get_drvdata(pdev);
1062         struct pasemi_mac *mac;
1063
1064         if (!netdev)
1065                 return;
1066
1067         mac = netdev_priv(netdev);
1068
1069         unregister_netdev(netdev);
1070
1071         pci_disable_device(pdev);
1072         pci_dev_put(mac->dma_pdev);
1073         pci_dev_put(mac->iob_pdev);
1074
1075         pci_set_drvdata(pdev, NULL);
1076         free_netdev(netdev);
1077 }
1078
1079 static struct pci_device_id pasemi_mac_pci_tbl[] = {
1080         { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa005) },
1081         { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa006) },
1082 };
1083
1084 MODULE_DEVICE_TABLE(pci, pasemi_mac_pci_tbl);
1085
1086 static struct pci_driver pasemi_mac_driver = {
1087         .name           = "pasemi_mac",
1088         .id_table       = pasemi_mac_pci_tbl,
1089         .probe          = pasemi_mac_probe,
1090         .remove         = __devexit_p(pasemi_mac_remove),
1091 };
1092
1093 static void __exit pasemi_mac_cleanup_module(void)
1094 {
1095         pci_unregister_driver(&pasemi_mac_driver);
1096         __iounmap(dma_status);
1097         dma_status = NULL;
1098 }
1099
1100 int pasemi_mac_init_module(void)
1101 {
1102         return pci_register_driver(&pasemi_mac_driver);
1103 }
1104
1105 module_init(pasemi_mac_init_module);
1106 module_exit(pasemi_mac_cleanup_module);