2 * Copyright (C) 2003 - 2006 NetXen, Inc.
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
20 * The full GNU General Public License is included in this distribution
21 * in the file called LICENSE.
23 * Contact Information:
26 * 3965 Freedom Circle, Fourth floor,
27 * Santa Clara, CA 95054
30 * Source file for NIC routines to access the Phantom hardware
34 #include "netxen_nic.h"
35 #include "netxen_nic_hw.h"
36 #include "netxen_nic_phan_reg.h"
38 /* PCI Windowing for DDR regions. */
40 #define ADDR_IN_RANGE(addr, low, high) \
41 (((addr) <= (high)) && ((addr) >= (low)))
43 #define NETXEN_FLASH_BASE (BOOTLD_START)
44 #define NETXEN_PHANTOM_MEM_BASE (NETXEN_FLASH_BASE)
45 #define NETXEN_MAX_MTU 8000
46 #define NETXEN_MIN_MTU 64
47 #define NETXEN_ETH_FCS_SIZE 4
48 #define NETXEN_ENET_HEADER_SIZE 14
49 #define NETXEN_WINDOW_ONE 0x2000000 /*CRB Window: bit 25 of CRB address */
50 #define NETXEN_FIRMWARE_LEN ((16 * 1024) / 4)
51 #define NETXEN_NIU_HDRSIZE (0x1 << 6)
52 #define NETXEN_NIU_TLRSIZE (0x1 << 5)
54 #define lower32(x) ((u32)((x) & 0xffffffff))
56 ((u32)(((unsigned long long)(x) >> 32) & 0xffffffff))
58 #define NETXEN_NIC_ZERO_PAUSE_ADDR 0ULL
59 #define NETXEN_NIC_UNIT_PAUSE_ADDR 0x200ULL
60 #define NETXEN_NIC_EPG_PAUSE_ADDR1 0x2200010000c28001ULL
61 #define NETXEN_NIC_EPG_PAUSE_ADDR2 0x0100088866554433ULL
63 #define NETXEN_NIC_WINDOW_MARGIN 0x100000
65 unsigned long netxen_nic_pci_set_window(struct netxen_adapter *adapter,
66 unsigned long long addr);
67 void netxen_free_hw_resources(struct netxen_adapter *adapter);
69 int netxen_nic_set_mac(struct net_device *netdev, void *p)
71 struct netxen_port *port = netdev_priv(netdev);
72 struct netxen_adapter *adapter = port->adapter;
73 struct sockaddr *addr = p;
75 if (netif_running(netdev))
78 if (!is_valid_ether_addr(addr->sa_data))
79 return -EADDRNOTAVAIL;
81 DPRINTK(INFO, "valid ether addr\n");
82 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
84 if (adapter->ops->macaddr_set)
85 adapter->ops->macaddr_set(port, addr->sa_data);
91 * netxen_nic_set_multi - Multicast
93 void netxen_nic_set_multi(struct net_device *netdev)
95 struct netxen_port *port = netdev_priv(netdev);
96 struct netxen_adapter *adapter = port->adapter;
97 struct dev_mc_list *mc_ptr;
98 __le32 netxen_mac_addr_cntl_data = 0;
100 mc_ptr = netdev->mc_list;
101 if (netdev->flags & IFF_PROMISC) {
102 if (adapter->ops->set_promisc)
103 adapter->ops->set_promisc(adapter,
105 NETXEN_NIU_PROMISC_MODE);
107 if (adapter->ops->unset_promisc &&
108 adapter->ahw.boardcfg.board_type
109 != NETXEN_BRDTYPE_P2_SB31_10G_IMEZ)
110 adapter->ops->unset_promisc(adapter,
112 NETXEN_NIU_NON_PROMISC_MODE);
114 if (adapter->ahw.board_type == NETXEN_NIC_XGBE) {
115 netxen_nic_mcr_set_mode_select(netxen_mac_addr_cntl_data, 0x03);
116 netxen_nic_mcr_set_id_pool0(netxen_mac_addr_cntl_data, 0x00);
117 netxen_nic_mcr_set_id_pool1(netxen_mac_addr_cntl_data, 0x00);
118 netxen_nic_mcr_set_id_pool2(netxen_mac_addr_cntl_data, 0x00);
119 netxen_nic_mcr_set_id_pool3(netxen_mac_addr_cntl_data, 0x00);
120 netxen_nic_mcr_set_enable_xtnd0(netxen_mac_addr_cntl_data);
121 netxen_nic_mcr_set_enable_xtnd1(netxen_mac_addr_cntl_data);
122 netxen_nic_mcr_set_enable_xtnd2(netxen_mac_addr_cntl_data);
123 netxen_nic_mcr_set_enable_xtnd3(netxen_mac_addr_cntl_data);
125 netxen_nic_mcr_set_mode_select(netxen_mac_addr_cntl_data, 0x00);
126 netxen_nic_mcr_set_id_pool0(netxen_mac_addr_cntl_data, 0x00);
127 netxen_nic_mcr_set_id_pool1(netxen_mac_addr_cntl_data, 0x01);
128 netxen_nic_mcr_set_id_pool2(netxen_mac_addr_cntl_data, 0x02);
129 netxen_nic_mcr_set_id_pool3(netxen_mac_addr_cntl_data, 0x03);
131 writel(netxen_mac_addr_cntl_data,
132 NETXEN_CRB_NORMALIZE(adapter, NETXEN_MAC_ADDR_CNTL_REG));
133 if (adapter->ahw.board_type == NETXEN_NIC_XGBE) {
134 writel(netxen_mac_addr_cntl_data,
135 NETXEN_CRB_NORMALIZE(adapter,
136 NETXEN_MULTICAST_ADDR_HI_0));
138 writel(netxen_mac_addr_cntl_data,
139 NETXEN_CRB_NORMALIZE(adapter,
140 NETXEN_MULTICAST_ADDR_HI_1));
142 netxen_mac_addr_cntl_data = 0;
143 writel(netxen_mac_addr_cntl_data,
144 NETXEN_CRB_NORMALIZE(adapter, NETXEN_NIU_GB_DROP_WRONGADDR));
148 * netxen_nic_change_mtu - Change the Maximum Transfer Unit
149 * @returns 0 on success, negative on failure
151 int netxen_nic_change_mtu(struct net_device *netdev, int mtu)
153 struct netxen_port *port = netdev_priv(netdev);
154 struct netxen_adapter *adapter = port->adapter;
155 int eff_mtu = mtu + NETXEN_ENET_HEADER_SIZE + NETXEN_ETH_FCS_SIZE;
157 if ((eff_mtu > NETXEN_MAX_MTU) || (eff_mtu < NETXEN_MIN_MTU)) {
158 printk(KERN_ERR "%s: %s %d is not supported.\n",
159 netxen_nic_driver_name, netdev->name, mtu);
163 if (adapter->ops->set_mtu)
164 adapter->ops->set_mtu(port, mtu);
171 * check if the firmware has been downloaded and ready to run and
172 * setup the address for the descriptors in the adapter
174 int netxen_nic_hw_resources(struct netxen_adapter *adapter)
176 struct netxen_hardware_context *hw = &adapter->ahw;
180 int loops = 0, err = 0;
182 u32 card_cmdring = 0;
183 struct netxen_rcv_desc_crb *rcv_desc_crb = NULL;
184 struct netxen_recv_context *recv_ctx;
185 struct netxen_rcv_desc_ctx *rcv_desc;
187 DPRINTK(INFO, "crb_base: %lx %lx", NETXEN_PCI_CRBSPACE,
188 PCI_OFFSET_SECOND_RANGE(adapter, NETXEN_PCI_CRBSPACE));
189 DPRINTK(INFO, "cam base: %lx %lx", NETXEN_CRB_CAM,
190 pci_base_offset(adapter, NETXEN_CRB_CAM));
191 DPRINTK(INFO, "cam RAM: %lx %lx", NETXEN_CAM_RAM_BASE,
192 pci_base_offset(adapter, NETXEN_CAM_RAM_BASE));
193 DPRINTK(INFO, "NIC base:%lx %lx\n", NIC_CRB_BASE_PORT1,
194 pci_base_offset(adapter, NIC_CRB_BASE_PORT1));
197 card_cmdring = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_CMDRING));
199 DPRINTK(INFO, "Command Peg sends 0x%x for cmdring base\n",
202 for (ctx = 0; ctx < MAX_RCV_CTX; ++ctx) {
203 DPRINTK(INFO, "Command Peg ready..waiting for rcv peg\n");
207 state = readl(NETXEN_CRB_NORMALIZE(adapter,
208 recv_crb_registers[ctx].
210 while (state != PHAN_PEG_RCV_INITIALIZED && loops < 20) {
213 state = readl(NETXEN_CRB_NORMALIZE(adapter,
220 printk(KERN_ERR "Rcv Peg initialization not complete:"
226 DPRINTK(INFO, "Recieve Peg ready too. starting stuff\n");
228 addr = netxen_alloc(adapter->ahw.pdev,
229 sizeof(struct cmd_desc_type0) *
230 adapter->max_tx_desc_count,
231 &hw->cmd_desc_phys_addr, &hw->cmd_desc_pdev);
234 DPRINTK(ERR, "bad return from pci_alloc_consistent\n");
238 pause_addr = netxen_alloc(adapter->ahw.pdev, 512,
239 (dma_addr_t *) & hw->pause_physaddr,
241 if (pause_addr == NULL) {
242 DPRINTK(1, ERR, "bad return from pci_alloc_consistent\n");
246 hw->pauseaddr = (char *)pause_addr;
248 u64 *ptr = (u64 *) pause_addr;
249 *ptr++ = NETXEN_NIC_ZERO_PAUSE_ADDR;
250 *ptr++ = NETXEN_NIC_ZERO_PAUSE_ADDR;
251 *ptr++ = NETXEN_NIC_UNIT_PAUSE_ADDR;
252 *ptr++ = NETXEN_NIC_ZERO_PAUSE_ADDR;
253 *ptr++ = NETXEN_NIC_EPG_PAUSE_ADDR1;
254 *ptr++ = NETXEN_NIC_EPG_PAUSE_ADDR2;
257 hw->cmd_desc_head = (struct cmd_desc_type0 *)addr;
259 for (ctx = 0; ctx < MAX_RCV_CTX; ++ctx) {
260 recv_ctx = &adapter->recv_ctx[ctx];
262 for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
263 rcv_desc = &recv_ctx->rcv_desc[ring];
264 addr = netxen_alloc(adapter->ahw.pdev,
266 &rcv_desc->phys_addr,
267 &rcv_desc->phys_pdev);
269 DPRINTK(ERR, "bad return from "
270 "pci_alloc_consistent\n");
271 netxen_free_hw_resources(adapter);
275 rcv_desc->desc_head = (struct rcv_desc *)addr;
278 addr = netxen_alloc(adapter->ahw.pdev,
279 STATUS_DESC_RINGSIZE,
281 rcv_status_desc_phys_addr,
282 &recv_ctx->rcv_status_desc_pdev);
284 DPRINTK(ERR, "bad return from"
285 " pci_alloc_consistent\n");
286 netxen_free_hw_resources(adapter);
290 recv_ctx->rcv_status_desc_head = (struct status_desc *)addr;
291 for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
292 rcv_desc = &recv_ctx->rcv_desc[ring];
294 &recv_crb_registers[ctx].rcv_desc_crb[ring];
295 DPRINTK(INFO, "ring #%d crb global ring reg 0x%x\n",
296 ring, rcv_desc_crb->crb_globalrcv_ring);
298 writel(lower32(rcv_desc->phys_addr),
299 NETXEN_CRB_NORMALIZE(adapter,
301 crb_globalrcv_ring));
302 DPRINTK(INFO, "GLOBAL_RCV_RING ctx %d, addr 0x%x"
305 rcv_desc_crb->crb_globalrcv_ring,
306 (unsigned long long)rcv_desc->phys_addr,
307 +rcv_desc->desc_head);
311 writel(lower32(recv_ctx->rcv_status_desc_phys_addr),
312 NETXEN_CRB_NORMALIZE(adapter,
313 recv_crb_registers[ctx].
314 crb_rcvstatus_ring));
315 DPRINTK(INFO, "RCVSTATUS_RING, ctx %d, addr 0x%x,"
316 " val 0x%x,virt%p\n",
318 recv_crb_registers[ctx].crb_rcvstatus_ring,
319 (unsigned long long)recv_ctx->rcv_status_desc_phys_addr,
320 recv_ctx->rcv_status_desc_head);
323 writel(lower32(hw->pause_physaddr),
324 NETXEN_CRB_NORMALIZE(adapter, CRB_PAUSE_ADDR_LO));
325 writel(upper32(hw->pause_physaddr),
326 NETXEN_CRB_NORMALIZE(adapter, CRB_PAUSE_ADDR_HI));
328 writel(lower32(hw->cmd_desc_phys_addr),
329 NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_CMD_ADDR_LO));
330 writel(upper32(hw->cmd_desc_phys_addr),
331 NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_CMD_ADDR_HI));
335 void netxen_free_hw_resources(struct netxen_adapter *adapter)
337 struct netxen_recv_context *recv_ctx;
338 struct netxen_rcv_desc_ctx *rcv_desc;
341 if (adapter->ahw.cmd_desc_head != NULL) {
342 pci_free_consistent(adapter->ahw.cmd_desc_pdev,
343 sizeof(struct cmd_desc_type0) *
344 adapter->max_tx_desc_count,
345 adapter->ahw.cmd_desc_head,
346 adapter->ahw.cmd_desc_phys_addr);
347 adapter->ahw.cmd_desc_head = NULL;
349 if (adapter->ahw.pauseaddr != NULL) {
350 pci_free_consistent(adapter->ahw.pause_pdev, 512,
351 adapter->ahw.pauseaddr,
352 adapter->ahw.pause_physaddr);
353 adapter->ahw.pauseaddr = NULL;
356 for (ctx = 0; ctx < MAX_RCV_CTX; ++ctx) {
357 recv_ctx = &adapter->recv_ctx[ctx];
358 for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
359 rcv_desc = &recv_ctx->rcv_desc[ring];
361 if (rcv_desc->desc_head != NULL) {
362 pci_free_consistent(rcv_desc->phys_pdev,
365 rcv_desc->phys_addr);
366 rcv_desc->desc_head = NULL;
370 if (recv_ctx->rcv_status_desc_head != NULL) {
371 pci_free_consistent(recv_ctx->rcv_status_desc_pdev,
372 STATUS_DESC_RINGSIZE,
373 recv_ctx->rcv_status_desc_head,
375 rcv_status_desc_phys_addr);
376 recv_ctx->rcv_status_desc_head = NULL;
381 void netxen_tso_check(struct netxen_adapter *adapter,
382 struct cmd_desc_type0 *desc, struct sk_buff *skb)
385 desc->total_hdr_length = sizeof(struct ethhdr) +
386 ((skb->nh.iph)->ihl * sizeof(u32)) +
387 ((skb->h.th)->doff * sizeof(u32));
388 desc->opcode = TX_TCP_LSO;
389 } else if (skb->ip_summed == CHECKSUM_COMPLETE) {
390 if (skb->nh.iph->protocol == IPPROTO_TCP) {
391 desc->opcode = TX_TCP_PKT;
392 } else if (skb->nh.iph->protocol == IPPROTO_UDP) {
393 desc->opcode = TX_UDP_PKT;
398 adapter->stats.xmitcsummed++;
399 CMD_DESC_TCP_HDR_OFFSET_WRT(desc, skb->h.raw - skb->data);
400 desc->length_tcp_hdr = cpu_to_le32(desc->length_tcp_hdr);
401 desc->ip_hdr_offset = skb->nh.raw - skb->data;
404 int netxen_is_flash_supported(struct netxen_adapter *adapter)
406 const int locs[] = { 0, 0x4, 0x100, 0x4000, 0x4128 };
407 int addr, val01, val02, i, j;
409 /* if the flash size less than 4Mb, make huge war cry and die */
410 for (j = 1; j < 4; j++) {
411 addr = j * NETXEN_NIC_WINDOW_MARGIN;
412 for (i = 0; i < (sizeof(locs) / sizeof(locs[0])); i++) {
413 if (netxen_rom_fast_read(adapter, locs[i], &val01) == 0
414 && netxen_rom_fast_read(adapter, (addr + locs[i]),
426 static int netxen_get_flash_block(struct netxen_adapter *adapter, int base,
434 for (i = 0; i < size / sizeof(u32); i++) {
435 if (netxen_rom_fast_read(adapter, addr, ptr32) == -1)
440 if ((char *)buf + size > (char *)ptr32) {
443 if (netxen_rom_fast_read(adapter, addr, &local) == -1)
445 memcpy(ptr32, &local, (char *)buf + size - (char *)ptr32);
451 int netxen_get_flash_mac_addr(struct netxen_adapter *adapter, u64 mac[])
453 u32 *pmac = (u32 *) & mac[0];
455 if (netxen_get_flash_block(adapter,
457 offsetof(struct netxen_new_user_info,
459 FLASH_NUM_PORTS * sizeof(u64), pmac) == -1) {
463 if (netxen_get_flash_block(adapter,
465 offsetof(struct netxen_user_old_info,
467 FLASH_NUM_PORTS * sizeof(u64),
477 * Changes the CRB window to the specified window.
479 void netxen_nic_pci_change_crbwindow(struct netxen_adapter *adapter, u32 wndw)
481 void __iomem *offset;
485 if (adapter->curr_window == wndw)
489 * Move the CRB window.
490 * We need to write to the "direct access" region of PCI
491 * to avoid a race condition where the window register has
492 * not been successfully written across CRB before the target
493 * register address is received by PCI. The direct region bypasses
497 PCI_OFFSET_SECOND_RANGE(adapter,
498 NETXEN_PCIX_PH_REG(PCIX_CRB_WINDOW));
501 wndw = NETXEN_WINDOW_ONE;
503 writel(wndw, offset);
505 /* MUST make sure window is set before we forge on... */
506 while ((tmp = readl(offset)) != wndw) {
507 printk(KERN_WARNING "%s: %s WARNING: CRB window value not "
508 "registered properly: 0x%08x.\n",
509 netxen_nic_driver_name, __FUNCTION__, tmp);
516 adapter->curr_window = wndw;
519 void netxen_load_firmware(struct netxen_adapter *adapter)
523 long flashaddr = NETXEN_FLASH_BASE, memaddr = NETXEN_PHANTOM_MEM_BASE;
527 size = NETXEN_FIRMWARE_LEN;
528 writel(1, NETXEN_CRB_NORMALIZE(adapter, NETXEN_ROMUSB_GLB_CAS_RST));
530 for (i = 0; i < size; i++) {
531 if (netxen_rom_fast_read(adapter, flashaddr, (int *)&data) != 0) {
533 "Error in netxen_rom_fast_read(). Will skip"
534 "loading flash image\n");
537 off = netxen_nic_pci_set_window(adapter, memaddr);
538 addr = pci_base_offset(adapter, off);
544 /* make sure Casper is powered on */
546 NETXEN_CRB_NORMALIZE(adapter, NETXEN_ROMUSB_GLB_CHIP_CLK_CTRL));
547 writel(0, NETXEN_CRB_NORMALIZE(adapter, NETXEN_ROMUSB_GLB_CAS_RST));
553 netxen_nic_hw_write_wx(struct netxen_adapter *adapter, u64 off, void *data,
558 if (ADDR_IN_WINDOW1(off)) {
559 addr = NETXEN_CRB_NORMALIZE(adapter, off);
560 } else { /* Window 0 */
561 addr = pci_base_offset(adapter, off);
562 netxen_nic_pci_change_crbwindow(adapter, 0);
565 DPRINTK(INFO, "writing to base %lx offset %llx addr %p"
566 " data %llx len %d\n",
567 pci_base(adapter, off), off, addr,
568 *(unsigned long long *)data, len);
570 netxen_nic_pci_change_crbwindow(adapter, 1);
576 writeb(*(u8 *) data, addr);
579 writew(*(u16 *) data, addr);
582 writel(*(u32 *) data, addr);
585 writeq(*(u64 *) data, addr);
589 "writing data %lx to offset %llx, num words=%d\n",
590 *(unsigned long *)data, off, (len >> 3));
592 netxen_nic_hw_block_write64((u64 __iomem *) data, addr,
596 if (!ADDR_IN_WINDOW1(off))
597 netxen_nic_pci_change_crbwindow(adapter, 1);
603 netxen_nic_hw_read_wx(struct netxen_adapter *adapter, u64 off, void *data,
608 if (ADDR_IN_WINDOW1(off)) { /* Window 1 */
609 addr = NETXEN_CRB_NORMALIZE(adapter, off);
610 } else { /* Window 0 */
611 addr = pci_base_offset(adapter, off);
612 netxen_nic_pci_change_crbwindow(adapter, 0);
615 DPRINTK(INFO, "reading from base %lx offset %llx addr %p\n",
616 pci_base(adapter, off), off, addr);
618 netxen_nic_pci_change_crbwindow(adapter, 1);
623 *(u8 *) data = readb(addr);
626 *(u16 *) data = readw(addr);
629 *(u32 *) data = readl(addr);
632 *(u64 *) data = readq(addr);
635 netxen_nic_hw_block_read64((u64 __iomem *) data, addr,
639 DPRINTK(INFO, "read %lx\n", *(unsigned long *)data);
641 if (!ADDR_IN_WINDOW1(off))
642 netxen_nic_pci_change_crbwindow(adapter, 1);
647 void netxen_nic_reg_write(struct netxen_adapter *adapter, u64 off, u32 val)
648 { /* Only for window 1 */
651 addr = NETXEN_CRB_NORMALIZE(adapter, off);
652 DPRINTK(INFO, "writing to base %lx offset %llx addr %p data %x\n",
653 pci_base(adapter, off), off, addr);
658 int netxen_nic_reg_read(struct netxen_adapter *adapter, u64 off)
659 { /* Only for window 1 */
663 addr = NETXEN_CRB_NORMALIZE(adapter, off);
664 DPRINTK(INFO, "reading from base %lx offset %llx addr %p\n",
665 adapter->ahw.pci_base, off, addr);
672 /* Change the window to 0, write and change back to window 1. */
673 void netxen_nic_write_w0(struct netxen_adapter *adapter, u32 index, u32 value)
677 netxen_nic_pci_change_crbwindow(adapter, 0);
678 addr = (void __iomem *)(pci_base_offset(adapter, index));
680 netxen_nic_pci_change_crbwindow(adapter, 1);
683 /* Change the window to 0, read and change back to window 1. */
684 void netxen_nic_read_w0(struct netxen_adapter *adapter, u32 index, u32 * value)
688 addr = (void __iomem *)(pci_base_offset(adapter, index));
690 netxen_nic_pci_change_crbwindow(adapter, 0);
691 *value = readl(addr);
692 netxen_nic_pci_change_crbwindow(adapter, 1);
695 int netxen_pci_set_window_warning_count = 0;
698 netxen_nic_pci_set_window(struct netxen_adapter *adapter,
699 unsigned long long addr)
701 static int ddr_mn_window = -1;
702 static int qdr_sn_window = -1;
705 if (ADDR_IN_RANGE(addr, NETXEN_ADDR_DDR_NET, NETXEN_ADDR_DDR_NET_MAX)) {
706 /* DDR network side */
707 addr -= NETXEN_ADDR_DDR_NET;
708 window = (addr >> 25) & 0x3ff;
709 if (ddr_mn_window != window) {
710 ddr_mn_window = window;
711 writel(window, PCI_OFFSET_SECOND_RANGE(adapter,
714 /* MUST make sure window is set before we forge on... */
715 readl(PCI_OFFSET_SECOND_RANGE(adapter,
719 addr -= (window * NETXEN_WINDOW_ONE);
720 addr += NETXEN_PCI_DDR_NET;
721 } else if (ADDR_IN_RANGE(addr, NETXEN_ADDR_OCM0, NETXEN_ADDR_OCM0_MAX)) {
722 addr -= NETXEN_ADDR_OCM0;
723 addr += NETXEN_PCI_OCM0;
724 } else if (ADDR_IN_RANGE(addr, NETXEN_ADDR_OCM1, NETXEN_ADDR_OCM1_MAX)) {
725 addr -= NETXEN_ADDR_OCM1;
726 addr += NETXEN_PCI_OCM1;
729 (addr, NETXEN_ADDR_QDR_NET, NETXEN_ADDR_QDR_NET_MAX)) {
730 /* QDR network side */
731 addr -= NETXEN_ADDR_QDR_NET;
732 window = (addr >> 22) & 0x3f;
733 if (qdr_sn_window != window) {
734 qdr_sn_window = window;
735 writel((window << 22),
736 PCI_OFFSET_SECOND_RANGE(adapter,
739 /* MUST make sure window is set before we forge on... */
740 readl(PCI_OFFSET_SECOND_RANGE(adapter,
744 addr -= (window * 0x400000);
745 addr += NETXEN_PCI_QDR_NET;
748 * peg gdb frequently accesses memory that doesn't exist,
749 * this limits the chit chat so debugging isn't slowed down.
751 if ((netxen_pci_set_window_warning_count++ < 8)
752 || (netxen_pci_set_window_warning_count % 64 == 0))
753 printk("%s: Warning:netxen_nic_pci_set_window()"
754 " Unknown address range!\n",
755 netxen_nic_driver_name);
761 int netxen_nic_get_board_info(struct netxen_adapter *adapter)
764 int addr = BRDCFG_START;
765 struct netxen_board_info *boardinfo;
769 boardinfo = &adapter->ahw.boardcfg;
770 ptr32 = (u32 *) boardinfo;
772 for (index = 0; index < sizeof(struct netxen_board_info) / sizeof(u32);
774 if (netxen_rom_fast_read(adapter, addr, ptr32) == -1) {
780 if (boardinfo->magic != NETXEN_BDINFO_MAGIC) {
781 printk("%s: ERROR reading %s board config."
782 " Read %x, expected %x\n", netxen_nic_driver_name,
783 netxen_nic_driver_name,
784 boardinfo->magic, NETXEN_BDINFO_MAGIC);
787 if (boardinfo->header_version != NETXEN_BDINFO_VERSION) {
788 printk("%s: Unknown board config version."
789 " Read %x, expected %x\n", netxen_nic_driver_name,
790 boardinfo->header_version, NETXEN_BDINFO_VERSION);
794 DPRINTK(INFO, "Discovered board type:0x%x ", boardinfo->board_type);
795 switch ((netxen_brdtype_t) boardinfo->board_type) {
796 case NETXEN_BRDTYPE_P2_SB35_4G:
797 adapter->ahw.board_type = NETXEN_NIC_GBE;
799 case NETXEN_BRDTYPE_P2_SB31_10G:
800 case NETXEN_BRDTYPE_P2_SB31_10G_IMEZ:
801 case NETXEN_BRDTYPE_P2_SB31_10G_HMEZ:
802 case NETXEN_BRDTYPE_P2_SB31_10G_CX4:
803 adapter->ahw.board_type = NETXEN_NIC_XGBE;
805 case NETXEN_BRDTYPE_P1_BD:
806 case NETXEN_BRDTYPE_P1_SB:
807 case NETXEN_BRDTYPE_P1_SMAX:
808 case NETXEN_BRDTYPE_P1_SOCK:
809 adapter->ahw.board_type = NETXEN_NIC_GBE;
812 printk("%s: Unknown(%x)\n", netxen_nic_driver_name,
813 boardinfo->board_type);
820 /* NIU access sections */
822 int netxen_nic_set_mtu_gb(struct netxen_port *port, int new_mtu)
824 struct netxen_adapter *adapter = port->adapter;
825 netxen_nic_write_w0(adapter,
826 NETXEN_NIU_GB_MAX_FRAME_SIZE(port->portnum),
831 int netxen_nic_set_mtu_xgb(struct netxen_port *port, int new_mtu)
833 struct netxen_adapter *adapter = port->adapter;
834 new_mtu += NETXEN_NIU_HDRSIZE + NETXEN_NIU_TLRSIZE;
835 netxen_nic_write_w0(adapter, NETXEN_NIU_XGE_MAX_FRAME_SIZE, new_mtu);
839 void netxen_nic_init_niu_gb(struct netxen_adapter *adapter)
842 for (portno = 0; portno < NETXEN_NIU_MAX_GBE_PORTS; portno++)
843 netxen_niu_gbe_init_port(adapter, portno);
846 void netxen_nic_stop_all_ports(struct netxen_adapter *adapter)
849 struct netxen_port *port;
851 for (port_nr = 0; port_nr < adapter->ahw.max_ports; port_nr++) {
852 port = adapter->port[port_nr];
853 if (adapter->ops->stop_port)
854 adapter->ops->stop_port(adapter, port->portnum);
859 netxen_crb_writelit_adapter(struct netxen_adapter *adapter, unsigned long off,
864 if (ADDR_IN_WINDOW1(off)) {
865 writel(data, NETXEN_CRB_NORMALIZE(adapter, off));
867 netxen_nic_pci_change_crbwindow(adapter, 0);
868 addr = (void __iomem *)(pci_base_offset(adapter, off));
870 netxen_nic_pci_change_crbwindow(adapter, 1);
874 void netxen_nic_set_link_parameters(struct netxen_port *port)
876 struct netxen_adapter *adapter = port->adapter;
881 netxen_nic_read_w0(adapter, NETXEN_NIU_MODE, &mode);
882 if (netxen_get_niu_enable_ge(mode)) { /* Gb 10/100/1000 Mbps mode */
883 if (adapter->ops->phy_read
885 phy_read(adapter, port->portnum,
886 NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_STATUS,
888 if (netxen_get_phy_link(status)) {
889 switch (netxen_get_phy_speed(status)) {
891 port->link_speed = SPEED_10;
894 port->link_speed = SPEED_100;
897 port->link_speed = SPEED_1000;
900 port->link_speed = -1;
903 switch (netxen_get_phy_duplex(status)) {
905 port->link_duplex = DUPLEX_HALF;
908 port->link_duplex = DUPLEX_FULL;
911 port->link_duplex = -1;
914 if (adapter->ops->phy_read
916 phy_read(adapter, port->portnum,
917 NETXEN_NIU_GB_MII_MGMT_ADDR_AUTONEG,
918 (__le32 *) & autoneg) != 0)
919 port->link_autoneg = autoneg;
924 port->link_speed = -1;
925 port->link_duplex = -1;
930 void netxen_nic_flash_print(struct netxen_adapter *adapter)
936 char brd_name[NETXEN_MAX_SHORT_NAME];
937 struct netxen_new_user_info user_info;
938 int i, addr = USER_START;
941 struct netxen_board_info *board_info = &(adapter->ahw.boardcfg);
942 if (board_info->magic != NETXEN_BDINFO_MAGIC) {
944 ("NetXen Unknown board config, Read 0x%x expected as 0x%x\n",
945 board_info->magic, NETXEN_BDINFO_MAGIC);
948 if (board_info->header_version != NETXEN_BDINFO_VERSION) {
949 printk("NetXen Unknown board config version."
950 " Read %x, expected %x\n",
951 board_info->header_version, NETXEN_BDINFO_VERSION);
955 ptr32 = (u32 *) & user_info;
957 i < sizeof(struct netxen_new_user_info) / sizeof(u32);
959 if (netxen_rom_fast_read(adapter, addr, ptr32) == -1) {
960 printk("%s: ERROR reading %s board userarea.\n",
961 netxen_nic_driver_name,
962 netxen_nic_driver_name);
968 get_brd_name_by_type(board_info->board_type, brd_name);
970 printk("NetXen %s Board S/N %s Chip id 0x%x\n",
971 brd_name, user_info.serial_num, board_info->chip_id);
973 printk("NetXen %s Board #%d, Chip id 0x%x\n",
974 board_info->board_type == 0x0b ? "XGB" : "GBE",
975 board_info->board_num, board_info->chip_id);
976 fw_major = readl(NETXEN_CRB_NORMALIZE(adapter,
977 NETXEN_FW_VERSION_MAJOR));
978 fw_minor = readl(NETXEN_CRB_NORMALIZE(adapter,
979 NETXEN_FW_VERSION_MINOR));
981 readl(NETXEN_CRB_NORMALIZE(adapter, NETXEN_FW_VERSION_SUB));
983 printk("NetXen Firmware version %d.%d.%d\n", fw_major, fw_minor,
986 if (fw_major != _NETXEN_NIC_LINUX_MAJOR) {
987 printk(KERN_ERR "The mismatch in driver version and firmware "
988 "version major number\n"
989 "Driver version major number = %d \t"
990 "Firmware version major number = %d \n",
991 _NETXEN_NIC_LINUX_MAJOR, fw_major);
992 adapter->driver_mismatch = 1;
994 if (fw_minor != _NETXEN_NIC_LINUX_MINOR) {
995 printk(KERN_ERR "The mismatch in driver version and firmware "
996 "version minor number\n"
997 "Driver version minor number = %d \t"
998 "Firmware version minor number = %d \n",
999 _NETXEN_NIC_LINUX_MINOR, fw_minor);
1000 adapter->driver_mismatch = 1;
1002 if (adapter->driver_mismatch)
1003 printk(KERN_INFO "Use the driver with version no %d.%d.xxx\n",
1004 fw_major, fw_minor);
1007 int netxen_crb_read_val(struct netxen_adapter *adapter, unsigned long off)
1010 netxen_nic_hw_read_wx(adapter, off, &data, 4);