2 * Copyright (C) 2003 - 2006 NetXen, Inc.
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
20 * The full GNU General Public License is included in this distribution
21 * in the file called LICENSE.
23 * Contact Information:
26 * 3965 Freedom Circle, Fourth floor,
27 * Santa Clara, CA 95054
30 * Source file for NIC routines to access the Phantom hardware
34 #include "netxen_nic.h"
35 #include "netxen_nic_hw.h"
36 #include "netxen_nic_phan_reg.h"
41 struct netxen_recv_crb recv_crb_registers[] = {
46 /* crb_rcv_producer: */
48 NETXEN_NIC_REG(0x100),
50 NETXEN_NIC_REG(0x110),
54 /* crb_sts_consumer: */
55 NETXEN_NIC_REG(0x138),
61 /* crb_rcv_producer: */
63 NETXEN_NIC_REG(0x144),
65 NETXEN_NIC_REG(0x154),
69 /* crb_sts_consumer: */
70 NETXEN_NIC_REG(0x17c),
76 /* crb_rcv_producer: */
78 NETXEN_NIC_REG(0x1d8),
80 NETXEN_NIC_REG(0x1f8),
84 /* crb_sts_consumer: */
85 NETXEN_NIC_REG(0x220),
91 /* crb_rcv_producer: */
93 NETXEN_NIC_REG(0x22c),
95 NETXEN_NIC_REG(0x23c),
99 /* crb_sts_consumer: */
100 NETXEN_NIC_REG(0x264),
104 static u64 ctx_addr_sig_regs[][3] = {
105 {NETXEN_NIC_REG(0x188), NETXEN_NIC_REG(0x18c), NETXEN_NIC_REG(0x1c0)},
106 {NETXEN_NIC_REG(0x190), NETXEN_NIC_REG(0x194), NETXEN_NIC_REG(0x1c4)},
107 {NETXEN_NIC_REG(0x198), NETXEN_NIC_REG(0x19c), NETXEN_NIC_REG(0x1c8)},
108 {NETXEN_NIC_REG(0x1a0), NETXEN_NIC_REG(0x1a4), NETXEN_NIC_REG(0x1cc)}
110 #define CRB_CTX_ADDR_REG_LO(FUNC_ID) (ctx_addr_sig_regs[FUNC_ID][0])
111 #define CRB_CTX_ADDR_REG_HI(FUNC_ID) (ctx_addr_sig_regs[FUNC_ID][2])
112 #define CRB_CTX_SIGNATURE_REG(FUNC_ID) (ctx_addr_sig_regs[FUNC_ID][1])
115 /* PCI Windowing for DDR regions. */
117 #define ADDR_IN_RANGE(addr, low, high) \
118 (((addr) <= (high)) && ((addr) >= (low)))
120 #define NETXEN_FLASH_BASE (NETXEN_BOOTLD_START)
121 #define NETXEN_PHANTOM_MEM_BASE (NETXEN_FLASH_BASE)
122 #define NETXEN_MAX_MTU 8000 + NETXEN_ENET_HEADER_SIZE + NETXEN_ETH_FCS_SIZE
123 #define NETXEN_MIN_MTU 64
124 #define NETXEN_ETH_FCS_SIZE 4
125 #define NETXEN_ENET_HEADER_SIZE 14
126 #define NETXEN_WINDOW_ONE 0x2000000 /*CRB Window: bit 25 of CRB address */
127 #define NETXEN_FIRMWARE_LEN ((16 * 1024) / 4)
128 #define NETXEN_NIU_HDRSIZE (0x1 << 6)
129 #define NETXEN_NIU_TLRSIZE (0x1 << 5)
131 #define lower32(x) ((u32)((x) & 0xffffffff))
133 ((u32)(((unsigned long long)(x) >> 32) & 0xffffffff))
135 #define NETXEN_NIC_ZERO_PAUSE_ADDR 0ULL
136 #define NETXEN_NIC_UNIT_PAUSE_ADDR 0x200ULL
137 #define NETXEN_NIC_EPG_PAUSE_ADDR1 0x2200010000c28001ULL
138 #define NETXEN_NIC_EPG_PAUSE_ADDR2 0x0100088866554433ULL
140 #define NETXEN_NIC_WINDOW_MARGIN 0x100000
142 static unsigned long netxen_nic_pci_set_window(struct netxen_adapter *adapter,
143 unsigned long long addr);
144 void netxen_free_hw_resources(struct netxen_adapter *adapter);
146 int netxen_nic_set_mac(struct net_device *netdev, void *p)
148 struct netxen_adapter *adapter = netdev_priv(netdev);
149 struct sockaddr *addr = p;
151 if (netif_running(netdev))
154 if (!is_valid_ether_addr(addr->sa_data))
155 return -EADDRNOTAVAIL;
157 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
159 if (adapter->macaddr_set)
160 adapter->macaddr_set(adapter, addr->sa_data);
165 #define NETXEN_UNICAST_ADDR(port, index) \
166 (NETXEN_UNICAST_ADDR_BASE+(port*32)+(index*8))
167 #define NETXEN_MCAST_ADDR(port, index) \
168 (NETXEN_MULTICAST_ADDR_BASE+(port*0x80)+(index*8))
169 #define MAC_HI(addr) \
170 ((addr[2] << 16) | (addr[1] << 8) | (addr[0]))
171 #define MAC_LO(addr) \
172 ((addr[5] << 16) | (addr[4] << 8) | (addr[3]))
175 netxen_nic_enable_mcast_filter(struct netxen_adapter *adapter)
178 u16 port = adapter->physical_port;
179 u8 *addr = adapter->netdev->dev_addr;
181 if (adapter->mc_enabled)
184 netxen_nic_hw_read_wx(adapter, NETXEN_MAC_ADDR_CNTL_REG, &val, 4);
185 val |= (1UL << (28+port));
186 netxen_nic_hw_write_wx(adapter, NETXEN_MAC_ADDR_CNTL_REG, &val, 4);
188 /* add broadcast addr to filter */
190 netxen_crb_writelit_adapter(adapter, NETXEN_UNICAST_ADDR(port, 0), val);
191 netxen_crb_writelit_adapter(adapter,
192 NETXEN_UNICAST_ADDR(port, 0)+4, val);
194 /* add station addr to filter */
196 netxen_crb_writelit_adapter(adapter, NETXEN_UNICAST_ADDR(port, 1), val);
198 netxen_crb_writelit_adapter(adapter,
199 NETXEN_UNICAST_ADDR(port, 1)+4, val);
201 adapter->mc_enabled = 1;
206 netxen_nic_disable_mcast_filter(struct netxen_adapter *adapter)
209 u16 port = adapter->physical_port;
210 u8 *addr = adapter->netdev->dev_addr;
212 if (!adapter->mc_enabled)
215 netxen_nic_hw_read_wx(adapter, NETXEN_MAC_ADDR_CNTL_REG, &val, 4);
216 val &= ~(1UL << (28+port));
217 netxen_nic_hw_write_wx(adapter, NETXEN_MAC_ADDR_CNTL_REG, &val, 4);
220 netxen_crb_writelit_adapter(adapter, NETXEN_UNICAST_ADDR(port, 0), val);
222 netxen_crb_writelit_adapter(adapter,
223 NETXEN_UNICAST_ADDR(port, 0)+4, val);
225 netxen_crb_writelit_adapter(adapter, NETXEN_UNICAST_ADDR(port, 1), 0);
226 netxen_crb_writelit_adapter(adapter, NETXEN_UNICAST_ADDR(port, 1)+4, 0);
228 adapter->mc_enabled = 0;
233 netxen_nic_set_mcast_addr(struct netxen_adapter *adapter,
237 u16 port = adapter->physical_port;
242 netxen_crb_writelit_adapter(adapter,
243 NETXEN_MCAST_ADDR(port, index), hi);
244 netxen_crb_writelit_adapter(adapter,
245 NETXEN_MCAST_ADDR(port, index)+4, lo);
251 * netxen_nic_set_multi - Multicast
253 void netxen_nic_set_multi(struct net_device *netdev)
255 struct netxen_adapter *adapter = netdev_priv(netdev);
256 struct dev_mc_list *mc_ptr;
260 memset(null_addr, 0, 6);
262 if (netdev->flags & IFF_PROMISC) {
264 adapter->set_promisc(adapter,
265 NETXEN_NIU_PROMISC_MODE);
267 /* Full promiscuous mode */
268 netxen_nic_disable_mcast_filter(adapter);
273 if (netdev->mc_count == 0) {
274 adapter->set_promisc(adapter,
275 NETXEN_NIU_NON_PROMISC_MODE);
276 netxen_nic_disable_mcast_filter(adapter);
280 adapter->set_promisc(adapter, NETXEN_NIU_ALLMULTI_MODE);
281 if (netdev->flags & IFF_ALLMULTI ||
282 netdev->mc_count > adapter->max_mc_count) {
283 netxen_nic_disable_mcast_filter(adapter);
287 netxen_nic_enable_mcast_filter(adapter);
289 for (mc_ptr = netdev->mc_list; mc_ptr; mc_ptr = mc_ptr->next, index++)
290 netxen_nic_set_mcast_addr(adapter, index, mc_ptr->dmi_addr);
292 if (index != netdev->mc_count)
293 printk(KERN_WARNING "%s: %s multicast address count mismatch\n",
294 netxen_nic_driver_name, netdev->name);
296 /* Clear out remaining addresses */
297 for (; index < adapter->max_mc_count; index++)
298 netxen_nic_set_mcast_addr(adapter, index, null_addr);
302 * netxen_nic_change_mtu - Change the Maximum Transfer Unit
303 * @returns 0 on success, negative on failure
305 int netxen_nic_change_mtu(struct net_device *netdev, int mtu)
307 struct netxen_adapter *adapter = netdev_priv(netdev);
308 int eff_mtu = mtu + NETXEN_ENET_HEADER_SIZE + NETXEN_ETH_FCS_SIZE;
310 if ((eff_mtu > NETXEN_MAX_MTU) || (eff_mtu < NETXEN_MIN_MTU)) {
311 printk(KERN_ERR "%s: %s %d is not supported.\n",
312 netxen_nic_driver_name, netdev->name, mtu);
316 if (adapter->set_mtu)
317 adapter->set_mtu(adapter, mtu);
324 * check if the firmware has been downloaded and ready to run and
325 * setup the address for the descriptors in the adapter
327 int netxen_nic_hw_resources(struct netxen_adapter *adapter)
329 struct netxen_hardware_context *hw = &adapter->ahw;
332 int loops = 0, err = 0;
334 struct netxen_recv_context *recv_ctx;
335 struct netxen_rcv_desc_ctx *rcv_desc;
336 int func_id = adapter->portnum;
338 DPRINTK(INFO, "crb_base: %lx %x", NETXEN_PCI_CRBSPACE,
339 PCI_OFFSET_SECOND_RANGE(adapter, NETXEN_PCI_CRBSPACE));
340 DPRINTK(INFO, "cam base: %lx %x", NETXEN_CRB_CAM,
341 pci_base_offset(adapter, NETXEN_CRB_CAM));
342 DPRINTK(INFO, "cam RAM: %lx %x", NETXEN_CAM_RAM_BASE,
343 pci_base_offset(adapter, NETXEN_CAM_RAM_BASE));
346 for (ctx = 0; ctx < MAX_RCV_CTX; ++ctx) {
347 DPRINTK(INFO, "Command Peg ready..waiting for rcv peg\n");
351 state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_RCVPEG_STATE));
352 while (state != PHAN_PEG_RCV_INITIALIZED && loops < 20) {
355 state = readl(NETXEN_CRB_NORMALIZE(adapter,
360 printk(KERN_ERR "Rcv Peg initialization not complete:"
366 adapter->intr_scheme = readl(
367 NETXEN_CRB_NORMALIZE(adapter, CRB_NIC_CAPABILITIES_FW));
368 adapter->msi_mode = readl(
369 NETXEN_CRB_NORMALIZE(adapter, CRB_NIC_MSI_MODE_FW));
371 addr = pci_alloc_consistent(adapter->pdev,
372 sizeof(struct netxen_ring_ctx) + sizeof(uint32_t),
373 &adapter->ctx_desc_phys_addr);
376 DPRINTK(ERR, "bad return from pci_alloc_consistent\n");
380 memset(addr, 0, sizeof(struct netxen_ring_ctx));
381 adapter->ctx_desc = (struct netxen_ring_ctx *)addr;
382 adapter->ctx_desc->ctx_id = cpu_to_le32(adapter->portnum);
383 adapter->ctx_desc->cmd_consumer_offset =
384 cpu_to_le64(adapter->ctx_desc_phys_addr +
385 sizeof(struct netxen_ring_ctx));
386 adapter->cmd_consumer = (__le32 *) (((char *)addr) +
387 sizeof(struct netxen_ring_ctx));
389 addr = pci_alloc_consistent(adapter->pdev,
390 sizeof(struct cmd_desc_type0) *
391 adapter->max_tx_desc_count,
392 &hw->cmd_desc_phys_addr);
395 DPRINTK(ERR, "bad return from pci_alloc_consistent\n");
396 netxen_free_hw_resources(adapter);
400 adapter->ctx_desc->cmd_ring_addr =
401 cpu_to_le64(hw->cmd_desc_phys_addr);
402 adapter->ctx_desc->cmd_ring_size =
403 cpu_to_le32(adapter->max_tx_desc_count);
405 hw->cmd_desc_head = (struct cmd_desc_type0 *)addr;
407 for (ctx = 0; ctx < MAX_RCV_CTX; ++ctx) {
408 recv_ctx = &adapter->recv_ctx[ctx];
410 for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
411 rcv_desc = &recv_ctx->rcv_desc[ring];
412 addr = pci_alloc_consistent(adapter->pdev,
414 &rcv_desc->phys_addr);
416 DPRINTK(ERR, "bad return from "
417 "pci_alloc_consistent\n");
418 netxen_free_hw_resources(adapter);
422 rcv_desc->desc_head = (struct rcv_desc *)addr;
423 adapter->ctx_desc->rcv_ctx[ring].rcv_ring_addr =
424 cpu_to_le64(rcv_desc->phys_addr);
425 adapter->ctx_desc->rcv_ctx[ring].rcv_ring_size =
426 cpu_to_le32(rcv_desc->max_rx_desc_count);
427 rcv_desc->crb_rcv_producer =
428 recv_crb_registers[adapter->portnum].
429 crb_rcv_producer[ring];
432 addr = pci_alloc_consistent(adapter->pdev, STATUS_DESC_RINGSIZE,
433 &recv_ctx->rcv_status_desc_phys_addr);
435 DPRINTK(ERR, "bad return from"
436 " pci_alloc_consistent\n");
437 netxen_free_hw_resources(adapter);
441 recv_ctx->rcv_status_desc_head = (struct status_desc *)addr;
442 adapter->ctx_desc->sts_ring_addr =
443 cpu_to_le64(recv_ctx->rcv_status_desc_phys_addr);
444 adapter->ctx_desc->sts_ring_size =
445 cpu_to_le32(adapter->max_rx_desc_count);
446 recv_ctx->crb_sts_consumer =
447 recv_crb_registers[adapter->portnum].crb_sts_consumer;
452 writel(lower32(adapter->ctx_desc_phys_addr),
453 NETXEN_CRB_NORMALIZE(adapter, CRB_CTX_ADDR_REG_LO(func_id)));
454 writel(upper32(adapter->ctx_desc_phys_addr),
455 NETXEN_CRB_NORMALIZE(adapter, CRB_CTX_ADDR_REG_HI(func_id)));
456 writel(NETXEN_CTX_SIGNATURE | func_id,
457 NETXEN_CRB_NORMALIZE(adapter, CRB_CTX_SIGNATURE_REG(func_id)));
461 void netxen_free_hw_resources(struct netxen_adapter *adapter)
463 struct netxen_recv_context *recv_ctx;
464 struct netxen_rcv_desc_ctx *rcv_desc;
467 if (adapter->ctx_desc != NULL) {
468 pci_free_consistent(adapter->pdev,
469 sizeof(struct netxen_ring_ctx) +
472 adapter->ctx_desc_phys_addr);
473 adapter->ctx_desc = NULL;
476 if (adapter->ahw.cmd_desc_head != NULL) {
477 pci_free_consistent(adapter->pdev,
478 sizeof(struct cmd_desc_type0) *
479 adapter->max_tx_desc_count,
480 adapter->ahw.cmd_desc_head,
481 adapter->ahw.cmd_desc_phys_addr);
482 adapter->ahw.cmd_desc_head = NULL;
485 for (ctx = 0; ctx < MAX_RCV_CTX; ++ctx) {
486 recv_ctx = &adapter->recv_ctx[ctx];
487 for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
488 rcv_desc = &recv_ctx->rcv_desc[ring];
490 if (rcv_desc->desc_head != NULL) {
491 pci_free_consistent(adapter->pdev,
494 rcv_desc->phys_addr);
495 rcv_desc->desc_head = NULL;
499 if (recv_ctx->rcv_status_desc_head != NULL) {
500 pci_free_consistent(adapter->pdev,
501 STATUS_DESC_RINGSIZE,
502 recv_ctx->rcv_status_desc_head,
504 rcv_status_desc_phys_addr);
505 recv_ctx->rcv_status_desc_head = NULL;
510 void netxen_tso_check(struct netxen_adapter *adapter,
511 struct cmd_desc_type0 *desc, struct sk_buff *skb)
514 desc->total_hdr_length = (sizeof(struct ethhdr) +
515 ip_hdrlen(skb) + tcp_hdrlen(skb));
516 netxen_set_cmd_desc_opcode(desc, TX_TCP_LSO);
517 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
518 if (ip_hdr(skb)->protocol == IPPROTO_TCP) {
519 netxen_set_cmd_desc_opcode(desc, TX_TCP_PKT);
520 } else if (ip_hdr(skb)->protocol == IPPROTO_UDP) {
521 netxen_set_cmd_desc_opcode(desc, TX_UDP_PKT);
526 desc->tcp_hdr_offset = skb_transport_offset(skb);
527 desc->ip_hdr_offset = skb_network_offset(skb);
530 int netxen_is_flash_supported(struct netxen_adapter *adapter)
532 const int locs[] = { 0, 0x4, 0x100, 0x4000, 0x4128 };
533 int addr, val01, val02, i, j;
535 /* if the flash size less than 4Mb, make huge war cry and die */
536 for (j = 1; j < 4; j++) {
537 addr = j * NETXEN_NIC_WINDOW_MARGIN;
538 for (i = 0; i < ARRAY_SIZE(locs); i++) {
539 if (netxen_rom_fast_read(adapter, locs[i], &val01) == 0
540 && netxen_rom_fast_read(adapter, (addr + locs[i]),
552 static int netxen_get_flash_block(struct netxen_adapter *adapter, int base,
553 int size, __le32 * buf)
561 for (i = 0; i < size / sizeof(u32); i++) {
562 if (netxen_rom_fast_read(adapter, addr, &v) == -1)
564 *ptr32 = cpu_to_le32(v);
568 if ((char *)buf + size > (char *)ptr32) {
570 if (netxen_rom_fast_read(adapter, addr, &v) == -1)
572 local = cpu_to_le32(v);
573 memcpy(ptr32, &local, (char *)buf + size - (char *)ptr32);
579 int netxen_get_flash_mac_addr(struct netxen_adapter *adapter, __le64 mac[])
581 __le32 *pmac = (__le32 *) & mac[0];
583 if (netxen_get_flash_block(adapter,
585 offsetof(struct netxen_new_user_info,
587 FLASH_NUM_PORTS * sizeof(u64), pmac) == -1) {
590 if (*mac == cpu_to_le64(~0ULL)) {
591 if (netxen_get_flash_block(adapter,
592 NETXEN_USER_START_OLD +
593 offsetof(struct netxen_user_old_info,
595 FLASH_NUM_PORTS * sizeof(u64),
598 if (*mac == cpu_to_le64(~0ULL))
605 * Changes the CRB window to the specified window.
607 void netxen_nic_pci_change_crbwindow(struct netxen_adapter *adapter, u32 wndw)
609 void __iomem *offset;
613 if (adapter->curr_window == wndw)
615 switch(adapter->ahw.pci_func) {
617 offset = PCI_OFFSET_SECOND_RANGE(adapter,
618 NETXEN_PCIX_PH_REG(PCIX_CRB_WINDOW));
621 offset = PCI_OFFSET_SECOND_RANGE(adapter,
622 NETXEN_PCIX_PH_REG(PCIX_CRB_WINDOW_F1));
625 offset = PCI_OFFSET_SECOND_RANGE(adapter,
626 NETXEN_PCIX_PH_REG(PCIX_CRB_WINDOW_F2));
629 offset = PCI_OFFSET_SECOND_RANGE(adapter,
630 NETXEN_PCIX_PH_REG(PCIX_CRB_WINDOW_F3));
633 printk(KERN_INFO "Changing the window for PCI function "
634 "%d\n", adapter->ahw.pci_func);
635 offset = PCI_OFFSET_SECOND_RANGE(adapter,
636 NETXEN_PCIX_PH_REG(PCIX_CRB_WINDOW));
640 * Move the CRB window.
641 * We need to write to the "direct access" region of PCI
642 * to avoid a race condition where the window register has
643 * not been successfully written across CRB before the target
644 * register address is received by PCI. The direct region bypasses
649 wndw = NETXEN_WINDOW_ONE;
651 writel(wndw, offset);
653 /* MUST make sure window is set before we forge on... */
654 while ((tmp = readl(offset)) != wndw) {
655 printk(KERN_WARNING "%s: %s WARNING: CRB window value not "
656 "registered properly: 0x%08x.\n",
657 netxen_nic_driver_name, __FUNCTION__, tmp);
664 if (wndw == NETXEN_WINDOW_ONE)
665 adapter->curr_window = 1;
667 adapter->curr_window = 0;
670 int netxen_load_firmware(struct netxen_adapter *adapter)
674 u32 flashaddr = NETXEN_FLASH_BASE, memaddr = NETXEN_PHANTOM_MEM_BASE;
678 size = NETXEN_FIRMWARE_LEN;
679 writel(1, NETXEN_CRB_NORMALIZE(adapter, NETXEN_ROMUSB_GLB_CAS_RST));
681 for (i = 0; i < size; i++) {
683 if (netxen_rom_fast_read(adapter, flashaddr, (int *)&data) != 0)
686 off = netxen_nic_pci_set_window(adapter, memaddr);
687 addr = pci_base_offset(adapter, off);
690 if (readl(addr) == data)
696 printk(KERN_ERR "%s: firmware load aborted, write failed at 0x%x\n",
697 netxen_nic_driver_name, memaddr);
704 /* make sure Casper is powered on */
706 NETXEN_CRB_NORMALIZE(adapter, NETXEN_ROMUSB_GLB_CHIP_CLK_CTRL));
707 writel(0, NETXEN_CRB_NORMALIZE(adapter, NETXEN_ROMUSB_GLB_CAS_RST));
713 netxen_nic_hw_write_wx(struct netxen_adapter *adapter, u64 off, void *data,
718 if (ADDR_IN_WINDOW1(off)) {
719 addr = NETXEN_CRB_NORMALIZE(adapter, off);
720 } else { /* Window 0 */
721 addr = pci_base_offset(adapter, off);
722 netxen_nic_pci_change_crbwindow(adapter, 0);
725 DPRINTK(INFO, "writing to base %lx offset %llx addr %p"
726 " data %llx len %d\n",
727 pci_base(adapter, off), off, addr,
728 *(unsigned long long *)data, len);
730 netxen_nic_pci_change_crbwindow(adapter, 1);
736 writeb(*(u8 *) data, addr);
739 writew(*(u16 *) data, addr);
742 writel(*(u32 *) data, addr);
745 writeq(*(u64 *) data, addr);
749 "writing data %lx to offset %llx, num words=%d\n",
750 *(unsigned long *)data, off, (len >> 3));
752 netxen_nic_hw_block_write64((u64 __iomem *) data, addr,
756 if (!ADDR_IN_WINDOW1(off))
757 netxen_nic_pci_change_crbwindow(adapter, 1);
763 netxen_nic_hw_read_wx(struct netxen_adapter *adapter, u64 off, void *data,
768 if (ADDR_IN_WINDOW1(off)) { /* Window 1 */
769 addr = NETXEN_CRB_NORMALIZE(adapter, off);
770 } else { /* Window 0 */
771 addr = pci_base_offset(adapter, off);
772 netxen_nic_pci_change_crbwindow(adapter, 0);
775 DPRINTK(INFO, "reading from base %lx offset %llx addr %p\n",
776 pci_base(adapter, off), off, addr);
778 netxen_nic_pci_change_crbwindow(adapter, 1);
783 *(u8 *) data = readb(addr);
786 *(u16 *) data = readw(addr);
789 *(u32 *) data = readl(addr);
792 *(u64 *) data = readq(addr);
795 netxen_nic_hw_block_read64((u64 __iomem *) data, addr,
799 DPRINTK(INFO, "read %lx\n", *(unsigned long *)data);
801 if (!ADDR_IN_WINDOW1(off))
802 netxen_nic_pci_change_crbwindow(adapter, 1);
807 void netxen_nic_reg_write(struct netxen_adapter *adapter, u64 off, u32 val)
808 { /* Only for window 1 */
811 addr = NETXEN_CRB_NORMALIZE(adapter, off);
812 DPRINTK(INFO, "writing to base %lx offset %llx addr %p data %x\n",
813 pci_base(adapter, off), off, addr, val);
818 int netxen_nic_reg_read(struct netxen_adapter *adapter, u64 off)
819 { /* Only for window 1 */
823 addr = NETXEN_CRB_NORMALIZE(adapter, off);
824 DPRINTK(INFO, "reading from base %lx offset %llx addr %p\n",
825 pci_base(adapter, off), off, addr);
832 /* Change the window to 0, write and change back to window 1. */
833 void netxen_nic_write_w0(struct netxen_adapter *adapter, u32 index, u32 value)
837 netxen_nic_pci_change_crbwindow(adapter, 0);
838 addr = pci_base_offset(adapter, index);
840 netxen_nic_pci_change_crbwindow(adapter, 1);
843 /* Change the window to 0, read and change back to window 1. */
844 void netxen_nic_read_w0(struct netxen_adapter *adapter, u32 index, u32 * value)
848 addr = pci_base_offset(adapter, index);
850 netxen_nic_pci_change_crbwindow(adapter, 0);
851 *value = readl(addr);
852 netxen_nic_pci_change_crbwindow(adapter, 1);
855 static int netxen_pci_set_window_warning_count;
857 static unsigned long netxen_nic_pci_set_window(struct netxen_adapter *adapter,
858 unsigned long long addr)
860 static int ddr_mn_window = -1;
861 static int qdr_sn_window = -1;
864 if (ADDR_IN_RANGE(addr, NETXEN_ADDR_DDR_NET, NETXEN_ADDR_DDR_NET_MAX)) {
865 /* DDR network side */
866 addr -= NETXEN_ADDR_DDR_NET;
867 window = (addr >> 25) & 0x3ff;
868 if (ddr_mn_window != window) {
869 ddr_mn_window = window;
870 writel(window, PCI_OFFSET_SECOND_RANGE(adapter,
872 (PCIX_MN_WINDOW(adapter->ahw.pci_func))));
873 /* MUST make sure window is set before we forge on... */
874 readl(PCI_OFFSET_SECOND_RANGE(adapter,
876 (PCIX_MN_WINDOW(adapter->ahw.pci_func))));
878 addr -= (window * NETXEN_WINDOW_ONE);
879 addr += NETXEN_PCI_DDR_NET;
880 } else if (ADDR_IN_RANGE(addr, NETXEN_ADDR_OCM0, NETXEN_ADDR_OCM0_MAX)) {
881 addr -= NETXEN_ADDR_OCM0;
882 addr += NETXEN_PCI_OCM0;
883 } else if (ADDR_IN_RANGE(addr, NETXEN_ADDR_OCM1, NETXEN_ADDR_OCM1_MAX)) {
884 addr -= NETXEN_ADDR_OCM1;
885 addr += NETXEN_PCI_OCM1;
888 (addr, NETXEN_ADDR_QDR_NET, NETXEN_ADDR_QDR_NET_MAX)) {
889 /* QDR network side */
890 addr -= NETXEN_ADDR_QDR_NET;
891 window = (addr >> 22) & 0x3f;
892 if (qdr_sn_window != window) {
893 qdr_sn_window = window;
894 writel((window << 22),
895 PCI_OFFSET_SECOND_RANGE(adapter,
897 (PCIX_SN_WINDOW(adapter->ahw.pci_func))));
898 /* MUST make sure window is set before we forge on... */
899 readl(PCI_OFFSET_SECOND_RANGE(adapter,
901 (PCIX_SN_WINDOW(adapter->ahw.pci_func))));
903 addr -= (window * 0x400000);
904 addr += NETXEN_PCI_QDR_NET;
907 * peg gdb frequently accesses memory that doesn't exist,
908 * this limits the chit chat so debugging isn't slowed down.
910 if ((netxen_pci_set_window_warning_count++ < 8)
911 || (netxen_pci_set_window_warning_count % 64 == 0))
912 printk("%s: Warning:netxen_nic_pci_set_window()"
913 " Unknown address range!\n",
914 netxen_nic_driver_name);
922 netxen_nic_erase_pxe(struct netxen_adapter *adapter)
924 if (netxen_rom_fast_write(adapter, NETXEN_PXE_START, 0) == -1) {
925 printk(KERN_ERR "%s: erase pxe failed\n",
926 netxen_nic_driver_name);
933 int netxen_nic_get_board_info(struct netxen_adapter *adapter)
936 int addr = NETXEN_BRDCFG_START;
937 struct netxen_board_info *boardinfo;
941 boardinfo = &adapter->ahw.boardcfg;
942 ptr32 = (u32 *) boardinfo;
944 for (index = 0; index < sizeof(struct netxen_board_info) / sizeof(u32);
946 if (netxen_rom_fast_read(adapter, addr, ptr32) == -1) {
952 if (boardinfo->magic != NETXEN_BDINFO_MAGIC) {
953 printk("%s: ERROR reading %s board config."
954 " Read %x, expected %x\n", netxen_nic_driver_name,
955 netxen_nic_driver_name,
956 boardinfo->magic, NETXEN_BDINFO_MAGIC);
959 if (boardinfo->header_version != NETXEN_BDINFO_VERSION) {
960 printk("%s: Unknown board config version."
961 " Read %x, expected %x\n", netxen_nic_driver_name,
962 boardinfo->header_version, NETXEN_BDINFO_VERSION);
966 DPRINTK(INFO, "Discovered board type:0x%x ", boardinfo->board_type);
967 switch ((netxen_brdtype_t) boardinfo->board_type) {
968 case NETXEN_BRDTYPE_P2_SB35_4G:
969 adapter->ahw.board_type = NETXEN_NIC_GBE;
971 case NETXEN_BRDTYPE_P2_SB31_10G:
972 case NETXEN_BRDTYPE_P2_SB31_10G_IMEZ:
973 case NETXEN_BRDTYPE_P2_SB31_10G_HMEZ:
974 case NETXEN_BRDTYPE_P2_SB31_10G_CX4:
975 adapter->ahw.board_type = NETXEN_NIC_XGBE;
977 case NETXEN_BRDTYPE_P1_BD:
978 case NETXEN_BRDTYPE_P1_SB:
979 case NETXEN_BRDTYPE_P1_SMAX:
980 case NETXEN_BRDTYPE_P1_SOCK:
981 adapter->ahw.board_type = NETXEN_NIC_GBE;
984 printk("%s: Unknown(%x)\n", netxen_nic_driver_name,
985 boardinfo->board_type);
992 /* NIU access sections */
994 int netxen_nic_set_mtu_gb(struct netxen_adapter *adapter, int new_mtu)
996 netxen_nic_write_w0(adapter,
997 NETXEN_NIU_GB_MAX_FRAME_SIZE(adapter->physical_port),
1002 int netxen_nic_set_mtu_xgb(struct netxen_adapter *adapter, int new_mtu)
1004 new_mtu += NETXEN_NIU_HDRSIZE + NETXEN_NIU_TLRSIZE;
1005 if (adapter->physical_port == 0)
1006 netxen_nic_write_w0(adapter, NETXEN_NIU_XGE_MAX_FRAME_SIZE,
1009 netxen_nic_write_w0(adapter, NETXEN_NIU_XG1_MAX_FRAME_SIZE,
1014 void netxen_nic_init_niu_gb(struct netxen_adapter *adapter)
1016 netxen_niu_gbe_init_port(adapter, adapter->physical_port);
1020 netxen_crb_writelit_adapter(struct netxen_adapter *adapter, unsigned long off,
1025 if (ADDR_IN_WINDOW1(off)) {
1026 writel(data, NETXEN_CRB_NORMALIZE(adapter, off));
1028 netxen_nic_pci_change_crbwindow(adapter, 0);
1029 addr = pci_base_offset(adapter, off);
1031 netxen_nic_pci_change_crbwindow(adapter, 1);
1035 void netxen_nic_set_link_parameters(struct netxen_adapter *adapter)
1041 netxen_nic_read_w0(adapter, NETXEN_NIU_MODE, &mode);
1042 if (netxen_get_niu_enable_ge(mode)) { /* Gb 10/100/1000 Mbps mode */
1043 if (adapter->phy_read
1046 NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_STATUS,
1048 if (netxen_get_phy_link(status)) {
1049 switch (netxen_get_phy_speed(status)) {
1051 adapter->link_speed = SPEED_10;
1054 adapter->link_speed = SPEED_100;
1057 adapter->link_speed = SPEED_1000;
1060 adapter->link_speed = -1;
1063 switch (netxen_get_phy_duplex(status)) {
1065 adapter->link_duplex = DUPLEX_HALF;
1068 adapter->link_duplex = DUPLEX_FULL;
1071 adapter->link_duplex = -1;
1074 if (adapter->phy_read
1077 NETXEN_NIU_GB_MII_MGMT_ADDR_AUTONEG,
1079 adapter->link_autoneg = autoneg;
1084 adapter->link_speed = -1;
1085 adapter->link_duplex = -1;
1090 void netxen_nic_flash_print(struct netxen_adapter *adapter)
1095 char brd_name[NETXEN_MAX_SHORT_NAME];
1096 char serial_num[32];
1100 struct netxen_board_info *board_info = &(adapter->ahw.boardcfg);
1102 adapter->driver_mismatch = 0;
1104 ptr32 = (u32 *)&serial_num;
1105 addr = NETXEN_USER_START +
1106 offsetof(struct netxen_new_user_info, serial_num);
1107 for (i = 0; i < 8; i++) {
1108 if (netxen_rom_fast_read(adapter, addr, ptr32) == -1) {
1109 printk("%s: ERROR reading %s board userarea.\n",
1110 netxen_nic_driver_name,
1111 netxen_nic_driver_name);
1112 adapter->driver_mismatch = 1;
1116 addr += sizeof(u32);
1119 fw_major = readl(NETXEN_CRB_NORMALIZE(adapter,
1120 NETXEN_FW_VERSION_MAJOR));
1121 fw_minor = readl(NETXEN_CRB_NORMALIZE(adapter,
1122 NETXEN_FW_VERSION_MINOR));
1124 readl(NETXEN_CRB_NORMALIZE(adapter, NETXEN_FW_VERSION_SUB));
1126 if (adapter->portnum == 0) {
1127 get_brd_name_by_type(board_info->board_type, brd_name);
1129 printk("NetXen %s Board S/N %s Chip id 0x%x\n",
1130 brd_name, serial_num, board_info->chip_id);
1131 printk("NetXen Firmware version %d.%d.%d\n", fw_major,
1132 fw_minor, fw_build);
1135 if (fw_major != _NETXEN_NIC_LINUX_MAJOR) {
1136 adapter->driver_mismatch = 1;
1138 if (fw_minor != _NETXEN_NIC_LINUX_MINOR &&
1139 fw_minor != (_NETXEN_NIC_LINUX_MINOR + 1)) {
1140 adapter->driver_mismatch = 1;
1142 if (adapter->driver_mismatch) {
1143 printk(KERN_ERR "%s: driver and firmware version mismatch\n",
1144 adapter->netdev->name);
1148 switch (adapter->ahw.board_type) {
1149 case NETXEN_NIC_GBE:
1150 dev_info(&adapter->pdev->dev, "%s: GbE port initialized\n",
1151 adapter->netdev->name);
1153 case NETXEN_NIC_XGBE:
1154 dev_info(&adapter->pdev->dev, "%s: XGbE port initialized\n",
1155 adapter->netdev->name);