2 * Copyright (C) 2003 - 2006 NetXen, Inc.
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
20 * The full GNU General Public License is included in this distribution
21 * in the file called LICENSE.
23 * Contact Information:
26 * 3965 Freedom Circle, Fourth floor,
27 * Santa Clara, CA 95054
30 #ifndef _NETXEN_NIC_H_
31 #define _NETXEN_NIC_H_
33 #include <linux/config.h>
34 #include <linux/module.h>
35 #include <linux/kernel.h>
36 #include <linux/types.h>
37 #include <linux/compiler.h>
38 #include <linux/slab.h>
39 #include <linux/delay.h>
40 #include <linux/init.h>
41 #include <linux/ioport.h>
42 #include <linux/pci.h>
43 #include <linux/netdevice.h>
44 #include <linux/etherdevice.h>
47 #include <linux/tcp.h>
48 #include <linux/skbuff.h>
49 #include <linux/version.h>
51 #include <linux/ethtool.h>
52 #include <linux/mii.h>
53 #include <linux/interrupt.h>
54 #include <linux/timer.h>
57 #include <linux/mman.h>
59 #include <asm/system.h>
61 #include <asm/byteorder.h>
62 #include <asm/uaccess.h>
63 #include <asm/pgtable.h>
65 #include "netxen_nic_hw.h"
67 #define NETXEN_NIC_BUILD_NO "232"
68 #define _NETXEN_NIC_LINUX_MAJOR 2
69 #define _NETXEN_NIC_LINUX_MINOR 3
70 #define _NETXEN_NIC_LINUX_SUBVERSION 57
71 #define NETXEN_NIC_LINUX_VERSIONID "2.3.57"
72 #define NETXEN_NIC_FW_VERSIONID "2.3.57"
74 #define RCV_DESC_RINGSIZE \
75 (sizeof(struct rcv_desc) * adapter->max_rx_desc_count)
76 #define STATUS_DESC_RINGSIZE \
77 (sizeof(struct status_desc)* adapter->max_rx_desc_count)
79 (sizeof(struct netxen_cmd_buffer) * adapter->max_tx_desc_count)
80 #define RCV_BUFFSIZE \
81 (sizeof(struct netxen_rx_buffer) * rcv_desc->max_rx_desc_count)
82 #define find_diff_among(a,b,range) ((a)<(b)?((b)-(a)):((b)+(range)-(a)))
84 #define NETXEN_NETDEV_STATUS 0x1
86 #define ADDR_IN_WINDOW1(off) \
87 ((off > NETXEN_CRB_PCIX_HOST2) && (off < NETXEN_CRB_MAX)) ? 1 : 0
90 * normalize a 64MB crb address to 32MB PCI window
91 * To use NETXEN_CRB_NORMALIZE, window _must_ be set to 1
93 #define NETXEN_CRB_NORMALIZE(adapter, reg) \
94 ((adapter)->ahw.pci_base + (reg) \
95 - NETXEN_CRB_PCIX_HOST2 + NETXEN_CRB_PCIX_HOST)
97 #define MAX_RX_BUFFER_LENGTH 2000
98 #define MAX_RX_JUMBO_BUFFER_LENGTH 9046
99 #define RX_DMA_MAP_LEN (MAX_RX_BUFFER_LENGTH - NET_IP_ALIGN)
100 #define RX_JUMBO_DMA_MAP_LEN \
101 (MAX_RX_JUMBO_BUFFER_LENGTH - NET_IP_ALIGN)
102 #define NETXEN_ROM_ROUNDUP 0x80000000ULL
105 * Maximum number of ring contexts
107 #define MAX_RING_CTX 1
109 /* Opcodes to be used with the commands */
112 /* The following opcodes are for IP checksum */
121 /* The following opcodes are for internal consumption. */
122 #define NETXEN_CONTROL_OP 0x10
123 #define PEGNET_REQUEST 0x11
125 #define MAX_NUM_CARDS 4
127 #define MAX_BUFFERS_PER_CMD 32
130 * Following are the states of the Phantom. Phantom will set them and
131 * Host will read to check if the fields are correct.
133 #define PHAN_INITIALIZE_START 0xff00
134 #define PHAN_INITIALIZE_FAILED 0xffff
135 #define PHAN_INITIALIZE_COMPLETE 0xff01
137 /* Host writes the following to notify that it has done the init-handshake */
138 #define PHAN_INITIALIZE_ACK 0xf00f
140 #define NUM_RCV_DESC_RINGS 2 /* No of Rcv Descriptor contexts */
142 /* descriptor types */
143 #define RCV_DESC_NORMAL 0x01
144 #define RCV_DESC_JUMBO 0x02
145 #define RCV_DESC_NORMAL_CTXID 0
146 #define RCV_DESC_JUMBO_CTXID 1
148 #define RCV_DESC_TYPE(ID) \
149 ((ID == RCV_DESC_JUMBO_CTXID) ? RCV_DESC_JUMBO : RCV_DESC_NORMAL)
151 #define MAX_CMD_DESCRIPTORS 1024
152 #define MAX_RCV_DESCRIPTORS 32768
153 #define MAX_JUMBO_RCV_DESCRIPTORS 1024
154 #define MAX_RCVSTATUS_DESCRIPTORS MAX_RCV_DESCRIPTORS
155 #define MAX_JUMBO_RCV_DESC MAX_JUMBO_RCV_DESCRIPTORS
156 #define MAX_RCV_DESC MAX_RCV_DESCRIPTORS
157 #define MAX_RCVSTATUS_DESC MAX_RCV_DESCRIPTORS
158 #define NUM_RCV_DESC (MAX_RCV_DESC + MAX_JUMBO_RCV_DESCRIPTORS)
159 #define MAX_EPG_DESCRIPTORS (MAX_CMD_DESCRIPTORS * 8)
161 #define MIN_TX_COUNT 4096
162 #define MIN_RX_COUNT 4096
164 #define MAX_FRAME_SIZE 0x10000 /* 64K MAX size for LSO */
166 #define PHAN_PEG_RCV_INITIALIZED 0xff01
167 #define PHAN_PEG_RCV_START_INITIALIZE 0xff00
169 #define get_next_index(index, length) \
170 (((index) + 1) & ((length) - 1))
172 #define get_index_range(index,length,count) \
173 (((index) + (count)) & ((length) - 1))
176 * Following data structures describe the descriptors that will be used.
177 * Added fileds of tcpHdrSize and ipHdrSize, The driver needs to do it only when
178 * we are doing LSO (above the 1500 size packet) only.
182 * The size of reference handle been changed to 16 bits to pass the MSS fields
186 #define FLAGS_CHECKSUM_ENABLED 0x01
187 #define FLAGS_LSO_ENABLED 0x02
188 #define FLAGS_IPSEC_SA_ADD 0x04
189 #define FLAGS_IPSEC_SA_DELETE 0x08
190 #define FLAGS_VLAN_TAGGED 0x10
192 #define CMD_DESC_TOTAL_LENGTH(cmd_desc) \
193 ((cmd_desc)->length_tcp_hdr & 0x00FFFFFF)
194 #define CMD_DESC_TCP_HDR_OFFSET(cmd_desc) \
195 (((cmd_desc)->length_tcp_hdr >> 24) & 0x0FF)
196 #define CMD_DESC_PORT(cmd_desc) ((cmd_desc)->port_ctxid & 0x0F)
197 #define CMD_DESC_CTX_ID(cmd_desc) (((cmd_desc)->port_ctxid >> 4) & 0x0F)
199 #define CMD_DESC_TOTAL_LENGTH_WRT(cmd_desc, var) \
200 ((cmd_desc)->length_tcp_hdr |= ((var) & 0x00FFFFFF))
201 #define CMD_DESC_TCP_HDR_OFFSET_WRT(cmd_desc, var) \
202 ((cmd_desc)->length_tcp_hdr |= (((var) << 24) & 0xFF000000))
203 #define CMD_DESC_PORT_WRT(cmd_desc, var) \
204 ((cmd_desc)->port_ctxid |= ((var) & 0x0F))
206 struct cmd_desc_type0 {
207 u64 netxen_next; /* for fragments handled by Phantom */
216 /* Bit pattern: 0-23 total length, 24-32 tcp header offset */
218 u8 ip_hdr_offset; /* For LSO only */
219 u8 num_of_buffers; /* total number of segments */
220 u8 flags; /* as defined above */
223 u16 reference_handle; /* changed to u16 to add mss */
224 u16 mss; /* passed by NDIS_PACKET for LSO */
225 /* Bit pattern 0-3 port, 0-3 ctx id */
227 u8 total_hdr_length; /* LSO only : MAC+IP+TCP Hdr size */
228 u16 conn_id; /* IPSec offoad only */
259 } __attribute__ ((aligned(64)));
261 /* Note: sizeof(rcv_desc) should always be a mutliple of 2 */
263 u16 reference_handle;
265 u32 buffer_length; /* allocated buffer length (usually 2K) */
269 /* opcode field in status_desc */
270 #define RCV_NIC_PKT (0xA)
271 #define STATUS_NIC_PKT ((RCV_NIC_PKT) << 12)
273 /* for status field in status_desc */
274 #define STATUS_NEED_CKSUM (1)
275 #define STATUS_CKSUM_OK (2)
277 /* owner bits of status_desc */
278 #define STATUS_OWNER_HOST (0x1)
279 #define STATUS_OWNER_PHANTOM (0x2)
281 #define NETXEN_PROT_IP (1)
282 #define NETXEN_PROT_UNKNOWN (0)
284 /* Note: sizeof(status_desc) should always be a mutliple of 2 */
285 #define STATUS_DESC_PORT(status_desc) \
286 ((status_desc)->port_status_type_op & 0x0F)
287 #define STATUS_DESC_STATUS(status_desc) \
288 (((status_desc)->port_status_type_op >> 4) & 0x0F)
289 #define STATUS_DESC_TYPE(status_desc) \
290 (((status_desc)->port_status_type_op >> 8) & 0x0F)
291 #define STATUS_DESC_OPCODE(status_desc) \
292 (((status_desc)->port_status_type_op >> 12) & 0x0F)
295 /* Bit pattern: 0-3 port, 4-7 status, 8-11 type, 12-15 opcode */
296 u16 port_status_type_op;
297 u16 total_length; /* NIC mode */
298 u16 reference_handle; /* handle for the associated packet */
299 /* Bit pattern: 0-1 owner, 2-5 protocol */
300 u16 owner; /* Owner of the descriptor */
301 } __attribute__ ((aligned(8)));
304 NETXEN_RCV_PEG_0 = 0,
307 /* The version of the main data structure */
308 #define NETXEN_BDINFO_VERSION 1
310 /* Magic number to let user know flash is programmed */
311 #define NETXEN_BDINFO_MAGIC 0x12345678
313 /* Max number of Gig ports on a Phantom board */
314 #define NETXEN_MAX_PORTS 4
317 NETXEN_BRDTYPE_P1_BD = 0x0000,
318 NETXEN_BRDTYPE_P1_SB = 0x0001,
319 NETXEN_BRDTYPE_P1_SMAX = 0x0002,
320 NETXEN_BRDTYPE_P1_SOCK = 0x0003,
322 NETXEN_BRDTYPE_P2_SOCK_31 = 0x0008,
323 NETXEN_BRDTYPE_P2_SOCK_35 = 0x0009,
324 NETXEN_BRDTYPE_P2_SB35_4G = 0x000a,
325 NETXEN_BRDTYPE_P2_SB31_10G = 0x000b,
326 NETXEN_BRDTYPE_P2_SB31_2G = 0x000c,
328 NETXEN_BRDTYPE_P2_SB31_10G_IMEZ = 0x000d,
329 NETXEN_BRDTYPE_P2_SB31_10G_HMEZ = 0x000e,
330 NETXEN_BRDTYPE_P2_SB31_10G_CX4 = 0x000f
334 NETXEN_BRDMFG_INVENTEC = 1
338 MEM_ORG_128Mbx4 = 0x0, /* DDR1 only */
339 MEM_ORG_128Mbx8 = 0x1, /* DDR1 only */
340 MEM_ORG_128Mbx16 = 0x2, /* DDR1 only */
341 MEM_ORG_256Mbx4 = 0x3,
342 MEM_ORG_256Mbx8 = 0x4,
343 MEM_ORG_256Mbx16 = 0x5,
344 MEM_ORG_512Mbx4 = 0x6,
345 MEM_ORG_512Mbx8 = 0x7,
346 MEM_ORG_512Mbx16 = 0x8,
349 MEM_ORG_1Gbx16 = 0xb,
352 MEM_ORG_2Gbx16 = 0xe,
353 MEM_ORG_128Mbx32 = 0x10002, /* GDDR only */
354 MEM_ORG_256Mbx32 = 0x10005 /* GDDR only */
355 } netxen_mn_mem_org_t;
358 MEM_ORG_512Kx36 = 0x0,
361 } netxen_sn_mem_org_t;
366 MEM_DEPTH_16MB = 0x3,
367 MEM_DEPTH_32MB = 0x4,
368 MEM_DEPTH_64MB = 0x5,
369 MEM_DEPTH_128MB = 0x6,
370 MEM_DEPTH_256MB = 0x7,
371 MEM_DEPTH_512MB = 0x8,
376 MEM_DEPTH_16GB = 0xd,
378 } netxen_mem_depth_t;
380 struct netxen_board_info {
392 u32 port_mask; /* available niu ports */
393 u32 peg_mask; /* available pegs */
394 u32 icache_ok; /* can we run with icache? */
395 u32 dcache_ok; /* can we run with dcache? */
403 /* MN-related config */
404 u32 mn_sync_mode; /* enable/ sync shift cclk/ sync shift mclk */
405 u32 mn_sync_shift_cclk;
406 u32 mn_sync_shift_mclk;
408 u32 mn_crystal_freq; /* in MHz */
409 u32 mn_speed; /* in MHz */
412 u32 mn_ranks_0; /* ranks per slot */
413 u32 mn_ranks_1; /* ranks per slot */
424 u32 mn_mode_reg; /* MIU DDR Mode Register */
425 u32 mn_ext_mode_reg; /* MIU DDR Extended Mode Register */
426 u32 mn_timing_0; /* MIU Memory Control Timing Rgister */
427 u32 mn_timing_1; /* MIU Extended Memory Ctrl Timing Register */
428 u32 mn_timing_2; /* MIU Extended Memory Ctrl Timing2 Register */
430 /* SN-related config */
431 u32 sn_sync_mode; /* enable/ sync shift cclk / sync shift mclk */
432 u32 sn_pt_mode; /* pass through mode */
447 u32 magic; /* indicates flash has been initialized */
454 #define FLASH_NUM_PORTS (4)
456 struct netxen_flash_mac_addr {
460 struct netxen_user_old_info {
472 /* primary image status */
474 u32 secondary_present;
476 /* MAC address , 4 ports */
477 struct netxen_flash_mac_addr mac_addr[FLASH_NUM_PORTS];
479 #define FLASH_NUM_MAC_PER_PORT 32
480 struct netxen_user_info {
481 u8 flash_md5[16 * 64];
488 /* primary image status */
490 u32 secondary_present;
492 /* MAC address , 4 ports, 32 address per port */
493 u64 mac_addr[FLASH_NUM_PORTS * FLASH_NUM_MAC_PER_PORT];
497 /* Any user defined data */
501 * Flash Layout - new format.
503 struct netxen_new_user_info {
504 u8 flash_md5[16 * 64];
511 /* primary image status */
513 u32 secondary_present;
515 /* MAC address , 4 ports, 32 address per port */
516 u64 mac_addr[FLASH_NUM_PORTS * FLASH_NUM_MAC_PER_PORT];
520 /* Any user defined data */
523 #define SECONDARY_IMAGE_PRESENT 0xb3b4b5b6
524 #define SECONDARY_IMAGE_ABSENT 0xffffffff
525 #define PRIMARY_IMAGE_GOOD 0x5a5a5a5a
526 #define PRIMARY_IMAGE_BAD 0xffffffff
528 /* Flash memory map */
530 CRBINIT_START = 0, /* Crbinit section */
531 BRDCFG_START = 0x4000, /* board config */
532 INITCODE_START = 0x6000, /* pegtune code */
533 BOOTLD_START = 0x10000, /* bootld */
534 IMAGE_START = 0x43000, /* compressed image */
535 SECONDARY_START = 0x200000, /* backup images */
536 PXE_START = 0x3E0000, /* user defined region */
537 USER_START = 0x3E8000, /* User defined region for new boards */
538 FIXED_START = 0x3F0000 /* backup of crbinit */
539 } netxen_flash_map_t;
541 #define USER_START_OLD PXE_START /* for backward compatibility */
543 #define FLASH_START (CRBINIT_START)
544 #define INIT_SECTOR (0)
545 #define PRIMARY_START (BOOTLD_START)
546 #define FLASH_CRBINIT_SIZE (0x4000)
547 #define FLASH_BRDCFG_SIZE (sizeof(struct netxen_board_info))
548 #define FLASH_USER_SIZE (sizeof(netxen_user_info)/sizeof(u32))
549 #define FLASH_SECONDARY_SIZE (USER_START-SECONDARY_START)
550 #define NUM_PRIMARY_SECTORS (0x20)
551 #define NUM_CONFIG_SECTORS (1)
552 #define PFX "netxen: "
554 /* Note: Make sure to not call this before adapter->port is valid */
555 #if !defined(NETXEN_DEBUG)
556 #define DPRINTK(klevel, fmt, args...) do { \
559 #define DPRINTK(klevel, fmt, args...) do { \
560 printk(KERN_##klevel PFX "%s: %s: " fmt, __FUNCTION__,\
561 (adapter != NULL && adapter->port != NULL && \
562 adapter->port[0] != NULL && \
563 adapter->port[0]->netdev != NULL) ? \
564 adapter->port[0]->netdev->name : NULL, \
568 /* Number of status descriptors to handle per interrupt */
569 #define MAX_STATUS_HANDLE (128)
572 * netxen_skb_frag{} is to contain mapping info for each SG list. This
573 * has to be freed when DMA is complete. This is part of netxen_tx_buffer{}.
575 struct netxen_skb_frag {
580 /* Following defines are for the state of the buffers */
581 #define NETXEN_BUFFER_FREE 0
582 #define NETXEN_BUFFER_BUSY 1
585 * There will be one netxen_buffer per skb packet. These will be
586 * used to save the dma info for pci_unmap_page()
588 struct netxen_cmd_buffer {
590 struct netxen_skb_frag frag_array[MAX_BUFFERS_PER_CMD + 1];
596 unsigned long time_stamp;
598 u32 no_of_descriptors;
601 /* In rx_buffer, we do not need multiple fragments as is a single buffer */
602 struct netxen_rx_buffer {
610 #define NETXEN_NIC_GBE 0x01
611 #define NETXEN_NIC_XGBE 0x02
614 * One hardware_context{} per adapter
615 * contains interrupt info as well shared hardware info.
617 struct netxen_hardware_context {
618 struct pci_dev *pdev;
619 void __iomem *pci_base; /* base of mapped phantom memory */
623 struct netxen_board_info boardcfg;
625 /* Address of cmd ring in Phantom */
626 struct cmd_desc_type0 *cmd_desc_head;
627 dma_addr_t cmd_desc_phys_addr;
628 struct netxen_adapter *adapter;
631 #define MINIMUM_ETHERNET_FRAME_SIZE 64 /* With FCS */
632 #define ETHERNET_FCS_SIZE 4
634 struct netxen_adapter_stats {
649 * Rcv Descriptor Context. One such per Rcv Descriptor. There may
650 * be one Rcv Descriptor for normal packets, one for jumbo and may be others.
652 struct netxen_rcv_desc_ctx {
655 u32 rcv_pending; /* Num of bufs posted in phantom */
656 u32 rcv_free; /* Num of bufs in free list */
657 dma_addr_t phys_addr;
658 struct rcv_desc *desc_head; /* address of rx ring in Phantom */
659 u32 max_rx_desc_count;
662 struct netxen_rx_buffer *rx_buf_arr; /* rx buffers for receive */
667 * Receive context. There is one such structure per instance of the
668 * receive processing. Any state information that is relevant to
669 * the receive, and is must be in this structure. The global data may be
672 struct netxen_recv_context {
673 struct netxen_rcv_desc_ctx rcv_desc[NUM_RCV_DESC_RINGS];
674 u32 status_rx_producer;
675 u32 status_rx_consumer;
676 dma_addr_t rcv_status_desc_phys_addr;
677 struct status_desc *rcv_status_desc_head;
680 #define NETXEN_NIC_MSI_ENABLED 0x02
682 struct netxen_drvops;
684 struct netxen_adapter {
685 struct netxen_hardware_context ahw;
686 int port_count; /* Number of configured ports */
687 int active_ports; /* Number of open ports */
688 struct netxen_port *port[NETXEN_MAX_PORTS]; /* ptr to each port */
691 struct work_struct watchdog_task;
692 struct work_struct tx_timeout_task;
693 struct timer_list watchdog_timer;
700 u32 last_cmd_consumer;
701 u32 max_tx_desc_count;
702 u32 max_rx_desc_count;
703 u32 max_jumbo_rx_desc_count;
704 /* Num of instances active on cmd buffer ring */
705 u32 proc_cmd_buf_counter;
707 u32 num_threads, total_threads; /*Use to keep track of xmit threads */
713 struct netxen_adapter_stats stats;
715 struct netxen_cmd_buffer *cmd_buf_arr; /* Command buffers for xmit */
718 * Receive instances. These can be either one per port,
719 * or one per peg, etc.
721 struct netxen_recv_context recv_ctx[MAX_RCV_CTX];
725 struct netxen_drvops *ops;
726 }; /* netxen_adapter structure */
728 /* Max number of xmit producer threads that can run simultaneously */
729 #define MAX_XMIT_PRODUCERS 16
731 struct netxen_port_stats {
755 struct netxen_adapter *adapter;
757 u16 portnum; /* GBE port number */
764 struct net_device *netdev;
765 struct pci_dev *pdev;
766 struct net_device_stats net_stats;
767 struct netxen_port_stats stats;
770 struct netxen_drvops {
771 int (*enable_phy_interrupts) (struct netxen_adapter *, int);
772 int (*disable_phy_interrupts) (struct netxen_adapter *, int);
773 void (*handle_phy_intr) (struct netxen_adapter *);
774 int (*macaddr_set) (struct netxen_port *, netxen_ethernet_macaddr_t);
775 int (*set_mtu) (struct netxen_port *, int);
776 int (*set_promisc) (struct netxen_adapter *, int,
777 netxen_niu_prom_mode_t);
778 int (*unset_promisc) (struct netxen_adapter *, int,
779 netxen_niu_prom_mode_t);
780 int (*phy_read) (struct netxen_adapter *, long phy, long reg, u32 *);
781 int (*phy_write) (struct netxen_adapter *, long phy, long reg, u32 val);
782 int (*init_port) (struct netxen_adapter *, int);
783 void (*init_niu) (struct netxen_adapter *);
784 int (*stop_port) (struct netxen_adapter *, int);
787 extern char netxen_nic_driver_name[];
789 int netxen_niu_xgbe_enable_phy_interrupts(struct netxen_adapter *adapter,
791 int netxen_niu_gbe_enable_phy_interrupts(struct netxen_adapter *adapter,
793 int netxen_niu_xgbe_disable_phy_interrupts(struct netxen_adapter *adapter,
795 int netxen_niu_gbe_disable_phy_interrupts(struct netxen_adapter *adapter,
797 int netxen_niu_xgbe_clear_phy_interrupts(struct netxen_adapter *adapter,
799 int netxen_niu_gbe_clear_phy_interrupts(struct netxen_adapter *adapter,
801 void netxen_nic_xgbe_handle_phy_intr(struct netxen_adapter *adapter);
802 void netxen_nic_gbe_handle_phy_intr(struct netxen_adapter *adapter);
803 void netxen_niu_gbe_set_mii_mode(struct netxen_adapter *adapter, int port,
805 void netxen_niu_gbe_set_gmii_mode(struct netxen_adapter *adapter, int port,
807 int netxen_niu_gbe_phy_read(struct netxen_adapter *adapter, long phy, long reg,
809 int netxen_niu_gbe_phy_write(struct netxen_adapter *adapter, long phy,
810 long reg, __le32 val);
812 /* Functions available from netxen_nic_hw.c */
813 int netxen_niu_xginit(struct netxen_adapter *);
814 int netxen_nic_set_mtu_xgb(struct netxen_port *port, int new_mtu);
815 int netxen_nic_set_mtu_gb(struct netxen_port *port, int new_mtu);
816 void netxen_nic_init_niu_gb(struct netxen_adapter *adapter);
817 void netxen_nic_pci_change_crbwindow(struct netxen_adapter *adapter, u32 wndw);
818 void netxen_nic_reg_write(struct netxen_adapter *adapter, u64 off, u32 val);
819 int netxen_nic_reg_read(struct netxen_adapter *adapter, u64 off);
820 void netxen_nic_write_w0(struct netxen_adapter *adapter, u32 index, u32 value);
821 void netxen_nic_read_w0(struct netxen_adapter *adapter, u32 index, u32 * value);
823 int netxen_nic_get_board_info(struct netxen_adapter *adapter);
824 int netxen_nic_hw_read_wx(struct netxen_adapter *adapter, u64 off, void *data,
826 int netxen_nic_hw_write_wx(struct netxen_adapter *adapter, u64 off, void *data,
828 void netxen_crb_writelit_adapter(struct netxen_adapter *adapter,
829 unsigned long off, int data);
831 /* Functions from netxen_nic_init.c */
832 void netxen_phantom_init(struct netxen_adapter *adapter);
833 void netxen_load_firmware(struct netxen_adapter *adapter);
834 int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose);
835 int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp);
837 /* Functions from netxen_nic_isr.c */
838 void netxen_nic_isr_other(struct netxen_adapter *adapter);
839 void netxen_indicate_link_status(struct netxen_adapter *adapter, u32 port,
841 void netxen_handle_port_int(struct netxen_adapter *adapter, u32 port,
843 void netxen_nic_stop_all_ports(struct netxen_adapter *adapter);
844 void netxen_initialize_adapter_sw(struct netxen_adapter *adapter);
845 void netxen_initialize_adapter_hw(struct netxen_adapter *adapter);
846 void netxen_initialize_adapter_ops(struct netxen_adapter *adapter);
847 int netxen_init_firmware(struct netxen_adapter *adapter);
848 void netxen_free_hw_resources(struct netxen_adapter *adapter);
849 void netxen_tso_check(struct netxen_adapter *adapter,
850 struct cmd_desc_type0 *desc, struct sk_buff *skb);
851 int netxen_nic_hw_resources(struct netxen_adapter *adapter);
852 void netxen_nic_clear_stats(struct netxen_adapter *adapter);
854 netxen_nic_do_ioctl(struct netxen_adapter *adapter, void *u_data,
855 struct netxen_port *port);
856 int netxen_nic_rx_has_work(struct netxen_adapter *adapter);
857 int netxen_nic_tx_has_work(struct netxen_adapter *adapter);
858 void netxen_watchdog_task(unsigned long v);
859 void netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ctx,
861 void netxen_process_cmd_ring(unsigned long data);
862 u32 netxen_process_rcv_ring(struct netxen_adapter *adapter, int ctx, int max);
863 void netxen_nic_set_multi(struct net_device *netdev);
864 int netxen_nic_change_mtu(struct net_device *netdev, int new_mtu);
865 int netxen_nic_set_mac(struct net_device *netdev, void *p);
866 struct net_device_stats *netxen_nic_get_stats(struct net_device *netdev);
868 static inline void netxen_nic_disable_int(struct netxen_adapter *adapter)
871 * ISR_INT_MASK: Can be read from window 0 or 1.
873 writel(0x7ff, (void __iomem *)(adapter->ahw.pci_base + ISR_INT_MASK));
876 static inline void netxen_nic_enable_int(struct netxen_adapter *adapter)
880 switch (adapter->ahw.board_type) {
884 case NETXEN_NIC_XGBE:
892 writel(mask, (void __iomem *)(adapter->ahw.pci_base + ISR_INT_MASK));
894 if (!(adapter->flags & NETXEN_NIC_MSI_ENABLED)) {
896 writel(mask, (void __iomem *)
897 (adapter->ahw.pci_base + ISR_INT_TARGET_MASK));
901 int netxen_is_flash_supported(struct netxen_adapter *adapter);
902 int netxen_get_flash_mac_addr(struct netxen_adapter *adapter, u64 mac[]);
904 extern void netxen_change_ringparam(struct netxen_adapter *adapter);
905 extern int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr,
908 extern struct ethtool_ops netxen_nic_ethtool_ops;
910 #endif /* __NETXEN_NIC_H_ */