1 /*************************************************************************
2 * myri10ge.c: Myricom Myri-10G Ethernet driver.
4 * Copyright (C) 2005 - 2007 Myricom, Inc.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. Neither the name of Myricom, Inc. nor the names of its contributors
16 * may be used to endorse or promote products derived from this software
17 * without specific prior written permission.
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
32 * If the eeprom on your board is not recent enough, you will need to get a
33 * newer firmware image at:
34 * http://www.myri.com/scs/download-Myri10GE.html
36 * Contact Information:
38 * Myricom, Inc., 325N Santa Anita Avenue, Arcadia, CA 91006
39 *************************************************************************/
41 #include <linux/tcp.h>
42 #include <linux/netdevice.h>
43 #include <linux/skbuff.h>
44 #include <linux/string.h>
45 #include <linux/module.h>
46 #include <linux/pci.h>
47 #include <linux/dma-mapping.h>
48 #include <linux/etherdevice.h>
49 #include <linux/if_ether.h>
50 #include <linux/if_vlan.h>
51 #include <linux/inet_lro.h>
53 #include <linux/inet.h>
55 #include <linux/ethtool.h>
56 #include <linux/firmware.h>
57 #include <linux/delay.h>
58 #include <linux/version.h>
59 #include <linux/timer.h>
60 #include <linux/vmalloc.h>
61 #include <linux/crc32.h>
62 #include <linux/moduleparam.h>
64 #include <linux/log2.h>
65 #include <net/checksum.h>
68 #include <asm/byteorder.h>
70 #include <asm/processor.h>
75 #include "myri10ge_mcp.h"
76 #include "myri10ge_mcp_gen_header.h"
78 #define MYRI10GE_VERSION_STR "1.3.2-1.287"
80 MODULE_DESCRIPTION("Myricom 10G driver (10GbE)");
81 MODULE_AUTHOR("Maintainer: help@myri.com");
82 MODULE_VERSION(MYRI10GE_VERSION_STR);
83 MODULE_LICENSE("Dual BSD/GPL");
85 #define MYRI10GE_MAX_ETHER_MTU 9014
87 #define MYRI10GE_ETH_STOPPED 0
88 #define MYRI10GE_ETH_STOPPING 1
89 #define MYRI10GE_ETH_STARTING 2
90 #define MYRI10GE_ETH_RUNNING 3
91 #define MYRI10GE_ETH_OPEN_FAILED 4
93 #define MYRI10GE_EEPROM_STRINGS_SIZE 256
94 #define MYRI10GE_MAX_SEND_DESC_TSO ((65536 / 2048) * 2)
95 #define MYRI10GE_MAX_LRO_DESCRIPTORS 8
96 #define MYRI10GE_LRO_MAX_PKTS 64
98 #define MYRI10GE_NO_CONFIRM_DATA htonl(0xffffffff)
99 #define MYRI10GE_NO_RESPONSE_RESULT 0xffffffff
101 #define MYRI10GE_ALLOC_ORDER 0
102 #define MYRI10GE_ALLOC_SIZE ((1 << MYRI10GE_ALLOC_ORDER) * PAGE_SIZE)
103 #define MYRI10GE_MAX_FRAGS_PER_FRAME (MYRI10GE_MAX_ETHER_MTU/MYRI10GE_ALLOC_SIZE + 1)
105 struct myri10ge_rx_buffer_state {
108 DECLARE_PCI_UNMAP_ADDR(bus)
109 DECLARE_PCI_UNMAP_LEN(len)
112 struct myri10ge_tx_buffer_state {
115 DECLARE_PCI_UNMAP_ADDR(bus)
116 DECLARE_PCI_UNMAP_LEN(len)
119 struct myri10ge_cmd {
125 struct myri10ge_rx_buf {
126 struct mcp_kreq_ether_recv __iomem *lanai; /* lanai ptr for recv ring */
127 u8 __iomem *wc_fifo; /* w/c rx dma addr fifo address */
128 struct mcp_kreq_ether_recv *shadow; /* host shadow of recv ring */
129 struct myri10ge_rx_buffer_state *info;
136 int mask; /* number of rx slots -1 */
140 struct myri10ge_tx_buf {
141 struct mcp_kreq_ether_send __iomem *lanai; /* lanai ptr for sendq */
142 u8 __iomem *wc_fifo; /* w/c send fifo address */
143 struct mcp_kreq_ether_send *req_list; /* host shadow of sendq */
145 struct myri10ge_tx_buffer_state *info;
146 int mask; /* number of transmit slots -1 */
147 int boundary; /* boundary transmits cannot cross */
148 int req ____cacheline_aligned; /* transmit slots submitted */
149 int pkt_start; /* packets started */
150 int done ____cacheline_aligned; /* transmit slots completed */
151 int pkt_done; /* packets completed */
154 struct myri10ge_rx_done {
155 struct mcp_slot *entry;
159 struct net_lro_mgr lro_mgr;
160 struct net_lro_desc lro_desc[MYRI10GE_MAX_LRO_DESCRIPTORS];
163 struct myri10ge_priv {
164 int running; /* running? */
165 int csum_flag; /* rx_csums? */
166 struct myri10ge_tx_buf tx; /* transmit ring */
167 struct myri10ge_rx_buf rx_small;
168 struct myri10ge_rx_buf rx_big;
169 struct myri10ge_rx_done rx_done;
172 struct net_device *dev;
173 struct napi_struct napi;
174 struct net_device_stats stats;
177 unsigned long board_span;
178 unsigned long iomem_base;
179 __be32 __iomem *irq_claim;
180 __be32 __iomem *irq_deassert;
181 char *mac_addr_string;
182 struct mcp_cmd_response *cmd;
184 struct mcp_irq_data *fw_stats;
185 dma_addr_t fw_stats_bus;
186 struct pci_dev *pdev;
189 unsigned int rdma_tags_available;
191 __be32 __iomem *intr_coal_delay_ptr;
197 wait_queue_head_t down_wq;
198 struct work_struct watchdog_work;
199 struct timer_list watchdog_timer;
200 int watchdog_tx_done;
207 char eeprom_strings[MYRI10GE_EEPROM_STRINGS_SIZE];
208 char fw_version[128];
212 int adopted_rx_filter_bug;
213 u8 mac_addr[6]; /* eeprom mac address */
214 unsigned long serial_number;
215 int vendor_specific_offset;
216 int fw_multicast_support;
217 unsigned long features;
226 static char *myri10ge_fw_unaligned = "myri10ge_ethp_z8e.dat";
227 static char *myri10ge_fw_aligned = "myri10ge_eth_z8e.dat";
229 static char *myri10ge_fw_name = NULL;
230 module_param(myri10ge_fw_name, charp, S_IRUGO | S_IWUSR);
231 MODULE_PARM_DESC(myri10ge_fw_name, "Firmware image name");
233 static int myri10ge_ecrc_enable = 1;
234 module_param(myri10ge_ecrc_enable, int, S_IRUGO);
235 MODULE_PARM_DESC(myri10ge_ecrc_enable, "Enable Extended CRC on PCI-E");
237 static int myri10ge_max_intr_slots = 1024;
238 module_param(myri10ge_max_intr_slots, int, S_IRUGO);
239 MODULE_PARM_DESC(myri10ge_max_intr_slots, "Interrupt queue slots");
241 static int myri10ge_small_bytes = -1; /* -1 == auto */
242 module_param(myri10ge_small_bytes, int, S_IRUGO | S_IWUSR);
243 MODULE_PARM_DESC(myri10ge_small_bytes, "Threshold of small packets");
245 static int myri10ge_msi = 1; /* enable msi by default */
246 module_param(myri10ge_msi, int, S_IRUGO | S_IWUSR);
247 MODULE_PARM_DESC(myri10ge_msi, "Enable Message Signalled Interrupts");
249 static int myri10ge_intr_coal_delay = 75;
250 module_param(myri10ge_intr_coal_delay, int, S_IRUGO);
251 MODULE_PARM_DESC(myri10ge_intr_coal_delay, "Interrupt coalescing delay");
253 static int myri10ge_flow_control = 1;
254 module_param(myri10ge_flow_control, int, S_IRUGO);
255 MODULE_PARM_DESC(myri10ge_flow_control, "Pause parameter");
257 static int myri10ge_deassert_wait = 1;
258 module_param(myri10ge_deassert_wait, int, S_IRUGO | S_IWUSR);
259 MODULE_PARM_DESC(myri10ge_deassert_wait,
260 "Wait when deasserting legacy interrupts");
262 static int myri10ge_force_firmware = 0;
263 module_param(myri10ge_force_firmware, int, S_IRUGO);
264 MODULE_PARM_DESC(myri10ge_force_firmware,
265 "Force firmware to assume aligned completions");
267 static int myri10ge_initial_mtu = MYRI10GE_MAX_ETHER_MTU - ETH_HLEN;
268 module_param(myri10ge_initial_mtu, int, S_IRUGO);
269 MODULE_PARM_DESC(myri10ge_initial_mtu, "Initial MTU");
271 static int myri10ge_napi_weight = 64;
272 module_param(myri10ge_napi_weight, int, S_IRUGO);
273 MODULE_PARM_DESC(myri10ge_napi_weight, "Set NAPI weight");
275 static int myri10ge_watchdog_timeout = 1;
276 module_param(myri10ge_watchdog_timeout, int, S_IRUGO);
277 MODULE_PARM_DESC(myri10ge_watchdog_timeout, "Set watchdog timeout");
279 static int myri10ge_max_irq_loops = 1048576;
280 module_param(myri10ge_max_irq_loops, int, S_IRUGO);
281 MODULE_PARM_DESC(myri10ge_max_irq_loops,
282 "Set stuck legacy IRQ detection threshold");
284 #define MYRI10GE_MSG_DEFAULT NETIF_MSG_LINK
286 static int myri10ge_debug = -1; /* defaults above */
287 module_param(myri10ge_debug, int, 0);
288 MODULE_PARM_DESC(myri10ge_debug, "Debug level (0=none,...,16=all)");
290 static int myri10ge_lro = 1;
291 module_param(myri10ge_lro, int, S_IRUGO);
292 MODULE_PARM_DESC(myri10ge_lro, "Enable large receive offload");
294 static int myri10ge_lro_max_pkts = MYRI10GE_LRO_MAX_PKTS;
295 module_param(myri10ge_lro_max_pkts, int, S_IRUGO);
296 MODULE_PARM_DESC(myri10ge_lro_max_pkts,
297 "Number of LRO packets to be aggregated");
299 static int myri10ge_fill_thresh = 256;
300 module_param(myri10ge_fill_thresh, int, S_IRUGO | S_IWUSR);
301 MODULE_PARM_DESC(myri10ge_fill_thresh, "Number of empty rx slots allowed");
303 static int myri10ge_reset_recover = 1;
305 static int myri10ge_wcfifo = 0;
306 module_param(myri10ge_wcfifo, int, S_IRUGO);
307 MODULE_PARM_DESC(myri10ge_wcfifo, "Enable WC Fifo when WC is enabled");
309 #define MYRI10GE_FW_OFFSET 1024*1024
310 #define MYRI10GE_HIGHPART_TO_U32(X) \
311 (sizeof (X) == 8) ? ((u32)((u64)(X) >> 32)) : (0)
312 #define MYRI10GE_LOWPART_TO_U32(X) ((u32)(X))
314 #define myri10ge_pio_copy(to,from,size) __iowrite64_copy(to,from,size/8)
316 static void myri10ge_set_multicast_list(struct net_device *dev);
317 static int myri10ge_sw_tso(struct sk_buff *skb, struct net_device *dev);
319 static inline void put_be32(__be32 val, __be32 __iomem * p)
321 __raw_writel((__force __u32) val, (__force void __iomem *)p);
325 myri10ge_send_cmd(struct myri10ge_priv *mgp, u32 cmd,
326 struct myri10ge_cmd *data, int atomic)
329 char buf_bytes[sizeof(*buf) + 8];
330 struct mcp_cmd_response *response = mgp->cmd;
331 char __iomem *cmd_addr = mgp->sram + MXGEFW_ETH_CMD;
332 u32 dma_low, dma_high, result, value;
335 /* ensure buf is aligned to 8 bytes */
336 buf = (struct mcp_cmd *)ALIGN((unsigned long)buf_bytes, 8);
338 buf->data0 = htonl(data->data0);
339 buf->data1 = htonl(data->data1);
340 buf->data2 = htonl(data->data2);
341 buf->cmd = htonl(cmd);
342 dma_low = MYRI10GE_LOWPART_TO_U32(mgp->cmd_bus);
343 dma_high = MYRI10GE_HIGHPART_TO_U32(mgp->cmd_bus);
345 buf->response_addr.low = htonl(dma_low);
346 buf->response_addr.high = htonl(dma_high);
347 response->result = htonl(MYRI10GE_NO_RESPONSE_RESULT);
349 myri10ge_pio_copy(cmd_addr, buf, sizeof(*buf));
351 /* wait up to 15ms. Longest command is the DMA benchmark,
352 * which is capped at 5ms, but runs from a timeout handler
353 * that runs every 7.8ms. So a 15ms timeout leaves us with
357 /* if atomic is set, do not sleep,
358 * and try to get the completion quickly
359 * (1ms will be enough for those commands) */
360 for (sleep_total = 0;
362 && response->result == htonl(MYRI10GE_NO_RESPONSE_RESULT);
366 /* use msleep for most command */
367 for (sleep_total = 0;
369 && response->result == htonl(MYRI10GE_NO_RESPONSE_RESULT);
374 result = ntohl(response->result);
375 value = ntohl(response->data);
376 if (result != MYRI10GE_NO_RESPONSE_RESULT) {
380 } else if (result == MXGEFW_CMD_UNKNOWN) {
382 } else if (result == MXGEFW_CMD_ERROR_UNALIGNED) {
385 dev_err(&mgp->pdev->dev,
386 "command %d failed, result = %d\n",
392 dev_err(&mgp->pdev->dev, "command %d timed out, result = %d\n",
398 * The eeprom strings on the lanaiX have the format
401 * PT:ddd mmm xx xx:xx:xx xx\0
402 * PV:ddd mmm xx xx:xx:xx xx\0
404 static int myri10ge_read_mac_addr(struct myri10ge_priv *mgp)
409 ptr = mgp->eeprom_strings;
410 limit = mgp->eeprom_strings + MYRI10GE_EEPROM_STRINGS_SIZE;
412 while (*ptr != '\0' && ptr < limit) {
413 if (memcmp(ptr, "MAC=", 4) == 0) {
415 mgp->mac_addr_string = ptr;
416 for (i = 0; i < 6; i++) {
417 if ((ptr + 2) > limit)
420 simple_strtoul(ptr, &ptr, 16);
424 if (memcmp((const void *)ptr, "SN=", 3) == 0) {
426 mgp->serial_number = simple_strtoul(ptr, &ptr, 10);
428 while (ptr < limit && *ptr++) ;
434 dev_err(&mgp->pdev->dev, "failed to parse eeprom_strings\n");
439 * Enable or disable periodic RDMAs from the host to make certain
440 * chipsets resend dropped PCIe messages
443 static void myri10ge_dummy_rdma(struct myri10ge_priv *mgp, int enable)
445 char __iomem *submit;
447 u32 dma_low, dma_high;
450 /* clear confirmation addr */
454 /* send a rdma command to the PCIe engine, and wait for the
455 * response in the confirmation address. The firmware should
456 * write a -1 there to indicate it is alive and well
458 dma_low = MYRI10GE_LOWPART_TO_U32(mgp->cmd_bus);
459 dma_high = MYRI10GE_HIGHPART_TO_U32(mgp->cmd_bus);
461 buf[0] = htonl(dma_high); /* confirm addr MSW */
462 buf[1] = htonl(dma_low); /* confirm addr LSW */
463 buf[2] = MYRI10GE_NO_CONFIRM_DATA; /* confirm data */
464 buf[3] = htonl(dma_high); /* dummy addr MSW */
465 buf[4] = htonl(dma_low); /* dummy addr LSW */
466 buf[5] = htonl(enable); /* enable? */
468 submit = mgp->sram + MXGEFW_BOOT_DUMMY_RDMA;
470 myri10ge_pio_copy(submit, &buf, sizeof(buf));
471 for (i = 0; mgp->cmd->data != MYRI10GE_NO_CONFIRM_DATA && i < 20; i++)
473 if (mgp->cmd->data != MYRI10GE_NO_CONFIRM_DATA)
474 dev_err(&mgp->pdev->dev, "dummy rdma %s failed\n",
475 (enable ? "enable" : "disable"));
479 myri10ge_validate_firmware(struct myri10ge_priv *mgp,
480 struct mcp_gen_header *hdr)
482 struct device *dev = &mgp->pdev->dev;
484 /* check firmware type */
485 if (ntohl(hdr->mcp_type) != MCP_TYPE_ETH) {
486 dev_err(dev, "Bad firmware type: 0x%x\n", ntohl(hdr->mcp_type));
490 /* save firmware version for ethtool */
491 strncpy(mgp->fw_version, hdr->version, sizeof(mgp->fw_version));
493 sscanf(mgp->fw_version, "%d.%d.%d", &mgp->fw_ver_major,
494 &mgp->fw_ver_minor, &mgp->fw_ver_tiny);
496 if (!(mgp->fw_ver_major == MXGEFW_VERSION_MAJOR
497 && mgp->fw_ver_minor == MXGEFW_VERSION_MINOR)) {
498 dev_err(dev, "Found firmware version %s\n", mgp->fw_version);
499 dev_err(dev, "Driver needs %d.%d\n", MXGEFW_VERSION_MAJOR,
500 MXGEFW_VERSION_MINOR);
506 static int myri10ge_load_hotplug_firmware(struct myri10ge_priv *mgp, u32 * size)
508 unsigned crc, reread_crc;
509 const struct firmware *fw;
510 struct device *dev = &mgp->pdev->dev;
511 struct mcp_gen_header *hdr;
516 if ((status = request_firmware(&fw, mgp->fw_name, dev)) < 0) {
517 dev_err(dev, "Unable to load %s firmware image via hotplug\n",
520 goto abort_with_nothing;
525 if (fw->size >= mgp->sram_size - MYRI10GE_FW_OFFSET ||
526 fw->size < MCP_HEADER_PTR_OFFSET + 4) {
527 dev_err(dev, "Firmware size invalid:%d\n", (int)fw->size);
533 hdr_offset = ntohl(*(__be32 *) (fw->data + MCP_HEADER_PTR_OFFSET));
534 if ((hdr_offset & 3) || hdr_offset + sizeof(*hdr) > fw->size) {
535 dev_err(dev, "Bad firmware file\n");
539 hdr = (void *)(fw->data + hdr_offset);
541 status = myri10ge_validate_firmware(mgp, hdr);
545 crc = crc32(~0, fw->data, fw->size);
546 for (i = 0; i < fw->size; i += 256) {
547 myri10ge_pio_copy(mgp->sram + MYRI10GE_FW_OFFSET + i,
549 min(256U, (unsigned)(fw->size - i)));
553 /* corruption checking is good for parity recovery and buggy chipset */
554 memcpy_fromio(fw->data, mgp->sram + MYRI10GE_FW_OFFSET, fw->size);
555 reread_crc = crc32(~0, fw->data, fw->size);
556 if (crc != reread_crc) {
557 dev_err(dev, "CRC failed(fw-len=%u), got 0x%x (expect 0x%x)\n",
558 (unsigned)fw->size, reread_crc, crc);
562 *size = (u32) fw->size;
565 release_firmware(fw);
571 static int myri10ge_adopt_running_firmware(struct myri10ge_priv *mgp)
573 struct mcp_gen_header *hdr;
574 struct device *dev = &mgp->pdev->dev;
575 const size_t bytes = sizeof(struct mcp_gen_header);
579 /* find running firmware header */
580 hdr_offset = swab32(readl(mgp->sram + MCP_HEADER_PTR_OFFSET));
582 if ((hdr_offset & 3) || hdr_offset + sizeof(*hdr) > mgp->sram_size) {
583 dev_err(dev, "Running firmware has bad header offset (%d)\n",
588 /* copy header of running firmware from SRAM to host memory to
589 * validate firmware */
590 hdr = kmalloc(bytes, GFP_KERNEL);
592 dev_err(dev, "could not malloc firmware hdr\n");
595 memcpy_fromio(hdr, mgp->sram + hdr_offset, bytes);
596 status = myri10ge_validate_firmware(mgp, hdr);
599 /* check to see if adopted firmware has bug where adopting
600 * it will cause broadcasts to be filtered unless the NIC
601 * is kept in ALLMULTI mode */
602 if (mgp->fw_ver_major == 1 && mgp->fw_ver_minor == 4 &&
603 mgp->fw_ver_tiny >= 4 && mgp->fw_ver_tiny <= 11) {
604 mgp->adopted_rx_filter_bug = 1;
605 dev_warn(dev, "Adopting fw %d.%d.%d: "
606 "working around rx filter bug\n",
607 mgp->fw_ver_major, mgp->fw_ver_minor,
613 static int myri10ge_load_firmware(struct myri10ge_priv *mgp)
615 char __iomem *submit;
617 u32 dma_low, dma_high, size;
619 struct myri10ge_cmd cmd;
622 status = myri10ge_load_hotplug_firmware(mgp, &size);
624 dev_warn(&mgp->pdev->dev, "hotplug firmware loading failed\n");
626 /* Do not attempt to adopt firmware if there
631 status = myri10ge_adopt_running_firmware(mgp);
633 dev_err(&mgp->pdev->dev,
634 "failed to adopt running firmware\n");
637 dev_info(&mgp->pdev->dev,
638 "Successfully adopted running firmware\n");
639 if (mgp->tx.boundary == 4096) {
640 dev_warn(&mgp->pdev->dev,
641 "Using firmware currently running on NIC"
643 dev_warn(&mgp->pdev->dev,
644 "performance consider loading optimized "
646 dev_warn(&mgp->pdev->dev, "via hotplug\n");
649 mgp->fw_name = "adopted";
650 mgp->tx.boundary = 2048;
654 /* clear confirmation addr */
658 /* send a reload command to the bootstrap MCP, and wait for the
659 * response in the confirmation address. The firmware should
660 * write a -1 there to indicate it is alive and well
662 dma_low = MYRI10GE_LOWPART_TO_U32(mgp->cmd_bus);
663 dma_high = MYRI10GE_HIGHPART_TO_U32(mgp->cmd_bus);
665 buf[0] = htonl(dma_high); /* confirm addr MSW */
666 buf[1] = htonl(dma_low); /* confirm addr LSW */
667 buf[2] = MYRI10GE_NO_CONFIRM_DATA; /* confirm data */
669 /* FIX: All newest firmware should un-protect the bottom of
670 * the sram before handoff. However, the very first interfaces
671 * do not. Therefore the handoff copy must skip the first 8 bytes
673 buf[3] = htonl(MYRI10GE_FW_OFFSET + 8); /* where the code starts */
674 buf[4] = htonl(size - 8); /* length of code */
675 buf[5] = htonl(8); /* where to copy to */
676 buf[6] = htonl(0); /* where to jump to */
678 submit = mgp->sram + MXGEFW_BOOT_HANDOFF;
680 myri10ge_pio_copy(submit, &buf, sizeof(buf));
685 while (mgp->cmd->data != MYRI10GE_NO_CONFIRM_DATA && i < 20) {
689 if (mgp->cmd->data != MYRI10GE_NO_CONFIRM_DATA) {
690 dev_err(&mgp->pdev->dev, "handoff failed\n");
693 dev_info(&mgp->pdev->dev, "handoff confirmed\n");
694 myri10ge_dummy_rdma(mgp, 1);
696 /* probe for IPv6 TSO support */
697 mgp->features = NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_TSO;
698 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_MAX_TSO6_HDR_SIZE,
701 mgp->max_tso6 = cmd.data0;
702 mgp->features |= NETIF_F_TSO6;
707 static int myri10ge_update_mac_address(struct myri10ge_priv *mgp, u8 * addr)
709 struct myri10ge_cmd cmd;
712 cmd.data0 = ((addr[0] << 24) | (addr[1] << 16)
713 | (addr[2] << 8) | addr[3]);
715 cmd.data1 = ((addr[4] << 8) | (addr[5]));
717 status = myri10ge_send_cmd(mgp, MXGEFW_SET_MAC_ADDRESS, &cmd, 0);
721 static int myri10ge_change_pause(struct myri10ge_priv *mgp, int pause)
723 struct myri10ge_cmd cmd;
726 ctl = pause ? MXGEFW_ENABLE_FLOW_CONTROL : MXGEFW_DISABLE_FLOW_CONTROL;
727 status = myri10ge_send_cmd(mgp, ctl, &cmd, 0);
731 "myri10ge: %s: Failed to set flow control mode\n",
740 myri10ge_change_promisc(struct myri10ge_priv *mgp, int promisc, int atomic)
742 struct myri10ge_cmd cmd;
745 ctl = promisc ? MXGEFW_ENABLE_PROMISC : MXGEFW_DISABLE_PROMISC;
746 status = myri10ge_send_cmd(mgp, ctl, &cmd, atomic);
748 printk(KERN_ERR "myri10ge: %s: Failed to set promisc mode\n",
752 static int myri10ge_dma_test(struct myri10ge_priv *mgp, int test_type)
754 struct myri10ge_cmd cmd;
757 struct page *dmatest_page;
758 dma_addr_t dmatest_bus;
761 dmatest_page = alloc_page(GFP_KERNEL);
764 dmatest_bus = pci_map_page(mgp->pdev, dmatest_page, 0, PAGE_SIZE,
767 /* Run a small DMA test.
768 * The magic multipliers to the length tell the firmware
769 * to do DMA read, write, or read+write tests. The
770 * results are returned in cmd.data0. The upper 16
771 * bits or the return is the number of transfers completed.
772 * The lower 16 bits is the time in 0.5us ticks that the
773 * transfers took to complete.
776 len = mgp->tx.boundary;
778 cmd.data0 = MYRI10GE_LOWPART_TO_U32(dmatest_bus);
779 cmd.data1 = MYRI10GE_HIGHPART_TO_U32(dmatest_bus);
780 cmd.data2 = len * 0x10000;
781 status = myri10ge_send_cmd(mgp, test_type, &cmd, 0);
786 mgp->read_dma = ((cmd.data0 >> 16) * len * 2) / (cmd.data0 & 0xffff);
787 cmd.data0 = MYRI10GE_LOWPART_TO_U32(dmatest_bus);
788 cmd.data1 = MYRI10GE_HIGHPART_TO_U32(dmatest_bus);
789 cmd.data2 = len * 0x1;
790 status = myri10ge_send_cmd(mgp, test_type, &cmd, 0);
795 mgp->write_dma = ((cmd.data0 >> 16) * len * 2) / (cmd.data0 & 0xffff);
797 cmd.data0 = MYRI10GE_LOWPART_TO_U32(dmatest_bus);
798 cmd.data1 = MYRI10GE_HIGHPART_TO_U32(dmatest_bus);
799 cmd.data2 = len * 0x10001;
800 status = myri10ge_send_cmd(mgp, test_type, &cmd, 0);
805 mgp->read_write_dma = ((cmd.data0 >> 16) * len * 2 * 2) /
806 (cmd.data0 & 0xffff);
809 pci_unmap_page(mgp->pdev, dmatest_bus, PAGE_SIZE, DMA_BIDIRECTIONAL);
810 put_page(dmatest_page);
812 if (status != 0 && test_type != MXGEFW_CMD_UNALIGNED_TEST)
813 dev_warn(&mgp->pdev->dev, "DMA %s benchmark failed: %d\n",
819 static int myri10ge_reset(struct myri10ge_priv *mgp)
821 struct myri10ge_cmd cmd;
825 /* try to send a reset command to the card to see if it
827 memset(&cmd, 0, sizeof(cmd));
828 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_RESET, &cmd, 0);
830 dev_err(&mgp->pdev->dev, "failed reset\n");
834 (void)myri10ge_dma_test(mgp, MXGEFW_DMA_TEST);
836 /* Now exchange information about interrupts */
838 bytes = myri10ge_max_intr_slots * sizeof(*mgp->rx_done.entry);
839 memset(mgp->rx_done.entry, 0, bytes);
840 cmd.data0 = (u32) bytes;
841 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_INTRQ_SIZE, &cmd, 0);
842 cmd.data0 = MYRI10GE_LOWPART_TO_U32(mgp->rx_done.bus);
843 cmd.data1 = MYRI10GE_HIGHPART_TO_U32(mgp->rx_done.bus);
844 status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_INTRQ_DMA, &cmd, 0);
847 myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_IRQ_ACK_OFFSET, &cmd, 0);
848 mgp->irq_claim = (__iomem __be32 *) (mgp->sram + cmd.data0);
849 status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_IRQ_DEASSERT_OFFSET,
851 mgp->irq_deassert = (__iomem __be32 *) (mgp->sram + cmd.data0);
853 status |= myri10ge_send_cmd
854 (mgp, MXGEFW_CMD_GET_INTR_COAL_DELAY_OFFSET, &cmd, 0);
855 mgp->intr_coal_delay_ptr = (__iomem __be32 *) (mgp->sram + cmd.data0);
857 dev_err(&mgp->pdev->dev, "failed set interrupt parameters\n");
860 put_be32(htonl(mgp->intr_coal_delay), mgp->intr_coal_delay_ptr);
862 memset(mgp->rx_done.entry, 0, bytes);
864 /* reset mcp/driver shared state back to 0 */
867 mgp->tx.pkt_start = 0;
868 mgp->tx.pkt_done = 0;
870 mgp->rx_small.cnt = 0;
871 mgp->rx_done.idx = 0;
872 mgp->rx_done.cnt = 0;
873 mgp->link_changes = 0;
874 status = myri10ge_update_mac_address(mgp, mgp->dev->dev_addr);
875 myri10ge_change_pause(mgp, mgp->pause);
876 myri10ge_set_multicast_list(mgp->dev);
881 myri10ge_submit_8rx(struct mcp_kreq_ether_recv __iomem * dst,
882 struct mcp_kreq_ether_recv *src)
887 src->addr_low = htonl(DMA_32BIT_MASK);
888 myri10ge_pio_copy(dst, src, 4 * sizeof(*src));
890 myri10ge_pio_copy(dst + 4, src + 4, 4 * sizeof(*src));
893 put_be32(low, &dst->addr_low);
897 static inline void myri10ge_vlan_ip_csum(struct sk_buff *skb, __wsum hw_csum)
899 struct vlan_hdr *vh = (struct vlan_hdr *)(skb->data);
901 if ((skb->protocol == htons(ETH_P_8021Q)) &&
902 (vh->h_vlan_encapsulated_proto == htons(ETH_P_IP) ||
903 vh->h_vlan_encapsulated_proto == htons(ETH_P_IPV6))) {
905 skb->ip_summed = CHECKSUM_COMPLETE;
910 myri10ge_rx_skb_build(struct sk_buff *skb, u8 * va,
911 struct skb_frag_struct *rx_frags, int len, int hlen)
913 struct skb_frag_struct *skb_frags;
915 skb->len = skb->data_len = len;
916 skb->truesize = len + sizeof(struct sk_buff);
917 /* attach the page(s) */
919 skb_frags = skb_shinfo(skb)->frags;
921 memcpy(skb_frags, rx_frags, sizeof(*skb_frags));
922 len -= rx_frags->size;
925 skb_shinfo(skb)->nr_frags++;
928 /* pskb_may_pull is not available in irq context, but
929 * skb_pull() (for ether_pad and eth_type_trans()) requires
930 * the beginning of the packet in skb_headlen(), move it
932 skb_copy_to_linear_data(skb, va, hlen);
933 skb_shinfo(skb)->frags[0].page_offset += hlen;
934 skb_shinfo(skb)->frags[0].size -= hlen;
935 skb->data_len -= hlen;
937 skb_pull(skb, MXGEFW_PAD);
941 myri10ge_alloc_rx_pages(struct myri10ge_priv *mgp, struct myri10ge_rx_buf *rx,
942 int bytes, int watchdog)
947 if (unlikely(rx->watchdog_needed && !watchdog))
950 /* try to refill entire ring */
951 while (rx->fill_cnt != (rx->cnt + rx->mask + 1)) {
952 idx = rx->fill_cnt & rx->mask;
953 if (rx->page_offset + bytes <= MYRI10GE_ALLOC_SIZE) {
954 /* we can use part of previous page */
957 /* we need a new page */
959 alloc_pages(GFP_ATOMIC | __GFP_COMP,
960 MYRI10GE_ALLOC_ORDER);
961 if (unlikely(page == NULL)) {
962 if (rx->fill_cnt - rx->cnt < 16)
963 rx->watchdog_needed = 1;
968 rx->bus = pci_map_page(mgp->pdev, page, 0,
972 rx->info[idx].page = rx->page;
973 rx->info[idx].page_offset = rx->page_offset;
974 /* note that this is the address of the start of the
976 pci_unmap_addr_set(&rx->info[idx], bus, rx->bus);
977 rx->shadow[idx].addr_low =
978 htonl(MYRI10GE_LOWPART_TO_U32(rx->bus) + rx->page_offset);
979 rx->shadow[idx].addr_high =
980 htonl(MYRI10GE_HIGHPART_TO_U32(rx->bus));
982 /* start next packet on a cacheline boundary */
983 rx->page_offset += SKB_DATA_ALIGN(bytes);
985 #if MYRI10GE_ALLOC_SIZE > 4096
986 /* don't cross a 4KB boundary */
987 if ((rx->page_offset >> 12) !=
988 ((rx->page_offset + bytes - 1) >> 12))
989 rx->page_offset = (rx->page_offset + 4096) & ~4095;
993 /* copy 8 descriptors to the firmware at a time */
994 if ((idx & 7) == 7) {
995 if (rx->wc_fifo == NULL)
996 myri10ge_submit_8rx(&rx->lanai[idx - 7],
997 &rx->shadow[idx - 7]);
1000 myri10ge_pio_copy(rx->wc_fifo,
1001 &rx->shadow[idx - 7], 64);
1008 myri10ge_unmap_rx_page(struct pci_dev *pdev,
1009 struct myri10ge_rx_buffer_state *info, int bytes)
1011 /* unmap the recvd page if we're the only or last user of it */
1012 if (bytes >= MYRI10GE_ALLOC_SIZE / 2 ||
1013 (info->page_offset + 2 * bytes) > MYRI10GE_ALLOC_SIZE) {
1014 pci_unmap_page(pdev, (pci_unmap_addr(info, bus)
1015 & ~(MYRI10GE_ALLOC_SIZE - 1)),
1016 MYRI10GE_ALLOC_SIZE, PCI_DMA_FROMDEVICE);
1020 #define MYRI10GE_HLEN 64 /* The number of bytes to copy from a
1021 * page into an skb */
1024 myri10ge_rx_done(struct myri10ge_priv *mgp, struct myri10ge_rx_buf *rx,
1025 int bytes, int len, __wsum csum)
1027 struct sk_buff *skb;
1028 struct skb_frag_struct rx_frags[MYRI10GE_MAX_FRAGS_PER_FRAME];
1029 int i, idx, hlen, remainder;
1030 struct pci_dev *pdev = mgp->pdev;
1031 struct net_device *dev = mgp->dev;
1035 idx = rx->cnt & rx->mask;
1036 va = page_address(rx->info[idx].page) + rx->info[idx].page_offset;
1038 /* Fill skb_frag_struct(s) with data from our receive */
1039 for (i = 0, remainder = len; remainder > 0; i++) {
1040 myri10ge_unmap_rx_page(pdev, &rx->info[idx], bytes);
1041 rx_frags[i].page = rx->info[idx].page;
1042 rx_frags[i].page_offset = rx->info[idx].page_offset;
1043 if (remainder < MYRI10GE_ALLOC_SIZE)
1044 rx_frags[i].size = remainder;
1046 rx_frags[i].size = MYRI10GE_ALLOC_SIZE;
1048 idx = rx->cnt & rx->mask;
1049 remainder -= MYRI10GE_ALLOC_SIZE;
1052 if (mgp->csum_flag && myri10ge_lro) {
1053 rx_frags[0].page_offset += MXGEFW_PAD;
1054 rx_frags[0].size -= MXGEFW_PAD;
1056 lro_receive_frags(&mgp->rx_done.lro_mgr, rx_frags,
1058 /* opaque, will come back in get_frag_header */
1059 (void *)(__force unsigned long)csum,
1064 hlen = MYRI10GE_HLEN > len ? len : MYRI10GE_HLEN;
1066 /* allocate an skb to attach the page(s) to. This is done
1067 * after trying LRO, so as to avoid skb allocation overheads */
1069 skb = netdev_alloc_skb(dev, MYRI10GE_HLEN + 16);
1070 if (unlikely(skb == NULL)) {
1071 mgp->stats.rx_dropped++;
1074 put_page(rx_frags[i].page);
1079 /* Attach the pages to the skb, and trim off any padding */
1080 myri10ge_rx_skb_build(skb, va, rx_frags, len, hlen);
1081 if (skb_shinfo(skb)->frags[0].size <= 0) {
1082 put_page(skb_shinfo(skb)->frags[0].page);
1083 skb_shinfo(skb)->nr_frags = 0;
1085 skb->protocol = eth_type_trans(skb, dev);
1087 if (mgp->csum_flag) {
1088 if ((skb->protocol == htons(ETH_P_IP)) ||
1089 (skb->protocol == htons(ETH_P_IPV6))) {
1091 skb->ip_summed = CHECKSUM_COMPLETE;
1093 myri10ge_vlan_ip_csum(skb, csum);
1095 netif_receive_skb(skb);
1096 dev->last_rx = jiffies;
1100 static inline void myri10ge_tx_done(struct myri10ge_priv *mgp, int mcp_index)
1102 struct pci_dev *pdev = mgp->pdev;
1103 struct myri10ge_tx_buf *tx = &mgp->tx;
1104 struct sk_buff *skb;
1107 while (tx->pkt_done != mcp_index) {
1108 idx = tx->done & tx->mask;
1109 skb = tx->info[idx].skb;
1112 tx->info[idx].skb = NULL;
1113 if (tx->info[idx].last) {
1115 tx->info[idx].last = 0;
1118 len = pci_unmap_len(&tx->info[idx], len);
1119 pci_unmap_len_set(&tx->info[idx], len, 0);
1121 mgp->stats.tx_bytes += skb->len;
1122 mgp->stats.tx_packets++;
1123 dev_kfree_skb_irq(skb);
1125 pci_unmap_single(pdev,
1126 pci_unmap_addr(&tx->info[idx],
1131 pci_unmap_page(pdev,
1132 pci_unmap_addr(&tx->info[idx],
1137 /* start the queue if we've stopped it */
1138 if (netif_queue_stopped(mgp->dev)
1139 && tx->req - tx->done < (tx->mask >> 1)) {
1141 netif_wake_queue(mgp->dev);
1145 static inline int myri10ge_clean_rx_done(struct myri10ge_priv *mgp, int budget)
1147 struct myri10ge_rx_done *rx_done = &mgp->rx_done;
1148 unsigned long rx_bytes = 0;
1149 unsigned long rx_packets = 0;
1150 unsigned long rx_ok;
1152 int idx = rx_done->idx;
1153 int cnt = rx_done->cnt;
1158 while (rx_done->entry[idx].length != 0 && work_done < budget) {
1159 length = ntohs(rx_done->entry[idx].length);
1160 rx_done->entry[idx].length = 0;
1161 checksum = csum_unfold(rx_done->entry[idx].checksum);
1162 if (length <= mgp->small_bytes)
1163 rx_ok = myri10ge_rx_done(mgp, &mgp->rx_small,
1167 rx_ok = myri10ge_rx_done(mgp, &mgp->rx_big,
1170 rx_packets += rx_ok;
1171 rx_bytes += rx_ok * (unsigned long)length;
1173 idx = cnt & (myri10ge_max_intr_slots - 1);
1178 mgp->stats.rx_packets += rx_packets;
1179 mgp->stats.rx_bytes += rx_bytes;
1182 lro_flush_all(&rx_done->lro_mgr);
1184 /* restock receive rings if needed */
1185 if (mgp->rx_small.fill_cnt - mgp->rx_small.cnt < myri10ge_fill_thresh)
1186 myri10ge_alloc_rx_pages(mgp, &mgp->rx_small,
1187 mgp->small_bytes + MXGEFW_PAD, 0);
1188 if (mgp->rx_big.fill_cnt - mgp->rx_big.cnt < myri10ge_fill_thresh)
1189 myri10ge_alloc_rx_pages(mgp, &mgp->rx_big, mgp->big_bytes, 0);
1194 static inline void myri10ge_check_statblock(struct myri10ge_priv *mgp)
1196 struct mcp_irq_data *stats = mgp->fw_stats;
1198 if (unlikely(stats->stats_updated)) {
1199 unsigned link_up = ntohl(stats->link_up);
1200 if (mgp->link_state != link_up) {
1201 mgp->link_state = link_up;
1203 if (mgp->link_state == MXGEFW_LINK_UP) {
1204 if (netif_msg_link(mgp))
1206 "myri10ge: %s: link up\n",
1208 netif_carrier_on(mgp->dev);
1209 mgp->link_changes++;
1211 if (netif_msg_link(mgp))
1213 "myri10ge: %s: link %s\n",
1215 (link_up == MXGEFW_LINK_MYRINET ?
1216 "mismatch (Myrinet detected)" :
1218 netif_carrier_off(mgp->dev);
1219 mgp->link_changes++;
1222 if (mgp->rdma_tags_available !=
1223 ntohl(mgp->fw_stats->rdma_tags_available)) {
1224 mgp->rdma_tags_available =
1225 ntohl(mgp->fw_stats->rdma_tags_available);
1226 printk(KERN_WARNING "myri10ge: %s: RDMA timed out! "
1227 "%d tags left\n", mgp->dev->name,
1228 mgp->rdma_tags_available);
1230 mgp->down_cnt += stats->link_down;
1231 if (stats->link_down)
1232 wake_up(&mgp->down_wq);
1236 static int myri10ge_poll(struct napi_struct *napi, int budget)
1238 struct myri10ge_priv *mgp =
1239 container_of(napi, struct myri10ge_priv, napi);
1240 struct net_device *netdev = mgp->dev;
1243 /* process as many rx events as NAPI will allow */
1244 work_done = myri10ge_clean_rx_done(mgp, budget);
1246 if (work_done < budget) {
1247 netif_rx_complete(netdev, napi);
1248 put_be32(htonl(3), mgp->irq_claim);
1253 static irqreturn_t myri10ge_intr(int irq, void *arg)
1255 struct myri10ge_priv *mgp = arg;
1256 struct mcp_irq_data *stats = mgp->fw_stats;
1257 struct myri10ge_tx_buf *tx = &mgp->tx;
1258 u32 send_done_count;
1261 /* make sure it is our IRQ, and that the DMA has finished */
1262 if (unlikely(!stats->valid))
1265 /* low bit indicates receives are present, so schedule
1266 * napi poll handler */
1267 if (stats->valid & 1)
1268 netif_rx_schedule(mgp->dev, &mgp->napi);
1270 if (!mgp->msi_enabled) {
1271 put_be32(0, mgp->irq_deassert);
1272 if (!myri10ge_deassert_wait)
1278 /* Wait for IRQ line to go low, if using INTx */
1282 /* check for transmit completes and receives */
1283 send_done_count = ntohl(stats->send_done_count);
1284 if (send_done_count != tx->pkt_done)
1285 myri10ge_tx_done(mgp, (int)send_done_count);
1286 if (unlikely(i > myri10ge_max_irq_loops)) {
1287 printk(KERN_WARNING "myri10ge: %s: irq stuck?\n",
1290 schedule_work(&mgp->watchdog_work);
1292 if (likely(stats->valid == 0))
1298 myri10ge_check_statblock(mgp);
1300 put_be32(htonl(3), mgp->irq_claim + 1);
1301 return (IRQ_HANDLED);
1305 myri10ge_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
1307 cmd->autoneg = AUTONEG_DISABLE;
1308 cmd->speed = SPEED_10000;
1309 cmd->duplex = DUPLEX_FULL;
1314 myri10ge_get_drvinfo(struct net_device *netdev, struct ethtool_drvinfo *info)
1316 struct myri10ge_priv *mgp = netdev_priv(netdev);
1318 strlcpy(info->driver, "myri10ge", sizeof(info->driver));
1319 strlcpy(info->version, MYRI10GE_VERSION_STR, sizeof(info->version));
1320 strlcpy(info->fw_version, mgp->fw_version, sizeof(info->fw_version));
1321 strlcpy(info->bus_info, pci_name(mgp->pdev), sizeof(info->bus_info));
1325 myri10ge_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *coal)
1327 struct myri10ge_priv *mgp = netdev_priv(netdev);
1328 coal->rx_coalesce_usecs = mgp->intr_coal_delay;
1333 myri10ge_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *coal)
1335 struct myri10ge_priv *mgp = netdev_priv(netdev);
1337 mgp->intr_coal_delay = coal->rx_coalesce_usecs;
1338 put_be32(htonl(mgp->intr_coal_delay), mgp->intr_coal_delay_ptr);
1343 myri10ge_get_pauseparam(struct net_device *netdev,
1344 struct ethtool_pauseparam *pause)
1346 struct myri10ge_priv *mgp = netdev_priv(netdev);
1349 pause->rx_pause = mgp->pause;
1350 pause->tx_pause = mgp->pause;
1354 myri10ge_set_pauseparam(struct net_device *netdev,
1355 struct ethtool_pauseparam *pause)
1357 struct myri10ge_priv *mgp = netdev_priv(netdev);
1359 if (pause->tx_pause != mgp->pause)
1360 return myri10ge_change_pause(mgp, pause->tx_pause);
1361 if (pause->rx_pause != mgp->pause)
1362 return myri10ge_change_pause(mgp, pause->tx_pause);
1363 if (pause->autoneg != 0)
1369 myri10ge_get_ringparam(struct net_device *netdev,
1370 struct ethtool_ringparam *ring)
1372 struct myri10ge_priv *mgp = netdev_priv(netdev);
1374 ring->rx_mini_max_pending = mgp->rx_small.mask + 1;
1375 ring->rx_max_pending = mgp->rx_big.mask + 1;
1376 ring->rx_jumbo_max_pending = 0;
1377 ring->tx_max_pending = mgp->rx_small.mask + 1;
1378 ring->rx_mini_pending = ring->rx_mini_max_pending;
1379 ring->rx_pending = ring->rx_max_pending;
1380 ring->rx_jumbo_pending = ring->rx_jumbo_max_pending;
1381 ring->tx_pending = ring->tx_max_pending;
1384 static u32 myri10ge_get_rx_csum(struct net_device *netdev)
1386 struct myri10ge_priv *mgp = netdev_priv(netdev);
1393 static int myri10ge_set_rx_csum(struct net_device *netdev, u32 csum_enabled)
1395 struct myri10ge_priv *mgp = netdev_priv(netdev);
1397 mgp->csum_flag = MXGEFW_FLAGS_CKSUM;
1403 static int myri10ge_set_tso(struct net_device *netdev, u32 tso_enabled)
1405 struct myri10ge_priv *mgp = netdev_priv(netdev);
1406 unsigned long flags = mgp->features & (NETIF_F_TSO6 | NETIF_F_TSO);
1409 netdev->features |= flags;
1411 netdev->features &= ~flags;
1415 static const char myri10ge_gstrings_stats[][ETH_GSTRING_LEN] = {
1416 "rx_packets", "tx_packets", "rx_bytes", "tx_bytes", "rx_errors",
1417 "tx_errors", "rx_dropped", "tx_dropped", "multicast", "collisions",
1418 "rx_length_errors", "rx_over_errors", "rx_crc_errors",
1419 "rx_frame_errors", "rx_fifo_errors", "rx_missed_errors",
1420 "tx_aborted_errors", "tx_carrier_errors", "tx_fifo_errors",
1421 "tx_heartbeat_errors", "tx_window_errors",
1422 /* device-specific stats */
1423 "tx_boundary", "WC", "irq", "MSI",
1424 "read_dma_bw_MBs", "write_dma_bw_MBs", "read_write_dma_bw_MBs",
1425 "serial_number", "tx_pkt_start", "tx_pkt_done",
1426 "tx_req", "tx_done", "rx_small_cnt", "rx_big_cnt",
1427 "wake_queue", "stop_queue", "watchdog_resets", "tx_linearized",
1428 "link_changes", "link_up", "dropped_link_overflow",
1429 "dropped_link_error_or_filtered",
1430 "dropped_pause", "dropped_bad_phy", "dropped_bad_crc32",
1431 "dropped_unicast_filtered", "dropped_multicast_filtered",
1432 "dropped_runt", "dropped_overrun", "dropped_no_small_buffer",
1433 "dropped_no_big_buffer", "LRO aggregated", "LRO flushed",
1434 "LRO avg aggr", "LRO no_desc"
1437 #define MYRI10GE_NET_STATS_LEN 21
1438 #define MYRI10GE_STATS_LEN ARRAY_SIZE(myri10ge_gstrings_stats)
1441 myri10ge_get_strings(struct net_device *netdev, u32 stringset, u8 * data)
1443 switch (stringset) {
1445 memcpy(data, *myri10ge_gstrings_stats,
1446 sizeof(myri10ge_gstrings_stats));
1451 static int myri10ge_get_sset_count(struct net_device *netdev, int sset)
1455 return MYRI10GE_STATS_LEN;
1462 myri10ge_get_ethtool_stats(struct net_device *netdev,
1463 struct ethtool_stats *stats, u64 * data)
1465 struct myri10ge_priv *mgp = netdev_priv(netdev);
1468 for (i = 0; i < MYRI10GE_NET_STATS_LEN; i++)
1469 data[i] = ((unsigned long *)&mgp->stats)[i];
1471 data[i++] = (unsigned int)mgp->tx.boundary;
1472 data[i++] = (unsigned int)mgp->wc_enabled;
1473 data[i++] = (unsigned int)mgp->pdev->irq;
1474 data[i++] = (unsigned int)mgp->msi_enabled;
1475 data[i++] = (unsigned int)mgp->read_dma;
1476 data[i++] = (unsigned int)mgp->write_dma;
1477 data[i++] = (unsigned int)mgp->read_write_dma;
1478 data[i++] = (unsigned int)mgp->serial_number;
1479 data[i++] = (unsigned int)mgp->tx.pkt_start;
1480 data[i++] = (unsigned int)mgp->tx.pkt_done;
1481 data[i++] = (unsigned int)mgp->tx.req;
1482 data[i++] = (unsigned int)mgp->tx.done;
1483 data[i++] = (unsigned int)mgp->rx_small.cnt;
1484 data[i++] = (unsigned int)mgp->rx_big.cnt;
1485 data[i++] = (unsigned int)mgp->wake_queue;
1486 data[i++] = (unsigned int)mgp->stop_queue;
1487 data[i++] = (unsigned int)mgp->watchdog_resets;
1488 data[i++] = (unsigned int)mgp->tx_linearized;
1489 data[i++] = (unsigned int)mgp->link_changes;
1490 data[i++] = (unsigned int)ntohl(mgp->fw_stats->link_up);
1491 data[i++] = (unsigned int)ntohl(mgp->fw_stats->dropped_link_overflow);
1493 (unsigned int)ntohl(mgp->fw_stats->dropped_link_error_or_filtered);
1494 data[i++] = (unsigned int)ntohl(mgp->fw_stats->dropped_pause);
1495 data[i++] = (unsigned int)ntohl(mgp->fw_stats->dropped_bad_phy);
1496 data[i++] = (unsigned int)ntohl(mgp->fw_stats->dropped_bad_crc32);
1498 (unsigned int)ntohl(mgp->fw_stats->dropped_unicast_filtered);
1500 (unsigned int)ntohl(mgp->fw_stats->dropped_multicast_filtered);
1501 data[i++] = (unsigned int)ntohl(mgp->fw_stats->dropped_runt);
1502 data[i++] = (unsigned int)ntohl(mgp->fw_stats->dropped_overrun);
1503 data[i++] = (unsigned int)ntohl(mgp->fw_stats->dropped_no_small_buffer);
1504 data[i++] = (unsigned int)ntohl(mgp->fw_stats->dropped_no_big_buffer);
1505 data[i++] = mgp->rx_done.lro_mgr.stats.aggregated;
1506 data[i++] = mgp->rx_done.lro_mgr.stats.flushed;
1507 if (mgp->rx_done.lro_mgr.stats.flushed)
1508 data[i++] = mgp->rx_done.lro_mgr.stats.aggregated /
1509 mgp->rx_done.lro_mgr.stats.flushed;
1512 data[i++] = mgp->rx_done.lro_mgr.stats.no_desc;
1515 static void myri10ge_set_msglevel(struct net_device *netdev, u32 value)
1517 struct myri10ge_priv *mgp = netdev_priv(netdev);
1518 mgp->msg_enable = value;
1521 static u32 myri10ge_get_msglevel(struct net_device *netdev)
1523 struct myri10ge_priv *mgp = netdev_priv(netdev);
1524 return mgp->msg_enable;
1527 static const struct ethtool_ops myri10ge_ethtool_ops = {
1528 .get_settings = myri10ge_get_settings,
1529 .get_drvinfo = myri10ge_get_drvinfo,
1530 .get_coalesce = myri10ge_get_coalesce,
1531 .set_coalesce = myri10ge_set_coalesce,
1532 .get_pauseparam = myri10ge_get_pauseparam,
1533 .set_pauseparam = myri10ge_set_pauseparam,
1534 .get_ringparam = myri10ge_get_ringparam,
1535 .get_rx_csum = myri10ge_get_rx_csum,
1536 .set_rx_csum = myri10ge_set_rx_csum,
1537 .set_tx_csum = ethtool_op_set_tx_hw_csum,
1538 .set_sg = ethtool_op_set_sg,
1539 .set_tso = myri10ge_set_tso,
1540 .get_link = ethtool_op_get_link,
1541 .get_strings = myri10ge_get_strings,
1542 .get_sset_count = myri10ge_get_sset_count,
1543 .get_ethtool_stats = myri10ge_get_ethtool_stats,
1544 .set_msglevel = myri10ge_set_msglevel,
1545 .get_msglevel = myri10ge_get_msglevel
1548 static int myri10ge_allocate_rings(struct net_device *dev)
1550 struct myri10ge_priv *mgp;
1551 struct myri10ge_cmd cmd;
1552 int tx_ring_size, rx_ring_size;
1553 int tx_ring_entries, rx_ring_entries;
1557 mgp = netdev_priv(dev);
1559 /* get ring sizes */
1561 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_SEND_RING_SIZE, &cmd, 0);
1562 tx_ring_size = cmd.data0;
1563 status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_RX_RING_SIZE, &cmd, 0);
1566 rx_ring_size = cmd.data0;
1568 tx_ring_entries = tx_ring_size / sizeof(struct mcp_kreq_ether_send);
1569 rx_ring_entries = rx_ring_size / sizeof(struct mcp_dma_addr);
1570 mgp->tx.mask = tx_ring_entries - 1;
1571 mgp->rx_small.mask = mgp->rx_big.mask = rx_ring_entries - 1;
1575 /* allocate the host shadow rings */
1577 bytes = 8 + (MYRI10GE_MAX_SEND_DESC_TSO + 4)
1578 * sizeof(*mgp->tx.req_list);
1579 mgp->tx.req_bytes = kzalloc(bytes, GFP_KERNEL);
1580 if (mgp->tx.req_bytes == NULL)
1581 goto abort_with_nothing;
1583 /* ensure req_list entries are aligned to 8 bytes */
1584 mgp->tx.req_list = (struct mcp_kreq_ether_send *)
1585 ALIGN((unsigned long)mgp->tx.req_bytes, 8);
1587 bytes = rx_ring_entries * sizeof(*mgp->rx_small.shadow);
1588 mgp->rx_small.shadow = kzalloc(bytes, GFP_KERNEL);
1589 if (mgp->rx_small.shadow == NULL)
1590 goto abort_with_tx_req_bytes;
1592 bytes = rx_ring_entries * sizeof(*mgp->rx_big.shadow);
1593 mgp->rx_big.shadow = kzalloc(bytes, GFP_KERNEL);
1594 if (mgp->rx_big.shadow == NULL)
1595 goto abort_with_rx_small_shadow;
1597 /* allocate the host info rings */
1599 bytes = tx_ring_entries * sizeof(*mgp->tx.info);
1600 mgp->tx.info = kzalloc(bytes, GFP_KERNEL);
1601 if (mgp->tx.info == NULL)
1602 goto abort_with_rx_big_shadow;
1604 bytes = rx_ring_entries * sizeof(*mgp->rx_small.info);
1605 mgp->rx_small.info = kzalloc(bytes, GFP_KERNEL);
1606 if (mgp->rx_small.info == NULL)
1607 goto abort_with_tx_info;
1609 bytes = rx_ring_entries * sizeof(*mgp->rx_big.info);
1610 mgp->rx_big.info = kzalloc(bytes, GFP_KERNEL);
1611 if (mgp->rx_big.info == NULL)
1612 goto abort_with_rx_small_info;
1614 /* Fill the receive rings */
1615 mgp->rx_big.cnt = 0;
1616 mgp->rx_small.cnt = 0;
1617 mgp->rx_big.fill_cnt = 0;
1618 mgp->rx_small.fill_cnt = 0;
1619 mgp->rx_small.page_offset = MYRI10GE_ALLOC_SIZE;
1620 mgp->rx_big.page_offset = MYRI10GE_ALLOC_SIZE;
1621 mgp->rx_small.watchdog_needed = 0;
1622 mgp->rx_big.watchdog_needed = 0;
1623 myri10ge_alloc_rx_pages(mgp, &mgp->rx_small,
1624 mgp->small_bytes + MXGEFW_PAD, 0);
1626 if (mgp->rx_small.fill_cnt < mgp->rx_small.mask + 1) {
1627 printk(KERN_ERR "myri10ge: %s: alloced only %d small bufs\n",
1628 dev->name, mgp->rx_small.fill_cnt);
1629 goto abort_with_rx_small_ring;
1632 myri10ge_alloc_rx_pages(mgp, &mgp->rx_big, mgp->big_bytes, 0);
1633 if (mgp->rx_big.fill_cnt < mgp->rx_big.mask + 1) {
1634 printk(KERN_ERR "myri10ge: %s: alloced only %d big bufs\n",
1635 dev->name, mgp->rx_big.fill_cnt);
1636 goto abort_with_rx_big_ring;
1641 abort_with_rx_big_ring:
1642 for (i = mgp->rx_big.cnt; i < mgp->rx_big.fill_cnt; i++) {
1643 int idx = i & mgp->rx_big.mask;
1644 myri10ge_unmap_rx_page(mgp->pdev, &mgp->rx_big.info[idx],
1646 put_page(mgp->rx_big.info[idx].page);
1649 abort_with_rx_small_ring:
1650 for (i = mgp->rx_small.cnt; i < mgp->rx_small.fill_cnt; i++) {
1651 int idx = i & mgp->rx_small.mask;
1652 myri10ge_unmap_rx_page(mgp->pdev, &mgp->rx_small.info[idx],
1653 mgp->small_bytes + MXGEFW_PAD);
1654 put_page(mgp->rx_small.info[idx].page);
1657 kfree(mgp->rx_big.info);
1659 abort_with_rx_small_info:
1660 kfree(mgp->rx_small.info);
1663 kfree(mgp->tx.info);
1665 abort_with_rx_big_shadow:
1666 kfree(mgp->rx_big.shadow);
1668 abort_with_rx_small_shadow:
1669 kfree(mgp->rx_small.shadow);
1671 abort_with_tx_req_bytes:
1672 kfree(mgp->tx.req_bytes);
1673 mgp->tx.req_bytes = NULL;
1674 mgp->tx.req_list = NULL;
1680 static void myri10ge_free_rings(struct net_device *dev)
1682 struct myri10ge_priv *mgp;
1683 struct sk_buff *skb;
1684 struct myri10ge_tx_buf *tx;
1687 mgp = netdev_priv(dev);
1689 for (i = mgp->rx_big.cnt; i < mgp->rx_big.fill_cnt; i++) {
1690 idx = i & mgp->rx_big.mask;
1691 if (i == mgp->rx_big.fill_cnt - 1)
1692 mgp->rx_big.info[idx].page_offset = MYRI10GE_ALLOC_SIZE;
1693 myri10ge_unmap_rx_page(mgp->pdev, &mgp->rx_big.info[idx],
1695 put_page(mgp->rx_big.info[idx].page);
1698 for (i = mgp->rx_small.cnt; i < mgp->rx_small.fill_cnt; i++) {
1699 idx = i & mgp->rx_small.mask;
1700 if (i == mgp->rx_small.fill_cnt - 1)
1701 mgp->rx_small.info[idx].page_offset =
1702 MYRI10GE_ALLOC_SIZE;
1703 myri10ge_unmap_rx_page(mgp->pdev, &mgp->rx_small.info[idx],
1704 mgp->small_bytes + MXGEFW_PAD);
1705 put_page(mgp->rx_small.info[idx].page);
1708 while (tx->done != tx->req) {
1709 idx = tx->done & tx->mask;
1710 skb = tx->info[idx].skb;
1713 tx->info[idx].skb = NULL;
1715 len = pci_unmap_len(&tx->info[idx], len);
1716 pci_unmap_len_set(&tx->info[idx], len, 0);
1718 mgp->stats.tx_dropped++;
1719 dev_kfree_skb_any(skb);
1721 pci_unmap_single(mgp->pdev,
1722 pci_unmap_addr(&tx->info[idx],
1727 pci_unmap_page(mgp->pdev,
1728 pci_unmap_addr(&tx->info[idx],
1733 kfree(mgp->rx_big.info);
1735 kfree(mgp->rx_small.info);
1737 kfree(mgp->tx.info);
1739 kfree(mgp->rx_big.shadow);
1741 kfree(mgp->rx_small.shadow);
1743 kfree(mgp->tx.req_bytes);
1744 mgp->tx.req_bytes = NULL;
1745 mgp->tx.req_list = NULL;
1748 static int myri10ge_request_irq(struct myri10ge_priv *mgp)
1750 struct pci_dev *pdev = mgp->pdev;
1754 status = pci_enable_msi(pdev);
1757 "Error %d setting up MSI; falling back to xPIC\n",
1760 mgp->msi_enabled = 1;
1762 mgp->msi_enabled = 0;
1764 status = request_irq(pdev->irq, myri10ge_intr, IRQF_SHARED,
1765 mgp->dev->name, mgp);
1767 dev_err(&pdev->dev, "failed to allocate IRQ\n");
1768 if (mgp->msi_enabled)
1769 pci_disable_msi(pdev);
1774 static void myri10ge_free_irq(struct myri10ge_priv *mgp)
1776 struct pci_dev *pdev = mgp->pdev;
1778 free_irq(pdev->irq, mgp);
1779 if (mgp->msi_enabled)
1780 pci_disable_msi(pdev);
1784 myri10ge_get_frag_header(struct skb_frag_struct *frag, void **mac_hdr,
1785 void **ip_hdr, void **tcpudp_hdr,
1786 u64 * hdr_flags, void *priv)
1789 struct vlan_ethhdr *veh;
1791 u8 *va = page_address(frag->page) + frag->page_offset;
1792 unsigned long ll_hlen;
1793 /* passed opaque through lro_receive_frags() */
1794 __wsum csum = (__force __wsum) (unsigned long)priv;
1796 /* find the mac header, aborting if not IPv4 */
1798 eh = (struct ethhdr *)va;
1801 if (eh->h_proto != htons(ETH_P_IP)) {
1802 if (eh->h_proto == htons(ETH_P_8021Q)) {
1803 veh = (struct vlan_ethhdr *)va;
1804 if (veh->h_vlan_encapsulated_proto != htons(ETH_P_IP))
1807 ll_hlen += VLAN_HLEN;
1810 * HW checksum starts ETH_HLEN bytes into
1811 * frame, so we must subtract off the VLAN
1812 * header's checksum before csum can be used
1814 csum = csum_sub(csum, csum_partial(va + ETH_HLEN,
1820 *hdr_flags = LRO_IPV4;
1822 iph = (struct iphdr *)(va + ll_hlen);
1824 if (iph->protocol != IPPROTO_TCP)
1826 *hdr_flags |= LRO_TCP;
1827 *tcpudp_hdr = (u8 *) (*ip_hdr) + (iph->ihl << 2);
1829 /* verify the IP checksum */
1830 if (unlikely(ip_fast_csum((u8 *) iph, iph->ihl)))
1833 /* verify the checksum */
1834 if (unlikely(csum_tcpudp_magic(iph->saddr, iph->daddr,
1835 ntohs(iph->tot_len) - (iph->ihl << 2),
1836 IPPROTO_TCP, csum)))
1842 static int myri10ge_open(struct net_device *dev)
1844 struct myri10ge_priv *mgp;
1845 struct myri10ge_cmd cmd;
1846 struct net_lro_mgr *lro_mgr;
1847 int status, big_pow2;
1849 mgp = netdev_priv(dev);
1851 if (mgp->running != MYRI10GE_ETH_STOPPED)
1854 mgp->running = MYRI10GE_ETH_STARTING;
1855 status = myri10ge_reset(mgp);
1857 printk(KERN_ERR "myri10ge: %s: failed reset\n", dev->name);
1858 goto abort_with_nothing;
1861 status = myri10ge_request_irq(mgp);
1863 goto abort_with_nothing;
1865 /* decide what small buffer size to use. For good TCP rx
1866 * performance, it is important to not receive 1514 byte
1867 * frames into jumbo buffers, as it confuses the socket buffer
1868 * accounting code, leading to drops and erratic performance.
1871 if (dev->mtu <= ETH_DATA_LEN)
1872 /* enough for a TCP header */
1873 mgp->small_bytes = (128 > SMP_CACHE_BYTES)
1874 ? (128 - MXGEFW_PAD)
1875 : (SMP_CACHE_BYTES - MXGEFW_PAD);
1877 /* enough for a vlan encapsulated ETH_DATA_LEN frame */
1878 mgp->small_bytes = VLAN_ETH_FRAME_LEN;
1880 /* Override the small buffer size? */
1881 if (myri10ge_small_bytes > 0)
1882 mgp->small_bytes = myri10ge_small_bytes;
1884 /* get the lanai pointers to the send and receive rings */
1886 status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_SEND_OFFSET, &cmd, 0);
1888 (struct mcp_kreq_ether_send __iomem *)(mgp->sram + cmd.data0);
1891 myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_SMALL_RX_OFFSET, &cmd, 0);
1892 mgp->rx_small.lanai =
1893 (struct mcp_kreq_ether_recv __iomem *)(mgp->sram + cmd.data0);
1895 status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_BIG_RX_OFFSET, &cmd, 0);
1897 (struct mcp_kreq_ether_recv __iomem *)(mgp->sram + cmd.data0);
1901 "myri10ge: %s: failed to get ring sizes or locations\n",
1903 mgp->running = MYRI10GE_ETH_STOPPED;
1904 goto abort_with_irq;
1907 if (myri10ge_wcfifo && mgp->wc_enabled) {
1908 mgp->tx.wc_fifo = (u8 __iomem *) mgp->sram + MXGEFW_ETH_SEND_4;
1909 mgp->rx_small.wc_fifo =
1910 (u8 __iomem *) mgp->sram + MXGEFW_ETH_RECV_SMALL;
1911 mgp->rx_big.wc_fifo =
1912 (u8 __iomem *) mgp->sram + MXGEFW_ETH_RECV_BIG;
1914 mgp->tx.wc_fifo = NULL;
1915 mgp->rx_small.wc_fifo = NULL;
1916 mgp->rx_big.wc_fifo = NULL;
1919 /* Firmware needs the big buff size as a power of 2. Lie and
1920 * tell him the buffer is larger, because we only use 1
1921 * buffer/pkt, and the mtu will prevent overruns.
1923 big_pow2 = dev->mtu + ETH_HLEN + VLAN_HLEN + MXGEFW_PAD;
1924 if (big_pow2 < MYRI10GE_ALLOC_SIZE / 2) {
1925 while (!is_power_of_2(big_pow2))
1927 mgp->big_bytes = dev->mtu + ETH_HLEN + VLAN_HLEN + MXGEFW_PAD;
1929 big_pow2 = MYRI10GE_ALLOC_SIZE;
1930 mgp->big_bytes = big_pow2;
1933 status = myri10ge_allocate_rings(dev);
1935 goto abort_with_irq;
1937 /* now give firmware buffers sizes, and MTU */
1938 cmd.data0 = dev->mtu + ETH_HLEN + VLAN_HLEN;
1939 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_MTU, &cmd, 0);
1940 cmd.data0 = mgp->small_bytes;
1942 myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_SMALL_BUFFER_SIZE, &cmd, 0);
1943 cmd.data0 = big_pow2;
1945 myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_BIG_BUFFER_SIZE, &cmd, 0);
1947 printk(KERN_ERR "myri10ge: %s: Couldn't set buffer sizes\n",
1949 goto abort_with_rings;
1952 cmd.data0 = MYRI10GE_LOWPART_TO_U32(mgp->fw_stats_bus);
1953 cmd.data1 = MYRI10GE_HIGHPART_TO_U32(mgp->fw_stats_bus);
1954 cmd.data2 = sizeof(struct mcp_irq_data);
1955 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_STATS_DMA_V2, &cmd, 0);
1956 if (status == -ENOSYS) {
1957 dma_addr_t bus = mgp->fw_stats_bus;
1958 bus += offsetof(struct mcp_irq_data, send_done_count);
1959 cmd.data0 = MYRI10GE_LOWPART_TO_U32(bus);
1960 cmd.data1 = MYRI10GE_HIGHPART_TO_U32(bus);
1961 status = myri10ge_send_cmd(mgp,
1962 MXGEFW_CMD_SET_STATS_DMA_OBSOLETE,
1964 /* Firmware cannot support multicast without STATS_DMA_V2 */
1965 mgp->fw_multicast_support = 0;
1967 mgp->fw_multicast_support = 1;
1970 printk(KERN_ERR "myri10ge: %s: Couldn't set stats DMA\n",
1972 goto abort_with_rings;
1975 mgp->link_state = ~0U;
1976 mgp->rdma_tags_available = 15;
1978 lro_mgr = &mgp->rx_done.lro_mgr;
1980 lro_mgr->features = LRO_F_NAPI;
1981 lro_mgr->ip_summed = CHECKSUM_COMPLETE;
1982 lro_mgr->ip_summed_aggr = CHECKSUM_UNNECESSARY;
1983 lro_mgr->max_desc = MYRI10GE_MAX_LRO_DESCRIPTORS;
1984 lro_mgr->lro_arr = mgp->rx_done.lro_desc;
1985 lro_mgr->get_frag_header = myri10ge_get_frag_header;
1986 lro_mgr->max_aggr = myri10ge_lro_max_pkts;
1987 lro_mgr->frag_align_pad = 2;
1988 if (lro_mgr->max_aggr > MAX_SKB_FRAGS)
1989 lro_mgr->max_aggr = MAX_SKB_FRAGS;
1991 napi_enable(&mgp->napi); /* must happen prior to any irq */
1993 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_ETHERNET_UP, &cmd, 0);
1995 printk(KERN_ERR "myri10ge: %s: Couldn't bring up link\n",
1997 goto abort_with_rings;
2000 mgp->wake_queue = 0;
2001 mgp->stop_queue = 0;
2002 mgp->running = MYRI10GE_ETH_RUNNING;
2003 mgp->watchdog_timer.expires = jiffies + myri10ge_watchdog_timeout * HZ;
2004 add_timer(&mgp->watchdog_timer);
2005 netif_wake_queue(dev);
2009 myri10ge_free_rings(dev);
2012 myri10ge_free_irq(mgp);
2015 mgp->running = MYRI10GE_ETH_STOPPED;
2019 static int myri10ge_close(struct net_device *dev)
2021 struct myri10ge_priv *mgp;
2022 struct myri10ge_cmd cmd;
2023 int status, old_down_cnt;
2025 mgp = netdev_priv(dev);
2027 if (mgp->running != MYRI10GE_ETH_RUNNING)
2030 if (mgp->tx.req_bytes == NULL)
2033 del_timer_sync(&mgp->watchdog_timer);
2034 mgp->running = MYRI10GE_ETH_STOPPING;
2035 napi_disable(&mgp->napi);
2036 netif_carrier_off(dev);
2037 netif_stop_queue(dev);
2038 old_down_cnt = mgp->down_cnt;
2040 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_ETHERNET_DOWN, &cmd, 0);
2042 printk(KERN_ERR "myri10ge: %s: Couldn't bring down link\n",
2045 wait_event_timeout(mgp->down_wq, old_down_cnt != mgp->down_cnt, HZ);
2046 if (old_down_cnt == mgp->down_cnt)
2047 printk(KERN_ERR "myri10ge: %s never got down irq\n", dev->name);
2049 netif_tx_disable(dev);
2050 myri10ge_free_irq(mgp);
2051 myri10ge_free_rings(dev);
2053 mgp->running = MYRI10GE_ETH_STOPPED;
2057 /* copy an array of struct mcp_kreq_ether_send's to the mcp. Copy
2058 * backwards one at a time and handle ring wraps */
2061 myri10ge_submit_req_backwards(struct myri10ge_tx_buf *tx,
2062 struct mcp_kreq_ether_send *src, int cnt)
2064 int idx, starting_slot;
2065 starting_slot = tx->req;
2068 idx = (starting_slot + cnt) & tx->mask;
2069 myri10ge_pio_copy(&tx->lanai[idx], &src[cnt], sizeof(*src));
2075 * copy an array of struct mcp_kreq_ether_send's to the mcp. Copy
2076 * at most 32 bytes at a time, so as to avoid involving the software
2077 * pio handler in the nic. We re-write the first segment's flags
2078 * to mark them valid only after writing the entire chain.
2082 myri10ge_submit_req(struct myri10ge_tx_buf *tx, struct mcp_kreq_ether_send *src,
2086 struct mcp_kreq_ether_send __iomem *dstp, *dst;
2087 struct mcp_kreq_ether_send *srcp;
2090 idx = tx->req & tx->mask;
2092 last_flags = src->flags;
2095 dst = dstp = &tx->lanai[idx];
2098 if ((idx + cnt) < tx->mask) {
2099 for (i = 0; i < (cnt - 1); i += 2) {
2100 myri10ge_pio_copy(dstp, srcp, 2 * sizeof(*src));
2101 mb(); /* force write every 32 bytes */
2106 /* submit all but the first request, and ensure
2107 * that it is submitted below */
2108 myri10ge_submit_req_backwards(tx, src, cnt);
2112 /* submit the first request */
2113 myri10ge_pio_copy(dstp, srcp, sizeof(*src));
2114 mb(); /* barrier before setting valid flag */
2117 /* re-write the last 32-bits with the valid flags */
2118 src->flags = last_flags;
2119 put_be32(*((__be32 *) src + 3), (__be32 __iomem *) dst + 3);
2125 myri10ge_submit_req_wc(struct myri10ge_tx_buf *tx,
2126 struct mcp_kreq_ether_send *src, int cnt)
2131 myri10ge_pio_copy(tx->wc_fifo, src, 64);
2137 /* pad it to 64 bytes. The src is 64 bytes bigger than it
2138 * needs to be so that we don't overrun it */
2139 myri10ge_pio_copy(tx->wc_fifo + MXGEFW_ETH_SEND_OFFSET(cnt),
2146 * Transmit a packet. We need to split the packet so that a single
2147 * segment does not cross myri10ge->tx.boundary, so this makes segment
2148 * counting tricky. So rather than try to count segments up front, we
2149 * just give up if there are too few segments to hold a reasonably
2150 * fragmented packet currently available. If we run
2151 * out of segments while preparing a packet for DMA, we just linearize
2155 static int myri10ge_xmit(struct sk_buff *skb, struct net_device *dev)
2157 struct myri10ge_priv *mgp = netdev_priv(dev);
2158 struct mcp_kreq_ether_send *req;
2159 struct myri10ge_tx_buf *tx = &mgp->tx;
2160 struct skb_frag_struct *frag;
2163 __be32 high_swapped;
2165 int idx, last_idx, avail, frag_cnt, frag_idx, count, mss, max_segments;
2166 u16 pseudo_hdr_offset, cksum_offset;
2167 int cum_len, seglen, boundary, rdma_count;
2172 avail = tx->mask - 1 - (tx->req - tx->done);
2175 max_segments = MXGEFW_MAX_SEND_DESC;
2177 if (skb_is_gso(skb)) {
2178 mss = skb_shinfo(skb)->gso_size;
2179 max_segments = MYRI10GE_MAX_SEND_DESC_TSO;
2182 if ((unlikely(avail < max_segments))) {
2183 /* we are out of transmit resources */
2185 netif_stop_queue(dev);
2189 /* Setup checksum offloading, if needed */
2191 pseudo_hdr_offset = 0;
2193 flags = (MXGEFW_FLAGS_NO_TSO | MXGEFW_FLAGS_FIRST);
2194 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2195 cksum_offset = skb_transport_offset(skb);
2196 pseudo_hdr_offset = cksum_offset + skb->csum_offset;
2197 /* If the headers are excessively large, then we must
2198 * fall back to a software checksum */
2199 if (unlikely(!mss && (cksum_offset > 255 ||
2200 pseudo_hdr_offset > 127))) {
2201 if (skb_checksum_help(skb))
2204 pseudo_hdr_offset = 0;
2206 odd_flag = MXGEFW_FLAGS_ALIGN_ODD;
2207 flags |= MXGEFW_FLAGS_CKSUM;
2213 if (mss) { /* TSO */
2214 /* this removes any CKSUM flag from before */
2215 flags = (MXGEFW_FLAGS_TSO_HDR | MXGEFW_FLAGS_FIRST);
2217 /* negative cum_len signifies to the
2218 * send loop that we are still in the
2219 * header portion of the TSO packet.
2220 * TSO header can be at most 1KB long */
2221 cum_len = -(skb_transport_offset(skb) + tcp_hdrlen(skb));
2223 /* for IPv6 TSO, the checksum offset stores the
2224 * TCP header length, to save the firmware from
2225 * the need to parse the headers */
2226 if (skb_is_gso_v6(skb)) {
2227 cksum_offset = tcp_hdrlen(skb);
2228 /* Can only handle headers <= max_tso6 long */
2229 if (unlikely(-cum_len > mgp->max_tso6))
2230 return myri10ge_sw_tso(skb, dev);
2232 /* for TSO, pseudo_hdr_offset holds mss.
2233 * The firmware figures out where to put
2234 * the checksum by parsing the header. */
2235 pseudo_hdr_offset = mss;
2237 /* Mark small packets, and pad out tiny packets */
2238 if (skb->len <= MXGEFW_SEND_SMALL_SIZE) {
2239 flags |= MXGEFW_FLAGS_SMALL;
2241 /* pad frames to at least ETH_ZLEN bytes */
2242 if (unlikely(skb->len < ETH_ZLEN)) {
2243 if (skb_padto(skb, ETH_ZLEN)) {
2244 /* The packet is gone, so we must
2246 mgp->stats.tx_dropped += 1;
2249 /* adjust the len to account for the zero pad
2250 * so that the nic can know how long it is */
2251 skb->len = ETH_ZLEN;
2255 /* map the skb for DMA */
2256 len = skb->len - skb->data_len;
2257 idx = tx->req & tx->mask;
2258 tx->info[idx].skb = skb;
2259 bus = pci_map_single(mgp->pdev, skb->data, len, PCI_DMA_TODEVICE);
2260 pci_unmap_addr_set(&tx->info[idx], bus, bus);
2261 pci_unmap_len_set(&tx->info[idx], len, len);
2263 frag_cnt = skb_shinfo(skb)->nr_frags;
2268 /* "rdma_count" is the number of RDMAs belonging to the
2269 * current packet BEFORE the current send request. For
2270 * non-TSO packets, this is equal to "count".
2271 * For TSO packets, rdma_count needs to be reset
2272 * to 0 after a segment cut.
2274 * The rdma_count field of the send request is
2275 * the number of RDMAs of the packet starting at
2276 * that request. For TSO send requests with one ore more cuts
2277 * in the middle, this is the number of RDMAs starting
2278 * after the last cut in the request. All previous
2279 * segments before the last cut implicitly have 1 RDMA.
2281 * Since the number of RDMAs is not known beforehand,
2282 * it must be filled-in retroactively - after each
2283 * segmentation cut or at the end of the entire packet.
2287 /* Break the SKB or Fragment up into pieces which
2288 * do not cross mgp->tx.boundary */
2289 low = MYRI10GE_LOWPART_TO_U32(bus);
2290 high_swapped = htonl(MYRI10GE_HIGHPART_TO_U32(bus));
2295 if (unlikely(count == max_segments))
2296 goto abort_linearize;
2298 boundary = (low + tx->boundary) & ~(tx->boundary - 1);
2299 seglen = boundary - low;
2302 flags_next = flags & ~MXGEFW_FLAGS_FIRST;
2303 cum_len_next = cum_len + seglen;
2304 if (mss) { /* TSO */
2305 (req - rdma_count)->rdma_count = rdma_count + 1;
2307 if (likely(cum_len >= 0)) { /* payload */
2308 int next_is_first, chop;
2310 chop = (cum_len_next > mss);
2311 cum_len_next = cum_len_next % mss;
2312 next_is_first = (cum_len_next == 0);
2313 flags |= chop * MXGEFW_FLAGS_TSO_CHOP;
2314 flags_next |= next_is_first *
2316 rdma_count |= -(chop | next_is_first);
2317 rdma_count += chop & !next_is_first;
2318 } else if (likely(cum_len_next >= 0)) { /* header ends */
2324 small = (mss <= MXGEFW_SEND_SMALL_SIZE);
2325 flags_next = MXGEFW_FLAGS_TSO_PLD |
2326 MXGEFW_FLAGS_FIRST |
2327 (small * MXGEFW_FLAGS_SMALL);
2330 req->addr_high = high_swapped;
2331 req->addr_low = htonl(low);
2332 req->pseudo_hdr_offset = htons(pseudo_hdr_offset);
2333 req->pad = 0; /* complete solid 16-byte block; does this matter? */
2334 req->rdma_count = 1;
2335 req->length = htons(seglen);
2336 req->cksum_offset = cksum_offset;
2337 req->flags = flags | ((cum_len & 1) * odd_flag);
2341 cum_len = cum_len_next;
2346 if (cksum_offset != 0 && !(mss && skb_is_gso_v6(skb))) {
2347 if (unlikely(cksum_offset > seglen))
2348 cksum_offset -= seglen;
2353 if (frag_idx == frag_cnt)
2356 /* map next fragment for DMA */
2357 idx = (count + tx->req) & tx->mask;
2358 frag = &skb_shinfo(skb)->frags[frag_idx];
2361 bus = pci_map_page(mgp->pdev, frag->page, frag->page_offset,
2362 len, PCI_DMA_TODEVICE);
2363 pci_unmap_addr_set(&tx->info[idx], bus, bus);
2364 pci_unmap_len_set(&tx->info[idx], len, len);
2367 (req - rdma_count)->rdma_count = rdma_count;
2371 req->flags |= MXGEFW_FLAGS_TSO_LAST;
2372 } while (!(req->flags & (MXGEFW_FLAGS_TSO_CHOP |
2373 MXGEFW_FLAGS_FIRST)));
2374 idx = ((count - 1) + tx->req) & tx->mask;
2375 tx->info[idx].last = 1;
2376 if (tx->wc_fifo == NULL)
2377 myri10ge_submit_req(tx, tx->req_list, count);
2379 myri10ge_submit_req_wc(tx, tx->req_list, count);
2381 if ((avail - count) < MXGEFW_MAX_SEND_DESC) {
2383 netif_stop_queue(dev);
2385 dev->trans_start = jiffies;
2389 /* Free any DMA resources we've alloced and clear out the skb
2390 * slot so as to not trip up assertions, and to avoid a
2391 * double-free if linearizing fails */
2393 last_idx = (idx + 1) & tx->mask;
2394 idx = tx->req & tx->mask;
2395 tx->info[idx].skb = NULL;
2397 len = pci_unmap_len(&tx->info[idx], len);
2399 if (tx->info[idx].skb != NULL)
2400 pci_unmap_single(mgp->pdev,
2401 pci_unmap_addr(&tx->info[idx],
2405 pci_unmap_page(mgp->pdev,
2406 pci_unmap_addr(&tx->info[idx],
2409 pci_unmap_len_set(&tx->info[idx], len, 0);
2410 tx->info[idx].skb = NULL;
2412 idx = (idx + 1) & tx->mask;
2413 } while (idx != last_idx);
2414 if (skb_is_gso(skb)) {
2416 "myri10ge: %s: TSO but wanted to linearize?!?!?\n",
2421 if (skb_linearize(skb))
2424 mgp->tx_linearized++;
2428 dev_kfree_skb_any(skb);
2429 mgp->stats.tx_dropped += 1;
2434 static int myri10ge_sw_tso(struct sk_buff *skb, struct net_device *dev)
2436 struct sk_buff *segs, *curr;
2437 struct myri10ge_priv *mgp = dev->priv;
2440 segs = skb_gso_segment(skb, dev->features & ~NETIF_F_TSO6);
2448 status = myri10ge_xmit(curr, dev);
2450 dev_kfree_skb_any(curr);
2455 dev_kfree_skb_any(segs);
2460 dev_kfree_skb_any(skb);
2464 dev_kfree_skb_any(skb);
2465 mgp->stats.tx_dropped += 1;
2469 static struct net_device_stats *myri10ge_get_stats(struct net_device *dev)
2471 struct myri10ge_priv *mgp = netdev_priv(dev);
2475 static void myri10ge_set_multicast_list(struct net_device *dev)
2477 struct myri10ge_cmd cmd;
2478 struct myri10ge_priv *mgp;
2479 struct dev_mc_list *mc_list;
2480 __be32 data[2] = { 0, 0 };
2482 DECLARE_MAC_BUF(mac);
2484 mgp = netdev_priv(dev);
2485 /* can be called from atomic contexts,
2486 * pass 1 to force atomicity in myri10ge_send_cmd() */
2487 myri10ge_change_promisc(mgp, dev->flags & IFF_PROMISC, 1);
2489 /* This firmware is known to not support multicast */
2490 if (!mgp->fw_multicast_support)
2493 /* Disable multicast filtering */
2495 err = myri10ge_send_cmd(mgp, MXGEFW_ENABLE_ALLMULTI, &cmd, 1);
2497 printk(KERN_ERR "myri10ge: %s: Failed MXGEFW_ENABLE_ALLMULTI,"
2498 " error status: %d\n", dev->name, err);
2502 if ((dev->flags & IFF_ALLMULTI) || mgp->adopted_rx_filter_bug) {
2503 /* request to disable multicast filtering, so quit here */
2507 /* Flush the filters */
2509 err = myri10ge_send_cmd(mgp, MXGEFW_LEAVE_ALL_MULTICAST_GROUPS,
2513 "myri10ge: %s: Failed MXGEFW_LEAVE_ALL_MULTICAST_GROUPS"
2514 ", error status: %d\n", dev->name, err);
2518 /* Walk the multicast list, and add each address */
2519 for (mc_list = dev->mc_list; mc_list != NULL; mc_list = mc_list->next) {
2520 memcpy(data, &mc_list->dmi_addr, 6);
2521 cmd.data0 = ntohl(data[0]);
2522 cmd.data1 = ntohl(data[1]);
2523 err = myri10ge_send_cmd(mgp, MXGEFW_JOIN_MULTICAST_GROUP,
2527 printk(KERN_ERR "myri10ge: %s: Failed "
2528 "MXGEFW_JOIN_MULTICAST_GROUP, error status:"
2529 "%d\t", dev->name, err);
2530 printk(KERN_ERR "MAC %s\n",
2531 print_mac(mac, mc_list->dmi_addr));
2535 /* Enable multicast filtering */
2536 err = myri10ge_send_cmd(mgp, MXGEFW_DISABLE_ALLMULTI, &cmd, 1);
2538 printk(KERN_ERR "myri10ge: %s: Failed MXGEFW_DISABLE_ALLMULTI,"
2539 "error status: %d\n", dev->name, err);
2549 static int myri10ge_set_mac_address(struct net_device *dev, void *addr)
2551 struct sockaddr *sa = addr;
2552 struct myri10ge_priv *mgp = netdev_priv(dev);
2555 if (!is_valid_ether_addr(sa->sa_data))
2556 return -EADDRNOTAVAIL;
2558 status = myri10ge_update_mac_address(mgp, sa->sa_data);
2561 "myri10ge: %s: changing mac address failed with %d\n",
2566 /* change the dev structure */
2567 memcpy(dev->dev_addr, sa->sa_data, 6);
2571 static int myri10ge_change_mtu(struct net_device *dev, int new_mtu)
2573 struct myri10ge_priv *mgp = netdev_priv(dev);
2576 if ((new_mtu < 68) || (ETH_HLEN + new_mtu > MYRI10GE_MAX_ETHER_MTU)) {
2577 printk(KERN_ERR "myri10ge: %s: new mtu (%d) is not valid\n",
2578 dev->name, new_mtu);
2581 printk(KERN_INFO "%s: changing mtu from %d to %d\n",
2582 dev->name, dev->mtu, new_mtu);
2584 /* if we change the mtu on an active device, we must
2585 * reset the device so the firmware sees the change */
2586 myri10ge_close(dev);
2596 * Enable ECRC to align PCI-E Completion packets on an 8-byte boundary.
2597 * Only do it if the bridge is a root port since we don't want to disturb
2598 * any other device, except if forced with myri10ge_ecrc_enable > 1.
2601 static void myri10ge_enable_ecrc(struct myri10ge_priv *mgp)
2603 struct pci_dev *bridge = mgp->pdev->bus->self;
2604 struct device *dev = &mgp->pdev->dev;
2611 if (!myri10ge_ecrc_enable || !bridge)
2614 /* check that the bridge is a root port */
2615 cap = pci_find_capability(bridge, PCI_CAP_ID_EXP);
2616 pci_read_config_word(bridge, cap + PCI_CAP_FLAGS, &val);
2617 ext_type = (val & PCI_EXP_FLAGS_TYPE) >> 4;
2618 if (ext_type != PCI_EXP_TYPE_ROOT_PORT) {
2619 if (myri10ge_ecrc_enable > 1) {
2620 struct pci_dev *old_bridge = bridge;
2622 /* Walk the hierarchy up to the root port
2623 * where ECRC has to be enabled */
2625 bridge = bridge->bus->self;
2628 "Failed to find root port"
2629 " to force ECRC\n");
2633 pci_find_capability(bridge, PCI_CAP_ID_EXP);
2634 pci_read_config_word(bridge,
2635 cap + PCI_CAP_FLAGS, &val);
2636 ext_type = (val & PCI_EXP_FLAGS_TYPE) >> 4;
2637 } while (ext_type != PCI_EXP_TYPE_ROOT_PORT);
2640 "Forcing ECRC on non-root port %s"
2641 " (enabling on root port %s)\n",
2642 pci_name(old_bridge), pci_name(bridge));
2645 "Not enabling ECRC on non-root port %s\n",
2651 cap = pci_find_ext_capability(bridge, PCI_EXT_CAP_ID_ERR);
2655 ret = pci_read_config_dword(bridge, cap + PCI_ERR_CAP, &err_cap);
2657 dev_err(dev, "failed reading ext-conf-space of %s\n",
2659 dev_err(dev, "\t pci=nommconf in use? "
2660 "or buggy/incomplete/absent ACPI MCFG attr?\n");
2663 if (!(err_cap & PCI_ERR_CAP_ECRC_GENC))
2666 err_cap |= PCI_ERR_CAP_ECRC_GENE;
2667 pci_write_config_dword(bridge, cap + PCI_ERR_CAP, err_cap);
2668 dev_info(dev, "Enabled ECRC on upstream bridge %s\n", pci_name(bridge));
2672 * The Lanai Z8E PCI-E interface achieves higher Read-DMA throughput
2673 * when the PCI-E Completion packets are aligned on an 8-byte
2674 * boundary. Some PCI-E chip sets always align Completion packets; on
2675 * the ones that do not, the alignment can be enforced by enabling
2676 * ECRC generation (if supported).
2678 * When PCI-E Completion packets are not aligned, it is actually more
2679 * efficient to limit Read-DMA transactions to 2KB, rather than 4KB.
2681 * If the driver can neither enable ECRC nor verify that it has
2682 * already been enabled, then it must use a firmware image which works
2683 * around unaligned completion packets (myri10ge_ethp_z8e.dat), and it
2684 * should also ensure that it never gives the device a Read-DMA which is
2685 * larger than 2KB by setting the tx.boundary to 2KB. If ECRC is
2686 * enabled, then the driver should use the aligned (myri10ge_eth_z8e.dat)
2687 * firmware image, and set tx.boundary to 4KB.
2690 static void myri10ge_firmware_probe(struct myri10ge_priv *mgp)
2692 struct pci_dev *pdev = mgp->pdev;
2693 struct device *dev = &pdev->dev;
2696 mgp->tx.boundary = 4096;
2698 * Verify the max read request size was set to 4KB
2699 * before trying the test with 4KB.
2701 status = pcie_get_readrq(pdev);
2703 dev_err(dev, "Couldn't read max read req size: %d\n", status);
2706 if (status != 4096) {
2707 dev_warn(dev, "Max Read Request size != 4096 (%d)\n", status);
2708 mgp->tx.boundary = 2048;
2711 * load the optimized firmware (which assumes aligned PCIe
2712 * completions) in order to see if it works on this host.
2714 mgp->fw_name = myri10ge_fw_aligned;
2715 status = myri10ge_load_firmware(mgp);
2721 * Enable ECRC if possible
2723 myri10ge_enable_ecrc(mgp);
2726 * Run a DMA test which watches for unaligned completions and
2727 * aborts on the first one seen.
2730 status = myri10ge_dma_test(mgp, MXGEFW_CMD_UNALIGNED_TEST);
2732 return; /* keep the aligned firmware */
2734 if (status != -E2BIG)
2735 dev_warn(dev, "DMA test failed: %d\n", status);
2736 if (status == -ENOSYS)
2737 dev_warn(dev, "Falling back to ethp! "
2738 "Please install up to date fw\n");
2740 /* fall back to using the unaligned firmware */
2741 mgp->tx.boundary = 2048;
2742 mgp->fw_name = myri10ge_fw_unaligned;
2746 static void myri10ge_select_firmware(struct myri10ge_priv *mgp)
2748 if (myri10ge_force_firmware == 0) {
2749 int link_width, exp_cap;
2752 exp_cap = pci_find_capability(mgp->pdev, PCI_CAP_ID_EXP);
2753 pci_read_config_word(mgp->pdev, exp_cap + PCI_EXP_LNKSTA, &lnk);
2754 link_width = (lnk >> 4) & 0x3f;
2756 /* Check to see if Link is less than 8 or if the
2757 * upstream bridge is known to provide aligned
2759 if (link_width < 8) {
2760 dev_info(&mgp->pdev->dev, "PCIE x%d Link\n",
2762 mgp->tx.boundary = 4096;
2763 mgp->fw_name = myri10ge_fw_aligned;
2765 myri10ge_firmware_probe(mgp);
2768 if (myri10ge_force_firmware == 1) {
2769 dev_info(&mgp->pdev->dev,
2770 "Assuming aligned completions (forced)\n");
2771 mgp->tx.boundary = 4096;
2772 mgp->fw_name = myri10ge_fw_aligned;
2774 dev_info(&mgp->pdev->dev,
2775 "Assuming unaligned completions (forced)\n");
2776 mgp->tx.boundary = 2048;
2777 mgp->fw_name = myri10ge_fw_unaligned;
2780 if (myri10ge_fw_name != NULL) {
2781 dev_info(&mgp->pdev->dev, "overriding firmware to %s\n",
2783 mgp->fw_name = myri10ge_fw_name;
2788 static int myri10ge_suspend(struct pci_dev *pdev, pm_message_t state)
2790 struct myri10ge_priv *mgp;
2791 struct net_device *netdev;
2793 mgp = pci_get_drvdata(pdev);
2798 netif_device_detach(netdev);
2799 if (netif_running(netdev)) {
2800 printk(KERN_INFO "myri10ge: closing %s\n", netdev->name);
2802 myri10ge_close(netdev);
2805 myri10ge_dummy_rdma(mgp, 0);
2806 pci_save_state(pdev);
2807 pci_disable_device(pdev);
2809 return pci_set_power_state(pdev, pci_choose_state(pdev, state));
2812 static int myri10ge_resume(struct pci_dev *pdev)
2814 struct myri10ge_priv *mgp;
2815 struct net_device *netdev;
2819 mgp = pci_get_drvdata(pdev);
2823 pci_set_power_state(pdev, 0); /* zeros conf space as a side effect */
2824 msleep(5); /* give card time to respond */
2825 pci_read_config_word(mgp->pdev, PCI_VENDOR_ID, &vendor);
2826 if (vendor == 0xffff) {
2827 printk(KERN_ERR "myri10ge: %s: device disappeared!\n",
2832 status = pci_restore_state(pdev);
2836 status = pci_enable_device(pdev);
2838 dev_err(&pdev->dev, "failed to enable device\n");
2842 pci_set_master(pdev);
2844 myri10ge_reset(mgp);
2845 myri10ge_dummy_rdma(mgp, 1);
2847 /* Save configuration space to be restored if the
2848 * nic resets due to a parity error */
2849 pci_save_state(pdev);
2851 if (netif_running(netdev)) {
2853 status = myri10ge_open(netdev);
2856 goto abort_with_enabled;
2859 netif_device_attach(netdev);
2864 pci_disable_device(pdev);
2868 #endif /* CONFIG_PM */
2870 static u32 myri10ge_read_reboot(struct myri10ge_priv *mgp)
2872 struct pci_dev *pdev = mgp->pdev;
2873 int vs = mgp->vendor_specific_offset;
2876 /*enter read32 mode */
2877 pci_write_config_byte(pdev, vs + 0x10, 0x3);
2879 /*read REBOOT_STATUS (0xfffffff0) */
2880 pci_write_config_dword(pdev, vs + 0x18, 0xfffffff0);
2881 pci_read_config_dword(pdev, vs + 0x14, &reboot);
2886 * This watchdog is used to check whether the board has suffered
2887 * from a parity error and needs to be recovered.
2889 static void myri10ge_watchdog(struct work_struct *work)
2891 struct myri10ge_priv *mgp =
2892 container_of(work, struct myri10ge_priv, watchdog_work);
2897 mgp->watchdog_resets++;
2898 pci_read_config_word(mgp->pdev, PCI_COMMAND, &cmd);
2899 if ((cmd & PCI_COMMAND_MASTER) == 0) {
2900 /* Bus master DMA disabled? Check to see
2901 * if the card rebooted due to a parity error
2902 * For now, just report it */
2903 reboot = myri10ge_read_reboot(mgp);
2905 "myri10ge: %s: NIC rebooted (0x%x),%s resetting\n",
2906 mgp->dev->name, reboot,
2907 myri10ge_reset_recover ? " " : " not");
2908 if (myri10ge_reset_recover == 0)
2911 myri10ge_reset_recover--;
2914 * A rebooted nic will come back with config space as
2915 * it was after power was applied to PCIe bus.
2916 * Attempt to restore config space which was saved
2917 * when the driver was loaded, or the last time the
2918 * nic was resumed from power saving mode.
2920 pci_restore_state(mgp->pdev);
2922 /* save state again for accounting reasons */
2923 pci_save_state(mgp->pdev);
2926 /* if we get back -1's from our slot, perhaps somebody
2927 * powered off our card. Don't try to reset it in
2929 if (cmd == 0xffff) {
2930 pci_read_config_word(mgp->pdev, PCI_VENDOR_ID, &vendor);
2931 if (vendor == 0xffff) {
2933 "myri10ge: %s: device disappeared!\n",
2938 /* Perhaps it is a software error. Try to reset */
2940 printk(KERN_ERR "myri10ge: %s: device timeout, resetting\n",
2942 printk(KERN_INFO "myri10ge: %s: %d %d %d %d %d\n",
2943 mgp->dev->name, mgp->tx.req, mgp->tx.done,
2944 mgp->tx.pkt_start, mgp->tx.pkt_done,
2945 (int)ntohl(mgp->fw_stats->send_done_count));
2947 printk(KERN_INFO "myri10ge: %s: %d %d %d %d %d\n",
2948 mgp->dev->name, mgp->tx.req, mgp->tx.done,
2949 mgp->tx.pkt_start, mgp->tx.pkt_done,
2950 (int)ntohl(mgp->fw_stats->send_done_count));
2953 myri10ge_close(mgp->dev);
2954 status = myri10ge_load_firmware(mgp);
2956 printk(KERN_ERR "myri10ge: %s: failed to load firmware\n",
2959 myri10ge_open(mgp->dev);
2964 * We use our own timer routine rather than relying upon
2965 * netdev->tx_timeout because we have a very large hardware transmit
2966 * queue. Due to the large queue, the netdev->tx_timeout function
2967 * cannot detect a NIC with a parity error in a timely fashion if the
2968 * NIC is lightly loaded.
2970 static void myri10ge_watchdog_timer(unsigned long arg)
2972 struct myri10ge_priv *mgp;
2975 mgp = (struct myri10ge_priv *)arg;
2977 if (mgp->rx_small.watchdog_needed) {
2978 myri10ge_alloc_rx_pages(mgp, &mgp->rx_small,
2979 mgp->small_bytes + MXGEFW_PAD, 1);
2980 if (mgp->rx_small.fill_cnt - mgp->rx_small.cnt >=
2981 myri10ge_fill_thresh)
2982 mgp->rx_small.watchdog_needed = 0;
2984 if (mgp->rx_big.watchdog_needed) {
2985 myri10ge_alloc_rx_pages(mgp, &mgp->rx_big, mgp->big_bytes, 1);
2986 if (mgp->rx_big.fill_cnt - mgp->rx_big.cnt >=
2987 myri10ge_fill_thresh)
2988 mgp->rx_big.watchdog_needed = 0;
2990 rx_pause_cnt = ntohl(mgp->fw_stats->dropped_pause);
2992 if (mgp->tx.req != mgp->tx.done &&
2993 mgp->tx.done == mgp->watchdog_tx_done &&
2994 mgp->watchdog_tx_req != mgp->watchdog_tx_done) {
2995 /* nic seems like it might be stuck.. */
2996 if (rx_pause_cnt != mgp->watchdog_pause) {
2997 if (net_ratelimit())
2998 printk(KERN_WARNING "myri10ge %s:"
2999 "TX paused, check link partner\n",
3002 schedule_work(&mgp->watchdog_work);
3007 mod_timer(&mgp->watchdog_timer,
3008 jiffies + myri10ge_watchdog_timeout * HZ);
3009 mgp->watchdog_tx_done = mgp->tx.done;
3010 mgp->watchdog_tx_req = mgp->tx.req;
3011 mgp->watchdog_pause = rx_pause_cnt;
3014 static int myri10ge_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3016 struct net_device *netdev;
3017 struct myri10ge_priv *mgp;
3018 struct device *dev = &pdev->dev;
3021 int status = -ENXIO;
3024 netdev = alloc_etherdev(sizeof(*mgp));
3025 if (netdev == NULL) {
3026 dev_err(dev, "Could not allocate ethernet device\n");
3030 SET_NETDEV_DEV(netdev, &pdev->dev);
3032 mgp = netdev_priv(netdev);
3034 netif_napi_add(netdev, &mgp->napi, myri10ge_poll, myri10ge_napi_weight);
3036 mgp->csum_flag = MXGEFW_FLAGS_CKSUM;
3037 mgp->pause = myri10ge_flow_control;
3038 mgp->intr_coal_delay = myri10ge_intr_coal_delay;
3039 mgp->msg_enable = netif_msg_init(myri10ge_debug, MYRI10GE_MSG_DEFAULT);
3040 init_waitqueue_head(&mgp->down_wq);
3042 if (pci_enable_device(pdev)) {
3043 dev_err(&pdev->dev, "pci_enable_device call failed\n");
3045 goto abort_with_netdev;
3048 /* Find the vendor-specific cap so we can check
3049 * the reboot register later on */
3050 mgp->vendor_specific_offset
3051 = pci_find_capability(pdev, PCI_CAP_ID_VNDR);
3053 /* Set our max read request to 4KB */
3054 status = pcie_set_readrq(pdev, 4096);
3056 dev_err(&pdev->dev, "Error %d writing PCI_EXP_DEVCTL\n",
3058 goto abort_with_netdev;
3061 pci_set_master(pdev);
3063 status = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
3067 "64-bit pci address mask was refused, "
3069 status = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
3072 dev_err(&pdev->dev, "Error %d setting DMA mask\n", status);
3073 goto abort_with_netdev;
3075 mgp->cmd = dma_alloc_coherent(&pdev->dev, sizeof(*mgp->cmd),
3076 &mgp->cmd_bus, GFP_KERNEL);
3077 if (mgp->cmd == NULL)
3078 goto abort_with_netdev;
3080 mgp->fw_stats = dma_alloc_coherent(&pdev->dev, sizeof(*mgp->fw_stats),
3081 &mgp->fw_stats_bus, GFP_KERNEL);
3082 if (mgp->fw_stats == NULL)
3083 goto abort_with_cmd;
3085 mgp->board_span = pci_resource_len(pdev, 0);
3086 mgp->iomem_base = pci_resource_start(pdev, 0);
3088 mgp->wc_enabled = 0;
3090 mgp->mtrr = mtrr_add(mgp->iomem_base, mgp->board_span,
3091 MTRR_TYPE_WRCOMB, 1);
3093 mgp->wc_enabled = 1;
3095 /* Hack. need to get rid of these magic numbers */
3097 2 * 1024 * 1024 - (2 * (48 * 1024) + (32 * 1024)) - 0x100;
3098 if (mgp->sram_size > mgp->board_span) {
3099 dev_err(&pdev->dev, "board span %ld bytes too small\n",
3103 mgp->sram = ioremap(mgp->iomem_base, mgp->board_span);
3104 if (mgp->sram == NULL) {
3105 dev_err(&pdev->dev, "ioremap failed for %ld bytes at 0x%lx\n",
3106 mgp->board_span, mgp->iomem_base);
3110 memcpy_fromio(mgp->eeprom_strings,
3111 mgp->sram + mgp->sram_size - MYRI10GE_EEPROM_STRINGS_SIZE,
3112 MYRI10GE_EEPROM_STRINGS_SIZE);
3113 memset(mgp->eeprom_strings + MYRI10GE_EEPROM_STRINGS_SIZE - 2, 0, 2);
3114 status = myri10ge_read_mac_addr(mgp);
3116 goto abort_with_ioremap;
3118 for (i = 0; i < ETH_ALEN; i++)
3119 netdev->dev_addr[i] = mgp->mac_addr[i];
3121 /* allocate rx done ring */
3122 bytes = myri10ge_max_intr_slots * sizeof(*mgp->rx_done.entry);
3123 mgp->rx_done.entry = dma_alloc_coherent(&pdev->dev, bytes,
3124 &mgp->rx_done.bus, GFP_KERNEL);
3125 if (mgp->rx_done.entry == NULL)
3126 goto abort_with_ioremap;
3127 memset(mgp->rx_done.entry, 0, bytes);
3129 myri10ge_select_firmware(mgp);
3131 status = myri10ge_load_firmware(mgp);
3133 dev_err(&pdev->dev, "failed to load firmware\n");
3134 goto abort_with_rx_done;
3137 status = myri10ge_reset(mgp);
3139 dev_err(&pdev->dev, "failed reset\n");
3140 goto abort_with_firmware;
3143 pci_set_drvdata(pdev, mgp);
3144 if ((myri10ge_initial_mtu + ETH_HLEN) > MYRI10GE_MAX_ETHER_MTU)
3145 myri10ge_initial_mtu = MYRI10GE_MAX_ETHER_MTU - ETH_HLEN;
3146 if ((myri10ge_initial_mtu + ETH_HLEN) < 68)
3147 myri10ge_initial_mtu = 68;
3148 netdev->mtu = myri10ge_initial_mtu;
3149 netdev->open = myri10ge_open;
3150 netdev->stop = myri10ge_close;
3151 netdev->hard_start_xmit = myri10ge_xmit;
3152 netdev->get_stats = myri10ge_get_stats;
3153 netdev->base_addr = mgp->iomem_base;
3154 netdev->change_mtu = myri10ge_change_mtu;
3155 netdev->set_multicast_list = myri10ge_set_multicast_list;
3156 netdev->set_mac_address = myri10ge_set_mac_address;
3157 netdev->features = mgp->features;
3159 netdev->features |= NETIF_F_HIGHDMA;
3161 /* make sure we can get an irq, and that MSI can be
3162 * setup (if available). Also ensure netdev->irq
3163 * is set to correct value if MSI is enabled */
3164 status = myri10ge_request_irq(mgp);
3166 goto abort_with_firmware;
3167 netdev->irq = pdev->irq;
3168 myri10ge_free_irq(mgp);
3170 /* Save configuration space to be restored if the
3171 * nic resets due to a parity error */
3172 pci_save_state(pdev);
3174 /* Setup the watchdog timer */
3175 setup_timer(&mgp->watchdog_timer, myri10ge_watchdog_timer,
3176 (unsigned long)mgp);
3178 SET_ETHTOOL_OPS(netdev, &myri10ge_ethtool_ops);
3179 INIT_WORK(&mgp->watchdog_work, myri10ge_watchdog);
3180 status = register_netdev(netdev);
3182 dev_err(&pdev->dev, "register_netdev failed: %d\n", status);
3183 goto abort_with_state;
3185 dev_info(dev, "%s IRQ %d, tx bndry %d, fw %s, WC %s\n",
3186 (mgp->msi_enabled ? "MSI" : "xPIC"),
3187 netdev->irq, mgp->tx.boundary, mgp->fw_name,
3188 (mgp->wc_enabled ? "Enabled" : "Disabled"));
3193 pci_restore_state(pdev);
3195 abort_with_firmware:
3196 myri10ge_dummy_rdma(mgp, 0);
3199 bytes = myri10ge_max_intr_slots * sizeof(*mgp->rx_done.entry);
3200 dma_free_coherent(&pdev->dev, bytes,
3201 mgp->rx_done.entry, mgp->rx_done.bus);
3209 mtrr_del(mgp->mtrr, mgp->iomem_base, mgp->board_span);
3211 dma_free_coherent(&pdev->dev, sizeof(*mgp->fw_stats),
3212 mgp->fw_stats, mgp->fw_stats_bus);
3215 dma_free_coherent(&pdev->dev, sizeof(*mgp->cmd),
3216 mgp->cmd, mgp->cmd_bus);
3220 free_netdev(netdev);
3227 * Does what is necessary to shutdown one Myrinet device. Called
3228 * once for each Myrinet card by the kernel when a module is
3231 static void myri10ge_remove(struct pci_dev *pdev)
3233 struct myri10ge_priv *mgp;
3234 struct net_device *netdev;
3237 mgp = pci_get_drvdata(pdev);
3241 flush_scheduled_work();
3243 unregister_netdev(netdev);
3245 myri10ge_dummy_rdma(mgp, 0);
3247 /* avoid a memory leak */
3248 pci_restore_state(pdev);
3250 bytes = myri10ge_max_intr_slots * sizeof(*mgp->rx_done.entry);
3251 dma_free_coherent(&pdev->dev, bytes,
3252 mgp->rx_done.entry, mgp->rx_done.bus);
3258 mtrr_del(mgp->mtrr, mgp->iomem_base, mgp->board_span);
3260 dma_free_coherent(&pdev->dev, sizeof(*mgp->fw_stats),
3261 mgp->fw_stats, mgp->fw_stats_bus);
3263 dma_free_coherent(&pdev->dev, sizeof(*mgp->cmd),
3264 mgp->cmd, mgp->cmd_bus);
3266 free_netdev(netdev);
3267 pci_set_drvdata(pdev, NULL);
3270 #define PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E 0x0008
3271 #define PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E_9 0x0009
3273 static struct pci_device_id myri10ge_pci_tbl[] = {
3274 {PCI_DEVICE(PCI_VENDOR_ID_MYRICOM, PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E)},
3276 (PCI_VENDOR_ID_MYRICOM, PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E_9)},
3280 static struct pci_driver myri10ge_driver = {
3282 .probe = myri10ge_probe,
3283 .remove = myri10ge_remove,
3284 .id_table = myri10ge_pci_tbl,
3286 .suspend = myri10ge_suspend,
3287 .resume = myri10ge_resume,
3291 static __init int myri10ge_init_module(void)
3293 printk(KERN_INFO "%s: Version %s\n", myri10ge_driver.name,
3294 MYRI10GE_VERSION_STR);
3295 return pci_register_driver(&myri10ge_driver);
3298 module_init(myri10ge_init_module);
3300 static __exit void myri10ge_cleanup_module(void)
3302 pci_unregister_driver(&myri10ge_driver);
3305 module_exit(myri10ge_cleanup_module);