2 * Driver for Marvell Discovery (MV643XX) and Marvell Orion ethernet ports
3 * Copyright (C) 2002 Matthew Dharm <mdharm@momenco.com>
5 * Based on the 64360 driver from:
6 * Copyright (C) 2002 Rabeeh Khoury <rabeeh@galileo.co.il>
7 * Rabeeh Khoury <rabeeh@marvell.com>
9 * Copyright (C) 2003 PMC-Sierra, Inc.,
10 * written by Manish Lachwani
12 * Copyright (C) 2003 Ralf Baechle <ralf@linux-mips.org>
14 * Copyright (C) 2004-2006 MontaVista Software, Inc.
15 * Dale Farnsworth <dale@farnsworth.org>
17 * Copyright (C) 2004 Steven J. Hill <sjhill1@rockwellcollins.com>
18 * <sjhill@realitydiluted.com>
20 * Copyright (C) 2007-2008 Marvell Semiconductor
21 * Lennert Buytenhek <buytenh@marvell.com>
23 * This program is free software; you can redistribute it and/or
24 * modify it under the terms of the GNU General Public License
25 * as published by the Free Software Foundation; either version 2
26 * of the License, or (at your option) any later version.
28 * This program is distributed in the hope that it will be useful,
29 * but WITHOUT ANY WARRANTY; without even the implied warranty of
30 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
31 * GNU General Public License for more details.
33 * You should have received a copy of the GNU General Public License
34 * along with this program; if not, write to the Free Software
35 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
38 #include <linux/init.h>
39 #include <linux/dma-mapping.h>
41 #include <linux/tcp.h>
42 #include <linux/udp.h>
43 #include <linux/etherdevice.h>
44 #include <linux/delay.h>
45 #include <linux/ethtool.h>
46 #include <linux/platform_device.h>
47 #include <linux/module.h>
48 #include <linux/kernel.h>
49 #include <linux/spinlock.h>
50 #include <linux/workqueue.h>
51 #include <linux/mii.h>
52 #include <linux/mv643xx_eth.h>
54 #include <asm/types.h>
55 #include <asm/system.h>
57 static char mv643xx_eth_driver_name[] = "mv643xx_eth";
58 static char mv643xx_eth_driver_version[] = "1.0";
60 #define MV643XX_ETH_CHECKSUM_OFFLOAD_TX
61 #define MV643XX_ETH_NAPI
62 #define MV643XX_ETH_TX_FAST_REFILL
63 #undef MV643XX_ETH_COAL
65 #define MV643XX_ETH_TX_COAL 100
66 #ifdef MV643XX_ETH_COAL
67 #define MV643XX_ETH_RX_COAL 100
70 #ifdef MV643XX_ETH_CHECKSUM_OFFLOAD_TX
71 #define MAX_DESCS_PER_SKB (MAX_SKB_FRAGS + 1)
73 #define MAX_DESCS_PER_SKB 1
76 #define ETH_VLAN_HLEN 4
78 #define ETH_HW_IP_ALIGN 2 /* hw aligns IP header */
79 #define ETH_WRAPPER_LEN (ETH_HW_IP_ALIGN + ETH_HLEN + \
80 ETH_VLAN_HLEN + ETH_FCS_LEN)
81 #define ETH_RX_SKB_SIZE (dev->mtu + ETH_WRAPPER_LEN + \
82 dma_get_cache_alignment())
85 * Registers shared between all ports.
87 #define PHY_ADDR 0x0000
88 #define SMI_REG 0x0004
89 #define WINDOW_BASE(w) (0x0200 + ((w) << 3))
90 #define WINDOW_SIZE(w) (0x0204 + ((w) << 3))
91 #define WINDOW_REMAP_HIGH(w) (0x0280 + ((w) << 2))
92 #define WINDOW_BAR_ENABLE 0x0290
93 #define WINDOW_PROTECT(w) (0x0294 + ((w) << 4))
98 #define PORT_CONFIG(p) (0x0400 + ((p) << 10))
99 #define UNICAST_PROMISCUOUS_MODE 0x00000001
100 #define PORT_CONFIG_EXT(p) (0x0404 + ((p) << 10))
101 #define MAC_ADDR_LOW(p) (0x0414 + ((p) << 10))
102 #define MAC_ADDR_HIGH(p) (0x0418 + ((p) << 10))
103 #define SDMA_CONFIG(p) (0x041c + ((p) << 10))
104 #define PORT_SERIAL_CONTROL(p) (0x043c + ((p) << 10))
105 #define PORT_STATUS(p) (0x0444 + ((p) << 10))
106 #define TX_FIFO_EMPTY 0x00000400
107 #define TXQ_COMMAND(p) (0x0448 + ((p) << 10))
108 #define TX_BW_MTU(p) (0x0458 + ((p) << 10))
109 #define INT_CAUSE(p) (0x0460 + ((p) << 10))
110 #define INT_RX 0x00000804
111 #define INT_EXT 0x00000002
112 #define INT_CAUSE_EXT(p) (0x0464 + ((p) << 10))
113 #define INT_EXT_LINK 0x00100000
114 #define INT_EXT_PHY 0x00010000
115 #define INT_EXT_TX_ERROR_0 0x00000100
116 #define INT_EXT_TX_0 0x00000001
117 #define INT_EXT_TX 0x00000101
118 #define INT_MASK(p) (0x0468 + ((p) << 10))
119 #define INT_MASK_EXT(p) (0x046c + ((p) << 10))
120 #define TX_FIFO_URGENT_THRESHOLD(p) (0x0474 + ((p) << 10))
121 #define RXQ_CURRENT_DESC_PTR(p) (0x060c + ((p) << 10))
122 #define RXQ_COMMAND(p) (0x0680 + ((p) << 10))
123 #define TXQ_CURRENT_DESC_PTR(p) (0x06c0 + ((p) << 10))
124 #define MIB_COUNTERS(p) (0x1000 + ((p) << 7))
125 #define SPECIAL_MCAST_TABLE(p) (0x1400 + ((p) << 10))
126 #define OTHER_MCAST_TABLE(p) (0x1500 + ((p) << 10))
127 #define UNICAST_TABLE(p) (0x1600 + ((p) << 10))
131 * SDMA configuration register.
133 #define RX_BURST_SIZE_4_64BIT (2 << 1)
134 #define BLM_RX_NO_SWAP (1 << 4)
135 #define BLM_TX_NO_SWAP (1 << 5)
136 #define TX_BURST_SIZE_4_64BIT (2 << 22)
138 #if defined(__BIG_ENDIAN)
139 #define PORT_SDMA_CONFIG_DEFAULT_VALUE \
140 RX_BURST_SIZE_4_64BIT | \
141 TX_BURST_SIZE_4_64BIT
142 #elif defined(__LITTLE_ENDIAN)
143 #define PORT_SDMA_CONFIG_DEFAULT_VALUE \
144 RX_BURST_SIZE_4_64BIT | \
147 TX_BURST_SIZE_4_64BIT
149 #error One of __BIG_ENDIAN or __LITTLE_ENDIAN must be defined
154 * Port serial control register.
156 #define SET_MII_SPEED_TO_100 (1 << 24)
157 #define SET_GMII_SPEED_TO_1000 (1 << 23)
158 #define SET_FULL_DUPLEX_MODE (1 << 21)
159 #define MAX_RX_PACKET_1522BYTE (1 << 17)
160 #define MAX_RX_PACKET_9700BYTE (5 << 17)
161 #define MAX_RX_PACKET_MASK (7 << 17)
162 #define DISABLE_AUTO_NEG_SPEED_GMII (1 << 13)
163 #define DO_NOT_FORCE_LINK_FAIL (1 << 10)
164 #define SERIAL_PORT_CONTROL_RESERVED (1 << 9)
165 #define DISABLE_AUTO_NEG_FOR_FLOW_CTRL (1 << 3)
166 #define DISABLE_AUTO_NEG_FOR_DUPLEX (1 << 2)
167 #define FORCE_LINK_PASS (1 << 1)
168 #define SERIAL_PORT_ENABLE (1 << 0)
170 #define DEFAULT_RX_QUEUE_SIZE 400
171 #define DEFAULT_TX_QUEUE_SIZE 800
174 #define SMI_BUSY 0x10000000 /* 0 - Write, 1 - Read */
175 #define SMI_READ_VALID 0x08000000 /* 0 - Write, 1 - Read */
176 #define SMI_OPCODE_WRITE 0 /* Completion of Read */
177 #define SMI_OPCODE_READ 0x04000000 /* Operation is in progress */
181 typedef enum _func_ret_status {
182 ETH_OK, /* Returned as expected. */
183 ETH_ERROR, /* Fundamental error. */
184 ETH_RETRY, /* Could not process request. Try later.*/
185 ETH_END_OF_JOB, /* Ring has nothing to process. */
186 ETH_QUEUE_FULL, /* Ring resource error. */
187 ETH_QUEUE_LAST_RESOURCE /* Ring resources about to exhaust. */
193 #if defined(__BIG_ENDIAN)
195 u16 byte_cnt; /* Descriptor buffer byte count */
196 u16 buf_size; /* Buffer size */
197 u32 cmd_sts; /* Descriptor command status */
198 u32 next_desc_ptr; /* Next descriptor pointer */
199 u32 buf_ptr; /* Descriptor buffer pointer */
203 u16 byte_cnt; /* buffer byte count */
204 u16 l4i_chk; /* CPU provided TCP checksum */
205 u32 cmd_sts; /* Command/status field */
206 u32 next_desc_ptr; /* Pointer to next descriptor */
207 u32 buf_ptr; /* pointer to buffer for this descriptor*/
209 #elif defined(__LITTLE_ENDIAN)
211 u32 cmd_sts; /* Descriptor command status */
212 u16 buf_size; /* Buffer size */
213 u16 byte_cnt; /* Descriptor buffer byte count */
214 u32 buf_ptr; /* Descriptor buffer pointer */
215 u32 next_desc_ptr; /* Next descriptor pointer */
219 u32 cmd_sts; /* Command/status field */
220 u16 l4i_chk; /* CPU provided TCP checksum */
221 u16 byte_cnt; /* buffer byte count */
222 u32 buf_ptr; /* pointer to buffer for this descriptor*/
223 u32 next_desc_ptr; /* Pointer to next descriptor */
226 #error One of __BIG_ENDIAN or __LITTLE_ENDIAN must be defined
229 /* RX & TX descriptor command */
230 #define BUFFER_OWNED_BY_DMA 0x80000000
232 /* RX & TX descriptor status */
233 #define ERROR_SUMMARY 0x00000001
235 /* RX descriptor status */
236 #define LAYER_4_CHECKSUM_OK 0x40000000
237 #define RX_ENABLE_INTERRUPT 0x20000000
238 #define RX_FIRST_DESC 0x08000000
239 #define RX_LAST_DESC 0x04000000
241 /* TX descriptor command */
242 #define TX_ENABLE_INTERRUPT 0x00800000
243 #define GEN_CRC 0x00400000
244 #define TX_FIRST_DESC 0x00200000
245 #define TX_LAST_DESC 0x00100000
246 #define ZERO_PADDING 0x00080000
247 #define GEN_IP_V4_CHECKSUM 0x00040000
248 #define GEN_TCP_UDP_CHECKSUM 0x00020000
249 #define UDP_FRAME 0x00010000
251 #define TX_IHL_SHIFT 11
254 /* Unified struct for Rx and Tx operations. The user is not required to */
255 /* be familier with neither Tx nor Rx descriptors. */
257 unsigned short byte_cnt; /* Descriptor buffer byte count */
258 unsigned short l4i_chk; /* Tx CPU provided TCP Checksum */
259 unsigned int cmd_sts; /* Descriptor command status */
260 dma_addr_t buf_ptr; /* Descriptor buffer pointer */
261 struct sk_buff *return_info; /* User resource return information */
265 /* global *******************************************************************/
266 struct mv643xx_eth_shared_private {
269 /* used to protect SMI_REG, which is shared across ports */
278 /* per-port *****************************************************************/
279 struct mib_counters {
280 u64 good_octets_received;
281 u32 bad_octets_received;
282 u32 internal_mac_transmit_err;
283 u32 good_frames_received;
284 u32 bad_frames_received;
285 u32 broadcast_frames_received;
286 u32 multicast_frames_received;
287 u32 frames_64_octets;
288 u32 frames_65_to_127_octets;
289 u32 frames_128_to_255_octets;
290 u32 frames_256_to_511_octets;
291 u32 frames_512_to_1023_octets;
292 u32 frames_1024_to_max_octets;
293 u64 good_octets_sent;
294 u32 good_frames_sent;
295 u32 excessive_collision;
296 u32 multicast_frames_sent;
297 u32 broadcast_frames_sent;
298 u32 unrec_mac_control_received;
300 u32 good_fc_received;
302 u32 undersize_received;
303 u32 fragments_received;
304 u32 oversize_received;
306 u32 mac_receive_error;
312 struct mv643xx_eth_private {
313 struct mv643xx_eth_shared_private *shared;
314 int port_num; /* User Ethernet port number */
316 struct mv643xx_eth_shared_private *shared_smi;
318 u32 rx_sram_addr; /* Base address of rx sram area */
319 u32 rx_sram_size; /* Size of rx sram area */
320 u32 tx_sram_addr; /* Base address of tx sram area */
321 u32 tx_sram_size; /* Size of tx sram area */
323 int rx_resource_err; /* Rx ring resource error flag */
325 /* Tx/Rx rings managment indexes fields. For driver use */
327 /* Next available and first returning Rx resource */
328 int rx_curr_desc_q, rx_used_desc_q;
330 /* Next available and first returning Tx resource */
331 int tx_curr_desc_q, tx_used_desc_q;
333 #ifdef MV643XX_ETH_TX_FAST_REFILL
334 u32 tx_clean_threshold;
337 struct rx_desc *p_rx_desc_area;
338 dma_addr_t rx_desc_dma;
339 int rx_desc_area_size;
340 struct sk_buff **rx_skb;
342 struct tx_desc *p_tx_desc_area;
343 dma_addr_t tx_desc_dma;
344 int tx_desc_area_size;
345 struct sk_buff **tx_skb;
347 struct work_struct tx_timeout_task;
349 struct net_device *dev;
350 struct napi_struct napi;
351 struct net_device_stats stats;
352 struct mib_counters mib_counters;
354 /* Size of Tx Ring per queue */
356 /* Number of tx descriptors in use */
358 /* Size of Rx Ring per queue */
360 /* Number of rx descriptors in use */
364 * Used in case RX Ring is empty, which can be caused when
365 * system does not have resources (skb's)
367 struct timer_list timeout;
371 struct mii_if_info mii;
375 /* port register accessors **************************************************/
376 static inline u32 rdl(struct mv643xx_eth_private *mp, int offset)
378 return readl(mp->shared->base + offset);
381 static inline void wrl(struct mv643xx_eth_private *mp, int offset, u32 data)
383 writel(data, mp->shared->base + offset);
387 /* rxq/txq helper functions *************************************************/
388 static void mv643xx_eth_port_enable_rx(struct mv643xx_eth_private *mp,
391 wrl(mp, RXQ_COMMAND(mp->port_num), queues);
394 static unsigned int mv643xx_eth_port_disable_rx(struct mv643xx_eth_private *mp)
396 unsigned int port_num = mp->port_num;
399 /* Stop Rx port activity. Check port Rx activity. */
400 queues = rdl(mp, RXQ_COMMAND(port_num)) & 0xFF;
402 /* Issue stop command for active queues only */
403 wrl(mp, RXQ_COMMAND(port_num), (queues << 8));
405 /* Wait for all Rx activity to terminate. */
406 /* Check port cause register that all Rx queues are stopped */
407 while (rdl(mp, RXQ_COMMAND(port_num)) & 0xFF)
414 static void mv643xx_eth_port_enable_tx(struct mv643xx_eth_private *mp,
417 wrl(mp, TXQ_COMMAND(mp->port_num), queues);
420 static unsigned int mv643xx_eth_port_disable_tx(struct mv643xx_eth_private *mp)
422 unsigned int port_num = mp->port_num;
425 /* Stop Tx port activity. Check port Tx activity. */
426 queues = rdl(mp, TXQ_COMMAND(port_num)) & 0xFF;
428 /* Issue stop command for active queues only */
429 wrl(mp, TXQ_COMMAND(port_num), (queues << 8));
431 /* Wait for all Tx activity to terminate. */
432 /* Check port cause register that all Tx queues are stopped */
433 while (rdl(mp, TXQ_COMMAND(port_num)) & 0xFF)
436 /* Wait for Tx FIFO to empty */
437 while (rdl(mp, PORT_STATUS(port_num)) & TX_FIFO_EMPTY)
445 /* rx ***********************************************************************/
446 static void mv643xx_eth_free_completed_tx_descs(struct net_device *dev);
449 * rx_return_buff - Returns a Rx buffer back to the Rx ring.
452 * This routine returns a Rx buffer back to the Rx ring. It retrieves the
453 * next 'used' descriptor and attached the returned buffer to it.
454 * In case the Rx ring was in "resource error" condition, where there are
455 * no available Rx resources, the function resets the resource error flag.
458 * struct mv643xx_eth_private *mp Ethernet Port Control srtuct.
459 * struct pkt_info *p_pkt_info Information on returned buffer.
462 * New available Rx resource in Rx descriptor ring.
465 * ETH_ERROR in case the routine can not access Rx desc ring.
468 static FUNC_RET_STATUS rx_return_buff(struct mv643xx_eth_private *mp,
469 struct pkt_info *p_pkt_info)
471 int used_rx_desc; /* Where to return Rx resource */
472 volatile struct rx_desc *p_used_rx_desc;
475 spin_lock_irqsave(&mp->lock, flags);
477 /* Get 'used' Rx descriptor */
478 used_rx_desc = mp->rx_used_desc_q;
479 p_used_rx_desc = &mp->p_rx_desc_area[used_rx_desc];
481 p_used_rx_desc->buf_ptr = p_pkt_info->buf_ptr;
482 p_used_rx_desc->buf_size = p_pkt_info->byte_cnt;
483 mp->rx_skb[used_rx_desc] = p_pkt_info->return_info;
485 /* Flush the write pipe */
487 /* Return the descriptor to DMA ownership */
489 p_used_rx_desc->cmd_sts = BUFFER_OWNED_BY_DMA | RX_ENABLE_INTERRUPT;
492 /* Move the used descriptor pointer to the next descriptor */
493 mp->rx_used_desc_q = (used_rx_desc + 1) % mp->rx_ring_size;
495 /* Any Rx return cancels the Rx resource error status */
496 mp->rx_resource_err = 0;
498 spin_unlock_irqrestore(&mp->lock, flags);
504 * mv643xx_eth_rx_refill_descs
506 * Fills / refills RX queue on a certain gigabit ethernet port
508 * Input : pointer to ethernet interface network device structure
511 static void mv643xx_eth_rx_refill_descs(struct net_device *dev)
513 struct mv643xx_eth_private *mp = netdev_priv(dev);
514 struct pkt_info pkt_info;
518 while (mp->rx_desc_count < mp->rx_ring_size) {
519 skb = dev_alloc_skb(ETH_RX_SKB_SIZE + dma_get_cache_alignment());
523 unaligned = (u32)skb->data & (dma_get_cache_alignment() - 1);
525 skb_reserve(skb, dma_get_cache_alignment() - unaligned);
526 pkt_info.cmd_sts = RX_ENABLE_INTERRUPT;
527 pkt_info.byte_cnt = ETH_RX_SKB_SIZE;
528 pkt_info.buf_ptr = dma_map_single(NULL, skb->data,
529 ETH_RX_SKB_SIZE, DMA_FROM_DEVICE);
530 pkt_info.return_info = skb;
531 if (rx_return_buff(mp, &pkt_info) != ETH_OK) {
533 "%s: Error allocating RX Ring\n", dev->name);
536 skb_reserve(skb, ETH_HW_IP_ALIGN);
539 * If RX ring is empty of SKB, set a timer to try allocating
540 * again at a later time.
542 if (mp->rx_desc_count == 0) {
543 printk(KERN_INFO "%s: Rx ring is empty\n", dev->name);
544 mp->timeout.expires = jiffies + (HZ / 10); /* 100 mSec */
545 add_timer(&mp->timeout);
550 * mv643xx_eth_rx_refill_descs_timer_wrapper
552 * Timer routine to wake up RX queue filling task. This function is
553 * used only in case the RX queue is empty, and all alloc_skb has
554 * failed (due to out of memory event).
556 * Input : pointer to ethernet interface network device structure
559 static inline void mv643xx_eth_rx_refill_descs_timer_wrapper(unsigned long data)
561 mv643xx_eth_rx_refill_descs((struct net_device *)data);
565 * port_receive - Get received information from Rx ring.
568 * This routine returns the received data to the caller. There is no
569 * data copying during routine operation. All information is returned
570 * using pointer to packet information struct passed from the caller.
571 * If the routine exhausts Rx ring resources then the resource error flag
575 * struct mv643xx_eth_private *mp Ethernet Port Control srtuct.
576 * struct pkt_info *p_pkt_info User packet buffer.
579 * Rx ring current and used indexes are updated.
582 * ETH_ERROR in case the routine can not access Rx desc ring.
583 * ETH_QUEUE_FULL if Rx ring resources are exhausted.
584 * ETH_END_OF_JOB if there is no received data.
587 static FUNC_RET_STATUS port_receive(struct mv643xx_eth_private *mp,
588 struct pkt_info *p_pkt_info)
590 int rx_next_curr_desc, rx_curr_desc, rx_used_desc;
591 volatile struct rx_desc *p_rx_desc;
592 unsigned int command_status;
595 /* Do not process Rx ring in case of Rx ring resource error */
596 if (mp->rx_resource_err)
597 return ETH_QUEUE_FULL;
599 spin_lock_irqsave(&mp->lock, flags);
601 /* Get the Rx Desc ring 'curr and 'used' indexes */
602 rx_curr_desc = mp->rx_curr_desc_q;
603 rx_used_desc = mp->rx_used_desc_q;
605 p_rx_desc = &mp->p_rx_desc_area[rx_curr_desc];
607 /* The following parameters are used to save readings from memory */
608 command_status = p_rx_desc->cmd_sts;
611 /* Nothing to receive... */
612 if (command_status & BUFFER_OWNED_BY_DMA) {
613 spin_unlock_irqrestore(&mp->lock, flags);
614 return ETH_END_OF_JOB;
617 p_pkt_info->byte_cnt = p_rx_desc->byte_cnt - ETH_HW_IP_ALIGN;
618 p_pkt_info->cmd_sts = command_status;
619 p_pkt_info->buf_ptr = p_rx_desc->buf_ptr + ETH_HW_IP_ALIGN;
620 p_pkt_info->return_info = mp->rx_skb[rx_curr_desc];
621 p_pkt_info->l4i_chk = p_rx_desc->buf_size;
624 * Clean the return info field to indicate that the
625 * packet has been moved to the upper layers
627 mp->rx_skb[rx_curr_desc] = NULL;
629 /* Update current index in data structure */
630 rx_next_curr_desc = (rx_curr_desc + 1) % mp->rx_ring_size;
631 mp->rx_curr_desc_q = rx_next_curr_desc;
633 /* Rx descriptors exhausted. Set the Rx ring resource error flag */
634 if (rx_next_curr_desc == rx_used_desc)
635 mp->rx_resource_err = 1;
637 spin_unlock_irqrestore(&mp->lock, flags);
643 * mv643xx_eth_receive
645 * This function is forward packets that are received from the port's
646 * queues toward kernel core or FastRoute them to another interface.
648 * Input : dev - a pointer to the required interface
649 * max - maximum number to receive (0 means unlimted)
651 * Output : number of served packets
653 static int mv643xx_eth_receive_queue(struct net_device *dev, int budget)
655 struct mv643xx_eth_private *mp = netdev_priv(dev);
656 struct net_device_stats *stats = &dev->stats;
657 unsigned int received_packets = 0;
659 struct pkt_info pkt_info;
661 while (budget-- > 0 && port_receive(mp, &pkt_info) == ETH_OK) {
662 dma_unmap_single(NULL, pkt_info.buf_ptr, ETH_RX_SKB_SIZE,
669 * Note byte count includes 4 byte CRC count
672 stats->rx_bytes += pkt_info.byte_cnt;
673 skb = pkt_info.return_info;
675 * In case received a packet without first / last bits on OR
676 * the error summary bit is on, the packets needs to be dropeed.
678 if (((pkt_info.cmd_sts & (RX_FIRST_DESC | RX_LAST_DESC)) !=
679 (RX_FIRST_DESC | RX_LAST_DESC))
680 || (pkt_info.cmd_sts & ERROR_SUMMARY)) {
682 if ((pkt_info.cmd_sts & (RX_FIRST_DESC |
684 (RX_FIRST_DESC | RX_LAST_DESC)) {
687 "%s: Received packet spread "
688 "on multiple descriptors\n",
691 if (pkt_info.cmd_sts & ERROR_SUMMARY)
694 dev_kfree_skb_irq(skb);
697 * The -4 is for the CRC in the trailer of the
700 skb_put(skb, pkt_info.byte_cnt - 4);
702 if (pkt_info.cmd_sts & LAYER_4_CHECKSUM_OK) {
703 skb->ip_summed = CHECKSUM_UNNECESSARY;
705 (pkt_info.cmd_sts & 0x0007fff8) >> 3);
707 skb->protocol = eth_type_trans(skb, dev);
708 #ifdef MV643XX_ETH_NAPI
709 netif_receive_skb(skb);
714 dev->last_rx = jiffies;
716 mv643xx_eth_rx_refill_descs(dev); /* Fill RX ring with skb's */
718 return received_packets;
721 #ifdef MV643XX_ETH_NAPI
725 * This function is used in case of NAPI
727 static int mv643xx_eth_poll(struct napi_struct *napi, int budget)
729 struct mv643xx_eth_private *mp = container_of(napi, struct mv643xx_eth_private, napi);
730 struct net_device *dev = mp->dev;
731 unsigned int port_num = mp->port_num;
734 #ifdef MV643XX_ETH_TX_FAST_REFILL
735 if (++mp->tx_clean_threshold > 5) {
736 mv643xx_eth_free_completed_tx_descs(dev);
737 mp->tx_clean_threshold = 0;
742 if ((rdl(mp, RXQ_CURRENT_DESC_PTR(port_num)))
743 != (u32) mp->rx_used_desc_q)
744 work_done = mv643xx_eth_receive_queue(dev, budget);
746 if (work_done < budget) {
747 netif_rx_complete(dev, napi);
748 wrl(mp, INT_CAUSE(port_num), 0);
749 wrl(mp, INT_CAUSE_EXT(port_num), 0);
750 wrl(mp, INT_MASK(port_num), INT_RX | INT_EXT);
758 /* tx ***********************************************************************/
760 * has_tiny_unaligned_frags - check if skb has any small, unaligned fragments
762 * Hardware can't handle unaligned fragments smaller than 9 bytes.
763 * This helper function detects that case.
766 static inline unsigned int has_tiny_unaligned_frags(struct sk_buff *skb)
771 for (frag = 0; frag < skb_shinfo(skb)->nr_frags; frag++) {
772 fragp = &skb_shinfo(skb)->frags[frag];
773 if (fragp->size <= 8 && fragp->page_offset & 0x7)
780 * alloc_tx_desc_index - return the index of the next available tx desc
782 static int alloc_tx_desc_index(struct mv643xx_eth_private *mp)
786 BUG_ON(mp->tx_desc_count >= mp->tx_ring_size);
788 tx_desc_curr = mp->tx_curr_desc_q;
789 mp->tx_curr_desc_q = (tx_desc_curr + 1) % mp->tx_ring_size;
791 BUG_ON(mp->tx_curr_desc_q == mp->tx_used_desc_q);
797 * tx_fill_frag_descs - fill tx hw descriptors for an skb's fragments.
799 * Ensure the data for each fragment to be transmitted is mapped properly,
800 * then fill in descriptors in the tx hw queue.
802 static void tx_fill_frag_descs(struct mv643xx_eth_private *mp,
807 struct tx_desc *desc;
809 for (frag = 0; frag < skb_shinfo(skb)->nr_frags; frag++) {
810 skb_frag_t *this_frag = &skb_shinfo(skb)->frags[frag];
812 tx_index = alloc_tx_desc_index(mp);
813 desc = &mp->p_tx_desc_area[tx_index];
815 desc->cmd_sts = BUFFER_OWNED_BY_DMA;
816 /* Last Frag enables interrupt and frees the skb */
817 if (frag == (skb_shinfo(skb)->nr_frags - 1)) {
818 desc->cmd_sts |= ZERO_PADDING |
821 mp->tx_skb[tx_index] = skb;
823 mp->tx_skb[tx_index] = NULL;
825 desc = &mp->p_tx_desc_area[tx_index];
827 desc->byte_cnt = this_frag->size;
828 desc->buf_ptr = dma_map_page(NULL, this_frag->page,
829 this_frag->page_offset,
835 static inline __be16 sum16_as_be(__sum16 sum)
837 return (__force __be16)sum;
841 * tx_submit_descs_for_skb - submit data from an skb to the tx hw
843 * Ensure the data for an skb to be transmitted is mapped properly,
844 * then fill in descriptors in the tx hw queue and start the hardware.
846 static void tx_submit_descs_for_skb(struct mv643xx_eth_private *mp,
850 struct tx_desc *desc;
853 int nr_frags = skb_shinfo(skb)->nr_frags;
855 cmd_sts = TX_FIRST_DESC | GEN_CRC | BUFFER_OWNED_BY_DMA;
857 tx_index = alloc_tx_desc_index(mp);
858 desc = &mp->p_tx_desc_area[tx_index];
861 tx_fill_frag_descs(mp, skb);
863 length = skb_headlen(skb);
864 mp->tx_skb[tx_index] = NULL;
866 cmd_sts |= ZERO_PADDING | TX_LAST_DESC | TX_ENABLE_INTERRUPT;
868 mp->tx_skb[tx_index] = skb;
871 desc->byte_cnt = length;
872 desc->buf_ptr = dma_map_single(NULL, skb->data, length, DMA_TO_DEVICE);
874 if (skb->ip_summed == CHECKSUM_PARTIAL) {
875 BUG_ON(skb->protocol != htons(ETH_P_IP));
877 cmd_sts |= GEN_TCP_UDP_CHECKSUM |
879 ip_hdr(skb)->ihl << TX_IHL_SHIFT;
881 switch (ip_hdr(skb)->protocol) {
883 cmd_sts |= UDP_FRAME;
884 desc->l4i_chk = ntohs(sum16_as_be(udp_hdr(skb)->check));
887 desc->l4i_chk = ntohs(sum16_as_be(tcp_hdr(skb)->check));
893 /* Errata BTS #50, IHL must be 5 if no HW checksum */
894 cmd_sts |= 5 << TX_IHL_SHIFT;
898 /* ensure all other descriptors are written before first cmd_sts */
900 desc->cmd_sts = cmd_sts;
902 /* ensure all descriptors are written before poking hardware */
904 mv643xx_eth_port_enable_tx(mp, 1);
906 mp->tx_desc_count += nr_frags + 1;
910 * mv643xx_eth_start_xmit - queue an skb to the hardware for transmission
913 static int mv643xx_eth_start_xmit(struct sk_buff *skb, struct net_device *dev)
915 struct mv643xx_eth_private *mp = netdev_priv(dev);
916 struct net_device_stats *stats = &dev->stats;
919 BUG_ON(netif_queue_stopped(dev));
921 if (has_tiny_unaligned_frags(skb) && __skb_linearize(skb)) {
923 printk(KERN_DEBUG "%s: failed to linearize tiny "
924 "unaligned fragment\n", dev->name);
925 return NETDEV_TX_BUSY;
928 spin_lock_irqsave(&mp->lock, flags);
930 if (mp->tx_ring_size - mp->tx_desc_count < MAX_DESCS_PER_SKB) {
931 printk(KERN_ERR "%s: transmit with queue full\n", dev->name);
932 netif_stop_queue(dev);
933 spin_unlock_irqrestore(&mp->lock, flags);
934 return NETDEV_TX_BUSY;
937 tx_submit_descs_for_skb(mp, skb);
938 stats->tx_bytes += skb->len;
940 dev->trans_start = jiffies;
942 if (mp->tx_ring_size - mp->tx_desc_count < MAX_DESCS_PER_SKB)
943 netif_stop_queue(dev);
945 spin_unlock_irqrestore(&mp->lock, flags);
951 /* mii management interface *************************************************/
952 static int phy_addr_get(struct mv643xx_eth_private *mp);
955 * read_smi_reg - Read PHY registers
958 * This routine utilize the SMI interface to interact with the PHY in
959 * order to perform PHY register read.
962 * struct mv643xx_eth_private *mp Ethernet Port.
963 * unsigned int phy_reg PHY register address offset.
964 * unsigned int *value Register value buffer.
967 * Write the value of a specified PHY register into given buffer.
970 * false if the PHY is busy or read data is not in valid state.
974 static void read_smi_reg(struct mv643xx_eth_private *mp,
975 unsigned int phy_reg, unsigned int *value)
977 void __iomem *smi_reg = mp->shared_smi->base + SMI_REG;
978 int phy_addr = phy_addr_get(mp);
982 /* the SMI register is a shared resource */
983 spin_lock_irqsave(&mp->shared_smi->phy_lock, flags);
985 /* wait for the SMI register to become available */
986 for (i = 0; readl(smi_reg) & SMI_BUSY; i++) {
988 printk("%s: PHY busy timeout\n", mp->dev->name);
994 writel((phy_addr << 16) | (phy_reg << 21) | SMI_OPCODE_READ, smi_reg);
996 /* now wait for the data to be valid */
997 for (i = 0; !(readl(smi_reg) & SMI_READ_VALID); i++) {
999 printk("%s: PHY read timeout\n", mp->dev->name);
1005 *value = readl(smi_reg) & 0xffff;
1007 spin_unlock_irqrestore(&mp->shared_smi->phy_lock, flags);
1011 * write_smi_reg - Write to PHY registers
1014 * This routine utilize the SMI interface to interact with the PHY in
1015 * order to perform writes to PHY registers.
1018 * struct mv643xx_eth_private *mp Ethernet Port.
1019 * unsigned int phy_reg PHY register address offset.
1020 * unsigned int value Register value.
1023 * Write the given value to the specified PHY register.
1026 * false if the PHY is busy.
1030 static void write_smi_reg(struct mv643xx_eth_private *mp,
1031 unsigned int phy_reg, unsigned int value)
1033 void __iomem *smi_reg = mp->shared_smi->base + SMI_REG;
1034 int phy_addr = phy_addr_get(mp);
1035 unsigned long flags;
1038 /* the SMI register is a shared resource */
1039 spin_lock_irqsave(&mp->shared_smi->phy_lock, flags);
1041 /* wait for the SMI register to become available */
1042 for (i = 0; readl(smi_reg) & SMI_BUSY; i++) {
1044 printk("%s: PHY busy timeout\n", mp->dev->name);
1050 writel((phy_addr << 16) | (phy_reg << 21) |
1051 SMI_OPCODE_WRITE | (value & 0xffff), smi_reg);
1053 spin_unlock_irqrestore(&mp->shared_smi->phy_lock, flags);
1057 /* mib counters *************************************************************/
1059 * clear_mib_counters - Clear all MIB counters
1062 * This function clears all MIB counters of a specific ethernet port.
1063 * A read from the MIB counter will reset the counter.
1066 * struct mv643xx_eth_private *mp Ethernet Port.
1069 * After reading all MIB counters, the counters resets.
1072 * MIB counter value.
1075 static void clear_mib_counters(struct mv643xx_eth_private *mp)
1077 unsigned int port_num = mp->port_num;
1080 /* Perform dummy reads from MIB counters */
1081 for (i = 0; i < 0x80; i += 4)
1082 rdl(mp, MIB_COUNTERS(port_num) + i);
1085 static inline u32 read_mib(struct mv643xx_eth_private *mp, int offset)
1087 return rdl(mp, MIB_COUNTERS(mp->port_num) + offset);
1090 static void update_mib_counters(struct mv643xx_eth_private *mp)
1092 struct mib_counters *p = &mp->mib_counters;
1094 p->good_octets_received += read_mib(mp, 0x00);
1095 p->good_octets_received += (u64)read_mib(mp, 0x04) << 32;
1096 p->bad_octets_received += read_mib(mp, 0x08);
1097 p->internal_mac_transmit_err += read_mib(mp, 0x0c);
1098 p->good_frames_received += read_mib(mp, 0x10);
1099 p->bad_frames_received += read_mib(mp, 0x14);
1100 p->broadcast_frames_received += read_mib(mp, 0x18);
1101 p->multicast_frames_received += read_mib(mp, 0x1c);
1102 p->frames_64_octets += read_mib(mp, 0x20);
1103 p->frames_65_to_127_octets += read_mib(mp, 0x24);
1104 p->frames_128_to_255_octets += read_mib(mp, 0x28);
1105 p->frames_256_to_511_octets += read_mib(mp, 0x2c);
1106 p->frames_512_to_1023_octets += read_mib(mp, 0x30);
1107 p->frames_1024_to_max_octets += read_mib(mp, 0x34);
1108 p->good_octets_sent += read_mib(mp, 0x38);
1109 p->good_octets_sent += (u64)read_mib(mp, 0x3c) << 32;
1110 p->good_frames_sent += read_mib(mp, 0x40);
1111 p->excessive_collision += read_mib(mp, 0x44);
1112 p->multicast_frames_sent += read_mib(mp, 0x48);
1113 p->broadcast_frames_sent += read_mib(mp, 0x4c);
1114 p->unrec_mac_control_received += read_mib(mp, 0x50);
1115 p->fc_sent += read_mib(mp, 0x54);
1116 p->good_fc_received += read_mib(mp, 0x58);
1117 p->bad_fc_received += read_mib(mp, 0x5c);
1118 p->undersize_received += read_mib(mp, 0x60);
1119 p->fragments_received += read_mib(mp, 0x64);
1120 p->oversize_received += read_mib(mp, 0x68);
1121 p->jabber_received += read_mib(mp, 0x6c);
1122 p->mac_receive_error += read_mib(mp, 0x70);
1123 p->bad_crc_event += read_mib(mp, 0x74);
1124 p->collision += read_mib(mp, 0x78);
1125 p->late_collision += read_mib(mp, 0x7c);
1129 /* ethtool ******************************************************************/
1130 struct mv643xx_eth_stats {
1131 char stat_string[ETH_GSTRING_LEN];
1136 #define MV643XX_ETH_STAT(m) FIELD_SIZEOF(struct mv643xx_eth_private, m), \
1137 offsetof(struct mv643xx_eth_private, m)
1139 static const struct mv643xx_eth_stats mv643xx_eth_gstrings_stats[] = {
1140 { "rx_packets", MV643XX_ETH_STAT(stats.rx_packets) },
1141 { "tx_packets", MV643XX_ETH_STAT(stats.tx_packets) },
1142 { "rx_bytes", MV643XX_ETH_STAT(stats.rx_bytes) },
1143 { "tx_bytes", MV643XX_ETH_STAT(stats.tx_bytes) },
1144 { "rx_errors", MV643XX_ETH_STAT(stats.rx_errors) },
1145 { "tx_errors", MV643XX_ETH_STAT(stats.tx_errors) },
1146 { "rx_dropped", MV643XX_ETH_STAT(stats.rx_dropped) },
1147 { "tx_dropped", MV643XX_ETH_STAT(stats.tx_dropped) },
1148 { "good_octets_received", MV643XX_ETH_STAT(mib_counters.good_octets_received) },
1149 { "bad_octets_received", MV643XX_ETH_STAT(mib_counters.bad_octets_received) },
1150 { "internal_mac_transmit_err", MV643XX_ETH_STAT(mib_counters.internal_mac_transmit_err) },
1151 { "good_frames_received", MV643XX_ETH_STAT(mib_counters.good_frames_received) },
1152 { "bad_frames_received", MV643XX_ETH_STAT(mib_counters.bad_frames_received) },
1153 { "broadcast_frames_received", MV643XX_ETH_STAT(mib_counters.broadcast_frames_received) },
1154 { "multicast_frames_received", MV643XX_ETH_STAT(mib_counters.multicast_frames_received) },
1155 { "frames_64_octets", MV643XX_ETH_STAT(mib_counters.frames_64_octets) },
1156 { "frames_65_to_127_octets", MV643XX_ETH_STAT(mib_counters.frames_65_to_127_octets) },
1157 { "frames_128_to_255_octets", MV643XX_ETH_STAT(mib_counters.frames_128_to_255_octets) },
1158 { "frames_256_to_511_octets", MV643XX_ETH_STAT(mib_counters.frames_256_to_511_octets) },
1159 { "frames_512_to_1023_octets", MV643XX_ETH_STAT(mib_counters.frames_512_to_1023_octets) },
1160 { "frames_1024_to_max_octets", MV643XX_ETH_STAT(mib_counters.frames_1024_to_max_octets) },
1161 { "good_octets_sent", MV643XX_ETH_STAT(mib_counters.good_octets_sent) },
1162 { "good_frames_sent", MV643XX_ETH_STAT(mib_counters.good_frames_sent) },
1163 { "excessive_collision", MV643XX_ETH_STAT(mib_counters.excessive_collision) },
1164 { "multicast_frames_sent", MV643XX_ETH_STAT(mib_counters.multicast_frames_sent) },
1165 { "broadcast_frames_sent", MV643XX_ETH_STAT(mib_counters.broadcast_frames_sent) },
1166 { "unrec_mac_control_received", MV643XX_ETH_STAT(mib_counters.unrec_mac_control_received) },
1167 { "fc_sent", MV643XX_ETH_STAT(mib_counters.fc_sent) },
1168 { "good_fc_received", MV643XX_ETH_STAT(mib_counters.good_fc_received) },
1169 { "bad_fc_received", MV643XX_ETH_STAT(mib_counters.bad_fc_received) },
1170 { "undersize_received", MV643XX_ETH_STAT(mib_counters.undersize_received) },
1171 { "fragments_received", MV643XX_ETH_STAT(mib_counters.fragments_received) },
1172 { "oversize_received", MV643XX_ETH_STAT(mib_counters.oversize_received) },
1173 { "jabber_received", MV643XX_ETH_STAT(mib_counters.jabber_received) },
1174 { "mac_receive_error", MV643XX_ETH_STAT(mib_counters.mac_receive_error) },
1175 { "bad_crc_event", MV643XX_ETH_STAT(mib_counters.bad_crc_event) },
1176 { "collision", MV643XX_ETH_STAT(mib_counters.collision) },
1177 { "late_collision", MV643XX_ETH_STAT(mib_counters.late_collision) },
1180 #define MV643XX_ETH_STATS_LEN ARRAY_SIZE(mv643xx_eth_gstrings_stats)
1182 static int mv643xx_eth_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1184 struct mv643xx_eth_private *mp = netdev_priv(dev);
1187 spin_lock_irq(&mp->lock);
1188 err = mii_ethtool_gset(&mp->mii, cmd);
1189 spin_unlock_irq(&mp->lock);
1191 /* The PHY may support 1000baseT_Half, but the mv643xx does not */
1192 cmd->supported &= ~SUPPORTED_1000baseT_Half;
1193 cmd->advertising &= ~ADVERTISED_1000baseT_Half;
1198 static int mv643xx_eth_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1200 struct mv643xx_eth_private *mp = netdev_priv(dev);
1203 spin_lock_irq(&mp->lock);
1204 err = mii_ethtool_sset(&mp->mii, cmd);
1205 spin_unlock_irq(&mp->lock);
1210 static void mv643xx_eth_get_drvinfo(struct net_device *netdev,
1211 struct ethtool_drvinfo *drvinfo)
1213 strncpy(drvinfo->driver, mv643xx_eth_driver_name, 32);
1214 strncpy(drvinfo->version, mv643xx_eth_driver_version, 32);
1215 strncpy(drvinfo->fw_version, "N/A", 32);
1216 strncpy(drvinfo->bus_info, "mv643xx", 32);
1217 drvinfo->n_stats = MV643XX_ETH_STATS_LEN;
1220 static int mv643xx_eth_nway_restart(struct net_device *dev)
1222 struct mv643xx_eth_private *mp = netdev_priv(dev);
1224 return mii_nway_restart(&mp->mii);
1227 static u32 mv643xx_eth_get_link(struct net_device *dev)
1229 struct mv643xx_eth_private *mp = netdev_priv(dev);
1231 return mii_link_ok(&mp->mii);
1234 static void mv643xx_eth_get_strings(struct net_device *netdev, uint32_t stringset,
1241 for (i=0; i < MV643XX_ETH_STATS_LEN; i++) {
1242 memcpy(data + i * ETH_GSTRING_LEN,
1243 mv643xx_eth_gstrings_stats[i].stat_string,
1250 static void mv643xx_eth_get_ethtool_stats(struct net_device *netdev,
1251 struct ethtool_stats *stats, uint64_t *data)
1253 struct mv643xx_eth_private *mp = netdev->priv;
1256 update_mib_counters(mp);
1258 for (i = 0; i < MV643XX_ETH_STATS_LEN; i++) {
1259 char *p = (char *)mp+mv643xx_eth_gstrings_stats[i].stat_offset;
1260 data[i] = (mv643xx_eth_gstrings_stats[i].sizeof_stat ==
1261 sizeof(uint64_t)) ? *(uint64_t *)p : *(uint32_t *)p;
1265 static int mv643xx_eth_get_sset_count(struct net_device *netdev, int sset)
1269 return MV643XX_ETH_STATS_LEN;
1275 static const struct ethtool_ops mv643xx_eth_ethtool_ops = {
1276 .get_settings = mv643xx_eth_get_settings,
1277 .set_settings = mv643xx_eth_set_settings,
1278 .get_drvinfo = mv643xx_eth_get_drvinfo,
1279 .get_link = mv643xx_eth_get_link,
1280 .set_sg = ethtool_op_set_sg,
1281 .get_sset_count = mv643xx_eth_get_sset_count,
1282 .get_ethtool_stats = mv643xx_eth_get_ethtool_stats,
1283 .get_strings = mv643xx_eth_get_strings,
1284 .nway_reset = mv643xx_eth_nway_restart,
1288 /* address handling *********************************************************/
1290 * uc_addr_get - Read the MAC address from the port's hw registers
1292 static void uc_addr_get(struct mv643xx_eth_private *mp, unsigned char *p_addr)
1294 unsigned int port_num = mp->port_num;
1298 mac_h = rdl(mp, MAC_ADDR_HIGH(port_num));
1299 mac_l = rdl(mp, MAC_ADDR_LOW(port_num));
1301 p_addr[0] = (mac_h >> 24) & 0xff;
1302 p_addr[1] = (mac_h >> 16) & 0xff;
1303 p_addr[2] = (mac_h >> 8) & 0xff;
1304 p_addr[3] = mac_h & 0xff;
1305 p_addr[4] = (mac_l >> 8) & 0xff;
1306 p_addr[5] = mac_l & 0xff;
1310 * init_mac_tables - Clear all entrance in the UC, SMC and OMC tables
1313 * Go through all the DA filter tables (Unicast, Special Multicast &
1314 * Other Multicast) and set each entry to 0.
1317 * struct mv643xx_eth_private *mp Ethernet Port.
1320 * Multicast and Unicast packets are rejected.
1325 static void init_mac_tables(struct mv643xx_eth_private *mp)
1327 unsigned int port_num = mp->port_num;
1330 /* Clear DA filter unicast table (Ex_dFUT) */
1331 for (table_index = 0; table_index <= 0xC; table_index += 4)
1332 wrl(mp, UNICAST_TABLE(port_num) + table_index, 0);
1334 for (table_index = 0; table_index <= 0xFC; table_index += 4) {
1335 /* Clear DA filter special multicast table (Ex_dFSMT) */
1336 wrl(mp, SPECIAL_MCAST_TABLE(port_num) + table_index, 0);
1337 /* Clear DA filter other multicast table (Ex_dFOMT) */
1338 wrl(mp, OTHER_MCAST_TABLE(port_num) + table_index, 0);
1343 * The entries in each table are indexed by a hash of a packet's MAC
1344 * address. One bit in each entry determines whether the packet is
1345 * accepted. There are 4 entries (each 8 bits wide) in each register
1346 * of the table. The bits in each entry are defined as follows:
1347 * 0 Accept=1, Drop=0
1348 * 3-1 Queue (ETH_Q0=0)
1351 static void set_filter_table_entry(struct mv643xx_eth_private *mp,
1352 int table, unsigned char entry)
1354 unsigned int table_reg;
1355 unsigned int tbl_offset;
1356 unsigned int reg_offset;
1358 tbl_offset = (entry / 4) * 4; /* Register offset of DA table entry */
1359 reg_offset = entry % 4; /* Entry offset within the register */
1361 /* Set "accepts frame bit" at specified table entry */
1362 table_reg = rdl(mp, table + tbl_offset);
1363 table_reg |= 0x01 << (8 * reg_offset);
1364 wrl(mp, table + tbl_offset, table_reg);
1368 * uc_addr_set - Write a MAC address into the port's hw registers
1370 static void uc_addr_set(struct mv643xx_eth_private *mp, unsigned char *p_addr)
1372 unsigned int port_num = mp->port_num;
1377 mac_l = (p_addr[4] << 8) | (p_addr[5]);
1378 mac_h = (p_addr[0] << 24) | (p_addr[1] << 16) | (p_addr[2] << 8) |
1381 wrl(mp, MAC_ADDR_LOW(port_num), mac_l);
1382 wrl(mp, MAC_ADDR_HIGH(port_num), mac_h);
1384 /* Accept frames with this address */
1385 table = UNICAST_TABLE(port_num);
1386 set_filter_table_entry(mp, table, p_addr[5] & 0x0f);
1390 * mv643xx_eth_update_mac_address
1392 * Update the MAC address of the port in the address table
1394 * Input : pointer to ethernet interface network device structure
1397 static void mv643xx_eth_update_mac_address(struct net_device *dev)
1399 struct mv643xx_eth_private *mp = netdev_priv(dev);
1401 init_mac_tables(mp);
1402 uc_addr_set(mp, dev->dev_addr);
1406 * mv643xx_eth_set_mac_address
1408 * Change the interface's mac address.
1409 * No special hardware thing should be done because interface is always
1410 * put in promiscuous mode.
1412 * Input : pointer to ethernet interface network device structure and
1413 * a pointer to the designated entry to be added to the cache.
1414 * Output : zero upon success, negative upon failure
1416 static int mv643xx_eth_set_mac_address(struct net_device *dev, void *addr)
1420 for (i = 0; i < 6; i++)
1421 /* +2 is for the offset of the HW addr type */
1422 dev->dev_addr[i] = ((unsigned char *)addr)[i + 2];
1423 mv643xx_eth_update_mac_address(dev);
1428 * mc_addr - Multicast address settings.
1430 * The MV device supports multicast using two tables:
1431 * 1) Special Multicast Table for MAC addresses of the form
1432 * 0x01-00-5E-00-00-XX (where XX is between 0x00 and 0x_FF).
1433 * The MAC DA[7:0] bits are used as a pointer to the Special Multicast
1434 * Table entries in the DA-Filter table.
1435 * 2) Other Multicast Table for multicast of another type. A CRC-8bit
1436 * is used as an index to the Other Multicast Table entries in the
1437 * DA-Filter table. This function calculates the CRC-8bit value.
1438 * In either case, set_filter_table_entry() is then called
1439 * to set to set the actual table entry.
1441 static void mc_addr(struct mv643xx_eth_private *mp, unsigned char *p_addr)
1443 unsigned int port_num = mp->port_num;
1446 unsigned char crc_result = 0;
1452 if ((p_addr[0] == 0x01) && (p_addr[1] == 0x00) &&
1453 (p_addr[2] == 0x5E) && (p_addr[3] == 0x00) && (p_addr[4] == 0x00)) {
1454 table = SPECIAL_MCAST_TABLE(port_num);
1455 set_filter_table_entry(mp, table, p_addr[5]);
1459 /* Calculate CRC-8 out of the given address */
1460 mac_h = (p_addr[0] << 8) | (p_addr[1]);
1461 mac_l = (p_addr[2] << 24) | (p_addr[3] << 16) |
1462 (p_addr[4] << 8) | (p_addr[5] << 0);
1464 for (i = 0; i < 32; i++)
1465 mac_array[i] = (mac_l >> i) & 0x1;
1466 for (i = 32; i < 48; i++)
1467 mac_array[i] = (mac_h >> (i - 32)) & 0x1;
1469 crc[0] = mac_array[45] ^ mac_array[43] ^ mac_array[40] ^ mac_array[39] ^
1470 mac_array[35] ^ mac_array[34] ^ mac_array[31] ^ mac_array[30] ^
1471 mac_array[28] ^ mac_array[23] ^ mac_array[21] ^ mac_array[19] ^
1472 mac_array[18] ^ mac_array[16] ^ mac_array[14] ^ mac_array[12] ^
1473 mac_array[8] ^ mac_array[7] ^ mac_array[6] ^ mac_array[0];
1475 crc[1] = mac_array[46] ^ mac_array[45] ^ mac_array[44] ^ mac_array[43] ^
1476 mac_array[41] ^ mac_array[39] ^ mac_array[36] ^ mac_array[34] ^
1477 mac_array[32] ^ mac_array[30] ^ mac_array[29] ^ mac_array[28] ^
1478 mac_array[24] ^ mac_array[23] ^ mac_array[22] ^ mac_array[21] ^
1479 mac_array[20] ^ mac_array[18] ^ mac_array[17] ^ mac_array[16] ^
1480 mac_array[15] ^ mac_array[14] ^ mac_array[13] ^ mac_array[12] ^
1481 mac_array[9] ^ mac_array[6] ^ mac_array[1] ^ mac_array[0];
1483 crc[2] = mac_array[47] ^ mac_array[46] ^ mac_array[44] ^ mac_array[43] ^
1484 mac_array[42] ^ mac_array[39] ^ mac_array[37] ^ mac_array[34] ^
1485 mac_array[33] ^ mac_array[29] ^ mac_array[28] ^ mac_array[25] ^
1486 mac_array[24] ^ mac_array[22] ^ mac_array[17] ^ mac_array[15] ^
1487 mac_array[13] ^ mac_array[12] ^ mac_array[10] ^ mac_array[8] ^
1488 mac_array[6] ^ mac_array[2] ^ mac_array[1] ^ mac_array[0];
1490 crc[3] = mac_array[47] ^ mac_array[45] ^ mac_array[44] ^ mac_array[43] ^
1491 mac_array[40] ^ mac_array[38] ^ mac_array[35] ^ mac_array[34] ^
1492 mac_array[30] ^ mac_array[29] ^ mac_array[26] ^ mac_array[25] ^
1493 mac_array[23] ^ mac_array[18] ^ mac_array[16] ^ mac_array[14] ^
1494 mac_array[13] ^ mac_array[11] ^ mac_array[9] ^ mac_array[7] ^
1495 mac_array[3] ^ mac_array[2] ^ mac_array[1];
1497 crc[4] = mac_array[46] ^ mac_array[45] ^ mac_array[44] ^ mac_array[41] ^
1498 mac_array[39] ^ mac_array[36] ^ mac_array[35] ^ mac_array[31] ^
1499 mac_array[30] ^ mac_array[27] ^ mac_array[26] ^ mac_array[24] ^
1500 mac_array[19] ^ mac_array[17] ^ mac_array[15] ^ mac_array[14] ^
1501 mac_array[12] ^ mac_array[10] ^ mac_array[8] ^ mac_array[4] ^
1502 mac_array[3] ^ mac_array[2];
1504 crc[5] = mac_array[47] ^ mac_array[46] ^ mac_array[45] ^ mac_array[42] ^
1505 mac_array[40] ^ mac_array[37] ^ mac_array[36] ^ mac_array[32] ^
1506 mac_array[31] ^ mac_array[28] ^ mac_array[27] ^ mac_array[25] ^
1507 mac_array[20] ^ mac_array[18] ^ mac_array[16] ^ mac_array[15] ^
1508 mac_array[13] ^ mac_array[11] ^ mac_array[9] ^ mac_array[5] ^
1509 mac_array[4] ^ mac_array[3];
1511 crc[6] = mac_array[47] ^ mac_array[46] ^ mac_array[43] ^ mac_array[41] ^
1512 mac_array[38] ^ mac_array[37] ^ mac_array[33] ^ mac_array[32] ^
1513 mac_array[29] ^ mac_array[28] ^ mac_array[26] ^ mac_array[21] ^
1514 mac_array[19] ^ mac_array[17] ^ mac_array[16] ^ mac_array[14] ^
1515 mac_array[12] ^ mac_array[10] ^ mac_array[6] ^ mac_array[5] ^
1518 crc[7] = mac_array[47] ^ mac_array[44] ^ mac_array[42] ^ mac_array[39] ^
1519 mac_array[38] ^ mac_array[34] ^ mac_array[33] ^ mac_array[30] ^
1520 mac_array[29] ^ mac_array[27] ^ mac_array[22] ^ mac_array[20] ^
1521 mac_array[18] ^ mac_array[17] ^ mac_array[15] ^ mac_array[13] ^
1522 mac_array[11] ^ mac_array[7] ^ mac_array[6] ^ mac_array[5];
1524 for (i = 0; i < 8; i++)
1525 crc_result = crc_result | (crc[i] << i);
1527 table = OTHER_MCAST_TABLE(port_num);
1528 set_filter_table_entry(mp, table, crc_result);
1532 * Set the entire multicast list based on dev->mc_list.
1534 static void set_multicast_list(struct net_device *dev)
1537 struct dev_mc_list *mc_list;
1540 struct mv643xx_eth_private *mp = netdev_priv(dev);
1541 unsigned int port_num = mp->port_num;
1543 /* If the device is in promiscuous mode or in all multicast mode,
1544 * we will fully populate both multicast tables with accept.
1545 * This is guaranteed to yield a match on all multicast addresses...
1547 if ((dev->flags & IFF_PROMISC) || (dev->flags & IFF_ALLMULTI)) {
1548 for (table_index = 0; table_index <= 0xFC; table_index += 4) {
1549 /* Set all entries in DA filter special multicast
1551 * Set for ETH_Q0 for now
1553 * 0 Accept=1, Drop=0
1554 * 3-1 Queue ETH_Q0=0
1557 wrl(mp, SPECIAL_MCAST_TABLE(port_num) + table_index, 0x01010101);
1559 /* Set all entries in DA filter other multicast
1561 * Set for ETH_Q0 for now
1563 * 0 Accept=1, Drop=0
1564 * 3-1 Queue ETH_Q0=0
1567 wrl(mp, OTHER_MCAST_TABLE(port_num) + table_index, 0x01010101);
1572 /* We will clear out multicast tables every time we get the list.
1573 * Then add the entire new list...
1575 for (table_index = 0; table_index <= 0xFC; table_index += 4) {
1576 /* Clear DA filter special multicast table (Ex_dFSMT) */
1577 wrl(mp, SPECIAL_MCAST_TABLE(port_num) + table_index, 0);
1579 /* Clear DA filter other multicast table (Ex_dFOMT) */
1580 wrl(mp, OTHER_MCAST_TABLE(port_num) + table_index, 0);
1583 /* Get pointer to net_device multicast list and add each one... */
1584 for (i = 0, mc_list = dev->mc_list;
1585 (i < 256) && (mc_list != NULL) && (i < dev->mc_count);
1586 i++, mc_list = mc_list->next)
1587 if (mc_list->dmi_addrlen == 6)
1588 mc_addr(mp, mc_list->dmi_addr);
1592 * mv643xx_eth_set_rx_mode
1594 * Change from promiscuos to regular rx mode
1596 * Input : pointer to ethernet interface network device structure
1599 static void mv643xx_eth_set_rx_mode(struct net_device *dev)
1601 struct mv643xx_eth_private *mp = netdev_priv(dev);
1604 config_reg = rdl(mp, PORT_CONFIG(mp->port_num));
1605 if (dev->flags & IFF_PROMISC)
1606 config_reg |= UNICAST_PROMISCUOUS_MODE;
1608 config_reg &= ~UNICAST_PROMISCUOUS_MODE;
1609 wrl(mp, PORT_CONFIG(mp->port_num), config_reg);
1611 set_multicast_list(dev);
1615 /* rx/tx queue initialisation ***********************************************/
1617 * ether_init_rx_desc_ring - Curve a Rx chain desc list and buffer in memory.
1620 * This function prepares a Rx chained list of descriptors and packet
1621 * buffers in a form of a ring. The routine must be called after port
1622 * initialization routine and before port start routine.
1623 * The Ethernet SDMA engine uses CPU bus addresses to access the various
1624 * devices in the system (i.e. DRAM). This function uses the ethernet
1625 * struct 'virtual to physical' routine (set by the user) to set the ring
1626 * with physical addresses.
1629 * struct mv643xx_eth_private *mp Ethernet Port Control srtuct.
1632 * The routine updates the Ethernet port control struct with information
1633 * regarding the Rx descriptors and buffers.
1638 static void ether_init_rx_desc_ring(struct mv643xx_eth_private *mp)
1640 volatile struct rx_desc *p_rx_desc;
1641 int rx_desc_num = mp->rx_ring_size;
1644 /* initialize the next_desc_ptr links in the Rx descriptors ring */
1645 p_rx_desc = (struct rx_desc *)mp->p_rx_desc_area;
1646 for (i = 0; i < rx_desc_num; i++) {
1647 p_rx_desc[i].next_desc_ptr = mp->rx_desc_dma +
1648 ((i + 1) % rx_desc_num) * sizeof(struct rx_desc);
1651 /* Save Rx desc pointer to driver struct. */
1652 mp->rx_curr_desc_q = 0;
1653 mp->rx_used_desc_q = 0;
1655 mp->rx_desc_area_size = rx_desc_num * sizeof(struct rx_desc);
1658 static void mv643xx_eth_free_rx_rings(struct net_device *dev)
1660 struct mv643xx_eth_private *mp = netdev_priv(dev);
1663 /* Stop RX Queues */
1664 mv643xx_eth_port_disable_rx(mp);
1666 /* Free preallocated skb's on RX rings */
1667 for (curr = 0; mp->rx_desc_count && curr < mp->rx_ring_size; curr++) {
1668 if (mp->rx_skb[curr]) {
1669 dev_kfree_skb(mp->rx_skb[curr]);
1670 mp->rx_desc_count--;
1674 if (mp->rx_desc_count)
1676 "%s: Error in freeing Rx Ring. %d skb's still"
1677 " stuck in RX Ring - ignoring them\n", dev->name,
1680 if (mp->rx_sram_size)
1681 iounmap(mp->p_rx_desc_area);
1683 dma_free_coherent(NULL, mp->rx_desc_area_size,
1684 mp->p_rx_desc_area, mp->rx_desc_dma);
1688 * ether_init_tx_desc_ring - Curve a Tx chain desc list and buffer in memory.
1691 * This function prepares a Tx chained list of descriptors and packet
1692 * buffers in a form of a ring. The routine must be called after port
1693 * initialization routine and before port start routine.
1694 * The Ethernet SDMA engine uses CPU bus addresses to access the various
1695 * devices in the system (i.e. DRAM). This function uses the ethernet
1696 * struct 'virtual to physical' routine (set by the user) to set the ring
1697 * with physical addresses.
1700 * struct mv643xx_eth_private *mp Ethernet Port Control srtuct.
1703 * The routine updates the Ethernet port control struct with information
1704 * regarding the Tx descriptors and buffers.
1709 static void ether_init_tx_desc_ring(struct mv643xx_eth_private *mp)
1711 int tx_desc_num = mp->tx_ring_size;
1712 struct tx_desc *p_tx_desc;
1715 /* Initialize the next_desc_ptr links in the Tx descriptors ring */
1716 p_tx_desc = (struct tx_desc *)mp->p_tx_desc_area;
1717 for (i = 0; i < tx_desc_num; i++) {
1718 p_tx_desc[i].next_desc_ptr = mp->tx_desc_dma +
1719 ((i + 1) % tx_desc_num) * sizeof(struct tx_desc);
1722 mp->tx_curr_desc_q = 0;
1723 mp->tx_used_desc_q = 0;
1725 mp->tx_desc_area_size = tx_desc_num * sizeof(struct tx_desc);
1729 * mv643xx_eth_free_tx_descs - Free the tx desc data for completed descriptors
1731 * If force is non-zero, frees uncompleted descriptors as well
1733 static int mv643xx_eth_free_tx_descs(struct net_device *dev, int force)
1735 struct mv643xx_eth_private *mp = netdev_priv(dev);
1736 struct tx_desc *desc;
1738 struct sk_buff *skb;
1739 unsigned long flags;
1745 while (mp->tx_desc_count > 0) {
1746 spin_lock_irqsave(&mp->lock, flags);
1748 /* tx_desc_count might have changed before acquiring the lock */
1749 if (mp->tx_desc_count <= 0) {
1750 spin_unlock_irqrestore(&mp->lock, flags);
1754 tx_index = mp->tx_used_desc_q;
1755 desc = &mp->p_tx_desc_area[tx_index];
1756 cmd_sts = desc->cmd_sts;
1758 if (!force && (cmd_sts & BUFFER_OWNED_BY_DMA)) {
1759 spin_unlock_irqrestore(&mp->lock, flags);
1763 mp->tx_used_desc_q = (tx_index + 1) % mp->tx_ring_size;
1764 mp->tx_desc_count--;
1766 addr = desc->buf_ptr;
1767 count = desc->byte_cnt;
1768 skb = mp->tx_skb[tx_index];
1770 mp->tx_skb[tx_index] = NULL;
1772 if (cmd_sts & ERROR_SUMMARY) {
1773 printk("%s: Error in TX\n", dev->name);
1774 dev->stats.tx_errors++;
1777 spin_unlock_irqrestore(&mp->lock, flags);
1779 if (cmd_sts & TX_FIRST_DESC)
1780 dma_unmap_single(NULL, addr, count, DMA_TO_DEVICE);
1782 dma_unmap_page(NULL, addr, count, DMA_TO_DEVICE);
1785 dev_kfree_skb_irq(skb);
1793 static void mv643xx_eth_free_completed_tx_descs(struct net_device *dev)
1795 struct mv643xx_eth_private *mp = netdev_priv(dev);
1797 if (mv643xx_eth_free_tx_descs(dev, 0) &&
1798 mp->tx_ring_size - mp->tx_desc_count >= MAX_DESCS_PER_SKB)
1799 netif_wake_queue(dev);
1802 static void mv643xx_eth_free_all_tx_descs(struct net_device *dev)
1804 mv643xx_eth_free_tx_descs(dev, 1);
1807 static void mv643xx_eth_free_tx_rings(struct net_device *dev)
1809 struct mv643xx_eth_private *mp = netdev_priv(dev);
1811 /* Stop Tx Queues */
1812 mv643xx_eth_port_disable_tx(mp);
1814 /* Free outstanding skb's on TX ring */
1815 mv643xx_eth_free_all_tx_descs(dev);
1817 BUG_ON(mp->tx_used_desc_q != mp->tx_curr_desc_q);
1820 if (mp->tx_sram_size)
1821 iounmap(mp->p_tx_desc_area);
1823 dma_free_coherent(NULL, mp->tx_desc_area_size,
1824 mp->p_tx_desc_area, mp->tx_desc_dma);
1828 /* netdev ops and related ***************************************************/
1829 static void port_reset(struct mv643xx_eth_private *mp);
1831 /* Set the mv643xx port configuration register for the speed/duplex mode. */
1832 static void mv643xx_eth_update_pscr(struct net_device *dev,
1833 struct ethtool_cmd *ecmd)
1835 struct mv643xx_eth_private *mp = netdev_priv(dev);
1836 int port_num = mp->port_num;
1838 unsigned int queues;
1840 o_pscr = rdl(mp, PORT_SERIAL_CONTROL(port_num));
1843 /* clear speed, duplex and rx buffer size fields */
1844 n_pscr &= ~(SET_MII_SPEED_TO_100 |
1845 SET_GMII_SPEED_TO_1000 |
1846 SET_FULL_DUPLEX_MODE |
1847 MAX_RX_PACKET_MASK);
1849 if (ecmd->duplex == DUPLEX_FULL)
1850 n_pscr |= SET_FULL_DUPLEX_MODE;
1852 if (ecmd->speed == SPEED_1000)
1853 n_pscr |= SET_GMII_SPEED_TO_1000 |
1854 MAX_RX_PACKET_9700BYTE;
1856 if (ecmd->speed == SPEED_100)
1857 n_pscr |= SET_MII_SPEED_TO_100;
1858 n_pscr |= MAX_RX_PACKET_1522BYTE;
1861 if (n_pscr != o_pscr) {
1862 if ((o_pscr & SERIAL_PORT_ENABLE) == 0)
1863 wrl(mp, PORT_SERIAL_CONTROL(port_num), n_pscr);
1865 queues = mv643xx_eth_port_disable_tx(mp);
1867 o_pscr &= ~SERIAL_PORT_ENABLE;
1868 wrl(mp, PORT_SERIAL_CONTROL(port_num), o_pscr);
1869 wrl(mp, PORT_SERIAL_CONTROL(port_num), n_pscr);
1870 wrl(mp, PORT_SERIAL_CONTROL(port_num), n_pscr);
1872 mv643xx_eth_port_enable_tx(mp, queues);
1878 * mv643xx_eth_int_handler
1880 * Main interrupt handler for the gigbit ethernet ports
1882 * Input : irq - irq number (not used)
1883 * dev_id - a pointer to the required interface's data structure
1888 static irqreturn_t mv643xx_eth_int_handler(int irq, void *dev_id)
1890 struct net_device *dev = (struct net_device *)dev_id;
1891 struct mv643xx_eth_private *mp = netdev_priv(dev);
1892 u32 int_cause, int_cause_ext = 0;
1893 unsigned int port_num = mp->port_num;
1895 /* Read interrupt cause registers */
1896 int_cause = rdl(mp, INT_CAUSE(port_num)) & (INT_RX | INT_EXT);
1897 if (int_cause & INT_EXT) {
1898 int_cause_ext = rdl(mp, INT_CAUSE_EXT(port_num))
1899 & (INT_EXT_LINK | INT_EXT_PHY | INT_EXT_TX);
1900 wrl(mp, INT_CAUSE_EXT(port_num), ~int_cause_ext);
1903 /* PHY status changed */
1904 if (int_cause_ext & (INT_EXT_LINK | INT_EXT_PHY)) {
1905 struct ethtool_cmd cmd;
1907 if (mii_link_ok(&mp->mii)) {
1908 mii_ethtool_gset(&mp->mii, &cmd);
1909 mv643xx_eth_update_pscr(dev, &cmd);
1910 mv643xx_eth_port_enable_tx(mp, 1);
1911 if (!netif_carrier_ok(dev)) {
1912 netif_carrier_on(dev);
1913 if (mp->tx_ring_size - mp->tx_desc_count >=
1915 netif_wake_queue(dev);
1917 } else if (netif_carrier_ok(dev)) {
1918 netif_stop_queue(dev);
1919 netif_carrier_off(dev);
1923 #ifdef MV643XX_ETH_NAPI
1924 if (int_cause & INT_RX) {
1925 /* schedule the NAPI poll routine to maintain port */
1926 wrl(mp, INT_MASK(port_num), 0x00000000);
1928 /* wait for previous write to complete */
1929 rdl(mp, INT_MASK(port_num));
1931 netif_rx_schedule(dev, &mp->napi);
1934 if (int_cause & INT_RX)
1935 mv643xx_eth_receive_queue(dev, INT_MAX);
1937 if (int_cause_ext & INT_EXT_TX)
1938 mv643xx_eth_free_completed_tx_descs(dev);
1941 * If no real interrupt occured, exit.
1942 * This can happen when using gigE interrupt coalescing mechanism.
1944 if ((int_cause == 0x0) && (int_cause_ext == 0x0))
1951 * phy_reset - Reset Ethernet port PHY.
1954 * This routine utilizes the SMI interface to reset the ethernet port PHY.
1957 * struct mv643xx_eth_private *mp Ethernet Port.
1966 static void phy_reset(struct mv643xx_eth_private *mp)
1968 unsigned int phy_reg_data;
1971 read_smi_reg(mp, 0, &phy_reg_data);
1972 phy_reg_data |= 0x8000; /* Set bit 15 to reset the PHY */
1973 write_smi_reg(mp, 0, phy_reg_data);
1975 /* wait for PHY to come out of reset */
1978 read_smi_reg(mp, 0, &phy_reg_data);
1979 } while (phy_reg_data & 0x8000);
1983 * port_start - Start the Ethernet port activity.
1986 * This routine prepares the Ethernet port for Rx and Tx activity:
1987 * 1. Initialize Tx and Rx Current Descriptor Pointer for each queue that
1988 * has been initialized a descriptor's ring (using
1989 * ether_init_tx_desc_ring for Tx and ether_init_rx_desc_ring for Rx)
1990 * 2. Initialize and enable the Ethernet configuration port by writing to
1991 * the port's configuration and command registers.
1992 * 3. Initialize and enable the SDMA by writing to the SDMA's
1993 * configuration and command registers. After completing these steps,
1994 * the ethernet port SDMA can starts to perform Rx and Tx activities.
1996 * Note: Each Rx and Tx queue descriptor's list must be initialized prior
1997 * to calling this function (use ether_init_tx_desc_ring for Tx queues
1998 * and ether_init_rx_desc_ring for Rx queues).
2001 * dev - a pointer to the required interface
2004 * Ethernet port is ready to receive and transmit.
2009 static void port_start(struct net_device *dev)
2011 struct mv643xx_eth_private *mp = netdev_priv(dev);
2012 unsigned int port_num = mp->port_num;
2013 int tx_curr_desc, rx_curr_desc;
2015 struct ethtool_cmd ethtool_cmd;
2017 /* Assignment of Tx CTRP of given queue */
2018 tx_curr_desc = mp->tx_curr_desc_q;
2019 wrl(mp, TXQ_CURRENT_DESC_PTR(port_num),
2020 (u32)((struct tx_desc *)mp->tx_desc_dma + tx_curr_desc));
2022 /* Assignment of Rx CRDP of given queue */
2023 rx_curr_desc = mp->rx_curr_desc_q;
2024 wrl(mp, RXQ_CURRENT_DESC_PTR(port_num),
2025 (u32)((struct rx_desc *)mp->rx_desc_dma + rx_curr_desc));
2027 /* Add the assigned Ethernet address to the port's address table */
2028 uc_addr_set(mp, dev->dev_addr);
2031 * Receive all unmatched unicast, TCP, UDP, BPDU and broadcast
2032 * frames to RX queue #0.
2034 wrl(mp, PORT_CONFIG(port_num), 0x00000000);
2037 * Treat BPDUs as normal multicasts, and disable partition mode.
2039 wrl(mp, PORT_CONFIG_EXT(port_num), 0x00000000);
2041 pscr = rdl(mp, PORT_SERIAL_CONTROL(port_num));
2043 pscr &= ~(SERIAL_PORT_ENABLE | FORCE_LINK_PASS);
2044 wrl(mp, PORT_SERIAL_CONTROL(port_num), pscr);
2046 pscr |= DISABLE_AUTO_NEG_FOR_FLOW_CTRL |
2047 DISABLE_AUTO_NEG_SPEED_GMII |
2048 DISABLE_AUTO_NEG_FOR_DUPLEX |
2049 DO_NOT_FORCE_LINK_FAIL |
2050 SERIAL_PORT_CONTROL_RESERVED;
2052 wrl(mp, PORT_SERIAL_CONTROL(port_num), pscr);
2054 pscr |= SERIAL_PORT_ENABLE;
2055 wrl(mp, PORT_SERIAL_CONTROL(port_num), pscr);
2057 /* Assign port SDMA configuration */
2058 wrl(mp, SDMA_CONFIG(port_num), PORT_SDMA_CONFIG_DEFAULT_VALUE);
2060 /* Enable port Rx. */
2061 mv643xx_eth_port_enable_rx(mp, 1);
2063 /* Disable port bandwidth limits by clearing MTU register */
2064 wrl(mp, TX_BW_MTU(port_num), 0);
2066 /* save phy settings across reset */
2067 mv643xx_eth_get_settings(dev, ðtool_cmd);
2069 mv643xx_eth_set_settings(dev, ðtool_cmd);
2072 #ifdef MV643XX_ETH_COAL
2075 * set_rx_coal - Sets coalescing interrupt mechanism on RX path
2078 * This routine sets the RX coalescing interrupt mechanism parameter.
2079 * This parameter is a timeout counter, that counts in 64 t_clk
2080 * chunks ; that when timeout event occurs a maskable interrupt
2082 * The parameter is calculated using the tClk of the MV-643xx chip
2083 * , and the required delay of the interrupt in usec.
2086 * struct mv643xx_eth_private *mp Ethernet port
2087 * unsigned int delay Delay in usec
2090 * Interrupt coalescing mechanism value is set in MV-643xx chip.
2093 * The interrupt coalescing value set in the gigE port.
2096 static unsigned int set_rx_coal(struct mv643xx_eth_private *mp,
2099 unsigned int port_num = mp->port_num;
2100 unsigned int coal = ((mp->shared->t_clk / 1000000) * delay) / 64;
2102 /* Set RX Coalescing mechanism */
2103 wrl(mp, SDMA_CONFIG(port_num),
2104 ((coal & 0x3fff) << 8) |
2105 (rdl(mp, SDMA_CONFIG(port_num))
2113 * set_tx_coal - Sets coalescing interrupt mechanism on TX path
2116 * This routine sets the TX coalescing interrupt mechanism parameter.
2117 * This parameter is a timeout counter, that counts in 64 t_clk
2118 * chunks ; that when timeout event occurs a maskable interrupt
2120 * The parameter is calculated using the t_cLK frequency of the
2121 * MV-643xx chip and the required delay in the interrupt in uSec
2124 * struct mv643xx_eth_private *mp Ethernet port
2125 * unsigned int delay Delay in uSeconds
2128 * Interrupt coalescing mechanism value is set in MV-643xx chip.
2131 * The interrupt coalescing value set in the gigE port.
2134 static unsigned int set_tx_coal(struct mv643xx_eth_private *mp,
2137 unsigned int coal = ((mp->shared->t_clk / 1000000) * delay) / 64;
2139 /* Set TX Coalescing mechanism */
2140 wrl(mp, TX_FIFO_URGENT_THRESHOLD(mp->port_num), coal << 4);
2146 * port_init - Initialize the Ethernet port driver
2149 * This function prepares the ethernet port to start its activity:
2150 * 1) Completes the ethernet port driver struct initialization toward port
2152 * 2) Resets the device to a quiescent state in case of warm reboot.
2153 * 3) Enable SDMA access to all four DRAM banks as well as internal SRAM.
2154 * 4) Clean MAC tables. The reset status of those tables is unknown.
2155 * 5) Set PHY address.
2156 * Note: Call this routine prior to port_start routine and after
2157 * setting user values in the user fields of Ethernet port control
2161 * struct mv643xx_eth_private *mp Ethernet port control struct
2169 static void port_init(struct mv643xx_eth_private *mp)
2171 mp->rx_resource_err = 0;
2175 init_mac_tables(mp);
2181 * This function is called when openning the network device. The function
2182 * should initialize all the hardware, initialize cyclic Rx/Tx
2183 * descriptors chain and buffers and allocate an IRQ to the network
2186 * Input : a pointer to the network device structure
2188 * Output : zero of success , nonzero if fails.
2191 static int mv643xx_eth_open(struct net_device *dev)
2193 struct mv643xx_eth_private *mp = netdev_priv(dev);
2194 unsigned int port_num = mp->port_num;
2198 /* Clear any pending ethernet port interrupts */
2199 wrl(mp, INT_CAUSE(port_num), 0);
2200 wrl(mp, INT_CAUSE_EXT(port_num), 0);
2201 /* wait for previous write to complete */
2202 rdl(mp, INT_CAUSE_EXT(port_num));
2204 err = request_irq(dev->irq, mv643xx_eth_int_handler,
2205 IRQF_SHARED | IRQF_SAMPLE_RANDOM, dev->name, dev);
2207 printk(KERN_ERR "%s: Can not assign IRQ\n", dev->name);
2213 memset(&mp->timeout, 0, sizeof(struct timer_list));
2214 mp->timeout.function = mv643xx_eth_rx_refill_descs_timer_wrapper;
2215 mp->timeout.data = (unsigned long)dev;
2217 /* Allocate RX and TX skb rings */
2218 mp->rx_skb = kmalloc(sizeof(*mp->rx_skb) * mp->rx_ring_size,
2221 printk(KERN_ERR "%s: Cannot allocate Rx skb ring\n", dev->name);
2225 mp->tx_skb = kmalloc(sizeof(*mp->tx_skb) * mp->tx_ring_size,
2228 printk(KERN_ERR "%s: Cannot allocate Tx skb ring\n", dev->name);
2230 goto out_free_rx_skb;
2233 /* Allocate TX ring */
2234 mp->tx_desc_count = 0;
2235 size = mp->tx_ring_size * sizeof(struct tx_desc);
2236 mp->tx_desc_area_size = size;
2238 if (mp->tx_sram_size) {
2239 mp->p_tx_desc_area = ioremap(mp->tx_sram_addr,
2241 mp->tx_desc_dma = mp->tx_sram_addr;
2243 mp->p_tx_desc_area = dma_alloc_coherent(NULL, size,
2247 if (!mp->p_tx_desc_area) {
2248 printk(KERN_ERR "%s: Cannot allocate Tx Ring (size %d bytes)\n",
2251 goto out_free_tx_skb;
2253 BUG_ON((u32) mp->p_tx_desc_area & 0xf); /* check 16-byte alignment */
2254 memset((void *)mp->p_tx_desc_area, 0, mp->tx_desc_area_size);
2256 ether_init_tx_desc_ring(mp);
2258 /* Allocate RX ring */
2259 mp->rx_desc_count = 0;
2260 size = mp->rx_ring_size * sizeof(struct rx_desc);
2261 mp->rx_desc_area_size = size;
2263 if (mp->rx_sram_size) {
2264 mp->p_rx_desc_area = ioremap(mp->rx_sram_addr,
2266 mp->rx_desc_dma = mp->rx_sram_addr;
2268 mp->p_rx_desc_area = dma_alloc_coherent(NULL, size,
2272 if (!mp->p_rx_desc_area) {
2273 printk(KERN_ERR "%s: Cannot allocate Rx ring (size %d bytes)\n",
2275 printk(KERN_ERR "%s: Freeing previously allocated TX queues...",
2277 if (mp->rx_sram_size)
2278 iounmap(mp->p_tx_desc_area);
2280 dma_free_coherent(NULL, mp->tx_desc_area_size,
2281 mp->p_tx_desc_area, mp->tx_desc_dma);
2283 goto out_free_tx_skb;
2285 memset((void *)mp->p_rx_desc_area, 0, size);
2287 ether_init_rx_desc_ring(mp);
2289 mv643xx_eth_rx_refill_descs(dev); /* Fill RX ring with skb's */
2291 #ifdef MV643XX_ETH_NAPI
2292 napi_enable(&mp->napi);
2297 /* Interrupt Coalescing */
2299 #ifdef MV643XX_ETH_COAL
2300 mp->rx_int_coal = set_rx_coal(mp, MV643XX_ETH_RX_COAL);
2303 mp->tx_int_coal = set_tx_coal(mp, MV643XX_ETH_TX_COAL);
2305 /* Unmask phy and link status changes interrupts */
2306 wrl(mp, INT_MASK_EXT(port_num), INT_EXT_LINK | INT_EXT_PHY | INT_EXT_TX);
2308 /* Unmask RX buffer and TX end interrupt */
2309 wrl(mp, INT_MASK(port_num), INT_RX | INT_EXT);
2318 free_irq(dev->irq, dev);
2324 * port_reset - Reset Ethernet port
2327 * This routine resets the chip by aborting any SDMA engine activity and
2328 * clearing the MIB counters. The Receiver and the Transmit unit are in
2329 * idle state after this command is performed and the port is disabled.
2332 * struct mv643xx_eth_private *mp Ethernet Port.
2335 * Channel activity is halted.
2341 static void port_reset(struct mv643xx_eth_private *mp)
2343 unsigned int port_num = mp->port_num;
2344 unsigned int reg_data;
2346 mv643xx_eth_port_disable_tx(mp);
2347 mv643xx_eth_port_disable_rx(mp);
2349 /* Clear all MIB counters */
2350 clear_mib_counters(mp);
2352 /* Reset the Enable bit in the Configuration Register */
2353 reg_data = rdl(mp, PORT_SERIAL_CONTROL(port_num));
2354 reg_data &= ~(SERIAL_PORT_ENABLE |
2355 DO_NOT_FORCE_LINK_FAIL |
2357 wrl(mp, PORT_SERIAL_CONTROL(port_num), reg_data);
2363 * This function is used when closing the network device.
2364 * It updates the hardware,
2365 * release all memory that holds buffers and descriptors and release the IRQ.
2366 * Input : a pointer to the device structure
2367 * Output : zero if success , nonzero if fails
2370 static int mv643xx_eth_stop(struct net_device *dev)
2372 struct mv643xx_eth_private *mp = netdev_priv(dev);
2373 unsigned int port_num = mp->port_num;
2375 /* Mask all interrupts on ethernet port */
2376 wrl(mp, INT_MASK(port_num), 0x00000000);
2377 /* wait for previous write to complete */
2378 rdl(mp, INT_MASK(port_num));
2380 #ifdef MV643XX_ETH_NAPI
2381 napi_disable(&mp->napi);
2383 netif_carrier_off(dev);
2384 netif_stop_queue(dev);
2388 mv643xx_eth_free_tx_rings(dev);
2389 mv643xx_eth_free_rx_rings(dev);
2391 free_irq(dev->irq, dev);
2396 static int mv643xx_eth_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
2398 struct mv643xx_eth_private *mp = netdev_priv(dev);
2400 return generic_mii_ioctl(&mp->mii, if_mii(ifr), cmd, NULL);
2404 * Changes MTU (maximum transfer unit) of the gigabit ethenret port
2406 * Input : pointer to ethernet interface network device structure
2408 * Output : 0 upon success, -EINVAL upon failure
2410 static int mv643xx_eth_change_mtu(struct net_device *dev, int new_mtu)
2412 if ((new_mtu > 9500) || (new_mtu < 64))
2416 if (!netif_running(dev))
2420 * Stop and then re-open the interface. This will allocate RX
2421 * skbs of the new MTU.
2422 * There is a possible danger that the open will not succeed,
2423 * due to memory being full, which might fail the open function.
2425 mv643xx_eth_stop(dev);
2426 if (mv643xx_eth_open(dev)) {
2427 printk(KERN_ERR "%s: Fatal error on opening device\n",
2435 * mv643xx_eth_tx_timeout_task
2437 * Actual routine to reset the adapter when a timeout on Tx has occurred
2439 static void mv643xx_eth_tx_timeout_task(struct work_struct *ugly)
2441 struct mv643xx_eth_private *mp = container_of(ugly, struct mv643xx_eth_private,
2443 struct net_device *dev = mp->dev;
2445 if (!netif_running(dev))
2448 netif_stop_queue(dev);
2453 if (mp->tx_ring_size - mp->tx_desc_count >= MAX_DESCS_PER_SKB)
2454 netif_wake_queue(dev);
2458 * mv643xx_eth_tx_timeout
2460 * Called upon a timeout on transmitting a packet
2462 * Input : pointer to ethernet interface network device structure.
2465 static void mv643xx_eth_tx_timeout(struct net_device *dev)
2467 struct mv643xx_eth_private *mp = netdev_priv(dev);
2469 printk(KERN_INFO "%s: TX timeout ", dev->name);
2471 /* Do the reset outside of interrupt context */
2472 schedule_work(&mp->tx_timeout_task);
2475 #ifdef CONFIG_NET_POLL_CONTROLLER
2476 static void mv643xx_eth_netpoll(struct net_device *netdev)
2478 struct mv643xx_eth_private *mp = netdev_priv(netdev);
2479 int port_num = mp->port_num;
2481 wrl(mp, INT_MASK(port_num), 0x00000000);
2482 /* wait for previous write to complete */
2483 rdl(mp, INT_MASK(port_num));
2485 mv643xx_eth_int_handler(netdev->irq, netdev);
2487 wrl(mp, INT_MASK(port_num), INT_RX | INT_CAUSE_EXT);
2492 * Wrappers for MII support library.
2494 static int mv643xx_eth_mdio_read(struct net_device *dev, int phy_id, int location)
2496 struct mv643xx_eth_private *mp = netdev_priv(dev);
2499 read_smi_reg(mp, location, &val);
2503 static void mv643xx_eth_mdio_write(struct net_device *dev, int phy_id, int location, int val)
2505 struct mv643xx_eth_private *mp = netdev_priv(dev);
2506 write_smi_reg(mp, location, val);
2510 /* platform glue ************************************************************/
2512 mv643xx_eth_conf_mbus_windows(struct mv643xx_eth_shared_private *msp,
2513 struct mbus_dram_target_info *dram)
2515 void __iomem *base = msp->base;
2520 for (i = 0; i < 6; i++) {
2521 writel(0, base + WINDOW_BASE(i));
2522 writel(0, base + WINDOW_SIZE(i));
2524 writel(0, base + WINDOW_REMAP_HIGH(i));
2530 for (i = 0; i < dram->num_cs; i++) {
2531 struct mbus_dram_window *cs = dram->cs + i;
2533 writel((cs->base & 0xffff0000) |
2534 (cs->mbus_attr << 8) |
2535 dram->mbus_dram_target_id, base + WINDOW_BASE(i));
2536 writel((cs->size - 1) & 0xffff0000, base + WINDOW_SIZE(i));
2538 win_enable &= ~(1 << i);
2539 win_protect |= 3 << (2 * i);
2542 writel(win_enable, base + WINDOW_BAR_ENABLE);
2543 msp->win_protect = win_protect;
2546 static int mv643xx_eth_shared_probe(struct platform_device *pdev)
2548 static int mv643xx_eth_version_printed = 0;
2549 struct mv643xx_eth_shared_platform_data *pd = pdev->dev.platform_data;
2550 struct mv643xx_eth_shared_private *msp;
2551 struct resource *res;
2554 if (!mv643xx_eth_version_printed++)
2555 printk(KERN_NOTICE "MV-643xx 10/100/1000 Ethernet Driver\n");
2558 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2563 msp = kmalloc(sizeof(*msp), GFP_KERNEL);
2566 memset(msp, 0, sizeof(*msp));
2568 msp->base = ioremap(res->start, res->end - res->start + 1);
2569 if (msp->base == NULL)
2572 spin_lock_init(&msp->phy_lock);
2573 msp->t_clk = (pd != NULL && pd->t_clk != 0) ? pd->t_clk : 133000000;
2575 platform_set_drvdata(pdev, msp);
2578 * (Re-)program MBUS remapping windows if we are asked to.
2580 if (pd != NULL && pd->dram != NULL)
2581 mv643xx_eth_conf_mbus_windows(msp, pd->dram);
2591 static int mv643xx_eth_shared_remove(struct platform_device *pdev)
2593 struct mv643xx_eth_shared_private *msp = platform_get_drvdata(pdev);
2601 static struct platform_driver mv643xx_eth_shared_driver = {
2602 .probe = mv643xx_eth_shared_probe,
2603 .remove = mv643xx_eth_shared_remove,
2605 .name = MV643XX_ETH_SHARED_NAME,
2606 .owner = THIS_MODULE,
2611 * phy_addr_set - Set the ethernet port PHY address.
2614 * This routine sets the given ethernet port PHY address.
2617 * struct mv643xx_eth_private *mp Ethernet Port.
2618 * int phy_addr PHY address.
2627 static void phy_addr_set(struct mv643xx_eth_private *mp, int phy_addr)
2630 int addr_shift = 5 * mp->port_num;
2632 reg_data = rdl(mp, PHY_ADDR);
2633 reg_data &= ~(0x1f << addr_shift);
2634 reg_data |= (phy_addr & 0x1f) << addr_shift;
2635 wrl(mp, PHY_ADDR, reg_data);
2639 * phy_addr_get - Get the ethernet port PHY address.
2642 * This routine returns the given ethernet port PHY address.
2645 * struct mv643xx_eth_private *mp Ethernet Port.
2654 static int phy_addr_get(struct mv643xx_eth_private *mp)
2656 unsigned int reg_data;
2658 reg_data = rdl(mp, PHY_ADDR);
2660 return ((reg_data >> (5 * mp->port_num)) & 0x1f);
2664 * phy_detect - Detect whether a phy is present
2667 * This function tests whether there is a PHY present on
2668 * the specified port.
2671 * struct mv643xx_eth_private *mp Ethernet Port.
2678 * -ENODEV on failure
2681 static int phy_detect(struct mv643xx_eth_private *mp)
2683 unsigned int phy_reg_data0;
2686 read_smi_reg(mp, 0, &phy_reg_data0);
2687 auto_neg = phy_reg_data0 & 0x1000;
2688 phy_reg_data0 ^= 0x1000; /* invert auto_neg */
2689 write_smi_reg(mp, 0, phy_reg_data0);
2691 read_smi_reg(mp, 0, &phy_reg_data0);
2692 if ((phy_reg_data0 & 0x1000) == auto_neg)
2693 return -ENODEV; /* change didn't take */
2695 phy_reg_data0 ^= 0x1000;
2696 write_smi_reg(mp, 0, phy_reg_data0);
2700 static void mv643xx_init_ethtool_cmd(struct net_device *dev, int phy_address,
2701 int speed, int duplex,
2702 struct ethtool_cmd *cmd)
2704 struct mv643xx_eth_private *mp = netdev_priv(dev);
2706 memset(cmd, 0, sizeof(*cmd));
2708 cmd->port = PORT_MII;
2709 cmd->transceiver = XCVR_INTERNAL;
2710 cmd->phy_address = phy_address;
2713 cmd->autoneg = AUTONEG_ENABLE;
2714 /* mii lib checks, but doesn't use speed on AUTONEG_ENABLE */
2715 cmd->speed = SPEED_100;
2716 cmd->advertising = ADVERTISED_10baseT_Half |
2717 ADVERTISED_10baseT_Full |
2718 ADVERTISED_100baseT_Half |
2719 ADVERTISED_100baseT_Full;
2720 if (mp->mii.supports_gmii)
2721 cmd->advertising |= ADVERTISED_1000baseT_Full;
2723 cmd->autoneg = AUTONEG_DISABLE;
2725 cmd->duplex = duplex;
2732 * First function called after registering the network device.
2733 * It's purpose is to initialize the device as an ethernet device,
2734 * fill the ethernet device structure with pointers * to functions,
2735 * and set the MAC address of the interface
2737 * Input : struct device *
2738 * Output : -ENOMEM if failed , 0 if success
2740 static int mv643xx_eth_probe(struct platform_device *pdev)
2742 struct mv643xx_eth_platform_data *pd;
2744 struct mv643xx_eth_private *mp;
2745 struct net_device *dev;
2747 struct resource *res;
2749 struct ethtool_cmd cmd;
2750 int duplex = DUPLEX_HALF;
2751 int speed = 0; /* default to auto-negotiation */
2752 DECLARE_MAC_BUF(mac);
2754 pd = pdev->dev.platform_data;
2756 printk(KERN_ERR "No mv643xx_eth_platform_data\n");
2760 if (pd->shared == NULL) {
2761 printk(KERN_ERR "No mv643xx_eth_platform_data->shared\n");
2765 dev = alloc_etherdev(sizeof(struct mv643xx_eth_private));
2769 platform_set_drvdata(pdev, dev);
2771 mp = netdev_priv(dev);
2773 #ifdef MV643XX_ETH_NAPI
2774 netif_napi_add(dev, &mp->napi, mv643xx_eth_poll, 64);
2777 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
2779 dev->irq = res->start;
2781 dev->open = mv643xx_eth_open;
2782 dev->stop = mv643xx_eth_stop;
2783 dev->hard_start_xmit = mv643xx_eth_start_xmit;
2784 dev->set_mac_address = mv643xx_eth_set_mac_address;
2785 dev->set_multicast_list = mv643xx_eth_set_rx_mode;
2787 /* No need to Tx Timeout */
2788 dev->tx_timeout = mv643xx_eth_tx_timeout;
2790 #ifdef CONFIG_NET_POLL_CONTROLLER
2791 dev->poll_controller = mv643xx_eth_netpoll;
2794 dev->watchdog_timeo = 2 * HZ;
2796 dev->change_mtu = mv643xx_eth_change_mtu;
2797 dev->do_ioctl = mv643xx_eth_do_ioctl;
2798 SET_ETHTOOL_OPS(dev, &mv643xx_eth_ethtool_ops);
2800 #ifdef MV643XX_ETH_CHECKSUM_OFFLOAD_TX
2801 #ifdef MAX_SKB_FRAGS
2803 * Zero copy can only work if we use Discovery II memory. Else, we will
2804 * have to map the buffers to ISA memory which is only 16 MB
2806 dev->features = NETIF_F_SG | NETIF_F_IP_CSUM;
2810 /* Configure the timeout task */
2811 INIT_WORK(&mp->tx_timeout_task, mv643xx_eth_tx_timeout_task);
2813 spin_lock_init(&mp->lock);
2815 mp->shared = platform_get_drvdata(pd->shared);
2816 port_num = mp->port_num = pd->port_number;
2818 if (mp->shared->win_protect)
2819 wrl(mp, WINDOW_PROTECT(port_num), mp->shared->win_protect);
2821 mp->shared_smi = mp->shared;
2822 if (pd->shared_smi != NULL)
2823 mp->shared_smi = platform_get_drvdata(pd->shared_smi);
2825 /* set default config values */
2826 uc_addr_get(mp, dev->dev_addr);
2827 mp->rx_ring_size = DEFAULT_RX_QUEUE_SIZE;
2828 mp->tx_ring_size = DEFAULT_TX_QUEUE_SIZE;
2830 if (is_valid_ether_addr(pd->mac_addr))
2831 memcpy(dev->dev_addr, pd->mac_addr, 6);
2833 if (pd->phy_addr || pd->force_phy_addr)
2834 phy_addr_set(mp, pd->phy_addr);
2836 if (pd->rx_queue_size)
2837 mp->rx_ring_size = pd->rx_queue_size;
2839 if (pd->tx_queue_size)
2840 mp->tx_ring_size = pd->tx_queue_size;
2842 if (pd->tx_sram_size) {
2843 mp->tx_sram_size = pd->tx_sram_size;
2844 mp->tx_sram_addr = pd->tx_sram_addr;
2847 if (pd->rx_sram_size) {
2848 mp->rx_sram_size = pd->rx_sram_size;
2849 mp->rx_sram_addr = pd->rx_sram_addr;
2852 duplex = pd->duplex;
2855 /* Hook up MII support for ethtool */
2857 mp->mii.mdio_read = mv643xx_eth_mdio_read;
2858 mp->mii.mdio_write = mv643xx_eth_mdio_write;
2859 mp->mii.phy_id = phy_addr_get(mp);
2860 mp->mii.phy_id_mask = 0x3f;
2861 mp->mii.reg_num_mask = 0x1f;
2863 err = phy_detect(mp);
2865 pr_debug("%s: No PHY detected at addr %d\n",
2866 dev->name, phy_addr_get(mp));
2871 mp->mii.supports_gmii = mii_check_gmii_support(&mp->mii);
2872 mv643xx_init_ethtool_cmd(dev, mp->mii.phy_id, speed, duplex, &cmd);
2873 mv643xx_eth_update_pscr(dev, &cmd);
2874 mv643xx_eth_set_settings(dev, &cmd);
2876 SET_NETDEV_DEV(dev, &pdev->dev);
2877 err = register_netdev(dev);
2883 "%s: port %d with MAC address %s\n",
2884 dev->name, port_num, print_mac(mac, p));
2886 if (dev->features & NETIF_F_SG)
2887 printk(KERN_NOTICE "%s: Scatter Gather Enabled\n", dev->name);
2889 if (dev->features & NETIF_F_IP_CSUM)
2890 printk(KERN_NOTICE "%s: TX TCP/IP Checksumming Supported\n",
2893 #ifdef MV643XX_ETH_CHECKSUM_OFFLOAD_TX
2894 printk(KERN_NOTICE "%s: RX TCP/UDP Checksum Offload ON \n", dev->name);
2897 #ifdef MV643XX_ETH_COAL
2898 printk(KERN_NOTICE "%s: TX and RX Interrupt Coalescing ON \n",
2902 #ifdef MV643XX_ETH_NAPI
2903 printk(KERN_NOTICE "%s: RX NAPI Enabled \n", dev->name);
2906 if (mp->tx_sram_size > 0)
2907 printk(KERN_NOTICE "%s: Using SRAM\n", dev->name);
2917 static int mv643xx_eth_remove(struct platform_device *pdev)
2919 struct net_device *dev = platform_get_drvdata(pdev);
2921 unregister_netdev(dev);
2922 flush_scheduled_work();
2925 platform_set_drvdata(pdev, NULL);
2929 static void mv643xx_eth_shutdown(struct platform_device *pdev)
2931 struct net_device *dev = platform_get_drvdata(pdev);
2932 struct mv643xx_eth_private *mp = netdev_priv(dev);
2933 unsigned int port_num = mp->port_num;
2935 /* Mask all interrupts on ethernet port */
2936 wrl(mp, INT_MASK(port_num), 0);
2937 rdl(mp, INT_MASK(port_num));
2942 static struct platform_driver mv643xx_eth_driver = {
2943 .probe = mv643xx_eth_probe,
2944 .remove = mv643xx_eth_remove,
2945 .shutdown = mv643xx_eth_shutdown,
2947 .name = MV643XX_ETH_NAME,
2948 .owner = THIS_MODULE,
2953 * mv643xx_eth_init_module
2955 * Registers the network drivers into the Linux kernel
2961 static int __init mv643xx_eth_init_module(void)
2965 rc = platform_driver_register(&mv643xx_eth_shared_driver);
2967 rc = platform_driver_register(&mv643xx_eth_driver);
2969 platform_driver_unregister(&mv643xx_eth_shared_driver);
2975 * mv643xx_eth_cleanup_module
2977 * Registers the network drivers into the Linux kernel
2983 static void __exit mv643xx_eth_cleanup_module(void)
2985 platform_driver_unregister(&mv643xx_eth_driver);
2986 platform_driver_unregister(&mv643xx_eth_shared_driver);
2989 module_init(mv643xx_eth_init_module);
2990 module_exit(mv643xx_eth_cleanup_module);
2992 MODULE_LICENSE("GPL");
2993 MODULE_AUTHOR( "Rabeeh Khoury, Assaf Hoffman, Matthew Dharm, Manish Lachwani"
2994 " and Dale Farnsworth");
2995 MODULE_DESCRIPTION("Ethernet driver for Marvell MV643XX");
2996 MODULE_ALIAS("platform:" MV643XX_ETH_NAME);
2997 MODULE_ALIAS("platform:" MV643XX_ETH_SHARED_NAME);