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   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2007 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   Linux NICS <linux.nics@intel.com>
  24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  26
  27 *******************************************************************************/
  28
  29 #include <linux/types.h>
  30 #include <linux/module.h>
  31 #include <linux/pci.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/string.h>
  35 #include <linux/in.h>
  36 #include <linux/ip.h>
  37 #include <linux/tcp.h>
  38 #include <linux/ipv6.h>
  39 #include <net/checksum.h>
  40 #include <net/ip6_checksum.h>
  41 #include <linux/ethtool.h>
  42 #include <linux/if_vlan.h>
  43
  44 #include "ixgbe.h"
  45 #include "ixgbe_common.h"
  46
  47 char ixgbe_driver_name[] = "ixgbe";
  48 static const char ixgbe_driver_string[] =
  49         "Intel(R) 10 Gigabit PCI Express Network Driver";
  50
  51 #define DRV_VERSION "1.3.18-k4"
  52 const char ixgbe_driver_version[] = DRV_VERSION;
  53 static const char ixgbe_copyright[] =
  54          "Copyright (c) 1999-2007 Intel Corporation.";
  55
  56 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  57         [board_82598]                   = &ixgbe_82598_info,
  58 };
  59
  60 /* ixgbe_pci_tbl - PCI Device ID Table
  61  *
  62  * Wildcard entries (PCI_ANY_ID) should come last
  63  * Last entry must be all 0s
  64  *
  65  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  66  *   Class, Class Mask, private data (not used) }
  67  */
  68 static struct pci_device_id ixgbe_pci_tbl[] = {
  69         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT),
  70          board_82598 },
  71         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT),
  72          board_82598 },
  73         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4),
  74          board_82598 },
  75         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT),
  76          board_82598 },
  77
  78         /* required last entry */
  79         {0, }
  80 };
  81 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
  82
  83 #ifdef CONFIG_DCA
  84 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
  85                             void *p);
  86 static struct notifier_block dca_notifier = {
  87         .notifier_call = ixgbe_notify_dca,
  88         .next          = NULL,
  89         .priority      = 0
  90 };
  91 #endif
  92
  93 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  94 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
  95 MODULE_LICENSE("GPL");
  96 MODULE_VERSION(DRV_VERSION);
  97
  98 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
  99
 100 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 101 {
 102         u32 ctrl_ext;
 103
 104         /* Let firmware take over control of h/w */
 105         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 106         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 107                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 108 }
 109
 110 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 111 {
 112         u32 ctrl_ext;
 113
 114         /* Let firmware know the driver has taken over */
 115         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 116         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 117                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 118 }
 119
 120 #ifdef DEBUG
 121 /**
 122  * ixgbe_get_hw_dev_name - return device name string
 123  * used by hardware layer to print debugging information
 124  **/
 125 char *ixgbe_get_hw_dev_name(struct ixgbe_hw *hw)
 126 {
 127         struct ixgbe_adapter *adapter = hw->back;
 128         struct net_device *netdev = adapter->netdev;
 129         return netdev->name;
 130 }
 131 #endif
 132
 133 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, u16 int_alloc_entry,
 134                            u8 msix_vector)
 135 {
 136         u32 ivar, index;
 137
 138         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 139         index = (int_alloc_entry >> 2) & 0x1F;
 140         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR(index));
 141         ivar &= ~(0xFF << (8 * (int_alloc_entry & 0x3)));
 142         ivar |= (msix_vector << (8 * (int_alloc_entry & 0x3)));
 143         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR(index), ivar);
 144 }
 145
 146 static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter,
 147                                              struct ixgbe_tx_buffer
 148                                              *tx_buffer_info)
 149 {
 150         if (tx_buffer_info->dma) {
 151                 pci_unmap_page(adapter->pdev, tx_buffer_info->dma,
 152                                tx_buffer_info->length, PCI_DMA_TODEVICE);
 153                 tx_buffer_info->dma = 0;
 154         }
 155         if (tx_buffer_info->skb) {
 156                 dev_kfree_skb_any(tx_buffer_info->skb);
 157                 tx_buffer_info->skb = NULL;
 158         }
 159         /* tx_buffer_info must be completely set up in the transmit path */
 160 }
 161
 162 static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
 163                                        struct ixgbe_ring *tx_ring,
 164                                        unsigned int eop)
 165 {
 166         struct ixgbe_hw *hw = &adapter->hw;
 167         u32 head, tail;
 168
 169         /* Detect a transmit hang in hardware, this serializes the
 170          * check with the clearing of time_stamp and movement of eop */
 171         head = IXGBE_READ_REG(hw, tx_ring->head);
 172         tail = IXGBE_READ_REG(hw, tx_ring->tail);
 173         adapter->detect_tx_hung = false;
 174         if ((head != tail) &&
 175             tx_ring->tx_buffer_info[eop].time_stamp &&
 176             time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) &&
 177             !(IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & IXGBE_TFCS_TXOFF)) {
 178                 /* detected Tx unit hang */
 179                 union ixgbe_adv_tx_desc *tx_desc;
 180                 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
 181                 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
 182                         "  Tx Queue             <%d>\n"
 183                         "  TDH, TDT             <%x>, <%x>\n"
 184                         "  next_to_use          <%x>\n"
 185                         "  next_to_clean        <%x>\n"
 186                         "tx_buffer_info[next_to_clean]\n"
 187                         "  time_stamp           <%lx>\n"
 188                         "  jiffies              <%lx>\n",
 189                         tx_ring->queue_index,
 190                         head, tail,
 191                         tx_ring->next_to_use, eop,
 192                         tx_ring->tx_buffer_info[eop].time_stamp, jiffies);
 193                 return true;
 194         }
 195
 196         return false;
 197 }
 198
 199 #define IXGBE_MAX_TXD_PWR       14
 200 #define IXGBE_MAX_DATA_PER_TXD  (1 << IXGBE_MAX_TXD_PWR)
 201
 202 /* Tx Descriptors needed, worst case */
 203 #define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
 204                          (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
 205 #define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
 206         MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1)   /* for context */
 207
 208 #define GET_TX_HEAD_FROM_RING(ring) (\
 209         *(volatile u32 *) \
 210         ((union ixgbe_adv_tx_desc *)(ring)->desc + (ring)->count))
 211 static void ixgbe_tx_timeout(struct net_device *netdev);
 212
 213 /**
 214  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
 215  * @adapter: board private structure
 216  * @tx_ring: tx ring to clean
 217  **/
 218 static bool ixgbe_clean_tx_irq(struct ixgbe_adapter *adapter,
 219                                struct ixgbe_ring *tx_ring)
 220 {
 221         union ixgbe_adv_tx_desc *tx_desc;
 222         struct ixgbe_tx_buffer *tx_buffer_info;
 223         struct net_device *netdev = adapter->netdev;
 224         struct sk_buff *skb;
 225         unsigned int i;
 226         u32 head, oldhead;
 227         unsigned int count = 0;
 228         unsigned int total_bytes = 0, total_packets = 0;
 229
 230         rmb();
 231         head = GET_TX_HEAD_FROM_RING(tx_ring);
 232         head = le32_to_cpu(head);
 233         i = tx_ring->next_to_clean;
 234         while (1) {
 235                 while (i != head) {
 236                         tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
 237                         tx_buffer_info = &tx_ring->tx_buffer_info[i];
 238                         skb = tx_buffer_info->skb;
 239
 240                         if (skb) {
 241                                 unsigned int segs, bytecount;
 242
 243                                 /* gso_segs is currently only valid for tcp */
 244                                 segs = skb_shinfo(skb)->gso_segs ?: 1;
 245                                 /* multiply data chunks by size of headers */
 246                                 bytecount = ((segs - 1) * skb_headlen(skb)) +
 247                                             skb->len;
 248                                 total_packets += segs;
 249                                 total_bytes += bytecount;
 250                         }
 251
 252                         ixgbe_unmap_and_free_tx_resource(adapter,
 253                                                          tx_buffer_info);
 254
 255                         i++;
 256                         if (i == tx_ring->count)
 257                                 i = 0;
 258
 259                         count++;
 260                         if (count == tx_ring->count)
 261                                 goto done_cleaning;
 262                 }
 263                 oldhead = head;
 264                 rmb();
 265                 head = GET_TX_HEAD_FROM_RING(tx_ring);
 266                 head = le32_to_cpu(head);
 267                 if (head == oldhead)
 268                         goto done_cleaning;
 269         } /* while (1) */
 270
 271 done_cleaning:
 272         tx_ring->next_to_clean = i;
 273
 274 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
 275         if (unlikely(count && netif_carrier_ok(netdev) &&
 276                      (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
 277                 /* Make sure that anybody stopping the queue after this
 278                  * sees the new next_to_clean.
 279                  */
 280                 smp_mb();
 281                 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
 282                     !test_bit(__IXGBE_DOWN, &adapter->state)) {
 283                         netif_wake_subqueue(netdev, tx_ring->queue_index);
 284                         ++adapter->restart_queue;
 285                 }
 286         }
 287
 288         if (adapter->detect_tx_hung) {
 289                 if (ixgbe_check_tx_hang(adapter, tx_ring, i)) {
 290                         /* schedule immediate reset if we believe we hung */
 291                         DPRINTK(PROBE, INFO,
 292                                 "tx hang %d detected, resetting adapter\n",
 293                                 adapter->tx_timeout_count + 1);
 294                         ixgbe_tx_timeout(adapter->netdev);
 295                 }
 296         }
 297
 298         /* re-arm the interrupt */
 299         if ((total_packets >= tx_ring->work_limit) ||
 300             (count == tx_ring->count))
 301                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, tx_ring->v_idx);
 302
 303         tx_ring->total_bytes += total_bytes;
 304         tx_ring->total_packets += total_packets;
 305         tx_ring->stats.bytes += total_bytes;
 306         tx_ring->stats.packets += total_packets;
 307         adapter->net_stats.tx_bytes += total_bytes;
 308         adapter->net_stats.tx_packets += total_packets;
 309         return (total_packets ? true : false);
 310 }
 311
 312 #ifdef CONFIG_DCA
 313 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
 314                                 struct ixgbe_ring *rx_ring)
 315 {
 316         u32 rxctrl;
 317         int cpu = get_cpu();
 318         int q = rx_ring - adapter->rx_ring;
 319
 320         if (rx_ring->cpu != cpu) {
 321                 rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q));
 322                 rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK;
 323                 rxctrl |= dca_get_tag(cpu);
 324                 rxctrl |= IXGBE_DCA_RXCTRL_DESC_DCA_EN;
 325                 rxctrl |= IXGBE_DCA_RXCTRL_HEAD_DCA_EN;
 326                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q), rxctrl);
 327                 rx_ring->cpu = cpu;
 328         }
 329         put_cpu();
 330 }
 331
 332 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
 333                                 struct ixgbe_ring *tx_ring)
 334 {
 335         u32 txctrl;
 336         int cpu = get_cpu();
 337         int q = tx_ring - adapter->tx_ring;
 338
 339         if (tx_ring->cpu != cpu) {
 340                 txctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q));
 341                 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK;
 342                 txctrl |= dca_get_tag(cpu);
 343                 txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN;
 344                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q), txctrl);
 345                 tx_ring->cpu = cpu;
 346         }
 347         put_cpu();
 348 }
 349
 350 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
 351 {
 352         int i;
 353
 354         if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
 355                 return;
 356
 357         for (i = 0; i < adapter->num_tx_queues; i++) {
 358                 adapter->tx_ring[i].cpu = -1;
 359                 ixgbe_update_tx_dca(adapter, &adapter->tx_ring[i]);
 360         }
 361         for (i = 0; i < adapter->num_rx_queues; i++) {
 362                 adapter->rx_ring[i].cpu = -1;
 363                 ixgbe_update_rx_dca(adapter, &adapter->rx_ring[i]);
 364         }
 365 }
 366
 367 static int __ixgbe_notify_dca(struct device *dev, void *data)
 368 {
 369         struct net_device *netdev = dev_get_drvdata(dev);
 370         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 371         unsigned long event = *(unsigned long *)data;
 372
 373         switch (event) {
 374         case DCA_PROVIDER_ADD:
 375                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
 376                 /* Always use CB2 mode, difference is masked
 377                  * in the CB driver. */
 378                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
 379                 if (dca_add_requester(dev) == 0) {
 380                         ixgbe_setup_dca(adapter);
 381                         break;
 382                 }
 383                 /* Fall Through since DCA is disabled. */
 384         case DCA_PROVIDER_REMOVE:
 385                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
 386                         dca_remove_requester(dev);
 387                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
 388                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
 389                 }
 390                 break;
 391         }
 392
 393         return 0;
 394 }
 395
 396 #endif /* CONFIG_DCA */
 397 /**
 398  * ixgbe_receive_skb - Send a completed packet up the stack
 399  * @adapter: board private structure
 400  * @skb: packet to send up
 401  * @status: hardware indication of status of receive
 402  * @rx_ring: rx descriptor ring (for a specific queue) to setup
 403  * @rx_desc: rx descriptor
 404  **/
 405 static void ixgbe_receive_skb(struct ixgbe_adapter *adapter,
 406                               struct sk_buff *skb, u8 status,
 407                               struct ixgbe_ring *ring,
 408                               union ixgbe_adv_rx_desc *rx_desc)
 409 {
 410         bool is_vlan = (status & IXGBE_RXD_STAT_VP);
 411         u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
 412
 413         if (adapter->netdev->features & NETIF_F_LRO &&
 414             skb->ip_summed == CHECKSUM_UNNECESSARY) {
 415                 if (adapter->vlgrp && is_vlan)
 416                         lro_vlan_hwaccel_receive_skb(&ring->lro_mgr, skb,
 417                                                      adapter->vlgrp, tag,
 418                                                      rx_desc);
 419                 else
 420                         lro_receive_skb(&ring->lro_mgr, skb, rx_desc);
 421                 ring->lro_used = true;
 422         } else {
 423                 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
 424                         if (adapter->vlgrp && is_vlan)
 425                                 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, tag);
 426                         else
 427                                 netif_receive_skb(skb);
 428                 } else {
 429                         if (adapter->vlgrp && is_vlan)
 430                                 vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
 431                         else
 432                                 netif_rx(skb);
 433                 }
 434         }
 435 }
 436
 437 /**
 438  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
 439  * @adapter: address of board private structure
 440  * @status_err: hardware indication of status of receive
 441  * @skb: skb currently being received and modified
 442  **/
 443 static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter,
 444                                      u32 status_err, struct sk_buff *skb)
 445 {
 446         skb->ip_summed = CHECKSUM_NONE;
 447
 448         /* Rx csum disabled */
 449         if (!(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
 450                 return;
 451
 452         /* if IP and error */
 453         if ((status_err & IXGBE_RXD_STAT_IPCS) &&
 454             (status_err & IXGBE_RXDADV_ERR_IPE)) {
 455                 adapter->hw_csum_rx_error++;
 456                 return;
 457         }
 458
 459         if (!(status_err & IXGBE_RXD_STAT_L4CS))
 460                 return;
 461
 462         if (status_err & IXGBE_RXDADV_ERR_TCPE) {
 463                 adapter->hw_csum_rx_error++;
 464                 return;
 465         }
 466
 467         /* It must be a TCP or UDP packet with a valid checksum */
 468         skb->ip_summed = CHECKSUM_UNNECESSARY;
 469         adapter->hw_csum_rx_good++;
 470 }
 471
 472 /**
 473  * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
 474  * @adapter: address of board private structure
 475  **/
 476 static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter *adapter,
 477                                        struct ixgbe_ring *rx_ring,
 478                                        int cleaned_count)
 479 {
 480         struct net_device *netdev = adapter->netdev;
 481         struct pci_dev *pdev = adapter->pdev;
 482         union ixgbe_adv_rx_desc *rx_desc;
 483         struct ixgbe_rx_buffer *bi;
 484         unsigned int i;
 485         unsigned int bufsz = adapter->rx_buf_len + NET_IP_ALIGN;
 486
 487         i = rx_ring->next_to_use;
 488         bi = &rx_ring->rx_buffer_info[i];
 489
 490         while (cleaned_count--) {
 491                 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
 492
 493                 if (!bi->page &&
 494                     (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
 495                         bi->page = alloc_page(GFP_ATOMIC);
 496                         if (!bi->page) {
 497                                 adapter->alloc_rx_page_failed++;
 498                                 goto no_buffers;
 499                         }
 500                         bi->page_dma = pci_map_page(pdev, bi->page, 0,
 501                                                     PAGE_SIZE,
 502                                                     PCI_DMA_FROMDEVICE);
 503                 }
 504
 505                 if (!bi->skb) {
 506                         struct sk_buff *skb = netdev_alloc_skb(netdev, bufsz);
 507
 508                         if (!skb) {
 509                                 adapter->alloc_rx_buff_failed++;
 510                                 goto no_buffers;
 511                         }
 512
 513                         /*
 514                          * Make buffer alignment 2 beyond a 16 byte boundary
 515                          * this will result in a 16 byte aligned IP header after
 516                          * the 14 byte MAC header is removed
 517                          */
 518                         skb_reserve(skb, NET_IP_ALIGN);
 519
 520                         bi->skb = skb;
 521                         bi->dma = pci_map_single(pdev, skb->data, bufsz,
 522                                                  PCI_DMA_FROMDEVICE);
 523                 }
 524                 /* Refresh the desc even if buffer_addrs didn't change because
 525                  * each write-back erases this info. */
 526                 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
 527                         rx_desc->read.pkt_addr = cpu_to_le64(bi->page_dma);
 528                         rx_desc->read.hdr_addr = cpu_to_le64(bi->dma);
 529                 } else {
 530                         rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
 531                 }
 532
 533                 i++;
 534                 if (i == rx_ring->count)
 535                         i = 0;
 536                 bi = &rx_ring->rx_buffer_info[i];
 537         }
 538 no_buffers:
 539         if (rx_ring->next_to_use != i) {
 540                 rx_ring->next_to_use = i;
 541                 if (i-- == 0)
 542                         i = (rx_ring->count - 1);
 543
 544                 /*
 545                  * Force memory writes to complete before letting h/w
 546                  * know there are new descriptors to fetch.  (Only
 547                  * applicable for weak-ordered memory model archs,
 548                  * such as IA-64).
 549                  */
 550                 wmb();
 551                 writel(i, adapter->hw.hw_addr + rx_ring->tail);
 552         }
 553 }
 554
 555 static bool ixgbe_clean_rx_irq(struct ixgbe_adapter *adapter,
 556                                struct ixgbe_ring *rx_ring,
 557                                int *work_done, int work_to_do)
 558 {
 559         struct net_device *netdev = adapter->netdev;
 560         struct pci_dev *pdev = adapter->pdev;
 561         union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
 562         struct ixgbe_rx_buffer *rx_buffer_info, *next_buffer;
 563         struct sk_buff *skb;
 564         unsigned int i;
 565         u32 upper_len, len, staterr;
 566         u16 hdr_info;
 567         bool cleaned = false;
 568         int cleaned_count = 0;
 569         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
 570
 571         i = rx_ring->next_to_clean;
 572         upper_len = 0;
 573         rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
 574         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 575         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 576
 577         while (staterr & IXGBE_RXD_STAT_DD) {
 578                 if (*work_done >= work_to_do)
 579                         break;
 580                 (*work_done)++;
 581
 582                 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
 583                         hdr_info =
 584                             le16_to_cpu(rx_desc->wb.lower.lo_dword.hdr_info);
 585                         len =
 586                             ((hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
 587                              IXGBE_RXDADV_HDRBUFLEN_SHIFT);
 588                         if (hdr_info & IXGBE_RXDADV_SPH)
 589                                 adapter->rx_hdr_split++;
 590                         if (len > IXGBE_RX_HDR_SIZE)
 591                                 len = IXGBE_RX_HDR_SIZE;
 592                         upper_len = le16_to_cpu(rx_desc->wb.upper.length);
 593                 } else
 594                         len = le16_to_cpu(rx_desc->wb.upper.length);
 595
 596                 cleaned = true;
 597                 skb = rx_buffer_info->skb;
 598                 prefetch(skb->data - NET_IP_ALIGN);
 599                 rx_buffer_info->skb = NULL;
 600
 601                 if (len && !skb_shinfo(skb)->nr_frags) {
 602                         pci_unmap_single(pdev, rx_buffer_info->dma,
 603                                          adapter->rx_buf_len + NET_IP_ALIGN,
 604                                          PCI_DMA_FROMDEVICE);
 605                         skb_put(skb, len);
 606                 }
 607
 608                 if (upper_len) {
 609                         pci_unmap_page(pdev, rx_buffer_info->page_dma,
 610                                        PAGE_SIZE, PCI_DMA_FROMDEVICE);
 611                         rx_buffer_info->page_dma = 0;
 612                         skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
 613                                            rx_buffer_info->page, 0, upper_len);
 614                         rx_buffer_info->page = NULL;
 615
 616                         skb->len += upper_len;
 617                         skb->data_len += upper_len;
 618                         skb->truesize += upper_len;
 619                 }
 620
 621                 i++;
 622                 if (i == rx_ring->count)
 623                         i = 0;
 624                 next_buffer = &rx_ring->rx_buffer_info[i];
 625
 626                 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
 627                 prefetch(next_rxd);
 628
 629                 cleaned_count++;
 630                 if (staterr & IXGBE_RXD_STAT_EOP) {
 631                         rx_ring->stats.packets++;
 632                         rx_ring->stats.bytes += skb->len;
 633                 } else {
 634                         rx_buffer_info->skb = next_buffer->skb;
 635                         rx_buffer_info->dma = next_buffer->dma;
 636                         next_buffer->skb = skb;
 637                         adapter->non_eop_descs++;
 638                         goto next_desc;
 639                 }
 640
 641                 if (staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK) {
 642                         dev_kfree_skb_irq(skb);
 643                         goto next_desc;
 644                 }
 645
 646                 ixgbe_rx_checksum(adapter, staterr, skb);
 647
 648                 /* probably a little skewed due to removing CRC */
 649                 total_rx_bytes += skb->len;
 650                 total_rx_packets++;
 651
 652                 skb->protocol = eth_type_trans(skb, netdev);
 653                 ixgbe_receive_skb(adapter, skb, staterr, rx_ring, rx_desc);
 654                 netdev->last_rx = jiffies;
 655
 656 next_desc:
 657                 rx_desc->wb.upper.status_error = 0;
 658
 659                 /* return some buffers to hardware, one at a time is too slow */
 660                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
 661                         ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
 662                         cleaned_count = 0;
 663                 }
 664
 665                 /* use prefetched values */
 666                 rx_desc = next_rxd;
 667                 rx_buffer_info = next_buffer;
 668
 669                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 670         }
 671
 672         if (rx_ring->lro_used) {
 673                 lro_flush_all(&rx_ring->lro_mgr);
 674                 rx_ring->lro_used = false;
 675         }
 676
 677         rx_ring->next_to_clean = i;
 678         cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
 679
 680         if (cleaned_count)
 681                 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
 682
 683         rx_ring->total_packets += total_rx_packets;
 684         rx_ring->total_bytes += total_rx_bytes;
 685         adapter->net_stats.rx_bytes += total_rx_bytes;
 686         adapter->net_stats.rx_packets += total_rx_packets;
 687
 688         return cleaned;
 689 }
 690
 691 static int ixgbe_clean_rxonly(struct napi_struct *, int);
 692 /**
 693  * ixgbe_configure_msix - Configure MSI-X hardware
 694  * @adapter: board private structure
 695  *
 696  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
 697  * interrupts.
 698  **/
 699 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
 700 {
 701         struct ixgbe_q_vector *q_vector;
 702         int i, j, q_vectors, v_idx, r_idx;
 703         u32 mask;
 704
 705         q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
 706
 707         /* Populate the IVAR table and set the ITR values to the
 708          * corresponding register.
 709          */
 710         for (v_idx = 0; v_idx < q_vectors; v_idx++) {
 711                 q_vector = &adapter->q_vector[v_idx];
 712                 /* XXX for_each_bit(...) */
 713                 r_idx = find_first_bit(q_vector->rxr_idx,
 714                                       adapter->num_rx_queues);
 715
 716                 for (i = 0; i < q_vector->rxr_count; i++) {
 717                         j = adapter->rx_ring[r_idx].reg_idx;
 718                         ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(j), v_idx);
 719                         r_idx = find_next_bit(q_vector->rxr_idx,
 720                                               adapter->num_rx_queues,
 721                                               r_idx + 1);
 722                 }
 723                 r_idx = find_first_bit(q_vector->txr_idx,
 724                                        adapter->num_tx_queues);
 725
 726                 for (i = 0; i < q_vector->txr_count; i++) {
 727                         j = adapter->tx_ring[r_idx].reg_idx;
 728                         ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(j), v_idx);
 729                         r_idx = find_next_bit(q_vector->txr_idx,
 730                                               adapter->num_tx_queues,
 731                                               r_idx + 1);
 732                 }
 733
 734                 /* if this is a tx only vector use half the irq (tx) rate */
 735                 if (q_vector->txr_count && !q_vector->rxr_count)
 736                         q_vector->eitr = adapter->tx_eitr;
 737                 else
 738                         /* rx only or mixed */
 739                         q_vector->eitr = adapter->rx_eitr;
 740
 741                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx),
 742                                 EITR_INTS_PER_SEC_TO_REG(q_vector->eitr));
 743         }
 744
 745         ixgbe_set_ivar(adapter, IXGBE_IVAR_OTHER_CAUSES_INDEX, v_idx);
 746         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
 747
 748         /* set up to autoclear timer, lsc, and the vectors */
 749         mask = IXGBE_EIMS_ENABLE_MASK;
 750         mask &= ~IXGBE_EIMS_OTHER;
 751         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
 752 }
 753
 754 enum latency_range {
 755         lowest_latency = 0,
 756         low_latency = 1,
 757         bulk_latency = 2,
 758         latency_invalid = 255
 759 };
 760
 761 /**
 762  * ixgbe_update_itr - update the dynamic ITR value based on statistics
 763  * @adapter: pointer to adapter
 764  * @eitr: eitr setting (ints per sec) to give last timeslice
 765  * @itr_setting: current throttle rate in ints/second
 766  * @packets: the number of packets during this measurement interval
 767  * @bytes: the number of bytes during this measurement interval
 768  *
 769  *      Stores a new ITR value based on packets and byte
 770  *      counts during the last interrupt.  The advantage of per interrupt
 771  *      computation is faster updates and more accurate ITR for the current
 772  *      traffic pattern.  Constants in this function were computed
 773  *      based on theoretical maximum wire speed and thresholds were set based
 774  *      on testing data as well as attempting to minimize response time
 775  *      while increasing bulk throughput.
 776  *      this functionality is controlled by the InterruptThrottleRate module
 777  *      parameter (see ixgbe_param.c)
 778  **/
 779 static u8 ixgbe_update_itr(struct ixgbe_adapter *adapter,
 780                            u32 eitr, u8 itr_setting,
 781                            int packets, int bytes)
 782 {
 783         unsigned int retval = itr_setting;
 784         u32 timepassed_us;
 785         u64 bytes_perint;
 786
 787         if (packets == 0)
 788                 goto update_itr_done;
 789
 790
 791         /* simple throttlerate management
 792          *    0-20MB/s lowest (100000 ints/s)
 793          *   20-100MB/s low   (20000 ints/s)
 794          *  100-1249MB/s bulk (8000 ints/s)
 795          */
 796         /* what was last interrupt timeslice? */
 797         timepassed_us = 1000000/eitr;
 798         bytes_perint = bytes / timepassed_us; /* bytes/usec */
 799
 800         switch (itr_setting) {
 801         case lowest_latency:
 802                 if (bytes_perint > adapter->eitr_low)
 803                         retval = low_latency;
 804                 break;
 805         case low_latency:
 806                 if (bytes_perint > adapter->eitr_high)
 807                         retval = bulk_latency;
 808                 else if (bytes_perint <= adapter->eitr_low)
 809                         retval = lowest_latency;
 810                 break;
 811         case bulk_latency:
 812                 if (bytes_perint <= adapter->eitr_high)
 813                         retval = low_latency;
 814                 break;
 815         }
 816
 817 update_itr_done:
 818         return retval;
 819 }
 820
 821 static void ixgbe_set_itr_msix(struct ixgbe_q_vector *q_vector)
 822 {
 823         struct ixgbe_adapter *adapter = q_vector->adapter;
 824         struct ixgbe_hw *hw = &adapter->hw;
 825         u32 new_itr;
 826         u8 current_itr, ret_itr;
 827         int i, r_idx, v_idx = ((void *)q_vector - (void *)(adapter->q_vector)) /
 828                               sizeof(struct ixgbe_q_vector);
 829         struct ixgbe_ring *rx_ring, *tx_ring;
 830
 831         r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
 832         for (i = 0; i < q_vector->txr_count; i++) {
 833                 tx_ring = &(adapter->tx_ring[r_idx]);
 834                 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
 835                                            q_vector->tx_eitr,
 836                                            tx_ring->total_packets,
 837                                            tx_ring->total_bytes);
 838                 /* if the result for this queue would decrease interrupt
 839                  * rate for this vector then use that result */
 840                 q_vector->tx_eitr = ((q_vector->tx_eitr > ret_itr) ?
 841                                     q_vector->tx_eitr - 1 : ret_itr);
 842                 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
 843                                       r_idx + 1);
 844         }
 845
 846         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
 847         for (i = 0; i < q_vector->rxr_count; i++) {
 848                 rx_ring = &(adapter->rx_ring[r_idx]);
 849                 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
 850                                            q_vector->rx_eitr,
 851                                            rx_ring->total_packets,
 852                                            rx_ring->total_bytes);
 853                 /* if the result for this queue would decrease interrupt
 854                  * rate for this vector then use that result */
 855                 q_vector->rx_eitr = ((q_vector->rx_eitr > ret_itr) ?
 856                                     q_vector->rx_eitr - 1 : ret_itr);
 857                 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
 858                                       r_idx + 1);
 859         }
 860
 861         current_itr = max(q_vector->rx_eitr, q_vector->tx_eitr);
 862
 863         switch (current_itr) {
 864         /* counts and packets in update_itr are dependent on these numbers */
 865         case lowest_latency:
 866                 new_itr = 100000;
 867                 break;
 868         case low_latency:
 869                 new_itr = 20000; /* aka hwitr = ~200 */
 870                 break;
 871         case bulk_latency:
 872         default:
 873                 new_itr = 8000;
 874                 break;
 875         }
 876
 877         if (new_itr != q_vector->eitr) {
 878                 u32 itr_reg;
 879                 /* do an exponential smoothing */
 880                 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
 881                 q_vector->eitr = new_itr;
 882                 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
 883                 /* must write high and low 16 bits to reset counter */
 884                 DPRINTK(TX_ERR, DEBUG, "writing eitr(%d): %08X\n", v_idx,
 885                         itr_reg);
 886                 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg | (itr_reg)<<16);
 887         }
 888
 889         return;
 890 }
 891
 892 static irqreturn_t ixgbe_msix_lsc(int irq, void *data)
 893 {
 894         struct net_device *netdev = data;
 895         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 896         struct ixgbe_hw *hw = &adapter->hw;
 897         u32 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
 898
 899         if (eicr & IXGBE_EICR_LSC) {
 900                 adapter->lsc_int++;
 901                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
 902                         mod_timer(&adapter->watchdog_timer, jiffies);
 903         }
 904
 905         if (!test_bit(__IXGBE_DOWN, &adapter->state))
 906                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER);
 907
 908         return IRQ_HANDLED;
 909 }
 910
 911 static irqreturn_t ixgbe_msix_clean_tx(int irq, void *data)
 912 {
 913         struct ixgbe_q_vector *q_vector = data;
 914         struct ixgbe_adapter  *adapter = q_vector->adapter;
 915         struct ixgbe_ring     *tx_ring;
 916         int i, r_idx;
 917
 918         if (!q_vector->txr_count)
 919                 return IRQ_HANDLED;
 920
 921         r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
 922         for (i = 0; i < q_vector->txr_count; i++) {
 923                 tx_ring = &(adapter->tx_ring[r_idx]);
 924 #ifdef CONFIG_DCA
 925                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
 926                         ixgbe_update_tx_dca(adapter, tx_ring);
 927 #endif
 928                 tx_ring->total_bytes = 0;
 929                 tx_ring->total_packets = 0;
 930                 ixgbe_clean_tx_irq(adapter, tx_ring);
 931                 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
 932                                       r_idx + 1);
 933         }
 934
 935         return IRQ_HANDLED;
 936 }
 937
 938 /**
 939  * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
 940  * @irq: unused
 941  * @data: pointer to our q_vector struct for this interrupt vector
 942  **/
 943 static irqreturn_t ixgbe_msix_clean_rx(int irq, void *data)
 944 {
 945         struct ixgbe_q_vector *q_vector = data;
 946         struct ixgbe_adapter  *adapter = q_vector->adapter;
 947         struct ixgbe_ring  *rx_ring;
 948         int r_idx;
 949
 950         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
 951         if (!q_vector->rxr_count)
 952                 return IRQ_HANDLED;
 953
 954         rx_ring = &(adapter->rx_ring[r_idx]);
 955         /* disable interrupts on this vector only */
 956         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, rx_ring->v_idx);
 957         rx_ring->total_bytes = 0;
 958         rx_ring->total_packets = 0;
 959         netif_rx_schedule(adapter->netdev, &q_vector->napi);
 960
 961         return IRQ_HANDLED;
 962 }
 963
 964 static irqreturn_t ixgbe_msix_clean_many(int irq, void *data)
 965 {
 966         ixgbe_msix_clean_rx(irq, data);
 967         ixgbe_msix_clean_tx(irq, data);
 968
 969         return IRQ_HANDLED;
 970 }
 971
 972 /**
 973  * ixgbe_clean_rxonly - msix (aka one shot) rx clean routine
 974  * @napi: napi struct with our devices info in it
 975  * @budget: amount of work driver is allowed to do this pass, in packets
 976  *
 977  **/
 978 static int ixgbe_clean_rxonly(struct napi_struct *napi, int budget)
 979 {
 980         struct ixgbe_q_vector *q_vector =
 981                                container_of(napi, struct ixgbe_q_vector, napi);
 982         struct ixgbe_adapter *adapter = q_vector->adapter;
 983         struct ixgbe_ring *rx_ring;
 984         int work_done = 0;
 985         long r_idx;
 986
 987         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
 988         rx_ring = &(adapter->rx_ring[r_idx]);
 989 #ifdef CONFIG_DCA
 990         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
 991                 ixgbe_update_rx_dca(adapter, rx_ring);
 992 #endif
 993
 994         ixgbe_clean_rx_irq(adapter, rx_ring, &work_done, budget);
 995
 996         /* If all Rx work done, exit the polling mode */
 997         if (work_done < budget) {
 998                 netif_rx_complete(adapter->netdev, napi);
 999                 if (adapter->rx_eitr < IXGBE_MIN_ITR_USECS)
1000                         ixgbe_set_itr_msix(q_vector);
1001                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1002                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, rx_ring->v_idx);
1003         }
1004
1005         return work_done;
1006 }
1007
1008 static inline void map_vector_to_rxq(struct ixgbe_adapter *a, int v_idx,
1009                                      int r_idx)
1010 {
1011         a->q_vector[v_idx].adapter = a;
1012         set_bit(r_idx, a->q_vector[v_idx].rxr_idx);
1013         a->q_vector[v_idx].rxr_count++;
1014         a->rx_ring[r_idx].v_idx = 1 << v_idx;
1015 }
1016
1017 static inline void map_vector_to_txq(struct ixgbe_adapter *a, int v_idx,
1018                                      int r_idx)
1019 {
1020         a->q_vector[v_idx].adapter = a;
1021         set_bit(r_idx, a->q_vector[v_idx].txr_idx);
1022         a->q_vector[v_idx].txr_count++;
1023         a->tx_ring[r_idx].v_idx = 1 << v_idx;
1024 }
1025
1026 /**
1027  * ixgbe_map_rings_to_vectors - Maps descriptor rings to vectors
1028  * @adapter: board private structure to initialize
1029  * @vectors: allotted vector count for descriptor rings
1030  *
1031  * This function maps descriptor rings to the queue-specific vectors
1032  * we were allotted through the MSI-X enabling code.  Ideally, we'd have
1033  * one vector per ring/queue, but on a constrained vector budget, we
1034  * group the rings as "efficiently" as possible.  You would add new
1035  * mapping configurations in here.
1036  **/
1037 static int ixgbe_map_rings_to_vectors(struct ixgbe_adapter *adapter,
1038                                       int vectors)
1039 {
1040         int v_start = 0;
1041         int rxr_idx = 0, txr_idx = 0;
1042         int rxr_remaining = adapter->num_rx_queues;
1043         int txr_remaining = adapter->num_tx_queues;
1044         int i, j;
1045         int rqpv, tqpv;
1046         int err = 0;
1047
1048         /* No mapping required if MSI-X is disabled. */
1049         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1050                 goto out;
1051
1052         /*
1053          * The ideal configuration...
1054          * We have enough vectors to map one per queue.
1055          */
1056         if (vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1057                 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1058                         map_vector_to_rxq(adapter, v_start, rxr_idx);
1059
1060                 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1061                         map_vector_to_txq(adapter, v_start, txr_idx);
1062
1063                 goto out;
1064         }
1065
1066         /*
1067          * If we don't have enough vectors for a 1-to-1
1068          * mapping, we'll have to group them so there are
1069          * multiple queues per vector.
1070          */
1071         /* Re-adjusting *qpv takes care of the remainder. */
1072         for (i = v_start; i < vectors; i++) {
1073                 rqpv = DIV_ROUND_UP(rxr_remaining, vectors - i);
1074                 for (j = 0; j < rqpv; j++) {
1075                         map_vector_to_rxq(adapter, i, rxr_idx);
1076                         rxr_idx++;
1077                         rxr_remaining--;
1078                 }
1079         }
1080         for (i = v_start; i < vectors; i++) {
1081                 tqpv = DIV_ROUND_UP(txr_remaining, vectors - i);
1082                 for (j = 0; j < tqpv; j++) {
1083                         map_vector_to_txq(adapter, i, txr_idx);
1084                         txr_idx++;
1085                         txr_remaining--;
1086                 }
1087         }
1088
1089 out:
1090         return err;
1091 }
1092
1093 /**
1094  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
1095  * @adapter: board private structure
1096  *
1097  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
1098  * interrupts from the kernel.
1099  **/
1100 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
1101 {
1102         struct net_device *netdev = adapter->netdev;
1103         irqreturn_t (*handler)(int, void *);
1104         int i, vector, q_vectors, err;
1105
1106         /* Decrement for Other and TCP Timer vectors */
1107         q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1108
1109         /* Map the Tx/Rx rings to the vectors we were allotted. */
1110         err = ixgbe_map_rings_to_vectors(adapter, q_vectors);
1111         if (err)
1112                 goto out;
1113
1114 #define SET_HANDLER(_v) ((!(_v)->rxr_count) ? &ixgbe_msix_clean_tx : \
1115                          (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \
1116                          &ixgbe_msix_clean_many)
1117         for (vector = 0; vector < q_vectors; vector++) {
1118                 handler = SET_HANDLER(&adapter->q_vector[vector]);
1119                 sprintf(adapter->name[vector], "%s:v%d-%s",
1120                         netdev->name, vector,
1121                         (handler == &ixgbe_msix_clean_rx) ? "Rx" :
1122                          ((handler == &ixgbe_msix_clean_tx) ? "Tx" : "TxRx"));
1123                 err = request_irq(adapter->msix_entries[vector].vector,
1124                                   handler, 0, adapter->name[vector],
1125                                   &(adapter->q_vector[vector]));
1126                 if (err) {
1127                         DPRINTK(PROBE, ERR,
1128                                 "request_irq failed for MSIX interrupt "
1129                                 "Error: %d\n", err);
1130                         goto free_queue_irqs;
1131                 }
1132         }
1133
1134         sprintf(adapter->name[vector], "%s:lsc", netdev->name);
1135         err = request_irq(adapter->msix_entries[vector].vector,
1136                           &ixgbe_msix_lsc, 0, adapter->name[vector], netdev);
1137         if (err) {
1138                 DPRINTK(PROBE, ERR,
1139                         "request_irq for msix_lsc failed: %d\n", err);
1140                 goto free_queue_irqs;
1141         }
1142
1143         return 0;
1144
1145 free_queue_irqs:
1146         for (i = vector - 1; i >= 0; i--)
1147                 free_irq(adapter->msix_entries[--vector].vector,
1148                          &(adapter->q_vector[i]));
1149         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
1150         pci_disable_msix(adapter->pdev);
1151         kfree(adapter->msix_entries);
1152         adapter->msix_entries = NULL;
1153 out:
1154         return err;
1155 }
1156
1157 static void ixgbe_set_itr(struct ixgbe_adapter *adapter)
1158 {
1159         struct ixgbe_hw *hw = &adapter->hw;
1160         struct ixgbe_q_vector *q_vector = adapter->q_vector;
1161         u8 current_itr;
1162         u32 new_itr = q_vector->eitr;
1163         struct ixgbe_ring *rx_ring = &adapter->rx_ring[0];
1164         struct ixgbe_ring *tx_ring = &adapter->tx_ring[0];
1165
1166         q_vector->tx_eitr = ixgbe_update_itr(adapter, new_itr,
1167                                              q_vector->tx_eitr,
1168                                              tx_ring->total_packets,
1169                                              tx_ring->total_bytes);
1170         q_vector->rx_eitr = ixgbe_update_itr(adapter, new_itr,
1171                                              q_vector->rx_eitr,
1172                                              rx_ring->total_packets,
1173                                              rx_ring->total_bytes);
1174
1175         current_itr = max(q_vector->rx_eitr, q_vector->tx_eitr);
1176
1177         switch (current_itr) {
1178         /* counts and packets in update_itr are dependent on these numbers */
1179         case lowest_latency:
1180                 new_itr = 100000;
1181                 break;
1182         case low_latency:
1183                 new_itr = 20000; /* aka hwitr = ~200 */
1184                 break;
1185         case bulk_latency:
1186                 new_itr = 8000;
1187                 break;
1188         default:
1189                 break;
1190         }
1191
1192         if (new_itr != q_vector->eitr) {
1193                 u32 itr_reg;
1194                 /* do an exponential smoothing */
1195                 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
1196                 q_vector->eitr = new_itr;
1197                 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
1198                 /* must write high and low 16 bits to reset counter */
1199                 IXGBE_WRITE_REG(hw, IXGBE_EITR(0), itr_reg | (itr_reg)<<16);
1200         }
1201
1202         return;
1203 }
1204
1205 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter);
1206
1207 /**
1208  * ixgbe_intr - legacy mode Interrupt Handler
1209  * @irq: interrupt number
1210  * @data: pointer to a network interface device structure
1211  * @pt_regs: CPU registers structure
1212  **/
1213 static irqreturn_t ixgbe_intr(int irq, void *data)
1214 {
1215         struct net_device *netdev = data;
1216         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1217         struct ixgbe_hw *hw = &adapter->hw;
1218         u32 eicr;
1219
1220
1221         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
1222          * therefore no explict interrupt disable is necessary */
1223         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
1224         if (!eicr)
1225                 return IRQ_NONE;        /* Not our interrupt */
1226
1227         if (eicr & IXGBE_EICR_LSC) {
1228                 adapter->lsc_int++;
1229                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1230                         mod_timer(&adapter->watchdog_timer, jiffies);
1231         }
1232
1233
1234         if (netif_rx_schedule_prep(netdev, &adapter->q_vector[0].napi)) {
1235                 adapter->tx_ring[0].total_packets = 0;
1236                 adapter->tx_ring[0].total_bytes = 0;
1237                 adapter->rx_ring[0].total_packets = 0;
1238                 adapter->rx_ring[0].total_bytes = 0;
1239                 /* would disable interrupts here but EIAM disabled it */
1240                 __netif_rx_schedule(netdev, &adapter->q_vector[0].napi);
1241         }
1242
1243         return IRQ_HANDLED;
1244 }
1245
1246 static inline void ixgbe_reset_q_vectors(struct ixgbe_adapter *adapter)
1247 {
1248         int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1249
1250         for (i = 0; i < q_vectors; i++) {
1251                 struct ixgbe_q_vector *q_vector = &adapter->q_vector[i];
1252                 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES);
1253                 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES);
1254                 q_vector->rxr_count = 0;
1255                 q_vector->txr_count = 0;
1256         }
1257 }
1258
1259 /**
1260  * ixgbe_request_irq - initialize interrupts
1261  * @adapter: board private structure
1262  *
1263  * Attempts to configure interrupts using the best available
1264  * capabilities of the hardware and kernel.
1265  **/
1266 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
1267 {
1268         struct net_device *netdev = adapter->netdev;
1269         int err;
1270
1271         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1272                 err = ixgbe_request_msix_irqs(adapter);
1273         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1274                 err = request_irq(adapter->pdev->irq, &ixgbe_intr, 0,
1275                                   netdev->name, netdev);
1276         } else {
1277                 err = request_irq(adapter->pdev->irq, &ixgbe_intr, IRQF_SHARED,
1278                                   netdev->name, netdev);
1279         }
1280
1281         if (err)
1282                 DPRINTK(PROBE, ERR, "request_irq failed, Error %d\n", err);
1283
1284         return err;
1285 }
1286
1287 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
1288 {
1289         struct net_device *netdev = adapter->netdev;
1290
1291         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1292                 int i, q_vectors;
1293
1294                 q_vectors = adapter->num_msix_vectors;
1295
1296                 i = q_vectors - 1;
1297                 free_irq(adapter->msix_entries[i].vector, netdev);
1298
1299                 i--;
1300                 for (; i >= 0; i--) {
1301                         free_irq(adapter->msix_entries[i].vector,
1302                                  &(adapter->q_vector[i]));
1303                 }
1304
1305                 ixgbe_reset_q_vectors(adapter);
1306         } else {
1307                 free_irq(adapter->pdev->irq, netdev);
1308         }
1309 }
1310
1311 /**
1312  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
1313  * @adapter: board private structure
1314  **/
1315 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
1316 {
1317         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
1318         IXGBE_WRITE_FLUSH(&adapter->hw);
1319         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1320                 int i;
1321                 for (i = 0; i < adapter->num_msix_vectors; i++)
1322                         synchronize_irq(adapter->msix_entries[i].vector);
1323         } else {
1324                 synchronize_irq(adapter->pdev->irq);
1325         }
1326 }
1327
1328 /**
1329  * ixgbe_irq_enable - Enable default interrupt generation settings
1330  * @adapter: board private structure
1331  **/
1332 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter)
1333 {
1334         u32 mask;
1335         mask = IXGBE_EIMS_ENABLE_MASK;
1336         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1337         IXGBE_WRITE_FLUSH(&adapter->hw);
1338 }
1339
1340 /**
1341  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
1342  *
1343  **/
1344 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
1345 {
1346         struct ixgbe_hw *hw = &adapter->hw;
1347
1348         IXGBE_WRITE_REG(hw, IXGBE_EITR(0),
1349                         EITR_INTS_PER_SEC_TO_REG(adapter->rx_eitr));
1350
1351         ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(0), 0);
1352         ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(0), 0);
1353
1354         map_vector_to_rxq(adapter, 0, 0);
1355         map_vector_to_txq(adapter, 0, 0);
1356
1357         DPRINTK(HW, INFO, "Legacy interrupt IVAR setup done\n");
1358 }
1359
1360 /**
1361  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
1362  * @adapter: board private structure
1363  *
1364  * Configure the Tx unit of the MAC after a reset.
1365  **/
1366 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
1367 {
1368         u64 tdba, tdwba;
1369         struct ixgbe_hw *hw = &adapter->hw;
1370         u32 i, j, tdlen, txctrl;
1371
1372         /* Setup the HW Tx Head and Tail descriptor pointers */
1373         for (i = 0; i < adapter->num_tx_queues; i++) {
1374                 struct ixgbe_ring *ring = &adapter->tx_ring[i];
1375                 j = ring->reg_idx;
1376                 tdba = ring->dma;
1377                 tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc);
1378                 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j),
1379                                 (tdba & DMA_32BIT_MASK));
1380                 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32));
1381                 tdwba = ring->dma +
1382                         (ring->count * sizeof(union ixgbe_adv_tx_desc));
1383                 tdwba |= IXGBE_TDWBAL_HEAD_WB_ENABLE;
1384                 IXGBE_WRITE_REG(hw, IXGBE_TDWBAL(j), tdwba & DMA_32BIT_MASK);
1385                 IXGBE_WRITE_REG(hw, IXGBE_TDWBAH(j), (tdwba >> 32));
1386                 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), tdlen);
1387                 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0);
1388                 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0);
1389                 adapter->tx_ring[i].head = IXGBE_TDH(j);
1390                 adapter->tx_ring[i].tail = IXGBE_TDT(j);
1391                 /* Disable Tx Head Writeback RO bit, since this hoses
1392                  * bookkeeping if things aren't delivered in order.
1393                  */
1394                 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j));
1395                 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
1396                 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl);
1397         }
1398 }
1399
1400 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1401                         (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1402
1403 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT                 2
1404 /**
1405  * ixgbe_get_skb_hdr - helper function for LRO header processing
1406  * @skb: pointer to sk_buff to be added to LRO packet
1407  * @iphdr: pointer to tcp header structure
1408  * @tcph: pointer to tcp header structure
1409  * @hdr_flags: pointer to header flags
1410  * @priv: private data
1411  **/
1412 static int ixgbe_get_skb_hdr(struct sk_buff *skb, void **iphdr, void **tcph,
1413                              u64 *hdr_flags, void *priv)
1414 {
1415         union ixgbe_adv_rx_desc *rx_desc = priv;
1416
1417         /* Verify that this is a valid IPv4 TCP packet */
1418         if (!(rx_desc->wb.lower.lo_dword.pkt_info &
1419             (IXGBE_RXDADV_PKTTYPE_IPV4 | IXGBE_RXDADV_PKTTYPE_TCP)))
1420                 return -1;
1421
1422         /* Set network headers */
1423         skb_reset_network_header(skb);
1424         skb_set_transport_header(skb, ip_hdrlen(skb));
1425         *iphdr = ip_hdr(skb);
1426         *tcph = tcp_hdr(skb);
1427         *hdr_flags = LRO_IPV4 | LRO_TCP;
1428         return 0;
1429 }
1430
1431 /**
1432  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
1433  * @adapter: board private structure
1434  *
1435  * Configure the Rx unit of the MAC after a reset.
1436  **/
1437 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
1438 {
1439         u64 rdba;
1440         struct ixgbe_hw *hw = &adapter->hw;
1441         struct net_device *netdev = adapter->netdev;
1442         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1443         int i, j;
1444         u32 rdlen, rxctrl, rxcsum;
1445         u32 random[10];
1446         u32 fctrl, hlreg0;
1447         u32 pages;
1448         u32 reta = 0, mrqc, srrctl;
1449
1450         /* Decide whether to use packet split mode or not */
1451         if (netdev->mtu > ETH_DATA_LEN)
1452                 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1453         else
1454                 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
1455
1456         /* Set the RX buffer length according to the mode */
1457         if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1458                 adapter->rx_buf_len = IXGBE_RX_HDR_SIZE;
1459         } else {
1460                 if (netdev->mtu <= ETH_DATA_LEN)
1461                         adapter->rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1462                 else
1463                         adapter->rx_buf_len = ALIGN(max_frame, 1024);
1464         }
1465
1466         fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
1467         fctrl |= IXGBE_FCTRL_BAM;
1468         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
1469         IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl);
1470
1471         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
1472         if (adapter->netdev->mtu <= ETH_DATA_LEN)
1473                 hlreg0 &= ~IXGBE_HLREG0_JUMBOEN;
1474         else
1475                 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
1476         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
1477
1478         pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1479
1480         srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(0));
1481         srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
1482         srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
1483
1484         if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1485                 srrctl |= PAGE_SIZE >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1486                 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1487                 srrctl |= ((IXGBE_RX_HDR_SIZE <<
1488                             IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1489                            IXGBE_SRRCTL_BSIZEHDR_MASK);
1490         } else {
1491                 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1492
1493                 if (adapter->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1494                         srrctl |=
1495                              IXGBE_RXBUFFER_2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1496                 else
1497                         srrctl |=
1498                              adapter->rx_buf_len >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1499         }
1500         IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(0), srrctl);
1501
1502         rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1503         /* disable receives while setting up the descriptors */
1504         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1505         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
1506
1507         /* Setup the HW Rx Head and Tail Descriptor Pointers and
1508          * the Base and Length of the Rx Descriptor Ring */
1509         for (i = 0; i < adapter->num_rx_queues; i++) {
1510                 rdba = adapter->rx_ring[i].dma;
1511                 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(i), (rdba & DMA_32BIT_MASK));
1512                 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(i), (rdba >> 32));
1513                 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(i), rdlen);
1514                 IXGBE_WRITE_REG(hw, IXGBE_RDH(i), 0);
1515                 IXGBE_WRITE_REG(hw, IXGBE_RDT(i), 0);
1516                 adapter->rx_ring[i].head = IXGBE_RDH(i);
1517                 adapter->rx_ring[i].tail = IXGBE_RDT(i);
1518         }
1519
1520         /* Intitial LRO Settings */
1521         adapter->rx_ring[i].lro_mgr.max_aggr = IXGBE_MAX_LRO_AGGREGATE;
1522         adapter->rx_ring[i].lro_mgr.max_desc = IXGBE_MAX_LRO_DESCRIPTORS;
1523         adapter->rx_ring[i].lro_mgr.get_skb_header = ixgbe_get_skb_hdr;
1524         adapter->rx_ring[i].lro_mgr.features = LRO_F_EXTRACT_VLAN_ID;
1525         if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL))
1526                 adapter->rx_ring[i].lro_mgr.features |= LRO_F_NAPI;
1527         adapter->rx_ring[i].lro_mgr.dev = adapter->netdev;
1528         adapter->rx_ring[i].lro_mgr.ip_summed = CHECKSUM_UNNECESSARY;
1529         adapter->rx_ring[i].lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY;
1530
1531         if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
1532                 /* Fill out redirection table */
1533                 for (i = 0, j = 0; i < 128; i++, j++) {
1534                         if (j == adapter->ring_feature[RING_F_RSS].indices)
1535                                 j = 0;
1536                         /* reta = 4-byte sliding window of
1537                          * 0x00..(indices-1)(indices-1)00..etc. */
1538                         reta = (reta << 8) | (j * 0x11);
1539                         if ((i & 3) == 3)
1540                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
1541                 }
1542
1543                 /* Fill out hash function seeds */
1544                 /* XXX use a random constant here to glue certain flows */
1545                 get_random_bytes(&random[0], 40);
1546                 for (i = 0; i < 10; i++)
1547                         IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), random[i]);
1548
1549                 mrqc = IXGBE_MRQC_RSSEN
1550                     /* Perform hash on these packet types */
1551                     | IXGBE_MRQC_RSS_FIELD_IPV4
1552                     | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
1553                     | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
1554                     | IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP
1555                     | IXGBE_MRQC_RSS_FIELD_IPV6_EX
1556                     | IXGBE_MRQC_RSS_FIELD_IPV6
1557                     | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
1558                     | IXGBE_MRQC_RSS_FIELD_IPV6_UDP
1559                     | IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP;
1560                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
1561         }
1562
1563         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
1564
1565         if (adapter->flags & IXGBE_FLAG_RSS_ENABLED ||
1566             adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED) {
1567                 /* Disable indicating checksum in descriptor, enables
1568                  * RSS hash */
1569                 rxcsum |= IXGBE_RXCSUM_PCSD;
1570         }
1571         if (!(rxcsum & IXGBE_RXCSUM_PCSD)) {
1572                 /* Enable IPv4 payload checksum for UDP fragments
1573                  * if PCSD is not set */
1574                 rxcsum |= IXGBE_RXCSUM_IPPCSE;
1575         }
1576
1577         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
1578 }
1579
1580 static void ixgbe_vlan_rx_register(struct net_device *netdev,
1581                                    struct vlan_group *grp)
1582 {
1583         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1584         u32 ctrl;
1585
1586         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1587                 ixgbe_irq_disable(adapter);
1588         adapter->vlgrp = grp;
1589
1590         if (grp) {
1591                 /* enable VLAN tag insert/strip */
1592                 ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL);
1593                 ctrl |= IXGBE_VLNCTRL_VME;
1594                 ctrl &= ~IXGBE_VLNCTRL_CFIEN;
1595                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl);
1596         }
1597
1598         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1599                 ixgbe_irq_enable(adapter);
1600 }
1601
1602 static void ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1603 {
1604         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1605
1606         /* add VID to filter table */
1607         ixgbe_set_vfta(&adapter->hw, vid, 0, true);
1608 }
1609
1610 static void ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1611 {
1612         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1613
1614         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1615                 ixgbe_irq_disable(adapter);
1616
1617         vlan_group_set_device(adapter->vlgrp, vid, NULL);
1618
1619         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1620                 ixgbe_irq_enable(adapter);
1621
1622         /* remove VID from filter table */
1623         ixgbe_set_vfta(&adapter->hw, vid, 0, false);
1624 }
1625
1626 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
1627 {
1628         ixgbe_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1629
1630         if (adapter->vlgrp) {
1631                 u16 vid;
1632                 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1633                         if (!vlan_group_get_device(adapter->vlgrp, vid))
1634                                 continue;
1635                         ixgbe_vlan_rx_add_vid(adapter->netdev, vid);
1636                 }
1637         }
1638 }
1639
1640 static u8 *ixgbe_addr_list_itr(struct ixgbe_hw *hw, u8 **mc_addr_ptr, u32 *vmdq)
1641 {
1642         struct dev_mc_list *mc_ptr;
1643         u8 *addr = *mc_addr_ptr;
1644         *vmdq = 0;
1645
1646         mc_ptr = container_of(addr, struct dev_mc_list, dmi_addr[0]);
1647         if (mc_ptr->next)
1648                 *mc_addr_ptr = mc_ptr->next->dmi_addr;
1649         else
1650                 *mc_addr_ptr = NULL;
1651
1652         return addr;
1653 }
1654
1655 /**
1656  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
1657  * @netdev: network interface device structure
1658  *
1659  * The set_rx_method entry point is called whenever the unicast/multicast
1660  * address list or the network interface flags are updated.  This routine is
1661  * responsible for configuring the hardware for proper unicast, multicast and
1662  * promiscuous mode.
1663  **/
1664 static void ixgbe_set_rx_mode(struct net_device *netdev)
1665 {
1666         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1667         struct ixgbe_hw *hw = &adapter->hw;
1668         u32 fctrl, vlnctrl;
1669         u8 *addr_list = NULL;
1670         int addr_count = 0;
1671
1672         /* Check for Promiscuous and All Multicast modes */
1673
1674         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1675         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
1676
1677         if (netdev->flags & IFF_PROMISC) {
1678                 hw->addr_ctrl.user_set_promisc = 1;
1679                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1680                 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
1681         } else {
1682                 if (netdev->flags & IFF_ALLMULTI) {
1683                         fctrl |= IXGBE_FCTRL_MPE;
1684                         fctrl &= ~IXGBE_FCTRL_UPE;
1685                 } else {
1686                         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1687                 }
1688                 vlnctrl |= IXGBE_VLNCTRL_VFE;
1689                 hw->addr_ctrl.user_set_promisc = 0;
1690         }
1691
1692         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
1693         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
1694
1695         /* reprogram secondary unicast list */
1696         addr_count = netdev->uc_count;
1697         if (addr_count)
1698                 addr_list = netdev->uc_list->dmi_addr;
1699         ixgbe_update_uc_addr_list(hw, addr_list, addr_count,
1700                                   ixgbe_addr_list_itr);
1701
1702         /* reprogram multicast list */
1703         addr_count = netdev->mc_count;
1704         if (addr_count)
1705                 addr_list = netdev->mc_list->dmi_addr;
1706         ixgbe_update_mc_addr_list(hw, addr_list, addr_count,
1707                                   ixgbe_addr_list_itr);
1708 }
1709
1710 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
1711 {
1712         int q_idx;
1713         struct ixgbe_q_vector *q_vector;
1714         int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1715
1716         /* legacy and MSI only use one vector */
1717         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1718                 q_vectors = 1;
1719
1720         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1721                 q_vector = &adapter->q_vector[q_idx];
1722                 if (!q_vector->rxr_count)
1723                         continue;
1724                 napi_enable(&q_vector->napi);
1725         }
1726 }
1727
1728 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
1729 {
1730         int q_idx;
1731         struct ixgbe_q_vector *q_vector;
1732         int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1733
1734         /* legacy and MSI only use one vector */
1735         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1736                 q_vectors = 1;
1737
1738         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1739                 q_vector = &adapter->q_vector[q_idx];
1740                 if (!q_vector->rxr_count)
1741                         continue;
1742                 napi_disable(&q_vector->napi);
1743         }
1744 }
1745
1746 static void ixgbe_configure(struct ixgbe_adapter *adapter)
1747 {
1748         struct net_device *netdev = adapter->netdev;
1749         int i;
1750
1751         ixgbe_set_rx_mode(netdev);
1752
1753         ixgbe_restore_vlan(adapter);
1754
1755         ixgbe_configure_tx(adapter);
1756         ixgbe_configure_rx(adapter);
1757         for (i = 0; i < adapter->num_rx_queues; i++)
1758                 ixgbe_alloc_rx_buffers(adapter, &adapter->rx_ring[i],
1759                                            (adapter->rx_ring[i].count - 1));
1760 }
1761
1762 static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
1763 {
1764         struct net_device *netdev = adapter->netdev;
1765         struct ixgbe_hw *hw = &adapter->hw;
1766         int i, j = 0;
1767         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1768         u32 txdctl, rxdctl, mhadd;
1769         u32 gpie;
1770
1771         ixgbe_get_hw_control(adapter);
1772
1773         if ((adapter->flags & IXGBE_FLAG_MSIX_ENABLED) ||
1774             (adapter->flags & IXGBE_FLAG_MSI_ENABLED)) {
1775                 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1776                         gpie = (IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_EIAME |
1777                                 IXGBE_GPIE_PBA_SUPPORT | IXGBE_GPIE_OCD);
1778                 } else {
1779                         /* MSI only */
1780                         gpie = 0;
1781                 }
1782                 /* XXX: to interrupt immediately for EICS writes, enable this */
1783                 /* gpie |= IXGBE_GPIE_EIMEN; */
1784                 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
1785         }
1786
1787         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
1788                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
1789                  * specifically only auto mask tx and rx interrupts */
1790                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
1791         }
1792
1793         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
1794         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
1795                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
1796                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
1797
1798                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
1799         }
1800
1801         for (i = 0; i < adapter->num_tx_queues; i++) {
1802                 j = adapter->tx_ring[i].reg_idx;
1803                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
1804                 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
1805                 txdctl |= (8 << 16);
1806                 txdctl |= IXGBE_TXDCTL_ENABLE;
1807                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
1808         }
1809
1810         for (i = 0; i < adapter->num_rx_queues; i++) {
1811                 j = adapter->rx_ring[i].reg_idx;
1812                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
1813                 /* enable PTHRESH=32 descriptors (half the internal cache)
1814                  * and HTHRESH=0 descriptors (to minimize latency on fetch),
1815                  * this also removes a pesky rx_no_buffer_count increment */
1816                 rxdctl |= 0x0020;
1817                 rxdctl |= IXGBE_RXDCTL_ENABLE;
1818                 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), rxdctl);
1819         }
1820         /* enable all receives */
1821         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1822         rxdctl |= (IXGBE_RXCTRL_DMBYPS | IXGBE_RXCTRL_RXEN);
1823         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxdctl);
1824
1825         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
1826                 ixgbe_configure_msix(adapter);
1827         else
1828                 ixgbe_configure_msi_and_legacy(adapter);
1829
1830         clear_bit(__IXGBE_DOWN, &adapter->state);
1831         ixgbe_napi_enable_all(adapter);
1832
1833         /* clear any pending interrupts, may auto mask */
1834         IXGBE_READ_REG(hw, IXGBE_EICR);
1835
1836         ixgbe_irq_enable(adapter);
1837
1838         /* bring the link up in the watchdog, this could race with our first
1839          * link up interrupt but shouldn't be a problem */
1840         mod_timer(&adapter->watchdog_timer, jiffies);
1841         return 0;
1842 }
1843
1844 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
1845 {
1846         WARN_ON(in_interrupt());
1847         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
1848                 msleep(1);
1849         ixgbe_down(adapter);
1850         ixgbe_up(adapter);
1851         clear_bit(__IXGBE_RESETTING, &adapter->state);
1852 }
1853
1854 int ixgbe_up(struct ixgbe_adapter *adapter)
1855 {
1856         /* hardware has been reset, we need to reload some things */
1857         ixgbe_configure(adapter);
1858
1859         return ixgbe_up_complete(adapter);
1860 }
1861
1862 void ixgbe_reset(struct ixgbe_adapter *adapter)
1863 {
1864         if (ixgbe_init_hw(&adapter->hw))
1865                 DPRINTK(PROBE, ERR, "Hardware Error\n");
1866
1867         /* reprogram the RAR[0] in case user changed it. */
1868         ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV);
1869
1870 }
1871
1872 #ifdef CONFIG_PM
1873 static int ixgbe_resume(struct pci_dev *pdev)
1874 {
1875         struct net_device *netdev = pci_get_drvdata(pdev);
1876         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1877         u32 err;
1878
1879         pci_set_power_state(pdev, PCI_D0);
1880         pci_restore_state(pdev);
1881         err = pci_enable_device(pdev);
1882         if (err) {
1883                 printk(KERN_ERR "ixgbe: Cannot enable PCI device from " \
1884                                 "suspend\n");
1885                 return err;
1886         }
1887         pci_set_master(pdev);
1888
1889         pci_enable_wake(pdev, PCI_D3hot, 0);
1890         pci_enable_wake(pdev, PCI_D3cold, 0);
1891
1892         if (netif_running(netdev)) {
1893                 err = ixgbe_request_irq(adapter);
1894                 if (err)
1895                         return err;
1896         }
1897
1898         ixgbe_reset(adapter);
1899
1900         if (netif_running(netdev))
1901                 ixgbe_up(adapter);
1902
1903         netif_device_attach(netdev);
1904
1905         return 0;
1906 }
1907 #endif
1908
1909 /**
1910  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
1911  * @adapter: board private structure
1912  * @rx_ring: ring to free buffers from
1913  **/
1914 static void ixgbe_clean_rx_ring(struct ixgbe_adapter *adapter,
1915                                 struct ixgbe_ring *rx_ring)
1916 {
1917         struct pci_dev *pdev = adapter->pdev;
1918         unsigned long size;
1919         unsigned int i;
1920
1921         /* Free all the Rx ring sk_buffs */
1922
1923         for (i = 0; i < rx_ring->count; i++) {
1924                 struct ixgbe_rx_buffer *rx_buffer_info;
1925
1926                 rx_buffer_info = &rx_ring->rx_buffer_info[i];
1927                 if (rx_buffer_info->dma) {
1928                         pci_unmap_single(pdev, rx_buffer_info->dma,
1929                                          adapter->rx_buf_len,
1930                                          PCI_DMA_FROMDEVICE);
1931                         rx_buffer_info->dma = 0;
1932                 }
1933                 if (rx_buffer_info->skb) {
1934                         dev_kfree_skb(rx_buffer_info->skb);
1935                         rx_buffer_info->skb = NULL;
1936                 }
1937                 if (!rx_buffer_info->page)
1938                         continue;
1939                 pci_unmap_page(pdev, rx_buffer_info->page_dma, PAGE_SIZE,
1940                                PCI_DMA_FROMDEVICE);
1941                 rx_buffer_info->page_dma = 0;
1942
1943                 put_page(rx_buffer_info->page);
1944                 rx_buffer_info->page = NULL;
1945         }
1946
1947         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
1948         memset(rx_ring->rx_buffer_info, 0, size);
1949
1950         /* Zero out the descriptor ring */
1951         memset(rx_ring->desc, 0, rx_ring->size);
1952
1953         rx_ring->next_to_clean = 0;
1954         rx_ring->next_to_use = 0;
1955
1956         writel(0, adapter->hw.hw_addr + rx_ring->head);
1957         writel(0, adapter->hw.hw_addr + rx_ring->tail);
1958 }
1959
1960 /**
1961  * ixgbe_clean_tx_ring - Free Tx Buffers
1962  * @adapter: board private structure
1963  * @tx_ring: ring to be cleaned
1964  **/
1965 static void ixgbe_clean_tx_ring(struct ixgbe_adapter *adapter,
1966                                 struct ixgbe_ring *tx_ring)
1967 {
1968         struct ixgbe_tx_buffer *tx_buffer_info;
1969         unsigned long size;
1970         unsigned int i;
1971
1972         /* Free all the Tx ring sk_buffs */
1973
1974         for (i = 0; i < tx_ring->count; i++) {
1975                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
1976                 ixgbe_unmap_and_free_tx_resource(adapter, tx_buffer_info);
1977         }
1978
1979         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
1980         memset(tx_ring->tx_buffer_info, 0, size);
1981
1982         /* Zero out the descriptor ring */
1983         memset(tx_ring->desc, 0, tx_ring->size);
1984
1985         tx_ring->next_to_use = 0;
1986         tx_ring->next_to_clean = 0;
1987
1988         writel(0, adapter->hw.hw_addr + tx_ring->head);
1989         writel(0, adapter->hw.hw_addr + tx_ring->tail);
1990 }
1991
1992 /**
1993  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
1994  * @adapter: board private structure
1995  **/
1996 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
1997 {
1998         int i;
1999
2000         for (i = 0; i < adapter->num_rx_queues; i++)
2001                 ixgbe_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2002 }
2003
2004 /**
2005  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
2006  * @adapter: board private structure
2007  **/
2008 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
2009 {
2010         int i;
2011
2012         for (i = 0; i < adapter->num_tx_queues; i++)
2013                 ixgbe_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2014 }
2015
2016 void ixgbe_down(struct ixgbe_adapter *adapter)
2017 {
2018         struct net_device *netdev = adapter->netdev;
2019         u32 rxctrl;
2020
2021         /* signal that we are down to the interrupt handler */
2022         set_bit(__IXGBE_DOWN, &adapter->state);
2023
2024         /* disable receives */
2025         rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);
2026         IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL,
2027                         rxctrl & ~IXGBE_RXCTRL_RXEN);
2028
2029         netif_tx_disable(netdev);
2030
2031         /* disable transmits in the hardware */
2032
2033         /* flush both disables */
2034         IXGBE_WRITE_FLUSH(&adapter->hw);
2035         msleep(10);
2036
2037         ixgbe_irq_disable(adapter);
2038
2039         ixgbe_napi_disable_all(adapter);
2040         del_timer_sync(&adapter->watchdog_timer);
2041
2042         netif_carrier_off(netdev);
2043         netif_tx_stop_all_queues(netdev);
2044
2045         if (!pci_channel_offline(adapter->pdev))
2046                 ixgbe_reset(adapter);
2047         ixgbe_clean_all_tx_rings(adapter);
2048         ixgbe_clean_all_rx_rings(adapter);
2049
2050 }
2051
2052 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
2053 {
2054         struct net_device *netdev = pci_get_drvdata(pdev);
2055         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2056 #ifdef CONFIG_PM
2057         int retval = 0;
2058 #endif
2059
2060         netif_device_detach(netdev);
2061
2062         if (netif_running(netdev)) {
2063                 ixgbe_down(adapter);
2064                 ixgbe_free_irq(adapter);
2065         }
2066
2067 #ifdef CONFIG_PM
2068         retval = pci_save_state(pdev);
2069         if (retval)
2070                 return retval;
2071 #endif
2072
2073         pci_enable_wake(pdev, PCI_D3hot, 0);
2074         pci_enable_wake(pdev, PCI_D3cold, 0);
2075
2076         ixgbe_release_hw_control(adapter);
2077
2078         pci_disable_device(pdev);
2079
2080         pci_set_power_state(pdev, pci_choose_state(pdev, state));
2081
2082         return 0;
2083 }
2084
2085 static void ixgbe_shutdown(struct pci_dev *pdev)
2086 {
2087         ixgbe_suspend(pdev, PMSG_SUSPEND);
2088 }
2089
2090 /**
2091  * ixgbe_poll - NAPI Rx polling callback
2092  * @napi: structure for representing this polling device
2093  * @budget: how many packets driver is allowed to clean
2094  *
2095  * This function is used for legacy and MSI, NAPI mode
2096  **/
2097 static int ixgbe_poll(struct napi_struct *napi, int budget)
2098 {
2099         struct ixgbe_q_vector *q_vector = container_of(napi,
2100                                           struct ixgbe_q_vector, napi);
2101         struct ixgbe_adapter *adapter = q_vector->adapter;
2102         int tx_cleaned = 0, work_done = 0;
2103
2104 #ifdef CONFIG_DCA
2105         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
2106                 ixgbe_update_tx_dca(adapter, adapter->tx_ring);
2107                 ixgbe_update_rx_dca(adapter, adapter->rx_ring);
2108         }
2109 #endif
2110
2111         tx_cleaned = ixgbe_clean_tx_irq(adapter, adapter->tx_ring);
2112         ixgbe_clean_rx_irq(adapter, adapter->rx_ring, &work_done, budget);
2113
2114         if (tx_cleaned)
2115                 work_done = budget;
2116
2117         /* If budget not fully consumed, exit the polling mode */
2118         if (work_done < budget) {
2119                 netif_rx_complete(adapter->netdev, napi);
2120                 if (adapter->rx_eitr < IXGBE_MIN_ITR_USECS)
2121                         ixgbe_set_itr(adapter);
2122                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2123                         ixgbe_irq_enable(adapter);
2124         }
2125
2126         return work_done;
2127 }
2128
2129 /**
2130  * ixgbe_tx_timeout - Respond to a Tx Hang
2131  * @netdev: network interface device structure
2132  **/
2133 static void ixgbe_tx_timeout(struct net_device *netdev)
2134 {
2135         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2136
2137         /* Do the reset outside of interrupt context */
2138         schedule_work(&adapter->reset_task);
2139 }
2140
2141 static void ixgbe_reset_task(struct work_struct *work)
2142 {
2143         struct ixgbe_adapter *adapter;
2144         adapter = container_of(work, struct ixgbe_adapter, reset_task);
2145
2146         adapter->tx_timeout_count++;
2147
2148         ixgbe_reinit_locked(adapter);
2149 }
2150
2151 static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter *adapter,
2152                                        int vectors)
2153 {
2154         int err, vector_threshold;
2155
2156         /* We'll want at least 3 (vector_threshold):
2157          * 1) TxQ[0] Cleanup
2158          * 2) RxQ[0] Cleanup
2159          * 3) Other (Link Status Change, etc.)
2160          * 4) TCP Timer (optional)
2161          */
2162         vector_threshold = MIN_MSIX_COUNT;
2163
2164         /* The more we get, the more we will assign to Tx/Rx Cleanup
2165          * for the separate queues...where Rx Cleanup >= Tx Cleanup.
2166          * Right now, we simply care about how many we'll get; we'll
2167          * set them up later while requesting irq's.
2168          */
2169         while (vectors >= vector_threshold) {
2170                 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
2171                                       vectors);
2172                 if (!err) /* Success in acquiring all requested vectors. */
2173                         break;
2174                 else if (err < 0)
2175                         vectors = 0; /* Nasty failure, quit now */
2176                 else /* err == number of vectors we should try again with */
2177                         vectors = err;
2178         }
2179
2180         if (vectors < vector_threshold) {
2181                 /* Can't allocate enough MSI-X interrupts?  Oh well.
2182                  * This just means we'll go with either a single MSI
2183                  * vector or fall back to legacy interrupts.
2184                  */
2185                 DPRINTK(HW, DEBUG, "Unable to allocate MSI-X interrupts\n");
2186                 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2187                 kfree(adapter->msix_entries);
2188                 adapter->msix_entries = NULL;
2189                 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2190                 adapter->num_tx_queues = 1;
2191                 adapter->num_rx_queues = 1;
2192         } else {
2193                 adapter->flags |= IXGBE_FLAG_MSIX_ENABLED; /* Woot! */
2194                 adapter->num_msix_vectors = vectors;
2195         }
2196 }
2197
2198 static void __devinit ixgbe_set_num_queues(struct ixgbe_adapter *adapter)
2199 {
2200         int nrq, ntq;
2201         int feature_mask = 0, rss_i, rss_m;
2202
2203         /* Number of supported queues */
2204         switch (adapter->hw.mac.type) {
2205         case ixgbe_mac_82598EB:
2206                 rss_i = adapter->ring_feature[RING_F_RSS].indices;
2207                 rss_m = 0;
2208                 feature_mask |= IXGBE_FLAG_RSS_ENABLED;
2209
2210                 switch (adapter->flags & feature_mask) {
2211                 case (IXGBE_FLAG_RSS_ENABLED):
2212                         rss_m = 0xF;
2213                         nrq = rss_i;
2214                         ntq = rss_i;
2215                         break;
2216                 case 0:
2217                 default:
2218                         rss_i = 0;
2219                         rss_m = 0;
2220                         nrq = 1;
2221                         ntq = 1;
2222                         break;
2223                 }
2224
2225                 adapter->ring_feature[RING_F_RSS].indices = rss_i;
2226                 adapter->ring_feature[RING_F_RSS].mask = rss_m;
2227                 break;
2228         default:
2229                 nrq = 1;
2230                 ntq = 1;
2231                 break;
2232         }
2233
2234         adapter->num_rx_queues = nrq;
2235         adapter->num_tx_queues = ntq;
2236 }
2237
2238 /**
2239  * ixgbe_cache_ring_register - Descriptor ring to register mapping
2240  * @adapter: board private structure to initialize
2241  *
2242  * Once we know the feature-set enabled for the device, we'll cache
2243  * the register offset the descriptor ring is assigned to.
2244  **/
2245 static void __devinit ixgbe_cache_ring_register(struct ixgbe_adapter *adapter)
2246 {
2247         /* TODO: Remove all uses of the indices in the cases where multiple
2248          *       features are OR'd together, if the feature set makes sense.
2249          */
2250         int feature_mask = 0, rss_i;
2251         int i, txr_idx, rxr_idx;
2252
2253         /* Number of supported queues */
2254         switch (adapter->hw.mac.type) {
2255         case ixgbe_mac_82598EB:
2256                 rss_i = adapter->ring_feature[RING_F_RSS].indices;
2257                 txr_idx = 0;
2258                 rxr_idx = 0;
2259                 feature_mask |= IXGBE_FLAG_RSS_ENABLED;
2260                 switch (adapter->flags & feature_mask) {
2261                 case (IXGBE_FLAG_RSS_ENABLED):
2262                         for (i = 0; i < adapter->num_rx_queues; i++)
2263                                 adapter->rx_ring[i].reg_idx = i;
2264                         for (i = 0; i < adapter->num_tx_queues; i++)
2265                                 adapter->tx_ring[i].reg_idx = i;
2266                         break;
2267                 case 0:
2268                 default:
2269                         break;
2270                 }
2271                 break;
2272         default:
2273                 break;
2274         }
2275 }
2276
2277 /**
2278  * ixgbe_alloc_queues - Allocate memory for all rings
2279  * @adapter: board private structure to initialize
2280  *
2281  * We allocate one ring per queue at run-time since we don't know the
2282  * number of queues at compile-time.  The polling_netdev array is
2283  * intended for Multiqueue, but should work fine with a single queue.
2284  **/
2285 static int __devinit ixgbe_alloc_queues(struct ixgbe_adapter *adapter)
2286 {
2287         int i;
2288
2289         adapter->tx_ring = kcalloc(adapter->num_tx_queues,
2290                                    sizeof(struct ixgbe_ring), GFP_KERNEL);
2291         if (!adapter->tx_ring)
2292                 goto err_tx_ring_allocation;
2293
2294         adapter->rx_ring = kcalloc(adapter->num_rx_queues,
2295                                    sizeof(struct ixgbe_ring), GFP_KERNEL);
2296         if (!adapter->rx_ring)
2297                 goto err_rx_ring_allocation;
2298
2299         for (i = 0; i < adapter->num_tx_queues; i++) {
2300                 adapter->tx_ring[i].count = IXGBE_DEFAULT_TXD;
2301                 adapter->tx_ring[i].queue_index = i;
2302         }
2303         for (i = 0; i < adapter->num_rx_queues; i++) {
2304                 adapter->rx_ring[i].count = IXGBE_DEFAULT_RXD;
2305                 adapter->rx_ring[i].queue_index = i;
2306         }
2307
2308         ixgbe_cache_ring_register(adapter);
2309
2310         return 0;
2311
2312 err_rx_ring_allocation:
2313         kfree(adapter->tx_ring);
2314 err_tx_ring_allocation:
2315         return -ENOMEM;
2316 }
2317
2318 /**
2319  * ixgbe_set_interrupt_capability - set MSI-X or MSI if supported
2320  * @adapter: board private structure to initialize
2321  *
2322  * Attempt to configure the interrupts using the best available
2323  * capabilities of the hardware and the kernel.
2324  **/
2325 static int __devinit ixgbe_set_interrupt_capability(struct ixgbe_adapter
2326                                                     *adapter)
2327 {
2328         int err = 0;
2329         int vector, v_budget;
2330
2331         /*
2332          * It's easy to be greedy for MSI-X vectors, but it really
2333          * doesn't do us much good if we have a lot more vectors
2334          * than CPU's.  So let's be conservative and only ask for
2335          * (roughly) twice the number of vectors as there are CPU's.
2336          */
2337         v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues,
2338                        (int)(num_online_cpus() * 2)) + NON_Q_VECTORS;
2339
2340         /*
2341          * At the same time, hardware can only support a maximum of
2342          * MAX_MSIX_COUNT vectors.  With features such as RSS and VMDq,
2343          * we can easily reach upwards of 64 Rx descriptor queues and
2344          * 32 Tx queues.  Thus, we cap it off in those rare cases where
2345          * the cpu count also exceeds our vector limit.
2346          */
2347         v_budget = min(v_budget, MAX_MSIX_COUNT);
2348
2349         /* A failure in MSI-X entry allocation isn't fatal, but it does
2350          * mean we disable MSI-X capabilities of the adapter. */
2351         adapter->msix_entries = kcalloc(v_budget,
2352                                         sizeof(struct msix_entry), GFP_KERNEL);
2353         if (!adapter->msix_entries) {
2354                 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2355                 ixgbe_set_num_queues(adapter);
2356                 kfree(adapter->tx_ring);
2357                 kfree(adapter->rx_ring);
2358                 err = ixgbe_alloc_queues(adapter);
2359                 if (err) {
2360                         DPRINTK(PROBE, ERR, "Unable to allocate memory "
2361                                             "for queues\n");
2362                         goto out;
2363                 }
2364
2365                 goto try_msi;
2366         }
2367
2368         for (vector = 0; vector < v_budget; vector++)
2369                 adapter->msix_entries[vector].entry = vector;
2370
2371         ixgbe_acquire_msix_vectors(adapter, v_budget);
2372
2373         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2374                 goto out;
2375
2376 try_msi:
2377         err = pci_enable_msi(adapter->pdev);
2378         if (!err) {
2379                 adapter->flags |= IXGBE_FLAG_MSI_ENABLED;
2380         } else {
2381                 DPRINTK(HW, DEBUG, "Unable to allocate MSI interrupt, "
2382                                    "falling back to legacy.  Error: %d\n", err);
2383                 /* reset err */
2384                 err = 0;
2385         }
2386
2387 out:
2388         /* Notify the stack of the (possibly) reduced Tx Queue count. */
2389         adapter->netdev->real_num_tx_queues = adapter->num_tx_queues;
2390
2391         return err;
2392 }
2393
2394 static void ixgbe_reset_interrupt_capability(struct ixgbe_adapter *adapter)
2395 {
2396         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2397                 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2398                 pci_disable_msix(adapter->pdev);
2399                 kfree(adapter->msix_entries);
2400                 adapter->msix_entries = NULL;
2401         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
2402                 adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED;
2403                 pci_disable_msi(adapter->pdev);
2404         }
2405         return;
2406 }
2407
2408 /**
2409  * ixgbe_init_interrupt_scheme - Determine proper interrupt scheme
2410  * @adapter: board private structure to initialize
2411  *
2412  * We determine which interrupt scheme to use based on...
2413  * - Kernel support (MSI, MSI-X)
2414  *   - which can be user-defined (via MODULE_PARAM)
2415  * - Hardware queue count (num_*_queues)
2416  *   - defined by miscellaneous hardware support/features (RSS, etc.)
2417  **/
2418 static int __devinit ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter)
2419 {
2420         int err;
2421
2422         /* Number of supported queues */
2423         ixgbe_set_num_queues(adapter);
2424
2425         err = ixgbe_alloc_queues(adapter);
2426         if (err) {
2427                 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
2428                 goto err_alloc_queues;
2429         }
2430
2431         err = ixgbe_set_interrupt_capability(adapter);
2432         if (err) {
2433                 DPRINTK(PROBE, ERR, "Unable to setup interrupt capabilities\n");
2434                 goto err_set_interrupt;
2435         }
2436
2437         DPRINTK(DRV, INFO, "Multiqueue %s: Rx Queue count = %u, "
2438                            "Tx Queue count = %u\n",
2439                 (adapter->num_rx_queues > 1) ? "Enabled" :
2440                 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2441
2442         set_bit(__IXGBE_DOWN, &adapter->state);
2443
2444         return 0;
2445
2446 err_set_interrupt:
2447         kfree(adapter->tx_ring);
2448         kfree(adapter->rx_ring);
2449 err_alloc_queues:
2450         return err;
2451 }
2452
2453 /**
2454  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
2455  * @adapter: board private structure to initialize
2456  *
2457  * ixgbe_sw_init initializes the Adapter private data structure.
2458  * Fields are initialized based on PCI device information and
2459  * OS network device settings (MTU size).
2460  **/
2461 static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
2462 {
2463         struct ixgbe_hw *hw = &adapter->hw;
2464         struct pci_dev *pdev = adapter->pdev;
2465         unsigned int rss;
2466
2467         /* Set capability flags */
2468         rss = min(IXGBE_MAX_RSS_INDICES, (int)num_online_cpus());
2469         adapter->ring_feature[RING_F_RSS].indices = rss;
2470         adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
2471
2472         /* Enable Dynamic interrupt throttling by default */
2473         adapter->rx_eitr = 1;
2474         adapter->tx_eitr = 1;
2475
2476         /* default flow control settings */
2477         hw->fc.original_type = ixgbe_fc_none;
2478         hw->fc.type = ixgbe_fc_none;
2479         hw->fc.high_water = IXGBE_DEFAULT_FCRTH;
2480         hw->fc.low_water = IXGBE_DEFAULT_FCRTL;
2481         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
2482         hw->fc.send_xon = true;
2483
2484         /* select 10G link by default */
2485         hw->mac.link_mode_select = IXGBE_AUTOC_LMS_10G_LINK_NO_AN;
2486         if (hw->mac.ops.reset(hw)) {
2487                 dev_err(&pdev->dev, "HW Init failed\n");
2488                 return -EIO;
2489         }
2490         if (hw->mac.ops.setup_link_speed(hw, IXGBE_LINK_SPEED_10GB_FULL, true,
2491                                          false)) {
2492                 dev_err(&pdev->dev, "Link Speed setup failed\n");
2493                 return -EIO;
2494         }
2495
2496         /* initialize eeprom parameters */
2497         if (ixgbe_init_eeprom(hw)) {
2498                 dev_err(&pdev->dev, "EEPROM initialization failed\n");
2499                 return -EIO;
2500         }
2501
2502         /* enable rx csum by default */
2503         adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
2504
2505         set_bit(__IXGBE_DOWN, &adapter->state);
2506
2507         return 0;
2508 }
2509
2510 /**
2511  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
2512  * @adapter: board private structure
2513  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
2514  *
2515  * Return 0 on success, negative on failure
2516  **/
2517 int ixgbe_setup_tx_resources(struct ixgbe_adapter *adapter,
2518                              struct ixgbe_ring *tx_ring)
2519 {
2520         struct pci_dev *pdev = adapter->pdev;
2521         int size;
2522
2523         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
2524         tx_ring->tx_buffer_info = vmalloc(size);
2525         if (!tx_ring->tx_buffer_info)
2526                 goto err;
2527         memset(tx_ring->tx_buffer_info, 0, size);
2528
2529         /* round up to nearest 4K */
2530         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc) +
2531                         sizeof(u32);
2532         tx_ring->size = ALIGN(tx_ring->size, 4096);
2533
2534         tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
2535                                              &tx_ring->dma);
2536         if (!tx_ring->desc)
2537                 goto err;
2538
2539         tx_ring->next_to_use = 0;
2540         tx_ring->next_to_clean = 0;
2541         tx_ring->work_limit = tx_ring->count;
2542         return 0;
2543
2544 err:
2545         vfree(tx_ring->tx_buffer_info);
2546         tx_ring->tx_buffer_info = NULL;
2547         DPRINTK(PROBE, ERR, "Unable to allocate memory for the transmit "
2548                             "descriptor ring\n");
2549         return -ENOMEM;
2550 }
2551
2552 /**
2553  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
2554  * @adapter: board private structure
2555  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
2556  *
2557  * Returns 0 on success, negative on failure
2558  **/
2559 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
2560                              struct ixgbe_ring *rx_ring)
2561 {
2562         struct pci_dev *pdev = adapter->pdev;
2563         int size;
2564
2565         size = sizeof(struct net_lro_desc) * IXGBE_MAX_LRO_DESCRIPTORS;
2566         rx_ring->lro_mgr.lro_arr = vmalloc(size);
2567         if (!rx_ring->lro_mgr.lro_arr)
2568                 return -ENOMEM;
2569         memset(rx_ring->lro_mgr.lro_arr, 0, size);
2570
2571         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
2572         rx_ring->rx_buffer_info = vmalloc(size);
2573         if (!rx_ring->rx_buffer_info) {
2574                 DPRINTK(PROBE, ERR,
2575                         "vmalloc allocation failed for the rx desc ring\n");
2576                 goto alloc_failed;
2577         }
2578         memset(rx_ring->rx_buffer_info, 0, size);
2579
2580         /* Round up to nearest 4K */
2581         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
2582         rx_ring->size = ALIGN(rx_ring->size, 4096);
2583
2584         rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size, &rx_ring->dma);
2585
2586         if (!rx_ring->desc) {
2587                 DPRINTK(PROBE, ERR,
2588                         "Memory allocation failed for the rx desc ring\n");
2589                 vfree(rx_ring->rx_buffer_info);
2590                 goto alloc_failed;
2591         }
2592
2593         rx_ring->next_to_clean = 0;
2594         rx_ring->next_to_use = 0;
2595
2596         return 0;
2597
2598 alloc_failed:
2599         vfree(rx_ring->lro_mgr.lro_arr);
2600         rx_ring->lro_mgr.lro_arr = NULL;
2601         return -ENOMEM;
2602 }
2603
2604 /**
2605  * ixgbe_free_tx_resources - Free Tx Resources per Queue
2606  * @adapter: board private structure
2607  * @tx_ring: Tx descriptor ring for a specific queue
2608  *
2609  * Free all transmit software resources
2610  **/
2611 static void ixgbe_free_tx_resources(struct ixgbe_adapter *adapter,
2612                                     struct ixgbe_ring *tx_ring)
2613 {
2614         struct pci_dev *pdev = adapter->pdev;
2615
2616         ixgbe_clean_tx_ring(adapter, tx_ring);
2617
2618         vfree(tx_ring->tx_buffer_info);
2619         tx_ring->tx_buffer_info = NULL;
2620
2621         pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2622
2623         tx_ring->desc = NULL;
2624 }
2625
2626 /**
2627  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
2628  * @adapter: board private structure
2629  *
2630  * Free all transmit software resources
2631  **/
2632 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
2633 {
2634         int i;
2635
2636         for (i = 0; i < adapter->num_tx_queues; i++)
2637                 ixgbe_free_tx_resources(adapter, &adapter->tx_ring[i]);
2638 }
2639
2640 /**
2641  * ixgbe_free_rx_resources - Free Rx Resources
2642  * @adapter: board private structure
2643  * @rx_ring: ring to clean the resources from
2644  *
2645  * Free all receive software resources
2646  **/
2647 static void ixgbe_free_rx_resources(struct ixgbe_adapter *adapter,
2648                                     struct ixgbe_ring *rx_ring)
2649 {
2650         struct pci_dev *pdev = adapter->pdev;
2651
2652         vfree(rx_ring->lro_mgr.lro_arr);
2653         rx_ring->lro_mgr.lro_arr = NULL;
2654
2655         ixgbe_clean_rx_ring(adapter, rx_ring);
2656
2657         vfree(rx_ring->rx_buffer_info);
2658         rx_ring->rx_buffer_info = NULL;
2659
2660         pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2661
2662         rx_ring->desc = NULL;
2663 }
2664
2665 /**
2666  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
2667  * @adapter: board private structure
2668  *
2669  * Free all receive software resources
2670  **/
2671 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
2672 {
2673         int i;
2674
2675         for (i = 0; i < adapter->num_rx_queues; i++)
2676                 ixgbe_free_rx_resources(adapter, &adapter->rx_ring[i]);
2677 }
2678
2679 /**
2680  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
2681  * @adapter: board private structure
2682  *
2683  * If this function returns with an error, then it's possible one or
2684  * more of the rings is populated (while the rest are not).  It is the
2685  * callers duty to clean those orphaned rings.
2686  *
2687  * Return 0 on success, negative on failure
2688  **/
2689 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
2690 {
2691         int i, err = 0;
2692
2693         for (i = 0; i < adapter->num_tx_queues; i++) {
2694                 err = ixgbe_setup_tx_resources(adapter, &adapter->tx_ring[i]);
2695                 if (err) {
2696                         DPRINTK(PROBE, ERR,
2697                                 "Allocation for Tx Queue %u failed\n", i);
2698                         break;
2699                 }
2700         }
2701
2702         return err;
2703 }
2704
2705 /**
2706  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
2707  * @adapter: board private structure
2708  *
2709  * If this function returns with an error, then it's possible one or
2710  * more of the rings is populated (while the rest are not).  It is the
2711  * callers duty to clean those orphaned rings.
2712  *
2713  * Return 0 on success, negative on failure
2714  **/
2715
2716 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
2717 {
2718         int i, err = 0;
2719
2720         for (i = 0; i < adapter->num_rx_queues; i++) {
2721                 err = ixgbe_setup_rx_resources(adapter, &adapter->rx_ring[i]);
2722                 if (err) {
2723                         DPRINTK(PROBE, ERR,
2724                                 "Allocation for Rx Queue %u failed\n", i);
2725                         break;
2726                 }
2727         }
2728
2729         return err;
2730 }
2731
2732 /**
2733  * ixgbe_change_mtu - Change the Maximum Transfer Unit
2734  * @netdev: network interface device structure
2735  * @new_mtu: new value for maximum frame size
2736  *
2737  * Returns 0 on success, negative on failure
2738  **/
2739 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
2740 {
2741         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2742         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
2743
2744         if ((max_frame < (ETH_ZLEN + ETH_FCS_LEN)) ||
2745             (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
2746                 return -EINVAL;
2747
2748         DPRINTK(PROBE, INFO, "changing MTU from %d to %d\n",
2749                 netdev->mtu, new_mtu);
2750         /* must set new MTU before calling down or up */
2751         netdev->mtu = new_mtu;
2752
2753         if (netif_running(netdev))
2754                 ixgbe_reinit_locked(adapter);
2755
2756         return 0;
2757 }
2758
2759 /**
2760  * ixgbe_open - Called when a network interface is made active
2761  * @netdev: network interface device structure
2762  *
2763  * Returns 0 on success, negative value on failure
2764  *
2765  * The open entry point is called when a network interface is made
2766  * active by the system (IFF_UP).  At this point all resources needed
2767  * for transmit and receive operations are allocated, the interrupt
2768  * handler is registered with the OS, the watchdog timer is started,
2769  * and the stack is notified that the interface is ready.
2770  **/
2771 static int ixgbe_open(struct net_device *netdev)
2772 {
2773         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2774         int err;
2775
2776         /* disallow open during test */
2777         if (test_bit(__IXGBE_TESTING, &adapter->state))
2778                 return -EBUSY;
2779
2780         /* allocate transmit descriptors */
2781         err = ixgbe_setup_all_tx_resources(adapter);
2782         if (err)
2783                 goto err_setup_tx;
2784
2785         /* allocate receive descriptors */
2786         err = ixgbe_setup_all_rx_resources(adapter);
2787         if (err)
2788                 goto err_setup_rx;
2789
2790         ixgbe_configure(adapter);
2791
2792         err = ixgbe_request_irq(adapter);
2793         if (err)
2794                 goto err_req_irq;
2795
2796         err = ixgbe_up_complete(adapter);
2797         if (err)
2798                 goto err_up;
2799
2800         netif_tx_start_all_queues(netdev);
2801
2802         return 0;
2803
2804 err_up:
2805         ixgbe_release_hw_control(adapter);
2806         ixgbe_free_irq(adapter);
2807 err_req_irq:
2808         ixgbe_free_all_rx_resources(adapter);
2809 err_setup_rx:
2810         ixgbe_free_all_tx_resources(adapter);
2811 err_setup_tx:
2812         ixgbe_reset(adapter);
2813
2814         return err;
2815 }
2816
2817 /**
2818  * ixgbe_close - Disables a network interface
2819  * @netdev: network interface device structure
2820  *
2821  * Returns 0, this is not allowed to fail
2822  *
2823  * The close entry point is called when an interface is de-activated
2824  * by the OS.  The hardware is still under the drivers control, but
2825  * needs to be disabled.  A global MAC reset is issued to stop the
2826  * hardware, and all transmit and receive resources are freed.
2827  **/
2828 static int ixgbe_close(struct net_device *netdev)
2829 {
2830         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2831
2832         ixgbe_down(adapter);
2833         ixgbe_free_irq(adapter);
2834
2835         ixgbe_free_all_tx_resources(adapter);
2836         ixgbe_free_all_rx_resources(adapter);
2837
2838         ixgbe_release_hw_control(adapter);
2839
2840         return 0;
2841 }
2842
2843 /**
2844  * ixgbe_update_stats - Update the board statistics counters.
2845  * @adapter: board private structure
2846  **/
2847 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
2848 {
2849         struct ixgbe_hw *hw = &adapter->hw;
2850         u64 total_mpc = 0;
2851         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
2852
2853         adapter->stats.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
2854         for (i = 0; i < 8; i++) {
2855                 /* for packet buffers not used, the register should read 0 */
2856                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
2857                 missed_rx += mpc;
2858                 adapter->stats.mpc[i] += mpc;
2859                 total_mpc += adapter->stats.mpc[i];
2860                 adapter->stats.rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
2861         }
2862         adapter->stats.gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
2863         /* work around hardware counting issue */
2864         adapter->stats.gprc -= missed_rx;
2865
2866         /* 82598 hardware only has a 32 bit counter in the high register */
2867         adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
2868         adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
2869         adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORH);
2870         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
2871         adapter->stats.bprc += bprc;
2872         adapter->stats.mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
2873         adapter->stats.mprc -= bprc;
2874         adapter->stats.roc += IXGBE_READ_REG(hw, IXGBE_ROC);
2875         adapter->stats.prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
2876         adapter->stats.prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
2877         adapter->stats.prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
2878         adapter->stats.prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
2879         adapter->stats.prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
2880         adapter->stats.prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
2881         adapter->stats.rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
2882         adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
2883         adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
2884         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
2885         adapter->stats.lxontxc += lxon;
2886         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
2887         adapter->stats.lxofftxc += lxoff;
2888         adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
2889         adapter->stats.gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
2890         adapter->stats.mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
2891         /*
2892          * 82598 errata - tx of flow control packets is included in tx counters
2893          */
2894         xon_off_tot = lxon + lxoff;
2895         adapter->stats.gptc -= xon_off_tot;
2896         adapter->stats.mptc -= xon_off_tot;
2897         adapter->stats.gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
2898         adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
2899         adapter->stats.rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
2900         adapter->stats.rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
2901         adapter->stats.tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
2902         adapter->stats.ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
2903         adapter->stats.ptc64 -= xon_off_tot;
2904         adapter->stats.ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
2905         adapter->stats.ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
2906         adapter->stats.ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
2907         adapter->stats.ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
2908         adapter->stats.ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
2909         adapter->stats.bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
2910
2911         /* Fill out the OS statistics structure */
2912         adapter->net_stats.multicast = adapter->stats.mprc;
2913
2914         /* Rx Errors */
2915         adapter->net_stats.rx_errors = adapter->stats.crcerrs +
2916                                                 adapter->stats.rlec;
2917         adapter->net_stats.rx_dropped = 0;
2918         adapter->net_stats.rx_length_errors = adapter->stats.rlec;
2919         adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
2920         adapter->net_stats.rx_missed_errors = total_mpc;
2921 }
2922
2923 /**
2924  * ixgbe_watchdog - Timer Call-back
2925  * @data: pointer to adapter cast into an unsigned long
2926  **/
2927 static void ixgbe_watchdog(unsigned long data)
2928 {
2929         struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
2930         struct net_device *netdev = adapter->netdev;
2931         bool link_up;
2932         u32 link_speed = 0;
2933
2934         adapter->hw.mac.ops.check_link(&adapter->hw, &(link_speed), &link_up);
2935
2936         if (link_up) {
2937                 if (!netif_carrier_ok(netdev)) {
2938                         u32 frctl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
2939                         u32 rmcs = IXGBE_READ_REG(&adapter->hw, IXGBE_RMCS);
2940 #define FLOW_RX (frctl & IXGBE_FCTRL_RFCE)
2941 #define FLOW_TX (rmcs & IXGBE_RMCS_TFCE_802_3X)
2942                         DPRINTK(LINK, INFO, "NIC Link is Up %s, "
2943                                 "Flow Control: %s\n",
2944                                 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
2945                                  "10 Gbps" :
2946                                  (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
2947                                   "1 Gbps" : "unknown speed")),
2948                                 ((FLOW_RX && FLOW_TX) ? "RX/TX" :
2949                                  (FLOW_RX ? "RX" :
2950                                  (FLOW_TX ? "TX" : "None"))));
2951
2952                         netif_carrier_on(netdev);
2953                         netif_tx_wake_all_queues(netdev);
2954                 } else {
2955                         /* Force detection of hung controller */
2956                         adapter->detect_tx_hung = true;
2957                 }
2958         } else {
2959                 if (netif_carrier_ok(netdev)) {
2960                         DPRINTK(LINK, INFO, "NIC Link is Down\n");
2961                         netif_carrier_off(netdev);
2962                         netif_tx_stop_all_queues(netdev);
2963                 }
2964         }
2965
2966         ixgbe_update_stats(adapter);
2967
2968         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2969                 /* Cause software interrupt to ensure rx rings are cleaned */
2970                 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2971                         u32 eics =
2972                          (1 << (adapter->num_msix_vectors - NON_Q_VECTORS)) - 1;
2973                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, eics);
2974                 } else {
2975                         /* for legacy and MSI interrupts don't set any bits that
2976                          * are enabled for EIAM, because this operation would
2977                          * set *both* EIMS and EICS for any bit in EIAM */
2978                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
2979                                      (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
2980                 }
2981                 /* Reset the timer */
2982                 mod_timer(&adapter->watchdog_timer,
2983                           round_jiffies(jiffies + 2 * HZ));
2984         }
2985 }
2986
2987 static int ixgbe_tso(struct ixgbe_adapter *adapter,
2988                          struct ixgbe_ring *tx_ring, struct sk_buff *skb,
2989                          u32 tx_flags, u8 *hdr_len)
2990 {
2991         struct ixgbe_adv_tx_context_desc *context_desc;
2992         unsigned int i;
2993         int err;
2994         struct ixgbe_tx_buffer *tx_buffer_info;
2995         u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
2996         u32 mss_l4len_idx = 0, l4len;
2997
2998         if (skb_is_gso(skb)) {
2999                 if (skb_header_cloned(skb)) {
3000                         err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
3001                         if (err)
3002                                 return err;
3003                 }
3004                 l4len = tcp_hdrlen(skb);
3005                 *hdr_len += l4len;
3006
3007                 if (skb->protocol == htons(ETH_P_IP)) {
3008                         struct iphdr *iph = ip_hdr(skb);
3009                         iph->tot_len = 0;
3010                         iph->check = 0;
3011                         tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
3012                                                                  iph->daddr, 0,
3013                                                                  IPPROTO_TCP,
3014                                                                  0);
3015                         adapter->hw_tso_ctxt++;
3016                 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
3017                         ipv6_hdr(skb)->payload_len = 0;
3018                         tcp_hdr(skb)->check =
3019                             ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3020                                              &ipv6_hdr(skb)->daddr,
3021                                              0, IPPROTO_TCP, 0);
3022                         adapter->hw_tso6_ctxt++;
3023                 }
3024
3025                 i = tx_ring->next_to_use;
3026
3027                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3028                 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
3029
3030                 /* VLAN MACLEN IPLEN */
3031                 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3032                         vlan_macip_lens |=
3033                             (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
3034                 vlan_macip_lens |= ((skb_network_offset(skb)) <<
3035                                     IXGBE_ADVTXD_MACLEN_SHIFT);
3036                 *hdr_len += skb_network_offset(skb);
3037                 vlan_macip_lens |=
3038                     (skb_transport_header(skb) - skb_network_header(skb));
3039                 *hdr_len +=
3040                     (skb_transport_header(skb) - skb_network_header(skb));
3041                 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3042                 context_desc->seqnum_seed = 0;
3043
3044                 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3045                 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
3046                                     IXGBE_ADVTXD_DTYP_CTXT);
3047
3048                 if (skb->protocol == htons(ETH_P_IP))
3049                         type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
3050                 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
3051                 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
3052
3053                 /* MSS L4LEN IDX */
3054                 mss_l4len_idx |=
3055                     (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
3056                 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
3057                 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
3058
3059                 tx_buffer_info->time_stamp = jiffies;
3060                 tx_buffer_info->next_to_watch = i;
3061
3062                 i++;
3063                 if (i == tx_ring->count)
3064                         i = 0;
3065                 tx_ring->next_to_use = i;
3066
3067                 return true;
3068         }
3069         return false;
3070 }
3071
3072 static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
3073                                    struct ixgbe_ring *tx_ring,
3074                                    struct sk_buff *skb, u32 tx_flags)
3075 {
3076         struct ixgbe_adv_tx_context_desc *context_desc;
3077         unsigned int i;
3078         struct ixgbe_tx_buffer *tx_buffer_info;
3079         u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
3080
3081         if (skb->ip_summed == CHECKSUM_PARTIAL ||
3082             (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
3083                 i = tx_ring->next_to_use;
3084                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3085                 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
3086
3087                 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3088                         vlan_macip_lens |=
3089                             (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
3090                 vlan_macip_lens |= (skb_network_offset(skb) <<
3091                                     IXGBE_ADVTXD_MACLEN_SHIFT);
3092                 if (skb->ip_summed == CHECKSUM_PARTIAL)
3093                         vlan_macip_lens |= (skb_transport_header(skb) -
3094                                             skb_network_header(skb));
3095
3096                 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3097                 context_desc->seqnum_seed = 0;
3098
3099                 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
3100                                     IXGBE_ADVTXD_DTYP_CTXT);
3101
3102                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
3103                         switch (skb->protocol) {
3104                         case __constant_htons(ETH_P_IP):
3105                                 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
3106                                 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
3107                                         type_tucmd_mlhl |=
3108                                                 IXGBE_ADVTXD_TUCMD_L4T_TCP;
3109                                 break;
3110
3111                         case __constant_htons(ETH_P_IPV6):
3112                                 /* XXX what about other V6 headers?? */
3113                                 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
3114                                         type_tucmd_mlhl |=
3115                                                 IXGBE_ADVTXD_TUCMD_L4T_TCP;
3116                                 break;
3117
3118                         default:
3119                                 if (unlikely(net_ratelimit())) {
3120                                         DPRINTK(PROBE, WARNING,
3121                                          "partial checksum but proto=%x!\n",
3122                                          skb->protocol);
3123                                 }
3124                                 break;
3125                         }
3126                 }
3127
3128                 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
3129                 context_desc->mss_l4len_idx = 0;
3130
3131                 tx_buffer_info->time_stamp = jiffies;
3132                 tx_buffer_info->next_to_watch = i;
3133                 adapter->hw_csum_tx_good++;
3134                 i++;
3135                 if (i == tx_ring->count)
3136                         i = 0;
3137                 tx_ring->next_to_use = i;
3138
3139                 return true;
3140         }
3141         return false;
3142 }
3143
3144 static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
3145                         struct ixgbe_ring *tx_ring,
3146                         struct sk_buff *skb, unsigned int first)
3147 {
3148         struct ixgbe_tx_buffer *tx_buffer_info;
3149         unsigned int len = skb->len;
3150         unsigned int offset = 0, size, count = 0, i;
3151         unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
3152         unsigned int f;
3153
3154         len -= skb->data_len;
3155
3156         i = tx_ring->next_to_use;
3157
3158         while (len) {
3159                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3160                 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
3161
3162                 tx_buffer_info->length = size;
3163                 tx_buffer_info->dma = pci_map_single(adapter->pdev,
3164                                                   skb->data + offset,
3165                                                   size, PCI_DMA_TODEVICE);
3166                 tx_buffer_info->time_stamp = jiffies;
3167                 tx_buffer_info->next_to_watch = i;
3168
3169                 len -= size;
3170                 offset += size;
3171                 count++;
3172                 i++;
3173                 if (i == tx_ring->count)
3174                         i = 0;
3175         }
3176
3177         for (f = 0; f < nr_frags; f++) {
3178                 struct skb_frag_struct *frag;
3179
3180                 frag = &skb_shinfo(skb)->frags[f];
3181                 len = frag->size;
3182                 offset = frag->page_offset;
3183
3184                 while (len) {
3185                         tx_buffer_info = &tx_ring->tx_buffer_info[i];
3186                         size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
3187
3188                         tx_buffer_info->length = size;
3189                         tx_buffer_info->dma = pci_map_page(adapter->pdev,
3190                                                         frag->page,
3191                                                         offset,
3192                                                         size, PCI_DMA_TODEVICE);
3193                         tx_buffer_info->time_stamp = jiffies;
3194                         tx_buffer_info->next_to_watch = i;
3195
3196                         len -= size;
3197                         offset += size;
3198                         count++;
3199                         i++;
3200                         if (i == tx_ring->count)
3201                                 i = 0;
3202                 }
3203         }
3204         if (i == 0)
3205                 i = tx_ring->count - 1;
3206         else
3207                 i = i - 1;
3208         tx_ring->tx_buffer_info[i].skb = skb;
3209         tx_ring->tx_buffer_info[first].next_to_watch = i;
3210
3211         return count;
3212 }
3213
3214 static void ixgbe_tx_queue(struct ixgbe_adapter *adapter,
3215                                struct ixgbe_ring *tx_ring,
3216                                int tx_flags, int count, u32 paylen, u8 hdr_len)
3217 {
3218         union ixgbe_adv_tx_desc *tx_desc = NULL;
3219         struct ixgbe_tx_buffer *tx_buffer_info;
3220         u32 olinfo_status = 0, cmd_type_len = 0;
3221         unsigned int i;
3222         u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
3223
3224         cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
3225
3226         cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
3227
3228         if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3229                 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
3230
3231         if (tx_flags & IXGBE_TX_FLAGS_TSO) {
3232                 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
3233
3234                 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3235                                                 IXGBE_ADVTXD_POPTS_SHIFT;
3236
3237                 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3238                         olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
3239                                                 IXGBE_ADVTXD_POPTS_SHIFT;
3240
3241         } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3242                 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3243                                                 IXGBE_ADVTXD_POPTS_SHIFT;
3244
3245         olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
3246
3247         i = tx_ring->next_to_use;
3248         while (count--) {
3249                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3250                 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
3251                 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
3252                 tx_desc->read.cmd_type_len =
3253                         cpu_to_le32(cmd_type_len | tx_buffer_info->length);
3254                 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
3255
3256                 i++;
3257                 if (i == tx_ring->count)
3258                         i = 0;
3259         }
3260
3261         tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
3262
3263         /*
3264          * Force memory writes to complete before letting h/w
3265          * know there are new descriptors to fetch.  (Only
3266          * applicable for weak-ordered memory model archs,
3267          * such as IA-64).
3268          */
3269         wmb();
3270
3271         tx_ring->next_to_use = i;
3272         writel(i, adapter->hw.hw_addr + tx_ring->tail);
3273 }
3274
3275 static int __ixgbe_maybe_stop_tx(struct net_device *netdev,
3276                                  struct ixgbe_ring *tx_ring, int size)
3277 {
3278         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3279
3280         netif_stop_subqueue(netdev, tx_ring->queue_index);
3281         /* Herbert's original patch had:
3282          *  smp_mb__after_netif_stop_queue();
3283          * but since that doesn't exist yet, just open code it. */
3284         smp_mb();
3285
3286         /* We need to check again in a case another CPU has just
3287          * made room available. */
3288         if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
3289                 return -EBUSY;
3290
3291         /* A reprieve! - use start_queue because it doesn't call schedule */
3292         netif_wake_subqueue(netdev, tx_ring->queue_index);
3293         ++adapter->restart_queue;
3294         return 0;
3295 }
3296
3297 static int ixgbe_maybe_stop_tx(struct net_device *netdev,
3298                                struct ixgbe_ring *tx_ring, int size)
3299 {
3300         if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
3301                 return 0;
3302         return __ixgbe_maybe_stop_tx(netdev, tx_ring, size);
3303 }
3304
3305
3306 static int ixgbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3307 {
3308         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3309         struct ixgbe_ring *tx_ring;
3310         unsigned int len = skb->len;
3311         unsigned int first;
3312         unsigned int tx_flags = 0;
3313         u8 hdr_len = 0;
3314         int r_idx = 0, tso;
3315         unsigned int mss = 0;
3316         int count = 0;
3317         unsigned int f;
3318         unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
3319         len -= skb->data_len;
3320         r_idx = (adapter->num_tx_queues - 1) & skb->queue_mapping;
3321         tx_ring = &adapter->tx_ring[r_idx];
3322
3323
3324         if (skb->len <= 0) {
3325                 dev_kfree_skb(skb);
3326                 return NETDEV_TX_OK;
3327         }
3328         mss = skb_shinfo(skb)->gso_size;
3329
3330         if (mss)
3331                 count++;
3332         else if (skb->ip_summed == CHECKSUM_PARTIAL)
3333                 count++;
3334
3335         count += TXD_USE_COUNT(len);
3336         for (f = 0; f < nr_frags; f++)
3337                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3338
3339         if (ixgbe_maybe_stop_tx(netdev, tx_ring, count)) {
3340                 adapter->tx_busy++;
3341                 return NETDEV_TX_BUSY;
3342         }
3343         if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
3344                 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3345                 tx_flags |= (vlan_tx_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT);
3346         }
3347
3348         if (skb->protocol == htons(ETH_P_IP))
3349                 tx_flags |= IXGBE_TX_FLAGS_IPV4;
3350         first = tx_ring->next_to_use;
3351         tso = ixgbe_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
3352         if (tso < 0) {
3353                 dev_kfree_skb_any(skb);
3354                 return NETDEV_TX_OK;
3355         }
3356
3357         if (tso)
3358                 tx_flags |= IXGBE_TX_FLAGS_TSO;
3359         else if (ixgbe_tx_csum(adapter, tx_ring, skb, tx_flags) &&
3360                  (skb->ip_summed == CHECKSUM_PARTIAL))
3361                 tx_flags |= IXGBE_TX_FLAGS_CSUM;
3362
3363         ixgbe_tx_queue(adapter, tx_ring, tx_flags,
3364                            ixgbe_tx_map(adapter, tx_ring, skb, first),
3365                            skb->len, hdr_len);
3366
3367         netdev->trans_start = jiffies;
3368
3369         ixgbe_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
3370
3371         return NETDEV_TX_OK;
3372 }
3373
3374 /**
3375  * ixgbe_get_stats - Get System Network Statistics
3376  * @netdev: network interface device structure
3377  *
3378  * Returns the address of the device statistics structure.
3379  * The statistics are actually updated from the timer callback.
3380  **/
3381 static struct net_device_stats *ixgbe_get_stats(struct net_device *netdev)
3382 {
3383         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3384
3385         /* only return the current stats */
3386         return &adapter->net_stats;
3387 }
3388
3389 /**
3390  * ixgbe_set_mac - Change the Ethernet Address of the NIC
3391  * @netdev: network interface device structure
3392  * @p: pointer to an address structure
3393  *
3394  * Returns 0 on success, negative on failure
3395  **/
3396 static int ixgbe_set_mac(struct net_device *netdev, void *p)
3397 {
3398         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3399         struct sockaddr *addr = p;
3400
3401         if (!is_valid_ether_addr(addr->sa_data))
3402                 return -EADDRNOTAVAIL;
3403
3404         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3405         memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3406
3407         ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV);
3408
3409         return 0;
3410 }
3411
3412 #ifdef CONFIG_NET_POLL_CONTROLLER
3413 /*
3414  * Polling 'interrupt' - used by things like netconsole to send skbs
3415  * without having to re-enable interrupts. It's not called while
3416  * the interrupt routine is executing.
3417  */
3418 static void ixgbe_netpoll(struct net_device *netdev)
3419 {
3420         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3421
3422         disable_irq(adapter->pdev->irq);
3423         adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
3424         ixgbe_intr(adapter->pdev->irq, netdev);
3425         adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
3426         enable_irq(adapter->pdev->irq);
3427 }
3428 #endif
3429
3430 /**
3431  * ixgbe_napi_add_all - prep napi structs for use
3432  * @adapter: private struct
3433  * helper function to napi_add each possible q_vector->napi
3434  */
3435 static void ixgbe_napi_add_all(struct ixgbe_adapter *adapter)
3436 {
3437         int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
3438         int (*poll)(struct napi_struct *, int);
3439
3440         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3441                 poll = &ixgbe_clean_rxonly;
3442         } else {
3443                 poll = &ixgbe_poll;
3444                 /* only one q_vector for legacy modes */
3445                 q_vectors = 1;
3446         }
3447
3448         for (i = 0; i < q_vectors; i++) {
3449                 struct ixgbe_q_vector *q_vector = &adapter->q_vector[i];
3450                 netif_napi_add(adapter->netdev, &q_vector->napi,
3451                                (*poll), 64);
3452         }
3453 }
3454
3455 /**
3456  * ixgbe_probe - Device Initialization Routine
3457  * @pdev: PCI device information struct
3458  * @ent: entry in ixgbe_pci_tbl
3459  *
3460  * Returns 0 on success, negative on failure
3461  *
3462  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
3463  * The OS initialization, configuring of the adapter private structure,
3464  * and a hardware reset occur.
3465  **/
3466 static int __devinit ixgbe_probe(struct pci_dev *pdev,
3467                                  const struct pci_device_id *ent)
3468 {
3469         struct net_device *netdev;
3470         struct ixgbe_adapter *adapter = NULL;
3471         struct ixgbe_hw *hw;
3472         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
3473         unsigned long mmio_start, mmio_len;
3474         static int cards_found;
3475         int i, err, pci_using_dac;
3476         u16 link_status, link_speed, link_width;
3477         u32 part_num;
3478
3479         err = pci_enable_device(pdev);
3480         if (err)
3481                 return err;
3482
3483         if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK) &&
3484             !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
3485                 pci_using_dac = 1;
3486         } else {
3487                 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
3488                 if (err) {
3489                         err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
3490                         if (err) {
3491                                 dev_err(&pdev->dev, "No usable DMA "
3492                                         "configuration, aborting\n");
3493                                 goto err_dma;
3494                         }
3495                 }
3496                 pci_using_dac = 0;
3497         }
3498
3499         err = pci_request_regions(pdev, ixgbe_driver_name);
3500         if (err) {
3501                 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
3502                 goto err_pci_reg;
3503         }
3504
3505         pci_set_master(pdev);
3506         pci_save_state(pdev);
3507
3508         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), MAX_TX_QUEUES);
3509         if (!netdev) {
3510                 err = -ENOMEM;
3511                 goto err_alloc_etherdev;
3512         }
3513
3514         SET_NETDEV_DEV(netdev, &pdev->dev);
3515
3516         pci_set_drvdata(pdev, netdev);
3517         adapter = netdev_priv(netdev);
3518
3519         adapter->netdev = netdev;
3520         adapter->pdev = pdev;
3521         hw = &adapter->hw;
3522         hw->back = adapter;
3523         adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
3524
3525         mmio_start = pci_resource_start(pdev, 0);
3526         mmio_len = pci_resource_len(pdev, 0);
3527
3528         hw->hw_addr = ioremap(mmio_start, mmio_len);
3529         if (!hw->hw_addr) {
3530                 err = -EIO;
3531                 goto err_ioremap;
3532         }
3533
3534         for (i = 1; i <= 5; i++) {
3535                 if (pci_resource_len(pdev, i) == 0)
3536                         continue;
3537         }
3538
3539         netdev->open = &ixgbe_open;
3540         netdev->stop = &ixgbe_close;
3541         netdev->hard_start_xmit = &ixgbe_xmit_frame;
3542         netdev->get_stats = &ixgbe_get_stats;
3543         netdev->set_rx_mode = &ixgbe_set_rx_mode;
3544         netdev->set_multicast_list = &ixgbe_set_rx_mode;
3545         netdev->set_mac_address = &ixgbe_set_mac;
3546         netdev->change_mtu = &ixgbe_change_mtu;
3547         ixgbe_set_ethtool_ops(netdev);
3548         netdev->tx_timeout = &ixgbe_tx_timeout;
3549         netdev->watchdog_timeo = 5 * HZ;
3550         netdev->vlan_rx_register = ixgbe_vlan_rx_register;
3551         netdev->vlan_rx_add_vid = ixgbe_vlan_rx_add_vid;
3552         netdev->vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid;
3553 #ifdef CONFIG_NET_POLL_CONTROLLER
3554         netdev->poll_controller = ixgbe_netpoll;
3555 #endif
3556         strcpy(netdev->name, pci_name(pdev));
3557
3558         netdev->mem_start = mmio_start;
3559         netdev->mem_end = mmio_start + mmio_len;
3560
3561         adapter->bd_number = cards_found;
3562
3563         /* PCI config space info */
3564         hw->vendor_id = pdev->vendor;
3565         hw->device_id = pdev->device;
3566         hw->revision_id = pdev->revision;
3567         hw->subsystem_vendor_id = pdev->subsystem_vendor;
3568         hw->subsystem_device_id = pdev->subsystem_device;
3569
3570         /* Setup hw api */
3571         memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
3572         hw->mac.type  = ii->mac;
3573
3574         err = ii->get_invariants(hw);
3575         if (err)
3576                 goto err_hw_init;
3577
3578         /* setup the private structure */
3579         err = ixgbe_sw_init(adapter);
3580         if (err)
3581                 goto err_sw_init;
3582
3583         netdev->features = NETIF_F_SG |
3584                            NETIF_F_HW_CSUM |
3585                            NETIF_F_HW_VLAN_TX |
3586                            NETIF_F_HW_VLAN_RX |
3587                            NETIF_F_HW_VLAN_FILTER;
3588
3589         netdev->features |= NETIF_F_LRO;
3590         netdev->features |= NETIF_F_TSO;
3591         netdev->features |= NETIF_F_TSO6;
3592
3593         netdev->vlan_features |= NETIF_F_TSO;
3594         netdev->vlan_features |= NETIF_F_TSO6;
3595         netdev->vlan_features |= NETIF_F_HW_CSUM;
3596         netdev->vlan_features |= NETIF_F_SG;
3597
3598         if (pci_using_dac)
3599                 netdev->features |= NETIF_F_HIGHDMA;
3600
3601         /* make sure the EEPROM is good */
3602         if (ixgbe_validate_eeprom_checksum(hw, NULL) < 0) {
3603                 dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n");
3604                 err = -EIO;
3605                 goto err_eeprom;
3606         }
3607
3608         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
3609         memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
3610
3611         if (ixgbe_validate_mac_addr(netdev->dev_addr)) {
3612                 err = -EIO;
3613                 goto err_eeprom;
3614         }
3615
3616         init_timer(&adapter->watchdog_timer);
3617         adapter->watchdog_timer.function = &ixgbe_watchdog;
3618         adapter->watchdog_timer.data = (unsigned long)adapter;
3619
3620         INIT_WORK(&adapter->reset_task, ixgbe_reset_task);
3621
3622         err = ixgbe_init_interrupt_scheme(adapter);
3623         if (err)
3624                 goto err_sw_init;
3625
3626         /* print bus type/speed/width info */
3627         pci_read_config_word(pdev, IXGBE_PCI_LINK_STATUS, &link_status);
3628         link_speed = link_status & IXGBE_PCI_LINK_SPEED;
3629         link_width = link_status & IXGBE_PCI_LINK_WIDTH;
3630         dev_info(&pdev->dev, "(PCI Express:%s:%s) "
3631                  "%02x:%02x:%02x:%02x:%02x:%02x\n",
3632                 ((link_speed == IXGBE_PCI_LINK_SPEED_5000) ? "5.0Gb/s" :
3633                  (link_speed == IXGBE_PCI_LINK_SPEED_2500) ? "2.5Gb/s" :
3634                  "Unknown"),
3635                 ((link_width == IXGBE_PCI_LINK_WIDTH_8) ? "Width x8" :
3636                  (link_width == IXGBE_PCI_LINK_WIDTH_4) ? "Width x4" :
3637                  (link_width == IXGBE_PCI_LINK_WIDTH_2) ? "Width x2" :
3638                  (link_width == IXGBE_PCI_LINK_WIDTH_1) ? "Width x1" :
3639                  "Unknown"),
3640                 netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
3641                 netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
3642         ixgbe_read_part_num(hw, &part_num);
3643         dev_info(&pdev->dev, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
3644                  hw->mac.type, hw->phy.type,
3645                  (part_num >> 8), (part_num & 0xff));
3646
3647         if (link_width <= IXGBE_PCI_LINK_WIDTH_4) {
3648                 dev_warn(&pdev->dev, "PCI-Express bandwidth available for "
3649                          "this card is not sufficient for optimal "
3650                          "performance.\n");
3651                 dev_warn(&pdev->dev, "For optimal performance a x8 "
3652                          "PCI-Express slot is required.\n");
3653         }
3654
3655         /* reset the hardware with the new settings */
3656         ixgbe_start_hw(hw);
3657
3658         netif_carrier_off(netdev);
3659         netif_tx_stop_all_queues(netdev);
3660
3661         ixgbe_napi_add_all(adapter);
3662
3663         strcpy(netdev->name, "eth%d");
3664         err = register_netdev(netdev);
3665         if (err)
3666                 goto err_register;
3667
3668 #ifdef CONFIG_DCA
3669         if (dca_add_requester(&pdev->dev) == 0) {
3670                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
3671                 /* always use CB2 mode, difference is masked
3672                  * in the CB driver */
3673                 IXGBE_WRITE_REG(hw, IXGBE_DCA_CTRL, 2);
3674                 ixgbe_setup_dca(adapter);
3675         }
3676 #endif
3677
3678         dev_info(&pdev->dev, "Intel(R) 10 Gigabit Network Connection\n");
3679         cards_found++;
3680         return 0;
3681
3682 err_register:
3683         ixgbe_release_hw_control(adapter);
3684 err_hw_init:
3685 err_sw_init:
3686         ixgbe_reset_interrupt_capability(adapter);
3687 err_eeprom:
3688         iounmap(hw->hw_addr);
3689 err_ioremap:
3690         free_netdev(netdev);
3691 err_alloc_etherdev:
3692         pci_release_regions(pdev);
3693 err_pci_reg:
3694 err_dma:
3695         pci_disable_device(pdev);
3696         return err;
3697 }
3698
3699 /**
3700  * ixgbe_remove - Device Removal Routine
3701  * @pdev: PCI device information struct
3702  *
3703  * ixgbe_remove is called by the PCI subsystem to alert the driver
3704  * that it should release a PCI device.  The could be caused by a
3705  * Hot-Plug event, or because the driver is going to be removed from
3706  * memory.
3707  **/
3708 static void __devexit ixgbe_remove(struct pci_dev *pdev)
3709 {
3710         struct net_device *netdev = pci_get_drvdata(pdev);
3711         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3712
3713         set_bit(__IXGBE_DOWN, &adapter->state);
3714         del_timer_sync(&adapter->watchdog_timer);
3715
3716         flush_scheduled_work();
3717
3718 #ifdef CONFIG_DCA
3719         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
3720                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
3721                 dca_remove_requester(&pdev->dev);
3722                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
3723         }
3724
3725 #endif
3726         unregister_netdev(netdev);
3727
3728         ixgbe_reset_interrupt_capability(adapter);
3729
3730         ixgbe_release_hw_control(adapter);
3731
3732         iounmap(adapter->hw.hw_addr);
3733         pci_release_regions(pdev);
3734
3735         DPRINTK(PROBE, INFO, "complete\n");
3736         kfree(adapter->tx_ring);
3737         kfree(adapter->rx_ring);
3738
3739         free_netdev(netdev);
3740
3741         pci_disable_device(pdev);
3742 }
3743
3744 /**
3745  * ixgbe_io_error_detected - called when PCI error is detected
3746  * @pdev: Pointer to PCI device
3747  * @state: The current pci connection state
3748  *
3749  * This function is called after a PCI bus error affecting
3750  * this device has been detected.
3751  */
3752 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
3753                                                 pci_channel_state_t state)
3754 {
3755         struct net_device *netdev = pci_get_drvdata(pdev);
3756         struct ixgbe_adapter *adapter = netdev->priv;
3757
3758         netif_device_detach(netdev);
3759
3760         if (netif_running(netdev))
3761                 ixgbe_down(adapter);
3762         pci_disable_device(pdev);
3763
3764         /* Request a slot slot reset. */
3765         return PCI_ERS_RESULT_NEED_RESET;
3766 }
3767
3768 /**
3769  * ixgbe_io_slot_reset - called after the pci bus has been reset.
3770  * @pdev: Pointer to PCI device
3771  *
3772  * Restart the card from scratch, as if from a cold-boot.
3773  */
3774 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
3775 {
3776         struct net_device *netdev = pci_get_drvdata(pdev);
3777         struct ixgbe_adapter *adapter = netdev->priv;
3778
3779         if (pci_enable_device(pdev)) {
3780                 DPRINTK(PROBE, ERR,
3781                         "Cannot re-enable PCI device after reset.\n");
3782                 return PCI_ERS_RESULT_DISCONNECT;
3783         }
3784         pci_set_master(pdev);
3785         pci_restore_state(pdev);
3786
3787         pci_enable_wake(pdev, PCI_D3hot, 0);
3788         pci_enable_wake(pdev, PCI_D3cold, 0);
3789
3790         ixgbe_reset(adapter);
3791
3792         return PCI_ERS_RESULT_RECOVERED;
3793 }
3794
3795 /**
3796  * ixgbe_io_resume - called when traffic can start flowing again.
3797  * @pdev: Pointer to PCI device
3798  *
3799  * This callback is called when the error recovery driver tells us that
3800  * its OK to resume normal operation.
3801  */
3802 static void ixgbe_io_resume(struct pci_dev *pdev)
3803 {
3804         struct net_device *netdev = pci_get_drvdata(pdev);
3805         struct ixgbe_adapter *adapter = netdev->priv;
3806
3807         if (netif_running(netdev)) {
3808                 if (ixgbe_up(adapter)) {
3809                         DPRINTK(PROBE, INFO, "ixgbe_up failed after reset\n");
3810                         return;
3811                 }
3812         }
3813
3814         netif_device_attach(netdev);
3815
3816 }
3817
3818 static struct pci_error_handlers ixgbe_err_handler = {
3819         .error_detected = ixgbe_io_error_detected,
3820         .slot_reset = ixgbe_io_slot_reset,
3821         .resume = ixgbe_io_resume,
3822 };
3823
3824 static struct pci_driver ixgbe_driver = {
3825         .name     = ixgbe_driver_name,
3826         .id_table = ixgbe_pci_tbl,
3827         .probe    = ixgbe_probe,
3828         .remove   = __devexit_p(ixgbe_remove),
3829 #ifdef CONFIG_PM
3830         .suspend  = ixgbe_suspend,
3831         .resume   = ixgbe_resume,
3832 #endif
3833         .shutdown = ixgbe_shutdown,
3834         .err_handler = &ixgbe_err_handler
3835 };
3836
3837 /**
3838  * ixgbe_init_module - Driver Registration Routine
3839  *
3840  * ixgbe_init_module is the first routine called when the driver is
3841  * loaded. All it does is register with the PCI subsystem.
3842  **/
3843 static int __init ixgbe_init_module(void)
3844 {
3845         int ret;
3846         printk(KERN_INFO "%s: %s - version %s\n", ixgbe_driver_name,
3847                ixgbe_driver_string, ixgbe_driver_version);
3848
3849         printk(KERN_INFO "%s: %s\n", ixgbe_driver_name, ixgbe_copyright);
3850
3851 #ifdef CONFIG_DCA
3852         dca_register_notify(&dca_notifier);
3853
3854 #endif
3855         ret = pci_register_driver(&ixgbe_driver);
3856         return ret;
3857 }
3858 module_init(ixgbe_init_module);
3859
3860 /**
3861  * ixgbe_exit_module - Driver Exit Cleanup Routine
3862  *
3863  * ixgbe_exit_module is called just before the driver is removed
3864  * from memory.
3865  **/
3866 static void __exit ixgbe_exit_module(void)
3867 {
3868 #ifdef CONFIG_DCA
3869         dca_unregister_notify(&dca_notifier);
3870 #endif
3871         pci_unregister_driver(&ixgbe_driver);
3872 }
3873
3874 #ifdef CONFIG_DCA
3875 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
3876                             void *p)
3877 {
3878         int ret_val;
3879
3880         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
3881                                          __ixgbe_notify_dca);
3882
3883         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
3884 }
3885 #endif /* CONFIG_DCA */
3886
3887 module_exit(ixgbe_exit_module);
3888
3889 /* ixgbe_main.c */