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   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2007 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   Linux NICS <linux.nics@intel.com>
  24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  26
  27 *******************************************************************************/
  28
  29 #include <linux/types.h>
  30 #include <linux/module.h>
  31 #include <linux/pci.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/string.h>
  35 #include <linux/in.h>
  36 #include <linux/ip.h>
  37 #include <linux/tcp.h>
  38 #include <linux/ipv6.h>
  39 #include <net/checksum.h>
  40 #include <net/ip6_checksum.h>
  41 #include <linux/ethtool.h>
  42 #include <linux/if_vlan.h>
  43
  44 #include "ixgbe.h"
  45 #include "ixgbe_common.h"
  46
  47 char ixgbe_driver_name[] = "ixgbe";
  48 static const char ixgbe_driver_string[] =
  49         "Intel(R) 10 Gigabit PCI Express Network Driver";
  50
  51 #define DRV_VERSION "1.3.18-k4"
  52 const char ixgbe_driver_version[] = DRV_VERSION;
  53 static const char ixgbe_copyright[] =
  54          "Copyright (c) 1999-2007 Intel Corporation.";
  55
  56 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  57         [board_82598]                   = &ixgbe_82598_info,
  58 };
  59
  60 /* ixgbe_pci_tbl - PCI Device ID Table
  61  *
  62  * Wildcard entries (PCI_ANY_ID) should come last
  63  * Last entry must be all 0s
  64  *
  65  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  66  *   Class, Class Mask, private data (not used) }
  67  */
  68 static struct pci_device_id ixgbe_pci_tbl[] = {
  69         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT),
  70          board_82598 },
  71         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT),
  72          board_82598 },
  73         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4),
  74          board_82598 },
  75         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT),
  76          board_82598 },
  77
  78         /* required last entry */
  79         {0, }
  80 };
  81 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
  82
  83 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
  84 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
  85                             void *p);
  86 static struct notifier_block dca_notifier = {
  87         .notifier_call = ixgbe_notify_dca,
  88         .next          = NULL,
  89         .priority      = 0
  90 };
  91 #endif
  92
  93 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  94 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
  95 MODULE_LICENSE("GPL");
  96 MODULE_VERSION(DRV_VERSION);
  97
  98 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
  99
 100 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 101 {
 102         u32 ctrl_ext;
 103
 104         /* Let firmware take over control of h/w */
 105         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 106         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 107                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 108 }
 109
 110 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 111 {
 112         u32 ctrl_ext;
 113
 114         /* Let firmware know the driver has taken over */
 115         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 116         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 117                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 118 }
 119
 120 #ifdef DEBUG
 121 /**
 122  * ixgbe_get_hw_dev_name - return device name string
 123  * used by hardware layer to print debugging information
 124  **/
 125 char *ixgbe_get_hw_dev_name(struct ixgbe_hw *hw)
 126 {
 127         struct ixgbe_adapter *adapter = hw->back;
 128         struct net_device *netdev = adapter->netdev;
 129         return netdev->name;
 130 }
 131 #endif
 132
 133 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, u16 int_alloc_entry,
 134                            u8 msix_vector)
 135 {
 136         u32 ivar, index;
 137
 138         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 139         index = (int_alloc_entry >> 2) & 0x1F;
 140         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR(index));
 141         ivar &= ~(0xFF << (8 * (int_alloc_entry & 0x3)));
 142         ivar |= (msix_vector << (8 * (int_alloc_entry & 0x3)));
 143         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR(index), ivar);
 144 }
 145
 146 static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter,
 147                                              struct ixgbe_tx_buffer
 148                                              *tx_buffer_info)
 149 {
 150         if (tx_buffer_info->dma) {
 151                 pci_unmap_page(adapter->pdev, tx_buffer_info->dma,
 152                                tx_buffer_info->length, PCI_DMA_TODEVICE);
 153                 tx_buffer_info->dma = 0;
 154         }
 155         if (tx_buffer_info->skb) {
 156                 dev_kfree_skb_any(tx_buffer_info->skb);
 157                 tx_buffer_info->skb = NULL;
 158         }
 159         /* tx_buffer_info must be completely set up in the transmit path */
 160 }
 161
 162 static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
 163                                        struct ixgbe_ring *tx_ring,
 164                                        unsigned int eop)
 165 {
 166         struct ixgbe_hw *hw = &adapter->hw;
 167         u32 head, tail;
 168
 169         /* Detect a transmit hang in hardware, this serializes the
 170          * check with the clearing of time_stamp and movement of eop */
 171         head = IXGBE_READ_REG(hw, tx_ring->head);
 172         tail = IXGBE_READ_REG(hw, tx_ring->tail);
 173         adapter->detect_tx_hung = false;
 174         if ((head != tail) &&
 175             tx_ring->tx_buffer_info[eop].time_stamp &&
 176             time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) &&
 177             !(IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & IXGBE_TFCS_TXOFF)) {
 178                 /* detected Tx unit hang */
 179                 union ixgbe_adv_tx_desc *tx_desc;
 180                 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
 181                 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
 182                         "  Tx Queue             <%d>\n"
 183                         "  TDH, TDT             <%x>, <%x>\n"
 184                         "  next_to_use          <%x>\n"
 185                         "  next_to_clean        <%x>\n"
 186                         "tx_buffer_info[next_to_clean]\n"
 187                         "  time_stamp           <%lx>\n"
 188                         "  jiffies              <%lx>\n",
 189                         tx_ring->queue_index,
 190                         head, tail,
 191                         tx_ring->next_to_use, eop,
 192                         tx_ring->tx_buffer_info[eop].time_stamp, jiffies);
 193                 return true;
 194         }
 195
 196         return false;
 197 }
 198
 199 #define IXGBE_MAX_TXD_PWR       14
 200 #define IXGBE_MAX_DATA_PER_TXD  (1 << IXGBE_MAX_TXD_PWR)
 201
 202 /* Tx Descriptors needed, worst case */
 203 #define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
 204                          (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
 205 #define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
 206         MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1)   /* for context */
 207
 208 #define GET_TX_HEAD_FROM_RING(ring) (\
 209         *(volatile u32 *) \
 210         ((union ixgbe_adv_tx_desc *)(ring)->desc + (ring)->count))
 211 static void ixgbe_tx_timeout(struct net_device *netdev);
 212
 213 /**
 214  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
 215  * @adapter: board private structure
 216  * @tx_ring: tx ring to clean
 217  **/
 218 static bool ixgbe_clean_tx_irq(struct ixgbe_adapter *adapter,
 219                                struct ixgbe_ring *tx_ring)
 220 {
 221         union ixgbe_adv_tx_desc *tx_desc;
 222         struct ixgbe_tx_buffer *tx_buffer_info;
 223         struct net_device *netdev = adapter->netdev;
 224         struct sk_buff *skb;
 225         unsigned int i;
 226         u32 head, oldhead;
 227         unsigned int count = 0;
 228         unsigned int total_bytes = 0, total_packets = 0;
 229
 230         rmb();
 231         head = GET_TX_HEAD_FROM_RING(tx_ring);
 232         head = le32_to_cpu(head);
 233         i = tx_ring->next_to_clean;
 234         while (1) {
 235                 while (i != head) {
 236                         tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
 237                         tx_buffer_info = &tx_ring->tx_buffer_info[i];
 238                         skb = tx_buffer_info->skb;
 239
 240                         if (skb) {
 241                                 unsigned int segs, bytecount;
 242
 243                                 /* gso_segs is currently only valid for tcp */
 244                                 segs = skb_shinfo(skb)->gso_segs ?: 1;
 245                                 /* multiply data chunks by size of headers */
 246                                 bytecount = ((segs - 1) * skb_headlen(skb)) +
 247                                             skb->len;
 248                                 total_packets += segs;
 249                                 total_bytes += bytecount;
 250                         }
 251
 252                         ixgbe_unmap_and_free_tx_resource(adapter,
 253                                                          tx_buffer_info);
 254
 255                         i++;
 256                         if (i == tx_ring->count)
 257                                 i = 0;
 258
 259                         count++;
 260                         if (count == tx_ring->count)
 261                                 goto done_cleaning;
 262                 }
 263                 oldhead = head;
 264                 rmb();
 265                 head = GET_TX_HEAD_FROM_RING(tx_ring);
 266                 head = le32_to_cpu(head);
 267                 if (head == oldhead)
 268                         goto done_cleaning;
 269         } /* while (1) */
 270
 271 done_cleaning:
 272         tx_ring->next_to_clean = i;
 273
 274 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
 275         if (unlikely(count && netif_carrier_ok(netdev) &&
 276                      (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
 277                 /* Make sure that anybody stopping the queue after this
 278                  * sees the new next_to_clean.
 279                  */
 280                 smp_mb();
 281                 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
 282                     !test_bit(__IXGBE_DOWN, &adapter->state)) {
 283                         netif_wake_subqueue(netdev, tx_ring->queue_index);
 284                         ++adapter->restart_queue;
 285                 }
 286         }
 287
 288         if (adapter->detect_tx_hung) {
 289                 if (ixgbe_check_tx_hang(adapter, tx_ring, i)) {
 290                         /* schedule immediate reset if we believe we hung */
 291                         DPRINTK(PROBE, INFO,
 292                                 "tx hang %d detected, resetting adapter\n",
 293                                 adapter->tx_timeout_count + 1);
 294                         ixgbe_tx_timeout(adapter->netdev);
 295                 }
 296         }
 297
 298         /* re-arm the interrupt */
 299         if ((total_packets >= tx_ring->work_limit) ||
 300             (count == tx_ring->count))
 301                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, tx_ring->v_idx);
 302
 303         tx_ring->total_bytes += total_bytes;
 304         tx_ring->total_packets += total_packets;
 305         tx_ring->stats.bytes += total_bytes;
 306         tx_ring->stats.packets += total_packets;
 307         adapter->net_stats.tx_bytes += total_bytes;
 308         adapter->net_stats.tx_packets += total_packets;
 309         return (total_packets ? true : false);
 310 }
 311
 312 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
 313 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
 314                                 struct ixgbe_ring *rx_ring)
 315 {
 316         u32 rxctrl;
 317         int cpu = get_cpu();
 318         int q = rx_ring - adapter->rx_ring;
 319
 320         if (rx_ring->cpu != cpu) {
 321                 rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q));
 322                 rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK;
 323                 rxctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
 324                 rxctrl |= IXGBE_DCA_RXCTRL_DESC_DCA_EN;
 325                 rxctrl |= IXGBE_DCA_RXCTRL_HEAD_DCA_EN;
 326                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q), rxctrl);
 327                 rx_ring->cpu = cpu;
 328         }
 329         put_cpu();
 330 }
 331
 332 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
 333                                 struct ixgbe_ring *tx_ring)
 334 {
 335         u32 txctrl;
 336         int cpu = get_cpu();
 337         int q = tx_ring - adapter->tx_ring;
 338
 339         if (tx_ring->cpu != cpu) {
 340                 txctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q));
 341                 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK;
 342                 txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
 343                 txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN;
 344                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q), txctrl);
 345                 tx_ring->cpu = cpu;
 346         }
 347         put_cpu();
 348 }
 349
 350 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
 351 {
 352         int i;
 353
 354         if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
 355                 return;
 356
 357         for (i = 0; i < adapter->num_tx_queues; i++) {
 358                 adapter->tx_ring[i].cpu = -1;
 359                 ixgbe_update_tx_dca(adapter, &adapter->tx_ring[i]);
 360         }
 361         for (i = 0; i < adapter->num_rx_queues; i++) {
 362                 adapter->rx_ring[i].cpu = -1;
 363                 ixgbe_update_rx_dca(adapter, &adapter->rx_ring[i]);
 364         }
 365 }
 366
 367 static int __ixgbe_notify_dca(struct device *dev, void *data)
 368 {
 369         struct net_device *netdev = dev_get_drvdata(dev);
 370         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 371         unsigned long event = *(unsigned long *)data;
 372
 373         switch (event) {
 374         case DCA_PROVIDER_ADD:
 375                 /* if we're already enabled, don't do it again */
 376                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
 377                         break;
 378                 /* Always use CB2 mode, difference is masked
 379                  * in the CB driver. */
 380                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
 381                 if (dca_add_requester(dev) == 0) {
 382                         adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
 383                         ixgbe_setup_dca(adapter);
 384                         break;
 385                 }
 386                 /* Fall Through since DCA is disabled. */
 387         case DCA_PROVIDER_REMOVE:
 388                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
 389                         dca_remove_requester(dev);
 390                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
 391                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
 392                 }
 393                 break;
 394         }
 395
 396         return 0;
 397 }
 398
 399 #endif /* CONFIG_DCA or CONFIG_DCA_MODULE */
 400 /**
 401  * ixgbe_receive_skb - Send a completed packet up the stack
 402  * @adapter: board private structure
 403  * @skb: packet to send up
 404  * @status: hardware indication of status of receive
 405  * @rx_ring: rx descriptor ring (for a specific queue) to setup
 406  * @rx_desc: rx descriptor
 407  **/
 408 static void ixgbe_receive_skb(struct ixgbe_adapter *adapter,
 409                               struct sk_buff *skb, u8 status,
 410                               struct ixgbe_ring *ring,
 411                               union ixgbe_adv_rx_desc *rx_desc)
 412 {
 413         bool is_vlan = (status & IXGBE_RXD_STAT_VP);
 414         u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
 415
 416         if (adapter->netdev->features & NETIF_F_LRO &&
 417             skb->ip_summed == CHECKSUM_UNNECESSARY) {
 418                 if (adapter->vlgrp && is_vlan)
 419                         lro_vlan_hwaccel_receive_skb(&ring->lro_mgr, skb,
 420                                                      adapter->vlgrp, tag,
 421                                                      rx_desc);
 422                 else
 423                         lro_receive_skb(&ring->lro_mgr, skb, rx_desc);
 424                 ring->lro_used = true;
 425         } else {
 426                 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
 427                         if (adapter->vlgrp && is_vlan)
 428                                 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, tag);
 429                         else
 430                                 netif_receive_skb(skb);
 431                 } else {
 432                         if (adapter->vlgrp && is_vlan)
 433                                 vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
 434                         else
 435                                 netif_rx(skb);
 436                 }
 437         }
 438 }
 439
 440 /**
 441  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
 442  * @adapter: address of board private structure
 443  * @status_err: hardware indication of status of receive
 444  * @skb: skb currently being received and modified
 445  **/
 446 static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter,
 447                                      u32 status_err, struct sk_buff *skb)
 448 {
 449         skb->ip_summed = CHECKSUM_NONE;
 450
 451         /* Rx csum disabled */
 452         if (!(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
 453                 return;
 454
 455         /* if IP and error */
 456         if ((status_err & IXGBE_RXD_STAT_IPCS) &&
 457             (status_err & IXGBE_RXDADV_ERR_IPE)) {
 458                 adapter->hw_csum_rx_error++;
 459                 return;
 460         }
 461
 462         if (!(status_err & IXGBE_RXD_STAT_L4CS))
 463                 return;
 464
 465         if (status_err & IXGBE_RXDADV_ERR_TCPE) {
 466                 adapter->hw_csum_rx_error++;
 467                 return;
 468         }
 469
 470         /* It must be a TCP or UDP packet with a valid checksum */
 471         skb->ip_summed = CHECKSUM_UNNECESSARY;
 472         adapter->hw_csum_rx_good++;
 473 }
 474
 475 /**
 476  * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
 477  * @adapter: address of board private structure
 478  **/
 479 static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter *adapter,
 480                                    struct ixgbe_ring *rx_ring,
 481                                    int cleaned_count)
 482 {
 483         struct net_device *netdev = adapter->netdev;
 484         struct pci_dev *pdev = adapter->pdev;
 485         union ixgbe_adv_rx_desc *rx_desc;
 486         struct ixgbe_rx_buffer *bi;
 487         unsigned int i;
 488         unsigned int bufsz = rx_ring->rx_buf_len + NET_IP_ALIGN;
 489
 490         i = rx_ring->next_to_use;
 491         bi = &rx_ring->rx_buffer_info[i];
 492
 493         while (cleaned_count--) {
 494                 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
 495
 496                 if (!bi->page &&
 497                     (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
 498                         bi->page = alloc_page(GFP_ATOMIC);
 499                         if (!bi->page) {
 500                                 adapter->alloc_rx_page_failed++;
 501                                 goto no_buffers;
 502                         }
 503                         bi->page_dma = pci_map_page(pdev, bi->page, 0,
 504                                                     PAGE_SIZE,
 505                                                     PCI_DMA_FROMDEVICE);
 506                 }
 507
 508                 if (!bi->skb) {
 509                         struct sk_buff *skb = netdev_alloc_skb(netdev, bufsz);
 510
 511                         if (!skb) {
 512                                 adapter->alloc_rx_buff_failed++;
 513                                 goto no_buffers;
 514                         }
 515
 516                         /*
 517                          * Make buffer alignment 2 beyond a 16 byte boundary
 518                          * this will result in a 16 byte aligned IP header after
 519                          * the 14 byte MAC header is removed
 520                          */
 521                         skb_reserve(skb, NET_IP_ALIGN);
 522
 523                         bi->skb = skb;
 524                         bi->dma = pci_map_single(pdev, skb->data, bufsz,
 525                                                  PCI_DMA_FROMDEVICE);
 526                 }
 527                 /* Refresh the desc even if buffer_addrs didn't change because
 528                  * each write-back erases this info. */
 529                 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
 530                         rx_desc->read.pkt_addr = cpu_to_le64(bi->page_dma);
 531                         rx_desc->read.hdr_addr = cpu_to_le64(bi->dma);
 532                 } else {
 533                         rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
 534                 }
 535
 536                 i++;
 537                 if (i == rx_ring->count)
 538                         i = 0;
 539                 bi = &rx_ring->rx_buffer_info[i];
 540         }
 541
 542 no_buffers:
 543         if (rx_ring->next_to_use != i) {
 544                 rx_ring->next_to_use = i;
 545                 if (i-- == 0)
 546                         i = (rx_ring->count - 1);
 547
 548                 /*
 549                  * Force memory writes to complete before letting h/w
 550                  * know there are new descriptors to fetch.  (Only
 551                  * applicable for weak-ordered memory model archs,
 552                  * such as IA-64).
 553                  */
 554                 wmb();
 555                 writel(i, adapter->hw.hw_addr + rx_ring->tail);
 556         }
 557 }
 558
 559 static inline u16 ixgbe_get_hdr_info(union ixgbe_adv_rx_desc *rx_desc)
 560 {
 561         return rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
 562 }
 563
 564 static inline u16 ixgbe_get_pkt_info(union ixgbe_adv_rx_desc *rx_desc)
 565 {
 566         return rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
 567 }
 568
 569 static bool ixgbe_clean_rx_irq(struct ixgbe_adapter *adapter,
 570                                struct ixgbe_ring *rx_ring,
 571                                int *work_done, int work_to_do)
 572 {
 573         struct net_device *netdev = adapter->netdev;
 574         struct pci_dev *pdev = adapter->pdev;
 575         union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
 576         struct ixgbe_rx_buffer *rx_buffer_info, *next_buffer;
 577         struct sk_buff *skb;
 578         unsigned int i;
 579         u32 len, staterr;
 580         u16 hdr_info;
 581         bool cleaned = false;
 582         int cleaned_count = 0;
 583         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
 584
 585         i = rx_ring->next_to_clean;
 586         rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
 587         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 588         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 589
 590         while (staterr & IXGBE_RXD_STAT_DD) {
 591                 u32 upper_len = 0;
 592                 if (*work_done >= work_to_do)
 593                         break;
 594                 (*work_done)++;
 595
 596                 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
 597                         hdr_info = le16_to_cpu(ixgbe_get_hdr_info(rx_desc));
 598                         len = (hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
 599                                IXGBE_RXDADV_HDRBUFLEN_SHIFT;
 600                         if (hdr_info & IXGBE_RXDADV_SPH)
 601                                 adapter->rx_hdr_split++;
 602                         if (len > IXGBE_RX_HDR_SIZE)
 603                                 len = IXGBE_RX_HDR_SIZE;
 604                         upper_len = le16_to_cpu(rx_desc->wb.upper.length);
 605                 } else {
 606                         len = le16_to_cpu(rx_desc->wb.upper.length);
 607                 }
 608
 609                 cleaned = true;
 610                 skb = rx_buffer_info->skb;
 611                 prefetch(skb->data - NET_IP_ALIGN);
 612                 rx_buffer_info->skb = NULL;
 613
 614                 if (len && !skb_shinfo(skb)->nr_frags) {
 615                         pci_unmap_single(pdev, rx_buffer_info->dma,
 616                                          rx_ring->rx_buf_len + NET_IP_ALIGN,
 617                                          PCI_DMA_FROMDEVICE);
 618                         skb_put(skb, len);
 619                 }
 620
 621                 if (upper_len) {
 622                         pci_unmap_page(pdev, rx_buffer_info->page_dma,
 623                                        PAGE_SIZE, PCI_DMA_FROMDEVICE);
 624                         rx_buffer_info->page_dma = 0;
 625                         skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
 626                                            rx_buffer_info->page, 0, upper_len);
 627                         rx_buffer_info->page = NULL;
 628
 629                         skb->len += upper_len;
 630                         skb->data_len += upper_len;
 631                         skb->truesize += upper_len;
 632                 }
 633
 634                 i++;
 635                 if (i == rx_ring->count)
 636                         i = 0;
 637                 next_buffer = &rx_ring->rx_buffer_info[i];
 638
 639                 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
 640                 prefetch(next_rxd);
 641
 642                 cleaned_count++;
 643                 if (staterr & IXGBE_RXD_STAT_EOP) {
 644                         rx_ring->stats.packets++;
 645                         rx_ring->stats.bytes += skb->len;
 646                 } else {
 647                         rx_buffer_info->skb = next_buffer->skb;
 648                         rx_buffer_info->dma = next_buffer->dma;
 649                         next_buffer->skb = skb;
 650                         adapter->non_eop_descs++;
 651                         goto next_desc;
 652                 }
 653
 654                 if (staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK) {
 655                         dev_kfree_skb_irq(skb);
 656                         goto next_desc;
 657                 }
 658
 659                 ixgbe_rx_checksum(adapter, staterr, skb);
 660
 661                 /* probably a little skewed due to removing CRC */
 662                 total_rx_bytes += skb->len;
 663                 total_rx_packets++;
 664
 665                 skb->protocol = eth_type_trans(skb, netdev);
 666                 ixgbe_receive_skb(adapter, skb, staterr, rx_ring, rx_desc);
 667                 netdev->last_rx = jiffies;
 668
 669 next_desc:
 670                 rx_desc->wb.upper.status_error = 0;
 671
 672                 /* return some buffers to hardware, one at a time is too slow */
 673                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
 674                         ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
 675                         cleaned_count = 0;
 676                 }
 677
 678                 /* use prefetched values */
 679                 rx_desc = next_rxd;
 680                 rx_buffer_info = next_buffer;
 681
 682                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 683         }
 684
 685         if (rx_ring->lro_used) {
 686                 lro_flush_all(&rx_ring->lro_mgr);
 687                 rx_ring->lro_used = false;
 688         }
 689
 690         rx_ring->next_to_clean = i;
 691         cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
 692
 693         if (cleaned_count)
 694                 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
 695
 696         rx_ring->total_packets += total_rx_packets;
 697         rx_ring->total_bytes += total_rx_bytes;
 698         adapter->net_stats.rx_bytes += total_rx_bytes;
 699         adapter->net_stats.rx_packets += total_rx_packets;
 700
 701         return cleaned;
 702 }
 703
 704 static int ixgbe_clean_rxonly(struct napi_struct *, int);
 705 /**
 706  * ixgbe_configure_msix - Configure MSI-X hardware
 707  * @adapter: board private structure
 708  *
 709  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
 710  * interrupts.
 711  **/
 712 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
 713 {
 714         struct ixgbe_q_vector *q_vector;
 715         int i, j, q_vectors, v_idx, r_idx;
 716         u32 mask;
 717
 718         q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
 719
 720         /* Populate the IVAR table and set the ITR values to the
 721          * corresponding register.
 722          */
 723         for (v_idx = 0; v_idx < q_vectors; v_idx++) {
 724                 q_vector = &adapter->q_vector[v_idx];
 725                 /* XXX for_each_bit(...) */
 726                 r_idx = find_first_bit(q_vector->rxr_idx,
 727                                       adapter->num_rx_queues);
 728
 729                 for (i = 0; i < q_vector->rxr_count; i++) {
 730                         j = adapter->rx_ring[r_idx].reg_idx;
 731                         ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(j), v_idx);
 732                         r_idx = find_next_bit(q_vector->rxr_idx,
 733                                               adapter->num_rx_queues,
 734                                               r_idx + 1);
 735                 }
 736                 r_idx = find_first_bit(q_vector->txr_idx,
 737                                        adapter->num_tx_queues);
 738
 739                 for (i = 0; i < q_vector->txr_count; i++) {
 740                         j = adapter->tx_ring[r_idx].reg_idx;
 741                         ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(j), v_idx);
 742                         r_idx = find_next_bit(q_vector->txr_idx,
 743                                               adapter->num_tx_queues,
 744                                               r_idx + 1);
 745                 }
 746
 747                 /* if this is a tx only vector use half the irq (tx) rate */
 748                 if (q_vector->txr_count && !q_vector->rxr_count)
 749                         q_vector->eitr = adapter->tx_eitr;
 750                 else
 751                         /* rx only or mixed */
 752                         q_vector->eitr = adapter->rx_eitr;
 753
 754                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx),
 755                                 EITR_INTS_PER_SEC_TO_REG(q_vector->eitr));
 756         }
 757
 758         ixgbe_set_ivar(adapter, IXGBE_IVAR_OTHER_CAUSES_INDEX, v_idx);
 759         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
 760
 761         /* set up to autoclear timer, and the vectors */
 762         mask = IXGBE_EIMS_ENABLE_MASK;
 763         mask &= ~(IXGBE_EIMS_OTHER | IXGBE_EIMS_LSC);
 764         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
 765 }
 766
 767 enum latency_range {
 768         lowest_latency = 0,
 769         low_latency = 1,
 770         bulk_latency = 2,
 771         latency_invalid = 255
 772 };
 773
 774 /**
 775  * ixgbe_update_itr - update the dynamic ITR value based on statistics
 776  * @adapter: pointer to adapter
 777  * @eitr: eitr setting (ints per sec) to give last timeslice
 778  * @itr_setting: current throttle rate in ints/second
 779  * @packets: the number of packets during this measurement interval
 780  * @bytes: the number of bytes during this measurement interval
 781  *
 782  *      Stores a new ITR value based on packets and byte
 783  *      counts during the last interrupt.  The advantage of per interrupt
 784  *      computation is faster updates and more accurate ITR for the current
 785  *      traffic pattern.  Constants in this function were computed
 786  *      based on theoretical maximum wire speed and thresholds were set based
 787  *      on testing data as well as attempting to minimize response time
 788  *      while increasing bulk throughput.
 789  *      this functionality is controlled by the InterruptThrottleRate module
 790  *      parameter (see ixgbe_param.c)
 791  **/
 792 static u8 ixgbe_update_itr(struct ixgbe_adapter *adapter,
 793                            u32 eitr, u8 itr_setting,
 794                            int packets, int bytes)
 795 {
 796         unsigned int retval = itr_setting;
 797         u32 timepassed_us;
 798         u64 bytes_perint;
 799
 800         if (packets == 0)
 801                 goto update_itr_done;
 802
 803
 804         /* simple throttlerate management
 805          *    0-20MB/s lowest (100000 ints/s)
 806          *   20-100MB/s low   (20000 ints/s)
 807          *  100-1249MB/s bulk (8000 ints/s)
 808          */
 809         /* what was last interrupt timeslice? */
 810         timepassed_us = 1000000/eitr;
 811         bytes_perint = bytes / timepassed_us; /* bytes/usec */
 812
 813         switch (itr_setting) {
 814         case lowest_latency:
 815                 if (bytes_perint > adapter->eitr_low)
 816                         retval = low_latency;
 817                 break;
 818         case low_latency:
 819                 if (bytes_perint > adapter->eitr_high)
 820                         retval = bulk_latency;
 821                 else if (bytes_perint <= adapter->eitr_low)
 822                         retval = lowest_latency;
 823                 break;
 824         case bulk_latency:
 825                 if (bytes_perint <= adapter->eitr_high)
 826                         retval = low_latency;
 827                 break;
 828         }
 829
 830 update_itr_done:
 831         return retval;
 832 }
 833
 834 static void ixgbe_set_itr_msix(struct ixgbe_q_vector *q_vector)
 835 {
 836         struct ixgbe_adapter *adapter = q_vector->adapter;
 837         struct ixgbe_hw *hw = &adapter->hw;
 838         u32 new_itr;
 839         u8 current_itr, ret_itr;
 840         int i, r_idx, v_idx = ((void *)q_vector - (void *)(adapter->q_vector)) /
 841                               sizeof(struct ixgbe_q_vector);
 842         struct ixgbe_ring *rx_ring, *tx_ring;
 843
 844         r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
 845         for (i = 0; i < q_vector->txr_count; i++) {
 846                 tx_ring = &(adapter->tx_ring[r_idx]);
 847                 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
 848                                            q_vector->tx_eitr,
 849                                            tx_ring->total_packets,
 850                                            tx_ring->total_bytes);
 851                 /* if the result for this queue would decrease interrupt
 852                  * rate for this vector then use that result */
 853                 q_vector->tx_eitr = ((q_vector->tx_eitr > ret_itr) ?
 854                                     q_vector->tx_eitr - 1 : ret_itr);
 855                 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
 856                                       r_idx + 1);
 857         }
 858
 859         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
 860         for (i = 0; i < q_vector->rxr_count; i++) {
 861                 rx_ring = &(adapter->rx_ring[r_idx]);
 862                 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
 863                                            q_vector->rx_eitr,
 864                                            rx_ring->total_packets,
 865                                            rx_ring->total_bytes);
 866                 /* if the result for this queue would decrease interrupt
 867                  * rate for this vector then use that result */
 868                 q_vector->rx_eitr = ((q_vector->rx_eitr > ret_itr) ?
 869                                     q_vector->rx_eitr - 1 : ret_itr);
 870                 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
 871                                       r_idx + 1);
 872         }
 873
 874         current_itr = max(q_vector->rx_eitr, q_vector->tx_eitr);
 875
 876         switch (current_itr) {
 877         /* counts and packets in update_itr are dependent on these numbers */
 878         case lowest_latency:
 879                 new_itr = 100000;
 880                 break;
 881         case low_latency:
 882                 new_itr = 20000; /* aka hwitr = ~200 */
 883                 break;
 884         case bulk_latency:
 885         default:
 886                 new_itr = 8000;
 887                 break;
 888         }
 889
 890         if (new_itr != q_vector->eitr) {
 891                 u32 itr_reg;
 892                 /* do an exponential smoothing */
 893                 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
 894                 q_vector->eitr = new_itr;
 895                 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
 896                 /* must write high and low 16 bits to reset counter */
 897                 DPRINTK(TX_ERR, DEBUG, "writing eitr(%d): %08X\n", v_idx,
 898                         itr_reg);
 899                 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg | (itr_reg)<<16);
 900         }
 901
 902         return;
 903 }
 904
 905
 906 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
 907 {
 908         struct ixgbe_hw *hw = &adapter->hw;
 909
 910         adapter->lsc_int++;
 911         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
 912         adapter->link_check_timeout = jiffies;
 913         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
 914                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
 915                 schedule_work(&adapter->watchdog_task);
 916         }
 917 }
 918
 919 static irqreturn_t ixgbe_msix_lsc(int irq, void *data)
 920 {
 921         struct net_device *netdev = data;
 922         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 923         struct ixgbe_hw *hw = &adapter->hw;
 924         u32 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
 925
 926         if (eicr & IXGBE_EICR_LSC)
 927                 ixgbe_check_lsc(adapter);
 928
 929         if (!test_bit(__IXGBE_DOWN, &adapter->state))
 930                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER);
 931
 932         return IRQ_HANDLED;
 933 }
 934
 935 static irqreturn_t ixgbe_msix_clean_tx(int irq, void *data)
 936 {
 937         struct ixgbe_q_vector *q_vector = data;
 938         struct ixgbe_adapter  *adapter = q_vector->adapter;
 939         struct ixgbe_ring     *tx_ring;
 940         int i, r_idx;
 941
 942         if (!q_vector->txr_count)
 943                 return IRQ_HANDLED;
 944
 945         r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
 946         for (i = 0; i < q_vector->txr_count; i++) {
 947                 tx_ring = &(adapter->tx_ring[r_idx]);
 948 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
 949                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
 950                         ixgbe_update_tx_dca(adapter, tx_ring);
 951 #endif
 952                 tx_ring->total_bytes = 0;
 953                 tx_ring->total_packets = 0;
 954                 ixgbe_clean_tx_irq(adapter, tx_ring);
 955                 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
 956                                       r_idx + 1);
 957         }
 958
 959         return IRQ_HANDLED;
 960 }
 961
 962 /**
 963  * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
 964  * @irq: unused
 965  * @data: pointer to our q_vector struct for this interrupt vector
 966  **/
 967 static irqreturn_t ixgbe_msix_clean_rx(int irq, void *data)
 968 {
 969         struct ixgbe_q_vector *q_vector = data;
 970         struct ixgbe_adapter  *adapter = q_vector->adapter;
 971         struct ixgbe_ring  *rx_ring;
 972         int r_idx;
 973
 974         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
 975         if (!q_vector->rxr_count)
 976                 return IRQ_HANDLED;
 977
 978         rx_ring = &(adapter->rx_ring[r_idx]);
 979         /* disable interrupts on this vector only */
 980         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, rx_ring->v_idx);
 981         rx_ring->total_bytes = 0;
 982         rx_ring->total_packets = 0;
 983         netif_rx_schedule(adapter->netdev, &q_vector->napi);
 984
 985         return IRQ_HANDLED;
 986 }
 987
 988 static irqreturn_t ixgbe_msix_clean_many(int irq, void *data)
 989 {
 990         ixgbe_msix_clean_rx(irq, data);
 991         ixgbe_msix_clean_tx(irq, data);
 992
 993         return IRQ_HANDLED;
 994 }
 995
 996 /**
 997  * ixgbe_clean_rxonly - msix (aka one shot) rx clean routine
 998  * @napi: napi struct with our devices info in it
 999  * @budget: amount of work driver is allowed to do this pass, in packets
1000  *
1001  **/
1002 static int ixgbe_clean_rxonly(struct napi_struct *napi, int budget)
1003 {
1004         struct ixgbe_q_vector *q_vector =
1005                                container_of(napi, struct ixgbe_q_vector, napi);
1006         struct ixgbe_adapter *adapter = q_vector->adapter;
1007         struct ixgbe_ring *rx_ring;
1008         int work_done = 0;
1009         long r_idx;
1010
1011         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1012         rx_ring = &(adapter->rx_ring[r_idx]);
1013 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
1014         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1015                 ixgbe_update_rx_dca(adapter, rx_ring);
1016 #endif
1017
1018         ixgbe_clean_rx_irq(adapter, rx_ring, &work_done, budget);
1019
1020         /* If all Rx work done, exit the polling mode */
1021         if (work_done < budget) {
1022                 netif_rx_complete(adapter->netdev, napi);
1023                 if (adapter->rx_eitr < IXGBE_MIN_ITR_USECS)
1024                         ixgbe_set_itr_msix(q_vector);
1025                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1026                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, rx_ring->v_idx);
1027         }
1028
1029         return work_done;
1030 }
1031
1032 static inline void map_vector_to_rxq(struct ixgbe_adapter *a, int v_idx,
1033                                      int r_idx)
1034 {
1035         a->q_vector[v_idx].adapter = a;
1036         set_bit(r_idx, a->q_vector[v_idx].rxr_idx);
1037         a->q_vector[v_idx].rxr_count++;
1038         a->rx_ring[r_idx].v_idx = 1 << v_idx;
1039 }
1040
1041 static inline void map_vector_to_txq(struct ixgbe_adapter *a, int v_idx,
1042                                      int r_idx)
1043 {
1044         a->q_vector[v_idx].adapter = a;
1045         set_bit(r_idx, a->q_vector[v_idx].txr_idx);
1046         a->q_vector[v_idx].txr_count++;
1047         a->tx_ring[r_idx].v_idx = 1 << v_idx;
1048 }
1049
1050 /**
1051  * ixgbe_map_rings_to_vectors - Maps descriptor rings to vectors
1052  * @adapter: board private structure to initialize
1053  * @vectors: allotted vector count for descriptor rings
1054  *
1055  * This function maps descriptor rings to the queue-specific vectors
1056  * we were allotted through the MSI-X enabling code.  Ideally, we'd have
1057  * one vector per ring/queue, but on a constrained vector budget, we
1058  * group the rings as "efficiently" as possible.  You would add new
1059  * mapping configurations in here.
1060  **/
1061 static int ixgbe_map_rings_to_vectors(struct ixgbe_adapter *adapter,
1062                                       int vectors)
1063 {
1064         int v_start = 0;
1065         int rxr_idx = 0, txr_idx = 0;
1066         int rxr_remaining = adapter->num_rx_queues;
1067         int txr_remaining = adapter->num_tx_queues;
1068         int i, j;
1069         int rqpv, tqpv;
1070         int err = 0;
1071
1072         /* No mapping required if MSI-X is disabled. */
1073         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1074                 goto out;
1075
1076         /*
1077          * The ideal configuration...
1078          * We have enough vectors to map one per queue.
1079          */
1080         if (vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1081                 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1082                         map_vector_to_rxq(adapter, v_start, rxr_idx);
1083
1084                 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1085                         map_vector_to_txq(adapter, v_start, txr_idx);
1086
1087                 goto out;
1088         }
1089
1090         /*
1091          * If we don't have enough vectors for a 1-to-1
1092          * mapping, we'll have to group them so there are
1093          * multiple queues per vector.
1094          */
1095         /* Re-adjusting *qpv takes care of the remainder. */
1096         for (i = v_start; i < vectors; i++) {
1097                 rqpv = DIV_ROUND_UP(rxr_remaining, vectors - i);
1098                 for (j = 0; j < rqpv; j++) {
1099                         map_vector_to_rxq(adapter, i, rxr_idx);
1100                         rxr_idx++;
1101                         rxr_remaining--;
1102                 }
1103         }
1104         for (i = v_start; i < vectors; i++) {
1105                 tqpv = DIV_ROUND_UP(txr_remaining, vectors - i);
1106                 for (j = 0; j < tqpv; j++) {
1107                         map_vector_to_txq(adapter, i, txr_idx);
1108                         txr_idx++;
1109                         txr_remaining--;
1110                 }
1111         }
1112
1113 out:
1114         return err;
1115 }
1116
1117 /**
1118  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
1119  * @adapter: board private structure
1120  *
1121  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
1122  * interrupts from the kernel.
1123  **/
1124 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
1125 {
1126         struct net_device *netdev = adapter->netdev;
1127         irqreturn_t (*handler)(int, void *);
1128         int i, vector, q_vectors, err;
1129
1130         /* Decrement for Other and TCP Timer vectors */
1131         q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1132
1133         /* Map the Tx/Rx rings to the vectors we were allotted. */
1134         err = ixgbe_map_rings_to_vectors(adapter, q_vectors);
1135         if (err)
1136                 goto out;
1137
1138 #define SET_HANDLER(_v) ((!(_v)->rxr_count) ? &ixgbe_msix_clean_tx : \
1139                          (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \
1140                          &ixgbe_msix_clean_many)
1141         for (vector = 0; vector < q_vectors; vector++) {
1142                 handler = SET_HANDLER(&adapter->q_vector[vector]);
1143                 sprintf(adapter->name[vector], "%s:v%d-%s",
1144                         netdev->name, vector,
1145                         (handler == &ixgbe_msix_clean_rx) ? "Rx" :
1146                          ((handler == &ixgbe_msix_clean_tx) ? "Tx" : "TxRx"));
1147                 err = request_irq(adapter->msix_entries[vector].vector,
1148                                   handler, 0, adapter->name[vector],
1149                                   &(adapter->q_vector[vector]));
1150                 if (err) {
1151                         DPRINTK(PROBE, ERR,
1152                                 "request_irq failed for MSIX interrupt "
1153                                 "Error: %d\n", err);
1154                         goto free_queue_irqs;
1155                 }
1156         }
1157
1158         sprintf(adapter->name[vector], "%s:lsc", netdev->name);
1159         err = request_irq(adapter->msix_entries[vector].vector,
1160                           &ixgbe_msix_lsc, 0, adapter->name[vector], netdev);
1161         if (err) {
1162                 DPRINTK(PROBE, ERR,
1163                         "request_irq for msix_lsc failed: %d\n", err);
1164                 goto free_queue_irqs;
1165         }
1166
1167         return 0;
1168
1169 free_queue_irqs:
1170         for (i = vector - 1; i >= 0; i--)
1171                 free_irq(adapter->msix_entries[--vector].vector,
1172                          &(adapter->q_vector[i]));
1173         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
1174         pci_disable_msix(adapter->pdev);
1175         kfree(adapter->msix_entries);
1176         adapter->msix_entries = NULL;
1177 out:
1178         return err;
1179 }
1180
1181 static void ixgbe_set_itr(struct ixgbe_adapter *adapter)
1182 {
1183         struct ixgbe_hw *hw = &adapter->hw;
1184         struct ixgbe_q_vector *q_vector = adapter->q_vector;
1185         u8 current_itr;
1186         u32 new_itr = q_vector->eitr;
1187         struct ixgbe_ring *rx_ring = &adapter->rx_ring[0];
1188         struct ixgbe_ring *tx_ring = &adapter->tx_ring[0];
1189
1190         q_vector->tx_eitr = ixgbe_update_itr(adapter, new_itr,
1191                                              q_vector->tx_eitr,
1192                                              tx_ring->total_packets,
1193                                              tx_ring->total_bytes);
1194         q_vector->rx_eitr = ixgbe_update_itr(adapter, new_itr,
1195                                              q_vector->rx_eitr,
1196                                              rx_ring->total_packets,
1197                                              rx_ring->total_bytes);
1198
1199         current_itr = max(q_vector->rx_eitr, q_vector->tx_eitr);
1200
1201         switch (current_itr) {
1202         /* counts and packets in update_itr are dependent on these numbers */
1203         case lowest_latency:
1204                 new_itr = 100000;
1205                 break;
1206         case low_latency:
1207                 new_itr = 20000; /* aka hwitr = ~200 */
1208                 break;
1209         case bulk_latency:
1210                 new_itr = 8000;
1211                 break;
1212         default:
1213                 break;
1214         }
1215
1216         if (new_itr != q_vector->eitr) {
1217                 u32 itr_reg;
1218                 /* do an exponential smoothing */
1219                 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
1220                 q_vector->eitr = new_itr;
1221                 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
1222                 /* must write high and low 16 bits to reset counter */
1223                 IXGBE_WRITE_REG(hw, IXGBE_EITR(0), itr_reg | (itr_reg)<<16);
1224         }
1225
1226         return;
1227 }
1228
1229 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter);
1230
1231 /**
1232  * ixgbe_intr - legacy mode Interrupt Handler
1233  * @irq: interrupt number
1234  * @data: pointer to a network interface device structure
1235  * @pt_regs: CPU registers structure
1236  **/
1237 static irqreturn_t ixgbe_intr(int irq, void *data)
1238 {
1239         struct net_device *netdev = data;
1240         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1241         struct ixgbe_hw *hw = &adapter->hw;
1242         u32 eicr;
1243
1244
1245         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
1246          * therefore no explict interrupt disable is necessary */
1247         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
1248         if (!eicr) {
1249                 /* shared interrupt alert!
1250                  * make sure interrupts are enabled because the read will
1251                  * have disabled interrupts due to EIAM */
1252                 ixgbe_irq_enable(adapter);
1253                 return IRQ_NONE;        /* Not our interrupt */
1254         }
1255
1256         if (eicr & IXGBE_EICR_LSC)
1257                 ixgbe_check_lsc(adapter);
1258
1259         if (netif_rx_schedule_prep(netdev, &adapter->q_vector[0].napi)) {
1260                 adapter->tx_ring[0].total_packets = 0;
1261                 adapter->tx_ring[0].total_bytes = 0;
1262                 adapter->rx_ring[0].total_packets = 0;
1263                 adapter->rx_ring[0].total_bytes = 0;
1264                 /* would disable interrupts here but EIAM disabled it */
1265                 __netif_rx_schedule(netdev, &adapter->q_vector[0].napi);
1266         }
1267
1268         return IRQ_HANDLED;
1269 }
1270
1271 static inline void ixgbe_reset_q_vectors(struct ixgbe_adapter *adapter)
1272 {
1273         int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1274
1275         for (i = 0; i < q_vectors; i++) {
1276                 struct ixgbe_q_vector *q_vector = &adapter->q_vector[i];
1277                 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES);
1278                 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES);
1279                 q_vector->rxr_count = 0;
1280                 q_vector->txr_count = 0;
1281         }
1282 }
1283
1284 /**
1285  * ixgbe_request_irq - initialize interrupts
1286  * @adapter: board private structure
1287  *
1288  * Attempts to configure interrupts using the best available
1289  * capabilities of the hardware and kernel.
1290  **/
1291 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
1292 {
1293         struct net_device *netdev = adapter->netdev;
1294         int err;
1295
1296         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1297                 err = ixgbe_request_msix_irqs(adapter);
1298         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1299                 err = request_irq(adapter->pdev->irq, &ixgbe_intr, 0,
1300                                   netdev->name, netdev);
1301         } else {
1302                 err = request_irq(adapter->pdev->irq, &ixgbe_intr, IRQF_SHARED,
1303                                   netdev->name, netdev);
1304         }
1305
1306         if (err)
1307                 DPRINTK(PROBE, ERR, "request_irq failed, Error %d\n", err);
1308
1309         return err;
1310 }
1311
1312 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
1313 {
1314         struct net_device *netdev = adapter->netdev;
1315
1316         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1317                 int i, q_vectors;
1318
1319                 q_vectors = adapter->num_msix_vectors;
1320
1321                 i = q_vectors - 1;
1322                 free_irq(adapter->msix_entries[i].vector, netdev);
1323
1324                 i--;
1325                 for (; i >= 0; i--) {
1326                         free_irq(adapter->msix_entries[i].vector,
1327                                  &(adapter->q_vector[i]));
1328                 }
1329
1330                 ixgbe_reset_q_vectors(adapter);
1331         } else {
1332                 free_irq(adapter->pdev->irq, netdev);
1333         }
1334 }
1335
1336 /**
1337  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
1338  * @adapter: board private structure
1339  **/
1340 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
1341 {
1342         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
1343         IXGBE_WRITE_FLUSH(&adapter->hw);
1344         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1345                 int i;
1346                 for (i = 0; i < adapter->num_msix_vectors; i++)
1347                         synchronize_irq(adapter->msix_entries[i].vector);
1348         } else {
1349                 synchronize_irq(adapter->pdev->irq);
1350         }
1351 }
1352
1353 /**
1354  * ixgbe_irq_enable - Enable default interrupt generation settings
1355  * @adapter: board private structure
1356  **/
1357 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter)
1358 {
1359         u32 mask;
1360         mask = IXGBE_EIMS_ENABLE_MASK;
1361         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1362         IXGBE_WRITE_FLUSH(&adapter->hw);
1363 }
1364
1365 /**
1366  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
1367  *
1368  **/
1369 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
1370 {
1371         struct ixgbe_hw *hw = &adapter->hw;
1372
1373         IXGBE_WRITE_REG(hw, IXGBE_EITR(0),
1374                         EITR_INTS_PER_SEC_TO_REG(adapter->rx_eitr));
1375
1376         ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(0), 0);
1377         ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(0), 0);
1378
1379         map_vector_to_rxq(adapter, 0, 0);
1380         map_vector_to_txq(adapter, 0, 0);
1381
1382         DPRINTK(HW, INFO, "Legacy interrupt IVAR setup done\n");
1383 }
1384
1385 /**
1386  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
1387  * @adapter: board private structure
1388  *
1389  * Configure the Tx unit of the MAC after a reset.
1390  **/
1391 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
1392 {
1393         u64 tdba, tdwba;
1394         struct ixgbe_hw *hw = &adapter->hw;
1395         u32 i, j, tdlen, txctrl;
1396
1397         /* Setup the HW Tx Head and Tail descriptor pointers */
1398         for (i = 0; i < adapter->num_tx_queues; i++) {
1399                 struct ixgbe_ring *ring = &adapter->tx_ring[i];
1400                 j = ring->reg_idx;
1401                 tdba = ring->dma;
1402                 tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc);
1403                 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j),
1404                                 (tdba & DMA_32BIT_MASK));
1405                 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32));
1406                 tdwba = ring->dma +
1407                         (ring->count * sizeof(union ixgbe_adv_tx_desc));
1408                 tdwba |= IXGBE_TDWBAL_HEAD_WB_ENABLE;
1409                 IXGBE_WRITE_REG(hw, IXGBE_TDWBAL(j), tdwba & DMA_32BIT_MASK);
1410                 IXGBE_WRITE_REG(hw, IXGBE_TDWBAH(j), (tdwba >> 32));
1411                 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), tdlen);
1412                 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0);
1413                 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0);
1414                 adapter->tx_ring[i].head = IXGBE_TDH(j);
1415                 adapter->tx_ring[i].tail = IXGBE_TDT(j);
1416                 /* Disable Tx Head Writeback RO bit, since this hoses
1417                  * bookkeeping if things aren't delivered in order.
1418                  */
1419                 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j));
1420                 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
1421                 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl);
1422         }
1423 }
1424
1425 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1426
1427 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter, int index)
1428 {
1429         struct ixgbe_ring *rx_ring;
1430         u32 srrctl;
1431         int queue0;
1432         unsigned long mask;
1433
1434         /* program one srrctl register per VMDq index */
1435         if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
1436                 long shift, len;
1437                 mask = (unsigned long) adapter->ring_feature[RING_F_RSS].mask;
1438                 len = sizeof(adapter->ring_feature[RING_F_VMDQ].mask) * 8;
1439                 shift = find_first_bit(&mask, len);
1440                 queue0 = index & mask;
1441                 index = (index & mask) >> shift;
1442         /* program one srrctl per RSS queue since RDRXCTL.MVMEN is enabled */
1443         } else {
1444                 mask = (unsigned long) adapter->ring_feature[RING_F_RSS].mask;
1445                 queue0 = index & mask;
1446                 index = index & mask;
1447         }
1448
1449         rx_ring = &adapter->rx_ring[queue0];
1450
1451         srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(index));
1452
1453         srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
1454         srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
1455
1456         if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1457                 srrctl |= IXGBE_RXBUFFER_2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1458                 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1459                 srrctl |= ((IXGBE_RX_HDR_SIZE <<
1460                             IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1461                            IXGBE_SRRCTL_BSIZEHDR_MASK);
1462         } else {
1463                 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1464
1465                 if (rx_ring->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1466                         srrctl |= IXGBE_RXBUFFER_2048 >>
1467                                   IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1468                 else
1469                         srrctl |= rx_ring->rx_buf_len >>
1470                                   IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1471         }
1472         IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(index), srrctl);
1473 }
1474
1475 /**
1476  * ixgbe_get_skb_hdr - helper function for LRO header processing
1477  * @skb: pointer to sk_buff to be added to LRO packet
1478  * @iphdr: pointer to tcp header structure
1479  * @tcph: pointer to tcp header structure
1480  * @hdr_flags: pointer to header flags
1481  * @priv: private data
1482  **/
1483 static int ixgbe_get_skb_hdr(struct sk_buff *skb, void **iphdr, void **tcph,
1484                              u64 *hdr_flags, void *priv)
1485 {
1486         union ixgbe_adv_rx_desc *rx_desc = priv;
1487
1488         /* Verify that this is a valid IPv4 TCP packet */
1489         if (!((ixgbe_get_pkt_info(rx_desc) & IXGBE_RXDADV_PKTTYPE_IPV4) &&
1490              (ixgbe_get_pkt_info(rx_desc) & IXGBE_RXDADV_PKTTYPE_TCP)))
1491                 return -1;
1492
1493         /* Set network headers */
1494         skb_reset_network_header(skb);
1495         skb_set_transport_header(skb, ip_hdrlen(skb));
1496         *iphdr = ip_hdr(skb);
1497         *tcph = tcp_hdr(skb);
1498         *hdr_flags = LRO_IPV4 | LRO_TCP;
1499         return 0;
1500 }
1501
1502 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1503                         (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1504
1505 /**
1506  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
1507  * @adapter: board private structure
1508  *
1509  * Configure the Rx unit of the MAC after a reset.
1510  **/
1511 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
1512 {
1513         u64 rdba;
1514         struct ixgbe_hw *hw = &adapter->hw;
1515         struct net_device *netdev = adapter->netdev;
1516         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1517         int i, j;
1518         u32 rdlen, rxctrl, rxcsum;
1519         static const u32 seed[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
1520                           0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
1521                           0x6A3E67EA, 0x14364D17, 0x3BED200D};
1522         u32 fctrl, hlreg0;
1523         u32 pages;
1524         u32 reta = 0, mrqc;
1525         u32 rdrxctl;
1526         int rx_buf_len;
1527
1528         /* Decide whether to use packet split mode or not */
1529         if (netdev->mtu > ETH_DATA_LEN)
1530                 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1531         else
1532                 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
1533
1534         /* Set the RX buffer length according to the mode */
1535         if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1536                 rx_buf_len = IXGBE_RX_HDR_SIZE;
1537         } else {
1538                 if (netdev->mtu <= ETH_DATA_LEN)
1539                         rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1540                 else
1541                         rx_buf_len = ALIGN(max_frame, 1024);
1542         }
1543
1544         fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
1545         fctrl |= IXGBE_FCTRL_BAM;
1546         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
1547         IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl);
1548
1549         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
1550         if (adapter->netdev->mtu <= ETH_DATA_LEN)
1551                 hlreg0 &= ~IXGBE_HLREG0_JUMBOEN;
1552         else
1553                 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
1554         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
1555
1556         pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1557
1558         rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1559         /* disable receives while setting up the descriptors */
1560         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1561         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
1562
1563         /* Setup the HW Rx Head and Tail Descriptor Pointers and
1564          * the Base and Length of the Rx Descriptor Ring */
1565         for (i = 0; i < adapter->num_rx_queues; i++) {
1566                 rdba = adapter->rx_ring[i].dma;
1567                 j = adapter->rx_ring[i].reg_idx;
1568                 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), (rdba & DMA_32BIT_MASK));
1569                 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32));
1570                 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j), rdlen);
1571                 IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0);
1572                 IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0);
1573                 adapter->rx_ring[i].head = IXGBE_RDH(j);
1574                 adapter->rx_ring[i].tail = IXGBE_RDT(j);
1575                 adapter->rx_ring[i].rx_buf_len = rx_buf_len;
1576                 /* Intitial LRO Settings */
1577                 adapter->rx_ring[i].lro_mgr.max_aggr = IXGBE_MAX_LRO_AGGREGATE;
1578                 adapter->rx_ring[i].lro_mgr.max_desc = IXGBE_MAX_LRO_DESCRIPTORS;
1579                 adapter->rx_ring[i].lro_mgr.get_skb_header = ixgbe_get_skb_hdr;
1580                 adapter->rx_ring[i].lro_mgr.features = LRO_F_EXTRACT_VLAN_ID;
1581                 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL))
1582                         adapter->rx_ring[i].lro_mgr.features |= LRO_F_NAPI;
1583                 adapter->rx_ring[i].lro_mgr.dev = adapter->netdev;
1584                 adapter->rx_ring[i].lro_mgr.ip_summed = CHECKSUM_UNNECESSARY;
1585                 adapter->rx_ring[i].lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY;
1586
1587                 ixgbe_configure_srrctl(adapter, j);
1588         }
1589
1590         /*
1591          * For VMDq support of different descriptor types or
1592          * buffer sizes through the use of multiple SRRCTL
1593          * registers, RDRXCTL.MVMEN must be set to 1
1594          *
1595          * also, the manual doesn't mention it clearly but DCA hints
1596          * will only use queue 0's tags unless this bit is set.  Side
1597          * effects of setting this bit are only that SRRCTL must be
1598          * fully programmed [0..15]
1599          */
1600         rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
1601         rdrxctl |= IXGBE_RDRXCTL_MVMEN;
1602         IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
1603
1604
1605         if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
1606                 /* Fill out redirection table */
1607                 for (i = 0, j = 0; i < 128; i++, j++) {
1608                         if (j == adapter->ring_feature[RING_F_RSS].indices)
1609                                 j = 0;
1610                         /* reta = 4-byte sliding window of
1611                          * 0x00..(indices-1)(indices-1)00..etc. */
1612                         reta = (reta << 8) | (j * 0x11);
1613                         if ((i & 3) == 3)
1614                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
1615                 }
1616
1617                 /* Fill out hash function seeds */
1618                 for (i = 0; i < 10; i++)
1619                         IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), seed[i]);
1620
1621                 mrqc = IXGBE_MRQC_RSSEN
1622                     /* Perform hash on these packet types */
1623                        | IXGBE_MRQC_RSS_FIELD_IPV4
1624                        | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
1625                        | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
1626                        | IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP
1627                        | IXGBE_MRQC_RSS_FIELD_IPV6_EX
1628                        | IXGBE_MRQC_RSS_FIELD_IPV6
1629                        | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
1630                        | IXGBE_MRQC_RSS_FIELD_IPV6_UDP
1631                        | IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP;
1632                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
1633         }
1634
1635         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
1636
1637         if (adapter->flags & IXGBE_FLAG_RSS_ENABLED ||
1638             adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED) {
1639                 /* Disable indicating checksum in descriptor, enables
1640                  * RSS hash */
1641                 rxcsum |= IXGBE_RXCSUM_PCSD;
1642         }
1643         if (!(rxcsum & IXGBE_RXCSUM_PCSD)) {
1644                 /* Enable IPv4 payload checksum for UDP fragments
1645                  * if PCSD is not set */
1646                 rxcsum |= IXGBE_RXCSUM_IPPCSE;
1647         }
1648
1649         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
1650 }
1651
1652 static void ixgbe_vlan_rx_register(struct net_device *netdev,
1653                                    struct vlan_group *grp)
1654 {
1655         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1656         u32 ctrl;
1657
1658         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1659                 ixgbe_irq_disable(adapter);
1660         adapter->vlgrp = grp;
1661
1662         if (grp) {
1663                 /* enable VLAN tag insert/strip */
1664                 ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL);
1665                 ctrl |= IXGBE_VLNCTRL_VME;
1666                 ctrl &= ~IXGBE_VLNCTRL_CFIEN;
1667                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl);
1668         }
1669
1670         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1671                 ixgbe_irq_enable(adapter);
1672 }
1673
1674 static void ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1675 {
1676         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1677
1678         /* add VID to filter table */
1679         ixgbe_set_vfta(&adapter->hw, vid, 0, true);
1680 }
1681
1682 static void ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1683 {
1684         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1685
1686         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1687                 ixgbe_irq_disable(adapter);
1688
1689         vlan_group_set_device(adapter->vlgrp, vid, NULL);
1690
1691         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1692                 ixgbe_irq_enable(adapter);
1693
1694         /* remove VID from filter table */
1695         ixgbe_set_vfta(&adapter->hw, vid, 0, false);
1696 }
1697
1698 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
1699 {
1700         ixgbe_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1701
1702         if (adapter->vlgrp) {
1703                 u16 vid;
1704                 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1705                         if (!vlan_group_get_device(adapter->vlgrp, vid))
1706                                 continue;
1707                         ixgbe_vlan_rx_add_vid(adapter->netdev, vid);
1708                 }
1709         }
1710 }
1711
1712 static u8 *ixgbe_addr_list_itr(struct ixgbe_hw *hw, u8 **mc_addr_ptr, u32 *vmdq)
1713 {
1714         struct dev_mc_list *mc_ptr;
1715         u8 *addr = *mc_addr_ptr;
1716         *vmdq = 0;
1717
1718         mc_ptr = container_of(addr, struct dev_mc_list, dmi_addr[0]);
1719         if (mc_ptr->next)
1720                 *mc_addr_ptr = mc_ptr->next->dmi_addr;
1721         else
1722                 *mc_addr_ptr = NULL;
1723
1724         return addr;
1725 }
1726
1727 /**
1728  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
1729  * @netdev: network interface device structure
1730  *
1731  * The set_rx_method entry point is called whenever the unicast/multicast
1732  * address list or the network interface flags are updated.  This routine is
1733  * responsible for configuring the hardware for proper unicast, multicast and
1734  * promiscuous mode.
1735  **/
1736 static void ixgbe_set_rx_mode(struct net_device *netdev)
1737 {
1738         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1739         struct ixgbe_hw *hw = &adapter->hw;
1740         u32 fctrl, vlnctrl;
1741         u8 *addr_list = NULL;
1742         int addr_count = 0;
1743
1744         /* Check for Promiscuous and All Multicast modes */
1745
1746         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1747         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
1748
1749         if (netdev->flags & IFF_PROMISC) {
1750                 hw->addr_ctrl.user_set_promisc = 1;
1751                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1752                 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
1753         } else {
1754                 if (netdev->flags & IFF_ALLMULTI) {
1755                         fctrl |= IXGBE_FCTRL_MPE;
1756                         fctrl &= ~IXGBE_FCTRL_UPE;
1757                 } else {
1758                         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1759                 }
1760                 vlnctrl |= IXGBE_VLNCTRL_VFE;
1761                 hw->addr_ctrl.user_set_promisc = 0;
1762         }
1763
1764         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
1765         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
1766
1767         /* reprogram secondary unicast list */
1768         addr_count = netdev->uc_count;
1769         if (addr_count)
1770                 addr_list = netdev->uc_list->dmi_addr;
1771         ixgbe_update_uc_addr_list(hw, addr_list, addr_count,
1772                                   ixgbe_addr_list_itr);
1773
1774         /* reprogram multicast list */
1775         addr_count = netdev->mc_count;
1776         if (addr_count)
1777                 addr_list = netdev->mc_list->dmi_addr;
1778         ixgbe_update_mc_addr_list(hw, addr_list, addr_count,
1779                                   ixgbe_addr_list_itr);
1780 }
1781
1782 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
1783 {
1784         int q_idx;
1785         struct ixgbe_q_vector *q_vector;
1786         int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1787
1788         /* legacy and MSI only use one vector */
1789         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1790                 q_vectors = 1;
1791
1792         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1793                 q_vector = &adapter->q_vector[q_idx];
1794                 if (!q_vector->rxr_count)
1795                         continue;
1796                 napi_enable(&q_vector->napi);
1797         }
1798 }
1799
1800 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
1801 {
1802         int q_idx;
1803         struct ixgbe_q_vector *q_vector;
1804         int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1805
1806         /* legacy and MSI only use one vector */
1807         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1808                 q_vectors = 1;
1809
1810         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1811                 q_vector = &adapter->q_vector[q_idx];
1812                 if (!q_vector->rxr_count)
1813                         continue;
1814                 napi_disable(&q_vector->napi);
1815         }
1816 }
1817
1818 static void ixgbe_configure(struct ixgbe_adapter *adapter)
1819 {
1820         struct net_device *netdev = adapter->netdev;
1821         int i;
1822
1823         ixgbe_set_rx_mode(netdev);
1824
1825         ixgbe_restore_vlan(adapter);
1826
1827         ixgbe_configure_tx(adapter);
1828         ixgbe_configure_rx(adapter);
1829         for (i = 0; i < adapter->num_rx_queues; i++)
1830                 ixgbe_alloc_rx_buffers(adapter, &adapter->rx_ring[i],
1831                                            (adapter->rx_ring[i].count - 1));
1832 }
1833
1834 static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
1835 {
1836         struct net_device *netdev = adapter->netdev;
1837         struct ixgbe_hw *hw = &adapter->hw;
1838         int i, j = 0;
1839         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1840         u32 txdctl, rxdctl, mhadd;
1841         u32 gpie;
1842
1843         ixgbe_get_hw_control(adapter);
1844
1845         if ((adapter->flags & IXGBE_FLAG_MSIX_ENABLED) ||
1846             (adapter->flags & IXGBE_FLAG_MSI_ENABLED)) {
1847                 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1848                         gpie = (IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_EIAME |
1849                                 IXGBE_GPIE_PBA_SUPPORT | IXGBE_GPIE_OCD);
1850                 } else {
1851                         /* MSI only */
1852                         gpie = 0;
1853                 }
1854                 /* XXX: to interrupt immediately for EICS writes, enable this */
1855                 /* gpie |= IXGBE_GPIE_EIMEN; */
1856                 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
1857         }
1858
1859         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
1860                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
1861                  * specifically only auto mask tx and rx interrupts */
1862                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
1863         }
1864
1865         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
1866         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
1867                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
1868                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
1869
1870                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
1871         }
1872
1873         for (i = 0; i < adapter->num_tx_queues; i++) {
1874                 j = adapter->tx_ring[i].reg_idx;
1875                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
1876                 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
1877                 txdctl |= (8 << 16);
1878                 txdctl |= IXGBE_TXDCTL_ENABLE;
1879                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
1880         }
1881
1882         for (i = 0; i < adapter->num_rx_queues; i++) {
1883                 j = adapter->rx_ring[i].reg_idx;
1884                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
1885                 /* enable PTHRESH=32 descriptors (half the internal cache)
1886                  * and HTHRESH=0 descriptors (to minimize latency on fetch),
1887                  * this also removes a pesky rx_no_buffer_count increment */
1888                 rxdctl |= 0x0020;
1889                 rxdctl |= IXGBE_RXDCTL_ENABLE;
1890                 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), rxdctl);
1891         }
1892         /* enable all receives */
1893         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1894         rxdctl |= (IXGBE_RXCTRL_DMBYPS | IXGBE_RXCTRL_RXEN);
1895         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxdctl);
1896
1897         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
1898                 ixgbe_configure_msix(adapter);
1899         else
1900                 ixgbe_configure_msi_and_legacy(adapter);
1901
1902         clear_bit(__IXGBE_DOWN, &adapter->state);
1903         ixgbe_napi_enable_all(adapter);
1904
1905         /* clear any pending interrupts, may auto mask */
1906         IXGBE_READ_REG(hw, IXGBE_EICR);
1907
1908         ixgbe_irq_enable(adapter);
1909
1910         /* bring the link up in the watchdog, this could race with our first
1911          * link up interrupt but shouldn't be a problem */
1912         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
1913         adapter->link_check_timeout = jiffies;
1914         mod_timer(&adapter->watchdog_timer, jiffies);
1915         return 0;
1916 }
1917
1918 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
1919 {
1920         WARN_ON(in_interrupt());
1921         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
1922                 msleep(1);
1923         ixgbe_down(adapter);
1924         ixgbe_up(adapter);
1925         clear_bit(__IXGBE_RESETTING, &adapter->state);
1926 }
1927
1928 int ixgbe_up(struct ixgbe_adapter *adapter)
1929 {
1930         /* hardware has been reset, we need to reload some things */
1931         ixgbe_configure(adapter);
1932
1933         return ixgbe_up_complete(adapter);
1934 }
1935
1936 void ixgbe_reset(struct ixgbe_adapter *adapter)
1937 {
1938         if (ixgbe_init_hw(&adapter->hw))
1939                 DPRINTK(PROBE, ERR, "Hardware Error\n");
1940
1941         /* reprogram the RAR[0] in case user changed it. */
1942         ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV);
1943
1944 }
1945
1946 #ifdef CONFIG_PM
1947 static int ixgbe_resume(struct pci_dev *pdev)
1948 {
1949         struct net_device *netdev = pci_get_drvdata(pdev);
1950         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1951         u32 err;
1952
1953         pci_set_power_state(pdev, PCI_D0);
1954         pci_restore_state(pdev);
1955         err = pci_enable_device(pdev);
1956         if (err) {
1957                 printk(KERN_ERR "ixgbe: Cannot enable PCI device from " \
1958                                 "suspend\n");
1959                 return err;
1960         }
1961         pci_set_master(pdev);
1962
1963         pci_enable_wake(pdev, PCI_D3hot, 0);
1964         pci_enable_wake(pdev, PCI_D3cold, 0);
1965
1966         if (netif_running(netdev)) {
1967                 err = ixgbe_request_irq(adapter);
1968                 if (err)
1969                         return err;
1970         }
1971
1972         ixgbe_reset(adapter);
1973
1974         if (netif_running(netdev))
1975                 ixgbe_up(adapter);
1976
1977         netif_device_attach(netdev);
1978
1979         return 0;
1980 }
1981 #endif
1982
1983 /**
1984  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
1985  * @adapter: board private structure
1986  * @rx_ring: ring to free buffers from
1987  **/
1988 static void ixgbe_clean_rx_ring(struct ixgbe_adapter *adapter,
1989                                 struct ixgbe_ring *rx_ring)
1990 {
1991         struct pci_dev *pdev = adapter->pdev;
1992         unsigned long size;
1993         unsigned int i;
1994
1995         /* Free all the Rx ring sk_buffs */
1996
1997         for (i = 0; i < rx_ring->count; i++) {
1998                 struct ixgbe_rx_buffer *rx_buffer_info;
1999
2000                 rx_buffer_info = &rx_ring->rx_buffer_info[i];
2001                 if (rx_buffer_info->dma) {
2002                         pci_unmap_single(pdev, rx_buffer_info->dma,
2003                                          rx_ring->rx_buf_len,
2004                                          PCI_DMA_FROMDEVICE);
2005                         rx_buffer_info->dma = 0;
2006                 }
2007                 if (rx_buffer_info->skb) {
2008                         dev_kfree_skb(rx_buffer_info->skb);
2009                         rx_buffer_info->skb = NULL;
2010                 }
2011                 if (!rx_buffer_info->page)
2012                         continue;
2013                 pci_unmap_page(pdev, rx_buffer_info->page_dma, PAGE_SIZE,
2014                                PCI_DMA_FROMDEVICE);
2015                 rx_buffer_info->page_dma = 0;
2016
2017                 put_page(rx_buffer_info->page);
2018                 rx_buffer_info->page = NULL;
2019         }
2020
2021         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
2022         memset(rx_ring->rx_buffer_info, 0, size);
2023
2024         /* Zero out the descriptor ring */
2025         memset(rx_ring->desc, 0, rx_ring->size);
2026
2027         rx_ring->next_to_clean = 0;
2028         rx_ring->next_to_use = 0;
2029
2030         writel(0, adapter->hw.hw_addr + rx_ring->head);
2031         writel(0, adapter->hw.hw_addr + rx_ring->tail);
2032 }
2033
2034 /**
2035  * ixgbe_clean_tx_ring - Free Tx Buffers
2036  * @adapter: board private structure
2037  * @tx_ring: ring to be cleaned
2038  **/
2039 static void ixgbe_clean_tx_ring(struct ixgbe_adapter *adapter,
2040                                 struct ixgbe_ring *tx_ring)
2041 {
2042         struct ixgbe_tx_buffer *tx_buffer_info;
2043         unsigned long size;
2044         unsigned int i;
2045
2046         /* Free all the Tx ring sk_buffs */
2047
2048         for (i = 0; i < tx_ring->count; i++) {
2049                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2050                 ixgbe_unmap_and_free_tx_resource(adapter, tx_buffer_info);
2051         }
2052
2053         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
2054         memset(tx_ring->tx_buffer_info, 0, size);
2055
2056         /* Zero out the descriptor ring */
2057         memset(tx_ring->desc, 0, tx_ring->size);
2058
2059         tx_ring->next_to_use = 0;
2060         tx_ring->next_to_clean = 0;
2061
2062         writel(0, adapter->hw.hw_addr + tx_ring->head);
2063         writel(0, adapter->hw.hw_addr + tx_ring->tail);
2064 }
2065
2066 /**
2067  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
2068  * @adapter: board private structure
2069  **/
2070 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
2071 {
2072         int i;
2073
2074         for (i = 0; i < adapter->num_rx_queues; i++)
2075                 ixgbe_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2076 }
2077
2078 /**
2079  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
2080  * @adapter: board private structure
2081  **/
2082 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
2083 {
2084         int i;
2085
2086         for (i = 0; i < adapter->num_tx_queues; i++)
2087                 ixgbe_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2088 }
2089
2090 void ixgbe_down(struct ixgbe_adapter *adapter)
2091 {
2092         struct net_device *netdev = adapter->netdev;
2093         u32 rxctrl;
2094
2095         /* signal that we are down to the interrupt handler */
2096         set_bit(__IXGBE_DOWN, &adapter->state);
2097
2098         /* disable receives */
2099         rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);
2100         IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL,
2101                         rxctrl & ~IXGBE_RXCTRL_RXEN);
2102
2103         netif_tx_disable(netdev);
2104
2105         /* disable transmits in the hardware */
2106
2107         /* flush both disables */
2108         IXGBE_WRITE_FLUSH(&adapter->hw);
2109         msleep(10);
2110
2111         ixgbe_irq_disable(adapter);
2112
2113         ixgbe_napi_disable_all(adapter);
2114         del_timer_sync(&adapter->watchdog_timer);
2115         cancel_work_sync(&adapter->watchdog_task);
2116
2117         netif_carrier_off(netdev);
2118         netif_tx_stop_all_queues(netdev);
2119
2120 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
2121         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
2122                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
2123                 dca_remove_requester(&adapter->pdev->dev);
2124         }
2125
2126 #endif
2127         if (!pci_channel_offline(adapter->pdev))
2128                 ixgbe_reset(adapter);
2129         ixgbe_clean_all_tx_rings(adapter);
2130         ixgbe_clean_all_rx_rings(adapter);
2131
2132 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
2133         /* since we reset the hardware DCA settings were cleared */
2134         if (dca_add_requester(&adapter->pdev->dev) == 0) {
2135                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
2136                 /* always use CB2 mode, difference is masked
2137                  * in the CB driver */
2138                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
2139                 ixgbe_setup_dca(adapter);
2140         }
2141 #endif
2142 }
2143
2144 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
2145 {
2146         struct net_device *netdev = pci_get_drvdata(pdev);
2147         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2148 #ifdef CONFIG_PM
2149         int retval = 0;
2150 #endif
2151
2152         netif_device_detach(netdev);
2153
2154         if (netif_running(netdev)) {
2155                 ixgbe_down(adapter);
2156                 ixgbe_free_irq(adapter);
2157         }
2158
2159 #ifdef CONFIG_PM
2160         retval = pci_save_state(pdev);
2161         if (retval)
2162                 return retval;
2163 #endif
2164
2165         pci_enable_wake(pdev, PCI_D3hot, 0);
2166         pci_enable_wake(pdev, PCI_D3cold, 0);
2167
2168         ixgbe_release_hw_control(adapter);
2169
2170         pci_disable_device(pdev);
2171
2172         pci_set_power_state(pdev, pci_choose_state(pdev, state));
2173
2174         return 0;
2175 }
2176
2177 static void ixgbe_shutdown(struct pci_dev *pdev)
2178 {
2179         ixgbe_suspend(pdev, PMSG_SUSPEND);
2180 }
2181
2182 /**
2183  * ixgbe_poll - NAPI Rx polling callback
2184  * @napi: structure for representing this polling device
2185  * @budget: how many packets driver is allowed to clean
2186  *
2187  * This function is used for legacy and MSI, NAPI mode
2188  **/
2189 static int ixgbe_poll(struct napi_struct *napi, int budget)
2190 {
2191         struct ixgbe_q_vector *q_vector = container_of(napi,
2192                                           struct ixgbe_q_vector, napi);
2193         struct ixgbe_adapter *adapter = q_vector->adapter;
2194         int tx_cleaned = 0, work_done = 0;
2195
2196 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
2197         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
2198                 ixgbe_update_tx_dca(adapter, adapter->tx_ring);
2199                 ixgbe_update_rx_dca(adapter, adapter->rx_ring);
2200         }
2201 #endif
2202
2203         tx_cleaned = ixgbe_clean_tx_irq(adapter, adapter->tx_ring);
2204         ixgbe_clean_rx_irq(adapter, adapter->rx_ring, &work_done, budget);
2205
2206         if (tx_cleaned)
2207                 work_done = budget;
2208
2209         /* If budget not fully consumed, exit the polling mode */
2210         if (work_done < budget) {
2211                 netif_rx_complete(adapter->netdev, napi);
2212                 if (adapter->rx_eitr < IXGBE_MIN_ITR_USECS)
2213                         ixgbe_set_itr(adapter);
2214                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2215                         ixgbe_irq_enable(adapter);
2216         }
2217
2218         return work_done;
2219 }
2220
2221 /**
2222  * ixgbe_tx_timeout - Respond to a Tx Hang
2223  * @netdev: network interface device structure
2224  **/
2225 static void ixgbe_tx_timeout(struct net_device *netdev)
2226 {
2227         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2228
2229         /* Do the reset outside of interrupt context */
2230         schedule_work(&adapter->reset_task);
2231 }
2232
2233 static void ixgbe_reset_task(struct work_struct *work)
2234 {
2235         struct ixgbe_adapter *adapter;
2236         adapter = container_of(work, struct ixgbe_adapter, reset_task);
2237
2238         adapter->tx_timeout_count++;
2239
2240         ixgbe_reinit_locked(adapter);
2241 }
2242
2243 static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter *adapter,
2244                                        int vectors)
2245 {
2246         int err, vector_threshold;
2247
2248         /* We'll want at least 3 (vector_threshold):
2249          * 1) TxQ[0] Cleanup
2250          * 2) RxQ[0] Cleanup
2251          * 3) Other (Link Status Change, etc.)
2252          * 4) TCP Timer (optional)
2253          */
2254         vector_threshold = MIN_MSIX_COUNT;
2255
2256         /* The more we get, the more we will assign to Tx/Rx Cleanup
2257          * for the separate queues...where Rx Cleanup >= Tx Cleanup.
2258          * Right now, we simply care about how many we'll get; we'll
2259          * set them up later while requesting irq's.
2260          */
2261         while (vectors >= vector_threshold) {
2262                 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
2263                                       vectors);
2264                 if (!err) /* Success in acquiring all requested vectors. */
2265                         break;
2266                 else if (err < 0)
2267                         vectors = 0; /* Nasty failure, quit now */
2268                 else /* err == number of vectors we should try again with */
2269                         vectors = err;
2270         }
2271
2272         if (vectors < vector_threshold) {
2273                 /* Can't allocate enough MSI-X interrupts?  Oh well.
2274                  * This just means we'll go with either a single MSI
2275                  * vector or fall back to legacy interrupts.
2276                  */
2277                 DPRINTK(HW, DEBUG, "Unable to allocate MSI-X interrupts\n");
2278                 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2279                 kfree(adapter->msix_entries);
2280                 adapter->msix_entries = NULL;
2281                 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2282                 adapter->num_tx_queues = 1;
2283                 adapter->num_rx_queues = 1;
2284         } else {
2285                 adapter->flags |= IXGBE_FLAG_MSIX_ENABLED; /* Woot! */
2286                 adapter->num_msix_vectors = vectors;
2287         }
2288 }
2289
2290 static void __devinit ixgbe_set_num_queues(struct ixgbe_adapter *adapter)
2291 {
2292         int nrq, ntq;
2293         int feature_mask = 0, rss_i, rss_m;
2294
2295         /* Number of supported queues */
2296         switch (adapter->hw.mac.type) {
2297         case ixgbe_mac_82598EB:
2298                 rss_i = adapter->ring_feature[RING_F_RSS].indices;
2299                 rss_m = 0;
2300                 feature_mask |= IXGBE_FLAG_RSS_ENABLED;
2301
2302                 switch (adapter->flags & feature_mask) {
2303                 case (IXGBE_FLAG_RSS_ENABLED):
2304                         rss_m = 0xF;
2305                         nrq = rss_i;
2306                         ntq = rss_i;
2307                         break;
2308                 case 0:
2309                 default:
2310                         rss_i = 0;
2311                         rss_m = 0;
2312                         nrq = 1;
2313                         ntq = 1;
2314                         break;
2315                 }
2316
2317                 adapter->ring_feature[RING_F_RSS].indices = rss_i;
2318                 adapter->ring_feature[RING_F_RSS].mask = rss_m;
2319                 break;
2320         default:
2321                 nrq = 1;
2322                 ntq = 1;
2323                 break;
2324         }
2325
2326         adapter->num_rx_queues = nrq;
2327         adapter->num_tx_queues = ntq;
2328 }
2329
2330 /**
2331  * ixgbe_cache_ring_register - Descriptor ring to register mapping
2332  * @adapter: board private structure to initialize
2333  *
2334  * Once we know the feature-set enabled for the device, we'll cache
2335  * the register offset the descriptor ring is assigned to.
2336  **/
2337 static void __devinit ixgbe_cache_ring_register(struct ixgbe_adapter *adapter)
2338 {
2339         /* TODO: Remove all uses of the indices in the cases where multiple
2340          *       features are OR'd together, if the feature set makes sense.
2341          */
2342         int feature_mask = 0, rss_i;
2343         int i, txr_idx, rxr_idx;
2344
2345         /* Number of supported queues */
2346         switch (adapter->hw.mac.type) {
2347         case ixgbe_mac_82598EB:
2348                 rss_i = adapter->ring_feature[RING_F_RSS].indices;
2349                 txr_idx = 0;
2350                 rxr_idx = 0;
2351                 feature_mask |= IXGBE_FLAG_RSS_ENABLED;
2352                 switch (adapter->flags & feature_mask) {
2353                 case (IXGBE_FLAG_RSS_ENABLED):
2354                         for (i = 0; i < adapter->num_rx_queues; i++)
2355                                 adapter->rx_ring[i].reg_idx = i;
2356                         for (i = 0; i < adapter->num_tx_queues; i++)
2357                                 adapter->tx_ring[i].reg_idx = i;
2358                         break;
2359                 case 0:
2360                 default:
2361                         break;
2362                 }
2363                 break;
2364         default:
2365                 break;
2366         }
2367 }
2368
2369 /**
2370  * ixgbe_alloc_queues - Allocate memory for all rings
2371  * @adapter: board private structure to initialize
2372  *
2373  * We allocate one ring per queue at run-time since we don't know the
2374  * number of queues at compile-time.  The polling_netdev array is
2375  * intended for Multiqueue, but should work fine with a single queue.
2376  **/
2377 static int __devinit ixgbe_alloc_queues(struct ixgbe_adapter *adapter)
2378 {
2379         int i;
2380
2381         adapter->tx_ring = kcalloc(adapter->num_tx_queues,
2382                                    sizeof(struct ixgbe_ring), GFP_KERNEL);
2383         if (!adapter->tx_ring)
2384                 goto err_tx_ring_allocation;
2385
2386         adapter->rx_ring = kcalloc(adapter->num_rx_queues,
2387                                    sizeof(struct ixgbe_ring), GFP_KERNEL);
2388         if (!adapter->rx_ring)
2389                 goto err_rx_ring_allocation;
2390
2391         for (i = 0; i < adapter->num_tx_queues; i++) {
2392                 adapter->tx_ring[i].count = IXGBE_DEFAULT_TXD;
2393                 adapter->tx_ring[i].queue_index = i;
2394         }
2395         for (i = 0; i < adapter->num_rx_queues; i++) {
2396                 adapter->rx_ring[i].count = IXGBE_DEFAULT_RXD;
2397                 adapter->rx_ring[i].queue_index = i;
2398         }
2399
2400         ixgbe_cache_ring_register(adapter);
2401
2402         return 0;
2403
2404 err_rx_ring_allocation:
2405         kfree(adapter->tx_ring);
2406 err_tx_ring_allocation:
2407         return -ENOMEM;
2408 }
2409
2410 /**
2411  * ixgbe_set_interrupt_capability - set MSI-X or MSI if supported
2412  * @adapter: board private structure to initialize
2413  *
2414  * Attempt to configure the interrupts using the best available
2415  * capabilities of the hardware and the kernel.
2416  **/
2417 static int __devinit ixgbe_set_interrupt_capability(struct ixgbe_adapter
2418                                                     *adapter)
2419 {
2420         int err = 0;
2421         int vector, v_budget;
2422
2423         /*
2424          * Set the default interrupt throttle rate.
2425          */
2426         adapter->rx_eitr = (1000000 / IXGBE_DEFAULT_ITR_RX_USECS);
2427         adapter->tx_eitr = (1000000 / IXGBE_DEFAULT_ITR_TX_USECS);
2428
2429         /*
2430          * It's easy to be greedy for MSI-X vectors, but it really
2431          * doesn't do us much good if we have a lot more vectors
2432          * than CPU's.  So let's be conservative and only ask for
2433          * (roughly) twice the number of vectors as there are CPU's.
2434          */
2435         v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues,
2436                        (int)(num_online_cpus() * 2)) + NON_Q_VECTORS;
2437
2438         /*
2439          * At the same time, hardware can only support a maximum of
2440          * MAX_MSIX_COUNT vectors.  With features such as RSS and VMDq,
2441          * we can easily reach upwards of 64 Rx descriptor queues and
2442          * 32 Tx queues.  Thus, we cap it off in those rare cases where
2443          * the cpu count also exceeds our vector limit.
2444          */
2445         v_budget = min(v_budget, MAX_MSIX_COUNT);
2446
2447         /* A failure in MSI-X entry allocation isn't fatal, but it does
2448          * mean we disable MSI-X capabilities of the adapter. */
2449         adapter->msix_entries = kcalloc(v_budget,
2450                                         sizeof(struct msix_entry), GFP_KERNEL);
2451         if (!adapter->msix_entries) {
2452                 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2453                 ixgbe_set_num_queues(adapter);
2454                 kfree(adapter->tx_ring);
2455                 kfree(adapter->rx_ring);
2456                 err = ixgbe_alloc_queues(adapter);
2457                 if (err) {
2458                         DPRINTK(PROBE, ERR, "Unable to allocate memory "
2459                                             "for queues\n");
2460                         goto out;
2461                 }
2462
2463                 goto try_msi;
2464         }
2465
2466         for (vector = 0; vector < v_budget; vector++)
2467                 adapter->msix_entries[vector].entry = vector;
2468
2469         ixgbe_acquire_msix_vectors(adapter, v_budget);
2470
2471         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2472                 goto out;
2473
2474 try_msi:
2475         err = pci_enable_msi(adapter->pdev);
2476         if (!err) {
2477                 adapter->flags |= IXGBE_FLAG_MSI_ENABLED;
2478         } else {
2479                 DPRINTK(HW, DEBUG, "Unable to allocate MSI interrupt, "
2480                                    "falling back to legacy.  Error: %d\n", err);
2481                 /* reset err */
2482                 err = 0;
2483         }
2484
2485 out:
2486         /* Notify the stack of the (possibly) reduced Tx Queue count. */
2487         adapter->netdev->real_num_tx_queues = adapter->num_tx_queues;
2488
2489         return err;
2490 }
2491
2492 static void ixgbe_reset_interrupt_capability(struct ixgbe_adapter *adapter)
2493 {
2494         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2495                 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2496                 pci_disable_msix(adapter->pdev);
2497                 kfree(adapter->msix_entries);
2498                 adapter->msix_entries = NULL;
2499         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
2500                 adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED;
2501                 pci_disable_msi(adapter->pdev);
2502         }
2503         return;
2504 }
2505
2506 /**
2507  * ixgbe_init_interrupt_scheme - Determine proper interrupt scheme
2508  * @adapter: board private structure to initialize
2509  *
2510  * We determine which interrupt scheme to use based on...
2511  * - Kernel support (MSI, MSI-X)
2512  *   - which can be user-defined (via MODULE_PARAM)
2513  * - Hardware queue count (num_*_queues)
2514  *   - defined by miscellaneous hardware support/features (RSS, etc.)
2515  **/
2516 static int __devinit ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter)
2517 {
2518         int err;
2519
2520         /* Number of supported queues */
2521         ixgbe_set_num_queues(adapter);
2522
2523         err = ixgbe_alloc_queues(adapter);
2524         if (err) {
2525                 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
2526                 goto err_alloc_queues;
2527         }
2528
2529         err = ixgbe_set_interrupt_capability(adapter);
2530         if (err) {
2531                 DPRINTK(PROBE, ERR, "Unable to setup interrupt capabilities\n");
2532                 goto err_set_interrupt;
2533         }
2534
2535         DPRINTK(DRV, INFO, "Multiqueue %s: Rx Queue count = %u, "
2536                            "Tx Queue count = %u\n",
2537                 (adapter->num_rx_queues > 1) ? "Enabled" :
2538                 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2539
2540         set_bit(__IXGBE_DOWN, &adapter->state);
2541
2542         return 0;
2543
2544 err_set_interrupt:
2545         kfree(adapter->tx_ring);
2546         kfree(adapter->rx_ring);
2547 err_alloc_queues:
2548         return err;
2549 }
2550
2551 /**
2552  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
2553  * @adapter: board private structure to initialize
2554  *
2555  * ixgbe_sw_init initializes the Adapter private data structure.
2556  * Fields are initialized based on PCI device information and
2557  * OS network device settings (MTU size).
2558  **/
2559 static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
2560 {
2561         struct ixgbe_hw *hw = &adapter->hw;
2562         struct pci_dev *pdev = adapter->pdev;
2563         unsigned int rss;
2564
2565         /* Set capability flags */
2566         rss = min(IXGBE_MAX_RSS_INDICES, (int)num_online_cpus());
2567         adapter->ring_feature[RING_F_RSS].indices = rss;
2568         adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
2569
2570         /* Enable Dynamic interrupt throttling by default */
2571         adapter->rx_eitr = 1;
2572         adapter->tx_eitr = 1;
2573
2574         /* default flow control settings */
2575         hw->fc.original_type = ixgbe_fc_none;
2576         hw->fc.type = ixgbe_fc_none;
2577         hw->fc.high_water = IXGBE_DEFAULT_FCRTH;
2578         hw->fc.low_water = IXGBE_DEFAULT_FCRTL;
2579         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
2580         hw->fc.send_xon = true;
2581
2582         /* select 10G link by default */
2583         hw->mac.link_mode_select = IXGBE_AUTOC_LMS_10G_LINK_NO_AN;
2584         if (hw->mac.ops.reset(hw)) {
2585                 dev_err(&pdev->dev, "HW Init failed\n");
2586                 return -EIO;
2587         }
2588         if (hw->mac.ops.setup_link_speed(hw, IXGBE_LINK_SPEED_10GB_FULL, true,
2589                                          false)) {
2590                 dev_err(&pdev->dev, "Link Speed setup failed\n");
2591                 return -EIO;
2592         }
2593
2594         /* initialize eeprom parameters */
2595         if (ixgbe_init_eeprom(hw)) {
2596                 dev_err(&pdev->dev, "EEPROM initialization failed\n");
2597                 return -EIO;
2598         }
2599
2600         /* enable rx csum by default */
2601         adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
2602
2603         set_bit(__IXGBE_DOWN, &adapter->state);
2604
2605         return 0;
2606 }
2607
2608 /**
2609  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
2610  * @adapter: board private structure
2611  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
2612  *
2613  * Return 0 on success, negative on failure
2614  **/
2615 int ixgbe_setup_tx_resources(struct ixgbe_adapter *adapter,
2616                              struct ixgbe_ring *tx_ring)
2617 {
2618         struct pci_dev *pdev = adapter->pdev;
2619         int size;
2620
2621         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
2622         tx_ring->tx_buffer_info = vmalloc(size);
2623         if (!tx_ring->tx_buffer_info)
2624                 goto err;
2625         memset(tx_ring->tx_buffer_info, 0, size);
2626
2627         /* round up to nearest 4K */
2628         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc) +
2629                         sizeof(u32);
2630         tx_ring->size = ALIGN(tx_ring->size, 4096);
2631
2632         tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
2633                                              &tx_ring->dma);
2634         if (!tx_ring->desc)
2635                 goto err;
2636
2637         tx_ring->next_to_use = 0;
2638         tx_ring->next_to_clean = 0;
2639         tx_ring->work_limit = tx_ring->count;
2640         return 0;
2641
2642 err:
2643         vfree(tx_ring->tx_buffer_info);
2644         tx_ring->tx_buffer_info = NULL;
2645         DPRINTK(PROBE, ERR, "Unable to allocate memory for the transmit "
2646                             "descriptor ring\n");
2647         return -ENOMEM;
2648 }
2649
2650 /**
2651  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
2652  * @adapter: board private structure
2653  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
2654  *
2655  * Returns 0 on success, negative on failure
2656  **/
2657 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
2658                              struct ixgbe_ring *rx_ring)
2659 {
2660         struct pci_dev *pdev = adapter->pdev;
2661         int size;
2662
2663         size = sizeof(struct net_lro_desc) * IXGBE_MAX_LRO_DESCRIPTORS;
2664         rx_ring->lro_mgr.lro_arr = vmalloc(size);
2665         if (!rx_ring->lro_mgr.lro_arr)
2666                 return -ENOMEM;
2667         memset(rx_ring->lro_mgr.lro_arr, 0, size);
2668
2669         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
2670         rx_ring->rx_buffer_info = vmalloc(size);
2671         if (!rx_ring->rx_buffer_info) {
2672                 DPRINTK(PROBE, ERR,
2673                         "vmalloc allocation failed for the rx desc ring\n");
2674                 goto alloc_failed;
2675         }
2676         memset(rx_ring->rx_buffer_info, 0, size);
2677
2678         /* Round up to nearest 4K */
2679         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
2680         rx_ring->size = ALIGN(rx_ring->size, 4096);
2681
2682         rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size, &rx_ring->dma);
2683
2684         if (!rx_ring->desc) {
2685                 DPRINTK(PROBE, ERR,
2686                         "Memory allocation failed for the rx desc ring\n");
2687                 vfree(rx_ring->rx_buffer_info);
2688                 goto alloc_failed;
2689         }
2690
2691         rx_ring->next_to_clean = 0;
2692         rx_ring->next_to_use = 0;
2693
2694         return 0;
2695
2696 alloc_failed:
2697         vfree(rx_ring->lro_mgr.lro_arr);
2698         rx_ring->lro_mgr.lro_arr = NULL;
2699         return -ENOMEM;
2700 }
2701
2702 /**
2703  * ixgbe_free_tx_resources - Free Tx Resources per Queue
2704  * @adapter: board private structure
2705  * @tx_ring: Tx descriptor ring for a specific queue
2706  *
2707  * Free all transmit software resources
2708  **/
2709 static void ixgbe_free_tx_resources(struct ixgbe_adapter *adapter,
2710                                     struct ixgbe_ring *tx_ring)
2711 {
2712         struct pci_dev *pdev = adapter->pdev;
2713
2714         ixgbe_clean_tx_ring(adapter, tx_ring);
2715
2716         vfree(tx_ring->tx_buffer_info);
2717         tx_ring->tx_buffer_info = NULL;
2718
2719         pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2720
2721         tx_ring->desc = NULL;
2722 }
2723
2724 /**
2725  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
2726  * @adapter: board private structure
2727  *
2728  * Free all transmit software resources
2729  **/
2730 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
2731 {
2732         int i;
2733
2734         for (i = 0; i < adapter->num_tx_queues; i++)
2735                 ixgbe_free_tx_resources(adapter, &adapter->tx_ring[i]);
2736 }
2737
2738 /**
2739  * ixgbe_free_rx_resources - Free Rx Resources
2740  * @adapter: board private structure
2741  * @rx_ring: ring to clean the resources from
2742  *
2743  * Free all receive software resources
2744  **/
2745 static void ixgbe_free_rx_resources(struct ixgbe_adapter *adapter,
2746                                     struct ixgbe_ring *rx_ring)
2747 {
2748         struct pci_dev *pdev = adapter->pdev;
2749
2750         vfree(rx_ring->lro_mgr.lro_arr);
2751         rx_ring->lro_mgr.lro_arr = NULL;
2752
2753         ixgbe_clean_rx_ring(adapter, rx_ring);
2754
2755         vfree(rx_ring->rx_buffer_info);
2756         rx_ring->rx_buffer_info = NULL;
2757
2758         pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2759
2760         rx_ring->desc = NULL;
2761 }
2762
2763 /**
2764  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
2765  * @adapter: board private structure
2766  *
2767  * Free all receive software resources
2768  **/
2769 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
2770 {
2771         int i;
2772
2773         for (i = 0; i < adapter->num_rx_queues; i++)
2774                 ixgbe_free_rx_resources(adapter, &adapter->rx_ring[i]);
2775 }
2776
2777 /**
2778  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
2779  * @adapter: board private structure
2780  *
2781  * If this function returns with an error, then it's possible one or
2782  * more of the rings is populated (while the rest are not).  It is the
2783  * callers duty to clean those orphaned rings.
2784  *
2785  * Return 0 on success, negative on failure
2786  **/
2787 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
2788 {
2789         int i, err = 0;
2790
2791         for (i = 0; i < adapter->num_tx_queues; i++) {
2792                 err = ixgbe_setup_tx_resources(adapter, &adapter->tx_ring[i]);
2793                 if (err) {
2794                         DPRINTK(PROBE, ERR,
2795                                 "Allocation for Tx Queue %u failed\n", i);
2796                         break;
2797                 }
2798         }
2799
2800         return err;
2801 }
2802
2803 /**
2804  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
2805  * @adapter: board private structure
2806  *
2807  * If this function returns with an error, then it's possible one or
2808  * more of the rings is populated (while the rest are not).  It is the
2809  * callers duty to clean those orphaned rings.
2810  *
2811  * Return 0 on success, negative on failure
2812  **/
2813
2814 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
2815 {
2816         int i, err = 0;
2817
2818         for (i = 0; i < adapter->num_rx_queues; i++) {
2819                 err = ixgbe_setup_rx_resources(adapter, &adapter->rx_ring[i]);
2820                 if (err) {
2821                         DPRINTK(PROBE, ERR,
2822                                 "Allocation for Rx Queue %u failed\n", i);
2823                         break;
2824                 }
2825         }
2826
2827         return err;
2828 }
2829
2830 /**
2831  * ixgbe_change_mtu - Change the Maximum Transfer Unit
2832  * @netdev: network interface device structure
2833  * @new_mtu: new value for maximum frame size
2834  *
2835  * Returns 0 on success, negative on failure
2836  **/
2837 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
2838 {
2839         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2840         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
2841
2842         /* MTU < 68 is an error and causes problems on some kernels */
2843         if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
2844                 return -EINVAL;
2845
2846         DPRINTK(PROBE, INFO, "changing MTU from %d to %d\n",
2847                 netdev->mtu, new_mtu);
2848         /* must set new MTU before calling down or up */
2849         netdev->mtu = new_mtu;
2850
2851         if (netif_running(netdev))
2852                 ixgbe_reinit_locked(adapter);
2853
2854         return 0;
2855 }
2856
2857 /**
2858  * ixgbe_open - Called when a network interface is made active
2859  * @netdev: network interface device structure
2860  *
2861  * Returns 0 on success, negative value on failure
2862  *
2863  * The open entry point is called when a network interface is made
2864  * active by the system (IFF_UP).  At this point all resources needed
2865  * for transmit and receive operations are allocated, the interrupt
2866  * handler is registered with the OS, the watchdog timer is started,
2867  * and the stack is notified that the interface is ready.
2868  **/
2869 static int ixgbe_open(struct net_device *netdev)
2870 {
2871         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2872         int err;
2873
2874         /* disallow open during test */
2875         if (test_bit(__IXGBE_TESTING, &adapter->state))
2876                 return -EBUSY;
2877
2878         /* allocate transmit descriptors */
2879         err = ixgbe_setup_all_tx_resources(adapter);
2880         if (err)
2881                 goto err_setup_tx;
2882
2883         /* allocate receive descriptors */
2884         err = ixgbe_setup_all_rx_resources(adapter);
2885         if (err)
2886                 goto err_setup_rx;
2887
2888         ixgbe_configure(adapter);
2889
2890         err = ixgbe_request_irq(adapter);
2891         if (err)
2892                 goto err_req_irq;
2893
2894         err = ixgbe_up_complete(adapter);
2895         if (err)
2896                 goto err_up;
2897
2898         netif_tx_start_all_queues(netdev);
2899
2900         return 0;
2901
2902 err_up:
2903         ixgbe_release_hw_control(adapter);
2904         ixgbe_free_irq(adapter);
2905 err_req_irq:
2906         ixgbe_free_all_rx_resources(adapter);
2907 err_setup_rx:
2908         ixgbe_free_all_tx_resources(adapter);
2909 err_setup_tx:
2910         ixgbe_reset(adapter);
2911
2912         return err;
2913 }
2914
2915 /**
2916  * ixgbe_close - Disables a network interface
2917  * @netdev: network interface device structure
2918  *
2919  * Returns 0, this is not allowed to fail
2920  *
2921  * The close entry point is called when an interface is de-activated
2922  * by the OS.  The hardware is still under the drivers control, but
2923  * needs to be disabled.  A global MAC reset is issued to stop the
2924  * hardware, and all transmit and receive resources are freed.
2925  **/
2926 static int ixgbe_close(struct net_device *netdev)
2927 {
2928         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2929
2930         ixgbe_down(adapter);
2931         ixgbe_free_irq(adapter);
2932
2933         ixgbe_free_all_tx_resources(adapter);
2934         ixgbe_free_all_rx_resources(adapter);
2935
2936         ixgbe_release_hw_control(adapter);
2937
2938         return 0;
2939 }
2940
2941 /**
2942  * ixgbe_update_stats - Update the board statistics counters.
2943  * @adapter: board private structure
2944  **/
2945 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
2946 {
2947         struct ixgbe_hw *hw = &adapter->hw;
2948         u64 total_mpc = 0;
2949         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
2950
2951         adapter->stats.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
2952         for (i = 0; i < 8; i++) {
2953                 /* for packet buffers not used, the register should read 0 */
2954                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
2955                 missed_rx += mpc;
2956                 adapter->stats.mpc[i] += mpc;
2957                 total_mpc += adapter->stats.mpc[i];
2958                 adapter->stats.rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
2959         }
2960         adapter->stats.gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
2961         /* work around hardware counting issue */
2962         adapter->stats.gprc -= missed_rx;
2963
2964         /* 82598 hardware only has a 32 bit counter in the high register */
2965         adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
2966         adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
2967         adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORH);
2968         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
2969         adapter->stats.bprc += bprc;
2970         adapter->stats.mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
2971         adapter->stats.mprc -= bprc;
2972         adapter->stats.roc += IXGBE_READ_REG(hw, IXGBE_ROC);
2973         adapter->stats.prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
2974         adapter->stats.prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
2975         adapter->stats.prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
2976         adapter->stats.prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
2977         adapter->stats.prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
2978         adapter->stats.prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
2979         adapter->stats.rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
2980         adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
2981         adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
2982         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
2983         adapter->stats.lxontxc += lxon;
2984         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
2985         adapter->stats.lxofftxc += lxoff;
2986         adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
2987         adapter->stats.gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
2988         adapter->stats.mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
2989         /*
2990          * 82598 errata - tx of flow control packets is included in tx counters
2991          */
2992         xon_off_tot = lxon + lxoff;
2993         adapter->stats.gptc -= xon_off_tot;
2994         adapter->stats.mptc -= xon_off_tot;
2995         adapter->stats.gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
2996         adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
2997         adapter->stats.rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
2998         adapter->stats.rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
2999         adapter->stats.tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
3000         adapter->stats.ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
3001         adapter->stats.ptc64 -= xon_off_tot;
3002         adapter->stats.ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
3003         adapter->stats.ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
3004         adapter->stats.ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
3005         adapter->stats.ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
3006         adapter->stats.ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
3007         adapter->stats.bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
3008
3009         /* Fill out the OS statistics structure */
3010         adapter->net_stats.multicast = adapter->stats.mprc;
3011
3012         /* Rx Errors */
3013         adapter->net_stats.rx_errors = adapter->stats.crcerrs +
3014                                                 adapter->stats.rlec;
3015         adapter->net_stats.rx_dropped = 0;
3016         adapter->net_stats.rx_length_errors = adapter->stats.rlec;
3017         adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3018         adapter->net_stats.rx_missed_errors = total_mpc;
3019 }
3020
3021 /**
3022  * ixgbe_watchdog - Timer Call-back
3023  * @data: pointer to adapter cast into an unsigned long
3024  **/
3025 static void ixgbe_watchdog(unsigned long data)
3026 {
3027         struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
3028         struct ixgbe_hw *hw = &adapter->hw;
3029
3030         /* Do the watchdog outside of interrupt context due to the lovely
3031          * delays that some of the newer hardware requires */
3032         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
3033                 /* Cause software interrupt to ensure rx rings are cleaned */
3034                 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3035                         u32 eics =
3036                          (1 << (adapter->num_msix_vectors - NON_Q_VECTORS)) - 1;
3037                         IXGBE_WRITE_REG(hw, IXGBE_EICS, eics);
3038                 } else {
3039                         /* For legacy and MSI interrupts don't set any bits that
3040                          * are enabled for EIAM, because this operation would
3041                          * set *both* EIMS and EICS for any bit in EIAM */
3042                         IXGBE_WRITE_REG(hw, IXGBE_EICS,
3043                                     (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
3044                 }
3045                 /* Reset the timer */
3046                 mod_timer(&adapter->watchdog_timer,
3047                           round_jiffies(jiffies + 2 * HZ));
3048         }
3049
3050         schedule_work(&adapter->watchdog_task);
3051 }
3052
3053 /**
3054  *  ixgbe_watchdog_task - worker thread to bring link up
3055  *  @work: pointer to work_struct containing our data
3056  **/
3057 static void ixgbe_watchdog_task(struct work_struct *work)
3058 {
3059         struct ixgbe_adapter *adapter = container_of(work,
3060                                                      struct ixgbe_adapter,
3061                                                      watchdog_task);
3062         struct net_device *netdev = adapter->netdev;
3063         struct ixgbe_hw *hw = &adapter->hw;
3064         u32 link_speed = adapter->link_speed;
3065         bool link_up = adapter->link_up;
3066
3067         adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK;
3068
3069         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE) {
3070                 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
3071                 if (link_up ||
3072                     time_after(jiffies, (adapter->link_check_timeout +
3073                                          IXGBE_TRY_LINK_TIMEOUT))) {
3074                         IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
3075                         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
3076                 }
3077                 adapter->link_up = link_up;
3078                 adapter->link_speed = link_speed;
3079         }
3080
3081         if (link_up) {
3082                 if (!netif_carrier_ok(netdev)) {
3083                         u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
3084                         u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
3085 #define FLOW_RX (frctl & IXGBE_FCTRL_RFCE)
3086 #define FLOW_TX (rmcs & IXGBE_RMCS_TFCE_802_3X)
3087                         DPRINTK(LINK, INFO, "NIC Link is Up %s, "
3088                                 "Flow Control: %s\n",
3089                                 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
3090                                  "10 Gbps" :
3091                                  (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
3092                                   "1 Gbps" : "unknown speed")),
3093                                 ((FLOW_RX && FLOW_TX) ? "RX/TX" :
3094                                  (FLOW_RX ? "RX" :
3095                                  (FLOW_TX ? "TX" : "None"))));
3096
3097                         netif_carrier_on(netdev);
3098                         netif_tx_wake_all_queues(netdev);
3099                 } else {
3100                         /* Force detection of hung controller */
3101                         adapter->detect_tx_hung = true;
3102                 }
3103         } else {
3104                 adapter->link_up = false;
3105                 adapter->link_speed = 0;
3106                 if (netif_carrier_ok(netdev)) {
3107                         DPRINTK(LINK, INFO, "NIC Link is Down\n");
3108                         netif_carrier_off(netdev);
3109                         netif_tx_stop_all_queues(netdev);
3110                 }
3111         }
3112
3113         ixgbe_update_stats(adapter);
3114         adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK;
3115 }
3116
3117 static int ixgbe_tso(struct ixgbe_adapter *adapter,
3118                          struct ixgbe_ring *tx_ring, struct sk_buff *skb,
3119                          u32 tx_flags, u8 *hdr_len)
3120 {
3121         struct ixgbe_adv_tx_context_desc *context_desc;
3122         unsigned int i;
3123         int err;
3124         struct ixgbe_tx_buffer *tx_buffer_info;
3125         u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
3126         u32 mss_l4len_idx = 0, l4len;
3127
3128         if (skb_is_gso(skb)) {
3129                 if (skb_header_cloned(skb)) {
3130                         err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
3131                         if (err)
3132                                 return err;
3133                 }
3134                 l4len = tcp_hdrlen(skb);
3135                 *hdr_len += l4len;
3136
3137                 if (skb->protocol == htons(ETH_P_IP)) {
3138                         struct iphdr *iph = ip_hdr(skb);
3139                         iph->tot_len = 0;
3140                         iph->check = 0;
3141                         tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
3142                                                                  iph->daddr, 0,
3143                                                                  IPPROTO_TCP,
3144                                                                  0);
3145                         adapter->hw_tso_ctxt++;
3146                 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
3147                         ipv6_hdr(skb)->payload_len = 0;
3148                         tcp_hdr(skb)->check =
3149                             ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3150                                              &ipv6_hdr(skb)->daddr,
3151                                              0, IPPROTO_TCP, 0);
3152                         adapter->hw_tso6_ctxt++;
3153                 }
3154
3155                 i = tx_ring->next_to_use;
3156
3157                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3158                 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
3159
3160                 /* VLAN MACLEN IPLEN */
3161                 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3162                         vlan_macip_lens |=
3163                             (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
3164                 vlan_macip_lens |= ((skb_network_offset(skb)) <<
3165                                     IXGBE_ADVTXD_MACLEN_SHIFT);
3166                 *hdr_len += skb_network_offset(skb);
3167                 vlan_macip_lens |=
3168                     (skb_transport_header(skb) - skb_network_header(skb));
3169                 *hdr_len +=
3170                     (skb_transport_header(skb) - skb_network_header(skb));
3171                 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3172                 context_desc->seqnum_seed = 0;
3173
3174                 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3175                 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
3176                                     IXGBE_ADVTXD_DTYP_CTXT);
3177
3178                 if (skb->protocol == htons(ETH_P_IP))
3179                         type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
3180                 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
3181                 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
3182
3183                 /* MSS L4LEN IDX */
3184                 mss_l4len_idx |=
3185                     (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
3186                 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
3187                 /* use index 1 for TSO */
3188                 mss_l4len_idx |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3189                 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
3190
3191                 tx_buffer_info->time_stamp = jiffies;
3192                 tx_buffer_info->next_to_watch = i;
3193
3194                 i++;
3195                 if (i == tx_ring->count)
3196                         i = 0;
3197                 tx_ring->next_to_use = i;
3198
3199                 return true;
3200         }
3201         return false;
3202 }
3203
3204 static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
3205                                    struct ixgbe_ring *tx_ring,
3206                                    struct sk_buff *skb, u32 tx_flags)
3207 {
3208         struct ixgbe_adv_tx_context_desc *context_desc;
3209         unsigned int i;
3210         struct ixgbe_tx_buffer *tx_buffer_info;
3211         u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
3212
3213         if (skb->ip_summed == CHECKSUM_PARTIAL ||
3214             (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
3215                 i = tx_ring->next_to_use;
3216                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3217                 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
3218
3219                 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3220                         vlan_macip_lens |=
3221                             (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
3222                 vlan_macip_lens |= (skb_network_offset(skb) <<
3223                                     IXGBE_ADVTXD_MACLEN_SHIFT);
3224                 if (skb->ip_summed == CHECKSUM_PARTIAL)
3225                         vlan_macip_lens |= (skb_transport_header(skb) -
3226                                             skb_network_header(skb));
3227
3228                 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3229                 context_desc->seqnum_seed = 0;
3230
3231                 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
3232                                     IXGBE_ADVTXD_DTYP_CTXT);
3233
3234                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
3235                         switch (skb->protocol) {
3236                         case __constant_htons(ETH_P_IP):
3237                                 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
3238                                 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
3239                                         type_tucmd_mlhl |=
3240                                                 IXGBE_ADVTXD_TUCMD_L4T_TCP;
3241                                 break;
3242
3243                         case __constant_htons(ETH_P_IPV6):
3244                                 /* XXX what about other V6 headers?? */
3245                                 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
3246                                         type_tucmd_mlhl |=
3247                                                 IXGBE_ADVTXD_TUCMD_L4T_TCP;
3248                                 break;
3249
3250                         default:
3251                                 if (unlikely(net_ratelimit())) {
3252                                         DPRINTK(PROBE, WARNING,
3253                                          "partial checksum but proto=%x!\n",
3254                                          skb->protocol);
3255                                 }
3256                                 break;
3257                         }
3258                 }
3259
3260                 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
3261                 /* use index zero for tx checksum offload */
3262                 context_desc->mss_l4len_idx = 0;
3263
3264                 tx_buffer_info->time_stamp = jiffies;
3265                 tx_buffer_info->next_to_watch = i;
3266                 adapter->hw_csum_tx_good++;
3267                 i++;
3268                 if (i == tx_ring->count)
3269                         i = 0;
3270                 tx_ring->next_to_use = i;
3271
3272                 return true;
3273         }
3274         return false;
3275 }
3276
3277 static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
3278                         struct ixgbe_ring *tx_ring,
3279                         struct sk_buff *skb, unsigned int first)
3280 {
3281         struct ixgbe_tx_buffer *tx_buffer_info;
3282         unsigned int len = skb->len;
3283         unsigned int offset = 0, size, count = 0, i;
3284         unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
3285         unsigned int f;
3286
3287         len -= skb->data_len;
3288
3289         i = tx_ring->next_to_use;
3290
3291         while (len) {
3292                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3293                 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
3294
3295                 tx_buffer_info->length = size;
3296                 tx_buffer_info->dma = pci_map_single(adapter->pdev,
3297                                                   skb->data + offset,
3298                                                   size, PCI_DMA_TODEVICE);
3299                 tx_buffer_info->time_stamp = jiffies;
3300                 tx_buffer_info->next_to_watch = i;
3301
3302                 len -= size;
3303                 offset += size;
3304                 count++;
3305                 i++;
3306                 if (i == tx_ring->count)
3307                         i = 0;
3308         }
3309
3310         for (f = 0; f < nr_frags; f++) {
3311                 struct skb_frag_struct *frag;
3312
3313                 frag = &skb_shinfo(skb)->frags[f];
3314                 len = frag->size;
3315                 offset = frag->page_offset;
3316
3317                 while (len) {
3318                         tx_buffer_info = &tx_ring->tx_buffer_info[i];
3319                         size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
3320
3321                         tx_buffer_info->length = size;
3322                         tx_buffer_info->dma = pci_map_page(adapter->pdev,
3323                                                         frag->page,
3324                                                         offset,
3325                                                         size, PCI_DMA_TODEVICE);
3326                         tx_buffer_info->time_stamp = jiffies;
3327                         tx_buffer_info->next_to_watch = i;
3328
3329                         len -= size;
3330                         offset += size;
3331                         count++;
3332                         i++;
3333                         if (i == tx_ring->count)
3334                                 i = 0;
3335                 }
3336         }
3337         if (i == 0)
3338                 i = tx_ring->count - 1;
3339         else
3340                 i = i - 1;
3341         tx_ring->tx_buffer_info[i].skb = skb;
3342         tx_ring->tx_buffer_info[first].next_to_watch = i;
3343
3344         return count;
3345 }
3346
3347 static void ixgbe_tx_queue(struct ixgbe_adapter *adapter,
3348                                struct ixgbe_ring *tx_ring,
3349                                int tx_flags, int count, u32 paylen, u8 hdr_len)
3350 {
3351         union ixgbe_adv_tx_desc *tx_desc = NULL;
3352         struct ixgbe_tx_buffer *tx_buffer_info;
3353         u32 olinfo_status = 0, cmd_type_len = 0;
3354         unsigned int i;
3355         u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
3356
3357         cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
3358
3359         cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
3360
3361         if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3362                 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
3363
3364         if (tx_flags & IXGBE_TX_FLAGS_TSO) {
3365                 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
3366
3367                 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3368                                                 IXGBE_ADVTXD_POPTS_SHIFT;
3369
3370                 /* use index 1 context for tso */
3371                 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3372                 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3373                         olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
3374                                                 IXGBE_ADVTXD_POPTS_SHIFT;
3375
3376         } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3377                 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3378                                                 IXGBE_ADVTXD_POPTS_SHIFT;
3379
3380         olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
3381
3382         i = tx_ring->next_to_use;
3383         while (count--) {
3384                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3385                 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
3386                 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
3387                 tx_desc->read.cmd_type_len =
3388                         cpu_to_le32(cmd_type_len | tx_buffer_info->length);
3389                 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
3390
3391                 i++;
3392                 if (i == tx_ring->count)
3393                         i = 0;
3394         }
3395
3396         tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
3397
3398         /*
3399          * Force memory writes to complete before letting h/w
3400          * know there are new descriptors to fetch.  (Only
3401          * applicable for weak-ordered memory model archs,
3402          * such as IA-64).
3403          */
3404         wmb();
3405
3406         tx_ring->next_to_use = i;
3407         writel(i, adapter->hw.hw_addr + tx_ring->tail);
3408 }
3409
3410 static int __ixgbe_maybe_stop_tx(struct net_device *netdev,
3411                                  struct ixgbe_ring *tx_ring, int size)
3412 {
3413         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3414
3415         netif_stop_subqueue(netdev, tx_ring->queue_index);
3416         /* Herbert's original patch had:
3417          *  smp_mb__after_netif_stop_queue();
3418          * but since that doesn't exist yet, just open code it. */
3419         smp_mb();
3420
3421         /* We need to check again in a case another CPU has just
3422          * made room available. */
3423         if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
3424                 return -EBUSY;
3425
3426         /* A reprieve! - use start_queue because it doesn't call schedule */
3427         netif_start_subqueue(netdev, tx_ring->queue_index);
3428         ++adapter->restart_queue;
3429         return 0;
3430 }
3431
3432 static int ixgbe_maybe_stop_tx(struct net_device *netdev,
3433                                struct ixgbe_ring *tx_ring, int size)
3434 {
3435         if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
3436                 return 0;
3437         return __ixgbe_maybe_stop_tx(netdev, tx_ring, size);
3438 }
3439
3440
3441 static int ixgbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3442 {
3443         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3444         struct ixgbe_ring *tx_ring;
3445         unsigned int len = skb->len;
3446         unsigned int first;
3447         unsigned int tx_flags = 0;
3448         u8 hdr_len = 0;
3449         int r_idx = 0, tso;
3450         unsigned int mss = 0;
3451         int count = 0;
3452         unsigned int f;
3453         unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
3454         len -= skb->data_len;
3455         r_idx = (adapter->num_tx_queues - 1) & skb->queue_mapping;
3456         tx_ring = &adapter->tx_ring[r_idx];
3457
3458
3459         if (skb->len <= 0) {
3460                 dev_kfree_skb(skb);
3461                 return NETDEV_TX_OK;
3462         }
3463         mss = skb_shinfo(skb)->gso_size;
3464
3465         if (mss)
3466                 count++;
3467         else if (skb->ip_summed == CHECKSUM_PARTIAL)
3468                 count++;
3469
3470         count += TXD_USE_COUNT(len);
3471         for (f = 0; f < nr_frags; f++)
3472                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3473
3474         if (ixgbe_maybe_stop_tx(netdev, tx_ring, count)) {
3475                 adapter->tx_busy++;
3476                 return NETDEV_TX_BUSY;
3477         }
3478         if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
3479                 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3480                 tx_flags |= (vlan_tx_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT);
3481         }
3482
3483         if (skb->protocol == htons(ETH_P_IP))
3484                 tx_flags |= IXGBE_TX_FLAGS_IPV4;
3485         first = tx_ring->next_to_use;
3486         tso = ixgbe_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
3487         if (tso < 0) {
3488                 dev_kfree_skb_any(skb);
3489                 return NETDEV_TX_OK;
3490         }
3491
3492         if (tso)
3493                 tx_flags |= IXGBE_TX_FLAGS_TSO;
3494         else if (ixgbe_tx_csum(adapter, tx_ring, skb, tx_flags) &&
3495                  (skb->ip_summed == CHECKSUM_PARTIAL))
3496                 tx_flags |= IXGBE_TX_FLAGS_CSUM;
3497
3498         ixgbe_tx_queue(adapter, tx_ring, tx_flags,
3499                            ixgbe_tx_map(adapter, tx_ring, skb, first),
3500                            skb->len, hdr_len);
3501
3502         netdev->trans_start = jiffies;
3503
3504         ixgbe_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
3505
3506         return NETDEV_TX_OK;
3507 }
3508
3509 /**
3510  * ixgbe_get_stats - Get System Network Statistics
3511  * @netdev: network interface device structure
3512  *
3513  * Returns the address of the device statistics structure.
3514  * The statistics are actually updated from the timer callback.
3515  **/
3516 static struct net_device_stats *ixgbe_get_stats(struct net_device *netdev)
3517 {
3518         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3519
3520         /* only return the current stats */
3521         return &adapter->net_stats;
3522 }
3523
3524 /**
3525  * ixgbe_set_mac - Change the Ethernet Address of the NIC
3526  * @netdev: network interface device structure
3527  * @p: pointer to an address structure
3528  *
3529  * Returns 0 on success, negative on failure
3530  **/
3531 static int ixgbe_set_mac(struct net_device *netdev, void *p)
3532 {
3533         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3534         struct sockaddr *addr = p;
3535
3536         if (!is_valid_ether_addr(addr->sa_data))
3537                 return -EADDRNOTAVAIL;
3538
3539         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3540         memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3541
3542         ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV);
3543
3544         return 0;
3545 }
3546
3547 #ifdef CONFIG_NET_POLL_CONTROLLER
3548 /*
3549  * Polling 'interrupt' - used by things like netconsole to send skbs
3550  * without having to re-enable interrupts. It's not called while
3551  * the interrupt routine is executing.
3552  */
3553 static void ixgbe_netpoll(struct net_device *netdev)
3554 {
3555         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3556
3557         disable_irq(adapter->pdev->irq);
3558         adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
3559         ixgbe_intr(adapter->pdev->irq, netdev);
3560         adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
3561         enable_irq(adapter->pdev->irq);
3562 }
3563 #endif
3564
3565 /**
3566  * ixgbe_napi_add_all - prep napi structs for use
3567  * @adapter: private struct
3568  * helper function to napi_add each possible q_vector->napi
3569  */
3570 static void ixgbe_napi_add_all(struct ixgbe_adapter *adapter)
3571 {
3572         int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
3573         int (*poll)(struct napi_struct *, int);
3574
3575         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3576                 poll = &ixgbe_clean_rxonly;
3577         } else {
3578                 poll = &ixgbe_poll;
3579                 /* only one q_vector for legacy modes */
3580                 q_vectors = 1;
3581         }
3582
3583         for (i = 0; i < q_vectors; i++) {
3584                 struct ixgbe_q_vector *q_vector = &adapter->q_vector[i];
3585                 netif_napi_add(adapter->netdev, &q_vector->napi,
3586                                (*poll), 64);
3587         }
3588 }
3589
3590 /**
3591  * ixgbe_probe - Device Initialization Routine
3592  * @pdev: PCI device information struct
3593  * @ent: entry in ixgbe_pci_tbl
3594  *
3595  * Returns 0 on success, negative on failure
3596  *
3597  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
3598  * The OS initialization, configuring of the adapter private structure,
3599  * and a hardware reset occur.
3600  **/
3601 static int __devinit ixgbe_probe(struct pci_dev *pdev,
3602                                  const struct pci_device_id *ent)
3603 {
3604         struct net_device *netdev;
3605         struct ixgbe_adapter *adapter = NULL;
3606         struct ixgbe_hw *hw;
3607         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
3608         unsigned long mmio_start, mmio_len;
3609         static int cards_found;
3610         int i, err, pci_using_dac;
3611         u16 link_status, link_speed, link_width;
3612         u32 part_num;
3613
3614         err = pci_enable_device(pdev);
3615         if (err)
3616                 return err;
3617
3618         if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK) &&
3619             !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
3620                 pci_using_dac = 1;
3621         } else {
3622                 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
3623                 if (err) {
3624                         err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
3625                         if (err) {
3626                                 dev_err(&pdev->dev, "No usable DMA "
3627                                         "configuration, aborting\n");
3628                                 goto err_dma;
3629                         }
3630                 }
3631                 pci_using_dac = 0;
3632         }
3633
3634         err = pci_request_regions(pdev, ixgbe_driver_name);
3635         if (err) {
3636                 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
3637                 goto err_pci_reg;
3638         }
3639
3640         pci_set_master(pdev);
3641         pci_save_state(pdev);
3642
3643         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), MAX_TX_QUEUES);
3644         if (!netdev) {
3645                 err = -ENOMEM;
3646                 goto err_alloc_etherdev;
3647         }
3648
3649         SET_NETDEV_DEV(netdev, &pdev->dev);
3650
3651         pci_set_drvdata(pdev, netdev);
3652         adapter = netdev_priv(netdev);
3653
3654         adapter->netdev = netdev;
3655         adapter->pdev = pdev;
3656         hw = &adapter->hw;
3657         hw->back = adapter;
3658         adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
3659
3660         mmio_start = pci_resource_start(pdev, 0);
3661         mmio_len = pci_resource_len(pdev, 0);
3662
3663         hw->hw_addr = ioremap(mmio_start, mmio_len);
3664         if (!hw->hw_addr) {
3665                 err = -EIO;
3666                 goto err_ioremap;
3667         }
3668
3669         for (i = 1; i <= 5; i++) {
3670                 if (pci_resource_len(pdev, i) == 0)
3671                         continue;
3672         }
3673
3674         netdev->open = &ixgbe_open;
3675         netdev->stop = &ixgbe_close;
3676         netdev->hard_start_xmit = &ixgbe_xmit_frame;
3677         netdev->get_stats = &ixgbe_get_stats;
3678         netdev->set_rx_mode = &ixgbe_set_rx_mode;
3679         netdev->set_multicast_list = &ixgbe_set_rx_mode;
3680         netdev->set_mac_address = &ixgbe_set_mac;
3681         netdev->change_mtu = &ixgbe_change_mtu;
3682         ixgbe_set_ethtool_ops(netdev);
3683         netdev->tx_timeout = &ixgbe_tx_timeout;
3684         netdev->watchdog_timeo = 5 * HZ;
3685         netdev->vlan_rx_register = ixgbe_vlan_rx_register;
3686         netdev->vlan_rx_add_vid = ixgbe_vlan_rx_add_vid;
3687         netdev->vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid;
3688 #ifdef CONFIG_NET_POLL_CONTROLLER
3689         netdev->poll_controller = ixgbe_netpoll;
3690 #endif
3691         strcpy(netdev->name, pci_name(pdev));
3692
3693         netdev->mem_start = mmio_start;
3694         netdev->mem_end = mmio_start + mmio_len;
3695
3696         adapter->bd_number = cards_found;
3697
3698         /* PCI config space info */
3699         hw->vendor_id = pdev->vendor;
3700         hw->device_id = pdev->device;
3701         hw->revision_id = pdev->revision;
3702         hw->subsystem_vendor_id = pdev->subsystem_vendor;
3703         hw->subsystem_device_id = pdev->subsystem_device;
3704
3705         /* Setup hw api */
3706         memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
3707         hw->mac.type  = ii->mac;
3708
3709         err = ii->get_invariants(hw);
3710         if (err)
3711                 goto err_hw_init;
3712
3713         /* setup the private structure */
3714         err = ixgbe_sw_init(adapter);
3715         if (err)
3716                 goto err_sw_init;
3717
3718         netdev->features = NETIF_F_SG |
3719                            NETIF_F_IP_CSUM |
3720                            NETIF_F_HW_VLAN_TX |
3721                            NETIF_F_HW_VLAN_RX |
3722                            NETIF_F_HW_VLAN_FILTER;
3723
3724         netdev->features |= NETIF_F_IPV6_CSUM;
3725         netdev->features |= NETIF_F_TSO;
3726         netdev->features |= NETIF_F_TSO6;
3727         netdev->features |= NETIF_F_LRO;
3728
3729         netdev->vlan_features |= NETIF_F_TSO;
3730         netdev->vlan_features |= NETIF_F_TSO6;
3731         netdev->vlan_features |= NETIF_F_IP_CSUM;
3732         netdev->vlan_features |= NETIF_F_SG;
3733
3734         if (pci_using_dac)
3735                 netdev->features |= NETIF_F_HIGHDMA;
3736
3737         /* make sure the EEPROM is good */
3738         if (ixgbe_validate_eeprom_checksum(hw, NULL) < 0) {
3739                 dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n");
3740                 err = -EIO;
3741                 goto err_eeprom;
3742         }
3743
3744         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
3745         memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
3746
3747         if (ixgbe_validate_mac_addr(netdev->dev_addr)) {
3748                 err = -EIO;
3749                 goto err_eeprom;
3750         }
3751
3752         init_timer(&adapter->watchdog_timer);
3753         adapter->watchdog_timer.function = &ixgbe_watchdog;
3754         adapter->watchdog_timer.data = (unsigned long)adapter;
3755
3756         INIT_WORK(&adapter->reset_task, ixgbe_reset_task);
3757         INIT_WORK(&adapter->watchdog_task, ixgbe_watchdog_task);
3758
3759         err = ixgbe_init_interrupt_scheme(adapter);
3760         if (err)
3761                 goto err_sw_init;
3762
3763         /* print bus type/speed/width info */
3764         pci_read_config_word(pdev, IXGBE_PCI_LINK_STATUS, &link_status);
3765         link_speed = link_status & IXGBE_PCI_LINK_SPEED;
3766         link_width = link_status & IXGBE_PCI_LINK_WIDTH;
3767         dev_info(&pdev->dev, "(PCI Express:%s:%s) "
3768                  "%02x:%02x:%02x:%02x:%02x:%02x\n",
3769                 ((link_speed == IXGBE_PCI_LINK_SPEED_5000) ? "5.0Gb/s" :
3770                  (link_speed == IXGBE_PCI_LINK_SPEED_2500) ? "2.5Gb/s" :
3771                  "Unknown"),
3772                 ((link_width == IXGBE_PCI_LINK_WIDTH_8) ? "Width x8" :
3773                  (link_width == IXGBE_PCI_LINK_WIDTH_4) ? "Width x4" :
3774                  (link_width == IXGBE_PCI_LINK_WIDTH_2) ? "Width x2" :
3775                  (link_width == IXGBE_PCI_LINK_WIDTH_1) ? "Width x1" :
3776                  "Unknown"),
3777                 netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
3778                 netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
3779         ixgbe_read_part_num(hw, &part_num);
3780         dev_info(&pdev->dev, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
3781                  hw->mac.type, hw->phy.type,
3782                  (part_num >> 8), (part_num & 0xff));
3783
3784         if (link_width <= IXGBE_PCI_LINK_WIDTH_4) {
3785                 dev_warn(&pdev->dev, "PCI-Express bandwidth available for "
3786                          "this card is not sufficient for optimal "
3787                          "performance.\n");
3788                 dev_warn(&pdev->dev, "For optimal performance a x8 "
3789                          "PCI-Express slot is required.\n");
3790         }
3791
3792         /* reset the hardware with the new settings */
3793         ixgbe_start_hw(hw);
3794
3795         netif_carrier_off(netdev);
3796         netif_tx_stop_all_queues(netdev);
3797
3798         ixgbe_napi_add_all(adapter);
3799
3800         strcpy(netdev->name, "eth%d");
3801         err = register_netdev(netdev);
3802         if (err)
3803                 goto err_register;
3804
3805 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
3806         if (dca_add_requester(&pdev->dev) == 0) {
3807                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
3808                 /* always use CB2 mode, difference is masked
3809                  * in the CB driver */
3810                 IXGBE_WRITE_REG(hw, IXGBE_DCA_CTRL, 2);
3811                 ixgbe_setup_dca(adapter);
3812         }
3813 #endif
3814
3815         dev_info(&pdev->dev, "Intel(R) 10 Gigabit Network Connection\n");
3816         cards_found++;
3817         return 0;
3818
3819 err_register:
3820         ixgbe_release_hw_control(adapter);
3821 err_hw_init:
3822 err_sw_init:
3823         ixgbe_reset_interrupt_capability(adapter);
3824 err_eeprom:
3825         iounmap(hw->hw_addr);
3826 err_ioremap:
3827         free_netdev(netdev);
3828 err_alloc_etherdev:
3829         pci_release_regions(pdev);
3830 err_pci_reg:
3831 err_dma:
3832         pci_disable_device(pdev);
3833         return err;
3834 }
3835
3836 /**
3837  * ixgbe_remove - Device Removal Routine
3838  * @pdev: PCI device information struct
3839  *
3840  * ixgbe_remove is called by the PCI subsystem to alert the driver
3841  * that it should release a PCI device.  The could be caused by a
3842  * Hot-Plug event, or because the driver is going to be removed from
3843  * memory.
3844  **/
3845 static void __devexit ixgbe_remove(struct pci_dev *pdev)
3846 {
3847         struct net_device *netdev = pci_get_drvdata(pdev);
3848         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3849
3850         set_bit(__IXGBE_DOWN, &adapter->state);
3851         del_timer_sync(&adapter->watchdog_timer);
3852
3853         flush_scheduled_work();
3854
3855 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
3856         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
3857                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
3858                 dca_remove_requester(&pdev->dev);
3859                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
3860         }
3861
3862 #endif
3863         unregister_netdev(netdev);
3864
3865         ixgbe_reset_interrupt_capability(adapter);
3866
3867         ixgbe_release_hw_control(adapter);
3868
3869         iounmap(adapter->hw.hw_addr);
3870         pci_release_regions(pdev);
3871
3872         DPRINTK(PROBE, INFO, "complete\n");
3873         kfree(adapter->tx_ring);
3874         kfree(adapter->rx_ring);
3875
3876         free_netdev(netdev);
3877
3878         pci_disable_device(pdev);
3879 }
3880
3881 /**
3882  * ixgbe_io_error_detected - called when PCI error is detected
3883  * @pdev: Pointer to PCI device
3884  * @state: The current pci connection state
3885  *
3886  * This function is called after a PCI bus error affecting
3887  * this device has been detected.
3888  */
3889 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
3890                                                 pci_channel_state_t state)
3891 {
3892         struct net_device *netdev = pci_get_drvdata(pdev);
3893         struct ixgbe_adapter *adapter = netdev->priv;
3894
3895         netif_device_detach(netdev);
3896
3897         if (netif_running(netdev))
3898                 ixgbe_down(adapter);
3899         pci_disable_device(pdev);
3900
3901         /* Request a slot slot reset. */
3902         return PCI_ERS_RESULT_NEED_RESET;
3903 }
3904
3905 /**
3906  * ixgbe_io_slot_reset - called after the pci bus has been reset.
3907  * @pdev: Pointer to PCI device
3908  *
3909  * Restart the card from scratch, as if from a cold-boot.
3910  */
3911 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
3912 {
3913         struct net_device *netdev = pci_get_drvdata(pdev);
3914         struct ixgbe_adapter *adapter = netdev->priv;
3915
3916         if (pci_enable_device(pdev)) {
3917                 DPRINTK(PROBE, ERR,
3918                         "Cannot re-enable PCI device after reset.\n");
3919                 return PCI_ERS_RESULT_DISCONNECT;
3920         }
3921         pci_set_master(pdev);
3922         pci_restore_state(pdev);
3923
3924         pci_enable_wake(pdev, PCI_D3hot, 0);
3925         pci_enable_wake(pdev, PCI_D3cold, 0);
3926
3927         ixgbe_reset(adapter);
3928
3929         return PCI_ERS_RESULT_RECOVERED;
3930 }
3931
3932 /**
3933  * ixgbe_io_resume - called when traffic can start flowing again.
3934  * @pdev: Pointer to PCI device
3935  *
3936  * This callback is called when the error recovery driver tells us that
3937  * its OK to resume normal operation.
3938  */
3939 static void ixgbe_io_resume(struct pci_dev *pdev)
3940 {
3941         struct net_device *netdev = pci_get_drvdata(pdev);
3942         struct ixgbe_adapter *adapter = netdev->priv;
3943
3944         if (netif_running(netdev)) {
3945                 if (ixgbe_up(adapter)) {
3946                         DPRINTK(PROBE, INFO, "ixgbe_up failed after reset\n");
3947                         return;
3948                 }
3949         }
3950
3951         netif_device_attach(netdev);
3952
3953 }
3954
3955 static struct pci_error_handlers ixgbe_err_handler = {
3956         .error_detected = ixgbe_io_error_detected,
3957         .slot_reset = ixgbe_io_slot_reset,
3958         .resume = ixgbe_io_resume,
3959 };
3960
3961 static struct pci_driver ixgbe_driver = {
3962         .name     = ixgbe_driver_name,
3963         .id_table = ixgbe_pci_tbl,
3964         .probe    = ixgbe_probe,
3965         .remove   = __devexit_p(ixgbe_remove),
3966 #ifdef CONFIG_PM
3967         .suspend  = ixgbe_suspend,
3968         .resume   = ixgbe_resume,
3969 #endif
3970         .shutdown = ixgbe_shutdown,
3971         .err_handler = &ixgbe_err_handler
3972 };
3973
3974 /**
3975  * ixgbe_init_module - Driver Registration Routine
3976  *
3977  * ixgbe_init_module is the first routine called when the driver is
3978  * loaded. All it does is register with the PCI subsystem.
3979  **/
3980 static int __init ixgbe_init_module(void)
3981 {
3982         int ret;
3983         printk(KERN_INFO "%s: %s - version %s\n", ixgbe_driver_name,
3984                ixgbe_driver_string, ixgbe_driver_version);
3985
3986         printk(KERN_INFO "%s: %s\n", ixgbe_driver_name, ixgbe_copyright);
3987
3988 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
3989         dca_register_notify(&dca_notifier);
3990
3991 #endif
3992         ret = pci_register_driver(&ixgbe_driver);
3993         return ret;
3994 }
3995 module_init(ixgbe_init_module);
3996
3997 /**
3998  * ixgbe_exit_module - Driver Exit Cleanup Routine
3999  *
4000  * ixgbe_exit_module is called just before the driver is removed
4001  * from memory.
4002  **/
4003 static void __exit ixgbe_exit_module(void)
4004 {
4005 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
4006         dca_unregister_notify(&dca_notifier);
4007 #endif
4008         pci_unregister_driver(&ixgbe_driver);
4009 }
4010
4011 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
4012 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
4013                             void *p)
4014 {
4015         int ret_val;
4016
4017         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
4018                                          __ixgbe_notify_dca);
4019
4020         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
4021 }
4022 #endif /* CONFIG_DCA or CONFIG_DCA_MODULE */
4023
4024 module_exit(ixgbe_exit_module);
4025
4026 /* ixgbe_main.c */