1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2009 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/types.h>
29 #include <linux/module.h>
30 #include <linux/pci.h>
31 #include <linux/netdevice.h>
32 #include <linux/vmalloc.h>
33 #include <linux/string.h>
36 #include <linux/tcp.h>
37 #include <linux/ipv6.h>
38 #include <net/checksum.h>
39 #include <net/ip6_checksum.h>
40 #include <linux/ethtool.h>
41 #include <linux/if_vlan.h>
44 #include "ixgbe_common.h"
46 char ixgbe_driver_name[] = "ixgbe";
47 static const char ixgbe_driver_string[] =
48 "Intel(R) 10 Gigabit PCI Express Network Driver";
50 #define DRV_VERSION "1.3.56-k2"
51 const char ixgbe_driver_version[] = DRV_VERSION;
52 static char ixgbe_copyright[] = "Copyright (c) 1999-2009 Intel Corporation.";
54 static const struct ixgbe_info *ixgbe_info_tbl[] = {
55 [board_82598] = &ixgbe_82598_info,
58 /* ixgbe_pci_tbl - PCI Device ID Table
60 * Wildcard entries (PCI_ANY_ID) should come last
61 * Last entry must be all 0s
63 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
64 * Class, Class Mask, private data (not used) }
66 static struct pci_device_id ixgbe_pci_tbl[] = {
67 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598),
69 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT),
71 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT),
73 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT),
75 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4),
77 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT),
79 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT),
81 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM),
83 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR),
85 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM),
87 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX),
90 /* required last entry */
93 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
95 #ifdef CONFIG_IXGBE_DCA
96 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
98 static struct notifier_block dca_notifier = {
99 .notifier_call = ixgbe_notify_dca,
105 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
106 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
107 MODULE_LICENSE("GPL");
108 MODULE_VERSION(DRV_VERSION);
110 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
112 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
116 /* Let firmware take over control of h/w */
117 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
118 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
119 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
122 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
126 /* Let firmware know the driver has taken over */
127 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
128 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
129 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
132 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, u16 int_alloc_entry,
137 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
138 index = (int_alloc_entry >> 2) & 0x1F;
139 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR(index));
140 ivar &= ~(0xFF << (8 * (int_alloc_entry & 0x3)));
141 ivar |= (msix_vector << (8 * (int_alloc_entry & 0x3)));
142 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR(index), ivar);
145 static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter,
146 struct ixgbe_tx_buffer
149 if (tx_buffer_info->dma) {
150 pci_unmap_page(adapter->pdev, tx_buffer_info->dma,
151 tx_buffer_info->length, PCI_DMA_TODEVICE);
152 tx_buffer_info->dma = 0;
154 if (tx_buffer_info->skb) {
155 dev_kfree_skb_any(tx_buffer_info->skb);
156 tx_buffer_info->skb = NULL;
158 /* tx_buffer_info must be completely set up in the transmit path */
161 static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
162 struct ixgbe_ring *tx_ring,
165 struct ixgbe_hw *hw = &adapter->hw;
168 /* Detect a transmit hang in hardware, this serializes the
169 * check with the clearing of time_stamp and movement of eop */
170 head = IXGBE_READ_REG(hw, tx_ring->head);
171 tail = IXGBE_READ_REG(hw, tx_ring->tail);
172 adapter->detect_tx_hung = false;
173 if ((head != tail) &&
174 tx_ring->tx_buffer_info[eop].time_stamp &&
175 time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) &&
176 !(IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & IXGBE_TFCS_TXOFF)) {
177 /* detected Tx unit hang */
178 union ixgbe_adv_tx_desc *tx_desc;
179 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
180 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
182 " TDH, TDT <%x>, <%x>\n"
183 " next_to_use <%x>\n"
184 " next_to_clean <%x>\n"
185 "tx_buffer_info[next_to_clean]\n"
186 " time_stamp <%lx>\n"
188 tx_ring->queue_index,
190 tx_ring->next_to_use, eop,
191 tx_ring->tx_buffer_info[eop].time_stamp, jiffies);
198 #define IXGBE_MAX_TXD_PWR 14
199 #define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
201 /* Tx Descriptors needed, worst case */
202 #define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
203 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
204 #define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
205 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
207 static void ixgbe_tx_timeout(struct net_device *netdev);
210 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
211 * @adapter: board private structure
212 * @tx_ring: tx ring to clean
214 static bool ixgbe_clean_tx_irq(struct ixgbe_adapter *adapter,
215 struct ixgbe_ring *tx_ring)
217 struct net_device *netdev = adapter->netdev;
218 union ixgbe_adv_tx_desc *tx_desc, *eop_desc;
219 struct ixgbe_tx_buffer *tx_buffer_info;
220 unsigned int i, eop, count = 0;
221 unsigned int total_bytes = 0, total_packets = 0;
223 i = tx_ring->next_to_clean;
224 eop = tx_ring->tx_buffer_info[i].next_to_watch;
225 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
227 while ((eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) &&
228 (count < tx_ring->count)) {
229 bool cleaned = false;
230 for ( ; !cleaned; count++) {
232 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
233 tx_buffer_info = &tx_ring->tx_buffer_info[i];
234 cleaned = (i == eop);
235 skb = tx_buffer_info->skb;
237 if (cleaned && skb) {
238 unsigned int segs, bytecount;
240 /* gso_segs is currently only valid for tcp */
241 segs = skb_shinfo(skb)->gso_segs ?: 1;
242 /* multiply data chunks by size of headers */
243 bytecount = ((segs - 1) * skb_headlen(skb)) +
245 total_packets += segs;
246 total_bytes += bytecount;
249 ixgbe_unmap_and_free_tx_resource(adapter,
252 tx_desc->wb.status = 0;
255 if (i == tx_ring->count)
259 eop = tx_ring->tx_buffer_info[i].next_to_watch;
260 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
263 tx_ring->next_to_clean = i;
265 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
266 if (unlikely(count && netif_carrier_ok(netdev) &&
267 (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
268 /* Make sure that anybody stopping the queue after this
269 * sees the new next_to_clean.
272 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
273 !test_bit(__IXGBE_DOWN, &adapter->state)) {
274 netif_wake_subqueue(netdev, tx_ring->queue_index);
275 ++adapter->restart_queue;
279 if (adapter->detect_tx_hung) {
280 if (ixgbe_check_tx_hang(adapter, tx_ring, i)) {
281 /* schedule immediate reset if we believe we hung */
283 "tx hang %d detected, resetting adapter\n",
284 adapter->tx_timeout_count + 1);
285 ixgbe_tx_timeout(adapter->netdev);
289 /* re-arm the interrupt */
290 if ((total_packets >= tx_ring->work_limit) ||
291 (count == tx_ring->count))
292 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, tx_ring->v_idx);
294 tx_ring->total_bytes += total_bytes;
295 tx_ring->total_packets += total_packets;
296 tx_ring->stats.packets += total_packets;
297 tx_ring->stats.bytes += total_bytes;
298 adapter->net_stats.tx_bytes += total_bytes;
299 adapter->net_stats.tx_packets += total_packets;
300 return (total_packets ? true : false);
303 #ifdef CONFIG_IXGBE_DCA
304 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
305 struct ixgbe_ring *rx_ring)
309 int q = rx_ring - adapter->rx_ring;
311 if (rx_ring->cpu != cpu) {
312 rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q));
313 rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK;
314 rxctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
315 rxctrl |= IXGBE_DCA_RXCTRL_DESC_DCA_EN;
316 rxctrl |= IXGBE_DCA_RXCTRL_HEAD_DCA_EN;
317 rxctrl &= ~(IXGBE_DCA_RXCTRL_DESC_RRO_EN);
318 rxctrl &= ~(IXGBE_DCA_RXCTRL_DESC_WRO_EN |
319 IXGBE_DCA_RXCTRL_DESC_HSRO_EN);
320 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q), rxctrl);
326 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
327 struct ixgbe_ring *tx_ring)
331 int q = tx_ring - adapter->tx_ring;
333 if (tx_ring->cpu != cpu) {
334 txctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q));
335 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK;
336 txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
337 txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN;
338 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q), txctrl);
344 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
348 if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
351 for (i = 0; i < adapter->num_tx_queues; i++) {
352 adapter->tx_ring[i].cpu = -1;
353 ixgbe_update_tx_dca(adapter, &adapter->tx_ring[i]);
355 for (i = 0; i < adapter->num_rx_queues; i++) {
356 adapter->rx_ring[i].cpu = -1;
357 ixgbe_update_rx_dca(adapter, &adapter->rx_ring[i]);
361 static int __ixgbe_notify_dca(struct device *dev, void *data)
363 struct net_device *netdev = dev_get_drvdata(dev);
364 struct ixgbe_adapter *adapter = netdev_priv(netdev);
365 unsigned long event = *(unsigned long *)data;
368 case DCA_PROVIDER_ADD:
369 /* if we're already enabled, don't do it again */
370 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
372 /* Always use CB2 mode, difference is masked
373 * in the CB driver. */
374 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
375 if (dca_add_requester(dev) == 0) {
376 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
377 ixgbe_setup_dca(adapter);
380 /* Fall Through since DCA is disabled. */
381 case DCA_PROVIDER_REMOVE:
382 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
383 dca_remove_requester(dev);
384 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
385 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
393 #endif /* CONFIG_IXGBE_DCA */
395 * ixgbe_receive_skb - Send a completed packet up the stack
396 * @adapter: board private structure
397 * @skb: packet to send up
398 * @status: hardware indication of status of receive
399 * @rx_ring: rx descriptor ring (for a specific queue) to setup
400 * @rx_desc: rx descriptor
402 static void ixgbe_receive_skb(struct ixgbe_q_vector *q_vector,
403 struct sk_buff *skb, u8 status,
404 union ixgbe_adv_rx_desc *rx_desc)
406 struct ixgbe_adapter *adapter = q_vector->adapter;
407 struct napi_struct *napi = &q_vector->napi;
408 bool is_vlan = (status & IXGBE_RXD_STAT_VP);
409 u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
411 skb_record_rx_queue(skb, q_vector - &adapter->q_vector[0]);
412 if (skb->ip_summed == CHECKSUM_UNNECESSARY) {
413 if (adapter->vlgrp && is_vlan && (tag != 0))
414 vlan_gro_receive(napi, adapter->vlgrp, tag, skb);
416 napi_gro_receive(napi, skb);
418 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
419 if (adapter->vlgrp && is_vlan && (tag != 0))
420 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, tag);
422 netif_receive_skb(skb);
424 if (adapter->vlgrp && is_vlan && (tag != 0))
425 vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
433 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
434 * @adapter: address of board private structure
435 * @status_err: hardware indication of status of receive
436 * @skb: skb currently being received and modified
438 static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter,
439 u32 status_err, struct sk_buff *skb)
441 skb->ip_summed = CHECKSUM_NONE;
443 /* Rx csum disabled */
444 if (!(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
447 /* if IP and error */
448 if ((status_err & IXGBE_RXD_STAT_IPCS) &&
449 (status_err & IXGBE_RXDADV_ERR_IPE)) {
450 adapter->hw_csum_rx_error++;
454 if (!(status_err & IXGBE_RXD_STAT_L4CS))
457 if (status_err & IXGBE_RXDADV_ERR_TCPE) {
458 adapter->hw_csum_rx_error++;
462 /* It must be a TCP or UDP packet with a valid checksum */
463 skb->ip_summed = CHECKSUM_UNNECESSARY;
464 adapter->hw_csum_rx_good++;
468 * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
469 * @adapter: address of board private structure
471 static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter *adapter,
472 struct ixgbe_ring *rx_ring,
475 struct pci_dev *pdev = adapter->pdev;
476 union ixgbe_adv_rx_desc *rx_desc;
477 struct ixgbe_rx_buffer *bi;
480 i = rx_ring->next_to_use;
481 bi = &rx_ring->rx_buffer_info[i];
483 while (cleaned_count--) {
484 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
487 (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
489 bi->page = alloc_page(GFP_ATOMIC);
491 adapter->alloc_rx_page_failed++;
496 /* use a half page if we're re-using */
497 bi->page_offset ^= (PAGE_SIZE / 2);
500 bi->page_dma = pci_map_page(pdev, bi->page,
508 skb = netdev_alloc_skb(adapter->netdev,
509 (rx_ring->rx_buf_len +
513 adapter->alloc_rx_buff_failed++;
518 * Make buffer alignment 2 beyond a 16 byte boundary
519 * this will result in a 16 byte aligned IP header after
520 * the 14 byte MAC header is removed
522 skb_reserve(skb, NET_IP_ALIGN);
525 bi->dma = pci_map_single(pdev, skb->data,
529 /* Refresh the desc even if buffer_addrs didn't change because
530 * each write-back erases this info. */
531 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
532 rx_desc->read.pkt_addr = cpu_to_le64(bi->page_dma);
533 rx_desc->read.hdr_addr = cpu_to_le64(bi->dma);
535 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
539 if (i == rx_ring->count)
541 bi = &rx_ring->rx_buffer_info[i];
545 if (rx_ring->next_to_use != i) {
546 rx_ring->next_to_use = i;
548 i = (rx_ring->count - 1);
551 * Force memory writes to complete before letting h/w
552 * know there are new descriptors to fetch. (Only
553 * applicable for weak-ordered memory model archs,
557 writel(i, adapter->hw.hw_addr + rx_ring->tail);
561 static inline u16 ixgbe_get_hdr_info(union ixgbe_adv_rx_desc *rx_desc)
563 return rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
566 static inline u16 ixgbe_get_pkt_info(union ixgbe_adv_rx_desc *rx_desc)
568 return rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
571 static bool ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
572 struct ixgbe_ring *rx_ring,
573 int *work_done, int work_to_do)
575 struct ixgbe_adapter *adapter = q_vector->adapter;
576 struct pci_dev *pdev = adapter->pdev;
577 union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
578 struct ixgbe_rx_buffer *rx_buffer_info, *next_buffer;
583 bool cleaned = false;
584 int cleaned_count = 0;
585 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
587 i = rx_ring->next_to_clean;
588 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
589 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
590 rx_buffer_info = &rx_ring->rx_buffer_info[i];
592 while (staterr & IXGBE_RXD_STAT_DD) {
594 if (*work_done >= work_to_do)
598 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
599 hdr_info = le16_to_cpu(ixgbe_get_hdr_info(rx_desc));
600 len = (hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
601 IXGBE_RXDADV_HDRBUFLEN_SHIFT;
602 if (hdr_info & IXGBE_RXDADV_SPH)
603 adapter->rx_hdr_split++;
604 if (len > IXGBE_RX_HDR_SIZE)
605 len = IXGBE_RX_HDR_SIZE;
606 upper_len = le16_to_cpu(rx_desc->wb.upper.length);
608 len = le16_to_cpu(rx_desc->wb.upper.length);
612 skb = rx_buffer_info->skb;
613 prefetch(skb->data - NET_IP_ALIGN);
614 rx_buffer_info->skb = NULL;
616 if (len && !skb_shinfo(skb)->nr_frags) {
617 pci_unmap_single(pdev, rx_buffer_info->dma,
624 pci_unmap_page(pdev, rx_buffer_info->page_dma,
625 PAGE_SIZE / 2, PCI_DMA_FROMDEVICE);
626 rx_buffer_info->page_dma = 0;
627 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
628 rx_buffer_info->page,
629 rx_buffer_info->page_offset,
632 if ((rx_ring->rx_buf_len > (PAGE_SIZE / 2)) ||
633 (page_count(rx_buffer_info->page) != 1))
634 rx_buffer_info->page = NULL;
636 get_page(rx_buffer_info->page);
638 skb->len += upper_len;
639 skb->data_len += upper_len;
640 skb->truesize += upper_len;
644 if (i == rx_ring->count)
646 next_buffer = &rx_ring->rx_buffer_info[i];
648 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
652 if (staterr & IXGBE_RXD_STAT_EOP) {
653 rx_ring->stats.packets++;
654 rx_ring->stats.bytes += skb->len;
656 rx_buffer_info->skb = next_buffer->skb;
657 rx_buffer_info->dma = next_buffer->dma;
658 next_buffer->skb = skb;
659 next_buffer->dma = 0;
660 adapter->non_eop_descs++;
664 if (staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK) {
665 dev_kfree_skb_irq(skb);
669 ixgbe_rx_checksum(adapter, staterr, skb);
671 /* probably a little skewed due to removing CRC */
672 total_rx_bytes += skb->len;
675 skb->protocol = eth_type_trans(skb, adapter->netdev);
676 ixgbe_receive_skb(q_vector, skb, staterr, rx_desc);
679 rx_desc->wb.upper.status_error = 0;
681 /* return some buffers to hardware, one at a time is too slow */
682 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
683 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
687 /* use prefetched values */
689 rx_buffer_info = next_buffer;
691 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
694 rx_ring->next_to_clean = i;
695 cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
698 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
700 rx_ring->total_packets += total_rx_packets;
701 rx_ring->total_bytes += total_rx_bytes;
702 adapter->net_stats.rx_bytes += total_rx_bytes;
703 adapter->net_stats.rx_packets += total_rx_packets;
708 static int ixgbe_clean_rxonly(struct napi_struct *, int);
710 * ixgbe_configure_msix - Configure MSI-X hardware
711 * @adapter: board private structure
713 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
716 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
718 struct ixgbe_q_vector *q_vector;
719 int i, j, q_vectors, v_idx, r_idx;
722 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
724 /* Populate the IVAR table and set the ITR values to the
725 * corresponding register.
727 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
728 q_vector = &adapter->q_vector[v_idx];
729 /* XXX for_each_bit(...) */
730 r_idx = find_first_bit(q_vector->rxr_idx,
731 adapter->num_rx_queues);
733 for (i = 0; i < q_vector->rxr_count; i++) {
734 j = adapter->rx_ring[r_idx].reg_idx;
735 ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(j), v_idx);
736 r_idx = find_next_bit(q_vector->rxr_idx,
737 adapter->num_rx_queues,
740 r_idx = find_first_bit(q_vector->txr_idx,
741 adapter->num_tx_queues);
743 for (i = 0; i < q_vector->txr_count; i++) {
744 j = adapter->tx_ring[r_idx].reg_idx;
745 ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(j), v_idx);
746 r_idx = find_next_bit(q_vector->txr_idx,
747 adapter->num_tx_queues,
751 /* if this is a tx only vector halve the interrupt rate */
752 if (q_vector->txr_count && !q_vector->rxr_count)
753 q_vector->eitr = (adapter->eitr_param >> 1);
756 q_vector->eitr = adapter->eitr_param;
758 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx),
759 EITR_INTS_PER_SEC_TO_REG(q_vector->eitr));
762 ixgbe_set_ivar(adapter, IXGBE_IVAR_OTHER_CAUSES_INDEX, v_idx);
763 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
765 /* set up to autoclear timer, and the vectors */
766 mask = IXGBE_EIMS_ENABLE_MASK;
767 mask &= ~(IXGBE_EIMS_OTHER | IXGBE_EIMS_LSC);
768 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
775 latency_invalid = 255
779 * ixgbe_update_itr - update the dynamic ITR value based on statistics
780 * @adapter: pointer to adapter
781 * @eitr: eitr setting (ints per sec) to give last timeslice
782 * @itr_setting: current throttle rate in ints/second
783 * @packets: the number of packets during this measurement interval
784 * @bytes: the number of bytes during this measurement interval
786 * Stores a new ITR value based on packets and byte
787 * counts during the last interrupt. The advantage of per interrupt
788 * computation is faster updates and more accurate ITR for the current
789 * traffic pattern. Constants in this function were computed
790 * based on theoretical maximum wire speed and thresholds were set based
791 * on testing data as well as attempting to minimize response time
792 * while increasing bulk throughput.
793 * this functionality is controlled by the InterruptThrottleRate module
794 * parameter (see ixgbe_param.c)
796 static u8 ixgbe_update_itr(struct ixgbe_adapter *adapter,
797 u32 eitr, u8 itr_setting,
798 int packets, int bytes)
800 unsigned int retval = itr_setting;
805 goto update_itr_done;
808 /* simple throttlerate management
809 * 0-20MB/s lowest (100000 ints/s)
810 * 20-100MB/s low (20000 ints/s)
811 * 100-1249MB/s bulk (8000 ints/s)
813 /* what was last interrupt timeslice? */
814 timepassed_us = 1000000/eitr;
815 bytes_perint = bytes / timepassed_us; /* bytes/usec */
817 switch (itr_setting) {
819 if (bytes_perint > adapter->eitr_low)
820 retval = low_latency;
823 if (bytes_perint > adapter->eitr_high)
824 retval = bulk_latency;
825 else if (bytes_perint <= adapter->eitr_low)
826 retval = lowest_latency;
829 if (bytes_perint <= adapter->eitr_high)
830 retval = low_latency;
838 static void ixgbe_set_itr_msix(struct ixgbe_q_vector *q_vector)
840 struct ixgbe_adapter *adapter = q_vector->adapter;
841 struct ixgbe_hw *hw = &adapter->hw;
843 u8 current_itr, ret_itr;
844 int i, r_idx, v_idx = ((void *)q_vector - (void *)(adapter->q_vector)) /
845 sizeof(struct ixgbe_q_vector);
846 struct ixgbe_ring *rx_ring, *tx_ring;
848 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
849 for (i = 0; i < q_vector->txr_count; i++) {
850 tx_ring = &(adapter->tx_ring[r_idx]);
851 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
853 tx_ring->total_packets,
854 tx_ring->total_bytes);
855 /* if the result for this queue would decrease interrupt
856 * rate for this vector then use that result */
857 q_vector->tx_itr = ((q_vector->tx_itr > ret_itr) ?
858 q_vector->tx_itr - 1 : ret_itr);
859 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
863 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
864 for (i = 0; i < q_vector->rxr_count; i++) {
865 rx_ring = &(adapter->rx_ring[r_idx]);
866 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
868 rx_ring->total_packets,
869 rx_ring->total_bytes);
870 /* if the result for this queue would decrease interrupt
871 * rate for this vector then use that result */
872 q_vector->rx_itr = ((q_vector->rx_itr > ret_itr) ?
873 q_vector->rx_itr - 1 : ret_itr);
874 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
878 current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
880 switch (current_itr) {
881 /* counts and packets in update_itr are dependent on these numbers */
886 new_itr = 20000; /* aka hwitr = ~200 */
894 if (new_itr != q_vector->eitr) {
896 /* do an exponential smoothing */
897 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
898 q_vector->eitr = new_itr;
899 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
900 /* must write high and low 16 bits to reset counter */
901 DPRINTK(TX_ERR, DEBUG, "writing eitr(%d): %08X\n", v_idx,
903 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg | (itr_reg)<<16);
909 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
911 struct ixgbe_hw *hw = &adapter->hw;
913 if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
914 (eicr & IXGBE_EICR_GPI_SDP1)) {
915 DPRINTK(PROBE, CRIT, "Fan has stopped, replace the adapter\n");
916 /* write to clear the interrupt */
917 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
921 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
923 struct ixgbe_hw *hw = &adapter->hw;
926 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
927 adapter->link_check_timeout = jiffies;
928 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
929 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
930 schedule_work(&adapter->watchdog_task);
934 static irqreturn_t ixgbe_msix_lsc(int irq, void *data)
936 struct net_device *netdev = data;
937 struct ixgbe_adapter *adapter = netdev_priv(netdev);
938 struct ixgbe_hw *hw = &adapter->hw;
939 u32 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
941 if (eicr & IXGBE_EICR_LSC)
942 ixgbe_check_lsc(adapter);
944 ixgbe_check_fan_failure(adapter, eicr);
946 if (!test_bit(__IXGBE_DOWN, &adapter->state))
947 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER);
952 static irqreturn_t ixgbe_msix_clean_tx(int irq, void *data)
954 struct ixgbe_q_vector *q_vector = data;
955 struct ixgbe_adapter *adapter = q_vector->adapter;
956 struct ixgbe_ring *tx_ring;
959 if (!q_vector->txr_count)
962 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
963 for (i = 0; i < q_vector->txr_count; i++) {
964 tx_ring = &(adapter->tx_ring[r_idx]);
965 #ifdef CONFIG_IXGBE_DCA
966 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
967 ixgbe_update_tx_dca(adapter, tx_ring);
969 tx_ring->total_bytes = 0;
970 tx_ring->total_packets = 0;
971 ixgbe_clean_tx_irq(adapter, tx_ring);
972 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
980 * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
982 * @data: pointer to our q_vector struct for this interrupt vector
984 static irqreturn_t ixgbe_msix_clean_rx(int irq, void *data)
986 struct ixgbe_q_vector *q_vector = data;
987 struct ixgbe_adapter *adapter = q_vector->adapter;
988 struct ixgbe_ring *rx_ring;
992 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
993 for (i = 0; i < q_vector->rxr_count; i++) {
994 rx_ring = &(adapter->rx_ring[r_idx]);
995 rx_ring->total_bytes = 0;
996 rx_ring->total_packets = 0;
997 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1001 if (!q_vector->rxr_count)
1004 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1005 rx_ring = &(adapter->rx_ring[r_idx]);
1006 /* disable interrupts on this vector only */
1007 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, rx_ring->v_idx);
1008 napi_schedule(&q_vector->napi);
1013 static irqreturn_t ixgbe_msix_clean_many(int irq, void *data)
1015 ixgbe_msix_clean_rx(irq, data);
1016 ixgbe_msix_clean_tx(irq, data);
1022 * ixgbe_clean_rxonly - msix (aka one shot) rx clean routine
1023 * @napi: napi struct with our devices info in it
1024 * @budget: amount of work driver is allowed to do this pass, in packets
1026 * This function is optimized for cleaning one queue only on a single
1029 static int ixgbe_clean_rxonly(struct napi_struct *napi, int budget)
1031 struct ixgbe_q_vector *q_vector =
1032 container_of(napi, struct ixgbe_q_vector, napi);
1033 struct ixgbe_adapter *adapter = q_vector->adapter;
1034 struct ixgbe_ring *rx_ring = NULL;
1038 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1039 rx_ring = &(adapter->rx_ring[r_idx]);
1040 #ifdef CONFIG_IXGBE_DCA
1041 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1042 ixgbe_update_rx_dca(adapter, rx_ring);
1045 ixgbe_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
1047 /* If all Rx work done, exit the polling mode */
1048 if (work_done < budget) {
1049 napi_complete(napi);
1050 if (adapter->itr_setting & 3)
1051 ixgbe_set_itr_msix(q_vector);
1052 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1053 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, rx_ring->v_idx);
1060 * ixgbe_clean_rxonly_many - msix (aka one shot) rx clean routine
1061 * @napi: napi struct with our devices info in it
1062 * @budget: amount of work driver is allowed to do this pass, in packets
1064 * This function will clean more than one rx queue associated with a
1067 static int ixgbe_clean_rxonly_many(struct napi_struct *napi, int budget)
1069 struct ixgbe_q_vector *q_vector =
1070 container_of(napi, struct ixgbe_q_vector, napi);
1071 struct ixgbe_adapter *adapter = q_vector->adapter;
1072 struct ixgbe_ring *rx_ring = NULL;
1073 int work_done = 0, i;
1075 u16 enable_mask = 0;
1077 /* attempt to distribute budget to each queue fairly, but don't allow
1078 * the budget to go below 1 because we'll exit polling */
1079 budget /= (q_vector->rxr_count ?: 1);
1080 budget = max(budget, 1);
1081 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1082 for (i = 0; i < q_vector->rxr_count; i++) {
1083 rx_ring = &(adapter->rx_ring[r_idx]);
1084 #ifdef CONFIG_IXGBE_DCA
1085 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1086 ixgbe_update_rx_dca(adapter, rx_ring);
1088 ixgbe_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
1089 enable_mask |= rx_ring->v_idx;
1090 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1094 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1095 rx_ring = &(adapter->rx_ring[r_idx]);
1096 /* If all Rx work done, exit the polling mode */
1097 if (work_done < budget) {
1098 napi_complete(napi);
1099 if (adapter->itr_setting & 3)
1100 ixgbe_set_itr_msix(q_vector);
1101 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1102 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, enable_mask);
1108 static inline void map_vector_to_rxq(struct ixgbe_adapter *a, int v_idx,
1111 a->q_vector[v_idx].adapter = a;
1112 set_bit(r_idx, a->q_vector[v_idx].rxr_idx);
1113 a->q_vector[v_idx].rxr_count++;
1114 a->rx_ring[r_idx].v_idx = 1 << v_idx;
1117 static inline void map_vector_to_txq(struct ixgbe_adapter *a, int v_idx,
1120 a->q_vector[v_idx].adapter = a;
1121 set_bit(r_idx, a->q_vector[v_idx].txr_idx);
1122 a->q_vector[v_idx].txr_count++;
1123 a->tx_ring[r_idx].v_idx = 1 << v_idx;
1127 * ixgbe_map_rings_to_vectors - Maps descriptor rings to vectors
1128 * @adapter: board private structure to initialize
1129 * @vectors: allotted vector count for descriptor rings
1131 * This function maps descriptor rings to the queue-specific vectors
1132 * we were allotted through the MSI-X enabling code. Ideally, we'd have
1133 * one vector per ring/queue, but on a constrained vector budget, we
1134 * group the rings as "efficiently" as possible. You would add new
1135 * mapping configurations in here.
1137 static int ixgbe_map_rings_to_vectors(struct ixgbe_adapter *adapter,
1141 int rxr_idx = 0, txr_idx = 0;
1142 int rxr_remaining = adapter->num_rx_queues;
1143 int txr_remaining = adapter->num_tx_queues;
1148 /* No mapping required if MSI-X is disabled. */
1149 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1153 * The ideal configuration...
1154 * We have enough vectors to map one per queue.
1156 if (vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1157 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1158 map_vector_to_rxq(adapter, v_start, rxr_idx);
1160 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1161 map_vector_to_txq(adapter, v_start, txr_idx);
1167 * If we don't have enough vectors for a 1-to-1
1168 * mapping, we'll have to group them so there are
1169 * multiple queues per vector.
1171 /* Re-adjusting *qpv takes care of the remainder. */
1172 for (i = v_start; i < vectors; i++) {
1173 rqpv = DIV_ROUND_UP(rxr_remaining, vectors - i);
1174 for (j = 0; j < rqpv; j++) {
1175 map_vector_to_rxq(adapter, i, rxr_idx);
1180 for (i = v_start; i < vectors; i++) {
1181 tqpv = DIV_ROUND_UP(txr_remaining, vectors - i);
1182 for (j = 0; j < tqpv; j++) {
1183 map_vector_to_txq(adapter, i, txr_idx);
1194 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
1195 * @adapter: board private structure
1197 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
1198 * interrupts from the kernel.
1200 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
1202 struct net_device *netdev = adapter->netdev;
1203 irqreturn_t (*handler)(int, void *);
1204 int i, vector, q_vectors, err;
1207 /* Decrement for Other and TCP Timer vectors */
1208 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1210 /* Map the Tx/Rx rings to the vectors we were allotted. */
1211 err = ixgbe_map_rings_to_vectors(adapter, q_vectors);
1215 #define SET_HANDLER(_v) ((!(_v)->rxr_count) ? &ixgbe_msix_clean_tx : \
1216 (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \
1217 &ixgbe_msix_clean_many)
1218 for (vector = 0; vector < q_vectors; vector++) {
1219 handler = SET_HANDLER(&adapter->q_vector[vector]);
1221 if(handler == &ixgbe_msix_clean_rx) {
1222 sprintf(adapter->name[vector], "%s-%s-%d",
1223 netdev->name, "rx", ri++);
1225 else if(handler == &ixgbe_msix_clean_tx) {
1226 sprintf(adapter->name[vector], "%s-%s-%d",
1227 netdev->name, "tx", ti++);
1230 sprintf(adapter->name[vector], "%s-%s-%d",
1231 netdev->name, "TxRx", vector);
1233 err = request_irq(adapter->msix_entries[vector].vector,
1234 handler, 0, adapter->name[vector],
1235 &(adapter->q_vector[vector]));
1238 "request_irq failed for MSIX interrupt "
1239 "Error: %d\n", err);
1240 goto free_queue_irqs;
1244 sprintf(adapter->name[vector], "%s:lsc", netdev->name);
1245 err = request_irq(adapter->msix_entries[vector].vector,
1246 &ixgbe_msix_lsc, 0, adapter->name[vector], netdev);
1249 "request_irq for msix_lsc failed: %d\n", err);
1250 goto free_queue_irqs;
1256 for (i = vector - 1; i >= 0; i--)
1257 free_irq(adapter->msix_entries[--vector].vector,
1258 &(adapter->q_vector[i]));
1259 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
1260 pci_disable_msix(adapter->pdev);
1261 kfree(adapter->msix_entries);
1262 adapter->msix_entries = NULL;
1267 static void ixgbe_set_itr(struct ixgbe_adapter *adapter)
1269 struct ixgbe_hw *hw = &adapter->hw;
1270 struct ixgbe_q_vector *q_vector = adapter->q_vector;
1272 u32 new_itr = q_vector->eitr;
1273 struct ixgbe_ring *rx_ring = &adapter->rx_ring[0];
1274 struct ixgbe_ring *tx_ring = &adapter->tx_ring[0];
1276 q_vector->tx_itr = ixgbe_update_itr(adapter, new_itr,
1278 tx_ring->total_packets,
1279 tx_ring->total_bytes);
1280 q_vector->rx_itr = ixgbe_update_itr(adapter, new_itr,
1282 rx_ring->total_packets,
1283 rx_ring->total_bytes);
1285 current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
1287 switch (current_itr) {
1288 /* counts and packets in update_itr are dependent on these numbers */
1289 case lowest_latency:
1293 new_itr = 20000; /* aka hwitr = ~200 */
1302 if (new_itr != q_vector->eitr) {
1304 /* do an exponential smoothing */
1305 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
1306 q_vector->eitr = new_itr;
1307 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
1308 /* must write high and low 16 bits to reset counter */
1309 IXGBE_WRITE_REG(hw, IXGBE_EITR(0), itr_reg | (itr_reg)<<16);
1316 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
1317 * @adapter: board private structure
1319 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
1321 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
1322 IXGBE_WRITE_FLUSH(&adapter->hw);
1323 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1325 for (i = 0; i < adapter->num_msix_vectors; i++)
1326 synchronize_irq(adapter->msix_entries[i].vector);
1328 synchronize_irq(adapter->pdev->irq);
1333 * ixgbe_irq_enable - Enable default interrupt generation settings
1334 * @adapter: board private structure
1336 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter)
1339 mask = IXGBE_EIMS_ENABLE_MASK;
1340 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
1341 mask |= IXGBE_EIMS_GPI_SDP1;
1342 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1343 IXGBE_WRITE_FLUSH(&adapter->hw);
1347 * ixgbe_intr - legacy mode Interrupt Handler
1348 * @irq: interrupt number
1349 * @data: pointer to a network interface device structure
1351 static irqreturn_t ixgbe_intr(int irq, void *data)
1353 struct net_device *netdev = data;
1354 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1355 struct ixgbe_hw *hw = &adapter->hw;
1358 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
1359 * therefore no explict interrupt disable is necessary */
1360 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
1362 /* shared interrupt alert!
1363 * make sure interrupts are enabled because the read will
1364 * have disabled interrupts due to EIAM */
1365 ixgbe_irq_enable(adapter);
1366 return IRQ_NONE; /* Not our interrupt */
1369 if (eicr & IXGBE_EICR_LSC)
1370 ixgbe_check_lsc(adapter);
1372 ixgbe_check_fan_failure(adapter, eicr);
1374 if (napi_schedule_prep(&adapter->q_vector[0].napi)) {
1375 adapter->tx_ring[0].total_packets = 0;
1376 adapter->tx_ring[0].total_bytes = 0;
1377 adapter->rx_ring[0].total_packets = 0;
1378 adapter->rx_ring[0].total_bytes = 0;
1379 /* would disable interrupts here but EIAM disabled it */
1380 __napi_schedule(&adapter->q_vector[0].napi);
1386 static inline void ixgbe_reset_q_vectors(struct ixgbe_adapter *adapter)
1388 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1390 for (i = 0; i < q_vectors; i++) {
1391 struct ixgbe_q_vector *q_vector = &adapter->q_vector[i];
1392 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES);
1393 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES);
1394 q_vector->rxr_count = 0;
1395 q_vector->txr_count = 0;
1400 * ixgbe_request_irq - initialize interrupts
1401 * @adapter: board private structure
1403 * Attempts to configure interrupts using the best available
1404 * capabilities of the hardware and kernel.
1406 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
1408 struct net_device *netdev = adapter->netdev;
1411 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1412 err = ixgbe_request_msix_irqs(adapter);
1413 } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1414 err = request_irq(adapter->pdev->irq, &ixgbe_intr, 0,
1415 netdev->name, netdev);
1417 err = request_irq(adapter->pdev->irq, &ixgbe_intr, IRQF_SHARED,
1418 netdev->name, netdev);
1422 DPRINTK(PROBE, ERR, "request_irq failed, Error %d\n", err);
1427 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
1429 struct net_device *netdev = adapter->netdev;
1431 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1434 q_vectors = adapter->num_msix_vectors;
1437 free_irq(adapter->msix_entries[i].vector, netdev);
1440 for (; i >= 0; i--) {
1441 free_irq(adapter->msix_entries[i].vector,
1442 &(adapter->q_vector[i]));
1445 ixgbe_reset_q_vectors(adapter);
1447 free_irq(adapter->pdev->irq, netdev);
1452 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
1455 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
1457 struct ixgbe_hw *hw = &adapter->hw;
1459 IXGBE_WRITE_REG(hw, IXGBE_EITR(0),
1460 EITR_INTS_PER_SEC_TO_REG(adapter->eitr_param));
1462 ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(0), 0);
1463 ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(0), 0);
1465 map_vector_to_rxq(adapter, 0, 0);
1466 map_vector_to_txq(adapter, 0, 0);
1468 DPRINTK(HW, INFO, "Legacy interrupt IVAR setup done\n");
1472 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
1473 * @adapter: board private structure
1475 * Configure the Tx unit of the MAC after a reset.
1477 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
1480 struct ixgbe_hw *hw = &adapter->hw;
1481 u32 i, j, tdlen, txctrl;
1483 /* Setup the HW Tx Head and Tail descriptor pointers */
1484 for (i = 0; i < adapter->num_tx_queues; i++) {
1485 struct ixgbe_ring *ring = &adapter->tx_ring[i];
1488 tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc);
1489 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j),
1490 (tdba & DMA_32BIT_MASK));
1491 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32));
1492 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), tdlen);
1493 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0);
1494 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0);
1495 adapter->tx_ring[i].head = IXGBE_TDH(j);
1496 adapter->tx_ring[i].tail = IXGBE_TDT(j);
1497 /* Disable Tx Head Writeback RO bit, since this hoses
1498 * bookkeeping if things aren't delivered in order.
1500 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j));
1501 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
1502 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl);
1506 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1508 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter, int index)
1510 struct ixgbe_ring *rx_ring;
1515 /* program one srrctl register per VMDq index */
1516 if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
1518 mask = (unsigned long) adapter->ring_feature[RING_F_RSS].mask;
1519 len = sizeof(adapter->ring_feature[RING_F_VMDQ].mask) * 8;
1520 shift = find_first_bit(&mask, len);
1521 queue0 = index & mask;
1522 index = (index & mask) >> shift;
1523 /* program one srrctl per RSS queue since RDRXCTL.MVMEN is enabled */
1525 mask = (unsigned long) adapter->ring_feature[RING_F_RSS].mask;
1526 queue0 = index & mask;
1527 index = index & mask;
1530 rx_ring = &adapter->rx_ring[queue0];
1532 srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(index));
1534 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
1535 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
1537 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1538 srrctl |= IXGBE_RXBUFFER_2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1539 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1540 srrctl |= ((IXGBE_RX_HDR_SIZE <<
1541 IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1542 IXGBE_SRRCTL_BSIZEHDR_MASK);
1544 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1546 if (rx_ring->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1547 srrctl |= IXGBE_RXBUFFER_2048 >>
1548 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1550 srrctl |= rx_ring->rx_buf_len >>
1551 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1553 IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(index), srrctl);
1556 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1557 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1560 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
1561 * @adapter: board private structure
1563 * Configure the Rx unit of the MAC after a reset.
1565 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
1568 struct ixgbe_hw *hw = &adapter->hw;
1569 struct net_device *netdev = adapter->netdev;
1570 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1572 u32 rdlen, rxctrl, rxcsum;
1573 static const u32 seed[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
1574 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
1575 0x6A3E67EA, 0x14364D17, 0x3BED200D};
1582 /* Decide whether to use packet split mode or not */
1583 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1585 /* Set the RX buffer length according to the mode */
1586 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1587 rx_buf_len = IXGBE_RX_HDR_SIZE;
1589 if (netdev->mtu <= ETH_DATA_LEN)
1590 rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1592 rx_buf_len = ALIGN(max_frame, 1024);
1595 fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
1596 fctrl |= IXGBE_FCTRL_BAM;
1597 fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
1598 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl);
1600 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
1601 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1602 hlreg0 &= ~IXGBE_HLREG0_JUMBOEN;
1604 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
1605 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
1607 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1609 rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1610 /* disable receives while setting up the descriptors */
1611 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1612 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
1614 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1615 * the Base and Length of the Rx Descriptor Ring */
1616 for (i = 0; i < adapter->num_rx_queues; i++) {
1617 rdba = adapter->rx_ring[i].dma;
1618 j = adapter->rx_ring[i].reg_idx;
1619 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), (rdba & DMA_32BIT_MASK));
1620 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32));
1621 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j), rdlen);
1622 IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0);
1623 IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0);
1624 adapter->rx_ring[i].head = IXGBE_RDH(j);
1625 adapter->rx_ring[i].tail = IXGBE_RDT(j);
1626 adapter->rx_ring[i].rx_buf_len = rx_buf_len;
1628 ixgbe_configure_srrctl(adapter, j);
1632 * For VMDq support of different descriptor types or
1633 * buffer sizes through the use of multiple SRRCTL
1634 * registers, RDRXCTL.MVMEN must be set to 1
1636 * also, the manual doesn't mention it clearly but DCA hints
1637 * will only use queue 0's tags unless this bit is set. Side
1638 * effects of setting this bit are only that SRRCTL must be
1639 * fully programmed [0..15]
1641 if (adapter->flags &
1642 (IXGBE_FLAG_RSS_ENABLED | IXGBE_FLAG_VMDQ_ENABLED)) {
1643 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
1644 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
1645 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
1648 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
1649 /* Fill out redirection table */
1650 for (i = 0, j = 0; i < 128; i++, j++) {
1651 if (j == adapter->ring_feature[RING_F_RSS].indices)
1653 /* reta = 4-byte sliding window of
1654 * 0x00..(indices-1)(indices-1)00..etc. */
1655 reta = (reta << 8) | (j * 0x11);
1657 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
1660 /* Fill out hash function seeds */
1661 for (i = 0; i < 10; i++)
1662 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), seed[i]);
1664 mrqc = IXGBE_MRQC_RSSEN
1665 /* Perform hash on these packet types */
1666 | IXGBE_MRQC_RSS_FIELD_IPV4
1667 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
1668 | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
1669 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP
1670 | IXGBE_MRQC_RSS_FIELD_IPV6_EX
1671 | IXGBE_MRQC_RSS_FIELD_IPV6
1672 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
1673 | IXGBE_MRQC_RSS_FIELD_IPV6_UDP
1674 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP;
1675 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
1678 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
1680 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED ||
1681 adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED) {
1682 /* Disable indicating checksum in descriptor, enables
1684 rxcsum |= IXGBE_RXCSUM_PCSD;
1686 if (!(rxcsum & IXGBE_RXCSUM_PCSD)) {
1687 /* Enable IPv4 payload checksum for UDP fragments
1688 * if PCSD is not set */
1689 rxcsum |= IXGBE_RXCSUM_IPPCSE;
1692 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
1695 static void ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1697 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1698 struct ixgbe_hw *hw = &adapter->hw;
1700 /* add VID to filter table */
1701 hw->mac.ops.set_vfta(&adapter->hw, vid, 0, true);
1704 static void ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1706 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1707 struct ixgbe_hw *hw = &adapter->hw;
1709 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1710 ixgbe_irq_disable(adapter);
1712 vlan_group_set_device(adapter->vlgrp, vid, NULL);
1714 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1715 ixgbe_irq_enable(adapter);
1717 /* remove VID from filter table */
1718 hw->mac.ops.set_vfta(&adapter->hw, vid, 0, false);
1721 static void ixgbe_vlan_rx_register(struct net_device *netdev,
1722 struct vlan_group *grp)
1724 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1727 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1728 ixgbe_irq_disable(adapter);
1729 adapter->vlgrp = grp;
1732 * For a DCB driver, always enable VLAN tag stripping so we can
1733 * still receive traffic from a DCB-enabled host even if we're
1736 ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL);
1737 ctrl |= IXGBE_VLNCTRL_VME;
1738 ctrl &= ~IXGBE_VLNCTRL_CFIEN;
1739 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl);
1740 ixgbe_vlan_rx_add_vid(netdev, 0);
1743 /* enable VLAN tag insert/strip */
1744 ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL);
1745 ctrl |= IXGBE_VLNCTRL_VME;
1746 ctrl &= ~IXGBE_VLNCTRL_CFIEN;
1747 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl);
1750 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1751 ixgbe_irq_enable(adapter);
1754 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
1756 ixgbe_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1758 if (adapter->vlgrp) {
1760 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1761 if (!vlan_group_get_device(adapter->vlgrp, vid))
1763 ixgbe_vlan_rx_add_vid(adapter->netdev, vid);
1768 static u8 *ixgbe_addr_list_itr(struct ixgbe_hw *hw, u8 **mc_addr_ptr, u32 *vmdq)
1770 struct dev_mc_list *mc_ptr;
1771 u8 *addr = *mc_addr_ptr;
1774 mc_ptr = container_of(addr, struct dev_mc_list, dmi_addr[0]);
1776 *mc_addr_ptr = mc_ptr->next->dmi_addr;
1778 *mc_addr_ptr = NULL;
1784 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
1785 * @netdev: network interface device structure
1787 * The set_rx_method entry point is called whenever the unicast/multicast
1788 * address list or the network interface flags are updated. This routine is
1789 * responsible for configuring the hardware for proper unicast, multicast and
1792 static void ixgbe_set_rx_mode(struct net_device *netdev)
1794 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1795 struct ixgbe_hw *hw = &adapter->hw;
1797 u8 *addr_list = NULL;
1800 /* Check for Promiscuous and All Multicast modes */
1802 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1803 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
1805 if (netdev->flags & IFF_PROMISC) {
1806 hw->addr_ctrl.user_set_promisc = 1;
1807 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1808 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
1810 if (netdev->flags & IFF_ALLMULTI) {
1811 fctrl |= IXGBE_FCTRL_MPE;
1812 fctrl &= ~IXGBE_FCTRL_UPE;
1814 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1816 vlnctrl |= IXGBE_VLNCTRL_VFE;
1817 hw->addr_ctrl.user_set_promisc = 0;
1820 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
1821 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
1823 /* reprogram secondary unicast list */
1824 addr_count = netdev->uc_count;
1826 addr_list = netdev->uc_list->dmi_addr;
1827 hw->mac.ops.update_uc_addr_list(hw, addr_list, addr_count,
1828 ixgbe_addr_list_itr);
1830 /* reprogram multicast list */
1831 addr_count = netdev->mc_count;
1833 addr_list = netdev->mc_list->dmi_addr;
1834 hw->mac.ops.update_mc_addr_list(hw, addr_list, addr_count,
1835 ixgbe_addr_list_itr);
1838 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
1841 struct ixgbe_q_vector *q_vector;
1842 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1844 /* legacy and MSI only use one vector */
1845 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1848 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1849 struct napi_struct *napi;
1850 q_vector = &adapter->q_vector[q_idx];
1851 if (!q_vector->rxr_count)
1853 napi = &q_vector->napi;
1854 if ((adapter->flags & IXGBE_FLAG_MSIX_ENABLED) &&
1855 (q_vector->rxr_count > 1))
1856 napi->poll = &ixgbe_clean_rxonly_many;
1862 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
1865 struct ixgbe_q_vector *q_vector;
1866 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1868 /* legacy and MSI only use one vector */
1869 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1872 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1873 q_vector = &adapter->q_vector[q_idx];
1874 if (!q_vector->rxr_count)
1876 napi_disable(&q_vector->napi);
1880 #ifdef CONFIG_IXGBE_DCB
1882 * ixgbe_configure_dcb - Configure DCB hardware
1883 * @adapter: ixgbe adapter struct
1885 * This is called by the driver on open to configure the DCB hardware.
1886 * This is also called by the gennetlink interface when reconfiguring
1889 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
1891 struct ixgbe_hw *hw = &adapter->hw;
1892 u32 txdctl, vlnctrl;
1895 ixgbe_dcb_check_config(&adapter->dcb_cfg);
1896 ixgbe_dcb_calculate_tc_credits(&adapter->dcb_cfg, DCB_TX_CONFIG);
1897 ixgbe_dcb_calculate_tc_credits(&adapter->dcb_cfg, DCB_RX_CONFIG);
1899 /* reconfigure the hardware */
1900 ixgbe_dcb_hw_config(&adapter->hw, &adapter->dcb_cfg);
1902 for (i = 0; i < adapter->num_tx_queues; i++) {
1903 j = adapter->tx_ring[i].reg_idx;
1904 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
1905 /* PThresh workaround for Tx hang with DFP enabled. */
1907 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
1909 /* Enable VLAN tag insert/strip */
1910 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
1911 vlnctrl |= IXGBE_VLNCTRL_VME | IXGBE_VLNCTRL_VFE;
1912 vlnctrl &= ~IXGBE_VLNCTRL_CFIEN;
1913 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
1914 hw->mac.ops.set_vfta(&adapter->hw, 0, 0, true);
1918 static void ixgbe_configure(struct ixgbe_adapter *adapter)
1920 struct net_device *netdev = adapter->netdev;
1923 ixgbe_set_rx_mode(netdev);
1925 ixgbe_restore_vlan(adapter);
1926 #ifdef CONFIG_IXGBE_DCB
1927 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
1928 netif_set_gso_max_size(netdev, 32768);
1929 ixgbe_configure_dcb(adapter);
1931 netif_set_gso_max_size(netdev, 65536);
1934 netif_set_gso_max_size(netdev, 65536);
1937 ixgbe_configure_tx(adapter);
1938 ixgbe_configure_rx(adapter);
1939 for (i = 0; i < adapter->num_rx_queues; i++)
1940 ixgbe_alloc_rx_buffers(adapter, &adapter->rx_ring[i],
1941 (adapter->rx_ring[i].count - 1));
1945 * ixgbe_link_config - set up initial link with default speed and duplex
1946 * @hw: pointer to private hardware struct
1948 * Returns 0 on success, negative on failure
1950 static int ixgbe_link_config(struct ixgbe_hw *hw)
1953 bool link_up = false;
1954 u32 ret = IXGBE_ERR_LINK_SETUP;
1956 if (hw->mac.ops.check_link)
1957 ret = hw->mac.ops.check_link(hw, &autoneg, &link_up, false);
1962 if (hw->mac.ops.get_link_capabilities)
1963 ret = hw->mac.ops.get_link_capabilities(hw, &autoneg,
1968 if (hw->mac.ops.setup_link_speed)
1969 ret = hw->mac.ops.setup_link_speed(hw, autoneg, true, link_up);
1975 static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
1977 struct net_device *netdev = adapter->netdev;
1978 struct ixgbe_hw *hw = &adapter->hw;
1981 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1982 u32 txdctl, rxdctl, mhadd;
1985 ixgbe_get_hw_control(adapter);
1987 if ((adapter->flags & IXGBE_FLAG_MSIX_ENABLED) ||
1988 (adapter->flags & IXGBE_FLAG_MSI_ENABLED)) {
1989 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1990 gpie = (IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_EIAME |
1991 IXGBE_GPIE_PBA_SUPPORT | IXGBE_GPIE_OCD);
1996 /* XXX: to interrupt immediately for EICS writes, enable this */
1997 /* gpie |= IXGBE_GPIE_EIMEN; */
1998 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
2001 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
2002 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
2003 * specifically only auto mask tx and rx interrupts */
2004 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
2007 /* Enable fan failure interrupt if media type is copper */
2008 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
2009 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE);
2010 gpie |= IXGBE_SDP1_GPIEN;
2011 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
2014 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
2015 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
2016 mhadd &= ~IXGBE_MHADD_MFS_MASK;
2017 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
2019 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
2022 for (i = 0; i < adapter->num_tx_queues; i++) {
2023 j = adapter->tx_ring[i].reg_idx;
2024 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
2025 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
2026 txdctl |= (8 << 16);
2027 txdctl |= IXGBE_TXDCTL_ENABLE;
2028 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
2031 for (i = 0; i < adapter->num_rx_queues; i++) {
2032 j = adapter->rx_ring[i].reg_idx;
2033 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
2034 /* enable PTHRESH=32 descriptors (half the internal cache)
2035 * and HTHRESH=0 descriptors (to minimize latency on fetch),
2036 * this also removes a pesky rx_no_buffer_count increment */
2038 rxdctl |= IXGBE_RXDCTL_ENABLE;
2039 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), rxdctl);
2041 /* enable all receives */
2042 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
2043 rxdctl |= (IXGBE_RXCTRL_DMBYPS | IXGBE_RXCTRL_RXEN);
2044 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxdctl);
2046 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2047 ixgbe_configure_msix(adapter);
2049 ixgbe_configure_msi_and_legacy(adapter);
2051 ixgbe_napi_add_all(adapter);
2053 clear_bit(__IXGBE_DOWN, &adapter->state);
2054 ixgbe_napi_enable_all(adapter);
2056 /* clear any pending interrupts, may auto mask */
2057 IXGBE_READ_REG(hw, IXGBE_EICR);
2059 ixgbe_irq_enable(adapter);
2061 err = ixgbe_link_config(hw);
2063 dev_err(&adapter->pdev->dev, "link_config FAILED %d\n", err);
2065 /* enable transmits */
2066 netif_tx_start_all_queues(netdev);
2068 /* bring the link up in the watchdog, this could race with our first
2069 * link up interrupt but shouldn't be a problem */
2070 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2071 adapter->link_check_timeout = jiffies;
2072 mod_timer(&adapter->watchdog_timer, jiffies);
2076 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
2078 WARN_ON(in_interrupt());
2079 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
2081 ixgbe_down(adapter);
2083 clear_bit(__IXGBE_RESETTING, &adapter->state);
2086 int ixgbe_up(struct ixgbe_adapter *adapter)
2088 /* hardware has been reset, we need to reload some things */
2089 ixgbe_configure(adapter);
2091 return ixgbe_up_complete(adapter);
2094 void ixgbe_reset(struct ixgbe_adapter *adapter)
2096 struct ixgbe_hw *hw = &adapter->hw;
2097 if (hw->mac.ops.init_hw(hw))
2098 dev_err(&adapter->pdev->dev, "Hardware Error\n");
2100 /* reprogram the RAR[0] in case user changed it. */
2101 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);
2106 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
2107 * @adapter: board private structure
2108 * @rx_ring: ring to free buffers from
2110 static void ixgbe_clean_rx_ring(struct ixgbe_adapter *adapter,
2111 struct ixgbe_ring *rx_ring)
2113 struct pci_dev *pdev = adapter->pdev;
2117 /* Free all the Rx ring sk_buffs */
2119 for (i = 0; i < rx_ring->count; i++) {
2120 struct ixgbe_rx_buffer *rx_buffer_info;
2122 rx_buffer_info = &rx_ring->rx_buffer_info[i];
2123 if (rx_buffer_info->dma) {
2124 pci_unmap_single(pdev, rx_buffer_info->dma,
2125 rx_ring->rx_buf_len,
2126 PCI_DMA_FROMDEVICE);
2127 rx_buffer_info->dma = 0;
2129 if (rx_buffer_info->skb) {
2130 dev_kfree_skb(rx_buffer_info->skb);
2131 rx_buffer_info->skb = NULL;
2133 if (!rx_buffer_info->page)
2135 pci_unmap_page(pdev, rx_buffer_info->page_dma, PAGE_SIZE / 2,
2136 PCI_DMA_FROMDEVICE);
2137 rx_buffer_info->page_dma = 0;
2138 put_page(rx_buffer_info->page);
2139 rx_buffer_info->page = NULL;
2140 rx_buffer_info->page_offset = 0;
2143 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
2144 memset(rx_ring->rx_buffer_info, 0, size);
2146 /* Zero out the descriptor ring */
2147 memset(rx_ring->desc, 0, rx_ring->size);
2149 rx_ring->next_to_clean = 0;
2150 rx_ring->next_to_use = 0;
2152 writel(0, adapter->hw.hw_addr + rx_ring->head);
2153 writel(0, adapter->hw.hw_addr + rx_ring->tail);
2157 * ixgbe_clean_tx_ring - Free Tx Buffers
2158 * @adapter: board private structure
2159 * @tx_ring: ring to be cleaned
2161 static void ixgbe_clean_tx_ring(struct ixgbe_adapter *adapter,
2162 struct ixgbe_ring *tx_ring)
2164 struct ixgbe_tx_buffer *tx_buffer_info;
2168 /* Free all the Tx ring sk_buffs */
2170 for (i = 0; i < tx_ring->count; i++) {
2171 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2172 ixgbe_unmap_and_free_tx_resource(adapter, tx_buffer_info);
2175 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
2176 memset(tx_ring->tx_buffer_info, 0, size);
2178 /* Zero out the descriptor ring */
2179 memset(tx_ring->desc, 0, tx_ring->size);
2181 tx_ring->next_to_use = 0;
2182 tx_ring->next_to_clean = 0;
2184 writel(0, adapter->hw.hw_addr + tx_ring->head);
2185 writel(0, adapter->hw.hw_addr + tx_ring->tail);
2189 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
2190 * @adapter: board private structure
2192 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
2196 for (i = 0; i < adapter->num_rx_queues; i++)
2197 ixgbe_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2201 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
2202 * @adapter: board private structure
2204 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
2208 for (i = 0; i < adapter->num_tx_queues; i++)
2209 ixgbe_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2212 void ixgbe_down(struct ixgbe_adapter *adapter)
2214 struct net_device *netdev = adapter->netdev;
2215 struct ixgbe_hw *hw = &adapter->hw;
2220 /* signal that we are down to the interrupt handler */
2221 set_bit(__IXGBE_DOWN, &adapter->state);
2223 /* disable receives */
2224 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
2225 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
2227 netif_tx_disable(netdev);
2229 IXGBE_WRITE_FLUSH(hw);
2232 netif_tx_stop_all_queues(netdev);
2234 ixgbe_irq_disable(adapter);
2236 ixgbe_napi_disable_all(adapter);
2238 del_timer_sync(&adapter->watchdog_timer);
2239 cancel_work_sync(&adapter->watchdog_task);
2241 /* disable transmits in the hardware now that interrupts are off */
2242 for (i = 0; i < adapter->num_tx_queues; i++) {
2243 j = adapter->tx_ring[i].reg_idx;
2244 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
2245 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j),
2246 (txdctl & ~IXGBE_TXDCTL_ENABLE));
2249 netif_carrier_off(netdev);
2251 #ifdef CONFIG_IXGBE_DCA
2252 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
2253 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
2254 dca_remove_requester(&adapter->pdev->dev);
2258 if (!pci_channel_offline(adapter->pdev))
2259 ixgbe_reset(adapter);
2260 ixgbe_clean_all_tx_rings(adapter);
2261 ixgbe_clean_all_rx_rings(adapter);
2263 #ifdef CONFIG_IXGBE_DCA
2264 /* since we reset the hardware DCA settings were cleared */
2265 if (dca_add_requester(&adapter->pdev->dev) == 0) {
2266 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
2267 /* always use CB2 mode, difference is masked
2268 * in the CB driver */
2269 IXGBE_WRITE_REG(hw, IXGBE_DCA_CTRL, 2);
2270 ixgbe_setup_dca(adapter);
2276 * ixgbe_poll - NAPI Rx polling callback
2277 * @napi: structure for representing this polling device
2278 * @budget: how many packets driver is allowed to clean
2280 * This function is used for legacy and MSI, NAPI mode
2282 static int ixgbe_poll(struct napi_struct *napi, int budget)
2284 struct ixgbe_q_vector *q_vector = container_of(napi,
2285 struct ixgbe_q_vector, napi);
2286 struct ixgbe_adapter *adapter = q_vector->adapter;
2287 int tx_cleaned, work_done = 0;
2289 #ifdef CONFIG_IXGBE_DCA
2290 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
2291 ixgbe_update_tx_dca(adapter, adapter->tx_ring);
2292 ixgbe_update_rx_dca(adapter, adapter->rx_ring);
2296 tx_cleaned = ixgbe_clean_tx_irq(adapter, adapter->tx_ring);
2297 ixgbe_clean_rx_irq(q_vector, adapter->rx_ring, &work_done, budget);
2302 /* If budget not fully consumed, exit the polling mode */
2303 if (work_done < budget) {
2304 napi_complete(napi);
2305 if (adapter->itr_setting & 3)
2306 ixgbe_set_itr(adapter);
2307 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2308 ixgbe_irq_enable(adapter);
2314 * ixgbe_tx_timeout - Respond to a Tx Hang
2315 * @netdev: network interface device structure
2317 static void ixgbe_tx_timeout(struct net_device *netdev)
2319 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2321 /* Do the reset outside of interrupt context */
2322 schedule_work(&adapter->reset_task);
2325 static void ixgbe_reset_task(struct work_struct *work)
2327 struct ixgbe_adapter *adapter;
2328 adapter = container_of(work, struct ixgbe_adapter, reset_task);
2330 /* If we're already down or resetting, just bail */
2331 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
2332 test_bit(__IXGBE_RESETTING, &adapter->state))
2335 adapter->tx_timeout_count++;
2337 ixgbe_reinit_locked(adapter);
2340 #ifdef CONFIG_IXGBE_DCB
2341 static inline bool ixgbe_set_dcb_queues(struct ixgbe_adapter *adapter)
2345 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
2346 adapter->ring_feature[RING_F_DCB].mask = 0x7 << 3;
2347 adapter->num_rx_queues =
2348 adapter->ring_feature[RING_F_DCB].indices;
2349 adapter->num_tx_queues =
2350 adapter->ring_feature[RING_F_DCB].indices;
2360 static inline bool ixgbe_set_rss_queues(struct ixgbe_adapter *adapter)
2364 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
2365 adapter->ring_feature[RING_F_RSS].mask = 0xF;
2366 adapter->num_rx_queues =
2367 adapter->ring_feature[RING_F_RSS].indices;
2368 adapter->num_tx_queues =
2369 adapter->ring_feature[RING_F_RSS].indices;
2378 static void ixgbe_set_num_queues(struct ixgbe_adapter *adapter)
2380 /* Start with base case */
2381 adapter->num_rx_queues = 1;
2382 adapter->num_tx_queues = 1;
2384 #ifdef CONFIG_IXGBE_DCB
2385 if (ixgbe_set_dcb_queues(adapter))
2389 if (ixgbe_set_rss_queues(adapter))
2393 static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter *adapter,
2396 int err, vector_threshold;
2398 /* We'll want at least 3 (vector_threshold):
2401 * 3) Other (Link Status Change, etc.)
2402 * 4) TCP Timer (optional)
2404 vector_threshold = MIN_MSIX_COUNT;
2406 /* The more we get, the more we will assign to Tx/Rx Cleanup
2407 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
2408 * Right now, we simply care about how many we'll get; we'll
2409 * set them up later while requesting irq's.
2411 while (vectors >= vector_threshold) {
2412 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
2414 if (!err) /* Success in acquiring all requested vectors. */
2417 vectors = 0; /* Nasty failure, quit now */
2418 else /* err == number of vectors we should try again with */
2422 if (vectors < vector_threshold) {
2423 /* Can't allocate enough MSI-X interrupts? Oh well.
2424 * This just means we'll go with either a single MSI
2425 * vector or fall back to legacy interrupts.
2427 DPRINTK(HW, DEBUG, "Unable to allocate MSI-X interrupts\n");
2428 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2429 kfree(adapter->msix_entries);
2430 adapter->msix_entries = NULL;
2431 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
2432 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2433 ixgbe_set_num_queues(adapter);
2435 adapter->flags |= IXGBE_FLAG_MSIX_ENABLED; /* Woot! */
2437 * Adjust for only the vectors we'll use, which is minimum
2438 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
2439 * vectors we were allocated.
2441 adapter->num_msix_vectors = min(vectors,
2442 adapter->max_msix_q_vectors + NON_Q_VECTORS);
2447 * ixgbe_cache_ring_rss - Descriptor ring to register mapping for RSS
2448 * @adapter: board private structure to initialize
2450 * Cache the descriptor ring offsets for RSS to the assigned rings.
2453 static inline bool ixgbe_cache_ring_rss(struct ixgbe_adapter *adapter)
2458 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
2459 for (i = 0; i < adapter->num_rx_queues; i++)
2460 adapter->rx_ring[i].reg_idx = i;
2461 for (i = 0; i < adapter->num_tx_queues; i++)
2462 adapter->tx_ring[i].reg_idx = i;
2471 #ifdef CONFIG_IXGBE_DCB
2473 * ixgbe_cache_ring_dcb - Descriptor ring to register mapping for DCB
2474 * @adapter: board private structure to initialize
2476 * Cache the descriptor ring offsets for DCB to the assigned rings.
2479 static inline bool ixgbe_cache_ring_dcb(struct ixgbe_adapter *adapter)
2483 int dcb_i = adapter->ring_feature[RING_F_DCB].indices;
2485 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
2486 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
2487 /* the number of queues is assumed to be symmetric */
2488 for (i = 0; i < dcb_i; i++) {
2489 adapter->rx_ring[i].reg_idx = i << 3;
2490 adapter->tx_ring[i].reg_idx = i << 2;
2505 * ixgbe_cache_ring_register - Descriptor ring to register mapping
2506 * @adapter: board private structure to initialize
2508 * Once we know the feature-set enabled for the device, we'll cache
2509 * the register offset the descriptor ring is assigned to.
2511 * Note, the order the various feature calls is important. It must start with
2512 * the "most" features enabled at the same time, then trickle down to the
2513 * least amount of features turned on at once.
2515 static void ixgbe_cache_ring_register(struct ixgbe_adapter *adapter)
2517 /* start with default case */
2518 adapter->rx_ring[0].reg_idx = 0;
2519 adapter->tx_ring[0].reg_idx = 0;
2521 #ifdef CONFIG_IXGBE_DCB
2522 if (ixgbe_cache_ring_dcb(adapter))
2526 if (ixgbe_cache_ring_rss(adapter))
2531 * ixgbe_alloc_queues - Allocate memory for all rings
2532 * @adapter: board private structure to initialize
2534 * We allocate one ring per queue at run-time since we don't know the
2535 * number of queues at compile-time.
2537 static int ixgbe_alloc_queues(struct ixgbe_adapter *adapter)
2541 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
2542 sizeof(struct ixgbe_ring), GFP_KERNEL);
2543 if (!adapter->tx_ring)
2544 goto err_tx_ring_allocation;
2546 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
2547 sizeof(struct ixgbe_ring), GFP_KERNEL);
2548 if (!adapter->rx_ring)
2549 goto err_rx_ring_allocation;
2551 for (i = 0; i < adapter->num_tx_queues; i++) {
2552 adapter->tx_ring[i].count = adapter->tx_ring_count;
2553 adapter->tx_ring[i].queue_index = i;
2556 for (i = 0; i < adapter->num_rx_queues; i++) {
2557 adapter->rx_ring[i].count = adapter->rx_ring_count;
2558 adapter->rx_ring[i].queue_index = i;
2561 ixgbe_cache_ring_register(adapter);
2565 err_rx_ring_allocation:
2566 kfree(adapter->tx_ring);
2567 err_tx_ring_allocation:
2572 * ixgbe_set_interrupt_capability - set MSI-X or MSI if supported
2573 * @adapter: board private structure to initialize
2575 * Attempt to configure the interrupts using the best available
2576 * capabilities of the hardware and the kernel.
2578 static int ixgbe_set_interrupt_capability(struct ixgbe_adapter *adapter)
2581 int vector, v_budget;
2584 * It's easy to be greedy for MSI-X vectors, but it really
2585 * doesn't do us much good if we have a lot more vectors
2586 * than CPU's. So let's be conservative and only ask for
2587 * (roughly) twice the number of vectors as there are CPU's.
2589 v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues,
2590 (int)(num_online_cpus() * 2)) + NON_Q_VECTORS;
2593 * At the same time, hardware can only support a maximum of
2594 * MAX_MSIX_COUNT vectors. With features such as RSS and VMDq,
2595 * we can easily reach upwards of 64 Rx descriptor queues and
2596 * 32 Tx queues. Thus, we cap it off in those rare cases where
2597 * the cpu count also exceeds our vector limit.
2599 v_budget = min(v_budget, MAX_MSIX_COUNT);
2601 /* A failure in MSI-X entry allocation isn't fatal, but it does
2602 * mean we disable MSI-X capabilities of the adapter. */
2603 adapter->msix_entries = kcalloc(v_budget,
2604 sizeof(struct msix_entry), GFP_KERNEL);
2605 if (!adapter->msix_entries) {
2606 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
2607 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2608 ixgbe_set_num_queues(adapter);
2609 kfree(adapter->tx_ring);
2610 kfree(adapter->rx_ring);
2611 err = ixgbe_alloc_queues(adapter);
2613 DPRINTK(PROBE, ERR, "Unable to allocate memory "
2621 for (vector = 0; vector < v_budget; vector++)
2622 adapter->msix_entries[vector].entry = vector;
2624 ixgbe_acquire_msix_vectors(adapter, v_budget);
2626 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2630 err = pci_enable_msi(adapter->pdev);
2632 adapter->flags |= IXGBE_FLAG_MSI_ENABLED;
2634 DPRINTK(HW, DEBUG, "Unable to allocate MSI interrupt, "
2635 "falling back to legacy. Error: %d\n", err);
2641 /* Notify the stack of the (possibly) reduced Tx Queue count. */
2642 adapter->netdev->real_num_tx_queues = adapter->num_tx_queues;
2647 void ixgbe_reset_interrupt_capability(struct ixgbe_adapter *adapter)
2649 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2650 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2651 pci_disable_msix(adapter->pdev);
2652 kfree(adapter->msix_entries);
2653 adapter->msix_entries = NULL;
2654 } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
2655 adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED;
2656 pci_disable_msi(adapter->pdev);
2662 * ixgbe_init_interrupt_scheme - Determine proper interrupt scheme
2663 * @adapter: board private structure to initialize
2665 * We determine which interrupt scheme to use based on...
2666 * - Kernel support (MSI, MSI-X)
2667 * - which can be user-defined (via MODULE_PARAM)
2668 * - Hardware queue count (num_*_queues)
2669 * - defined by miscellaneous hardware support/features (RSS, etc.)
2671 int ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter)
2675 /* Number of supported queues */
2676 ixgbe_set_num_queues(adapter);
2678 err = ixgbe_alloc_queues(adapter);
2680 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
2681 goto err_alloc_queues;
2684 err = ixgbe_set_interrupt_capability(adapter);
2686 DPRINTK(PROBE, ERR, "Unable to setup interrupt capabilities\n");
2687 goto err_set_interrupt;
2690 DPRINTK(DRV, INFO, "Multiqueue %s: Rx Queue count = %u, "
2691 "Tx Queue count = %u\n",
2692 (adapter->num_rx_queues > 1) ? "Enabled" :
2693 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2695 set_bit(__IXGBE_DOWN, &adapter->state);
2700 kfree(adapter->tx_ring);
2701 kfree(adapter->rx_ring);
2707 * ixgbe_sfp_timer - worker thread to find a missing module
2708 * @data: pointer to our adapter struct
2710 static void ixgbe_sfp_timer(unsigned long data)
2712 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
2714 /* Do the sfp_timer outside of interrupt context due to the
2715 * delays that sfp+ detection requires
2717 schedule_work(&adapter->sfp_task);
2721 * ixgbe_sfp_task - worker thread to find a missing module
2722 * @work: pointer to work_struct containing our data
2724 static void ixgbe_sfp_task(struct work_struct *work)
2726 struct ixgbe_adapter *adapter = container_of(work,
2727 struct ixgbe_adapter,
2729 struct ixgbe_hw *hw = &adapter->hw;
2731 if ((hw->phy.type == ixgbe_phy_nl) &&
2732 (hw->phy.sfp_type == ixgbe_sfp_type_not_present)) {
2733 s32 ret = hw->phy.ops.identify_sfp(hw);
2736 ret = hw->phy.ops.reset(hw);
2737 if (ret == IXGBE_ERR_SFP_NOT_SUPPORTED) {
2738 DPRINTK(PROBE, ERR, "failed to initialize because an "
2739 "unsupported SFP+ module type was detected.\n"
2740 "Reload the driver after installing a "
2741 "supported module.\n");
2742 unregister_netdev(adapter->netdev);
2744 DPRINTK(PROBE, INFO, "detected SFP+: %d\n",
2747 /* don't need this routine any more */
2748 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
2752 if (test_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state))
2753 mod_timer(&adapter->sfp_timer,
2754 round_jiffies(jiffies + (2 * HZ)));
2758 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
2759 * @adapter: board private structure to initialize
2761 * ixgbe_sw_init initializes the Adapter private data structure.
2762 * Fields are initialized based on PCI device information and
2763 * OS network device settings (MTU size).
2765 static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
2767 struct ixgbe_hw *hw = &adapter->hw;
2768 struct pci_dev *pdev = adapter->pdev;
2770 #ifdef CONFIG_IXGBE_DCB
2772 struct tc_configuration *tc;
2775 /* PCI config space info */
2777 hw->vendor_id = pdev->vendor;
2778 hw->device_id = pdev->device;
2779 hw->revision_id = pdev->revision;
2780 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2781 hw->subsystem_device_id = pdev->subsystem_device;
2783 /* Set capability flags */
2784 rss = min(IXGBE_MAX_RSS_INDICES, (int)num_online_cpus());
2785 adapter->ring_feature[RING_F_RSS].indices = rss;
2786 adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
2787 adapter->ring_feature[RING_F_DCB].indices = IXGBE_MAX_DCB_INDICES;
2788 adapter->max_msix_q_vectors = MAX_MSIX_Q_VECTORS_82598;
2790 #ifdef CONFIG_IXGBE_DCB
2791 /* Configure DCB traffic classes */
2792 for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
2793 tc = &adapter->dcb_cfg.tc_config[j];
2794 tc->path[DCB_TX_CONFIG].bwg_id = 0;
2795 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
2796 tc->path[DCB_RX_CONFIG].bwg_id = 0;
2797 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
2798 tc->dcb_pfc = pfc_disabled;
2800 adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
2801 adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
2802 adapter->dcb_cfg.rx_pba_cfg = pba_equal;
2803 adapter->dcb_cfg.round_robin_enable = false;
2804 adapter->dcb_set_bitmap = 0x00;
2805 ixgbe_copy_dcb_cfg(&adapter->dcb_cfg, &adapter->temp_dcb_cfg,
2806 adapter->ring_feature[RING_F_DCB].indices);
2809 if (hw->mac.ops.get_media_type &&
2810 (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_copper))
2811 adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
2813 /* default flow control settings */
2814 hw->fc.requested_mode = ixgbe_fc_none;
2815 hw->fc.high_water = IXGBE_DEFAULT_FCRTH;
2816 hw->fc.low_water = IXGBE_DEFAULT_FCRTL;
2817 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
2818 hw->fc.send_xon = true;
2820 /* enable itr by default in dynamic mode */
2821 adapter->itr_setting = 1;
2822 adapter->eitr_param = 20000;
2824 /* set defaults for eitr in MegaBytes */
2825 adapter->eitr_low = 10;
2826 adapter->eitr_high = 20;
2828 /* set default ring sizes */
2829 adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
2830 adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
2832 /* initialize eeprom parameters */
2833 if (ixgbe_init_eeprom_params_generic(hw)) {
2834 dev_err(&pdev->dev, "EEPROM initialization failed\n");
2838 /* enable rx csum by default */
2839 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
2841 set_bit(__IXGBE_DOWN, &adapter->state);
2847 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
2848 * @adapter: board private structure
2849 * @tx_ring: tx descriptor ring (for a specific queue) to setup
2851 * Return 0 on success, negative on failure
2853 int ixgbe_setup_tx_resources(struct ixgbe_adapter *adapter,
2854 struct ixgbe_ring *tx_ring)
2856 struct pci_dev *pdev = adapter->pdev;
2859 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
2860 tx_ring->tx_buffer_info = vmalloc(size);
2861 if (!tx_ring->tx_buffer_info)
2863 memset(tx_ring->tx_buffer_info, 0, size);
2865 /* round up to nearest 4K */
2866 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
2867 tx_ring->size = ALIGN(tx_ring->size, 4096);
2869 tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
2874 tx_ring->next_to_use = 0;
2875 tx_ring->next_to_clean = 0;
2876 tx_ring->work_limit = tx_ring->count;
2880 vfree(tx_ring->tx_buffer_info);
2881 tx_ring->tx_buffer_info = NULL;
2882 DPRINTK(PROBE, ERR, "Unable to allocate memory for the transmit "
2883 "descriptor ring\n");
2888 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
2889 * @adapter: board private structure
2891 * If this function returns with an error, then it's possible one or
2892 * more of the rings is populated (while the rest are not). It is the
2893 * callers duty to clean those orphaned rings.
2895 * Return 0 on success, negative on failure
2897 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
2901 for (i = 0; i < adapter->num_tx_queues; i++) {
2902 err = ixgbe_setup_tx_resources(adapter, &adapter->tx_ring[i]);
2905 DPRINTK(PROBE, ERR, "Allocation for Tx Queue %u failed\n", i);
2913 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
2914 * @adapter: board private structure
2915 * @rx_ring: rx descriptor ring (for a specific queue) to setup
2917 * Returns 0 on success, negative on failure
2919 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
2920 struct ixgbe_ring *rx_ring)
2922 struct pci_dev *pdev = adapter->pdev;
2925 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
2926 rx_ring->rx_buffer_info = vmalloc(size);
2927 if (!rx_ring->rx_buffer_info) {
2929 "vmalloc allocation failed for the rx desc ring\n");
2932 memset(rx_ring->rx_buffer_info, 0, size);
2934 /* Round up to nearest 4K */
2935 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
2936 rx_ring->size = ALIGN(rx_ring->size, 4096);
2938 rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size, &rx_ring->dma);
2940 if (!rx_ring->desc) {
2942 "Memory allocation failed for the rx desc ring\n");
2943 vfree(rx_ring->rx_buffer_info);
2947 rx_ring->next_to_clean = 0;
2948 rx_ring->next_to_use = 0;
2957 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
2958 * @adapter: board private structure
2960 * If this function returns with an error, then it's possible one or
2961 * more of the rings is populated (while the rest are not). It is the
2962 * callers duty to clean those orphaned rings.
2964 * Return 0 on success, negative on failure
2967 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
2971 for (i = 0; i < adapter->num_rx_queues; i++) {
2972 err = ixgbe_setup_rx_resources(adapter, &adapter->rx_ring[i]);
2975 DPRINTK(PROBE, ERR, "Allocation for Rx Queue %u failed\n", i);
2983 * ixgbe_free_tx_resources - Free Tx Resources per Queue
2984 * @adapter: board private structure
2985 * @tx_ring: Tx descriptor ring for a specific queue
2987 * Free all transmit software resources
2989 void ixgbe_free_tx_resources(struct ixgbe_adapter *adapter,
2990 struct ixgbe_ring *tx_ring)
2992 struct pci_dev *pdev = adapter->pdev;
2994 ixgbe_clean_tx_ring(adapter, tx_ring);
2996 vfree(tx_ring->tx_buffer_info);
2997 tx_ring->tx_buffer_info = NULL;
2999 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
3001 tx_ring->desc = NULL;
3005 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
3006 * @adapter: board private structure
3008 * Free all transmit software resources
3010 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
3014 for (i = 0; i < adapter->num_tx_queues; i++)
3015 ixgbe_free_tx_resources(adapter, &adapter->tx_ring[i]);
3019 * ixgbe_free_rx_resources - Free Rx Resources
3020 * @adapter: board private structure
3021 * @rx_ring: ring to clean the resources from
3023 * Free all receive software resources
3025 void ixgbe_free_rx_resources(struct ixgbe_adapter *adapter,
3026 struct ixgbe_ring *rx_ring)
3028 struct pci_dev *pdev = adapter->pdev;
3030 ixgbe_clean_rx_ring(adapter, rx_ring);
3032 vfree(rx_ring->rx_buffer_info);
3033 rx_ring->rx_buffer_info = NULL;
3035 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
3037 rx_ring->desc = NULL;
3041 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
3042 * @adapter: board private structure
3044 * Free all receive software resources
3046 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
3050 for (i = 0; i < adapter->num_rx_queues; i++)
3051 ixgbe_free_rx_resources(adapter, &adapter->rx_ring[i]);
3055 * ixgbe_change_mtu - Change the Maximum Transfer Unit
3056 * @netdev: network interface device structure
3057 * @new_mtu: new value for maximum frame size
3059 * Returns 0 on success, negative on failure
3061 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
3063 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3064 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
3066 /* MTU < 68 is an error and causes problems on some kernels */
3067 if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
3070 DPRINTK(PROBE, INFO, "changing MTU from %d to %d\n",
3071 netdev->mtu, new_mtu);
3072 /* must set new MTU before calling down or up */
3073 netdev->mtu = new_mtu;
3075 if (netif_running(netdev))
3076 ixgbe_reinit_locked(adapter);
3082 * ixgbe_open - Called when a network interface is made active
3083 * @netdev: network interface device structure
3085 * Returns 0 on success, negative value on failure
3087 * The open entry point is called when a network interface is made
3088 * active by the system (IFF_UP). At this point all resources needed
3089 * for transmit and receive operations are allocated, the interrupt
3090 * handler is registered with the OS, the watchdog timer is started,
3091 * and the stack is notified that the interface is ready.
3093 static int ixgbe_open(struct net_device *netdev)
3095 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3098 /* disallow open during test */
3099 if (test_bit(__IXGBE_TESTING, &adapter->state))
3102 /* allocate transmit descriptors */
3103 err = ixgbe_setup_all_tx_resources(adapter);
3107 /* allocate receive descriptors */
3108 err = ixgbe_setup_all_rx_resources(adapter);
3112 ixgbe_configure(adapter);
3114 err = ixgbe_request_irq(adapter);
3118 err = ixgbe_up_complete(adapter);
3122 netif_tx_start_all_queues(netdev);
3127 ixgbe_release_hw_control(adapter);
3128 ixgbe_free_irq(adapter);
3130 ixgbe_free_all_rx_resources(adapter);
3132 ixgbe_free_all_tx_resources(adapter);
3134 ixgbe_reset(adapter);
3140 * ixgbe_close - Disables a network interface
3141 * @netdev: network interface device structure
3143 * Returns 0, this is not allowed to fail
3145 * The close entry point is called when an interface is de-activated
3146 * by the OS. The hardware is still under the drivers control, but
3147 * needs to be disabled. A global MAC reset is issued to stop the
3148 * hardware, and all transmit and receive resources are freed.
3150 static int ixgbe_close(struct net_device *netdev)
3152 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3154 ixgbe_down(adapter);
3155 ixgbe_free_irq(adapter);
3157 ixgbe_free_all_tx_resources(adapter);
3158 ixgbe_free_all_rx_resources(adapter);
3160 ixgbe_release_hw_control(adapter);
3166 * ixgbe_napi_add_all - prep napi structs for use
3167 * @adapter: private struct
3168 * helper function to napi_add each possible q_vector->napi
3170 void ixgbe_napi_add_all(struct ixgbe_adapter *adapter)
3172 int q_idx, q_vectors;
3173 struct net_device *netdev = adapter->netdev;
3174 int (*poll)(struct napi_struct *, int);
3176 /* check if we already have our netdev->napi_list populated */
3177 if (&netdev->napi_list != netdev->napi_list.next)
3180 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3181 poll = &ixgbe_clean_rxonly;
3182 /* Only enable as many vectors as we have rx queues. */
3183 q_vectors = adapter->num_rx_queues;
3186 /* only one q_vector for legacy modes */
3190 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
3191 struct ixgbe_q_vector *q_vector = &adapter->q_vector[q_idx];
3192 netif_napi_add(adapter->netdev, &q_vector->napi, (*poll), 64);
3196 void ixgbe_napi_del_all(struct ixgbe_adapter *adapter)
3199 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
3201 /* legacy and MSI only use one vector */
3202 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
3205 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
3206 struct ixgbe_q_vector *q_vector = &adapter->q_vector[q_idx];
3207 if (!q_vector->rxr_count)
3209 netif_napi_del(&q_vector->napi);
3214 static int ixgbe_resume(struct pci_dev *pdev)
3216 struct net_device *netdev = pci_get_drvdata(pdev);
3217 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3220 pci_set_power_state(pdev, PCI_D0);
3221 pci_restore_state(pdev);
3222 err = pci_enable_device(pdev);
3224 printk(KERN_ERR "ixgbe: Cannot enable PCI device from "
3228 pci_set_master(pdev);
3230 pci_enable_wake(pdev, PCI_D3hot, 0);
3231 pci_enable_wake(pdev, PCI_D3cold, 0);
3233 err = ixgbe_init_interrupt_scheme(adapter);
3235 printk(KERN_ERR "ixgbe: Cannot initialize interrupts for "
3240 ixgbe_napi_add_all(adapter);
3241 ixgbe_reset(adapter);
3243 if (netif_running(netdev)) {
3244 err = ixgbe_open(adapter->netdev);
3249 netif_device_attach(netdev);
3254 #endif /* CONFIG_PM */
3255 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
3257 struct net_device *netdev = pci_get_drvdata(pdev);
3258 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3263 netif_device_detach(netdev);
3265 if (netif_running(netdev)) {
3266 ixgbe_down(adapter);
3267 ixgbe_free_irq(adapter);
3268 ixgbe_free_all_tx_resources(adapter);
3269 ixgbe_free_all_rx_resources(adapter);
3271 ixgbe_reset_interrupt_capability(adapter);
3272 ixgbe_napi_del_all(adapter);
3273 INIT_LIST_HEAD(&netdev->napi_list);
3274 kfree(adapter->tx_ring);
3275 kfree(adapter->rx_ring);
3278 retval = pci_save_state(pdev);
3283 pci_enable_wake(pdev, PCI_D3hot, 0);
3284 pci_enable_wake(pdev, PCI_D3cold, 0);
3286 ixgbe_release_hw_control(adapter);
3288 pci_disable_device(pdev);
3290 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3295 static void ixgbe_shutdown(struct pci_dev *pdev)
3297 ixgbe_suspend(pdev, PMSG_SUSPEND);
3301 * ixgbe_update_stats - Update the board statistics counters.
3302 * @adapter: board private structure
3304 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
3306 struct ixgbe_hw *hw = &adapter->hw;
3308 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
3310 adapter->stats.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
3311 for (i = 0; i < 8; i++) {
3312 /* for packet buffers not used, the register should read 0 */
3313 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
3315 adapter->stats.mpc[i] += mpc;
3316 total_mpc += adapter->stats.mpc[i];
3317 adapter->stats.rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
3318 adapter->stats.qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
3319 adapter->stats.qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
3320 adapter->stats.qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
3321 adapter->stats.qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
3322 adapter->stats.pxonrxc[i] += IXGBE_READ_REG(hw,
3324 adapter->stats.pxontxc[i] += IXGBE_READ_REG(hw,
3326 adapter->stats.pxoffrxc[i] += IXGBE_READ_REG(hw,
3328 adapter->stats.pxofftxc[i] += IXGBE_READ_REG(hw,
3331 adapter->stats.gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
3332 /* work around hardware counting issue */
3333 adapter->stats.gprc -= missed_rx;
3335 /* 82598 hardware only has a 32 bit counter in the high register */
3336 adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
3337 adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
3338 adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORH);
3339 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
3340 adapter->stats.bprc += bprc;
3341 adapter->stats.mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
3342 adapter->stats.mprc -= bprc;
3343 adapter->stats.roc += IXGBE_READ_REG(hw, IXGBE_ROC);
3344 adapter->stats.prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
3345 adapter->stats.prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
3346 adapter->stats.prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
3347 adapter->stats.prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
3348 adapter->stats.prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
3349 adapter->stats.prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
3350 adapter->stats.rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
3351 adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
3352 adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
3353 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
3354 adapter->stats.lxontxc += lxon;
3355 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
3356 adapter->stats.lxofftxc += lxoff;
3357 adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
3358 adapter->stats.gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
3359 adapter->stats.mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
3361 * 82598 errata - tx of flow control packets is included in tx counters
3363 xon_off_tot = lxon + lxoff;
3364 adapter->stats.gptc -= xon_off_tot;
3365 adapter->stats.mptc -= xon_off_tot;
3366 adapter->stats.gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
3367 adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
3368 adapter->stats.rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
3369 adapter->stats.rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
3370 adapter->stats.tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
3371 adapter->stats.ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
3372 adapter->stats.ptc64 -= xon_off_tot;
3373 adapter->stats.ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
3374 adapter->stats.ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
3375 adapter->stats.ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
3376 adapter->stats.ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
3377 adapter->stats.ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
3378 adapter->stats.bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
3380 /* Fill out the OS statistics structure */
3381 adapter->net_stats.multicast = adapter->stats.mprc;
3384 adapter->net_stats.rx_errors = adapter->stats.crcerrs +
3385 adapter->stats.rlec;
3386 adapter->net_stats.rx_dropped = 0;
3387 adapter->net_stats.rx_length_errors = adapter->stats.rlec;
3388 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3389 adapter->net_stats.rx_missed_errors = total_mpc;
3393 * ixgbe_watchdog - Timer Call-back
3394 * @data: pointer to adapter cast into an unsigned long
3396 static void ixgbe_watchdog(unsigned long data)
3398 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
3399 struct ixgbe_hw *hw = &adapter->hw;
3401 /* Do the watchdog outside of interrupt context due to the lovely
3402 * delays that some of the newer hardware requires */
3403 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
3404 /* Cause software interrupt to ensure rx rings are cleaned */
3405 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3407 (1 << (adapter->num_msix_vectors - NON_Q_VECTORS)) - 1;
3408 IXGBE_WRITE_REG(hw, IXGBE_EICS, eics);
3410 /* For legacy and MSI interrupts don't set any bits that
3411 * are enabled for EIAM, because this operation would
3412 * set *both* EIMS and EICS for any bit in EIAM */
3413 IXGBE_WRITE_REG(hw, IXGBE_EICS,
3414 (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
3416 /* Reset the timer */
3417 mod_timer(&adapter->watchdog_timer,
3418 round_jiffies(jiffies + 2 * HZ));
3421 schedule_work(&adapter->watchdog_task);
3425 * ixgbe_watchdog_task - worker thread to bring link up
3426 * @work: pointer to work_struct containing our data
3428 static void ixgbe_watchdog_task(struct work_struct *work)
3430 struct ixgbe_adapter *adapter = container_of(work,
3431 struct ixgbe_adapter,
3433 struct net_device *netdev = adapter->netdev;
3434 struct ixgbe_hw *hw = &adapter->hw;
3435 u32 link_speed = adapter->link_speed;
3436 bool link_up = adapter->link_up;
3438 adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK;
3440 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE) {
3441 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
3443 time_after(jiffies, (adapter->link_check_timeout +
3444 IXGBE_TRY_LINK_TIMEOUT))) {
3445 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
3446 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
3448 adapter->link_up = link_up;
3449 adapter->link_speed = link_speed;
3453 if (!netif_carrier_ok(netdev)) {
3454 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
3455 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
3456 #define FLOW_RX (frctl & IXGBE_FCTRL_RFCE)
3457 #define FLOW_TX (rmcs & IXGBE_RMCS_TFCE_802_3X)
3458 printk(KERN_INFO "ixgbe: %s NIC Link is Up %s, "
3459 "Flow Control: %s\n",
3461 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
3463 (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
3464 "1 Gbps" : "unknown speed")),
3465 ((FLOW_RX && FLOW_TX) ? "RX/TX" :
3467 (FLOW_TX ? "TX" : "None"))));
3469 netif_carrier_on(netdev);
3471 /* Force detection of hung controller */
3472 adapter->detect_tx_hung = true;
3475 adapter->link_up = false;
3476 adapter->link_speed = 0;
3477 if (netif_carrier_ok(netdev)) {
3478 printk(KERN_INFO "ixgbe: %s NIC Link is Down\n",
3480 netif_carrier_off(netdev);
3484 ixgbe_update_stats(adapter);
3485 adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK;
3488 static int ixgbe_tso(struct ixgbe_adapter *adapter,
3489 struct ixgbe_ring *tx_ring, struct sk_buff *skb,
3490 u32 tx_flags, u8 *hdr_len)
3492 struct ixgbe_adv_tx_context_desc *context_desc;
3495 struct ixgbe_tx_buffer *tx_buffer_info;
3496 u32 vlan_macip_lens = 0, type_tucmd_mlhl;
3497 u32 mss_l4len_idx, l4len;
3499 if (skb_is_gso(skb)) {
3500 if (skb_header_cloned(skb)) {
3501 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
3505 l4len = tcp_hdrlen(skb);
3508 if (skb->protocol == htons(ETH_P_IP)) {
3509 struct iphdr *iph = ip_hdr(skb);
3512 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
3516 adapter->hw_tso_ctxt++;
3517 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
3518 ipv6_hdr(skb)->payload_len = 0;
3519 tcp_hdr(skb)->check =
3520 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3521 &ipv6_hdr(skb)->daddr,
3523 adapter->hw_tso6_ctxt++;
3526 i = tx_ring->next_to_use;
3528 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3529 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
3531 /* VLAN MACLEN IPLEN */
3532 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3534 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
3535 vlan_macip_lens |= ((skb_network_offset(skb)) <<
3536 IXGBE_ADVTXD_MACLEN_SHIFT);
3537 *hdr_len += skb_network_offset(skb);
3539 (skb_transport_header(skb) - skb_network_header(skb));
3541 (skb_transport_header(skb) - skb_network_header(skb));
3542 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3543 context_desc->seqnum_seed = 0;
3545 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3546 type_tucmd_mlhl = (IXGBE_TXD_CMD_DEXT |
3547 IXGBE_ADVTXD_DTYP_CTXT);
3549 if (skb->protocol == htons(ETH_P_IP))
3550 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
3551 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
3552 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
3556 (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
3557 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
3558 /* use index 1 for TSO */
3559 mss_l4len_idx |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3560 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
3562 tx_buffer_info->time_stamp = jiffies;
3563 tx_buffer_info->next_to_watch = i;
3566 if (i == tx_ring->count)
3568 tx_ring->next_to_use = i;
3575 static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
3576 struct ixgbe_ring *tx_ring,
3577 struct sk_buff *skb, u32 tx_flags)
3579 struct ixgbe_adv_tx_context_desc *context_desc;
3581 struct ixgbe_tx_buffer *tx_buffer_info;
3582 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
3584 if (skb->ip_summed == CHECKSUM_PARTIAL ||
3585 (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
3586 i = tx_ring->next_to_use;
3587 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3588 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
3590 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3592 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
3593 vlan_macip_lens |= (skb_network_offset(skb) <<
3594 IXGBE_ADVTXD_MACLEN_SHIFT);
3595 if (skb->ip_summed == CHECKSUM_PARTIAL)
3596 vlan_macip_lens |= (skb_transport_header(skb) -
3597 skb_network_header(skb));
3599 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3600 context_desc->seqnum_seed = 0;
3602 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
3603 IXGBE_ADVTXD_DTYP_CTXT);
3605 if (skb->ip_summed == CHECKSUM_PARTIAL) {
3606 switch (skb->protocol) {
3607 case cpu_to_be16(ETH_P_IP):
3608 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
3609 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
3611 IXGBE_ADVTXD_TUCMD_L4T_TCP;
3613 case cpu_to_be16(ETH_P_IPV6):
3614 /* XXX what about other V6 headers?? */
3615 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
3617 IXGBE_ADVTXD_TUCMD_L4T_TCP;
3620 if (unlikely(net_ratelimit())) {
3621 DPRINTK(PROBE, WARNING,
3622 "partial checksum but proto=%x!\n",
3629 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
3630 /* use index zero for tx checksum offload */
3631 context_desc->mss_l4len_idx = 0;
3633 tx_buffer_info->time_stamp = jiffies;
3634 tx_buffer_info->next_to_watch = i;
3636 adapter->hw_csum_tx_good++;
3638 if (i == tx_ring->count)
3640 tx_ring->next_to_use = i;
3648 static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
3649 struct ixgbe_ring *tx_ring,
3650 struct sk_buff *skb, unsigned int first)
3652 struct ixgbe_tx_buffer *tx_buffer_info;
3653 unsigned int len = skb->len;
3654 unsigned int offset = 0, size, count = 0, i;
3655 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
3658 len -= skb->data_len;
3660 i = tx_ring->next_to_use;
3663 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3664 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
3666 tx_buffer_info->length = size;
3667 tx_buffer_info->dma = pci_map_single(adapter->pdev,
3669 size, PCI_DMA_TODEVICE);
3670 tx_buffer_info->time_stamp = jiffies;
3671 tx_buffer_info->next_to_watch = i;
3677 if (i == tx_ring->count)
3681 for (f = 0; f < nr_frags; f++) {
3682 struct skb_frag_struct *frag;
3684 frag = &skb_shinfo(skb)->frags[f];
3686 offset = frag->page_offset;
3689 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3690 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
3692 tx_buffer_info->length = size;
3693 tx_buffer_info->dma = pci_map_page(adapter->pdev,
3698 tx_buffer_info->time_stamp = jiffies;
3699 tx_buffer_info->next_to_watch = i;
3705 if (i == tx_ring->count)
3710 i = tx_ring->count - 1;
3713 tx_ring->tx_buffer_info[i].skb = skb;
3714 tx_ring->tx_buffer_info[first].next_to_watch = i;
3719 static void ixgbe_tx_queue(struct ixgbe_adapter *adapter,
3720 struct ixgbe_ring *tx_ring,
3721 int tx_flags, int count, u32 paylen, u8 hdr_len)
3723 union ixgbe_adv_tx_desc *tx_desc = NULL;
3724 struct ixgbe_tx_buffer *tx_buffer_info;
3725 u32 olinfo_status = 0, cmd_type_len = 0;
3727 u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
3729 cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
3731 cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
3733 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3734 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
3736 if (tx_flags & IXGBE_TX_FLAGS_TSO) {
3737 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
3739 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3740 IXGBE_ADVTXD_POPTS_SHIFT;
3742 /* use index 1 context for tso */
3743 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3744 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3745 olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
3746 IXGBE_ADVTXD_POPTS_SHIFT;
3748 } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3749 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3750 IXGBE_ADVTXD_POPTS_SHIFT;
3752 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
3754 i = tx_ring->next_to_use;
3756 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3757 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
3758 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
3759 tx_desc->read.cmd_type_len =
3760 cpu_to_le32(cmd_type_len | tx_buffer_info->length);
3761 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
3763 if (i == tx_ring->count)
3767 tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
3770 * Force memory writes to complete before letting h/w
3771 * know there are new descriptors to fetch. (Only
3772 * applicable for weak-ordered memory model archs,
3777 tx_ring->next_to_use = i;
3778 writel(i, adapter->hw.hw_addr + tx_ring->tail);
3781 static int __ixgbe_maybe_stop_tx(struct net_device *netdev,
3782 struct ixgbe_ring *tx_ring, int size)
3784 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3786 netif_stop_subqueue(netdev, tx_ring->queue_index);
3787 /* Herbert's original patch had:
3788 * smp_mb__after_netif_stop_queue();
3789 * but since that doesn't exist yet, just open code it. */
3792 /* We need to check again in a case another CPU has just
3793 * made room available. */
3794 if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
3797 /* A reprieve! - use start_queue because it doesn't call schedule */
3798 netif_start_subqueue(netdev, tx_ring->queue_index);
3799 ++adapter->restart_queue;
3803 static int ixgbe_maybe_stop_tx(struct net_device *netdev,
3804 struct ixgbe_ring *tx_ring, int size)
3806 if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
3808 return __ixgbe_maybe_stop_tx(netdev, tx_ring, size);
3811 static int ixgbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3813 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3814 struct ixgbe_ring *tx_ring;
3816 unsigned int tx_flags = 0;
3822 r_idx = (adapter->num_tx_queues - 1) & skb->queue_mapping;
3823 tx_ring = &adapter->tx_ring[r_idx];
3825 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
3826 tx_flags |= vlan_tx_tag_get(skb);
3827 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
3828 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
3829 tx_flags |= (skb->queue_mapping << 13);
3831 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3832 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3833 } else if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
3834 tx_flags |= (skb->queue_mapping << 13);
3835 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3836 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3838 /* three things can cause us to need a context descriptor */
3839 if (skb_is_gso(skb) ||
3840 (skb->ip_summed == CHECKSUM_PARTIAL) ||
3841 (tx_flags & IXGBE_TX_FLAGS_VLAN))
3844 count += TXD_USE_COUNT(skb_headlen(skb));
3845 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
3846 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3848 if (ixgbe_maybe_stop_tx(netdev, tx_ring, count)) {
3850 return NETDEV_TX_BUSY;
3853 if (skb->protocol == htons(ETH_P_IP))
3854 tx_flags |= IXGBE_TX_FLAGS_IPV4;
3855 first = tx_ring->next_to_use;
3856 tso = ixgbe_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
3858 dev_kfree_skb_any(skb);
3859 return NETDEV_TX_OK;
3863 tx_flags |= IXGBE_TX_FLAGS_TSO;
3864 else if (ixgbe_tx_csum(adapter, tx_ring, skb, tx_flags) &&
3865 (skb->ip_summed == CHECKSUM_PARTIAL))
3866 tx_flags |= IXGBE_TX_FLAGS_CSUM;
3868 ixgbe_tx_queue(adapter, tx_ring, tx_flags,
3869 ixgbe_tx_map(adapter, tx_ring, skb, first),
3872 netdev->trans_start = jiffies;
3874 ixgbe_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
3876 return NETDEV_TX_OK;
3880 * ixgbe_get_stats - Get System Network Statistics
3881 * @netdev: network interface device structure
3883 * Returns the address of the device statistics structure.
3884 * The statistics are actually updated from the timer callback.
3886 static struct net_device_stats *ixgbe_get_stats(struct net_device *netdev)
3888 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3890 /* only return the current stats */
3891 return &adapter->net_stats;
3895 * ixgbe_set_mac - Change the Ethernet Address of the NIC
3896 * @netdev: network interface device structure
3897 * @p: pointer to an address structure
3899 * Returns 0 on success, negative on failure
3901 static int ixgbe_set_mac(struct net_device *netdev, void *p)
3903 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3904 struct ixgbe_hw *hw = &adapter->hw;
3905 struct sockaddr *addr = p;
3907 if (!is_valid_ether_addr(addr->sa_data))
3908 return -EADDRNOTAVAIL;
3910 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3911 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3913 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);
3918 #ifdef CONFIG_NET_POLL_CONTROLLER
3920 * Polling 'interrupt' - used by things like netconsole to send skbs
3921 * without having to re-enable interrupts. It's not called while
3922 * the interrupt routine is executing.
3924 static void ixgbe_netpoll(struct net_device *netdev)
3926 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3928 disable_irq(adapter->pdev->irq);
3929 adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
3930 ixgbe_intr(adapter->pdev->irq, netdev);
3931 adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
3932 enable_irq(adapter->pdev->irq);
3936 static const struct net_device_ops ixgbe_netdev_ops = {
3937 .ndo_open = ixgbe_open,
3938 .ndo_stop = ixgbe_close,
3939 .ndo_start_xmit = ixgbe_xmit_frame,
3940 .ndo_get_stats = ixgbe_get_stats,
3941 .ndo_set_multicast_list = ixgbe_set_rx_mode,
3942 .ndo_validate_addr = eth_validate_addr,
3943 .ndo_set_mac_address = ixgbe_set_mac,
3944 .ndo_change_mtu = ixgbe_change_mtu,
3945 .ndo_tx_timeout = ixgbe_tx_timeout,
3946 .ndo_vlan_rx_register = ixgbe_vlan_rx_register,
3947 .ndo_vlan_rx_add_vid = ixgbe_vlan_rx_add_vid,
3948 .ndo_vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid,
3949 #ifdef CONFIG_NET_POLL_CONTROLLER
3950 .ndo_poll_controller = ixgbe_netpoll,
3955 * ixgbe_probe - Device Initialization Routine
3956 * @pdev: PCI device information struct
3957 * @ent: entry in ixgbe_pci_tbl
3959 * Returns 0 on success, negative on failure
3961 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
3962 * The OS initialization, configuring of the adapter private structure,
3963 * and a hardware reset occur.
3965 static int __devinit ixgbe_probe(struct pci_dev *pdev,
3966 const struct pci_device_id *ent)
3968 struct net_device *netdev;
3969 struct ixgbe_adapter *adapter = NULL;
3970 struct ixgbe_hw *hw;
3971 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
3972 static int cards_found;
3973 int i, err, pci_using_dac;
3974 u16 link_status, link_speed, link_width;
3977 err = pci_enable_device(pdev);
3981 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK) &&
3982 !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
3985 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
3987 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
3989 dev_err(&pdev->dev, "No usable DMA "
3990 "configuration, aborting\n");
3997 err = pci_request_regions(pdev, ixgbe_driver_name);
3999 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
4003 err = pci_enable_pcie_error_reporting(pdev);
4005 dev_err(&pdev->dev, "pci_enable_pcie_error_reporting failed "
4007 /* non-fatal, continue */
4010 pci_set_master(pdev);
4011 pci_save_state(pdev);
4013 netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), MAX_TX_QUEUES);
4016 goto err_alloc_etherdev;
4019 SET_NETDEV_DEV(netdev, &pdev->dev);
4021 pci_set_drvdata(pdev, netdev);
4022 adapter = netdev_priv(netdev);
4024 adapter->netdev = netdev;
4025 adapter->pdev = pdev;
4028 adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
4030 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
4031 pci_resource_len(pdev, 0));
4037 for (i = 1; i <= 5; i++) {
4038 if (pci_resource_len(pdev, i) == 0)
4042 netdev->netdev_ops = &ixgbe_netdev_ops;
4043 ixgbe_set_ethtool_ops(netdev);
4044 netdev->watchdog_timeo = 5 * HZ;
4045 strcpy(netdev->name, pci_name(pdev));
4047 adapter->bd_number = cards_found;
4050 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
4051 hw->mac.type = ii->mac;
4054 memcpy(&hw->eeprom.ops, ii->eeprom_ops, sizeof(hw->eeprom.ops));
4055 eec = IXGBE_READ_REG(hw, IXGBE_EEC);
4056 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
4057 if (!(eec & (1 << 8)))
4058 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
4061 memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
4062 hw->phy.sfp_type = ixgbe_sfp_type_unknown;
4064 /* set up this timer and work struct before calling get_invariants
4065 * which might start the timer
4067 init_timer(&adapter->sfp_timer);
4068 adapter->sfp_timer.function = &ixgbe_sfp_timer;
4069 adapter->sfp_timer.data = (unsigned long) adapter;
4071 INIT_WORK(&adapter->sfp_task, ixgbe_sfp_task);
4073 err = ii->get_invariants(hw);
4074 if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
4075 /* start a kernel thread to watch for a module to arrive */
4076 set_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
4077 mod_timer(&adapter->sfp_timer,
4078 round_jiffies(jiffies + (2 * HZ)));
4080 } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
4081 DPRINTK(PROBE, ERR, "failed to load because an "
4082 "unsupported SFP+ module type was detected.\n");
4088 /* setup the private structure */
4089 err = ixgbe_sw_init(adapter);
4093 /* reset_hw fills in the perm_addr as well */
4094 err = hw->mac.ops.reset_hw(hw);
4096 dev_err(&adapter->pdev->dev, "HW Init failed: %d\n", err);
4100 netdev->features = NETIF_F_SG |
4102 NETIF_F_HW_VLAN_TX |
4103 NETIF_F_HW_VLAN_RX |
4104 NETIF_F_HW_VLAN_FILTER;
4106 netdev->features |= NETIF_F_IPV6_CSUM;
4107 netdev->features |= NETIF_F_TSO;
4108 netdev->features |= NETIF_F_TSO6;
4109 netdev->features |= NETIF_F_GRO;
4111 netdev->vlan_features |= NETIF_F_TSO;
4112 netdev->vlan_features |= NETIF_F_TSO6;
4113 netdev->vlan_features |= NETIF_F_IP_CSUM;
4114 netdev->vlan_features |= NETIF_F_SG;
4116 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
4117 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
4119 #ifdef CONFIG_IXGBE_DCB
4120 netdev->dcbnl_ops = &dcbnl_ops;
4124 netdev->features |= NETIF_F_HIGHDMA;
4126 /* make sure the EEPROM is good */
4127 if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
4128 dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n");
4133 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
4134 memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
4136 if (ixgbe_validate_mac_addr(netdev->perm_addr)) {
4137 dev_err(&pdev->dev, "invalid MAC address\n");
4142 init_timer(&adapter->watchdog_timer);
4143 adapter->watchdog_timer.function = &ixgbe_watchdog;
4144 adapter->watchdog_timer.data = (unsigned long)adapter;
4146 INIT_WORK(&adapter->reset_task, ixgbe_reset_task);
4147 INIT_WORK(&adapter->watchdog_task, ixgbe_watchdog_task);
4149 err = ixgbe_init_interrupt_scheme(adapter);
4153 /* print bus type/speed/width info */
4154 pci_read_config_word(pdev, IXGBE_PCI_LINK_STATUS, &link_status);
4155 link_speed = link_status & IXGBE_PCI_LINK_SPEED;
4156 link_width = link_status & IXGBE_PCI_LINK_WIDTH;
4157 dev_info(&pdev->dev, "(PCI Express:%s:%s) %pM\n",
4158 ((link_speed == IXGBE_PCI_LINK_SPEED_5000) ? "5.0Gb/s" :
4159 (link_speed == IXGBE_PCI_LINK_SPEED_2500) ? "2.5Gb/s" :
4161 ((link_width == IXGBE_PCI_LINK_WIDTH_8) ? "Width x8" :
4162 (link_width == IXGBE_PCI_LINK_WIDTH_4) ? "Width x4" :
4163 (link_width == IXGBE_PCI_LINK_WIDTH_2) ? "Width x2" :
4164 (link_width == IXGBE_PCI_LINK_WIDTH_1) ? "Width x1" :
4167 ixgbe_read_pba_num_generic(hw, &part_num);
4168 dev_info(&pdev->dev, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
4169 hw->mac.type, hw->phy.type,
4170 (part_num >> 8), (part_num & 0xff));
4172 if (link_width <= IXGBE_PCI_LINK_WIDTH_4) {
4173 dev_warn(&pdev->dev, "PCI-Express bandwidth available for "
4174 "this card is not sufficient for optimal "
4176 dev_warn(&pdev->dev, "For optimal performance a x8 "
4177 "PCI-Express slot is required.\n");
4180 /* save off EEPROM version number */
4181 hw->eeprom.ops.read(hw, 0x29, &adapter->eeprom_version);
4183 /* reset the hardware with the new settings */
4184 hw->mac.ops.start_hw(hw);
4186 netif_carrier_off(netdev);
4188 strcpy(netdev->name, "eth%d");
4189 err = register_netdev(netdev);
4193 #ifdef CONFIG_IXGBE_DCA
4194 if (dca_add_requester(&pdev->dev) == 0) {
4195 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
4196 /* always use CB2 mode, difference is masked
4197 * in the CB driver */
4198 IXGBE_WRITE_REG(hw, IXGBE_DCA_CTRL, 2);
4199 ixgbe_setup_dca(adapter);
4203 dev_info(&pdev->dev, "Intel(R) 10 Gigabit Network Connection\n");
4208 ixgbe_release_hw_control(adapter);
4211 ixgbe_reset_interrupt_capability(adapter);
4213 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
4214 del_timer_sync(&adapter->sfp_timer);
4215 cancel_work_sync(&adapter->sfp_task);
4216 iounmap(hw->hw_addr);
4218 free_netdev(netdev);
4220 pci_release_regions(pdev);
4223 pci_disable_device(pdev);
4228 * ixgbe_remove - Device Removal Routine
4229 * @pdev: PCI device information struct
4231 * ixgbe_remove is called by the PCI subsystem to alert the driver
4232 * that it should release a PCI device. The could be caused by a
4233 * Hot-Plug event, or because the driver is going to be removed from
4236 static void __devexit ixgbe_remove(struct pci_dev *pdev)
4238 struct net_device *netdev = pci_get_drvdata(pdev);
4239 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4242 set_bit(__IXGBE_DOWN, &adapter->state);
4243 /* clear the module not found bit to make sure the worker won't
4246 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
4247 del_timer_sync(&adapter->watchdog_timer);
4249 del_timer_sync(&adapter->sfp_timer);
4250 cancel_work_sync(&adapter->watchdog_task);
4251 cancel_work_sync(&adapter->sfp_task);
4252 flush_scheduled_work();
4254 #ifdef CONFIG_IXGBE_DCA
4255 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
4256 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
4257 dca_remove_requester(&pdev->dev);
4258 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
4262 if (netdev->reg_state == NETREG_REGISTERED)
4263 unregister_netdev(netdev);
4265 ixgbe_reset_interrupt_capability(adapter);
4267 ixgbe_release_hw_control(adapter);
4269 iounmap(adapter->hw.hw_addr);
4270 pci_release_regions(pdev);
4272 DPRINTK(PROBE, INFO, "complete\n");
4273 kfree(adapter->tx_ring);
4274 kfree(adapter->rx_ring);
4276 free_netdev(netdev);
4278 err = pci_disable_pcie_error_reporting(pdev);
4281 "pci_disable_pcie_error_reporting failed 0x%x\n", err);
4283 pci_disable_device(pdev);
4287 * ixgbe_io_error_detected - called when PCI error is detected
4288 * @pdev: Pointer to PCI device
4289 * @state: The current pci connection state
4291 * This function is called after a PCI bus error affecting
4292 * this device has been detected.
4294 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
4295 pci_channel_state_t state)
4297 struct net_device *netdev = pci_get_drvdata(pdev);
4298 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4300 netif_device_detach(netdev);
4302 if (netif_running(netdev))
4303 ixgbe_down(adapter);
4304 pci_disable_device(pdev);
4306 /* Request a slot reset. */
4307 return PCI_ERS_RESULT_NEED_RESET;
4311 * ixgbe_io_slot_reset - called after the pci bus has been reset.
4312 * @pdev: Pointer to PCI device
4314 * Restart the card from scratch, as if from a cold-boot.
4316 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
4318 struct net_device *netdev = pci_get_drvdata(pdev);
4319 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4320 pci_ers_result_t result;
4323 if (pci_enable_device(pdev)) {
4325 "Cannot re-enable PCI device after reset.\n");
4326 result = PCI_ERS_RESULT_DISCONNECT;
4328 pci_set_master(pdev);
4329 pci_restore_state(pdev);
4331 pci_enable_wake(pdev, PCI_D3hot, 0);
4332 pci_enable_wake(pdev, PCI_D3cold, 0);
4334 ixgbe_reset(adapter);
4336 result = PCI_ERS_RESULT_RECOVERED;
4339 err = pci_cleanup_aer_uncorrect_error_status(pdev);
4342 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n", err);
4343 /* non-fatal, continue */
4350 * ixgbe_io_resume - called when traffic can start flowing again.
4351 * @pdev: Pointer to PCI device
4353 * This callback is called when the error recovery driver tells us that
4354 * its OK to resume normal operation.
4356 static void ixgbe_io_resume(struct pci_dev *pdev)
4358 struct net_device *netdev = pci_get_drvdata(pdev);
4359 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4361 if (netif_running(netdev)) {
4362 if (ixgbe_up(adapter)) {
4363 DPRINTK(PROBE, INFO, "ixgbe_up failed after reset\n");
4368 netif_device_attach(netdev);
4371 static struct pci_error_handlers ixgbe_err_handler = {
4372 .error_detected = ixgbe_io_error_detected,
4373 .slot_reset = ixgbe_io_slot_reset,
4374 .resume = ixgbe_io_resume,
4377 static struct pci_driver ixgbe_driver = {
4378 .name = ixgbe_driver_name,
4379 .id_table = ixgbe_pci_tbl,
4380 .probe = ixgbe_probe,
4381 .remove = __devexit_p(ixgbe_remove),
4383 .suspend = ixgbe_suspend,
4384 .resume = ixgbe_resume,
4386 .shutdown = ixgbe_shutdown,
4387 .err_handler = &ixgbe_err_handler
4391 * ixgbe_init_module - Driver Registration Routine
4393 * ixgbe_init_module is the first routine called when the driver is
4394 * loaded. All it does is register with the PCI subsystem.
4396 static int __init ixgbe_init_module(void)
4399 printk(KERN_INFO "%s: %s - version %s\n", ixgbe_driver_name,
4400 ixgbe_driver_string, ixgbe_driver_version);
4402 printk(KERN_INFO "%s: %s\n", ixgbe_driver_name, ixgbe_copyright);
4404 #ifdef CONFIG_IXGBE_DCA
4405 dca_register_notify(&dca_notifier);
4408 ret = pci_register_driver(&ixgbe_driver);
4412 module_init(ixgbe_init_module);
4415 * ixgbe_exit_module - Driver Exit Cleanup Routine
4417 * ixgbe_exit_module is called just before the driver is removed
4420 static void __exit ixgbe_exit_module(void)
4422 #ifdef CONFIG_IXGBE_DCA
4423 dca_unregister_notify(&dca_notifier);
4425 pci_unregister_driver(&ixgbe_driver);
4428 #ifdef CONFIG_IXGBE_DCA
4429 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
4434 ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
4435 __ixgbe_notify_dca);
4437 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
4439 #endif /* CONFIG_IXGBE_DCA */
4441 module_exit(ixgbe_exit_module);