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   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2007 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   Linux NICS <linux.nics@intel.com>
  24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  26
  27 *******************************************************************************/
  28
  29 #include <linux/types.h>
  30 #include <linux/module.h>
  31 #include <linux/pci.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/string.h>
  35 #include <linux/in.h>
  36 #include <linux/ip.h>
  37 #include <linux/tcp.h>
  38 #include <linux/ipv6.h>
  39 #include <net/checksum.h>
  40 #include <net/ip6_checksum.h>
  41 #include <linux/ethtool.h>
  42 #include <linux/if_vlan.h>
  43
  44 #include "ixgbe.h"
  45 #include "ixgbe_common.h"
  46
  47 char ixgbe_driver_name[] = "ixgbe";
  48 static const char ixgbe_driver_string[] =
  49         "Intel(R) 10 Gigabit PCI Express Network Driver";
  50
  51 #define DRV_VERSION "1.3.18-k2"
  52 const char ixgbe_driver_version[] = DRV_VERSION;
  53 static const char ixgbe_copyright[] =
  54          "Copyright (c) 1999-2007 Intel Corporation.";
  55
  56 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  57         [board_82598]                   = &ixgbe_82598_info,
  58 };
  59
  60 /* ixgbe_pci_tbl - PCI Device ID Table
  61  *
  62  * Wildcard entries (PCI_ANY_ID) should come last
  63  * Last entry must be all 0s
  64  *
  65  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  66  *   Class, Class Mask, private data (not used) }
  67  */
  68 static struct pci_device_id ixgbe_pci_tbl[] = {
  69         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT),
  70          board_82598 },
  71         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT),
  72          board_82598 },
  73         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT_DUAL_PORT),
  74          board_82598 },
  75         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4),
  76          board_82598 },
  77
  78         /* required last entry */
  79         {0, }
  80 };
  81 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
  82
  83 #ifdef CONFIG_DCA
  84 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
  85                             void *p);
  86 static struct notifier_block dca_notifier = {
  87         .notifier_call = ixgbe_notify_dca,
  88         .next          = NULL,
  89         .priority      = 0
  90 };
  91 #endif
  92
  93 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  94 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
  95 MODULE_LICENSE("GPL");
  96 MODULE_VERSION(DRV_VERSION);
  97
  98 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
  99
 100 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 101 {
 102         u32 ctrl_ext;
 103
 104         /* Let firmware take over control of h/w */
 105         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 106         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 107                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 108 }
 109
 110 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 111 {
 112         u32 ctrl_ext;
 113
 114         /* Let firmware know the driver has taken over */
 115         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 116         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 117                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 118 }
 119
 120 #ifdef DEBUG
 121 /**
 122  * ixgbe_get_hw_dev_name - return device name string
 123  * used by hardware layer to print debugging information
 124  **/
 125 char *ixgbe_get_hw_dev_name(struct ixgbe_hw *hw)
 126 {
 127         struct ixgbe_adapter *adapter = hw->back;
 128         struct net_device *netdev = adapter->netdev;
 129         return netdev->name;
 130 }
 131 #endif
 132
 133 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, u16 int_alloc_entry,
 134                            u8 msix_vector)
 135 {
 136         u32 ivar, index;
 137
 138         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 139         index = (int_alloc_entry >> 2) & 0x1F;
 140         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR(index));
 141         ivar &= ~(0xFF << (8 * (int_alloc_entry & 0x3)));
 142         ivar |= (msix_vector << (8 * (int_alloc_entry & 0x3)));
 143         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR(index), ivar);
 144 }
 145
 146 static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter,
 147                                              struct ixgbe_tx_buffer
 148                                              *tx_buffer_info)
 149 {
 150         if (tx_buffer_info->dma) {
 151                 pci_unmap_page(adapter->pdev,
 152                                tx_buffer_info->dma,
 153                                tx_buffer_info->length, PCI_DMA_TODEVICE);
 154                 tx_buffer_info->dma = 0;
 155         }
 156         if (tx_buffer_info->skb) {
 157                 dev_kfree_skb_any(tx_buffer_info->skb);
 158                 tx_buffer_info->skb = NULL;
 159         }
 160         /* tx_buffer_info must be completely set up in the transmit path */
 161 }
 162
 163 static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
 164                                        struct ixgbe_ring *tx_ring,
 165                                        unsigned int eop,
 166                                        union ixgbe_adv_tx_desc *eop_desc)
 167 {
 168         /* Detect a transmit hang in hardware, this serializes the
 169          * check with the clearing of time_stamp and movement of i */
 170         adapter->detect_tx_hung = false;
 171         if (tx_ring->tx_buffer_info[eop].dma &&
 172             time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) &&
 173             !(IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & IXGBE_TFCS_TXOFF)) {
 174                 /* detected Tx unit hang */
 175                 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
 176                         "  TDH                  <%x>\n"
 177                         "  TDT                  <%x>\n"
 178                         "  next_to_use          <%x>\n"
 179                         "  next_to_clean        <%x>\n"
 180                         "tx_buffer_info[next_to_clean]\n"
 181                         "  time_stamp           <%lx>\n"
 182                         "  next_to_watch        <%x>\n"
 183                         "  jiffies              <%lx>\n"
 184                         "  next_to_watch.status <%x>\n",
 185                         readl(adapter->hw.hw_addr + tx_ring->head),
 186                         readl(adapter->hw.hw_addr + tx_ring->tail),
 187                         tx_ring->next_to_use,
 188                         tx_ring->next_to_clean,
 189                         tx_ring->tx_buffer_info[eop].time_stamp,
 190                         eop, jiffies, eop_desc->wb.status);
 191                 return true;
 192         }
 193
 194         return false;
 195 }
 196
 197 #define IXGBE_MAX_TXD_PWR       14
 198 #define IXGBE_MAX_DATA_PER_TXD  (1 << IXGBE_MAX_TXD_PWR)
 199
 200 /* Tx Descriptors needed, worst case */
 201 #define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
 202                          (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
 203 #define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
 204         MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1)   /* for context */
 205
 206 /**
 207  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
 208  * @adapter: board private structure
 209  **/
 210 static bool ixgbe_clean_tx_irq(struct ixgbe_adapter *adapter,
 211                                     struct ixgbe_ring *tx_ring)
 212 {
 213         struct net_device *netdev = adapter->netdev;
 214         union ixgbe_adv_tx_desc *tx_desc, *eop_desc;
 215         struct ixgbe_tx_buffer *tx_buffer_info;
 216         unsigned int i, eop;
 217         bool cleaned = false;
 218         unsigned int total_tx_bytes = 0, total_tx_packets = 0;
 219
 220         i = tx_ring->next_to_clean;
 221         eop = tx_ring->tx_buffer_info[i].next_to_watch;
 222         eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
 223         while (eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) {
 224                 cleaned = false;
 225                 while (!cleaned) {
 226                         tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
 227                         tx_buffer_info = &tx_ring->tx_buffer_info[i];
 228                         cleaned = (i == eop);
 229
 230                         tx_ring->stats.bytes += tx_buffer_info->length;
 231                         if (cleaned) {
 232                                 struct sk_buff *skb = tx_buffer_info->skb;
 233                                 unsigned int segs, bytecount;
 234                                 segs = skb_shinfo(skb)->gso_segs ?: 1;
 235                                 /* multiply data chunks by size of headers */
 236                                 bytecount = ((segs - 1) * skb_headlen(skb)) +
 237                                             skb->len;
 238                                 total_tx_packets += segs;
 239                                 total_tx_bytes += bytecount;
 240                         }
 241                         ixgbe_unmap_and_free_tx_resource(adapter,
 242                                                          tx_buffer_info);
 243                         tx_desc->wb.status = 0;
 244
 245                         i++;
 246                         if (i == tx_ring->count)
 247                                 i = 0;
 248                 }
 249
 250                 tx_ring->stats.packets++;
 251
 252                 eop = tx_ring->tx_buffer_info[i].next_to_watch;
 253                 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
 254
 255                 /* weight of a sort for tx, avoid endless transmit cleanup */
 256                 if (total_tx_packets >= tx_ring->work_limit)
 257                         break;
 258         }
 259
 260         tx_ring->next_to_clean = i;
 261
 262 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
 263         if (total_tx_packets && netif_carrier_ok(netdev) &&
 264             (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
 265                 /* Make sure that anybody stopping the queue after this
 266                  * sees the new next_to_clean.
 267                  */
 268                 smp_mb();
 269 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
 270                 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
 271                     !test_bit(__IXGBE_DOWN, &adapter->state)) {
 272                         netif_wake_subqueue(netdev, tx_ring->queue_index);
 273                         adapter->restart_queue++;
 274                 }
 275 #else
 276                 if (netif_queue_stopped(netdev) &&
 277                     !test_bit(__IXGBE_DOWN, &adapter->state)) {
 278                         netif_wake_queue(netdev);
 279                         adapter->restart_queue++;
 280                 }
 281 #endif
 282         }
 283
 284         if (adapter->detect_tx_hung)
 285                 if (ixgbe_check_tx_hang(adapter, tx_ring, eop, eop_desc))
 286 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
 287                         netif_stop_subqueue(netdev, tx_ring->queue_index);
 288 #else
 289                         netif_stop_queue(netdev);
 290 #endif
 291
 292         if (total_tx_packets >= tx_ring->work_limit)
 293                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, tx_ring->eims_value);
 294
 295         tx_ring->total_bytes += total_tx_bytes;
 296         tx_ring->total_packets += total_tx_packets;
 297         adapter->net_stats.tx_bytes += total_tx_bytes;
 298         adapter->net_stats.tx_packets += total_tx_packets;
 299         cleaned = total_tx_packets ? true : false;
 300         return cleaned;
 301 }
 302
 303 #ifdef CONFIG_DCA
 304 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
 305                                 struct ixgbe_ring *rxr)
 306 {
 307         u32 rxctrl;
 308         int cpu = get_cpu();
 309         int q = rxr - adapter->rx_ring;
 310
 311         if (rxr->cpu != cpu) {
 312                 rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q));
 313                 rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK;
 314                 rxctrl |= dca_get_tag(cpu);
 315                 rxctrl |= IXGBE_DCA_RXCTRL_DESC_DCA_EN;
 316                 rxctrl |= IXGBE_DCA_RXCTRL_HEAD_DCA_EN;
 317                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q), rxctrl);
 318                 rxr->cpu = cpu;
 319         }
 320         put_cpu();
 321 }
 322
 323 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
 324                                 struct ixgbe_ring *txr)
 325 {
 326         u32 txctrl;
 327         int cpu = get_cpu();
 328         int q = txr - adapter->tx_ring;
 329
 330         if (txr->cpu != cpu) {
 331                 txctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q));
 332                 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK;
 333                 txctrl |= dca_get_tag(cpu);
 334                 txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN;
 335                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q), txctrl);
 336                 txr->cpu = cpu;
 337         }
 338         put_cpu();
 339 }
 340
 341 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
 342 {
 343         int i;
 344
 345         if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
 346                 return;
 347
 348         for (i = 0; i < adapter->num_tx_queues; i++) {
 349                 adapter->tx_ring[i].cpu = -1;
 350                 ixgbe_update_tx_dca(adapter, &adapter->tx_ring[i]);
 351         }
 352         for (i = 0; i < adapter->num_rx_queues; i++) {
 353                 adapter->rx_ring[i].cpu = -1;
 354                 ixgbe_update_rx_dca(adapter, &adapter->rx_ring[i]);
 355         }
 356 }
 357
 358 static int __ixgbe_notify_dca(struct device *dev, void *data)
 359 {
 360         struct net_device *netdev = dev_get_drvdata(dev);
 361         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 362         unsigned long event = *(unsigned long *)data;
 363
 364         switch (event) {
 365         case DCA_PROVIDER_ADD:
 366                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
 367                 /* Always use CB2 mode, difference is masked
 368                  * in the CB driver. */
 369                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
 370                 if (dca_add_requester(dev) == 0) {
 371                         ixgbe_setup_dca(adapter);
 372                         break;
 373                 }
 374                 /* Fall Through since DCA is disabled. */
 375         case DCA_PROVIDER_REMOVE:
 376                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
 377                         dca_remove_requester(dev);
 378                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
 379                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
 380                 }
 381                 break;
 382         }
 383
 384         return 0;
 385 }
 386
 387 #endif /* CONFIG_DCA */
 388 /**
 389  * ixgbe_receive_skb - Send a completed packet up the stack
 390  * @adapter: board private structure
 391  * @skb: packet to send up
 392  * @status: hardware indication of status of receive
 393  * @rx_ring: rx descriptor ring (for a specific queue) to setup
 394  * @rx_desc: rx descriptor
 395  **/
 396 static void ixgbe_receive_skb(struct ixgbe_adapter *adapter,
 397                               struct sk_buff *skb, u8 status,
 398                               struct ixgbe_ring *ring,
 399                               union ixgbe_adv_rx_desc *rx_desc)
 400 {
 401         bool is_vlan = (status & IXGBE_RXD_STAT_VP);
 402         u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
 403
 404         if (adapter->netdev->features & NETIF_F_LRO &&
 405             skb->ip_summed == CHECKSUM_UNNECESSARY) {
 406                 if (adapter->vlgrp && is_vlan)
 407                         lro_vlan_hwaccel_receive_skb(&ring->lro_mgr, skb,
 408                                                      adapter->vlgrp, tag,
 409                                                      rx_desc);
 410                 else
 411                         lro_receive_skb(&ring->lro_mgr, skb, rx_desc);
 412                 ring->lro_used = true;
 413         } else {
 414                 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
 415                         if (adapter->vlgrp && is_vlan)
 416                                 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, tag);
 417                         else
 418                                 netif_receive_skb(skb);
 419                 } else {
 420                         if (adapter->vlgrp && is_vlan)
 421                                 vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
 422                         else
 423                                 netif_rx(skb);
 424                 }
 425         }
 426 }
 427
 428 /**
 429  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
 430  * @adapter: address of board private structure
 431  * @status_err: hardware indication of status of receive
 432  * @skb: skb currently being received and modified
 433  **/
 434 static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter,
 435                                          u32 status_err,
 436                                          struct sk_buff *skb)
 437 {
 438         skb->ip_summed = CHECKSUM_NONE;
 439
 440         /* Ignore Checksum bit is set, or rx csum disabled */
 441         if ((status_err & IXGBE_RXD_STAT_IXSM) ||
 442             !(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
 443                 return;
 444
 445         /* if IP and error */
 446         if ((status_err & IXGBE_RXD_STAT_IPCS) &&
 447             (status_err & IXGBE_RXDADV_ERR_IPE)) {
 448                 adapter->hw_csum_rx_error++;
 449                 return;
 450         }
 451
 452         if (!(status_err & IXGBE_RXD_STAT_L4CS))
 453                 return;
 454
 455         if (status_err & IXGBE_RXDADV_ERR_TCPE) {
 456                 adapter->hw_csum_rx_error++;
 457                 return;
 458         }
 459
 460         /* It must be a TCP or UDP packet with a valid checksum */
 461         skb->ip_summed = CHECKSUM_UNNECESSARY;
 462         adapter->hw_csum_rx_good++;
 463 }
 464
 465 /**
 466  * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
 467  * @adapter: address of board private structure
 468  **/
 469 static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter *adapter,
 470                                        struct ixgbe_ring *rx_ring,
 471                                        int cleaned_count)
 472 {
 473         struct net_device *netdev = adapter->netdev;
 474         struct pci_dev *pdev = adapter->pdev;
 475         union ixgbe_adv_rx_desc *rx_desc;
 476         struct ixgbe_rx_buffer *rx_buffer_info;
 477         struct sk_buff *skb;
 478         unsigned int i;
 479         unsigned int bufsz = adapter->rx_buf_len + NET_IP_ALIGN;
 480
 481         i = rx_ring->next_to_use;
 482         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 483
 484         while (cleaned_count--) {
 485                 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
 486
 487                 if (!rx_buffer_info->page &&
 488                                 (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
 489                         rx_buffer_info->page = alloc_page(GFP_ATOMIC);
 490                         if (!rx_buffer_info->page) {
 491                                 adapter->alloc_rx_page_failed++;
 492                                 goto no_buffers;
 493                         }
 494                         rx_buffer_info->page_dma =
 495                             pci_map_page(pdev, rx_buffer_info->page,
 496                                          0, PAGE_SIZE, PCI_DMA_FROMDEVICE);
 497                 }
 498
 499                 if (!rx_buffer_info->skb) {
 500                         skb = netdev_alloc_skb(netdev, bufsz);
 501
 502                         if (!skb) {
 503                                 adapter->alloc_rx_buff_failed++;
 504                                 goto no_buffers;
 505                         }
 506
 507                         /*
 508                          * Make buffer alignment 2 beyond a 16 byte boundary
 509                          * this will result in a 16 byte aligned IP header after
 510                          * the 14 byte MAC header is removed
 511                          */
 512                         skb_reserve(skb, NET_IP_ALIGN);
 513
 514                         rx_buffer_info->skb = skb;
 515                         rx_buffer_info->dma = pci_map_single(pdev, skb->data,
 516                                                           bufsz,
 517                                                           PCI_DMA_FROMDEVICE);
 518                 }
 519                 /* Refresh the desc even if buffer_addrs didn't change because
 520                  * each write-back erases this info. */
 521                 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
 522                         rx_desc->read.pkt_addr =
 523                             cpu_to_le64(rx_buffer_info->page_dma);
 524                         rx_desc->read.hdr_addr =
 525                                         cpu_to_le64(rx_buffer_info->dma);
 526                 } else {
 527                         rx_desc->read.pkt_addr =
 528                                         cpu_to_le64(rx_buffer_info->dma);
 529                 }
 530
 531                 i++;
 532                 if (i == rx_ring->count)
 533                         i = 0;
 534                 rx_buffer_info = &rx_ring->rx_buffer_info[i];
 535         }
 536 no_buffers:
 537         if (rx_ring->next_to_use != i) {
 538                 rx_ring->next_to_use = i;
 539                 if (i-- == 0)
 540                         i = (rx_ring->count - 1);
 541
 542                 /*
 543                  * Force memory writes to complete before letting h/w
 544                  * know there are new descriptors to fetch.  (Only
 545                  * applicable for weak-ordered memory model archs,
 546                  * such as IA-64).
 547                  */
 548                 wmb();
 549                 writel(i, adapter->hw.hw_addr + rx_ring->tail);
 550         }
 551 }
 552
 553 static bool ixgbe_clean_rx_irq(struct ixgbe_adapter *adapter,
 554                                struct ixgbe_ring *rx_ring,
 555                                int *work_done, int work_to_do)
 556 {
 557         struct net_device *netdev = adapter->netdev;
 558         struct pci_dev *pdev = adapter->pdev;
 559         union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
 560         struct ixgbe_rx_buffer *rx_buffer_info, *next_buffer;
 561         struct sk_buff *skb;
 562         unsigned int i;
 563         u32 upper_len, len, staterr;
 564         u16 hdr_info;
 565         bool cleaned = false;
 566         int cleaned_count = 0;
 567         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
 568
 569         i = rx_ring->next_to_clean;
 570         upper_len = 0;
 571         rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
 572         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 573         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 574
 575         while (staterr & IXGBE_RXD_STAT_DD) {
 576                 if (*work_done >= work_to_do)
 577                         break;
 578                 (*work_done)++;
 579
 580                 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
 581                         hdr_info =
 582                             le16_to_cpu(rx_desc->wb.lower.lo_dword.hdr_info);
 583                         len =
 584                             ((hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
 585                              IXGBE_RXDADV_HDRBUFLEN_SHIFT);
 586                         if (hdr_info & IXGBE_RXDADV_SPH)
 587                                 adapter->rx_hdr_split++;
 588                         if (len > IXGBE_RX_HDR_SIZE)
 589                                 len = IXGBE_RX_HDR_SIZE;
 590                         upper_len = le16_to_cpu(rx_desc->wb.upper.length);
 591                 } else
 592                         len = le16_to_cpu(rx_desc->wb.upper.length);
 593
 594                 cleaned = true;
 595                 skb = rx_buffer_info->skb;
 596                 prefetch(skb->data - NET_IP_ALIGN);
 597                 rx_buffer_info->skb = NULL;
 598
 599                 if (len && !skb_shinfo(skb)->nr_frags) {
 600                         pci_unmap_single(pdev, rx_buffer_info->dma,
 601                                          adapter->rx_buf_len + NET_IP_ALIGN,
 602                                          PCI_DMA_FROMDEVICE);
 603                         skb_put(skb, len);
 604                 }
 605
 606                 if (upper_len) {
 607                         pci_unmap_page(pdev, rx_buffer_info->page_dma,
 608                                        PAGE_SIZE, PCI_DMA_FROMDEVICE);
 609                         rx_buffer_info->page_dma = 0;
 610                         skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
 611                                            rx_buffer_info->page, 0, upper_len);
 612                         rx_buffer_info->page = NULL;
 613
 614                         skb->len += upper_len;
 615                         skb->data_len += upper_len;
 616                         skb->truesize += upper_len;
 617                 }
 618
 619                 i++;
 620                 if (i == rx_ring->count)
 621                         i = 0;
 622                 next_buffer = &rx_ring->rx_buffer_info[i];
 623
 624                 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
 625                 prefetch(next_rxd);
 626
 627                 cleaned_count++;
 628                 if (staterr & IXGBE_RXD_STAT_EOP) {
 629                         rx_ring->stats.packets++;
 630                         rx_ring->stats.bytes += skb->len;
 631                 } else {
 632                         rx_buffer_info->skb = next_buffer->skb;
 633                         rx_buffer_info->dma = next_buffer->dma;
 634                         next_buffer->skb = skb;
 635                         adapter->non_eop_descs++;
 636                         goto next_desc;
 637                 }
 638
 639                 if (staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK) {
 640                         dev_kfree_skb_irq(skb);
 641                         goto next_desc;
 642                 }
 643
 644                 ixgbe_rx_checksum(adapter, staterr, skb);
 645
 646                 /* probably a little skewed due to removing CRC */
 647                 total_rx_bytes += skb->len;
 648                 total_rx_packets++;
 649
 650                 skb->protocol = eth_type_trans(skb, netdev);
 651                 ixgbe_receive_skb(adapter, skb, staterr, rx_ring, rx_desc);
 652                 netdev->last_rx = jiffies;
 653
 654 next_desc:
 655                 rx_desc->wb.upper.status_error = 0;
 656
 657                 /* return some buffers to hardware, one at a time is too slow */
 658                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
 659                         ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
 660                         cleaned_count = 0;
 661                 }
 662
 663                 /* use prefetched values */
 664                 rx_desc = next_rxd;
 665                 rx_buffer_info = next_buffer;
 666
 667                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 668         }
 669
 670         if (rx_ring->lro_used) {
 671                 lro_flush_all(&rx_ring->lro_mgr);
 672                 rx_ring->lro_used = false;
 673         }
 674
 675         rx_ring->next_to_clean = i;
 676         cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
 677
 678         if (cleaned_count)
 679                 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
 680
 681         adapter->net_stats.rx_bytes += total_rx_bytes;
 682         adapter->net_stats.rx_packets += total_rx_packets;
 683
 684         rx_ring->total_packets += total_rx_packets;
 685         rx_ring->total_bytes += total_rx_bytes;
 686         adapter->net_stats.rx_bytes += total_rx_bytes;
 687         adapter->net_stats.rx_packets += total_rx_packets;
 688
 689         return cleaned;
 690 }
 691
 692 static int ixgbe_clean_rxonly(struct napi_struct *, int);
 693 /**
 694  * ixgbe_configure_msix - Configure MSI-X hardware
 695  * @adapter: board private structure
 696  *
 697  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
 698  * interrupts.
 699  **/
 700 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
 701 {
 702         struct ixgbe_q_vector *q_vector;
 703         int i, j, q_vectors, v_idx, r_idx;
 704         u32 mask;
 705
 706         q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
 707
 708         /* Populate the IVAR table and set the ITR values to the
 709          * corresponding register.
 710          */
 711         for (v_idx = 0; v_idx < q_vectors; v_idx++) {
 712                 q_vector = &adapter->q_vector[v_idx];
 713                 /* XXX for_each_bit(...) */
 714                 r_idx = find_first_bit(q_vector->rxr_idx,
 715                                       adapter->num_rx_queues);
 716
 717                 for (i = 0; i < q_vector->rxr_count; i++) {
 718                         j = adapter->rx_ring[r_idx].reg_idx;
 719                         ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(j), v_idx);
 720                         r_idx = find_next_bit(q_vector->rxr_idx,
 721                                               adapter->num_rx_queues,
 722                                               r_idx + 1);
 723                 }
 724                 r_idx = find_first_bit(q_vector->txr_idx,
 725                                        adapter->num_tx_queues);
 726
 727                 for (i = 0; i < q_vector->txr_count; i++) {
 728                         j = adapter->tx_ring[r_idx].reg_idx;
 729                         ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(j), v_idx);
 730                         r_idx = find_next_bit(q_vector->txr_idx,
 731                                               adapter->num_tx_queues,
 732                                               r_idx + 1);
 733                 }
 734
 735                 /* if this is a tx only vector use half the irq (tx) rate */
 736                 if (q_vector->txr_count && !q_vector->rxr_count)
 737                         q_vector->eitr = adapter->tx_eitr;
 738                 else
 739                         /* rx only or mixed */
 740                         q_vector->eitr = adapter->rx_eitr;
 741
 742                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx),
 743                                 EITR_INTS_PER_SEC_TO_REG(q_vector->eitr));
 744         }
 745
 746         ixgbe_set_ivar(adapter, IXGBE_IVAR_OTHER_CAUSES_INDEX, v_idx);
 747         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
 748
 749         /* set up to autoclear timer, lsc, and the vectors */
 750         mask = IXGBE_EIMS_ENABLE_MASK;
 751         mask &= ~IXGBE_EIMS_OTHER;
 752         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
 753 }
 754
 755 enum latency_range {
 756         lowest_latency = 0,
 757         low_latency = 1,
 758         bulk_latency = 2,
 759         latency_invalid = 255
 760 };
 761
 762 /**
 763  * ixgbe_update_itr - update the dynamic ITR value based on statistics
 764  * @adapter: pointer to adapter
 765  * @eitr: eitr setting (ints per sec) to give last timeslice
 766  * @itr_setting: current throttle rate in ints/second
 767  * @packets: the number of packets during this measurement interval
 768  * @bytes: the number of bytes during this measurement interval
 769  *
 770  *      Stores a new ITR value based on packets and byte
 771  *      counts during the last interrupt.  The advantage of per interrupt
 772  *      computation is faster updates and more accurate ITR for the current
 773  *      traffic pattern.  Constants in this function were computed
 774  *      based on theoretical maximum wire speed and thresholds were set based
 775  *      on testing data as well as attempting to minimize response time
 776  *      while increasing bulk throughput.
 777  *      this functionality is controlled by the InterruptThrottleRate module
 778  *      parameter (see ixgbe_param.c)
 779  **/
 780 static u8 ixgbe_update_itr(struct ixgbe_adapter *adapter,
 781                            u32 eitr, u8 itr_setting,
 782                            int packets, int bytes)
 783 {
 784         unsigned int retval = itr_setting;
 785         u32 timepassed_us;
 786         u64 bytes_perint;
 787
 788         if (packets == 0)
 789                 goto update_itr_done;
 790
 791
 792         /* simple throttlerate management
 793          *    0-20MB/s lowest (100000 ints/s)
 794          *   20-100MB/s low   (20000 ints/s)
 795          *  100-1249MB/s bulk (8000 ints/s)
 796          */
 797         /* what was last interrupt timeslice? */
 798         timepassed_us = 1000000/eitr;
 799         bytes_perint = bytes / timepassed_us; /* bytes/usec */
 800
 801         switch (itr_setting) {
 802         case lowest_latency:
 803                 if (bytes_perint > adapter->eitr_low)
 804                         retval = low_latency;
 805                 break;
 806         case low_latency:
 807                 if (bytes_perint > adapter->eitr_high)
 808                         retval = bulk_latency;
 809                 else if (bytes_perint <= adapter->eitr_low)
 810                         retval = lowest_latency;
 811                 break;
 812         case bulk_latency:
 813                 if (bytes_perint <= adapter->eitr_high)
 814                         retval = low_latency;
 815                 break;
 816         }
 817
 818 update_itr_done:
 819         return retval;
 820 }
 821
 822 static void ixgbe_set_itr_msix(struct ixgbe_q_vector *q_vector)
 823 {
 824         struct ixgbe_adapter *adapter = q_vector->adapter;
 825         struct ixgbe_hw *hw = &adapter->hw;
 826         u32 new_itr;
 827         u8 current_itr, ret_itr;
 828         int i, r_idx, v_idx = ((void *)q_vector - (void *)(adapter->q_vector)) /
 829                               sizeof(struct ixgbe_q_vector);
 830         struct ixgbe_ring *rx_ring, *tx_ring;
 831
 832         r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
 833         for (i = 0; i < q_vector->txr_count; i++) {
 834                 tx_ring = &(adapter->tx_ring[r_idx]);
 835                 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
 836                                            q_vector->tx_eitr,
 837                                            tx_ring->total_packets,
 838                                            tx_ring->total_bytes);
 839                 /* if the result for this queue would decrease interrupt
 840                  * rate for this vector then use that result */
 841                 q_vector->tx_eitr = ((q_vector->tx_eitr > ret_itr) ?
 842                                     q_vector->tx_eitr - 1 : ret_itr);
 843                 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
 844                                       r_idx + 1);
 845         }
 846
 847         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
 848         for (i = 0; i < q_vector->rxr_count; i++) {
 849                 rx_ring = &(adapter->rx_ring[r_idx]);
 850                 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
 851                                            q_vector->rx_eitr,
 852                                            rx_ring->total_packets,
 853                                            rx_ring->total_bytes);
 854                 /* if the result for this queue would decrease interrupt
 855                  * rate for this vector then use that result */
 856                 q_vector->rx_eitr = ((q_vector->rx_eitr > ret_itr) ?
 857                                     q_vector->rx_eitr - 1 : ret_itr);
 858                 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
 859                                       r_idx + 1);
 860         }
 861
 862         current_itr = max(q_vector->rx_eitr, q_vector->tx_eitr);
 863
 864         switch (current_itr) {
 865         /* counts and packets in update_itr are dependent on these numbers */
 866         case lowest_latency:
 867                 new_itr = 100000;
 868                 break;
 869         case low_latency:
 870                 new_itr = 20000; /* aka hwitr = ~200 */
 871                 break;
 872         case bulk_latency:
 873         default:
 874                 new_itr = 8000;
 875                 break;
 876         }
 877
 878         if (new_itr != q_vector->eitr) {
 879                 u32 itr_reg;
 880                 /* do an exponential smoothing */
 881                 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
 882                 q_vector->eitr = new_itr;
 883                 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
 884                 /* must write high and low 16 bits to reset counter */
 885                 DPRINTK(TX_ERR, DEBUG, "writing eitr(%d): %08X\n", v_idx,
 886                         itr_reg);
 887                 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg | (itr_reg)<<16);
 888         }
 889
 890         return;
 891 }
 892
 893 static irqreturn_t ixgbe_msix_lsc(int irq, void *data)
 894 {
 895         struct net_device *netdev = data;
 896         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 897         struct ixgbe_hw *hw = &adapter->hw;
 898         u32 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
 899
 900         if (eicr & IXGBE_EICR_LSC) {
 901                 adapter->lsc_int++;
 902                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
 903                         mod_timer(&adapter->watchdog_timer, jiffies);
 904         }
 905
 906         if (!test_bit(__IXGBE_DOWN, &adapter->state))
 907                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER);
 908
 909         return IRQ_HANDLED;
 910 }
 911
 912 static irqreturn_t ixgbe_msix_clean_tx(int irq, void *data)
 913 {
 914         struct ixgbe_q_vector *q_vector = data;
 915         struct ixgbe_adapter  *adapter = q_vector->adapter;
 916         struct ixgbe_ring     *txr;
 917         int i, r_idx;
 918
 919         if (!q_vector->txr_count)
 920                 return IRQ_HANDLED;
 921
 922         r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
 923         for (i = 0; i < q_vector->txr_count; i++) {
 924                 txr = &(adapter->tx_ring[r_idx]);
 925 #ifdef CONFIG_DCA
 926                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
 927                         ixgbe_update_tx_dca(adapter, txr);
 928 #endif
 929                 txr->total_bytes = 0;
 930                 txr->total_packets = 0;
 931                 ixgbe_clean_tx_irq(adapter, txr);
 932                 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
 933                                       r_idx + 1);
 934         }
 935
 936         return IRQ_HANDLED;
 937 }
 938
 939 /**
 940  * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
 941  * @irq: unused
 942  * @data: pointer to our q_vector struct for this interrupt vector
 943  **/
 944 static irqreturn_t ixgbe_msix_clean_rx(int irq, void *data)
 945 {
 946         struct ixgbe_q_vector *q_vector = data;
 947         struct ixgbe_adapter  *adapter = q_vector->adapter;
 948         struct ixgbe_ring  *rxr;
 949         int r_idx;
 950
 951         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
 952         if (!q_vector->rxr_count)
 953                 return IRQ_HANDLED;
 954
 955         rxr = &(adapter->rx_ring[r_idx]);
 956         /* disable interrupts on this vector only */
 957         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, rxr->v_idx);
 958         rxr->total_bytes = 0;
 959         rxr->total_packets = 0;
 960         netif_rx_schedule(adapter->netdev, &q_vector->napi);
 961
 962         return IRQ_HANDLED;
 963 }
 964
 965 static irqreturn_t ixgbe_msix_clean_many(int irq, void *data)
 966 {
 967         ixgbe_msix_clean_rx(irq, data);
 968         ixgbe_msix_clean_tx(irq, data);
 969
 970         return IRQ_HANDLED;
 971 }
 972
 973 /**
 974  * ixgbe_clean_rxonly - msix (aka one shot) rx clean routine
 975  * @napi: napi struct with our devices info in it
 976  * @budget: amount of work driver is allowed to do this pass, in packets
 977  *
 978  **/
 979 static int ixgbe_clean_rxonly(struct napi_struct *napi, int budget)
 980 {
 981         struct ixgbe_q_vector *q_vector =
 982                                container_of(napi, struct ixgbe_q_vector, napi);
 983         struct ixgbe_adapter *adapter = q_vector->adapter;
 984         struct ixgbe_ring *rxr;
 985         int work_done = 0;
 986         long r_idx;
 987
 988         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
 989         rxr = &(adapter->rx_ring[r_idx]);
 990 #ifdef CONFIG_DCA
 991         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
 992                 ixgbe_update_rx_dca(adapter, rxr);
 993 #endif
 994
 995         ixgbe_clean_rx_irq(adapter, rxr, &work_done, budget);
 996
 997         /* If all Rx work done, exit the polling mode */
 998         if (work_done < budget) {
 999                 netif_rx_complete(adapter->netdev, napi);
1000                 if (adapter->rx_eitr < IXGBE_MIN_ITR_USECS)
1001                         ixgbe_set_itr_msix(q_vector);
1002                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1003                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, rxr->v_idx);
1004         }
1005
1006         return work_done;
1007 }
1008
1009 static inline void map_vector_to_rxq(struct ixgbe_adapter *a, int v_idx,
1010                                      int r_idx)
1011 {
1012         a->q_vector[v_idx].adapter = a;
1013         set_bit(r_idx, a->q_vector[v_idx].rxr_idx);
1014         a->q_vector[v_idx].rxr_count++;
1015         a->rx_ring[r_idx].v_idx = 1 << v_idx;
1016 }
1017
1018 static inline void map_vector_to_txq(struct ixgbe_adapter *a, int v_idx,
1019                                      int r_idx)
1020 {
1021         a->q_vector[v_idx].adapter = a;
1022         set_bit(r_idx, a->q_vector[v_idx].txr_idx);
1023         a->q_vector[v_idx].txr_count++;
1024         a->tx_ring[r_idx].v_idx = 1 << v_idx;
1025 }
1026
1027 /**
1028  * ixgbe_map_rings_to_vectors - Maps descriptor rings to vectors
1029  * @adapter: board private structure to initialize
1030  * @vectors: allotted vector count for descriptor rings
1031  *
1032  * This function maps descriptor rings to the queue-specific vectors
1033  * we were allotted through the MSI-X enabling code.  Ideally, we'd have
1034  * one vector per ring/queue, but on a constrained vector budget, we
1035  * group the rings as "efficiently" as possible.  You would add new
1036  * mapping configurations in here.
1037  **/
1038 static int ixgbe_map_rings_to_vectors(struct ixgbe_adapter *adapter,
1039                                       int vectors)
1040 {
1041         int v_start = 0;
1042         int rxr_idx = 0, txr_idx = 0;
1043         int rxr_remaining = adapter->num_rx_queues;
1044         int txr_remaining = adapter->num_tx_queues;
1045         int i, j;
1046         int rqpv, tqpv;
1047         int err = 0;
1048
1049         /* No mapping required if MSI-X is disabled. */
1050         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1051                 goto out;
1052
1053         /*
1054          * The ideal configuration...
1055          * We have enough vectors to map one per queue.
1056          */
1057         if (vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1058                 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1059                         map_vector_to_rxq(adapter, v_start, rxr_idx);
1060
1061                 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1062                         map_vector_to_txq(adapter, v_start, txr_idx);
1063
1064                 goto out;
1065         }
1066
1067         /*
1068          * If we don't have enough vectors for a 1-to-1
1069          * mapping, we'll have to group them so there are
1070          * multiple queues per vector.
1071          */
1072         /* Re-adjusting *qpv takes care of the remainder. */
1073         for (i = v_start; i < vectors; i++) {
1074                 rqpv = DIV_ROUND_UP(rxr_remaining, vectors - i);
1075                 for (j = 0; j < rqpv; j++) {
1076                         map_vector_to_rxq(adapter, i, rxr_idx);
1077                         rxr_idx++;
1078                         rxr_remaining--;
1079                 }
1080         }
1081         for (i = v_start; i < vectors; i++) {
1082                 tqpv = DIV_ROUND_UP(txr_remaining, vectors - i);
1083                 for (j = 0; j < tqpv; j++) {
1084                         map_vector_to_txq(adapter, i, txr_idx);
1085                         txr_idx++;
1086                         txr_remaining--;
1087                 }
1088         }
1089
1090 out:
1091         return err;
1092 }
1093
1094 /**
1095  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
1096  * @adapter: board private structure
1097  *
1098  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
1099  * interrupts from the kernel.
1100  **/
1101 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
1102 {
1103         struct net_device *netdev = adapter->netdev;
1104         irqreturn_t (*handler)(int, void *);
1105         int i, vector, q_vectors, err;
1106
1107         /* Decrement for Other and TCP Timer vectors */
1108         q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1109
1110         /* Map the Tx/Rx rings to the vectors we were allotted. */
1111         err = ixgbe_map_rings_to_vectors(adapter, q_vectors);
1112         if (err)
1113                 goto out;
1114
1115 #define SET_HANDLER(_v) ((!(_v)->rxr_count) ? &ixgbe_msix_clean_tx : \
1116                          (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \
1117                          &ixgbe_msix_clean_many)
1118         for (vector = 0; vector < q_vectors; vector++) {
1119                 handler = SET_HANDLER(&adapter->q_vector[vector]);
1120                 sprintf(adapter->name[vector], "%s:v%d-%s",
1121                         netdev->name, vector,
1122                         (handler == &ixgbe_msix_clean_rx) ? "Rx" :
1123                          ((handler == &ixgbe_msix_clean_tx) ? "Tx" : "TxRx"));
1124                 err = request_irq(adapter->msix_entries[vector].vector,
1125                                   handler, 0, adapter->name[vector],
1126                                   &(adapter->q_vector[vector]));
1127                 if (err) {
1128                         DPRINTK(PROBE, ERR,
1129                                 "request_irq failed for MSIX interrupt "
1130                                 "Error: %d\n", err);
1131                         goto free_queue_irqs;
1132                 }
1133         }
1134
1135         sprintf(adapter->name[vector], "%s:lsc", netdev->name);
1136         err = request_irq(adapter->msix_entries[vector].vector,
1137                           &ixgbe_msix_lsc, 0, adapter->name[vector], netdev);
1138         if (err) {
1139                 DPRINTK(PROBE, ERR,
1140                         "request_irq for msix_lsc failed: %d\n", err);
1141                 goto free_queue_irqs;
1142         }
1143
1144         return 0;
1145
1146 free_queue_irqs:
1147         for (i = vector - 1; i >= 0; i--)
1148                 free_irq(adapter->msix_entries[--vector].vector,
1149                          &(adapter->q_vector[i]));
1150         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
1151         pci_disable_msix(adapter->pdev);
1152         kfree(adapter->msix_entries);
1153         adapter->msix_entries = NULL;
1154 out:
1155         return err;
1156 }
1157
1158 static void ixgbe_set_itr(struct ixgbe_adapter *adapter)
1159 {
1160         struct ixgbe_hw *hw = &adapter->hw;
1161         struct ixgbe_q_vector *q_vector = adapter->q_vector;
1162         u8 current_itr;
1163         u32 new_itr = q_vector->eitr;
1164         struct ixgbe_ring *rx_ring = &adapter->rx_ring[0];
1165         struct ixgbe_ring *tx_ring = &adapter->tx_ring[0];
1166
1167         q_vector->tx_eitr = ixgbe_update_itr(adapter, new_itr,
1168                                              q_vector->tx_eitr,
1169                                              tx_ring->total_packets,
1170                                              tx_ring->total_bytes);
1171         q_vector->rx_eitr = ixgbe_update_itr(adapter, new_itr,
1172                                              q_vector->rx_eitr,
1173                                              rx_ring->total_packets,
1174                                              rx_ring->total_bytes);
1175
1176         current_itr = max(q_vector->rx_eitr, q_vector->tx_eitr);
1177
1178         switch (current_itr) {
1179         /* counts and packets in update_itr are dependent on these numbers */
1180         case lowest_latency:
1181                 new_itr = 100000;
1182                 break;
1183         case low_latency:
1184                 new_itr = 20000; /* aka hwitr = ~200 */
1185                 break;
1186         case bulk_latency:
1187                 new_itr = 8000;
1188                 break;
1189         default:
1190                 break;
1191         }
1192
1193         if (new_itr != q_vector->eitr) {
1194                 u32 itr_reg;
1195                 /* do an exponential smoothing */
1196                 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
1197                 q_vector->eitr = new_itr;
1198                 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
1199                 /* must write high and low 16 bits to reset counter */
1200                 IXGBE_WRITE_REG(hw, IXGBE_EITR(0), itr_reg | (itr_reg)<<16);
1201         }
1202
1203         return;
1204 }
1205
1206 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter);
1207
1208 /**
1209  * ixgbe_intr - legacy mode Interrupt Handler
1210  * @irq: interrupt number
1211  * @data: pointer to a network interface device structure
1212  * @pt_regs: CPU registers structure
1213  **/
1214 static irqreturn_t ixgbe_intr(int irq, void *data)
1215 {
1216         struct net_device *netdev = data;
1217         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1218         struct ixgbe_hw *hw = &adapter->hw;
1219         u32 eicr;
1220
1221
1222         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
1223          * therefore no explict interrupt disable is necessary */
1224         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
1225         if (!eicr)
1226                 return IRQ_NONE;        /* Not our interrupt */
1227
1228         if (eicr & IXGBE_EICR_LSC) {
1229                 adapter->lsc_int++;
1230                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1231                         mod_timer(&adapter->watchdog_timer, jiffies);
1232         }
1233
1234
1235         if (netif_rx_schedule_prep(netdev, &adapter->q_vector[0].napi)) {
1236                 adapter->tx_ring[0].total_packets = 0;
1237                 adapter->tx_ring[0].total_bytes = 0;
1238                 adapter->rx_ring[0].total_packets = 0;
1239                 adapter->rx_ring[0].total_bytes = 0;
1240                 /* would disable interrupts here but EIAM disabled it */
1241                 __netif_rx_schedule(netdev, &adapter->q_vector[0].napi);
1242         }
1243
1244         return IRQ_HANDLED;
1245 }
1246
1247 static inline void ixgbe_reset_q_vectors(struct ixgbe_adapter *adapter)
1248 {
1249         int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1250
1251         for (i = 0; i < q_vectors; i++) {
1252                 struct ixgbe_q_vector *q_vector = &adapter->q_vector[i];
1253                 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES);
1254                 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES);
1255                 q_vector->rxr_count = 0;
1256                 q_vector->txr_count = 0;
1257         }
1258 }
1259
1260 /**
1261  * ixgbe_request_irq - initialize interrupts
1262  * @adapter: board private structure
1263  *
1264  * Attempts to configure interrupts using the best available
1265  * capabilities of the hardware and kernel.
1266  **/
1267 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
1268 {
1269         struct net_device *netdev = adapter->netdev;
1270         int err;
1271
1272         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1273                 err = ixgbe_request_msix_irqs(adapter);
1274         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1275                 err = request_irq(adapter->pdev->irq, &ixgbe_intr, 0,
1276                                   netdev->name, netdev);
1277         } else {
1278                 err = request_irq(adapter->pdev->irq, &ixgbe_intr, IRQF_SHARED,
1279                                   netdev->name, netdev);
1280         }
1281
1282         if (err)
1283                 DPRINTK(PROBE, ERR, "request_irq failed, Error %d\n", err);
1284
1285         return err;
1286 }
1287
1288 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
1289 {
1290         struct net_device *netdev = adapter->netdev;
1291
1292         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1293                 int i, q_vectors;
1294
1295                 q_vectors = adapter->num_msix_vectors;
1296
1297                 i = q_vectors - 1;
1298                 free_irq(adapter->msix_entries[i].vector, netdev);
1299
1300                 i--;
1301                 for (; i >= 0; i--) {
1302                         free_irq(adapter->msix_entries[i].vector,
1303                                  &(adapter->q_vector[i]));
1304                 }
1305
1306                 ixgbe_reset_q_vectors(adapter);
1307         } else {
1308                 free_irq(adapter->pdev->irq, netdev);
1309         }
1310 }
1311
1312 /**
1313  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
1314  * @adapter: board private structure
1315  **/
1316 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
1317 {
1318         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
1319         IXGBE_WRITE_FLUSH(&adapter->hw);
1320         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1321                 int i;
1322                 for (i = 0; i < adapter->num_msix_vectors; i++)
1323                         synchronize_irq(adapter->msix_entries[i].vector);
1324         } else {
1325                 synchronize_irq(adapter->pdev->irq);
1326         }
1327 }
1328
1329 /**
1330  * ixgbe_irq_enable - Enable default interrupt generation settings
1331  * @adapter: board private structure
1332  **/
1333 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter)
1334 {
1335         u32 mask;
1336         mask = IXGBE_EIMS_ENABLE_MASK;
1337         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1338         IXGBE_WRITE_FLUSH(&adapter->hw);
1339 }
1340
1341 /**
1342  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
1343  *
1344  **/
1345 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
1346 {
1347         struct ixgbe_hw *hw = &adapter->hw;
1348
1349         IXGBE_WRITE_REG(hw, IXGBE_EITR(0),
1350                         EITR_INTS_PER_SEC_TO_REG(adapter->rx_eitr));
1351
1352         ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(0), 0);
1353         ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(0), 0);
1354
1355         map_vector_to_rxq(adapter, 0, 0);
1356         map_vector_to_txq(adapter, 0, 0);
1357
1358         DPRINTK(HW, INFO, "Legacy interrupt IVAR setup done\n");
1359 }
1360
1361 /**
1362  * ixgbe_configure_tx - Configure 8254x Transmit Unit after Reset
1363  * @adapter: board private structure
1364  *
1365  * Configure the Tx unit of the MAC after a reset.
1366  **/
1367 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
1368 {
1369         u64 tdba;
1370         struct ixgbe_hw *hw = &adapter->hw;
1371         u32 i, j, tdlen, txctrl;
1372
1373         /* Setup the HW Tx Head and Tail descriptor pointers */
1374         for (i = 0; i < adapter->num_tx_queues; i++) {
1375                 j = adapter->tx_ring[i].reg_idx;
1376                 tdba = adapter->tx_ring[i].dma;
1377                 tdlen = adapter->tx_ring[i].count *
1378                         sizeof(union ixgbe_adv_tx_desc);
1379                 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j),
1380                                 (tdba & DMA_32BIT_MASK));
1381                 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32));
1382                 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), tdlen);
1383                 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0);
1384                 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0);
1385                 adapter->tx_ring[i].head = IXGBE_TDH(j);
1386                 adapter->tx_ring[i].tail = IXGBE_TDT(j);
1387                 /* Disable Tx Head Writeback RO bit, since this hoses
1388                  * bookkeeping if things aren't delivered in order.
1389                  */
1390                 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
1391                 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
1392                 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(i), txctrl);
1393         }
1394 }
1395
1396 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1397                         (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1398
1399 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT                 2
1400 /**
1401  * ixgbe_get_skb_hdr - helper function for LRO header processing
1402  * @skb: pointer to sk_buff to be added to LRO packet
1403  * @iphdr: pointer to tcp header structure
1404  * @tcph: pointer to tcp header structure
1405  * @hdr_flags: pointer to header flags
1406  * @priv: private data
1407  **/
1408 static int ixgbe_get_skb_hdr(struct sk_buff *skb, void **iphdr, void **tcph,
1409                              u64 *hdr_flags, void *priv)
1410 {
1411         union ixgbe_adv_rx_desc *rx_desc = priv;
1412
1413         /* Verify that this is a valid IPv4 TCP packet */
1414         if (!(rx_desc->wb.lower.lo_dword.pkt_info &
1415             (IXGBE_RXDADV_PKTTYPE_IPV4 | IXGBE_RXDADV_PKTTYPE_TCP)))
1416                 return -1;
1417
1418         /* Set network headers */
1419         skb_reset_network_header(skb);
1420         skb_set_transport_header(skb, ip_hdrlen(skb));
1421         *iphdr = ip_hdr(skb);
1422         *tcph = tcp_hdr(skb);
1423         *hdr_flags = LRO_IPV4 | LRO_TCP;
1424         return 0;
1425 }
1426
1427 /**
1428  * ixgbe_configure_rx - Configure 8254x Receive Unit after Reset
1429  * @adapter: board private structure
1430  *
1431  * Configure the Rx unit of the MAC after a reset.
1432  **/
1433 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
1434 {
1435         u64 rdba;
1436         struct ixgbe_hw *hw = &adapter->hw;
1437         struct net_device *netdev = adapter->netdev;
1438         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1439         int i, j;
1440         u32 rdlen, rxctrl, rxcsum;
1441         u32 random[10];
1442         u32 fctrl, hlreg0;
1443         u32 pages;
1444         u32 reta = 0, mrqc, srrctl;
1445
1446         /* Decide whether to use packet split mode or not */
1447         if (netdev->mtu > ETH_DATA_LEN)
1448                 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1449         else
1450                 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
1451
1452         /* Set the RX buffer length according to the mode */
1453         if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1454                 adapter->rx_buf_len = IXGBE_RX_HDR_SIZE;
1455         } else {
1456                 if (netdev->mtu <= ETH_DATA_LEN)
1457                         adapter->rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1458                 else
1459                         adapter->rx_buf_len = ALIGN(max_frame, 1024);
1460         }
1461
1462         fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
1463         fctrl |= IXGBE_FCTRL_BAM;
1464         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
1465         IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl);
1466
1467         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
1468         if (adapter->netdev->mtu <= ETH_DATA_LEN)
1469                 hlreg0 &= ~IXGBE_HLREG0_JUMBOEN;
1470         else
1471                 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
1472         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
1473
1474         pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1475
1476         srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(0));
1477         srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
1478         srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
1479
1480         if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1481                 srrctl |= PAGE_SIZE >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1482                 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1483                 srrctl |= ((IXGBE_RX_HDR_SIZE <<
1484                             IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1485                            IXGBE_SRRCTL_BSIZEHDR_MASK);
1486         } else {
1487                 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1488
1489                 if (adapter->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1490                         srrctl |=
1491                              IXGBE_RXBUFFER_2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1492                 else
1493                         srrctl |=
1494                              adapter->rx_buf_len >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1495         }
1496         IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(0), srrctl);
1497
1498         rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1499         /* disable receives while setting up the descriptors */
1500         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1501         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
1502
1503         /* Setup the HW Rx Head and Tail Descriptor Pointers and
1504          * the Base and Length of the Rx Descriptor Ring */
1505         for (i = 0; i < adapter->num_rx_queues; i++) {
1506                 rdba = adapter->rx_ring[i].dma;
1507                 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(i), (rdba & DMA_32BIT_MASK));
1508                 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(i), (rdba >> 32));
1509                 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(i), rdlen);
1510                 IXGBE_WRITE_REG(hw, IXGBE_RDH(i), 0);
1511                 IXGBE_WRITE_REG(hw, IXGBE_RDT(i), 0);
1512                 adapter->rx_ring[i].head = IXGBE_RDH(i);
1513                 adapter->rx_ring[i].tail = IXGBE_RDT(i);
1514         }
1515
1516         /* Intitial LRO Settings */
1517         adapter->rx_ring[i].lro_mgr.max_aggr = IXGBE_MAX_LRO_AGGREGATE;
1518         adapter->rx_ring[i].lro_mgr.max_desc = IXGBE_MAX_LRO_DESCRIPTORS;
1519         adapter->rx_ring[i].lro_mgr.get_skb_header = ixgbe_get_skb_hdr;
1520         adapter->rx_ring[i].lro_mgr.features = LRO_F_EXTRACT_VLAN_ID;
1521         if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL))
1522                 adapter->rx_ring[i].lro_mgr.features |= LRO_F_NAPI;
1523         adapter->rx_ring[i].lro_mgr.dev = adapter->netdev;
1524         adapter->rx_ring[i].lro_mgr.ip_summed = CHECKSUM_UNNECESSARY;
1525         adapter->rx_ring[i].lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY;
1526
1527         if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
1528                 /* Fill out redirection table */
1529                 for (i = 0, j = 0; i < 128; i++, j++) {
1530                         if (j == adapter->ring_feature[RING_F_RSS].indices)
1531                                 j = 0;
1532                         /* reta = 4-byte sliding window of
1533                          * 0x00..(indices-1)(indices-1)00..etc. */
1534                         reta = (reta << 8) | (j * 0x11);
1535                         if ((i & 3) == 3)
1536                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
1537                 }
1538
1539                 /* Fill out hash function seeds */
1540                 /* XXX use a random constant here to glue certain flows */
1541                 get_random_bytes(&random[0], 40);
1542                 for (i = 0; i < 10; i++)
1543                         IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), random[i]);
1544
1545                 mrqc = IXGBE_MRQC_RSSEN
1546                     /* Perform hash on these packet types */
1547                     | IXGBE_MRQC_RSS_FIELD_IPV4
1548                     | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
1549                     | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
1550                     | IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP
1551                     | IXGBE_MRQC_RSS_FIELD_IPV6_EX
1552                     | IXGBE_MRQC_RSS_FIELD_IPV6
1553                     | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
1554                     | IXGBE_MRQC_RSS_FIELD_IPV6_UDP
1555                     | IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP;
1556                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
1557         }
1558
1559         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
1560
1561         if (adapter->flags & IXGBE_FLAG_RSS_ENABLED ||
1562             adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED) {
1563                 /* Disable indicating checksum in descriptor, enables
1564                  * RSS hash */
1565                 rxcsum |= IXGBE_RXCSUM_PCSD;
1566         }
1567         if (!(rxcsum & IXGBE_RXCSUM_PCSD)) {
1568                 /* Enable IPv4 payload checksum for UDP fragments
1569                  * if PCSD is not set */
1570                 rxcsum |= IXGBE_RXCSUM_IPPCSE;
1571         }
1572
1573         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
1574 }
1575
1576 static void ixgbe_vlan_rx_register(struct net_device *netdev,
1577                                    struct vlan_group *grp)
1578 {
1579         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1580         u32 ctrl;
1581
1582         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1583                 ixgbe_irq_disable(adapter);
1584         adapter->vlgrp = grp;
1585
1586         if (grp) {
1587                 /* enable VLAN tag insert/strip */
1588                 ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL);
1589                 ctrl |= IXGBE_VLNCTRL_VME | IXGBE_VLNCTRL_VFE;
1590                 ctrl &= ~IXGBE_VLNCTRL_CFIEN;
1591                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl);
1592         }
1593
1594         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1595                 ixgbe_irq_enable(adapter);
1596 }
1597
1598 static void ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1599 {
1600         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1601
1602         /* add VID to filter table */
1603         ixgbe_set_vfta(&adapter->hw, vid, 0, true);
1604 }
1605
1606 static void ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1607 {
1608         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1609
1610         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1611                 ixgbe_irq_disable(adapter);
1612
1613         vlan_group_set_device(adapter->vlgrp, vid, NULL);
1614
1615         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1616                 ixgbe_irq_enable(adapter);
1617
1618         /* remove VID from filter table */
1619         ixgbe_set_vfta(&adapter->hw, vid, 0, false);
1620 }
1621
1622 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
1623 {
1624         ixgbe_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1625
1626         if (adapter->vlgrp) {
1627                 u16 vid;
1628                 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1629                         if (!vlan_group_get_device(adapter->vlgrp, vid))
1630                                 continue;
1631                         ixgbe_vlan_rx_add_vid(adapter->netdev, vid);
1632                 }
1633         }
1634 }
1635
1636 /**
1637  * ixgbe_set_multi - Multicast and Promiscuous mode set
1638  * @netdev: network interface device structure
1639  *
1640  * The set_multi entry point is called whenever the multicast address
1641  * list or the network interface flags are updated.  This routine is
1642  * responsible for configuring the hardware for proper multicast,
1643  * promiscuous mode, and all-multi behavior.
1644  **/
1645 static void ixgbe_set_multi(struct net_device *netdev)
1646 {
1647         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1648         struct ixgbe_hw *hw = &adapter->hw;
1649         struct dev_mc_list *mc_ptr;
1650         u8 *mta_list;
1651         u32 fctrl;
1652         int i;
1653
1654         /* Check for Promiscuous and All Multicast modes */
1655
1656         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1657
1658         if (netdev->flags & IFF_PROMISC) {
1659                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1660         } else if (netdev->flags & IFF_ALLMULTI) {
1661                 fctrl |= IXGBE_FCTRL_MPE;
1662                 fctrl &= ~IXGBE_FCTRL_UPE;
1663         } else {
1664                 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1665         }
1666
1667         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
1668
1669         if (netdev->mc_count) {
1670                 mta_list = kcalloc(netdev->mc_count, ETH_ALEN, GFP_ATOMIC);
1671                 if (!mta_list)
1672                         return;
1673
1674                 /* Shared function expects packed array of only addresses. */
1675                 mc_ptr = netdev->mc_list;
1676
1677                 for (i = 0; i < netdev->mc_count; i++) {
1678                         if (!mc_ptr)
1679                                 break;
1680                         memcpy(mta_list + (i * ETH_ALEN), mc_ptr->dmi_addr,
1681                                ETH_ALEN);
1682                         mc_ptr = mc_ptr->next;
1683                 }
1684
1685                 ixgbe_update_mc_addr_list(hw, mta_list, i, 0);
1686                 kfree(mta_list);
1687         } else {
1688                 ixgbe_update_mc_addr_list(hw, NULL, 0, 0);
1689         }
1690
1691 }
1692
1693 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
1694 {
1695         int q_idx;
1696         struct ixgbe_q_vector *q_vector;
1697         int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1698
1699         /* legacy and MSI only use one vector */
1700         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1701                 q_vectors = 1;
1702
1703         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1704                 q_vector = &adapter->q_vector[q_idx];
1705                 if (!q_vector->rxr_count)
1706                         continue;
1707                 napi_enable(&q_vector->napi);
1708         }
1709 }
1710
1711 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
1712 {
1713         int q_idx;
1714         struct ixgbe_q_vector *q_vector;
1715         int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1716
1717         /* legacy and MSI only use one vector */
1718         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1719                 q_vectors = 1;
1720
1721         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1722                 q_vector = &adapter->q_vector[q_idx];
1723                 if (!q_vector->rxr_count)
1724                         continue;
1725                 napi_disable(&q_vector->napi);
1726         }
1727 }
1728
1729 static void ixgbe_configure(struct ixgbe_adapter *adapter)
1730 {
1731         struct net_device *netdev = adapter->netdev;
1732         int i;
1733
1734         ixgbe_set_multi(netdev);
1735
1736         ixgbe_restore_vlan(adapter);
1737
1738         ixgbe_configure_tx(adapter);
1739         ixgbe_configure_rx(adapter);
1740         for (i = 0; i < adapter->num_rx_queues; i++)
1741                 ixgbe_alloc_rx_buffers(adapter, &adapter->rx_ring[i],
1742                                            (adapter->rx_ring[i].count - 1));
1743 }
1744
1745 static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
1746 {
1747         struct net_device *netdev = adapter->netdev;
1748         struct ixgbe_hw *hw = &adapter->hw;
1749         int i, j = 0;
1750         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1751         u32 txdctl, rxdctl, mhadd;
1752         u32 gpie;
1753
1754         ixgbe_get_hw_control(adapter);
1755
1756         if ((adapter->flags & IXGBE_FLAG_MSIX_ENABLED) ||
1757             (adapter->flags & IXGBE_FLAG_MSI_ENABLED)) {
1758                 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1759                         gpie = (IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_EIAME |
1760                                 IXGBE_GPIE_PBA_SUPPORT | IXGBE_GPIE_OCD);
1761                 } else {
1762                         /* MSI only */
1763                         gpie = 0;
1764                 }
1765                 /* XXX: to interrupt immediately for EICS writes, enable this */
1766                 /* gpie |= IXGBE_GPIE_EIMEN; */
1767                 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
1768         }
1769
1770         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
1771                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
1772                  * specifically only auto mask tx and rx interrupts */
1773                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
1774         }
1775
1776         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
1777         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
1778                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
1779                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
1780
1781                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
1782         }
1783
1784         for (i = 0; i < adapter->num_tx_queues; i++) {
1785                 j = adapter->tx_ring[i].reg_idx;
1786                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
1787                 txdctl |= IXGBE_TXDCTL_ENABLE;
1788                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
1789         }
1790
1791         for (i = 0; i < adapter->num_rx_queues; i++) {
1792                 j = adapter->rx_ring[i].reg_idx;
1793                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
1794                 /* enable PTHRESH=32 descriptors (half the internal cache)
1795                  * and HTHRESH=0 descriptors (to minimize latency on fetch),
1796                  * this also removes a pesky rx_no_buffer_count increment */
1797                 rxdctl |= 0x0020;
1798                 rxdctl |= IXGBE_RXDCTL_ENABLE;
1799                 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), rxdctl);
1800         }
1801         /* enable all receives */
1802         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1803         rxdctl |= (IXGBE_RXCTRL_DMBYPS | IXGBE_RXCTRL_RXEN);
1804         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxdctl);
1805
1806         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
1807                 ixgbe_configure_msix(adapter);
1808         else
1809                 ixgbe_configure_msi_and_legacy(adapter);
1810
1811         clear_bit(__IXGBE_DOWN, &adapter->state);
1812         ixgbe_napi_enable_all(adapter);
1813
1814         /* clear any pending interrupts, may auto mask */
1815         IXGBE_READ_REG(hw, IXGBE_EICR);
1816
1817         ixgbe_irq_enable(adapter);
1818
1819         /* bring the link up in the watchdog, this could race with our first
1820          * link up interrupt but shouldn't be a problem */
1821         mod_timer(&adapter->watchdog_timer, jiffies);
1822         return 0;
1823 }
1824
1825 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
1826 {
1827         WARN_ON(in_interrupt());
1828         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
1829                 msleep(1);
1830         ixgbe_down(adapter);
1831         ixgbe_up(adapter);
1832         clear_bit(__IXGBE_RESETTING, &adapter->state);
1833 }
1834
1835 int ixgbe_up(struct ixgbe_adapter *adapter)
1836 {
1837         /* hardware has been reset, we need to reload some things */
1838         ixgbe_configure(adapter);
1839
1840         return ixgbe_up_complete(adapter);
1841 }
1842
1843 void ixgbe_reset(struct ixgbe_adapter *adapter)
1844 {
1845         if (ixgbe_init_hw(&adapter->hw))
1846                 DPRINTK(PROBE, ERR, "Hardware Error\n");
1847
1848         /* reprogram the RAR[0] in case user changed it. */
1849         ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV);
1850
1851 }
1852
1853 #ifdef CONFIG_PM
1854 static int ixgbe_resume(struct pci_dev *pdev)
1855 {
1856         struct net_device *netdev = pci_get_drvdata(pdev);
1857         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1858         u32 err;
1859
1860         pci_set_power_state(pdev, PCI_D0);
1861         pci_restore_state(pdev);
1862         err = pci_enable_device(pdev);
1863         if (err) {
1864                 printk(KERN_ERR "ixgbe: Cannot enable PCI device from " \
1865                                 "suspend\n");
1866                 return err;
1867         }
1868         pci_set_master(pdev);
1869
1870         pci_enable_wake(pdev, PCI_D3hot, 0);
1871         pci_enable_wake(pdev, PCI_D3cold, 0);
1872
1873         if (netif_running(netdev)) {
1874                 err = ixgbe_request_irq(adapter);
1875                 if (err)
1876                         return err;
1877         }
1878
1879         ixgbe_reset(adapter);
1880
1881         if (netif_running(netdev))
1882                 ixgbe_up(adapter);
1883
1884         netif_device_attach(netdev);
1885
1886         return 0;
1887 }
1888 #endif
1889
1890 /**
1891  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
1892  * @adapter: board private structure
1893  * @rx_ring: ring to free buffers from
1894  **/
1895 static void ixgbe_clean_rx_ring(struct ixgbe_adapter *adapter,
1896                                 struct ixgbe_ring *rx_ring)
1897 {
1898         struct pci_dev *pdev = adapter->pdev;
1899         unsigned long size;
1900         unsigned int i;
1901
1902         /* Free all the Rx ring sk_buffs */
1903
1904         for (i = 0; i < rx_ring->count; i++) {
1905                 struct ixgbe_rx_buffer *rx_buffer_info;
1906
1907                 rx_buffer_info = &rx_ring->rx_buffer_info[i];
1908                 if (rx_buffer_info->dma) {
1909                         pci_unmap_single(pdev, rx_buffer_info->dma,
1910                                          adapter->rx_buf_len,
1911                                          PCI_DMA_FROMDEVICE);
1912                         rx_buffer_info->dma = 0;
1913                 }
1914                 if (rx_buffer_info->skb) {
1915                         dev_kfree_skb(rx_buffer_info->skb);
1916                         rx_buffer_info->skb = NULL;
1917                 }
1918                 if (!rx_buffer_info->page)
1919                         continue;
1920                 pci_unmap_page(pdev, rx_buffer_info->page_dma, PAGE_SIZE,
1921                                PCI_DMA_FROMDEVICE);
1922                 rx_buffer_info->page_dma = 0;
1923
1924                 put_page(rx_buffer_info->page);
1925                 rx_buffer_info->page = NULL;
1926         }
1927
1928         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
1929         memset(rx_ring->rx_buffer_info, 0, size);
1930
1931         /* Zero out the descriptor ring */
1932         memset(rx_ring->desc, 0, rx_ring->size);
1933
1934         rx_ring->next_to_clean = 0;
1935         rx_ring->next_to_use = 0;
1936
1937         writel(0, adapter->hw.hw_addr + rx_ring->head);
1938         writel(0, adapter->hw.hw_addr + rx_ring->tail);
1939 }
1940
1941 /**
1942  * ixgbe_clean_tx_ring - Free Tx Buffers
1943  * @adapter: board private structure
1944  * @tx_ring: ring to be cleaned
1945  **/
1946 static void ixgbe_clean_tx_ring(struct ixgbe_adapter *adapter,
1947                                 struct ixgbe_ring *tx_ring)
1948 {
1949         struct ixgbe_tx_buffer *tx_buffer_info;
1950         unsigned long size;
1951         unsigned int i;
1952
1953         /* Free all the Tx ring sk_buffs */
1954
1955         for (i = 0; i < tx_ring->count; i++) {
1956                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
1957                 ixgbe_unmap_and_free_tx_resource(adapter, tx_buffer_info);
1958         }
1959
1960         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
1961         memset(tx_ring->tx_buffer_info, 0, size);
1962
1963         /* Zero out the descriptor ring */
1964         memset(tx_ring->desc, 0, tx_ring->size);
1965
1966         tx_ring->next_to_use = 0;
1967         tx_ring->next_to_clean = 0;
1968
1969         writel(0, adapter->hw.hw_addr + tx_ring->head);
1970         writel(0, adapter->hw.hw_addr + tx_ring->tail);
1971 }
1972
1973 /**
1974  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
1975  * @adapter: board private structure
1976  **/
1977 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
1978 {
1979         int i;
1980
1981         for (i = 0; i < adapter->num_rx_queues; i++)
1982                 ixgbe_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1983 }
1984
1985 /**
1986  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
1987  * @adapter: board private structure
1988  **/
1989 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
1990 {
1991         int i;
1992
1993         for (i = 0; i < adapter->num_tx_queues; i++)
1994                 ixgbe_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1995 }
1996
1997 void ixgbe_down(struct ixgbe_adapter *adapter)
1998 {
1999         struct net_device *netdev = adapter->netdev;
2000         u32 rxctrl;
2001
2002         /* signal that we are down to the interrupt handler */
2003         set_bit(__IXGBE_DOWN, &adapter->state);
2004
2005         /* disable receives */
2006         rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);
2007         IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL,
2008                         rxctrl & ~IXGBE_RXCTRL_RXEN);
2009
2010         netif_tx_disable(netdev);
2011
2012         /* disable transmits in the hardware */
2013
2014         /* flush both disables */
2015         IXGBE_WRITE_FLUSH(&adapter->hw);
2016         msleep(10);
2017
2018         ixgbe_irq_disable(adapter);
2019
2020         ixgbe_napi_disable_all(adapter);
2021         del_timer_sync(&adapter->watchdog_timer);
2022
2023         netif_carrier_off(netdev);
2024         netif_stop_queue(netdev);
2025
2026         if (!pci_channel_offline(adapter->pdev))
2027                 ixgbe_reset(adapter);
2028         ixgbe_clean_all_tx_rings(adapter);
2029         ixgbe_clean_all_rx_rings(adapter);
2030
2031 }
2032
2033 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
2034 {
2035         struct net_device *netdev = pci_get_drvdata(pdev);
2036         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2037 #ifdef CONFIG_PM
2038         int retval = 0;
2039 #endif
2040
2041         netif_device_detach(netdev);
2042
2043         if (netif_running(netdev)) {
2044                 ixgbe_down(adapter);
2045                 ixgbe_free_irq(adapter);
2046         }
2047
2048 #ifdef CONFIG_PM
2049         retval = pci_save_state(pdev);
2050         if (retval)
2051                 return retval;
2052 #endif
2053
2054         pci_enable_wake(pdev, PCI_D3hot, 0);
2055         pci_enable_wake(pdev, PCI_D3cold, 0);
2056
2057         ixgbe_release_hw_control(adapter);
2058
2059         pci_disable_device(pdev);
2060
2061         pci_set_power_state(pdev, pci_choose_state(pdev, state));
2062
2063         return 0;
2064 }
2065
2066 static void ixgbe_shutdown(struct pci_dev *pdev)
2067 {
2068         ixgbe_suspend(pdev, PMSG_SUSPEND);
2069 }
2070
2071 /**
2072  * ixgbe_poll - NAPI Rx polling callback
2073  * @napi: structure for representing this polling device
2074  * @budget: how many packets driver is allowed to clean
2075  *
2076  * This function is used for legacy and MSI, NAPI mode
2077  **/
2078 static int ixgbe_poll(struct napi_struct *napi, int budget)
2079 {
2080         struct ixgbe_q_vector *q_vector = container_of(napi,
2081                                           struct ixgbe_q_vector, napi);
2082         struct ixgbe_adapter *adapter = q_vector->adapter;
2083         int tx_cleaned = 0, work_done = 0;
2084
2085 #ifdef CONFIG_DCA
2086         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
2087                 ixgbe_update_tx_dca(adapter, adapter->tx_ring);
2088                 ixgbe_update_rx_dca(adapter, adapter->rx_ring);
2089         }
2090 #endif
2091
2092         tx_cleaned = ixgbe_clean_tx_irq(adapter, adapter->tx_ring);
2093         ixgbe_clean_rx_irq(adapter, adapter->rx_ring, &work_done, budget);
2094
2095         if (tx_cleaned)
2096                 work_done = budget;
2097
2098         /* If budget not fully consumed, exit the polling mode */
2099         if (work_done < budget) {
2100                 netif_rx_complete(adapter->netdev, napi);
2101                 if (adapter->rx_eitr < IXGBE_MIN_ITR_USECS)
2102                         ixgbe_set_itr(adapter);
2103                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2104                         ixgbe_irq_enable(adapter);
2105         }
2106
2107         return work_done;
2108 }
2109
2110 /**
2111  * ixgbe_tx_timeout - Respond to a Tx Hang
2112  * @netdev: network interface device structure
2113  **/
2114 static void ixgbe_tx_timeout(struct net_device *netdev)
2115 {
2116         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2117
2118         /* Do the reset outside of interrupt context */
2119         schedule_work(&adapter->reset_task);
2120 }
2121
2122 static void ixgbe_reset_task(struct work_struct *work)
2123 {
2124         struct ixgbe_adapter *adapter;
2125         adapter = container_of(work, struct ixgbe_adapter, reset_task);
2126
2127         adapter->tx_timeout_count++;
2128
2129         ixgbe_reinit_locked(adapter);
2130 }
2131
2132 static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter *adapter,
2133                                        int vectors)
2134 {
2135         int err, vector_threshold;
2136
2137         /* We'll want at least 3 (vector_threshold):
2138          * 1) TxQ[0] Cleanup
2139          * 2) RxQ[0] Cleanup
2140          * 3) Other (Link Status Change, etc.)
2141          * 4) TCP Timer (optional)
2142          */
2143         vector_threshold = MIN_MSIX_COUNT;
2144
2145         /* The more we get, the more we will assign to Tx/Rx Cleanup
2146          * for the separate queues...where Rx Cleanup >= Tx Cleanup.
2147          * Right now, we simply care about how many we'll get; we'll
2148          * set them up later while requesting irq's.
2149          */
2150         while (vectors >= vector_threshold) {
2151                 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
2152                                       vectors);
2153                 if (!err) /* Success in acquiring all requested vectors. */
2154                         break;
2155                 else if (err < 0)
2156                         vectors = 0; /* Nasty failure, quit now */
2157                 else /* err == number of vectors we should try again with */
2158                         vectors = err;
2159         }
2160
2161         if (vectors < vector_threshold) {
2162                 /* Can't allocate enough MSI-X interrupts?  Oh well.
2163                  * This just means we'll go with either a single MSI
2164                  * vector or fall back to legacy interrupts.
2165                  */
2166                 DPRINTK(HW, DEBUG, "Unable to allocate MSI-X interrupts\n");
2167                 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2168                 kfree(adapter->msix_entries);
2169                 adapter->msix_entries = NULL;
2170                 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2171                 adapter->num_tx_queues = 1;
2172                 adapter->num_rx_queues = 1;
2173         } else {
2174                 adapter->flags |= IXGBE_FLAG_MSIX_ENABLED; /* Woot! */
2175                 adapter->num_msix_vectors = vectors;
2176         }
2177 }
2178
2179 static void __devinit ixgbe_set_num_queues(struct ixgbe_adapter *adapter)
2180 {
2181         int nrq, ntq;
2182         int feature_mask = 0, rss_i, rss_m;
2183
2184         /* Number of supported queues */
2185         switch (adapter->hw.mac.type) {
2186         case ixgbe_mac_82598EB:
2187                 rss_i = adapter->ring_feature[RING_F_RSS].indices;
2188                 rss_m = 0;
2189                 feature_mask |= IXGBE_FLAG_RSS_ENABLED;
2190
2191                 switch (adapter->flags & feature_mask) {
2192                 case (IXGBE_FLAG_RSS_ENABLED):
2193                         rss_m = 0xF;
2194                         nrq = rss_i;
2195 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2196                         ntq = rss_i;
2197 #else
2198                         ntq = 1;
2199 #endif
2200                         break;
2201                 case 0:
2202                 default:
2203                         rss_i = 0;
2204                         rss_m = 0;
2205                         nrq = 1;
2206                         ntq = 1;
2207                         break;
2208                 }
2209
2210                 adapter->ring_feature[RING_F_RSS].indices = rss_i;
2211                 adapter->ring_feature[RING_F_RSS].mask = rss_m;
2212                 break;
2213         default:
2214                 nrq = 1;
2215                 ntq = 1;
2216                 break;
2217         }
2218
2219         adapter->num_rx_queues = nrq;
2220         adapter->num_tx_queues = ntq;
2221 }
2222
2223 /**
2224  * ixgbe_cache_ring_register - Descriptor ring to register mapping
2225  * @adapter: board private structure to initialize
2226  *
2227  * Once we know the feature-set enabled for the device, we'll cache
2228  * the register offset the descriptor ring is assigned to.
2229  **/
2230 static void __devinit ixgbe_cache_ring_register(struct ixgbe_adapter *adapter)
2231 {
2232         /* TODO: Remove all uses of the indices in the cases where multiple
2233          *       features are OR'd together, if the feature set makes sense.
2234          */
2235         int feature_mask = 0, rss_i;
2236         int i, txr_idx, rxr_idx;
2237
2238         /* Number of supported queues */
2239         switch (adapter->hw.mac.type) {
2240         case ixgbe_mac_82598EB:
2241                 rss_i = adapter->ring_feature[RING_F_RSS].indices;
2242                 txr_idx = 0;
2243                 rxr_idx = 0;
2244                 feature_mask |= IXGBE_FLAG_RSS_ENABLED;
2245                 switch (adapter->flags & feature_mask) {
2246                 case (IXGBE_FLAG_RSS_ENABLED):
2247                         for (i = 0; i < adapter->num_rx_queues; i++)
2248                                 adapter->rx_ring[i].reg_idx = i;
2249                         for (i = 0; i < adapter->num_tx_queues; i++)
2250                                 adapter->tx_ring[i].reg_idx = i;
2251                         break;
2252                 case 0:
2253                 default:
2254                         break;
2255                 }
2256                 break;
2257         default:
2258                 break;
2259         }
2260 }
2261
2262 /**
2263  * ixgbe_alloc_queues - Allocate memory for all rings
2264  * @adapter: board private structure to initialize
2265  *
2266  * We allocate one ring per queue at run-time since we don't know the
2267  * number of queues at compile-time.  The polling_netdev array is
2268  * intended for Multiqueue, but should work fine with a single queue.
2269  **/
2270 static int __devinit ixgbe_alloc_queues(struct ixgbe_adapter *adapter)
2271 {
2272         int i;
2273
2274         adapter->tx_ring = kcalloc(adapter->num_tx_queues,
2275                                    sizeof(struct ixgbe_ring), GFP_KERNEL);
2276         if (!adapter->tx_ring)
2277                 goto err_tx_ring_allocation;
2278
2279         adapter->rx_ring = kcalloc(adapter->num_rx_queues,
2280                                    sizeof(struct ixgbe_ring), GFP_KERNEL);
2281         if (!adapter->rx_ring)
2282                 goto err_rx_ring_allocation;
2283
2284         for (i = 0; i < adapter->num_tx_queues; i++) {
2285                 adapter->tx_ring[i].count = IXGBE_DEFAULT_TXD;
2286                 adapter->tx_ring[i].queue_index = i;
2287         }
2288         for (i = 0; i < adapter->num_rx_queues; i++) {
2289                 adapter->rx_ring[i].count = IXGBE_DEFAULT_RXD;
2290                 adapter->rx_ring[i].queue_index = i;
2291         }
2292
2293         ixgbe_cache_ring_register(adapter);
2294
2295         return 0;
2296
2297 err_rx_ring_allocation:
2298         kfree(adapter->tx_ring);
2299 err_tx_ring_allocation:
2300         return -ENOMEM;
2301 }
2302
2303 /**
2304  * ixgbe_set_interrupt_capability - set MSI-X or MSI if supported
2305  * @adapter: board private structure to initialize
2306  *
2307  * Attempt to configure the interrupts using the best available
2308  * capabilities of the hardware and the kernel.
2309  **/
2310 static int __devinit ixgbe_set_interrupt_capability(struct ixgbe_adapter
2311                                                     *adapter)
2312 {
2313         int err = 0;
2314         int vector, v_budget;
2315
2316         /*
2317          * It's easy to be greedy for MSI-X vectors, but it really
2318          * doesn't do us much good if we have a lot more vectors
2319          * than CPU's.  So let's be conservative and only ask for
2320          * (roughly) twice the number of vectors as there are CPU's.
2321          */
2322         v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues,
2323                        (int)(num_online_cpus() * 2)) + NON_Q_VECTORS;
2324
2325         /*
2326          * At the same time, hardware can only support a maximum of
2327          * MAX_MSIX_COUNT vectors.  With features such as RSS and VMDq,
2328          * we can easily reach upwards of 64 Rx descriptor queues and
2329          * 32 Tx queues.  Thus, we cap it off in those rare cases where
2330          * the cpu count also exceeds our vector limit.
2331          */
2332         v_budget = min(v_budget, MAX_MSIX_COUNT);
2333
2334         /* A failure in MSI-X entry allocation isn't fatal, but it does
2335          * mean we disable MSI-X capabilities of the adapter. */
2336         adapter->msix_entries = kcalloc(v_budget,
2337                                         sizeof(struct msix_entry), GFP_KERNEL);
2338         if (!adapter->msix_entries) {
2339                 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2340                 ixgbe_set_num_queues(adapter);
2341                 kfree(adapter->tx_ring);
2342                 kfree(adapter->rx_ring);
2343                 err = ixgbe_alloc_queues(adapter);
2344                 if (err) {
2345                         DPRINTK(PROBE, ERR, "Unable to allocate memory "
2346                                             "for queues\n");
2347                         goto out;
2348                 }
2349
2350                 goto try_msi;
2351         }
2352
2353         for (vector = 0; vector < v_budget; vector++)
2354                 adapter->msix_entries[vector].entry = vector;
2355
2356         ixgbe_acquire_msix_vectors(adapter, v_budget);
2357
2358         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2359                 goto out;
2360
2361 try_msi:
2362         err = pci_enable_msi(adapter->pdev);
2363         if (!err) {
2364                 adapter->flags |= IXGBE_FLAG_MSI_ENABLED;
2365         } else {
2366                 DPRINTK(HW, DEBUG, "Unable to allocate MSI interrupt, "
2367                                    "falling back to legacy.  Error: %d\n", err);
2368                 /* reset err */
2369                 err = 0;
2370         }
2371
2372 out:
2373 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2374         /* Notify the stack of the (possibly) reduced Tx Queue count. */
2375         adapter->netdev->egress_subqueue_count = adapter->num_tx_queues;
2376 #endif
2377
2378         return err;
2379 }
2380
2381 static void ixgbe_reset_interrupt_capability(struct ixgbe_adapter *adapter)
2382 {
2383         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2384                 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2385                 pci_disable_msix(adapter->pdev);
2386                 kfree(adapter->msix_entries);
2387                 adapter->msix_entries = NULL;
2388         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
2389                 adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED;
2390                 pci_disable_msi(adapter->pdev);
2391         }
2392         return;
2393 }
2394
2395 /**
2396  * ixgbe_init_interrupt_scheme - Determine proper interrupt scheme
2397  * @adapter: board private structure to initialize
2398  *
2399  * We determine which interrupt scheme to use based on...
2400  * - Kernel support (MSI, MSI-X)
2401  *   - which can be user-defined (via MODULE_PARAM)
2402  * - Hardware queue count (num_*_queues)
2403  *   - defined by miscellaneous hardware support/features (RSS, etc.)
2404  **/
2405 static int __devinit ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter)
2406 {
2407         int err;
2408
2409         /* Number of supported queues */
2410         ixgbe_set_num_queues(adapter);
2411
2412         err = ixgbe_alloc_queues(adapter);
2413         if (err) {
2414                 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
2415                 goto err_alloc_queues;
2416         }
2417
2418         err = ixgbe_set_interrupt_capability(adapter);
2419         if (err) {
2420                 DPRINTK(PROBE, ERR, "Unable to setup interrupt capabilities\n");
2421                 goto err_set_interrupt;
2422         }
2423
2424         DPRINTK(DRV, INFO, "Multiqueue %s: Rx Queue count = %u, "
2425                            "Tx Queue count = %u\n",
2426                 (adapter->num_rx_queues > 1) ? "Enabled" :
2427                 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2428
2429         set_bit(__IXGBE_DOWN, &adapter->state);
2430
2431         return 0;
2432
2433 err_set_interrupt:
2434         kfree(adapter->tx_ring);
2435         kfree(adapter->rx_ring);
2436 err_alloc_queues:
2437         return err;
2438 }
2439
2440 /**
2441  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
2442  * @adapter: board private structure to initialize
2443  *
2444  * ixgbe_sw_init initializes the Adapter private data structure.
2445  * Fields are initialized based on PCI device information and
2446  * OS network device settings (MTU size).
2447  **/
2448 static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
2449 {
2450         struct ixgbe_hw *hw = &adapter->hw;
2451         struct pci_dev *pdev = adapter->pdev;
2452         unsigned int rss;
2453
2454         /* Set capability flags */
2455         rss = min(IXGBE_MAX_RSS_INDICES, (int)num_online_cpus());
2456         adapter->ring_feature[RING_F_RSS].indices = rss;
2457         adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
2458
2459         /* Enable Dynamic interrupt throttling by default */
2460         adapter->rx_eitr = 1;
2461         adapter->tx_eitr = 1;
2462
2463         /* default flow control settings */
2464         hw->fc.original_type = ixgbe_fc_full;
2465         hw->fc.type = ixgbe_fc_full;
2466
2467         /* select 10G link by default */
2468         hw->mac.link_mode_select = IXGBE_AUTOC_LMS_10G_LINK_NO_AN;
2469         if (hw->mac.ops.reset(hw)) {
2470                 dev_err(&pdev->dev, "HW Init failed\n");
2471                 return -EIO;
2472         }
2473         if (hw->mac.ops.setup_link_speed(hw, IXGBE_LINK_SPEED_10GB_FULL, true,
2474                                          false)) {
2475                 dev_err(&pdev->dev, "Link Speed setup failed\n");
2476                 return -EIO;
2477         }
2478
2479         /* initialize eeprom parameters */
2480         if (ixgbe_init_eeprom(hw)) {
2481                 dev_err(&pdev->dev, "EEPROM initialization failed\n");
2482                 return -EIO;
2483         }
2484
2485         /* enable rx csum by default */
2486         adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
2487
2488         set_bit(__IXGBE_DOWN, &adapter->state);
2489
2490         return 0;
2491 }
2492
2493 /**
2494  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
2495  * @adapter: board private structure
2496  * @txdr:    tx descriptor ring (for a specific queue) to setup
2497  *
2498  * Return 0 on success, negative on failure
2499  **/
2500 int ixgbe_setup_tx_resources(struct ixgbe_adapter *adapter,
2501                              struct ixgbe_ring *txdr)
2502 {
2503         struct pci_dev *pdev = adapter->pdev;
2504         int size;
2505
2506         size = sizeof(struct ixgbe_tx_buffer) * txdr->count;
2507         txdr->tx_buffer_info = vmalloc(size);
2508         if (!txdr->tx_buffer_info) {
2509                 DPRINTK(PROBE, ERR,
2510                 "Unable to allocate memory for the transmit descriptor ring\n");
2511                 return -ENOMEM;
2512         }
2513         memset(txdr->tx_buffer_info, 0, size);
2514
2515         /* round up to nearest 4K */
2516         txdr->size = txdr->count * sizeof(union ixgbe_adv_tx_desc);
2517         txdr->size = ALIGN(txdr->size, 4096);
2518
2519         txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2520         if (!txdr->desc) {
2521                 vfree(txdr->tx_buffer_info);
2522                 DPRINTK(PROBE, ERR,
2523                         "Memory allocation failed for the tx desc ring\n");
2524                 return -ENOMEM;
2525         }
2526
2527         txdr->next_to_use = 0;
2528         txdr->next_to_clean = 0;
2529         txdr->work_limit = txdr->count;
2530
2531         return 0;
2532 }
2533
2534 /**
2535  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
2536  * @adapter: board private structure
2537  * @rxdr:    rx descriptor ring (for a specific queue) to setup
2538  *
2539  * Returns 0 on success, negative on failure
2540  **/
2541 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
2542                              struct ixgbe_ring *rxdr)
2543 {
2544         struct pci_dev *pdev = adapter->pdev;
2545         int size;
2546
2547         size = sizeof(struct net_lro_desc) * IXGBE_MAX_LRO_DESCRIPTORS;
2548         rxdr->lro_mgr.lro_arr = vmalloc(size);
2549         if (!rxdr->lro_mgr.lro_arr)
2550                 return -ENOMEM;
2551         memset(rxdr->lro_mgr.lro_arr, 0, size);
2552
2553         size = sizeof(struct ixgbe_rx_buffer) * rxdr->count;
2554         rxdr->rx_buffer_info = vmalloc(size);
2555         if (!rxdr->rx_buffer_info) {
2556                 DPRINTK(PROBE, ERR,
2557                         "vmalloc allocation failed for the rx desc ring\n");
2558                 goto alloc_failed;
2559         }
2560         memset(rxdr->rx_buffer_info, 0, size);
2561
2562         /* Round up to nearest 4K */
2563         rxdr->size = rxdr->count * sizeof(union ixgbe_adv_rx_desc);
2564         rxdr->size = ALIGN(rxdr->size, 4096);
2565
2566         rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2567
2568         if (!rxdr->desc) {
2569                 DPRINTK(PROBE, ERR,
2570                         "Memory allocation failed for the rx desc ring\n");
2571                 vfree(rxdr->rx_buffer_info);
2572                 goto alloc_failed;
2573         }
2574
2575         rxdr->next_to_clean = 0;
2576         rxdr->next_to_use = 0;
2577
2578         return 0;
2579
2580 alloc_failed:
2581         vfree(rxdr->lro_mgr.lro_arr);
2582         rxdr->lro_mgr.lro_arr = NULL;
2583         return -ENOMEM;
2584 }
2585
2586 /**
2587  * ixgbe_free_tx_resources - Free Tx Resources per Queue
2588  * @adapter: board private structure
2589  * @tx_ring: Tx descriptor ring for a specific queue
2590  *
2591  * Free all transmit software resources
2592  **/
2593 static void ixgbe_free_tx_resources(struct ixgbe_adapter *adapter,
2594                                     struct ixgbe_ring *tx_ring)
2595 {
2596         struct pci_dev *pdev = adapter->pdev;
2597
2598         ixgbe_clean_tx_ring(adapter, tx_ring);
2599
2600         vfree(tx_ring->tx_buffer_info);
2601         tx_ring->tx_buffer_info = NULL;
2602
2603         pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2604
2605         tx_ring->desc = NULL;
2606 }
2607
2608 /**
2609  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
2610  * @adapter: board private structure
2611  *
2612  * Free all transmit software resources
2613  **/
2614 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
2615 {
2616         int i;
2617
2618         for (i = 0; i < adapter->num_tx_queues; i++)
2619                 ixgbe_free_tx_resources(adapter, &adapter->tx_ring[i]);
2620 }
2621
2622 /**
2623  * ixgbe_free_rx_resources - Free Rx Resources
2624  * @adapter: board private structure
2625  * @rx_ring: ring to clean the resources from
2626  *
2627  * Free all receive software resources
2628  **/
2629 static void ixgbe_free_rx_resources(struct ixgbe_adapter *adapter,
2630                                     struct ixgbe_ring *rx_ring)
2631 {
2632         struct pci_dev *pdev = adapter->pdev;
2633
2634         vfree(rx_ring->lro_mgr.lro_arr);
2635         rx_ring->lro_mgr.lro_arr = NULL;
2636
2637         ixgbe_clean_rx_ring(adapter, rx_ring);
2638
2639         vfree(rx_ring->rx_buffer_info);
2640         rx_ring->rx_buffer_info = NULL;
2641
2642         pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2643
2644         rx_ring->desc = NULL;
2645 }
2646
2647 /**
2648  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
2649  * @adapter: board private structure
2650  *
2651  * Free all receive software resources
2652  **/
2653 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
2654 {
2655         int i;
2656
2657         for (i = 0; i < adapter->num_rx_queues; i++)
2658                 ixgbe_free_rx_resources(adapter, &adapter->rx_ring[i]);
2659 }
2660
2661 /**
2662  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
2663  * @adapter: board private structure
2664  *
2665  * If this function returns with an error, then it's possible one or
2666  * more of the rings is populated (while the rest are not).  It is the
2667  * callers duty to clean those orphaned rings.
2668  *
2669  * Return 0 on success, negative on failure
2670  **/
2671 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
2672 {
2673         int i, err = 0;
2674
2675         for (i = 0; i < adapter->num_tx_queues; i++) {
2676                 err = ixgbe_setup_tx_resources(adapter, &adapter->tx_ring[i]);
2677                 if (err) {
2678                         DPRINTK(PROBE, ERR,
2679                                 "Allocation for Tx Queue %u failed\n", i);
2680                         break;
2681                 }
2682         }
2683
2684         return err;
2685 }
2686
2687 /**
2688  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
2689  * @adapter: board private structure
2690  *
2691  * If this function returns with an error, then it's possible one or
2692  * more of the rings is populated (while the rest are not).  It is the
2693  * callers duty to clean those orphaned rings.
2694  *
2695  * Return 0 on success, negative on failure
2696  **/
2697
2698 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
2699 {
2700         int i, err = 0;
2701
2702         for (i = 0; i < adapter->num_rx_queues; i++) {
2703                 err = ixgbe_setup_rx_resources(adapter, &adapter->rx_ring[i]);
2704                 if (err) {
2705                         DPRINTK(PROBE, ERR,
2706                                 "Allocation for Rx Queue %u failed\n", i);
2707                         break;
2708                 }
2709         }
2710
2711         return err;
2712 }
2713
2714 /**
2715  * ixgbe_change_mtu - Change the Maximum Transfer Unit
2716  * @netdev: network interface device structure
2717  * @new_mtu: new value for maximum frame size
2718  *
2719  * Returns 0 on success, negative on failure
2720  **/
2721 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
2722 {
2723         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2724         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
2725
2726         if ((max_frame < (ETH_ZLEN + ETH_FCS_LEN)) ||
2727             (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
2728                 return -EINVAL;
2729
2730         DPRINTK(PROBE, INFO, "changing MTU from %d to %d\n",
2731                 netdev->mtu, new_mtu);
2732         /* must set new MTU before calling down or up */
2733         netdev->mtu = new_mtu;
2734
2735         if (netif_running(netdev))
2736                 ixgbe_reinit_locked(adapter);
2737
2738         return 0;
2739 }
2740
2741 /**
2742  * ixgbe_open - Called when a network interface is made active
2743  * @netdev: network interface device structure
2744  *
2745  * Returns 0 on success, negative value on failure
2746  *
2747  * The open entry point is called when a network interface is made
2748  * active by the system (IFF_UP).  At this point all resources needed
2749  * for transmit and receive operations are allocated, the interrupt
2750  * handler is registered with the OS, the watchdog timer is started,
2751  * and the stack is notified that the interface is ready.
2752  **/
2753 static int ixgbe_open(struct net_device *netdev)
2754 {
2755         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2756         int err;
2757
2758         /* disallow open during test */
2759         if (test_bit(__IXGBE_TESTING, &adapter->state))
2760                 return -EBUSY;
2761
2762         /* allocate transmit descriptors */
2763         err = ixgbe_setup_all_tx_resources(adapter);
2764         if (err)
2765                 goto err_setup_tx;
2766
2767         /* allocate receive descriptors */
2768         err = ixgbe_setup_all_rx_resources(adapter);
2769         if (err)
2770                 goto err_setup_rx;
2771
2772         ixgbe_configure(adapter);
2773
2774         err = ixgbe_request_irq(adapter);
2775         if (err)
2776                 goto err_req_irq;
2777
2778         err = ixgbe_up_complete(adapter);
2779         if (err)
2780                 goto err_up;
2781
2782         return 0;
2783
2784 err_up:
2785         ixgbe_release_hw_control(adapter);
2786         ixgbe_free_irq(adapter);
2787 err_req_irq:
2788         ixgbe_free_all_rx_resources(adapter);
2789 err_setup_rx:
2790         ixgbe_free_all_tx_resources(adapter);
2791 err_setup_tx:
2792         ixgbe_reset(adapter);
2793
2794         return err;
2795 }
2796
2797 /**
2798  * ixgbe_close - Disables a network interface
2799  * @netdev: network interface device structure
2800  *
2801  * Returns 0, this is not allowed to fail
2802  *
2803  * The close entry point is called when an interface is de-activated
2804  * by the OS.  The hardware is still under the drivers control, but
2805  * needs to be disabled.  A global MAC reset is issued to stop the
2806  * hardware, and all transmit and receive resources are freed.
2807  **/
2808 static int ixgbe_close(struct net_device *netdev)
2809 {
2810         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2811
2812         ixgbe_down(adapter);
2813         ixgbe_free_irq(adapter);
2814
2815         ixgbe_free_all_tx_resources(adapter);
2816         ixgbe_free_all_rx_resources(adapter);
2817
2818         ixgbe_release_hw_control(adapter);
2819
2820         return 0;
2821 }
2822
2823 /**
2824  * ixgbe_update_stats - Update the board statistics counters.
2825  * @adapter: board private structure
2826  **/
2827 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
2828 {
2829         struct ixgbe_hw *hw = &adapter->hw;
2830         u64 total_mpc = 0;
2831         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
2832
2833         adapter->stats.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
2834         for (i = 0; i < 8; i++) {
2835                 /* for packet buffers not used, the register should read 0 */
2836                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
2837                 missed_rx += mpc;
2838                 adapter->stats.mpc[i] += mpc;
2839                 total_mpc += adapter->stats.mpc[i];
2840                 adapter->stats.rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
2841         }
2842         adapter->stats.gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
2843         /* work around hardware counting issue */
2844         adapter->stats.gprc -= missed_rx;
2845
2846         /* 82598 hardware only has a 32 bit counter in the high register */
2847         adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
2848         adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
2849         adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORH);
2850         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
2851         adapter->stats.bprc += bprc;
2852         adapter->stats.mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
2853         adapter->stats.mprc -= bprc;
2854         adapter->stats.roc += IXGBE_READ_REG(hw, IXGBE_ROC);
2855         adapter->stats.prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
2856         adapter->stats.prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
2857         adapter->stats.prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
2858         adapter->stats.prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
2859         adapter->stats.prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
2860         adapter->stats.prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
2861         adapter->stats.rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
2862         adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
2863         adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
2864         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
2865         adapter->stats.lxontxc += lxon;
2866         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
2867         adapter->stats.lxofftxc += lxoff;
2868         adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
2869         adapter->stats.gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
2870         adapter->stats.mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
2871         /*
2872          * 82598 errata - tx of flow control packets is included in tx counters
2873          */
2874         xon_off_tot = lxon + lxoff;
2875         adapter->stats.gptc -= xon_off_tot;
2876         adapter->stats.mptc -= xon_off_tot;
2877         adapter->stats.gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
2878         adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
2879         adapter->stats.rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
2880         adapter->stats.rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
2881         adapter->stats.tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
2882         adapter->stats.ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
2883         adapter->stats.ptc64 -= xon_off_tot;
2884         adapter->stats.ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
2885         adapter->stats.ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
2886         adapter->stats.ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
2887         adapter->stats.ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
2888         adapter->stats.ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
2889         adapter->stats.bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
2890
2891         /* Fill out the OS statistics structure */
2892         adapter->net_stats.multicast = adapter->stats.mprc;
2893
2894         /* Rx Errors */
2895         adapter->net_stats.rx_errors = adapter->stats.crcerrs +
2896                                                 adapter->stats.rlec;
2897         adapter->net_stats.rx_dropped = 0;
2898         adapter->net_stats.rx_length_errors = adapter->stats.rlec;
2899         adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
2900         adapter->net_stats.rx_missed_errors = total_mpc;
2901 }
2902
2903 /**
2904  * ixgbe_watchdog - Timer Call-back
2905  * @data: pointer to adapter cast into an unsigned long
2906  **/
2907 static void ixgbe_watchdog(unsigned long data)
2908 {
2909         struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
2910         struct net_device *netdev = adapter->netdev;
2911         bool link_up;
2912         u32 link_speed = 0;
2913 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2914         int i;
2915 #endif
2916
2917         adapter->hw.mac.ops.check_link(&adapter->hw, &(link_speed), &link_up);
2918
2919         if (link_up) {
2920                 if (!netif_carrier_ok(netdev)) {
2921                         u32 frctl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
2922                         u32 rmcs = IXGBE_READ_REG(&adapter->hw, IXGBE_RMCS);
2923 #define FLOW_RX (frctl & IXGBE_FCTRL_RFCE)
2924 #define FLOW_TX (rmcs & IXGBE_RMCS_TFCE_802_3X)
2925                         DPRINTK(LINK, INFO, "NIC Link is Up %s, "
2926                                 "Flow Control: %s\n",
2927                                 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
2928                                  "10 Gbps" :
2929                                  (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
2930                                   "1 Gbps" : "unknown speed")),
2931                                 ((FLOW_RX && FLOW_TX) ? "RX/TX" :
2932                                  (FLOW_RX ? "RX" :
2933                                  (FLOW_TX ? "TX" : "None"))));
2934
2935                         netif_carrier_on(netdev);
2936                         netif_wake_queue(netdev);
2937 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2938                         for (i = 0; i < adapter->num_tx_queues; i++)
2939                                 netif_wake_subqueue(netdev, i);
2940 #endif
2941                 } else {
2942                         /* Force detection of hung controller */
2943                         adapter->detect_tx_hung = true;
2944                 }
2945         } else {
2946                 if (netif_carrier_ok(netdev)) {
2947                         DPRINTK(LINK, INFO, "NIC Link is Down\n");
2948                         netif_carrier_off(netdev);
2949                         netif_stop_queue(netdev);
2950                 }
2951         }
2952
2953         ixgbe_update_stats(adapter);
2954
2955         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2956                 /* Cause software interrupt to ensure rx rings are cleaned */
2957                 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2958                         u32 eics =
2959                          (1 << (adapter->num_msix_vectors - NON_Q_VECTORS)) - 1;
2960                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, eics);
2961                 } else {
2962                         /* for legacy and MSI interrupts don't set any bits that
2963                          * are enabled for EIAM, because this operation would
2964                          * set *both* EIMS and EICS for any bit in EIAM */
2965                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
2966                                      (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
2967                 }
2968                 /* Reset the timer */
2969                 mod_timer(&adapter->watchdog_timer,
2970                           round_jiffies(jiffies + 2 * HZ));
2971         }
2972 }
2973
2974 static int ixgbe_tso(struct ixgbe_adapter *adapter,
2975                          struct ixgbe_ring *tx_ring, struct sk_buff *skb,
2976                          u32 tx_flags, u8 *hdr_len)
2977 {
2978         struct ixgbe_adv_tx_context_desc *context_desc;
2979         unsigned int i;
2980         int err;
2981         struct ixgbe_tx_buffer *tx_buffer_info;
2982         u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
2983         u32 mss_l4len_idx = 0, l4len;
2984
2985         if (skb_is_gso(skb)) {
2986                 if (skb_header_cloned(skb)) {
2987                         err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2988                         if (err)
2989                                 return err;
2990                 }
2991                 l4len = tcp_hdrlen(skb);
2992                 *hdr_len += l4len;
2993
2994                 if (skb->protocol == htons(ETH_P_IP)) {
2995                         struct iphdr *iph = ip_hdr(skb);
2996                         iph->tot_len = 0;
2997                         iph->check = 0;
2998                         tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2999                                                                  iph->daddr, 0,
3000                                                                  IPPROTO_TCP,
3001                                                                  0);
3002                         adapter->hw_tso_ctxt++;
3003                 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
3004                         ipv6_hdr(skb)->payload_len = 0;
3005                         tcp_hdr(skb)->check =
3006                             ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3007                                              &ipv6_hdr(skb)->daddr,
3008                                              0, IPPROTO_TCP, 0);
3009                         adapter->hw_tso6_ctxt++;
3010                 }
3011
3012                 i = tx_ring->next_to_use;
3013
3014                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3015                 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
3016
3017                 /* VLAN MACLEN IPLEN */
3018                 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3019                         vlan_macip_lens |=
3020                             (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
3021                 vlan_macip_lens |= ((skb_network_offset(skb)) <<
3022                                     IXGBE_ADVTXD_MACLEN_SHIFT);
3023                 *hdr_len += skb_network_offset(skb);
3024                 vlan_macip_lens |=
3025                     (skb_transport_header(skb) - skb_network_header(skb));
3026                 *hdr_len +=
3027                     (skb_transport_header(skb) - skb_network_header(skb));
3028                 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3029                 context_desc->seqnum_seed = 0;
3030
3031                 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3032                 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
3033                                     IXGBE_ADVTXD_DTYP_CTXT);
3034
3035                 if (skb->protocol == htons(ETH_P_IP))
3036                         type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
3037                 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
3038                 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
3039
3040                 /* MSS L4LEN IDX */
3041                 mss_l4len_idx |=
3042                     (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
3043                 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
3044                 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
3045
3046                 tx_buffer_info->time_stamp = jiffies;
3047                 tx_buffer_info->next_to_watch = i;
3048
3049                 i++;
3050                 if (i == tx_ring->count)
3051                         i = 0;
3052                 tx_ring->next_to_use = i;
3053
3054                 return true;
3055         }
3056         return false;
3057 }
3058
3059 static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
3060                                    struct ixgbe_ring *tx_ring,
3061                                    struct sk_buff *skb, u32 tx_flags)
3062 {
3063         struct ixgbe_adv_tx_context_desc *context_desc;
3064         unsigned int i;
3065         struct ixgbe_tx_buffer *tx_buffer_info;
3066         u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
3067
3068         if (skb->ip_summed == CHECKSUM_PARTIAL ||
3069             (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
3070                 i = tx_ring->next_to_use;
3071                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3072                 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
3073
3074                 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3075                         vlan_macip_lens |=
3076                             (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
3077                 vlan_macip_lens |= (skb_network_offset(skb) <<
3078                                     IXGBE_ADVTXD_MACLEN_SHIFT);
3079                 if (skb->ip_summed == CHECKSUM_PARTIAL)
3080                         vlan_macip_lens |= (skb_transport_header(skb) -
3081                                             skb_network_header(skb));
3082
3083                 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3084                 context_desc->seqnum_seed = 0;
3085
3086                 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
3087                                     IXGBE_ADVTXD_DTYP_CTXT);
3088
3089                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
3090                         switch (skb->protocol) {
3091                         case __constant_htons(ETH_P_IP):
3092                                 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
3093                                 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
3094                                         type_tucmd_mlhl |=
3095                                                 IXGBE_ADVTXD_TUCMD_L4T_TCP;
3096                                 break;
3097
3098                         case __constant_htons(ETH_P_IPV6):
3099                                 /* XXX what about other V6 headers?? */
3100                                 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
3101                                         type_tucmd_mlhl |=
3102                                                 IXGBE_ADVTXD_TUCMD_L4T_TCP;
3103                                 break;
3104
3105                         default:
3106                                 if (unlikely(net_ratelimit())) {
3107                                         DPRINTK(PROBE, WARNING,
3108                                          "partial checksum but proto=%x!\n",
3109                                          skb->protocol);
3110                                 }
3111                                 break;
3112                         }
3113                 }
3114
3115                 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
3116                 context_desc->mss_l4len_idx = 0;
3117
3118                 tx_buffer_info->time_stamp = jiffies;
3119                 tx_buffer_info->next_to_watch = i;
3120                 adapter->hw_csum_tx_good++;
3121                 i++;
3122                 if (i == tx_ring->count)
3123                         i = 0;
3124                 tx_ring->next_to_use = i;
3125
3126                 return true;
3127         }
3128         return false;
3129 }
3130
3131 static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
3132                         struct ixgbe_ring *tx_ring,
3133                         struct sk_buff *skb, unsigned int first)
3134 {
3135         struct ixgbe_tx_buffer *tx_buffer_info;
3136         unsigned int len = skb->len;
3137         unsigned int offset = 0, size, count = 0, i;
3138         unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
3139         unsigned int f;
3140
3141         len -= skb->data_len;
3142
3143         i = tx_ring->next_to_use;
3144
3145         while (len) {
3146                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3147                 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
3148
3149                 tx_buffer_info->length = size;
3150                 tx_buffer_info->dma = pci_map_single(adapter->pdev,
3151                                                   skb->data + offset,
3152                                                   size, PCI_DMA_TODEVICE);
3153                 tx_buffer_info->time_stamp = jiffies;
3154                 tx_buffer_info->next_to_watch = i;
3155
3156                 len -= size;
3157                 offset += size;
3158                 count++;
3159                 i++;
3160                 if (i == tx_ring->count)
3161                         i = 0;
3162         }
3163
3164         for (f = 0; f < nr_frags; f++) {
3165                 struct skb_frag_struct *frag;
3166
3167                 frag = &skb_shinfo(skb)->frags[f];
3168                 len = frag->size;
3169                 offset = frag->page_offset;
3170
3171                 while (len) {
3172                         tx_buffer_info = &tx_ring->tx_buffer_info[i];
3173                         size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
3174
3175                         tx_buffer_info->length = size;
3176                         tx_buffer_info->dma = pci_map_page(adapter->pdev,
3177                                                         frag->page,
3178                                                         offset,
3179                                                         size, PCI_DMA_TODEVICE);
3180                         tx_buffer_info->time_stamp = jiffies;
3181                         tx_buffer_info->next_to_watch = i;
3182
3183                         len -= size;
3184                         offset += size;
3185                         count++;
3186                         i++;
3187                         if (i == tx_ring->count)
3188                                 i = 0;
3189                 }
3190         }
3191         if (i == 0)
3192                 i = tx_ring->count - 1;
3193         else
3194                 i = i - 1;
3195         tx_ring->tx_buffer_info[i].skb = skb;
3196         tx_ring->tx_buffer_info[first].next_to_watch = i;
3197
3198         return count;
3199 }
3200
3201 static void ixgbe_tx_queue(struct ixgbe_adapter *adapter,
3202                                struct ixgbe_ring *tx_ring,
3203                                int tx_flags, int count, u32 paylen, u8 hdr_len)
3204 {
3205         union ixgbe_adv_tx_desc *tx_desc = NULL;
3206         struct ixgbe_tx_buffer *tx_buffer_info;
3207         u32 olinfo_status = 0, cmd_type_len = 0;
3208         unsigned int i;
3209         u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
3210
3211         cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
3212
3213         cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
3214
3215         if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3216                 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
3217
3218         if (tx_flags & IXGBE_TX_FLAGS_TSO) {
3219                 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
3220
3221                 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3222                                                 IXGBE_ADVTXD_POPTS_SHIFT;
3223
3224                 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3225                         olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
3226                                                 IXGBE_ADVTXD_POPTS_SHIFT;
3227
3228         } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3229                 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3230                                                 IXGBE_ADVTXD_POPTS_SHIFT;
3231
3232         olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
3233
3234         i = tx_ring->next_to_use;
3235         while (count--) {
3236                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3237                 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
3238                 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
3239                 tx_desc->read.cmd_type_len =
3240                         cpu_to_le32(cmd_type_len | tx_buffer_info->length);
3241                 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
3242
3243                 i++;
3244                 if (i == tx_ring->count)
3245                         i = 0;
3246         }
3247
3248         tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
3249
3250         /*
3251          * Force memory writes to complete before letting h/w
3252          * know there are new descriptors to fetch.  (Only
3253          * applicable for weak-ordered memory model archs,
3254          * such as IA-64).
3255          */
3256         wmb();
3257
3258         tx_ring->next_to_use = i;
3259         writel(i, adapter->hw.hw_addr + tx_ring->tail);
3260 }
3261
3262 static int __ixgbe_maybe_stop_tx(struct net_device *netdev,
3263                                  struct ixgbe_ring *tx_ring, int size)
3264 {
3265         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3266
3267 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
3268         netif_stop_subqueue(netdev, tx_ring->queue_index);
3269 #else
3270         netif_stop_queue(netdev);
3271 #endif
3272         /* Herbert's original patch had:
3273          *  smp_mb__after_netif_stop_queue();
3274          * but since that doesn't exist yet, just open code it. */
3275         smp_mb();
3276
3277         /* We need to check again in a case another CPU has just
3278          * made room available. */
3279         if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
3280                 return -EBUSY;
3281
3282         /* A reprieve! - use start_queue because it doesn't call schedule */
3283 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
3284         netif_wake_subqueue(netdev, tx_ring->queue_index);
3285 #else
3286         netif_wake_queue(netdev);
3287 #endif
3288         ++adapter->restart_queue;
3289         return 0;
3290 }
3291
3292 static int ixgbe_maybe_stop_tx(struct net_device *netdev,
3293                                struct ixgbe_ring *tx_ring, int size)
3294 {
3295         if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
3296                 return 0;
3297         return __ixgbe_maybe_stop_tx(netdev, tx_ring, size);
3298 }
3299
3300
3301 static int ixgbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3302 {
3303         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3304         struct ixgbe_ring *tx_ring;
3305         unsigned int len = skb->len;
3306         unsigned int first;
3307         unsigned int tx_flags = 0;
3308         u8 hdr_len = 0;
3309         int r_idx = 0, tso;
3310         unsigned int mss = 0;
3311         int count = 0;
3312         unsigned int f;
3313         unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
3314         len -= skb->data_len;
3315 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
3316         r_idx = (adapter->num_tx_queues - 1) & skb->queue_mapping;
3317 #endif
3318         tx_ring = &adapter->tx_ring[r_idx];
3319
3320
3321         if (skb->len <= 0) {
3322                 dev_kfree_skb(skb);
3323                 return NETDEV_TX_OK;
3324         }
3325         mss = skb_shinfo(skb)->gso_size;
3326
3327         if (mss)
3328                 count++;
3329         else if (skb->ip_summed == CHECKSUM_PARTIAL)
3330                 count++;
3331
3332         count += TXD_USE_COUNT(len);
3333         for (f = 0; f < nr_frags; f++)
3334                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3335
3336         if (ixgbe_maybe_stop_tx(netdev, tx_ring, count)) {
3337                 adapter->tx_busy++;
3338                 return NETDEV_TX_BUSY;
3339         }
3340         if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
3341                 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3342                 tx_flags |= (vlan_tx_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT);
3343         }
3344
3345         if (skb->protocol == htons(ETH_P_IP))
3346                 tx_flags |= IXGBE_TX_FLAGS_IPV4;
3347         first = tx_ring->next_to_use;
3348         tso = ixgbe_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
3349         if (tso < 0) {
3350                 dev_kfree_skb_any(skb);
3351                 return NETDEV_TX_OK;
3352         }
3353
3354         if (tso)
3355                 tx_flags |= IXGBE_TX_FLAGS_TSO;
3356         else if (ixgbe_tx_csum(adapter, tx_ring, skb, tx_flags) &&
3357                  (skb->ip_summed == CHECKSUM_PARTIAL))
3358                 tx_flags |= IXGBE_TX_FLAGS_CSUM;
3359
3360         ixgbe_tx_queue(adapter, tx_ring, tx_flags,
3361                            ixgbe_tx_map(adapter, tx_ring, skb, first),
3362                            skb->len, hdr_len);
3363
3364         netdev->trans_start = jiffies;
3365
3366         ixgbe_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
3367
3368         return NETDEV_TX_OK;
3369 }
3370
3371 /**
3372  * ixgbe_get_stats - Get System Network Statistics
3373  * @netdev: network interface device structure
3374  *
3375  * Returns the address of the device statistics structure.
3376  * The statistics are actually updated from the timer callback.
3377  **/
3378 static struct net_device_stats *ixgbe_get_stats(struct net_device *netdev)
3379 {
3380         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3381
3382         /* only return the current stats */
3383         return &adapter->net_stats;
3384 }
3385
3386 /**
3387  * ixgbe_set_mac - Change the Ethernet Address of the NIC
3388  * @netdev: network interface device structure
3389  * @p: pointer to an address structure
3390  *
3391  * Returns 0 on success, negative on failure
3392  **/
3393 static int ixgbe_set_mac(struct net_device *netdev, void *p)
3394 {
3395         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3396         struct sockaddr *addr = p;
3397
3398         if (!is_valid_ether_addr(addr->sa_data))
3399                 return -EADDRNOTAVAIL;
3400
3401         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3402         memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3403
3404         ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV);
3405
3406         return 0;
3407 }
3408
3409 #ifdef CONFIG_NET_POLL_CONTROLLER
3410 /*
3411  * Polling 'interrupt' - used by things like netconsole to send skbs
3412  * without having to re-enable interrupts. It's not called while
3413  * the interrupt routine is executing.
3414  */
3415 static void ixgbe_netpoll(struct net_device *netdev)
3416 {
3417         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3418
3419         disable_irq(adapter->pdev->irq);
3420         adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
3421         ixgbe_intr(adapter->pdev->irq, netdev);
3422         adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
3423         enable_irq(adapter->pdev->irq);
3424 }
3425 #endif
3426
3427 /**
3428  * ixgbe_napi_add_all - prep napi structs for use
3429  * @adapter: private struct
3430  * helper function to napi_add each possible q_vector->napi
3431  */
3432 static void ixgbe_napi_add_all(struct ixgbe_adapter *adapter)
3433 {
3434         int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
3435         int (*poll)(struct napi_struct *, int);
3436
3437         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3438                 poll = &ixgbe_clean_rxonly;
3439         } else {
3440                 poll = &ixgbe_poll;
3441                 /* only one q_vector for legacy modes */
3442                 q_vectors = 1;
3443         }
3444
3445         for (i = 0; i < q_vectors; i++) {
3446                 struct ixgbe_q_vector *q_vector = &adapter->q_vector[i];
3447                 netif_napi_add(adapter->netdev, &q_vector->napi,
3448                                (*poll), 64);
3449         }
3450 }
3451
3452 /**
3453  * ixgbe_probe - Device Initialization Routine
3454  * @pdev: PCI device information struct
3455  * @ent: entry in ixgbe_pci_tbl
3456  *
3457  * Returns 0 on success, negative on failure
3458  *
3459  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
3460  * The OS initialization, configuring of the adapter private structure,
3461  * and a hardware reset occur.
3462  **/
3463 static int __devinit ixgbe_probe(struct pci_dev *pdev,
3464                                  const struct pci_device_id *ent)
3465 {
3466         struct net_device *netdev;
3467         struct ixgbe_adapter *adapter = NULL;
3468         struct ixgbe_hw *hw;
3469         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
3470         unsigned long mmio_start, mmio_len;
3471         static int cards_found;
3472         int i, err, pci_using_dac;
3473         u16 link_status, link_speed, link_width;
3474         u32 part_num;
3475
3476         err = pci_enable_device(pdev);
3477         if (err)
3478                 return err;
3479
3480         if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK) &&
3481             !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
3482                 pci_using_dac = 1;
3483         } else {
3484                 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
3485                 if (err) {
3486                         err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
3487                         if (err) {
3488                                 dev_err(&pdev->dev, "No usable DMA "
3489                                         "configuration, aborting\n");
3490                                 goto err_dma;
3491                         }
3492                 }
3493                 pci_using_dac = 0;
3494         }
3495
3496         err = pci_request_regions(pdev, ixgbe_driver_name);
3497         if (err) {
3498                 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
3499                 goto err_pci_reg;
3500         }
3501
3502         pci_set_master(pdev);
3503         pci_save_state(pdev);
3504
3505 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
3506         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), MAX_TX_QUEUES);
3507 #else
3508         netdev = alloc_etherdev(sizeof(struct ixgbe_adapter));
3509 #endif
3510         if (!netdev) {
3511                 err = -ENOMEM;
3512                 goto err_alloc_etherdev;
3513         }
3514
3515         SET_NETDEV_DEV(netdev, &pdev->dev);
3516
3517         pci_set_drvdata(pdev, netdev);
3518         adapter = netdev_priv(netdev);
3519
3520         adapter->netdev = netdev;
3521         adapter->pdev = pdev;
3522         hw = &adapter->hw;
3523         hw->back = adapter;
3524         adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
3525
3526         mmio_start = pci_resource_start(pdev, 0);
3527         mmio_len = pci_resource_len(pdev, 0);
3528
3529         hw->hw_addr = ioremap(mmio_start, mmio_len);
3530         if (!hw->hw_addr) {
3531                 err = -EIO;
3532                 goto err_ioremap;
3533         }
3534
3535         for (i = 1; i <= 5; i++) {
3536                 if (pci_resource_len(pdev, i) == 0)
3537                         continue;
3538         }
3539
3540         netdev->open = &ixgbe_open;
3541         netdev->stop = &ixgbe_close;
3542         netdev->hard_start_xmit = &ixgbe_xmit_frame;
3543         netdev->get_stats = &ixgbe_get_stats;
3544         netdev->set_multicast_list = &ixgbe_set_multi;
3545         netdev->set_mac_address = &ixgbe_set_mac;
3546         netdev->change_mtu = &ixgbe_change_mtu;
3547         ixgbe_set_ethtool_ops(netdev);
3548         netdev->tx_timeout = &ixgbe_tx_timeout;
3549         netdev->watchdog_timeo = 5 * HZ;
3550         netdev->vlan_rx_register = ixgbe_vlan_rx_register;
3551         netdev->vlan_rx_add_vid = ixgbe_vlan_rx_add_vid;
3552         netdev->vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid;
3553 #ifdef CONFIG_NET_POLL_CONTROLLER
3554         netdev->poll_controller = ixgbe_netpoll;
3555 #endif
3556         strcpy(netdev->name, pci_name(pdev));
3557
3558         netdev->mem_start = mmio_start;
3559         netdev->mem_end = mmio_start + mmio_len;
3560
3561         adapter->bd_number = cards_found;
3562
3563         /* PCI config space info */
3564         hw->vendor_id = pdev->vendor;
3565         hw->device_id = pdev->device;
3566         hw->revision_id = pdev->revision;
3567         hw->subsystem_vendor_id = pdev->subsystem_vendor;
3568         hw->subsystem_device_id = pdev->subsystem_device;
3569
3570         /* Setup hw api */
3571         memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
3572         hw->mac.type  = ii->mac;
3573
3574         err = ii->get_invariants(hw);
3575         if (err)
3576                 goto err_hw_init;
3577
3578         /* setup the private structure */
3579         err = ixgbe_sw_init(adapter);
3580         if (err)
3581                 goto err_sw_init;
3582
3583         netdev->features = NETIF_F_SG |
3584                            NETIF_F_HW_CSUM |
3585                            NETIF_F_HW_VLAN_TX |
3586                            NETIF_F_HW_VLAN_RX |
3587                            NETIF_F_HW_VLAN_FILTER;
3588
3589         netdev->features |= NETIF_F_LRO;
3590         netdev->features |= NETIF_F_TSO;
3591         netdev->features |= NETIF_F_TSO6;
3592
3593         netdev->vlan_features |= NETIF_F_TSO;
3594         netdev->vlan_features |= NETIF_F_TSO6;
3595         netdev->vlan_features |= NETIF_F_HW_CSUM;
3596         netdev->vlan_features |= NETIF_F_SG;
3597
3598         if (pci_using_dac)
3599                 netdev->features |= NETIF_F_HIGHDMA;
3600
3601 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
3602         netdev->features |= NETIF_F_MULTI_QUEUE;
3603 #endif
3604
3605         /* make sure the EEPROM is good */
3606         if (ixgbe_validate_eeprom_checksum(hw, NULL) < 0) {
3607                 dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n");
3608                 err = -EIO;
3609                 goto err_eeprom;
3610         }
3611
3612         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
3613         memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
3614
3615         if (ixgbe_validate_mac_addr(netdev->dev_addr)) {
3616                 err = -EIO;
3617                 goto err_eeprom;
3618         }
3619
3620         init_timer(&adapter->watchdog_timer);
3621         adapter->watchdog_timer.function = &ixgbe_watchdog;
3622         adapter->watchdog_timer.data = (unsigned long)adapter;
3623
3624         INIT_WORK(&adapter->reset_task, ixgbe_reset_task);
3625
3626         /* initialize default flow control settings */
3627         hw->fc.original_type = ixgbe_fc_full;
3628         hw->fc.type = ixgbe_fc_full;
3629         hw->fc.high_water = IXGBE_DEFAULT_FCRTH;
3630         hw->fc.low_water = IXGBE_DEFAULT_FCRTL;
3631         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
3632
3633         err = ixgbe_init_interrupt_scheme(adapter);
3634         if (err)
3635                 goto err_sw_init;
3636
3637         /* print bus type/speed/width info */
3638         pci_read_config_word(pdev, IXGBE_PCI_LINK_STATUS, &link_status);
3639         link_speed = link_status & IXGBE_PCI_LINK_SPEED;
3640         link_width = link_status & IXGBE_PCI_LINK_WIDTH;
3641         dev_info(&pdev->dev, "(PCI Express:%s:%s) "
3642                  "%02x:%02x:%02x:%02x:%02x:%02x\n",
3643                 ((link_speed == IXGBE_PCI_LINK_SPEED_5000) ? "5.0Gb/s" :
3644                  (link_speed == IXGBE_PCI_LINK_SPEED_2500) ? "2.5Gb/s" :
3645                  "Unknown"),
3646                 ((link_width == IXGBE_PCI_LINK_WIDTH_8) ? "Width x8" :
3647                  (link_width == IXGBE_PCI_LINK_WIDTH_4) ? "Width x4" :
3648                  (link_width == IXGBE_PCI_LINK_WIDTH_2) ? "Width x2" :
3649                  (link_width == IXGBE_PCI_LINK_WIDTH_1) ? "Width x1" :
3650                  "Unknown"),
3651                 netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
3652                 netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
3653         ixgbe_read_part_num(hw, &part_num);
3654         dev_info(&pdev->dev, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
3655                  hw->mac.type, hw->phy.type,
3656                  (part_num >> 8), (part_num & 0xff));
3657
3658         if (link_width <= IXGBE_PCI_LINK_WIDTH_4) {
3659                 dev_warn(&pdev->dev, "PCI-Express bandwidth available for "
3660                          "this card is not sufficient for optimal "
3661                          "performance.\n");
3662                 dev_warn(&pdev->dev, "For optimal performance a x8 "
3663                          "PCI-Express slot is required.\n");
3664         }
3665
3666         /* reset the hardware with the new settings */
3667         ixgbe_start_hw(hw);
3668
3669         netif_carrier_off(netdev);
3670         netif_stop_queue(netdev);
3671 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
3672         for (i = 0; i < adapter->num_tx_queues; i++)
3673                 netif_stop_subqueue(netdev, i);
3674 #endif
3675
3676         ixgbe_napi_add_all(adapter);
3677
3678         strcpy(netdev->name, "eth%d");
3679         err = register_netdev(netdev);
3680         if (err)
3681                 goto err_register;
3682
3683 #ifdef CONFIG_DCA
3684         if (dca_add_requester(&pdev->dev) == 0) {
3685                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
3686                 /* always use CB2 mode, difference is masked
3687                  * in the CB driver */
3688                 IXGBE_WRITE_REG(hw, IXGBE_DCA_CTRL, 2);
3689                 ixgbe_setup_dca(adapter);
3690         }
3691 #endif
3692
3693         dev_info(&pdev->dev, "Intel(R) 10 Gigabit Network Connection\n");
3694         cards_found++;
3695         return 0;
3696
3697 err_register:
3698         ixgbe_release_hw_control(adapter);
3699 err_hw_init:
3700 err_sw_init:
3701         ixgbe_reset_interrupt_capability(adapter);
3702 err_eeprom:
3703         iounmap(hw->hw_addr);
3704 err_ioremap:
3705         free_netdev(netdev);
3706 err_alloc_etherdev:
3707         pci_release_regions(pdev);
3708 err_pci_reg:
3709 err_dma:
3710         pci_disable_device(pdev);
3711         return err;
3712 }
3713
3714 /**
3715  * ixgbe_remove - Device Removal Routine
3716  * @pdev: PCI device information struct
3717  *
3718  * ixgbe_remove is called by the PCI subsystem to alert the driver
3719  * that it should release a PCI device.  The could be caused by a
3720  * Hot-Plug event, or because the driver is going to be removed from
3721  * memory.
3722  **/
3723 static void __devexit ixgbe_remove(struct pci_dev *pdev)
3724 {
3725         struct net_device *netdev = pci_get_drvdata(pdev);
3726         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3727
3728         set_bit(__IXGBE_DOWN, &adapter->state);
3729         del_timer_sync(&adapter->watchdog_timer);
3730
3731         flush_scheduled_work();
3732
3733 #ifdef CONFIG_DCA
3734         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
3735                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
3736                 dca_remove_requester(&pdev->dev);
3737                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
3738         }
3739
3740 #endif
3741         unregister_netdev(netdev);
3742
3743         ixgbe_reset_interrupt_capability(adapter);
3744
3745         ixgbe_release_hw_control(adapter);
3746
3747         iounmap(adapter->hw.hw_addr);
3748         pci_release_regions(pdev);
3749
3750         DPRINTK(PROBE, INFO, "complete\n");
3751         kfree(adapter->tx_ring);
3752         kfree(adapter->rx_ring);
3753
3754         free_netdev(netdev);
3755
3756         pci_disable_device(pdev);
3757 }
3758
3759 /**
3760  * ixgbe_io_error_detected - called when PCI error is detected
3761  * @pdev: Pointer to PCI device
3762  * @state: The current pci connection state
3763  *
3764  * This function is called after a PCI bus error affecting
3765  * this device has been detected.
3766  */
3767 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
3768                                                 pci_channel_state_t state)
3769 {
3770         struct net_device *netdev = pci_get_drvdata(pdev);
3771         struct ixgbe_adapter *adapter = netdev->priv;
3772
3773         netif_device_detach(netdev);
3774
3775         if (netif_running(netdev))
3776                 ixgbe_down(adapter);
3777         pci_disable_device(pdev);
3778
3779         /* Request a slot slot reset. */
3780         return PCI_ERS_RESULT_NEED_RESET;
3781 }
3782
3783 /**
3784  * ixgbe_io_slot_reset - called after the pci bus has been reset.
3785  * @pdev: Pointer to PCI device
3786  *
3787  * Restart the card from scratch, as if from a cold-boot.
3788  */
3789 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
3790 {
3791         struct net_device *netdev = pci_get_drvdata(pdev);
3792         struct ixgbe_adapter *adapter = netdev->priv;
3793
3794         if (pci_enable_device(pdev)) {
3795                 DPRINTK(PROBE, ERR,
3796                         "Cannot re-enable PCI device after reset.\n");
3797                 return PCI_ERS_RESULT_DISCONNECT;
3798         }
3799         pci_set_master(pdev);
3800         pci_restore_state(pdev);
3801
3802         pci_enable_wake(pdev, PCI_D3hot, 0);
3803         pci_enable_wake(pdev, PCI_D3cold, 0);
3804
3805         ixgbe_reset(adapter);
3806
3807         return PCI_ERS_RESULT_RECOVERED;
3808 }
3809
3810 /**
3811  * ixgbe_io_resume - called when traffic can start flowing again.
3812  * @pdev: Pointer to PCI device
3813  *
3814  * This callback is called when the error recovery driver tells us that
3815  * its OK to resume normal operation.
3816  */
3817 static void ixgbe_io_resume(struct pci_dev *pdev)
3818 {
3819         struct net_device *netdev = pci_get_drvdata(pdev);
3820         struct ixgbe_adapter *adapter = netdev->priv;
3821
3822         if (netif_running(netdev)) {
3823                 if (ixgbe_up(adapter)) {
3824                         DPRINTK(PROBE, INFO, "ixgbe_up failed after reset\n");
3825                         return;
3826                 }
3827         }
3828
3829         netif_device_attach(netdev);
3830
3831 }
3832
3833 static struct pci_error_handlers ixgbe_err_handler = {
3834         .error_detected = ixgbe_io_error_detected,
3835         .slot_reset = ixgbe_io_slot_reset,
3836         .resume = ixgbe_io_resume,
3837 };
3838
3839 static struct pci_driver ixgbe_driver = {
3840         .name     = ixgbe_driver_name,
3841         .id_table = ixgbe_pci_tbl,
3842         .probe    = ixgbe_probe,
3843         .remove   = __devexit_p(ixgbe_remove),
3844 #ifdef CONFIG_PM
3845         .suspend  = ixgbe_suspend,
3846         .resume   = ixgbe_resume,
3847 #endif
3848         .shutdown = ixgbe_shutdown,
3849         .err_handler = &ixgbe_err_handler
3850 };
3851
3852 /**
3853  * ixgbe_init_module - Driver Registration Routine
3854  *
3855  * ixgbe_init_module is the first routine called when the driver is
3856  * loaded. All it does is register with the PCI subsystem.
3857  **/
3858 static int __init ixgbe_init_module(void)
3859 {
3860         int ret;
3861         printk(KERN_INFO "%s: %s - version %s\n", ixgbe_driver_name,
3862                ixgbe_driver_string, ixgbe_driver_version);
3863
3864         printk(KERN_INFO "%s: %s\n", ixgbe_driver_name, ixgbe_copyright);
3865
3866 #ifdef CONFIG_DCA
3867         dca_register_notify(&dca_notifier);
3868
3869 #endif
3870         ret = pci_register_driver(&ixgbe_driver);
3871         return ret;
3872 }
3873 module_init(ixgbe_init_module);
3874
3875 /**
3876  * ixgbe_exit_module - Driver Exit Cleanup Routine
3877  *
3878  * ixgbe_exit_module is called just before the driver is removed
3879  * from memory.
3880  **/
3881 static void __exit ixgbe_exit_module(void)
3882 {
3883 #ifdef CONFIG_DCA
3884         dca_unregister_notify(&dca_notifier);
3885 #endif
3886         pci_unregister_driver(&ixgbe_driver);
3887 }
3888
3889 #ifdef CONFIG_DCA
3890 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
3891                             void *p)
3892 {
3893         int ret_val;
3894
3895         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
3896                                          __ixgbe_notify_dca);
3897
3898         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
3899 }
3900 #endif /* CONFIG_DCA */
3901
3902 module_exit(ixgbe_exit_module);
3903
3904 /* ixgbe_main.c */