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   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2007 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   Linux NICS <linux.nics@intel.com>
  24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  26
  27 *******************************************************************************/
  28
  29 #include <linux/types.h>
  30 #include <linux/module.h>
  31 #include <linux/pci.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/string.h>
  35 #include <linux/in.h>
  36 #include <linux/ip.h>
  37 #include <linux/tcp.h>
  38 #include <linux/ipv6.h>
  39 #include <net/checksum.h>
  40 #include <net/ip6_checksum.h>
  41 #include <linux/ethtool.h>
  42 #include <linux/if_vlan.h>
  43
  44 #include "ixgbe.h"
  45 #include "ixgbe_common.h"
  46
  47 char ixgbe_driver_name[] = "ixgbe";
  48 static const char ixgbe_driver_string[] =
  49         "Intel(R) 10 Gigabit PCI Express Network Driver";
  50
  51 #define DRV_VERSION "1.3.18-k4"
  52 const char ixgbe_driver_version[] = DRV_VERSION;
  53 static const char ixgbe_copyright[] =
  54          "Copyright (c) 1999-2007 Intel Corporation.";
  55
  56 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  57         [board_82598]                   = &ixgbe_82598_info,
  58 };
  59
  60 /* ixgbe_pci_tbl - PCI Device ID Table
  61  *
  62  * Wildcard entries (PCI_ANY_ID) should come last
  63  * Last entry must be all 0s
  64  *
  65  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  66  *   Class, Class Mask, private data (not used) }
  67  */
  68 static struct pci_device_id ixgbe_pci_tbl[] = {
  69         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT),
  70          board_82598 },
  71         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT),
  72          board_82598 },
  73         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4),
  74          board_82598 },
  75         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT),
  76          board_82598 },
  77
  78         /* required last entry */
  79         {0, }
  80 };
  81 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
  82
  83 #if defined(CONFIG_DCA) || defined (CONFIG_DCA_MODULE)
  84 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
  85                             void *p);
  86 static struct notifier_block dca_notifier = {
  87         .notifier_call = ixgbe_notify_dca,
  88         .next          = NULL,
  89         .priority      = 0
  90 };
  91 #endif
  92
  93 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  94 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
  95 MODULE_LICENSE("GPL");
  96 MODULE_VERSION(DRV_VERSION);
  97
  98 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
  99
 100 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 101 {
 102         u32 ctrl_ext;
 103
 104         /* Let firmware take over control of h/w */
 105         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 106         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 107                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 108 }
 109
 110 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 111 {
 112         u32 ctrl_ext;
 113
 114         /* Let firmware know the driver has taken over */
 115         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 116         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 117                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 118 }
 119
 120 #ifdef DEBUG
 121 /**
 122  * ixgbe_get_hw_dev_name - return device name string
 123  * used by hardware layer to print debugging information
 124  **/
 125 char *ixgbe_get_hw_dev_name(struct ixgbe_hw *hw)
 126 {
 127         struct ixgbe_adapter *adapter = hw->back;
 128         struct net_device *netdev = adapter->netdev;
 129         return netdev->name;
 130 }
 131 #endif
 132
 133 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, u16 int_alloc_entry,
 134                            u8 msix_vector)
 135 {
 136         u32 ivar, index;
 137
 138         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 139         index = (int_alloc_entry >> 2) & 0x1F;
 140         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR(index));
 141         ivar &= ~(0xFF << (8 * (int_alloc_entry & 0x3)));
 142         ivar |= (msix_vector << (8 * (int_alloc_entry & 0x3)));
 143         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR(index), ivar);
 144 }
 145
 146 static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter,
 147                                              struct ixgbe_tx_buffer
 148                                              *tx_buffer_info)
 149 {
 150         if (tx_buffer_info->dma) {
 151                 pci_unmap_page(adapter->pdev, tx_buffer_info->dma,
 152                                tx_buffer_info->length, PCI_DMA_TODEVICE);
 153                 tx_buffer_info->dma = 0;
 154         }
 155         if (tx_buffer_info->skb) {
 156                 dev_kfree_skb_any(tx_buffer_info->skb);
 157                 tx_buffer_info->skb = NULL;
 158         }
 159         /* tx_buffer_info must be completely set up in the transmit path */
 160 }
 161
 162 static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
 163                                        struct ixgbe_ring *tx_ring,
 164                                        unsigned int eop)
 165 {
 166         struct ixgbe_hw *hw = &adapter->hw;
 167         u32 head, tail;
 168
 169         /* Detect a transmit hang in hardware, this serializes the
 170          * check with the clearing of time_stamp and movement of eop */
 171         head = IXGBE_READ_REG(hw, tx_ring->head);
 172         tail = IXGBE_READ_REG(hw, tx_ring->tail);
 173         adapter->detect_tx_hung = false;
 174         if ((head != tail) &&
 175             tx_ring->tx_buffer_info[eop].time_stamp &&
 176             time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) &&
 177             !(IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & IXGBE_TFCS_TXOFF)) {
 178                 /* detected Tx unit hang */
 179                 union ixgbe_adv_tx_desc *tx_desc;
 180                 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
 181                 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
 182                         "  Tx Queue             <%d>\n"
 183                         "  TDH, TDT             <%x>, <%x>\n"
 184                         "  next_to_use          <%x>\n"
 185                         "  next_to_clean        <%x>\n"
 186                         "tx_buffer_info[next_to_clean]\n"
 187                         "  time_stamp           <%lx>\n"
 188                         "  jiffies              <%lx>\n",
 189                         tx_ring->queue_index,
 190                         head, tail,
 191                         tx_ring->next_to_use, eop,
 192                         tx_ring->tx_buffer_info[eop].time_stamp, jiffies);
 193                 return true;
 194         }
 195
 196         return false;
 197 }
 198
 199 #define IXGBE_MAX_TXD_PWR       14
 200 #define IXGBE_MAX_DATA_PER_TXD  (1 << IXGBE_MAX_TXD_PWR)
 201
 202 /* Tx Descriptors needed, worst case */
 203 #define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
 204                          (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
 205 #define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
 206         MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1)   /* for context */
 207
 208 #define GET_TX_HEAD_FROM_RING(ring) (\
 209         *(volatile u32 *) \
 210         ((union ixgbe_adv_tx_desc *)(ring)->desc + (ring)->count))
 211 static void ixgbe_tx_timeout(struct net_device *netdev);
 212
 213 /**
 214  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
 215  * @adapter: board private structure
 216  * @tx_ring: tx ring to clean
 217  **/
 218 static bool ixgbe_clean_tx_irq(struct ixgbe_adapter *adapter,
 219                                struct ixgbe_ring *tx_ring)
 220 {
 221         union ixgbe_adv_tx_desc *tx_desc;
 222         struct ixgbe_tx_buffer *tx_buffer_info;
 223         struct net_device *netdev = adapter->netdev;
 224         struct sk_buff *skb;
 225         unsigned int i;
 226         u32 head, oldhead;
 227         unsigned int count = 0;
 228         unsigned int total_bytes = 0, total_packets = 0;
 229
 230         rmb();
 231         head = GET_TX_HEAD_FROM_RING(tx_ring);
 232         head = le32_to_cpu(head);
 233         i = tx_ring->next_to_clean;
 234         while (1) {
 235                 while (i != head) {
 236                         tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
 237                         tx_buffer_info = &tx_ring->tx_buffer_info[i];
 238                         skb = tx_buffer_info->skb;
 239
 240                         if (skb) {
 241                                 unsigned int segs, bytecount;
 242
 243                                 /* gso_segs is currently only valid for tcp */
 244                                 segs = skb_shinfo(skb)->gso_segs ?: 1;
 245                                 /* multiply data chunks by size of headers */
 246                                 bytecount = ((segs - 1) * skb_headlen(skb)) +
 247                                             skb->len;
 248                                 total_packets += segs;
 249                                 total_bytes += bytecount;
 250                         }
 251
 252                         ixgbe_unmap_and_free_tx_resource(adapter,
 253                                                          tx_buffer_info);
 254
 255                         i++;
 256                         if (i == tx_ring->count)
 257                                 i = 0;
 258
 259                         count++;
 260                         if (count == tx_ring->count)
 261                                 goto done_cleaning;
 262                 }
 263                 oldhead = head;
 264                 rmb();
 265                 head = GET_TX_HEAD_FROM_RING(tx_ring);
 266                 head = le32_to_cpu(head);
 267                 if (head == oldhead)
 268                         goto done_cleaning;
 269         } /* while (1) */
 270
 271 done_cleaning:
 272         tx_ring->next_to_clean = i;
 273
 274 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
 275         if (unlikely(count && netif_carrier_ok(netdev) &&
 276                      (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
 277                 /* Make sure that anybody stopping the queue after this
 278                  * sees the new next_to_clean.
 279                  */
 280                 smp_mb();
 281                 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
 282                     !test_bit(__IXGBE_DOWN, &adapter->state)) {
 283                         netif_wake_subqueue(netdev, tx_ring->queue_index);
 284                         ++adapter->restart_queue;
 285                 }
 286         }
 287
 288         if (adapter->detect_tx_hung) {
 289                 if (ixgbe_check_tx_hang(adapter, tx_ring, i)) {
 290                         /* schedule immediate reset if we believe we hung */
 291                         DPRINTK(PROBE, INFO,
 292                                 "tx hang %d detected, resetting adapter\n",
 293                                 adapter->tx_timeout_count + 1);
 294                         ixgbe_tx_timeout(adapter->netdev);
 295                 }
 296         }
 297
 298         /* re-arm the interrupt */
 299         if ((total_packets >= tx_ring->work_limit) ||
 300             (count == tx_ring->count))
 301                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, tx_ring->v_idx);
 302
 303         tx_ring->total_bytes += total_bytes;
 304         tx_ring->total_packets += total_packets;
 305         tx_ring->stats.bytes += total_bytes;
 306         tx_ring->stats.packets += total_packets;
 307         adapter->net_stats.tx_bytes += total_bytes;
 308         adapter->net_stats.tx_packets += total_packets;
 309         return (total_packets ? true : false);
 310 }
 311
 312 #if defined(CONFIG_DCA) || defined (CONFIG_DCA_MODULE)
 313 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
 314                                 struct ixgbe_ring *rx_ring)
 315 {
 316         u32 rxctrl;
 317         int cpu = get_cpu();
 318         int q = rx_ring - adapter->rx_ring;
 319
 320         if (rx_ring->cpu != cpu) {
 321                 rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q));
 322                 rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK;
 323                 rxctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
 324                 rxctrl |= IXGBE_DCA_RXCTRL_DESC_DCA_EN;
 325                 rxctrl |= IXGBE_DCA_RXCTRL_HEAD_DCA_EN;
 326                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q), rxctrl);
 327                 rx_ring->cpu = cpu;
 328         }
 329         put_cpu();
 330 }
 331
 332 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
 333                                 struct ixgbe_ring *tx_ring)
 334 {
 335         u32 txctrl;
 336         int cpu = get_cpu();
 337         int q = tx_ring - adapter->tx_ring;
 338
 339         if (tx_ring->cpu != cpu) {
 340                 txctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q));
 341                 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK;
 342                 txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
 343                 txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN;
 344                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q), txctrl);
 345                 tx_ring->cpu = cpu;
 346         }
 347         put_cpu();
 348 }
 349
 350 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
 351 {
 352         int i;
 353
 354         if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
 355                 return;
 356
 357         for (i = 0; i < adapter->num_tx_queues; i++) {
 358                 adapter->tx_ring[i].cpu = -1;
 359                 ixgbe_update_tx_dca(adapter, &adapter->tx_ring[i]);
 360         }
 361         for (i = 0; i < adapter->num_rx_queues; i++) {
 362                 adapter->rx_ring[i].cpu = -1;
 363                 ixgbe_update_rx_dca(adapter, &adapter->rx_ring[i]);
 364         }
 365 }
 366
 367 static int __ixgbe_notify_dca(struct device *dev, void *data)
 368 {
 369         struct net_device *netdev = dev_get_drvdata(dev);
 370         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 371         unsigned long event = *(unsigned long *)data;
 372
 373         switch (event) {
 374         case DCA_PROVIDER_ADD:
 375                 /* if we're already enabled, don't do it again */
 376                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
 377                         break;
 378                 /* Always use CB2 mode, difference is masked
 379                  * in the CB driver. */
 380                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
 381                 if (dca_add_requester(dev) == 0) {
 382                         adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
 383                         ixgbe_setup_dca(adapter);
 384                         break;
 385                 }
 386                 /* Fall Through since DCA is disabled. */
 387         case DCA_PROVIDER_REMOVE:
 388                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
 389                         dca_remove_requester(dev);
 390                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
 391                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
 392                 }
 393                 break;
 394         }
 395
 396         return 0;
 397 }
 398
 399 #endif /* CONFIG_DCA or CONFIG_DCA_MODULE */
 400 /**
 401  * ixgbe_receive_skb - Send a completed packet up the stack
 402  * @adapter: board private structure
 403  * @skb: packet to send up
 404  * @status: hardware indication of status of receive
 405  * @rx_ring: rx descriptor ring (for a specific queue) to setup
 406  * @rx_desc: rx descriptor
 407  **/
 408 static void ixgbe_receive_skb(struct ixgbe_adapter *adapter,
 409                               struct sk_buff *skb, u8 status,
 410                               struct ixgbe_ring *ring,
 411                               union ixgbe_adv_rx_desc *rx_desc)
 412 {
 413         bool is_vlan = (status & IXGBE_RXD_STAT_VP);
 414         u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
 415
 416         if (adapter->netdev->features & NETIF_F_LRO &&
 417             skb->ip_summed == CHECKSUM_UNNECESSARY) {
 418                 if (adapter->vlgrp && is_vlan)
 419                         lro_vlan_hwaccel_receive_skb(&ring->lro_mgr, skb,
 420                                                      adapter->vlgrp, tag,
 421                                                      rx_desc);
 422                 else
 423                         lro_receive_skb(&ring->lro_mgr, skb, rx_desc);
 424                 ring->lro_used = true;
 425         } else {
 426                 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
 427                         if (adapter->vlgrp && is_vlan)
 428                                 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, tag);
 429                         else
 430                                 netif_receive_skb(skb);
 431                 } else {
 432                         if (adapter->vlgrp && is_vlan)
 433                                 vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
 434                         else
 435                                 netif_rx(skb);
 436                 }
 437         }
 438 }
 439
 440 /**
 441  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
 442  * @adapter: address of board private structure
 443  * @status_err: hardware indication of status of receive
 444  * @skb: skb currently being received and modified
 445  **/
 446 static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter,
 447                                      u32 status_err, struct sk_buff *skb)
 448 {
 449         skb->ip_summed = CHECKSUM_NONE;
 450
 451         /* Rx csum disabled */
 452         if (!(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
 453                 return;
 454
 455         /* if IP and error */
 456         if ((status_err & IXGBE_RXD_STAT_IPCS) &&
 457             (status_err & IXGBE_RXDADV_ERR_IPE)) {
 458                 adapter->hw_csum_rx_error++;
 459                 return;
 460         }
 461
 462         if (!(status_err & IXGBE_RXD_STAT_L4CS))
 463                 return;
 464
 465         if (status_err & IXGBE_RXDADV_ERR_TCPE) {
 466                 adapter->hw_csum_rx_error++;
 467                 return;
 468         }
 469
 470         /* It must be a TCP or UDP packet with a valid checksum */
 471         skb->ip_summed = CHECKSUM_UNNECESSARY;
 472         adapter->hw_csum_rx_good++;
 473 }
 474
 475 /**
 476  * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
 477  * @adapter: address of board private structure
 478  **/
 479 static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter *adapter,
 480                                    struct ixgbe_ring *rx_ring,
 481                                    int cleaned_count)
 482 {
 483         struct net_device *netdev = adapter->netdev;
 484         struct pci_dev *pdev = adapter->pdev;
 485         union ixgbe_adv_rx_desc *rx_desc;
 486         struct ixgbe_rx_buffer *bi;
 487         unsigned int i;
 488         unsigned int bufsz = rx_ring->rx_buf_len + NET_IP_ALIGN;
 489
 490         i = rx_ring->next_to_use;
 491         bi = &rx_ring->rx_buffer_info[i];
 492
 493         while (cleaned_count--) {
 494                 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
 495
 496                 if (!bi->page &&
 497                     (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
 498                         bi->page = alloc_page(GFP_ATOMIC);
 499                         if (!bi->page) {
 500                                 adapter->alloc_rx_page_failed++;
 501                                 goto no_buffers;
 502                         }
 503                         bi->page_dma = pci_map_page(pdev, bi->page, 0,
 504                                                     PAGE_SIZE,
 505                                                     PCI_DMA_FROMDEVICE);
 506                 }
 507
 508                 if (!bi->skb) {
 509                         struct sk_buff *skb = netdev_alloc_skb(netdev, bufsz);
 510
 511                         if (!skb) {
 512                                 adapter->alloc_rx_buff_failed++;
 513                                 goto no_buffers;
 514                         }
 515
 516                         /*
 517                          * Make buffer alignment 2 beyond a 16 byte boundary
 518                          * this will result in a 16 byte aligned IP header after
 519                          * the 14 byte MAC header is removed
 520                          */
 521                         skb_reserve(skb, NET_IP_ALIGN);
 522
 523                         bi->skb = skb;
 524                         bi->dma = pci_map_single(pdev, skb->data, bufsz,
 525                                                  PCI_DMA_FROMDEVICE);
 526                 }
 527                 /* Refresh the desc even if buffer_addrs didn't change because
 528                  * each write-back erases this info. */
 529                 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
 530                         rx_desc->read.pkt_addr = cpu_to_le64(bi->page_dma);
 531                         rx_desc->read.hdr_addr = cpu_to_le64(bi->dma);
 532                 } else {
 533                         rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
 534                 }
 535
 536                 i++;
 537                 if (i == rx_ring->count)
 538                         i = 0;
 539                 bi = &rx_ring->rx_buffer_info[i];
 540         }
 541
 542 no_buffers:
 543         if (rx_ring->next_to_use != i) {
 544                 rx_ring->next_to_use = i;
 545                 if (i-- == 0)
 546                         i = (rx_ring->count - 1);
 547
 548                 /*
 549                  * Force memory writes to complete before letting h/w
 550                  * know there are new descriptors to fetch.  (Only
 551                  * applicable for weak-ordered memory model archs,
 552                  * such as IA-64).
 553                  */
 554                 wmb();
 555                 writel(i, adapter->hw.hw_addr + rx_ring->tail);
 556         }
 557 }
 558
 559 static inline u16 ixgbe_get_hdr_info(union ixgbe_adv_rx_desc *rx_desc)
 560 {
 561         return rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
 562 }
 563
 564 static inline u16 ixgbe_get_pkt_info(union ixgbe_adv_rx_desc *rx_desc)
 565 {
 566         return rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
 567 }
 568
 569 static bool ixgbe_clean_rx_irq(struct ixgbe_adapter *adapter,
 570                                struct ixgbe_ring *rx_ring,
 571                                int *work_done, int work_to_do)
 572 {
 573         struct net_device *netdev = adapter->netdev;
 574         struct pci_dev *pdev = adapter->pdev;
 575         union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
 576         struct ixgbe_rx_buffer *rx_buffer_info, *next_buffer;
 577         struct sk_buff *skb;
 578         unsigned int i;
 579         u32 len, staterr;
 580         u16 hdr_info;
 581         bool cleaned = false;
 582         int cleaned_count = 0;
 583         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
 584
 585         i = rx_ring->next_to_clean;
 586         rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
 587         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 588         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 589
 590         while (staterr & IXGBE_RXD_STAT_DD) {
 591                 u32 upper_len = 0;
 592                 if (*work_done >= work_to_do)
 593                         break;
 594                 (*work_done)++;
 595
 596                 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
 597                         hdr_info = le16_to_cpu(ixgbe_get_hdr_info(rx_desc));
 598                         len = (hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
 599                                IXGBE_RXDADV_HDRBUFLEN_SHIFT;
 600                         if (hdr_info & IXGBE_RXDADV_SPH)
 601                                 adapter->rx_hdr_split++;
 602                         if (len > IXGBE_RX_HDR_SIZE)
 603                                 len = IXGBE_RX_HDR_SIZE;
 604                         upper_len = le16_to_cpu(rx_desc->wb.upper.length);
 605                 } else {
 606                         len = le16_to_cpu(rx_desc->wb.upper.length);
 607                 }
 608
 609                 cleaned = true;
 610                 skb = rx_buffer_info->skb;
 611                 prefetch(skb->data - NET_IP_ALIGN);
 612                 rx_buffer_info->skb = NULL;
 613
 614                 if (len && !skb_shinfo(skb)->nr_frags) {
 615                         pci_unmap_single(pdev, rx_buffer_info->dma,
 616                                          rx_ring->rx_buf_len + NET_IP_ALIGN,
 617                                          PCI_DMA_FROMDEVICE);
 618                         skb_put(skb, len);
 619                 }
 620
 621                 if (upper_len) {
 622                         pci_unmap_page(pdev, rx_buffer_info->page_dma,
 623                                        PAGE_SIZE, PCI_DMA_FROMDEVICE);
 624                         rx_buffer_info->page_dma = 0;
 625                         skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
 626                                            rx_buffer_info->page, 0, upper_len);
 627                         rx_buffer_info->page = NULL;
 628
 629                         skb->len += upper_len;
 630                         skb->data_len += upper_len;
 631                         skb->truesize += upper_len;
 632                 }
 633
 634                 i++;
 635                 if (i == rx_ring->count)
 636                         i = 0;
 637                 next_buffer = &rx_ring->rx_buffer_info[i];
 638
 639                 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
 640                 prefetch(next_rxd);
 641
 642                 cleaned_count++;
 643                 if (staterr & IXGBE_RXD_STAT_EOP) {
 644                         rx_ring->stats.packets++;
 645                         rx_ring->stats.bytes += skb->len;
 646                 } else {
 647                         rx_buffer_info->skb = next_buffer->skb;
 648                         rx_buffer_info->dma = next_buffer->dma;
 649                         next_buffer->skb = skb;
 650                         adapter->non_eop_descs++;
 651                         goto next_desc;
 652                 }
 653
 654                 if (staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK) {
 655                         dev_kfree_skb_irq(skb);
 656                         goto next_desc;
 657                 }
 658
 659                 ixgbe_rx_checksum(adapter, staterr, skb);
 660
 661                 /* probably a little skewed due to removing CRC */
 662                 total_rx_bytes += skb->len;
 663                 total_rx_packets++;
 664
 665                 skb->protocol = eth_type_trans(skb, netdev);
 666                 ixgbe_receive_skb(adapter, skb, staterr, rx_ring, rx_desc);
 667                 netdev->last_rx = jiffies;
 668
 669 next_desc:
 670                 rx_desc->wb.upper.status_error = 0;
 671
 672                 /* return some buffers to hardware, one at a time is too slow */
 673                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
 674                         ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
 675                         cleaned_count = 0;
 676                 }
 677
 678                 /* use prefetched values */
 679                 rx_desc = next_rxd;
 680                 rx_buffer_info = next_buffer;
 681
 682                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 683         }
 684
 685         if (rx_ring->lro_used) {
 686                 lro_flush_all(&rx_ring->lro_mgr);
 687                 rx_ring->lro_used = false;
 688         }
 689
 690         rx_ring->next_to_clean = i;
 691         cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
 692
 693         if (cleaned_count)
 694                 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
 695
 696         rx_ring->total_packets += total_rx_packets;
 697         rx_ring->total_bytes += total_rx_bytes;
 698         adapter->net_stats.rx_bytes += total_rx_bytes;
 699         adapter->net_stats.rx_packets += total_rx_packets;
 700
 701         return cleaned;
 702 }
 703
 704 static int ixgbe_clean_rxonly(struct napi_struct *, int);
 705 /**
 706  * ixgbe_configure_msix - Configure MSI-X hardware
 707  * @adapter: board private structure
 708  *
 709  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
 710  * interrupts.
 711  **/
 712 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
 713 {
 714         struct ixgbe_q_vector *q_vector;
 715         int i, j, q_vectors, v_idx, r_idx;
 716         u32 mask;
 717
 718         q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
 719
 720         /* Populate the IVAR table and set the ITR values to the
 721          * corresponding register.
 722          */
 723         for (v_idx = 0; v_idx < q_vectors; v_idx++) {
 724                 q_vector = &adapter->q_vector[v_idx];
 725                 /* XXX for_each_bit(...) */
 726                 r_idx = find_first_bit(q_vector->rxr_idx,
 727                                       adapter->num_rx_queues);
 728
 729                 for (i = 0; i < q_vector->rxr_count; i++) {
 730                         j = adapter->rx_ring[r_idx].reg_idx;
 731                         ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(j), v_idx);
 732                         r_idx = find_next_bit(q_vector->rxr_idx,
 733                                               adapter->num_rx_queues,
 734                                               r_idx + 1);
 735                 }
 736                 r_idx = find_first_bit(q_vector->txr_idx,
 737                                        adapter->num_tx_queues);
 738
 739                 for (i = 0; i < q_vector->txr_count; i++) {
 740                         j = adapter->tx_ring[r_idx].reg_idx;
 741                         ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(j), v_idx);
 742                         r_idx = find_next_bit(q_vector->txr_idx,
 743                                               adapter->num_tx_queues,
 744                                               r_idx + 1);
 745                 }
 746
 747                 /* if this is a tx only vector use half the irq (tx) rate */
 748                 if (q_vector->txr_count && !q_vector->rxr_count)
 749                         q_vector->eitr = adapter->tx_eitr;
 750                 else
 751                         /* rx only or mixed */
 752                         q_vector->eitr = adapter->rx_eitr;
 753
 754                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx),
 755                                 EITR_INTS_PER_SEC_TO_REG(q_vector->eitr));
 756         }
 757
 758         ixgbe_set_ivar(adapter, IXGBE_IVAR_OTHER_CAUSES_INDEX, v_idx);
 759         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
 760
 761         /* set up to autoclear timer, lsc, and the vectors */
 762         mask = IXGBE_EIMS_ENABLE_MASK;
 763         mask &= ~IXGBE_EIMS_OTHER;
 764         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
 765 }
 766
 767 enum latency_range {
 768         lowest_latency = 0,
 769         low_latency = 1,
 770         bulk_latency = 2,
 771         latency_invalid = 255
 772 };
 773
 774 /**
 775  * ixgbe_update_itr - update the dynamic ITR value based on statistics
 776  * @adapter: pointer to adapter
 777  * @eitr: eitr setting (ints per sec) to give last timeslice
 778  * @itr_setting: current throttle rate in ints/second
 779  * @packets: the number of packets during this measurement interval
 780  * @bytes: the number of bytes during this measurement interval
 781  *
 782  *      Stores a new ITR value based on packets and byte
 783  *      counts during the last interrupt.  The advantage of per interrupt
 784  *      computation is faster updates and more accurate ITR for the current
 785  *      traffic pattern.  Constants in this function were computed
 786  *      based on theoretical maximum wire speed and thresholds were set based
 787  *      on testing data as well as attempting to minimize response time
 788  *      while increasing bulk throughput.
 789  *      this functionality is controlled by the InterruptThrottleRate module
 790  *      parameter (see ixgbe_param.c)
 791  **/
 792 static u8 ixgbe_update_itr(struct ixgbe_adapter *adapter,
 793                            u32 eitr, u8 itr_setting,
 794                            int packets, int bytes)
 795 {
 796         unsigned int retval = itr_setting;
 797         u32 timepassed_us;
 798         u64 bytes_perint;
 799
 800         if (packets == 0)
 801                 goto update_itr_done;
 802
 803
 804         /* simple throttlerate management
 805          *    0-20MB/s lowest (100000 ints/s)
 806          *   20-100MB/s low   (20000 ints/s)
 807          *  100-1249MB/s bulk (8000 ints/s)
 808          */
 809         /* what was last interrupt timeslice? */
 810         timepassed_us = 1000000/eitr;
 811         bytes_perint = bytes / timepassed_us; /* bytes/usec */
 812
 813         switch (itr_setting) {
 814         case lowest_latency:
 815                 if (bytes_perint > adapter->eitr_low)
 816                         retval = low_latency;
 817                 break;
 818         case low_latency:
 819                 if (bytes_perint > adapter->eitr_high)
 820                         retval = bulk_latency;
 821                 else if (bytes_perint <= adapter->eitr_low)
 822                         retval = lowest_latency;
 823                 break;
 824         case bulk_latency:
 825                 if (bytes_perint <= adapter->eitr_high)
 826                         retval = low_latency;
 827                 break;
 828         }
 829
 830 update_itr_done:
 831         return retval;
 832 }
 833
 834 static void ixgbe_set_itr_msix(struct ixgbe_q_vector *q_vector)
 835 {
 836         struct ixgbe_adapter *adapter = q_vector->adapter;
 837         struct ixgbe_hw *hw = &adapter->hw;
 838         u32 new_itr;
 839         u8 current_itr, ret_itr;
 840         int i, r_idx, v_idx = ((void *)q_vector - (void *)(adapter->q_vector)) /
 841                               sizeof(struct ixgbe_q_vector);
 842         struct ixgbe_ring *rx_ring, *tx_ring;
 843
 844         r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
 845         for (i = 0; i < q_vector->txr_count; i++) {
 846                 tx_ring = &(adapter->tx_ring[r_idx]);
 847                 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
 848                                            q_vector->tx_eitr,
 849                                            tx_ring->total_packets,
 850                                            tx_ring->total_bytes);
 851                 /* if the result for this queue would decrease interrupt
 852                  * rate for this vector then use that result */
 853                 q_vector->tx_eitr = ((q_vector->tx_eitr > ret_itr) ?
 854                                     q_vector->tx_eitr - 1 : ret_itr);
 855                 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
 856                                       r_idx + 1);
 857         }
 858
 859         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
 860         for (i = 0; i < q_vector->rxr_count; i++) {
 861                 rx_ring = &(adapter->rx_ring[r_idx]);
 862                 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
 863                                            q_vector->rx_eitr,
 864                                            rx_ring->total_packets,
 865                                            rx_ring->total_bytes);
 866                 /* if the result for this queue would decrease interrupt
 867                  * rate for this vector then use that result */
 868                 q_vector->rx_eitr = ((q_vector->rx_eitr > ret_itr) ?
 869                                     q_vector->rx_eitr - 1 : ret_itr);
 870                 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
 871                                       r_idx + 1);
 872         }
 873
 874         current_itr = max(q_vector->rx_eitr, q_vector->tx_eitr);
 875
 876         switch (current_itr) {
 877         /* counts and packets in update_itr are dependent on these numbers */
 878         case lowest_latency:
 879                 new_itr = 100000;
 880                 break;
 881         case low_latency:
 882                 new_itr = 20000; /* aka hwitr = ~200 */
 883                 break;
 884         case bulk_latency:
 885         default:
 886                 new_itr = 8000;
 887                 break;
 888         }
 889
 890         if (new_itr != q_vector->eitr) {
 891                 u32 itr_reg;
 892                 /* do an exponential smoothing */
 893                 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
 894                 q_vector->eitr = new_itr;
 895                 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
 896                 /* must write high and low 16 bits to reset counter */
 897                 DPRINTK(TX_ERR, DEBUG, "writing eitr(%d): %08X\n", v_idx,
 898                         itr_reg);
 899                 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg | (itr_reg)<<16);
 900         }
 901
 902         return;
 903 }
 904
 905 static irqreturn_t ixgbe_msix_lsc(int irq, void *data)
 906 {
 907         struct net_device *netdev = data;
 908         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 909         struct ixgbe_hw *hw = &adapter->hw;
 910         u32 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
 911
 912         if (eicr & IXGBE_EICR_LSC) {
 913                 adapter->lsc_int++;
 914                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
 915                         mod_timer(&adapter->watchdog_timer, jiffies);
 916         }
 917
 918         if (!test_bit(__IXGBE_DOWN, &adapter->state))
 919                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER);
 920
 921         return IRQ_HANDLED;
 922 }
 923
 924 static irqreturn_t ixgbe_msix_clean_tx(int irq, void *data)
 925 {
 926         struct ixgbe_q_vector *q_vector = data;
 927         struct ixgbe_adapter  *adapter = q_vector->adapter;
 928         struct ixgbe_ring     *tx_ring;
 929         int i, r_idx;
 930
 931         if (!q_vector->txr_count)
 932                 return IRQ_HANDLED;
 933
 934         r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
 935         for (i = 0; i < q_vector->txr_count; i++) {
 936                 tx_ring = &(adapter->tx_ring[r_idx]);
 937 #if defined(CONFIG_DCA) || defined (CONFIG_DCA_MODULE)
 938                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
 939                         ixgbe_update_tx_dca(adapter, tx_ring);
 940 #endif
 941                 tx_ring->total_bytes = 0;
 942                 tx_ring->total_packets = 0;
 943                 ixgbe_clean_tx_irq(adapter, tx_ring);
 944                 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
 945                                       r_idx + 1);
 946         }
 947
 948         return IRQ_HANDLED;
 949 }
 950
 951 /**
 952  * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
 953  * @irq: unused
 954  * @data: pointer to our q_vector struct for this interrupt vector
 955  **/
 956 static irqreturn_t ixgbe_msix_clean_rx(int irq, void *data)
 957 {
 958         struct ixgbe_q_vector *q_vector = data;
 959         struct ixgbe_adapter  *adapter = q_vector->adapter;
 960         struct ixgbe_ring  *rx_ring;
 961         int r_idx;
 962
 963         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
 964         if (!q_vector->rxr_count)
 965                 return IRQ_HANDLED;
 966
 967         rx_ring = &(adapter->rx_ring[r_idx]);
 968         /* disable interrupts on this vector only */
 969         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, rx_ring->v_idx);
 970         rx_ring->total_bytes = 0;
 971         rx_ring->total_packets = 0;
 972         netif_rx_schedule(adapter->netdev, &q_vector->napi);
 973
 974         return IRQ_HANDLED;
 975 }
 976
 977 static irqreturn_t ixgbe_msix_clean_many(int irq, void *data)
 978 {
 979         ixgbe_msix_clean_rx(irq, data);
 980         ixgbe_msix_clean_tx(irq, data);
 981
 982         return IRQ_HANDLED;
 983 }
 984
 985 /**
 986  * ixgbe_clean_rxonly - msix (aka one shot) rx clean routine
 987  * @napi: napi struct with our devices info in it
 988  * @budget: amount of work driver is allowed to do this pass, in packets
 989  *
 990  **/
 991 static int ixgbe_clean_rxonly(struct napi_struct *napi, int budget)
 992 {
 993         struct ixgbe_q_vector *q_vector =
 994                                container_of(napi, struct ixgbe_q_vector, napi);
 995         struct ixgbe_adapter *adapter = q_vector->adapter;
 996         struct ixgbe_ring *rx_ring;
 997         int work_done = 0;
 998         long r_idx;
 999
1000         r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1001         rx_ring = &(adapter->rx_ring[r_idx]);
1002 #if defined(CONFIG_DCA) || defined (CONFIG_DCA_MODULE)
1003         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1004                 ixgbe_update_rx_dca(adapter, rx_ring);
1005 #endif
1006
1007         ixgbe_clean_rx_irq(adapter, rx_ring, &work_done, budget);
1008
1009         /* If all Rx work done, exit the polling mode */
1010         if (work_done < budget) {
1011                 netif_rx_complete(adapter->netdev, napi);
1012                 if (adapter->rx_eitr < IXGBE_MIN_ITR_USECS)
1013                         ixgbe_set_itr_msix(q_vector);
1014                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1015                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, rx_ring->v_idx);
1016         }
1017
1018         return work_done;
1019 }
1020
1021 static inline void map_vector_to_rxq(struct ixgbe_adapter *a, int v_idx,
1022                                      int r_idx)
1023 {
1024         a->q_vector[v_idx].adapter = a;
1025         set_bit(r_idx, a->q_vector[v_idx].rxr_idx);
1026         a->q_vector[v_idx].rxr_count++;
1027         a->rx_ring[r_idx].v_idx = 1 << v_idx;
1028 }
1029
1030 static inline void map_vector_to_txq(struct ixgbe_adapter *a, int v_idx,
1031                                      int r_idx)
1032 {
1033         a->q_vector[v_idx].adapter = a;
1034         set_bit(r_idx, a->q_vector[v_idx].txr_idx);
1035         a->q_vector[v_idx].txr_count++;
1036         a->tx_ring[r_idx].v_idx = 1 << v_idx;
1037 }
1038
1039 /**
1040  * ixgbe_map_rings_to_vectors - Maps descriptor rings to vectors
1041  * @adapter: board private structure to initialize
1042  * @vectors: allotted vector count for descriptor rings
1043  *
1044  * This function maps descriptor rings to the queue-specific vectors
1045  * we were allotted through the MSI-X enabling code.  Ideally, we'd have
1046  * one vector per ring/queue, but on a constrained vector budget, we
1047  * group the rings as "efficiently" as possible.  You would add new
1048  * mapping configurations in here.
1049  **/
1050 static int ixgbe_map_rings_to_vectors(struct ixgbe_adapter *adapter,
1051                                       int vectors)
1052 {
1053         int v_start = 0;
1054         int rxr_idx = 0, txr_idx = 0;
1055         int rxr_remaining = adapter->num_rx_queues;
1056         int txr_remaining = adapter->num_tx_queues;
1057         int i, j;
1058         int rqpv, tqpv;
1059         int err = 0;
1060
1061         /* No mapping required if MSI-X is disabled. */
1062         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1063                 goto out;
1064
1065         /*
1066          * The ideal configuration...
1067          * We have enough vectors to map one per queue.
1068          */
1069         if (vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1070                 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1071                         map_vector_to_rxq(adapter, v_start, rxr_idx);
1072
1073                 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1074                         map_vector_to_txq(adapter, v_start, txr_idx);
1075
1076                 goto out;
1077         }
1078
1079         /*
1080          * If we don't have enough vectors for a 1-to-1
1081          * mapping, we'll have to group them so there are
1082          * multiple queues per vector.
1083          */
1084         /* Re-adjusting *qpv takes care of the remainder. */
1085         for (i = v_start; i < vectors; i++) {
1086                 rqpv = DIV_ROUND_UP(rxr_remaining, vectors - i);
1087                 for (j = 0; j < rqpv; j++) {
1088                         map_vector_to_rxq(adapter, i, rxr_idx);
1089                         rxr_idx++;
1090                         rxr_remaining--;
1091                 }
1092         }
1093         for (i = v_start; i < vectors; i++) {
1094                 tqpv = DIV_ROUND_UP(txr_remaining, vectors - i);
1095                 for (j = 0; j < tqpv; j++) {
1096                         map_vector_to_txq(adapter, i, txr_idx);
1097                         txr_idx++;
1098                         txr_remaining--;
1099                 }
1100         }
1101
1102 out:
1103         return err;
1104 }
1105
1106 /**
1107  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
1108  * @adapter: board private structure
1109  *
1110  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
1111  * interrupts from the kernel.
1112  **/
1113 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
1114 {
1115         struct net_device *netdev = adapter->netdev;
1116         irqreturn_t (*handler)(int, void *);
1117         int i, vector, q_vectors, err;
1118
1119         /* Decrement for Other and TCP Timer vectors */
1120         q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1121
1122         /* Map the Tx/Rx rings to the vectors we were allotted. */
1123         err = ixgbe_map_rings_to_vectors(adapter, q_vectors);
1124         if (err)
1125                 goto out;
1126
1127 #define SET_HANDLER(_v) ((!(_v)->rxr_count) ? &ixgbe_msix_clean_tx : \
1128                          (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \
1129                          &ixgbe_msix_clean_many)
1130         for (vector = 0; vector < q_vectors; vector++) {
1131                 handler = SET_HANDLER(&adapter->q_vector[vector]);
1132                 sprintf(adapter->name[vector], "%s:v%d-%s",
1133                         netdev->name, vector,
1134                         (handler == &ixgbe_msix_clean_rx) ? "Rx" :
1135                          ((handler == &ixgbe_msix_clean_tx) ? "Tx" : "TxRx"));
1136                 err = request_irq(adapter->msix_entries[vector].vector,
1137                                   handler, 0, adapter->name[vector],
1138                                   &(adapter->q_vector[vector]));
1139                 if (err) {
1140                         DPRINTK(PROBE, ERR,
1141                                 "request_irq failed for MSIX interrupt "
1142                                 "Error: %d\n", err);
1143                         goto free_queue_irqs;
1144                 }
1145         }
1146
1147         sprintf(adapter->name[vector], "%s:lsc", netdev->name);
1148         err = request_irq(adapter->msix_entries[vector].vector,
1149                           &ixgbe_msix_lsc, 0, adapter->name[vector], netdev);
1150         if (err) {
1151                 DPRINTK(PROBE, ERR,
1152                         "request_irq for msix_lsc failed: %d\n", err);
1153                 goto free_queue_irqs;
1154         }
1155
1156         return 0;
1157
1158 free_queue_irqs:
1159         for (i = vector - 1; i >= 0; i--)
1160                 free_irq(adapter->msix_entries[--vector].vector,
1161                          &(adapter->q_vector[i]));
1162         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
1163         pci_disable_msix(adapter->pdev);
1164         kfree(adapter->msix_entries);
1165         adapter->msix_entries = NULL;
1166 out:
1167         return err;
1168 }
1169
1170 static void ixgbe_set_itr(struct ixgbe_adapter *adapter)
1171 {
1172         struct ixgbe_hw *hw = &adapter->hw;
1173         struct ixgbe_q_vector *q_vector = adapter->q_vector;
1174         u8 current_itr;
1175         u32 new_itr = q_vector->eitr;
1176         struct ixgbe_ring *rx_ring = &adapter->rx_ring[0];
1177         struct ixgbe_ring *tx_ring = &adapter->tx_ring[0];
1178
1179         q_vector->tx_eitr = ixgbe_update_itr(adapter, new_itr,
1180                                              q_vector->tx_eitr,
1181                                              tx_ring->total_packets,
1182                                              tx_ring->total_bytes);
1183         q_vector->rx_eitr = ixgbe_update_itr(adapter, new_itr,
1184                                              q_vector->rx_eitr,
1185                                              rx_ring->total_packets,
1186                                              rx_ring->total_bytes);
1187
1188         current_itr = max(q_vector->rx_eitr, q_vector->tx_eitr);
1189
1190         switch (current_itr) {
1191         /* counts and packets in update_itr are dependent on these numbers */
1192         case lowest_latency:
1193                 new_itr = 100000;
1194                 break;
1195         case low_latency:
1196                 new_itr = 20000; /* aka hwitr = ~200 */
1197                 break;
1198         case bulk_latency:
1199                 new_itr = 8000;
1200                 break;
1201         default:
1202                 break;
1203         }
1204
1205         if (new_itr != q_vector->eitr) {
1206                 u32 itr_reg;
1207                 /* do an exponential smoothing */
1208                 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
1209                 q_vector->eitr = new_itr;
1210                 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
1211                 /* must write high and low 16 bits to reset counter */
1212                 IXGBE_WRITE_REG(hw, IXGBE_EITR(0), itr_reg | (itr_reg)<<16);
1213         }
1214
1215         return;
1216 }
1217
1218 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter);
1219
1220 /**
1221  * ixgbe_intr - legacy mode Interrupt Handler
1222  * @irq: interrupt number
1223  * @data: pointer to a network interface device structure
1224  * @pt_regs: CPU registers structure
1225  **/
1226 static irqreturn_t ixgbe_intr(int irq, void *data)
1227 {
1228         struct net_device *netdev = data;
1229         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1230         struct ixgbe_hw *hw = &adapter->hw;
1231         u32 eicr;
1232
1233
1234         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
1235          * therefore no explict interrupt disable is necessary */
1236         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
1237         if (!eicr)
1238                 return IRQ_NONE;        /* Not our interrupt */
1239
1240         if (eicr & IXGBE_EICR_LSC) {
1241                 adapter->lsc_int++;
1242                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1243                         mod_timer(&adapter->watchdog_timer, jiffies);
1244         }
1245
1246
1247         if (netif_rx_schedule_prep(netdev, &adapter->q_vector[0].napi)) {
1248                 adapter->tx_ring[0].total_packets = 0;
1249                 adapter->tx_ring[0].total_bytes = 0;
1250                 adapter->rx_ring[0].total_packets = 0;
1251                 adapter->rx_ring[0].total_bytes = 0;
1252                 /* would disable interrupts here but EIAM disabled it */
1253                 __netif_rx_schedule(netdev, &adapter->q_vector[0].napi);
1254         }
1255
1256         return IRQ_HANDLED;
1257 }
1258
1259 static inline void ixgbe_reset_q_vectors(struct ixgbe_adapter *adapter)
1260 {
1261         int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1262
1263         for (i = 0; i < q_vectors; i++) {
1264                 struct ixgbe_q_vector *q_vector = &adapter->q_vector[i];
1265                 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES);
1266                 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES);
1267                 q_vector->rxr_count = 0;
1268                 q_vector->txr_count = 0;
1269         }
1270 }
1271
1272 /**
1273  * ixgbe_request_irq - initialize interrupts
1274  * @adapter: board private structure
1275  *
1276  * Attempts to configure interrupts using the best available
1277  * capabilities of the hardware and kernel.
1278  **/
1279 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
1280 {
1281         struct net_device *netdev = adapter->netdev;
1282         int err;
1283
1284         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1285                 err = ixgbe_request_msix_irqs(adapter);
1286         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1287                 err = request_irq(adapter->pdev->irq, &ixgbe_intr, 0,
1288                                   netdev->name, netdev);
1289         } else {
1290                 err = request_irq(adapter->pdev->irq, &ixgbe_intr, IRQF_SHARED,
1291                                   netdev->name, netdev);
1292         }
1293
1294         if (err)
1295                 DPRINTK(PROBE, ERR, "request_irq failed, Error %d\n", err);
1296
1297         return err;
1298 }
1299
1300 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
1301 {
1302         struct net_device *netdev = adapter->netdev;
1303
1304         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1305                 int i, q_vectors;
1306
1307                 q_vectors = adapter->num_msix_vectors;
1308
1309                 i = q_vectors - 1;
1310                 free_irq(adapter->msix_entries[i].vector, netdev);
1311
1312                 i--;
1313                 for (; i >= 0; i--) {
1314                         free_irq(adapter->msix_entries[i].vector,
1315                                  &(adapter->q_vector[i]));
1316                 }
1317
1318                 ixgbe_reset_q_vectors(adapter);
1319         } else {
1320                 free_irq(adapter->pdev->irq, netdev);
1321         }
1322 }
1323
1324 /**
1325  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
1326  * @adapter: board private structure
1327  **/
1328 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
1329 {
1330         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
1331         IXGBE_WRITE_FLUSH(&adapter->hw);
1332         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1333                 int i;
1334                 for (i = 0; i < adapter->num_msix_vectors; i++)
1335                         synchronize_irq(adapter->msix_entries[i].vector);
1336         } else {
1337                 synchronize_irq(adapter->pdev->irq);
1338         }
1339 }
1340
1341 /**
1342  * ixgbe_irq_enable - Enable default interrupt generation settings
1343  * @adapter: board private structure
1344  **/
1345 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter)
1346 {
1347         u32 mask;
1348         mask = IXGBE_EIMS_ENABLE_MASK;
1349         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1350         IXGBE_WRITE_FLUSH(&adapter->hw);
1351 }
1352
1353 /**
1354  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
1355  *
1356  **/
1357 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
1358 {
1359         struct ixgbe_hw *hw = &adapter->hw;
1360
1361         IXGBE_WRITE_REG(hw, IXGBE_EITR(0),
1362                         EITR_INTS_PER_SEC_TO_REG(adapter->rx_eitr));
1363
1364         ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(0), 0);
1365         ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(0), 0);
1366
1367         map_vector_to_rxq(adapter, 0, 0);
1368         map_vector_to_txq(adapter, 0, 0);
1369
1370         DPRINTK(HW, INFO, "Legacy interrupt IVAR setup done\n");
1371 }
1372
1373 /**
1374  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
1375  * @adapter: board private structure
1376  *
1377  * Configure the Tx unit of the MAC after a reset.
1378  **/
1379 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
1380 {
1381         u64 tdba, tdwba;
1382         struct ixgbe_hw *hw = &adapter->hw;
1383         u32 i, j, tdlen, txctrl;
1384
1385         /* Setup the HW Tx Head and Tail descriptor pointers */
1386         for (i = 0; i < adapter->num_tx_queues; i++) {
1387                 struct ixgbe_ring *ring = &adapter->tx_ring[i];
1388                 j = ring->reg_idx;
1389                 tdba = ring->dma;
1390                 tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc);
1391                 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j),
1392                                 (tdba & DMA_32BIT_MASK));
1393                 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32));
1394                 tdwba = ring->dma +
1395                         (ring->count * sizeof(union ixgbe_adv_tx_desc));
1396                 tdwba |= IXGBE_TDWBAL_HEAD_WB_ENABLE;
1397                 IXGBE_WRITE_REG(hw, IXGBE_TDWBAL(j), tdwba & DMA_32BIT_MASK);
1398                 IXGBE_WRITE_REG(hw, IXGBE_TDWBAH(j), (tdwba >> 32));
1399                 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), tdlen);
1400                 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0);
1401                 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0);
1402                 adapter->tx_ring[i].head = IXGBE_TDH(j);
1403                 adapter->tx_ring[i].tail = IXGBE_TDT(j);
1404                 /* Disable Tx Head Writeback RO bit, since this hoses
1405                  * bookkeeping if things aren't delivered in order.
1406                  */
1407                 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j));
1408                 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
1409                 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl);
1410         }
1411 }
1412
1413 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1414
1415 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter, int index)
1416 {
1417         struct ixgbe_ring *rx_ring;
1418         u32 srrctl;
1419         int queue0;
1420         unsigned long mask;
1421
1422         /* program one srrctl register per VMDq index */
1423         if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
1424                 long shift, len;
1425                 mask = (unsigned long) adapter->ring_feature[RING_F_RSS].mask;
1426                 len = sizeof(adapter->ring_feature[RING_F_VMDQ].mask) * 8;
1427                 shift = find_first_bit(&mask, len);
1428                 queue0 = index & mask;
1429                 index = (index & mask) >> shift;
1430         /* program one srrctl per RSS queue since RDRXCTL.MVMEN is enabled */
1431         } else {
1432                 mask = (unsigned long) adapter->ring_feature[RING_F_RSS].mask;
1433                 queue0 = index & mask;
1434                 index = index & mask;
1435         }
1436
1437         rx_ring = &adapter->rx_ring[queue0];
1438
1439         srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(index));
1440
1441         srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
1442         srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
1443
1444         if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1445                 srrctl |= IXGBE_RXBUFFER_2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1446                 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1447                 srrctl |= ((IXGBE_RX_HDR_SIZE <<
1448                             IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1449                            IXGBE_SRRCTL_BSIZEHDR_MASK);
1450         } else {
1451                 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1452
1453                 if (rx_ring->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1454                         srrctl |= IXGBE_RXBUFFER_2048 >>
1455                                   IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1456                 else
1457                         srrctl |= rx_ring->rx_buf_len >>
1458                                   IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1459         }
1460         IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(index), srrctl);
1461 }
1462
1463 /**
1464  * ixgbe_get_skb_hdr - helper function for LRO header processing
1465  * @skb: pointer to sk_buff to be added to LRO packet
1466  * @iphdr: pointer to tcp header structure
1467  * @tcph: pointer to tcp header structure
1468  * @hdr_flags: pointer to header flags
1469  * @priv: private data
1470  **/
1471 static int ixgbe_get_skb_hdr(struct sk_buff *skb, void **iphdr, void **tcph,
1472                              u64 *hdr_flags, void *priv)
1473 {
1474         union ixgbe_adv_rx_desc *rx_desc = priv;
1475
1476         /* Verify that this is a valid IPv4 TCP packet */
1477         if (!((ixgbe_get_pkt_info(rx_desc) & IXGBE_RXDADV_PKTTYPE_IPV4) &&
1478              (ixgbe_get_pkt_info(rx_desc) & IXGBE_RXDADV_PKTTYPE_TCP)))
1479                 return -1;
1480
1481         /* Set network headers */
1482         skb_reset_network_header(skb);
1483         skb_set_transport_header(skb, ip_hdrlen(skb));
1484         *iphdr = ip_hdr(skb);
1485         *tcph = tcp_hdr(skb);
1486         *hdr_flags = LRO_IPV4 | LRO_TCP;
1487         return 0;
1488 }
1489
1490 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1491                         (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1492
1493 /**
1494  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
1495  * @adapter: board private structure
1496  *
1497  * Configure the Rx unit of the MAC after a reset.
1498  **/
1499 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
1500 {
1501         u64 rdba;
1502         struct ixgbe_hw *hw = &adapter->hw;
1503         struct net_device *netdev = adapter->netdev;
1504         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1505         int i, j;
1506         u32 rdlen, rxctrl, rxcsum;
1507         static const u32 seed[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
1508                           0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
1509                           0x6A3E67EA, 0x14364D17, 0x3BED200D};
1510         u32 fctrl, hlreg0;
1511         u32 pages;
1512         u32 reta = 0, mrqc;
1513         u32 rdrxctl;
1514         int rx_buf_len;
1515
1516         /* Decide whether to use packet split mode or not */
1517         if (netdev->mtu > ETH_DATA_LEN)
1518                 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1519         else
1520                 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
1521
1522         /* Set the RX buffer length according to the mode */
1523         if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1524                 rx_buf_len = IXGBE_RX_HDR_SIZE;
1525         } else {
1526                 if (netdev->mtu <= ETH_DATA_LEN)
1527                         rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1528                 else
1529                         rx_buf_len = ALIGN(max_frame, 1024);
1530         }
1531
1532         fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
1533         fctrl |= IXGBE_FCTRL_BAM;
1534         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
1535         IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl);
1536
1537         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
1538         if (adapter->netdev->mtu <= ETH_DATA_LEN)
1539                 hlreg0 &= ~IXGBE_HLREG0_JUMBOEN;
1540         else
1541                 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
1542         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
1543
1544         pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1545
1546         rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1547         /* disable receives while setting up the descriptors */
1548         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1549         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
1550
1551         /* Setup the HW Rx Head and Tail Descriptor Pointers and
1552          * the Base and Length of the Rx Descriptor Ring */
1553         for (i = 0; i < adapter->num_rx_queues; i++) {
1554                 rdba = adapter->rx_ring[i].dma;
1555                 j = adapter->rx_ring[i].reg_idx;
1556                 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), (rdba & DMA_32BIT_MASK));
1557                 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32));
1558                 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j), rdlen);
1559                 IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0);
1560                 IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0);
1561                 adapter->rx_ring[i].head = IXGBE_RDH(j);
1562                 adapter->rx_ring[i].tail = IXGBE_RDT(j);
1563                 adapter->rx_ring[i].rx_buf_len = rx_buf_len;
1564                 /* Intitial LRO Settings */
1565                 adapter->rx_ring[i].lro_mgr.max_aggr = IXGBE_MAX_LRO_AGGREGATE;
1566                 adapter->rx_ring[i].lro_mgr.max_desc = IXGBE_MAX_LRO_DESCRIPTORS;
1567                 adapter->rx_ring[i].lro_mgr.get_skb_header = ixgbe_get_skb_hdr;
1568                 adapter->rx_ring[i].lro_mgr.features = LRO_F_EXTRACT_VLAN_ID;
1569                 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL))
1570                         adapter->rx_ring[i].lro_mgr.features |= LRO_F_NAPI;
1571                 adapter->rx_ring[i].lro_mgr.dev = adapter->netdev;
1572                 adapter->rx_ring[i].lro_mgr.ip_summed = CHECKSUM_UNNECESSARY;
1573                 adapter->rx_ring[i].lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY;
1574
1575                 ixgbe_configure_srrctl(adapter, j);
1576         }
1577
1578         /*
1579          * For VMDq support of different descriptor types or
1580          * buffer sizes through the use of multiple SRRCTL
1581          * registers, RDRXCTL.MVMEN must be set to 1
1582          *
1583          * also, the manual doesn't mention it clearly but DCA hints
1584          * will only use queue 0's tags unless this bit is set.  Side
1585          * effects of setting this bit are only that SRRCTL must be
1586          * fully programmed [0..15]
1587          */
1588         rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
1589         rdrxctl |= IXGBE_RDRXCTL_MVMEN;
1590         IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
1591
1592
1593         if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
1594                 /* Fill out redirection table */
1595                 for (i = 0, j = 0; i < 128; i++, j++) {
1596                         if (j == adapter->ring_feature[RING_F_RSS].indices)
1597                                 j = 0;
1598                         /* reta = 4-byte sliding window of
1599                          * 0x00..(indices-1)(indices-1)00..etc. */
1600                         reta = (reta << 8) | (j * 0x11);
1601                         if ((i & 3) == 3)
1602                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
1603                 }
1604
1605                 /* Fill out hash function seeds */
1606                 for (i = 0; i < 10; i++)
1607                         IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), seed[i]);
1608
1609                 mrqc = IXGBE_MRQC_RSSEN
1610                     /* Perform hash on these packet types */
1611                        | IXGBE_MRQC_RSS_FIELD_IPV4
1612                        | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
1613                        | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
1614                        | IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP
1615                        | IXGBE_MRQC_RSS_FIELD_IPV6_EX
1616                        | IXGBE_MRQC_RSS_FIELD_IPV6
1617                        | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
1618                        | IXGBE_MRQC_RSS_FIELD_IPV6_UDP
1619                        | IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP;
1620                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
1621         }
1622
1623         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
1624
1625         if (adapter->flags & IXGBE_FLAG_RSS_ENABLED ||
1626             adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED) {
1627                 /* Disable indicating checksum in descriptor, enables
1628                  * RSS hash */
1629                 rxcsum |= IXGBE_RXCSUM_PCSD;
1630         }
1631         if (!(rxcsum & IXGBE_RXCSUM_PCSD)) {
1632                 /* Enable IPv4 payload checksum for UDP fragments
1633                  * if PCSD is not set */
1634                 rxcsum |= IXGBE_RXCSUM_IPPCSE;
1635         }
1636
1637         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
1638 }
1639
1640 static void ixgbe_vlan_rx_register(struct net_device *netdev,
1641                                    struct vlan_group *grp)
1642 {
1643         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1644         u32 ctrl;
1645
1646         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1647                 ixgbe_irq_disable(adapter);
1648         adapter->vlgrp = grp;
1649
1650         if (grp) {
1651                 /* enable VLAN tag insert/strip */
1652                 ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL);
1653                 ctrl |= IXGBE_VLNCTRL_VME;
1654                 ctrl &= ~IXGBE_VLNCTRL_CFIEN;
1655                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl);
1656         }
1657
1658         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1659                 ixgbe_irq_enable(adapter);
1660 }
1661
1662 static void ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1663 {
1664         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1665
1666         /* add VID to filter table */
1667         ixgbe_set_vfta(&adapter->hw, vid, 0, true);
1668 }
1669
1670 static void ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1671 {
1672         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1673
1674         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1675                 ixgbe_irq_disable(adapter);
1676
1677         vlan_group_set_device(adapter->vlgrp, vid, NULL);
1678
1679         if (!test_bit(__IXGBE_DOWN, &adapter->state))
1680                 ixgbe_irq_enable(adapter);
1681
1682         /* remove VID from filter table */
1683         ixgbe_set_vfta(&adapter->hw, vid, 0, false);
1684 }
1685
1686 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
1687 {
1688         ixgbe_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1689
1690         if (adapter->vlgrp) {
1691                 u16 vid;
1692                 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1693                         if (!vlan_group_get_device(adapter->vlgrp, vid))
1694                                 continue;
1695                         ixgbe_vlan_rx_add_vid(adapter->netdev, vid);
1696                 }
1697         }
1698 }
1699
1700 static u8 *ixgbe_addr_list_itr(struct ixgbe_hw *hw, u8 **mc_addr_ptr, u32 *vmdq)
1701 {
1702         struct dev_mc_list *mc_ptr;
1703         u8 *addr = *mc_addr_ptr;
1704         *vmdq = 0;
1705
1706         mc_ptr = container_of(addr, struct dev_mc_list, dmi_addr[0]);
1707         if (mc_ptr->next)
1708                 *mc_addr_ptr = mc_ptr->next->dmi_addr;
1709         else
1710                 *mc_addr_ptr = NULL;
1711
1712         return addr;
1713 }
1714
1715 /**
1716  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
1717  * @netdev: network interface device structure
1718  *
1719  * The set_rx_method entry point is called whenever the unicast/multicast
1720  * address list or the network interface flags are updated.  This routine is
1721  * responsible for configuring the hardware for proper unicast, multicast and
1722  * promiscuous mode.
1723  **/
1724 static void ixgbe_set_rx_mode(struct net_device *netdev)
1725 {
1726         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1727         struct ixgbe_hw *hw = &adapter->hw;
1728         u32 fctrl, vlnctrl;
1729         u8 *addr_list = NULL;
1730         int addr_count = 0;
1731
1732         /* Check for Promiscuous and All Multicast modes */
1733
1734         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1735         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
1736
1737         if (netdev->flags & IFF_PROMISC) {
1738                 hw->addr_ctrl.user_set_promisc = 1;
1739                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1740                 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
1741         } else {
1742                 if (netdev->flags & IFF_ALLMULTI) {
1743                         fctrl |= IXGBE_FCTRL_MPE;
1744                         fctrl &= ~IXGBE_FCTRL_UPE;
1745                 } else {
1746                         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1747                 }
1748                 vlnctrl |= IXGBE_VLNCTRL_VFE;
1749                 hw->addr_ctrl.user_set_promisc = 0;
1750         }
1751
1752         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
1753         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
1754
1755         /* reprogram secondary unicast list */
1756         addr_count = netdev->uc_count;
1757         if (addr_count)
1758                 addr_list = netdev->uc_list->dmi_addr;
1759         ixgbe_update_uc_addr_list(hw, addr_list, addr_count,
1760                                   ixgbe_addr_list_itr);
1761
1762         /* reprogram multicast list */
1763         addr_count = netdev->mc_count;
1764         if (addr_count)
1765                 addr_list = netdev->mc_list->dmi_addr;
1766         ixgbe_update_mc_addr_list(hw, addr_list, addr_count,
1767                                   ixgbe_addr_list_itr);
1768 }
1769
1770 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
1771 {
1772         int q_idx;
1773         struct ixgbe_q_vector *q_vector;
1774         int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1775
1776         /* legacy and MSI only use one vector */
1777         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1778                 q_vectors = 1;
1779
1780         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1781                 q_vector = &adapter->q_vector[q_idx];
1782                 if (!q_vector->rxr_count)
1783                         continue;
1784                 napi_enable(&q_vector->napi);
1785         }
1786 }
1787
1788 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
1789 {
1790         int q_idx;
1791         struct ixgbe_q_vector *q_vector;
1792         int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1793
1794         /* legacy and MSI only use one vector */
1795         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1796                 q_vectors = 1;
1797
1798         for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1799                 q_vector = &adapter->q_vector[q_idx];
1800                 if (!q_vector->rxr_count)
1801                         continue;
1802                 napi_disable(&q_vector->napi);
1803         }
1804 }
1805
1806 static void ixgbe_configure(struct ixgbe_adapter *adapter)
1807 {
1808         struct net_device *netdev = adapter->netdev;
1809         int i;
1810
1811         ixgbe_set_rx_mode(netdev);
1812
1813         ixgbe_restore_vlan(adapter);
1814
1815         ixgbe_configure_tx(adapter);
1816         ixgbe_configure_rx(adapter);
1817         for (i = 0; i < adapter->num_rx_queues; i++)
1818                 ixgbe_alloc_rx_buffers(adapter, &adapter->rx_ring[i],
1819                                            (adapter->rx_ring[i].count - 1));
1820 }
1821
1822 static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
1823 {
1824         struct net_device *netdev = adapter->netdev;
1825         struct ixgbe_hw *hw = &adapter->hw;
1826         int i, j = 0;
1827         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1828         u32 txdctl, rxdctl, mhadd;
1829         u32 gpie;
1830
1831         ixgbe_get_hw_control(adapter);
1832
1833         if ((adapter->flags & IXGBE_FLAG_MSIX_ENABLED) ||
1834             (adapter->flags & IXGBE_FLAG_MSI_ENABLED)) {
1835                 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1836                         gpie = (IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_EIAME |
1837                                 IXGBE_GPIE_PBA_SUPPORT | IXGBE_GPIE_OCD);
1838                 } else {
1839                         /* MSI only */
1840                         gpie = 0;
1841                 }
1842                 /* XXX: to interrupt immediately for EICS writes, enable this */
1843                 /* gpie |= IXGBE_GPIE_EIMEN; */
1844                 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
1845         }
1846
1847         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
1848                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
1849                  * specifically only auto mask tx and rx interrupts */
1850                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
1851         }
1852
1853         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
1854         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
1855                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
1856                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
1857
1858                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
1859         }
1860
1861         for (i = 0; i < adapter->num_tx_queues; i++) {
1862                 j = adapter->tx_ring[i].reg_idx;
1863                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
1864                 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
1865                 txdctl |= (8 << 16);
1866                 txdctl |= IXGBE_TXDCTL_ENABLE;
1867                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
1868         }
1869
1870         for (i = 0; i < adapter->num_rx_queues; i++) {
1871                 j = adapter->rx_ring[i].reg_idx;
1872                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
1873                 /* enable PTHRESH=32 descriptors (half the internal cache)
1874                  * and HTHRESH=0 descriptors (to minimize latency on fetch),
1875                  * this also removes a pesky rx_no_buffer_count increment */
1876                 rxdctl |= 0x0020;
1877                 rxdctl |= IXGBE_RXDCTL_ENABLE;
1878                 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), rxdctl);
1879         }
1880         /* enable all receives */
1881         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1882         rxdctl |= (IXGBE_RXCTRL_DMBYPS | IXGBE_RXCTRL_RXEN);
1883         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxdctl);
1884
1885         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
1886                 ixgbe_configure_msix(adapter);
1887         else
1888                 ixgbe_configure_msi_and_legacy(adapter);
1889
1890         clear_bit(__IXGBE_DOWN, &adapter->state);
1891         ixgbe_napi_enable_all(adapter);
1892
1893         /* clear any pending interrupts, may auto mask */
1894         IXGBE_READ_REG(hw, IXGBE_EICR);
1895
1896         ixgbe_irq_enable(adapter);
1897
1898         /* bring the link up in the watchdog, this could race with our first
1899          * link up interrupt but shouldn't be a problem */
1900         mod_timer(&adapter->watchdog_timer, jiffies);
1901         return 0;
1902 }
1903
1904 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
1905 {
1906         WARN_ON(in_interrupt());
1907         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
1908                 msleep(1);
1909         ixgbe_down(adapter);
1910         ixgbe_up(adapter);
1911         clear_bit(__IXGBE_RESETTING, &adapter->state);
1912 }
1913
1914 int ixgbe_up(struct ixgbe_adapter *adapter)
1915 {
1916         /* hardware has been reset, we need to reload some things */
1917         ixgbe_configure(adapter);
1918
1919         return ixgbe_up_complete(adapter);
1920 }
1921
1922 void ixgbe_reset(struct ixgbe_adapter *adapter)
1923 {
1924         if (ixgbe_init_hw(&adapter->hw))
1925                 DPRINTK(PROBE, ERR, "Hardware Error\n");
1926
1927         /* reprogram the RAR[0] in case user changed it. */
1928         ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV);
1929
1930 }
1931
1932 #ifdef CONFIG_PM
1933 static int ixgbe_resume(struct pci_dev *pdev)
1934 {
1935         struct net_device *netdev = pci_get_drvdata(pdev);
1936         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1937         u32 err;
1938
1939         pci_set_power_state(pdev, PCI_D0);
1940         pci_restore_state(pdev);
1941         err = pci_enable_device(pdev);
1942         if (err) {
1943                 printk(KERN_ERR "ixgbe: Cannot enable PCI device from " \
1944                                 "suspend\n");
1945                 return err;
1946         }
1947         pci_set_master(pdev);
1948
1949         pci_enable_wake(pdev, PCI_D3hot, 0);
1950         pci_enable_wake(pdev, PCI_D3cold, 0);
1951
1952         if (netif_running(netdev)) {
1953                 err = ixgbe_request_irq(adapter);
1954                 if (err)
1955                         return err;
1956         }
1957
1958         ixgbe_reset(adapter);
1959
1960         if (netif_running(netdev))
1961                 ixgbe_up(adapter);
1962
1963         netif_device_attach(netdev);
1964
1965         return 0;
1966 }
1967 #endif
1968
1969 /**
1970  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
1971  * @adapter: board private structure
1972  * @rx_ring: ring to free buffers from
1973  **/
1974 static void ixgbe_clean_rx_ring(struct ixgbe_adapter *adapter,
1975                                 struct ixgbe_ring *rx_ring)
1976 {
1977         struct pci_dev *pdev = adapter->pdev;
1978         unsigned long size;
1979         unsigned int i;
1980
1981         /* Free all the Rx ring sk_buffs */
1982
1983         for (i = 0; i < rx_ring->count; i++) {
1984                 struct ixgbe_rx_buffer *rx_buffer_info;
1985
1986                 rx_buffer_info = &rx_ring->rx_buffer_info[i];
1987                 if (rx_buffer_info->dma) {
1988                         pci_unmap_single(pdev, rx_buffer_info->dma,
1989                                          rx_ring->rx_buf_len,
1990                                          PCI_DMA_FROMDEVICE);
1991                         rx_buffer_info->dma = 0;
1992                 }
1993                 if (rx_buffer_info->skb) {
1994                         dev_kfree_skb(rx_buffer_info->skb);
1995                         rx_buffer_info->skb = NULL;
1996                 }
1997                 if (!rx_buffer_info->page)
1998                         continue;
1999                 pci_unmap_page(pdev, rx_buffer_info->page_dma, PAGE_SIZE,
2000                                PCI_DMA_FROMDEVICE);
2001                 rx_buffer_info->page_dma = 0;
2002
2003                 put_page(rx_buffer_info->page);
2004                 rx_buffer_info->page = NULL;
2005         }
2006
2007         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
2008         memset(rx_ring->rx_buffer_info, 0, size);
2009
2010         /* Zero out the descriptor ring */
2011         memset(rx_ring->desc, 0, rx_ring->size);
2012
2013         rx_ring->next_to_clean = 0;
2014         rx_ring->next_to_use = 0;
2015
2016         writel(0, adapter->hw.hw_addr + rx_ring->head);
2017         writel(0, adapter->hw.hw_addr + rx_ring->tail);
2018 }
2019
2020 /**
2021  * ixgbe_clean_tx_ring - Free Tx Buffers
2022  * @adapter: board private structure
2023  * @tx_ring: ring to be cleaned
2024  **/
2025 static void ixgbe_clean_tx_ring(struct ixgbe_adapter *adapter,
2026                                 struct ixgbe_ring *tx_ring)
2027 {
2028         struct ixgbe_tx_buffer *tx_buffer_info;
2029         unsigned long size;
2030         unsigned int i;
2031
2032         /* Free all the Tx ring sk_buffs */
2033
2034         for (i = 0; i < tx_ring->count; i++) {
2035                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2036                 ixgbe_unmap_and_free_tx_resource(adapter, tx_buffer_info);
2037         }
2038
2039         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
2040         memset(tx_ring->tx_buffer_info, 0, size);
2041
2042         /* Zero out the descriptor ring */
2043         memset(tx_ring->desc, 0, tx_ring->size);
2044
2045         tx_ring->next_to_use = 0;
2046         tx_ring->next_to_clean = 0;
2047
2048         writel(0, adapter->hw.hw_addr + tx_ring->head);
2049         writel(0, adapter->hw.hw_addr + tx_ring->tail);
2050 }
2051
2052 /**
2053  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
2054  * @adapter: board private structure
2055  **/
2056 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
2057 {
2058         int i;
2059
2060         for (i = 0; i < adapter->num_rx_queues; i++)
2061                 ixgbe_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2062 }
2063
2064 /**
2065  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
2066  * @adapter: board private structure
2067  **/
2068 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
2069 {
2070         int i;
2071
2072         for (i = 0; i < adapter->num_tx_queues; i++)
2073                 ixgbe_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2074 }
2075
2076 void ixgbe_down(struct ixgbe_adapter *adapter)
2077 {
2078         struct net_device *netdev = adapter->netdev;
2079         u32 rxctrl;
2080
2081         /* signal that we are down to the interrupt handler */
2082         set_bit(__IXGBE_DOWN, &adapter->state);
2083
2084         /* disable receives */
2085         rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);
2086         IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL,
2087                         rxctrl & ~IXGBE_RXCTRL_RXEN);
2088
2089         netif_tx_disable(netdev);
2090
2091         /* disable transmits in the hardware */
2092
2093         /* flush both disables */
2094         IXGBE_WRITE_FLUSH(&adapter->hw);
2095         msleep(10);
2096
2097         ixgbe_irq_disable(adapter);
2098
2099         ixgbe_napi_disable_all(adapter);
2100         del_timer_sync(&adapter->watchdog_timer);
2101
2102         netif_carrier_off(netdev);
2103         netif_tx_stop_all_queues(netdev);
2104
2105 #if defined(CONFIG_DCA) || defined (CONFIG_DCA_MODULE)
2106         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
2107                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
2108                 dca_remove_requester(&adapter->pdev->dev);
2109         }
2110
2111 #endif
2112         if (!pci_channel_offline(adapter->pdev))
2113                 ixgbe_reset(adapter);
2114         ixgbe_clean_all_tx_rings(adapter);
2115         ixgbe_clean_all_rx_rings(adapter);
2116
2117 #if defined(CONFIG_DCA) || defined (CONFIG_DCA_MODULE)
2118         /* since we reset the hardware DCA settings were cleared */
2119         if (dca_add_requester(&adapter->pdev->dev) == 0) {
2120                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
2121                 /* always use CB2 mode, difference is masked
2122                  * in the CB driver */
2123                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
2124                 ixgbe_setup_dca(adapter);
2125         }
2126 #endif
2127 }
2128
2129 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
2130 {
2131         struct net_device *netdev = pci_get_drvdata(pdev);
2132         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2133 #ifdef CONFIG_PM
2134         int retval = 0;
2135 #endif
2136
2137         netif_device_detach(netdev);
2138
2139         if (netif_running(netdev)) {
2140                 ixgbe_down(adapter);
2141                 ixgbe_free_irq(adapter);
2142         }
2143
2144 #ifdef CONFIG_PM
2145         retval = pci_save_state(pdev);
2146         if (retval)
2147                 return retval;
2148 #endif
2149
2150         pci_enable_wake(pdev, PCI_D3hot, 0);
2151         pci_enable_wake(pdev, PCI_D3cold, 0);
2152
2153         ixgbe_release_hw_control(adapter);
2154
2155         pci_disable_device(pdev);
2156
2157         pci_set_power_state(pdev, pci_choose_state(pdev, state));
2158
2159         return 0;
2160 }
2161
2162 static void ixgbe_shutdown(struct pci_dev *pdev)
2163 {
2164         ixgbe_suspend(pdev, PMSG_SUSPEND);
2165 }
2166
2167 /**
2168  * ixgbe_poll - NAPI Rx polling callback
2169  * @napi: structure for representing this polling device
2170  * @budget: how many packets driver is allowed to clean
2171  *
2172  * This function is used for legacy and MSI, NAPI mode
2173  **/
2174 static int ixgbe_poll(struct napi_struct *napi, int budget)
2175 {
2176         struct ixgbe_q_vector *q_vector = container_of(napi,
2177                                           struct ixgbe_q_vector, napi);
2178         struct ixgbe_adapter *adapter = q_vector->adapter;
2179         int tx_cleaned = 0, work_done = 0;
2180
2181 #if defined(CONFIG_DCA) || defined (CONFIG_DCA_MODULE)
2182         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
2183                 ixgbe_update_tx_dca(adapter, adapter->tx_ring);
2184                 ixgbe_update_rx_dca(adapter, adapter->rx_ring);
2185         }
2186 #endif
2187
2188         tx_cleaned = ixgbe_clean_tx_irq(adapter, adapter->tx_ring);
2189         ixgbe_clean_rx_irq(adapter, adapter->rx_ring, &work_done, budget);
2190
2191         if (tx_cleaned)
2192                 work_done = budget;
2193
2194         /* If budget not fully consumed, exit the polling mode */
2195         if (work_done < budget) {
2196                 netif_rx_complete(adapter->netdev, napi);
2197                 if (adapter->rx_eitr < IXGBE_MIN_ITR_USECS)
2198                         ixgbe_set_itr(adapter);
2199                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2200                         ixgbe_irq_enable(adapter);
2201         }
2202
2203         return work_done;
2204 }
2205
2206 /**
2207  * ixgbe_tx_timeout - Respond to a Tx Hang
2208  * @netdev: network interface device structure
2209  **/
2210 static void ixgbe_tx_timeout(struct net_device *netdev)
2211 {
2212         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2213
2214         /* Do the reset outside of interrupt context */
2215         schedule_work(&adapter->reset_task);
2216 }
2217
2218 static void ixgbe_reset_task(struct work_struct *work)
2219 {
2220         struct ixgbe_adapter *adapter;
2221         adapter = container_of(work, struct ixgbe_adapter, reset_task);
2222
2223         adapter->tx_timeout_count++;
2224
2225         ixgbe_reinit_locked(adapter);
2226 }
2227
2228 static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter *adapter,
2229                                        int vectors)
2230 {
2231         int err, vector_threshold;
2232
2233         /* We'll want at least 3 (vector_threshold):
2234          * 1) TxQ[0] Cleanup
2235          * 2) RxQ[0] Cleanup
2236          * 3) Other (Link Status Change, etc.)
2237          * 4) TCP Timer (optional)
2238          */
2239         vector_threshold = MIN_MSIX_COUNT;
2240
2241         /* The more we get, the more we will assign to Tx/Rx Cleanup
2242          * for the separate queues...where Rx Cleanup >= Tx Cleanup.
2243          * Right now, we simply care about how many we'll get; we'll
2244          * set them up later while requesting irq's.
2245          */
2246         while (vectors >= vector_threshold) {
2247                 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
2248                                       vectors);
2249                 if (!err) /* Success in acquiring all requested vectors. */
2250                         break;
2251                 else if (err < 0)
2252                         vectors = 0; /* Nasty failure, quit now */
2253                 else /* err == number of vectors we should try again with */
2254                         vectors = err;
2255         }
2256
2257         if (vectors < vector_threshold) {
2258                 /* Can't allocate enough MSI-X interrupts?  Oh well.
2259                  * This just means we'll go with either a single MSI
2260                  * vector or fall back to legacy interrupts.
2261                  */
2262                 DPRINTK(HW, DEBUG, "Unable to allocate MSI-X interrupts\n");
2263                 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2264                 kfree(adapter->msix_entries);
2265                 adapter->msix_entries = NULL;
2266                 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2267                 adapter->num_tx_queues = 1;
2268                 adapter->num_rx_queues = 1;
2269         } else {
2270                 adapter->flags |= IXGBE_FLAG_MSIX_ENABLED; /* Woot! */
2271                 adapter->num_msix_vectors = vectors;
2272         }
2273 }
2274
2275 static void __devinit ixgbe_set_num_queues(struct ixgbe_adapter *adapter)
2276 {
2277         int nrq, ntq;
2278         int feature_mask = 0, rss_i, rss_m;
2279
2280         /* Number of supported queues */
2281         switch (adapter->hw.mac.type) {
2282         case ixgbe_mac_82598EB:
2283                 rss_i = adapter->ring_feature[RING_F_RSS].indices;
2284                 rss_m = 0;
2285                 feature_mask |= IXGBE_FLAG_RSS_ENABLED;
2286
2287                 switch (adapter->flags & feature_mask) {
2288                 case (IXGBE_FLAG_RSS_ENABLED):
2289                         rss_m = 0xF;
2290                         nrq = rss_i;
2291                         ntq = rss_i;
2292                         break;
2293                 case 0:
2294                 default:
2295                         rss_i = 0;
2296                         rss_m = 0;
2297                         nrq = 1;
2298                         ntq = 1;
2299                         break;
2300                 }
2301
2302                 adapter->ring_feature[RING_F_RSS].indices = rss_i;
2303                 adapter->ring_feature[RING_F_RSS].mask = rss_m;
2304                 break;
2305         default:
2306                 nrq = 1;
2307                 ntq = 1;
2308                 break;
2309         }
2310
2311         adapter->num_rx_queues = nrq;
2312         adapter->num_tx_queues = ntq;
2313 }
2314
2315 /**
2316  * ixgbe_cache_ring_register - Descriptor ring to register mapping
2317  * @adapter: board private structure to initialize
2318  *
2319  * Once we know the feature-set enabled for the device, we'll cache
2320  * the register offset the descriptor ring is assigned to.
2321  **/
2322 static void __devinit ixgbe_cache_ring_register(struct ixgbe_adapter *adapter)
2323 {
2324         /* TODO: Remove all uses of the indices in the cases where multiple
2325          *       features are OR'd together, if the feature set makes sense.
2326          */
2327         int feature_mask = 0, rss_i;
2328         int i, txr_idx, rxr_idx;
2329
2330         /* Number of supported queues */
2331         switch (adapter->hw.mac.type) {
2332         case ixgbe_mac_82598EB:
2333                 rss_i = adapter->ring_feature[RING_F_RSS].indices;
2334                 txr_idx = 0;
2335                 rxr_idx = 0;
2336                 feature_mask |= IXGBE_FLAG_RSS_ENABLED;
2337                 switch (adapter->flags & feature_mask) {
2338                 case (IXGBE_FLAG_RSS_ENABLED):
2339                         for (i = 0; i < adapter->num_rx_queues; i++)
2340                                 adapter->rx_ring[i].reg_idx = i;
2341                         for (i = 0; i < adapter->num_tx_queues; i++)
2342                                 adapter->tx_ring[i].reg_idx = i;
2343                         break;
2344                 case 0:
2345                 default:
2346                         break;
2347                 }
2348                 break;
2349         default:
2350                 break;
2351         }
2352 }
2353
2354 /**
2355  * ixgbe_alloc_queues - Allocate memory for all rings
2356  * @adapter: board private structure to initialize
2357  *
2358  * We allocate one ring per queue at run-time since we don't know the
2359  * number of queues at compile-time.  The polling_netdev array is
2360  * intended for Multiqueue, but should work fine with a single queue.
2361  **/
2362 static int __devinit ixgbe_alloc_queues(struct ixgbe_adapter *adapter)
2363 {
2364         int i;
2365
2366         adapter->tx_ring = kcalloc(adapter->num_tx_queues,
2367                                    sizeof(struct ixgbe_ring), GFP_KERNEL);
2368         if (!adapter->tx_ring)
2369                 goto err_tx_ring_allocation;
2370
2371         adapter->rx_ring = kcalloc(adapter->num_rx_queues,
2372                                    sizeof(struct ixgbe_ring), GFP_KERNEL);
2373         if (!adapter->rx_ring)
2374                 goto err_rx_ring_allocation;
2375
2376         for (i = 0; i < adapter->num_tx_queues; i++) {
2377                 adapter->tx_ring[i].count = IXGBE_DEFAULT_TXD;
2378                 adapter->tx_ring[i].queue_index = i;
2379         }
2380         for (i = 0; i < adapter->num_rx_queues; i++) {
2381                 adapter->rx_ring[i].count = IXGBE_DEFAULT_RXD;
2382                 adapter->rx_ring[i].queue_index = i;
2383         }
2384
2385         ixgbe_cache_ring_register(adapter);
2386
2387         return 0;
2388
2389 err_rx_ring_allocation:
2390         kfree(adapter->tx_ring);
2391 err_tx_ring_allocation:
2392         return -ENOMEM;
2393 }
2394
2395 /**
2396  * ixgbe_set_interrupt_capability - set MSI-X or MSI if supported
2397  * @adapter: board private structure to initialize
2398  *
2399  * Attempt to configure the interrupts using the best available
2400  * capabilities of the hardware and the kernel.
2401  **/
2402 static int __devinit ixgbe_set_interrupt_capability(struct ixgbe_adapter
2403                                                     *adapter)
2404 {
2405         int err = 0;
2406         int vector, v_budget;
2407
2408         /*
2409          * Set the default interrupt throttle rate.
2410          */
2411         adapter->rx_eitr = (1000000 / IXGBE_DEFAULT_ITR_RX_USECS);
2412         adapter->tx_eitr = (1000000 / IXGBE_DEFAULT_ITR_TX_USECS);
2413
2414         /*
2415          * It's easy to be greedy for MSI-X vectors, but it really
2416          * doesn't do us much good if we have a lot more vectors
2417          * than CPU's.  So let's be conservative and only ask for
2418          * (roughly) twice the number of vectors as there are CPU's.
2419          */
2420         v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues,
2421                        (int)(num_online_cpus() * 2)) + NON_Q_VECTORS;
2422
2423         /*
2424          * At the same time, hardware can only support a maximum of
2425          * MAX_MSIX_COUNT vectors.  With features such as RSS and VMDq,
2426          * we can easily reach upwards of 64 Rx descriptor queues and
2427          * 32 Tx queues.  Thus, we cap it off in those rare cases where
2428          * the cpu count also exceeds our vector limit.
2429          */
2430         v_budget = min(v_budget, MAX_MSIX_COUNT);
2431
2432         /* A failure in MSI-X entry allocation isn't fatal, but it does
2433          * mean we disable MSI-X capabilities of the adapter. */
2434         adapter->msix_entries = kcalloc(v_budget,
2435                                         sizeof(struct msix_entry), GFP_KERNEL);
2436         if (!adapter->msix_entries) {
2437                 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2438                 ixgbe_set_num_queues(adapter);
2439                 kfree(adapter->tx_ring);
2440                 kfree(adapter->rx_ring);
2441                 err = ixgbe_alloc_queues(adapter);
2442                 if (err) {
2443                         DPRINTK(PROBE, ERR, "Unable to allocate memory "
2444                                             "for queues\n");
2445                         goto out;
2446                 }
2447
2448                 goto try_msi;
2449         }
2450
2451         for (vector = 0; vector < v_budget; vector++)
2452                 adapter->msix_entries[vector].entry = vector;
2453
2454         ixgbe_acquire_msix_vectors(adapter, v_budget);
2455
2456         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2457                 goto out;
2458
2459 try_msi:
2460         err = pci_enable_msi(adapter->pdev);
2461         if (!err) {
2462                 adapter->flags |= IXGBE_FLAG_MSI_ENABLED;
2463         } else {
2464                 DPRINTK(HW, DEBUG, "Unable to allocate MSI interrupt, "
2465                                    "falling back to legacy.  Error: %d\n", err);
2466                 /* reset err */
2467                 err = 0;
2468         }
2469
2470 out:
2471         /* Notify the stack of the (possibly) reduced Tx Queue count. */
2472         adapter->netdev->real_num_tx_queues = adapter->num_tx_queues;
2473
2474         return err;
2475 }
2476
2477 static void ixgbe_reset_interrupt_capability(struct ixgbe_adapter *adapter)
2478 {
2479         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2480                 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2481                 pci_disable_msix(adapter->pdev);
2482                 kfree(adapter->msix_entries);
2483                 adapter->msix_entries = NULL;
2484         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
2485                 adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED;
2486                 pci_disable_msi(adapter->pdev);
2487         }
2488         return;
2489 }
2490
2491 /**
2492  * ixgbe_init_interrupt_scheme - Determine proper interrupt scheme
2493  * @adapter: board private structure to initialize
2494  *
2495  * We determine which interrupt scheme to use based on...
2496  * - Kernel support (MSI, MSI-X)
2497  *   - which can be user-defined (via MODULE_PARAM)
2498  * - Hardware queue count (num_*_queues)
2499  *   - defined by miscellaneous hardware support/features (RSS, etc.)
2500  **/
2501 static int __devinit ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter)
2502 {
2503         int err;
2504
2505         /* Number of supported queues */
2506         ixgbe_set_num_queues(adapter);
2507
2508         err = ixgbe_alloc_queues(adapter);
2509         if (err) {
2510                 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
2511                 goto err_alloc_queues;
2512         }
2513
2514         err = ixgbe_set_interrupt_capability(adapter);
2515         if (err) {
2516                 DPRINTK(PROBE, ERR, "Unable to setup interrupt capabilities\n");
2517                 goto err_set_interrupt;
2518         }
2519
2520         DPRINTK(DRV, INFO, "Multiqueue %s: Rx Queue count = %u, "
2521                            "Tx Queue count = %u\n",
2522                 (adapter->num_rx_queues > 1) ? "Enabled" :
2523                 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2524
2525         set_bit(__IXGBE_DOWN, &adapter->state);
2526
2527         return 0;
2528
2529 err_set_interrupt:
2530         kfree(adapter->tx_ring);
2531         kfree(adapter->rx_ring);
2532 err_alloc_queues:
2533         return err;
2534 }
2535
2536 /**
2537  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
2538  * @adapter: board private structure to initialize
2539  *
2540  * ixgbe_sw_init initializes the Adapter private data structure.
2541  * Fields are initialized based on PCI device information and
2542  * OS network device settings (MTU size).
2543  **/
2544 static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
2545 {
2546         struct ixgbe_hw *hw = &adapter->hw;
2547         struct pci_dev *pdev = adapter->pdev;
2548         unsigned int rss;
2549
2550         /* Set capability flags */
2551         rss = min(IXGBE_MAX_RSS_INDICES, (int)num_online_cpus());
2552         adapter->ring_feature[RING_F_RSS].indices = rss;
2553         adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
2554
2555         /* Enable Dynamic interrupt throttling by default */
2556         adapter->rx_eitr = 1;
2557         adapter->tx_eitr = 1;
2558
2559         /* default flow control settings */
2560         hw->fc.original_type = ixgbe_fc_none;
2561         hw->fc.type = ixgbe_fc_none;
2562         hw->fc.high_water = IXGBE_DEFAULT_FCRTH;
2563         hw->fc.low_water = IXGBE_DEFAULT_FCRTL;
2564         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
2565         hw->fc.send_xon = true;
2566
2567         /* select 10G link by default */
2568         hw->mac.link_mode_select = IXGBE_AUTOC_LMS_10G_LINK_NO_AN;
2569         if (hw->mac.ops.reset(hw)) {
2570                 dev_err(&pdev->dev, "HW Init failed\n");
2571                 return -EIO;
2572         }
2573         if (hw->mac.ops.setup_link_speed(hw, IXGBE_LINK_SPEED_10GB_FULL, true,
2574                                          false)) {
2575                 dev_err(&pdev->dev, "Link Speed setup failed\n");
2576                 return -EIO;
2577         }
2578
2579         /* initialize eeprom parameters */
2580         if (ixgbe_init_eeprom(hw)) {
2581                 dev_err(&pdev->dev, "EEPROM initialization failed\n");
2582                 return -EIO;
2583         }
2584
2585         /* enable rx csum by default */
2586         adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
2587
2588         set_bit(__IXGBE_DOWN, &adapter->state);
2589
2590         return 0;
2591 }
2592
2593 /**
2594  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
2595  * @adapter: board private structure
2596  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
2597  *
2598  * Return 0 on success, negative on failure
2599  **/
2600 int ixgbe_setup_tx_resources(struct ixgbe_adapter *adapter,
2601                              struct ixgbe_ring *tx_ring)
2602 {
2603         struct pci_dev *pdev = adapter->pdev;
2604         int size;
2605
2606         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
2607         tx_ring->tx_buffer_info = vmalloc(size);
2608         if (!tx_ring->tx_buffer_info)
2609                 goto err;
2610         memset(tx_ring->tx_buffer_info, 0, size);
2611
2612         /* round up to nearest 4K */
2613         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc) +
2614                         sizeof(u32);
2615         tx_ring->size = ALIGN(tx_ring->size, 4096);
2616
2617         tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
2618                                              &tx_ring->dma);
2619         if (!tx_ring->desc)
2620                 goto err;
2621
2622         tx_ring->next_to_use = 0;
2623         tx_ring->next_to_clean = 0;
2624         tx_ring->work_limit = tx_ring->count;
2625         return 0;
2626
2627 err:
2628         vfree(tx_ring->tx_buffer_info);
2629         tx_ring->tx_buffer_info = NULL;
2630         DPRINTK(PROBE, ERR, "Unable to allocate memory for the transmit "
2631                             "descriptor ring\n");
2632         return -ENOMEM;
2633 }
2634
2635 /**
2636  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
2637  * @adapter: board private structure
2638  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
2639  *
2640  * Returns 0 on success, negative on failure
2641  **/
2642 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
2643                              struct ixgbe_ring *rx_ring)
2644 {
2645         struct pci_dev *pdev = adapter->pdev;
2646         int size;
2647
2648         size = sizeof(struct net_lro_desc) * IXGBE_MAX_LRO_DESCRIPTORS;
2649         rx_ring->lro_mgr.lro_arr = vmalloc(size);
2650         if (!rx_ring->lro_mgr.lro_arr)
2651                 return -ENOMEM;
2652         memset(rx_ring->lro_mgr.lro_arr, 0, size);
2653
2654         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
2655         rx_ring->rx_buffer_info = vmalloc(size);
2656         if (!rx_ring->rx_buffer_info) {
2657                 DPRINTK(PROBE, ERR,
2658                         "vmalloc allocation failed for the rx desc ring\n");
2659                 goto alloc_failed;
2660         }
2661         memset(rx_ring->rx_buffer_info, 0, size);
2662
2663         /* Round up to nearest 4K */
2664         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
2665         rx_ring->size = ALIGN(rx_ring->size, 4096);
2666
2667         rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size, &rx_ring->dma);
2668
2669         if (!rx_ring->desc) {
2670                 DPRINTK(PROBE, ERR,
2671                         "Memory allocation failed for the rx desc ring\n");
2672                 vfree(rx_ring->rx_buffer_info);
2673                 goto alloc_failed;
2674         }
2675
2676         rx_ring->next_to_clean = 0;
2677         rx_ring->next_to_use = 0;
2678
2679         return 0;
2680
2681 alloc_failed:
2682         vfree(rx_ring->lro_mgr.lro_arr);
2683         rx_ring->lro_mgr.lro_arr = NULL;
2684         return -ENOMEM;
2685 }
2686
2687 /**
2688  * ixgbe_free_tx_resources - Free Tx Resources per Queue
2689  * @adapter: board private structure
2690  * @tx_ring: Tx descriptor ring for a specific queue
2691  *
2692  * Free all transmit software resources
2693  **/
2694 static void ixgbe_free_tx_resources(struct ixgbe_adapter *adapter,
2695                                     struct ixgbe_ring *tx_ring)
2696 {
2697         struct pci_dev *pdev = adapter->pdev;
2698
2699         ixgbe_clean_tx_ring(adapter, tx_ring);
2700
2701         vfree(tx_ring->tx_buffer_info);
2702         tx_ring->tx_buffer_info = NULL;
2703
2704         pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2705
2706         tx_ring->desc = NULL;
2707 }
2708
2709 /**
2710  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
2711  * @adapter: board private structure
2712  *
2713  * Free all transmit software resources
2714  **/
2715 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
2716 {
2717         int i;
2718
2719         for (i = 0; i < adapter->num_tx_queues; i++)
2720                 ixgbe_free_tx_resources(adapter, &adapter->tx_ring[i]);
2721 }
2722
2723 /**
2724  * ixgbe_free_rx_resources - Free Rx Resources
2725  * @adapter: board private structure
2726  * @rx_ring: ring to clean the resources from
2727  *
2728  * Free all receive software resources
2729  **/
2730 static void ixgbe_free_rx_resources(struct ixgbe_adapter *adapter,
2731                                     struct ixgbe_ring *rx_ring)
2732 {
2733         struct pci_dev *pdev = adapter->pdev;
2734
2735         vfree(rx_ring->lro_mgr.lro_arr);
2736         rx_ring->lro_mgr.lro_arr = NULL;
2737
2738         ixgbe_clean_rx_ring(adapter, rx_ring);
2739
2740         vfree(rx_ring->rx_buffer_info);
2741         rx_ring->rx_buffer_info = NULL;
2742
2743         pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2744
2745         rx_ring->desc = NULL;
2746 }
2747
2748 /**
2749  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
2750  * @adapter: board private structure
2751  *
2752  * Free all receive software resources
2753  **/
2754 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
2755 {
2756         int i;
2757
2758         for (i = 0; i < adapter->num_rx_queues; i++)
2759                 ixgbe_free_rx_resources(adapter, &adapter->rx_ring[i]);
2760 }
2761
2762 /**
2763  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
2764  * @adapter: board private structure
2765  *
2766  * If this function returns with an error, then it's possible one or
2767  * more of the rings is populated (while the rest are not).  It is the
2768  * callers duty to clean those orphaned rings.
2769  *
2770  * Return 0 on success, negative on failure
2771  **/
2772 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
2773 {
2774         int i, err = 0;
2775
2776         for (i = 0; i < adapter->num_tx_queues; i++) {
2777                 err = ixgbe_setup_tx_resources(adapter, &adapter->tx_ring[i]);
2778                 if (err) {
2779                         DPRINTK(PROBE, ERR,
2780                                 "Allocation for Tx Queue %u failed\n", i);
2781                         break;
2782                 }
2783         }
2784
2785         return err;
2786 }
2787
2788 /**
2789  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
2790  * @adapter: board private structure
2791  *
2792  * If this function returns with an error, then it's possible one or
2793  * more of the rings is populated (while the rest are not).  It is the
2794  * callers duty to clean those orphaned rings.
2795  *
2796  * Return 0 on success, negative on failure
2797  **/
2798
2799 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
2800 {
2801         int i, err = 0;
2802
2803         for (i = 0; i < adapter->num_rx_queues; i++) {
2804                 err = ixgbe_setup_rx_resources(adapter, &adapter->rx_ring[i]);
2805                 if (err) {
2806                         DPRINTK(PROBE, ERR,
2807                                 "Allocation for Rx Queue %u failed\n", i);
2808                         break;
2809                 }
2810         }
2811
2812         return err;
2813 }
2814
2815 /**
2816  * ixgbe_change_mtu - Change the Maximum Transfer Unit
2817  * @netdev: network interface device structure
2818  * @new_mtu: new value for maximum frame size
2819  *
2820  * Returns 0 on success, negative on failure
2821  **/
2822 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
2823 {
2824         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2825         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
2826
2827         if ((max_frame < (ETH_ZLEN + ETH_FCS_LEN)) ||
2828             (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
2829                 return -EINVAL;
2830
2831         DPRINTK(PROBE, INFO, "changing MTU from %d to %d\n",
2832                 netdev->mtu, new_mtu);
2833         /* must set new MTU before calling down or up */
2834         netdev->mtu = new_mtu;
2835
2836         if (netif_running(netdev))
2837                 ixgbe_reinit_locked(adapter);
2838
2839         return 0;
2840 }
2841
2842 /**
2843  * ixgbe_open - Called when a network interface is made active
2844  * @netdev: network interface device structure
2845  *
2846  * Returns 0 on success, negative value on failure
2847  *
2848  * The open entry point is called when a network interface is made
2849  * active by the system (IFF_UP).  At this point all resources needed
2850  * for transmit and receive operations are allocated, the interrupt
2851  * handler is registered with the OS, the watchdog timer is started,
2852  * and the stack is notified that the interface is ready.
2853  **/
2854 static int ixgbe_open(struct net_device *netdev)
2855 {
2856         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2857         int err;
2858
2859         /* disallow open during test */
2860         if (test_bit(__IXGBE_TESTING, &adapter->state))
2861                 return -EBUSY;
2862
2863         /* allocate transmit descriptors */
2864         err = ixgbe_setup_all_tx_resources(adapter);
2865         if (err)
2866                 goto err_setup_tx;
2867
2868         /* allocate receive descriptors */
2869         err = ixgbe_setup_all_rx_resources(adapter);
2870         if (err)
2871                 goto err_setup_rx;
2872
2873         ixgbe_configure(adapter);
2874
2875         err = ixgbe_request_irq(adapter);
2876         if (err)
2877                 goto err_req_irq;
2878
2879         err = ixgbe_up_complete(adapter);
2880         if (err)
2881                 goto err_up;
2882
2883         netif_tx_start_all_queues(netdev);
2884
2885         return 0;
2886
2887 err_up:
2888         ixgbe_release_hw_control(adapter);
2889         ixgbe_free_irq(adapter);
2890 err_req_irq:
2891         ixgbe_free_all_rx_resources(adapter);
2892 err_setup_rx:
2893         ixgbe_free_all_tx_resources(adapter);
2894 err_setup_tx:
2895         ixgbe_reset(adapter);
2896
2897         return err;
2898 }
2899
2900 /**
2901  * ixgbe_close - Disables a network interface
2902  * @netdev: network interface device structure
2903  *
2904  * Returns 0, this is not allowed to fail
2905  *
2906  * The close entry point is called when an interface is de-activated
2907  * by the OS.  The hardware is still under the drivers control, but
2908  * needs to be disabled.  A global MAC reset is issued to stop the
2909  * hardware, and all transmit and receive resources are freed.
2910  **/
2911 static int ixgbe_close(struct net_device *netdev)
2912 {
2913         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2914
2915         ixgbe_down(adapter);
2916         ixgbe_free_irq(adapter);
2917
2918         ixgbe_free_all_tx_resources(adapter);
2919         ixgbe_free_all_rx_resources(adapter);
2920
2921         ixgbe_release_hw_control(adapter);
2922
2923         return 0;
2924 }
2925
2926 /**
2927  * ixgbe_update_stats - Update the board statistics counters.
2928  * @adapter: board private structure
2929  **/
2930 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
2931 {
2932         struct ixgbe_hw *hw = &adapter->hw;
2933         u64 total_mpc = 0;
2934         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
2935
2936         adapter->stats.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
2937         for (i = 0; i < 8; i++) {
2938                 /* for packet buffers not used, the register should read 0 */
2939                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
2940                 missed_rx += mpc;
2941                 adapter->stats.mpc[i] += mpc;
2942                 total_mpc += adapter->stats.mpc[i];
2943                 adapter->stats.rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
2944         }
2945         adapter->stats.gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
2946         /* work around hardware counting issue */
2947         adapter->stats.gprc -= missed_rx;
2948
2949         /* 82598 hardware only has a 32 bit counter in the high register */
2950         adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
2951         adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
2952         adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORH);
2953         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
2954         adapter->stats.bprc += bprc;
2955         adapter->stats.mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
2956         adapter->stats.mprc -= bprc;
2957         adapter->stats.roc += IXGBE_READ_REG(hw, IXGBE_ROC);
2958         adapter->stats.prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
2959         adapter->stats.prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
2960         adapter->stats.prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
2961         adapter->stats.prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
2962         adapter->stats.prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
2963         adapter->stats.prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
2964         adapter->stats.rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
2965         adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
2966         adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
2967         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
2968         adapter->stats.lxontxc += lxon;
2969         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
2970         adapter->stats.lxofftxc += lxoff;
2971         adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
2972         adapter->stats.gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
2973         adapter->stats.mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
2974         /*
2975          * 82598 errata - tx of flow control packets is included in tx counters
2976          */
2977         xon_off_tot = lxon + lxoff;
2978         adapter->stats.gptc -= xon_off_tot;
2979         adapter->stats.mptc -= xon_off_tot;
2980         adapter->stats.gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
2981         adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
2982         adapter->stats.rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
2983         adapter->stats.rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
2984         adapter->stats.tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
2985         adapter->stats.ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
2986         adapter->stats.ptc64 -= xon_off_tot;
2987         adapter->stats.ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
2988         adapter->stats.ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
2989         adapter->stats.ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
2990         adapter->stats.ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
2991         adapter->stats.ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
2992         adapter->stats.bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
2993
2994         /* Fill out the OS statistics structure */
2995         adapter->net_stats.multicast = adapter->stats.mprc;
2996
2997         /* Rx Errors */
2998         adapter->net_stats.rx_errors = adapter->stats.crcerrs +
2999                                                 adapter->stats.rlec;
3000         adapter->net_stats.rx_dropped = 0;
3001         adapter->net_stats.rx_length_errors = adapter->stats.rlec;
3002         adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3003         adapter->net_stats.rx_missed_errors = total_mpc;
3004 }
3005
3006 /**
3007  * ixgbe_watchdog - Timer Call-back
3008  * @data: pointer to adapter cast into an unsigned long
3009  **/
3010 static void ixgbe_watchdog(unsigned long data)
3011 {
3012         struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
3013         struct net_device *netdev = adapter->netdev;
3014         bool link_up;
3015         u32 link_speed = 0;
3016
3017         adapter->hw.mac.ops.check_link(&adapter->hw, &(link_speed), &link_up);
3018
3019         if (link_up) {
3020                 if (!netif_carrier_ok(netdev)) {
3021                         u32 frctl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
3022                         u32 rmcs = IXGBE_READ_REG(&adapter->hw, IXGBE_RMCS);
3023 #define FLOW_RX (frctl & IXGBE_FCTRL_RFCE)
3024 #define FLOW_TX (rmcs & IXGBE_RMCS_TFCE_802_3X)
3025                         DPRINTK(LINK, INFO, "NIC Link is Up %s, "
3026                                 "Flow Control: %s\n",
3027                                 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
3028                                  "10 Gbps" :
3029                                  (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
3030                                   "1 Gbps" : "unknown speed")),
3031                                 ((FLOW_RX && FLOW_TX) ? "RX/TX" :
3032                                  (FLOW_RX ? "RX" :
3033                                  (FLOW_TX ? "TX" : "None"))));
3034
3035                         netif_carrier_on(netdev);
3036                         netif_tx_wake_all_queues(netdev);
3037                 } else {
3038                         /* Force detection of hung controller */
3039                         adapter->detect_tx_hung = true;
3040                 }
3041         } else {
3042                 if (netif_carrier_ok(netdev)) {
3043                         DPRINTK(LINK, INFO, "NIC Link is Down\n");
3044                         netif_carrier_off(netdev);
3045                         netif_tx_stop_all_queues(netdev);
3046                 }
3047         }
3048
3049         ixgbe_update_stats(adapter);
3050
3051         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
3052                 /* Cause software interrupt to ensure rx rings are cleaned */
3053                 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3054                         u32 eics =
3055                          (1 << (adapter->num_msix_vectors - NON_Q_VECTORS)) - 1;
3056                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, eics);
3057                 } else {
3058                         /* for legacy and MSI interrupts don't set any bits that
3059                          * are enabled for EIAM, because this operation would
3060                          * set *both* EIMS and EICS for any bit in EIAM */
3061                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
3062                                      (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
3063                 }
3064                 /* Reset the timer */
3065                 mod_timer(&adapter->watchdog_timer,
3066                           round_jiffies(jiffies + 2 * HZ));
3067         }
3068 }
3069
3070 static int ixgbe_tso(struct ixgbe_adapter *adapter,
3071                          struct ixgbe_ring *tx_ring, struct sk_buff *skb,
3072                          u32 tx_flags, u8 *hdr_len)
3073 {
3074         struct ixgbe_adv_tx_context_desc *context_desc;
3075         unsigned int i;
3076         int err;
3077         struct ixgbe_tx_buffer *tx_buffer_info;
3078         u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
3079         u32 mss_l4len_idx = 0, l4len;
3080
3081         if (skb_is_gso(skb)) {
3082                 if (skb_header_cloned(skb)) {
3083                         err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
3084                         if (err)
3085                                 return err;
3086                 }
3087                 l4len = tcp_hdrlen(skb);
3088                 *hdr_len += l4len;
3089
3090                 if (skb->protocol == htons(ETH_P_IP)) {
3091                         struct iphdr *iph = ip_hdr(skb);
3092                         iph->tot_len = 0;
3093                         iph->check = 0;
3094                         tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
3095                                                                  iph->daddr, 0,
3096                                                                  IPPROTO_TCP,
3097                                                                  0);
3098                         adapter->hw_tso_ctxt++;
3099                 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
3100                         ipv6_hdr(skb)->payload_len = 0;
3101                         tcp_hdr(skb)->check =
3102                             ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3103                                              &ipv6_hdr(skb)->daddr,
3104                                              0, IPPROTO_TCP, 0);
3105                         adapter->hw_tso6_ctxt++;
3106                 }
3107
3108                 i = tx_ring->next_to_use;
3109
3110                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3111                 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
3112
3113                 /* VLAN MACLEN IPLEN */
3114                 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3115                         vlan_macip_lens |=
3116                             (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
3117                 vlan_macip_lens |= ((skb_network_offset(skb)) <<
3118                                     IXGBE_ADVTXD_MACLEN_SHIFT);
3119                 *hdr_len += skb_network_offset(skb);
3120                 vlan_macip_lens |=
3121                     (skb_transport_header(skb) - skb_network_header(skb));
3122                 *hdr_len +=
3123                     (skb_transport_header(skb) - skb_network_header(skb));
3124                 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3125                 context_desc->seqnum_seed = 0;
3126
3127                 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3128                 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
3129                                     IXGBE_ADVTXD_DTYP_CTXT);
3130
3131                 if (skb->protocol == htons(ETH_P_IP))
3132                         type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
3133                 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
3134                 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
3135
3136                 /* MSS L4LEN IDX */
3137                 mss_l4len_idx |=
3138                     (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
3139                 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
3140                 /* use index 1 for TSO */
3141                 mss_l4len_idx |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3142                 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
3143
3144                 tx_buffer_info->time_stamp = jiffies;
3145                 tx_buffer_info->next_to_watch = i;
3146
3147                 i++;
3148                 if (i == tx_ring->count)
3149                         i = 0;
3150                 tx_ring->next_to_use = i;
3151
3152                 return true;
3153         }
3154         return false;
3155 }
3156
3157 static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
3158                                    struct ixgbe_ring *tx_ring,
3159                                    struct sk_buff *skb, u32 tx_flags)
3160 {
3161         struct ixgbe_adv_tx_context_desc *context_desc;
3162         unsigned int i;
3163         struct ixgbe_tx_buffer *tx_buffer_info;
3164         u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
3165
3166         if (skb->ip_summed == CHECKSUM_PARTIAL ||
3167             (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
3168                 i = tx_ring->next_to_use;
3169                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3170                 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
3171
3172                 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3173                         vlan_macip_lens |=
3174                             (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
3175                 vlan_macip_lens |= (skb_network_offset(skb) <<
3176                                     IXGBE_ADVTXD_MACLEN_SHIFT);
3177                 if (skb->ip_summed == CHECKSUM_PARTIAL)
3178                         vlan_macip_lens |= (skb_transport_header(skb) -
3179                                             skb_network_header(skb));
3180
3181                 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3182                 context_desc->seqnum_seed = 0;
3183
3184                 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
3185                                     IXGBE_ADVTXD_DTYP_CTXT);
3186
3187                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
3188                         switch (skb->protocol) {
3189                         case __constant_htons(ETH_P_IP):
3190                                 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
3191                                 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
3192                                         type_tucmd_mlhl |=
3193                                                 IXGBE_ADVTXD_TUCMD_L4T_TCP;
3194                                 break;
3195
3196                         case __constant_htons(ETH_P_IPV6):
3197                                 /* XXX what about other V6 headers?? */
3198                                 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
3199                                         type_tucmd_mlhl |=
3200                                                 IXGBE_ADVTXD_TUCMD_L4T_TCP;
3201                                 break;
3202
3203                         default:
3204                                 if (unlikely(net_ratelimit())) {
3205                                         DPRINTK(PROBE, WARNING,
3206                                          "partial checksum but proto=%x!\n",
3207                                          skb->protocol);
3208                                 }
3209                                 break;
3210                         }
3211                 }
3212
3213                 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
3214                 /* use index zero for tx checksum offload */
3215                 context_desc->mss_l4len_idx = 0;
3216
3217                 tx_buffer_info->time_stamp = jiffies;
3218                 tx_buffer_info->next_to_watch = i;
3219                 adapter->hw_csum_tx_good++;
3220                 i++;
3221                 if (i == tx_ring->count)
3222                         i = 0;
3223                 tx_ring->next_to_use = i;
3224
3225                 return true;
3226         }
3227         return false;
3228 }
3229
3230 static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
3231                         struct ixgbe_ring *tx_ring,
3232                         struct sk_buff *skb, unsigned int first)
3233 {
3234         struct ixgbe_tx_buffer *tx_buffer_info;
3235         unsigned int len = skb->len;
3236         unsigned int offset = 0, size, count = 0, i;
3237         unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
3238         unsigned int f;
3239
3240         len -= skb->data_len;
3241
3242         i = tx_ring->next_to_use;
3243
3244         while (len) {
3245                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3246                 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
3247
3248                 tx_buffer_info->length = size;
3249                 tx_buffer_info->dma = pci_map_single(adapter->pdev,
3250                                                   skb->data + offset,
3251                                                   size, PCI_DMA_TODEVICE);
3252                 tx_buffer_info->time_stamp = jiffies;
3253                 tx_buffer_info->next_to_watch = i;
3254
3255                 len -= size;
3256                 offset += size;
3257                 count++;
3258                 i++;
3259                 if (i == tx_ring->count)
3260                         i = 0;
3261         }
3262
3263         for (f = 0; f < nr_frags; f++) {
3264                 struct skb_frag_struct *frag;
3265
3266                 frag = &skb_shinfo(skb)->frags[f];
3267                 len = frag->size;
3268                 offset = frag->page_offset;
3269
3270                 while (len) {
3271                         tx_buffer_info = &tx_ring->tx_buffer_info[i];
3272                         size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
3273
3274                         tx_buffer_info->length = size;
3275                         tx_buffer_info->dma = pci_map_page(adapter->pdev,
3276                                                         frag->page,
3277                                                         offset,
3278                                                         size, PCI_DMA_TODEVICE);
3279                         tx_buffer_info->time_stamp = jiffies;
3280                         tx_buffer_info->next_to_watch = i;
3281
3282                         len -= size;
3283                         offset += size;
3284                         count++;
3285                         i++;
3286                         if (i == tx_ring->count)
3287                                 i = 0;
3288                 }
3289         }
3290         if (i == 0)
3291                 i = tx_ring->count - 1;
3292         else
3293                 i = i - 1;
3294         tx_ring->tx_buffer_info[i].skb = skb;
3295         tx_ring->tx_buffer_info[first].next_to_watch = i;
3296
3297         return count;
3298 }
3299
3300 static void ixgbe_tx_queue(struct ixgbe_adapter *adapter,
3301                                struct ixgbe_ring *tx_ring,
3302                                int tx_flags, int count, u32 paylen, u8 hdr_len)
3303 {
3304         union ixgbe_adv_tx_desc *tx_desc = NULL;
3305         struct ixgbe_tx_buffer *tx_buffer_info;
3306         u32 olinfo_status = 0, cmd_type_len = 0;
3307         unsigned int i;
3308         u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
3309
3310         cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
3311
3312         cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
3313
3314         if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3315                 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
3316
3317         if (tx_flags & IXGBE_TX_FLAGS_TSO) {
3318                 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
3319
3320                 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3321                                                 IXGBE_ADVTXD_POPTS_SHIFT;
3322
3323                 /* use index 1 context for tso */
3324                 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3325                 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3326                         olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
3327                                                 IXGBE_ADVTXD_POPTS_SHIFT;
3328
3329         } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3330                 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3331                                                 IXGBE_ADVTXD_POPTS_SHIFT;
3332
3333         olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
3334
3335         i = tx_ring->next_to_use;
3336         while (count--) {
3337                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3338                 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
3339                 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
3340                 tx_desc->read.cmd_type_len =
3341                         cpu_to_le32(cmd_type_len | tx_buffer_info->length);
3342                 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
3343
3344                 i++;
3345                 if (i == tx_ring->count)
3346                         i = 0;
3347         }
3348
3349         tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
3350
3351         /*
3352          * Force memory writes to complete before letting h/w
3353          * know there are new descriptors to fetch.  (Only
3354          * applicable for weak-ordered memory model archs,
3355          * such as IA-64).
3356          */
3357         wmb();
3358
3359         tx_ring->next_to_use = i;
3360         writel(i, adapter->hw.hw_addr + tx_ring->tail);
3361 }
3362
3363 static int __ixgbe_maybe_stop_tx(struct net_device *netdev,
3364                                  struct ixgbe_ring *tx_ring, int size)
3365 {
3366         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3367
3368         netif_stop_subqueue(netdev, tx_ring->queue_index);
3369         /* Herbert's original patch had:
3370          *  smp_mb__after_netif_stop_queue();
3371          * but since that doesn't exist yet, just open code it. */
3372         smp_mb();
3373
3374         /* We need to check again in a case another CPU has just
3375          * made room available. */
3376         if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
3377                 return -EBUSY;
3378
3379         /* A reprieve! - use start_queue because it doesn't call schedule */
3380         netif_wake_subqueue(netdev, tx_ring->queue_index);
3381         ++adapter->restart_queue;
3382         return 0;
3383 }
3384
3385 static int ixgbe_maybe_stop_tx(struct net_device *netdev,
3386                                struct ixgbe_ring *tx_ring, int size)
3387 {
3388         if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
3389                 return 0;
3390         return __ixgbe_maybe_stop_tx(netdev, tx_ring, size);
3391 }
3392
3393
3394 static int ixgbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3395 {
3396         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3397         struct ixgbe_ring *tx_ring;
3398         unsigned int len = skb->len;
3399         unsigned int first;
3400         unsigned int tx_flags = 0;
3401         u8 hdr_len = 0;
3402         int r_idx = 0, tso;
3403         unsigned int mss = 0;
3404         int count = 0;
3405         unsigned int f;
3406         unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
3407         len -= skb->data_len;
3408         r_idx = (adapter->num_tx_queues - 1) & skb->queue_mapping;
3409         tx_ring = &adapter->tx_ring[r_idx];
3410
3411
3412         if (skb->len <= 0) {
3413                 dev_kfree_skb(skb);
3414                 return NETDEV_TX_OK;
3415         }
3416         mss = skb_shinfo(skb)->gso_size;
3417
3418         if (mss)
3419                 count++;
3420         else if (skb->ip_summed == CHECKSUM_PARTIAL)
3421                 count++;
3422
3423         count += TXD_USE_COUNT(len);
3424         for (f = 0; f < nr_frags; f++)
3425                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3426
3427         if (ixgbe_maybe_stop_tx(netdev, tx_ring, count)) {
3428                 adapter->tx_busy++;
3429                 return NETDEV_TX_BUSY;
3430         }
3431         if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
3432                 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3433                 tx_flags |= (vlan_tx_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT);
3434         }
3435
3436         if (skb->protocol == htons(ETH_P_IP))
3437                 tx_flags |= IXGBE_TX_FLAGS_IPV4;
3438         first = tx_ring->next_to_use;
3439         tso = ixgbe_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
3440         if (tso < 0) {
3441                 dev_kfree_skb_any(skb);
3442                 return NETDEV_TX_OK;
3443         }
3444
3445         if (tso)
3446                 tx_flags |= IXGBE_TX_FLAGS_TSO;
3447         else if (ixgbe_tx_csum(adapter, tx_ring, skb, tx_flags) &&
3448                  (skb->ip_summed == CHECKSUM_PARTIAL))
3449                 tx_flags |= IXGBE_TX_FLAGS_CSUM;
3450
3451         ixgbe_tx_queue(adapter, tx_ring, tx_flags,
3452                            ixgbe_tx_map(adapter, tx_ring, skb, first),
3453                            skb->len, hdr_len);
3454
3455         netdev->trans_start = jiffies;
3456
3457         ixgbe_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
3458
3459         return NETDEV_TX_OK;
3460 }
3461
3462 /**
3463  * ixgbe_get_stats - Get System Network Statistics
3464  * @netdev: network interface device structure
3465  *
3466  * Returns the address of the device statistics structure.
3467  * The statistics are actually updated from the timer callback.
3468  **/
3469 static struct net_device_stats *ixgbe_get_stats(struct net_device *netdev)
3470 {
3471         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3472
3473         /* only return the current stats */
3474         return &adapter->net_stats;
3475 }
3476
3477 /**
3478  * ixgbe_set_mac - Change the Ethernet Address of the NIC
3479  * @netdev: network interface device structure
3480  * @p: pointer to an address structure
3481  *
3482  * Returns 0 on success, negative on failure
3483  **/
3484 static int ixgbe_set_mac(struct net_device *netdev, void *p)
3485 {
3486         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3487         struct sockaddr *addr = p;
3488
3489         if (!is_valid_ether_addr(addr->sa_data))
3490                 return -EADDRNOTAVAIL;
3491
3492         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3493         memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3494
3495         ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV);
3496
3497         return 0;
3498 }
3499
3500 #ifdef CONFIG_NET_POLL_CONTROLLER
3501 /*
3502  * Polling 'interrupt' - used by things like netconsole to send skbs
3503  * without having to re-enable interrupts. It's not called while
3504  * the interrupt routine is executing.
3505  */
3506 static void ixgbe_netpoll(struct net_device *netdev)
3507 {
3508         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3509
3510         disable_irq(adapter->pdev->irq);
3511         adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
3512         ixgbe_intr(adapter->pdev->irq, netdev);
3513         adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
3514         enable_irq(adapter->pdev->irq);
3515 }
3516 #endif
3517
3518 /**
3519  * ixgbe_napi_add_all - prep napi structs for use
3520  * @adapter: private struct
3521  * helper function to napi_add each possible q_vector->napi
3522  */
3523 static void ixgbe_napi_add_all(struct ixgbe_adapter *adapter)
3524 {
3525         int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
3526         int (*poll)(struct napi_struct *, int);
3527
3528         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3529                 poll = &ixgbe_clean_rxonly;
3530         } else {
3531                 poll = &ixgbe_poll;
3532                 /* only one q_vector for legacy modes */
3533                 q_vectors = 1;
3534         }
3535
3536         for (i = 0; i < q_vectors; i++) {
3537                 struct ixgbe_q_vector *q_vector = &adapter->q_vector[i];
3538                 netif_napi_add(adapter->netdev, &q_vector->napi,
3539                                (*poll), 64);
3540         }
3541 }
3542
3543 /**
3544  * ixgbe_probe - Device Initialization Routine
3545  * @pdev: PCI device information struct
3546  * @ent: entry in ixgbe_pci_tbl
3547  *
3548  * Returns 0 on success, negative on failure
3549  *
3550  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
3551  * The OS initialization, configuring of the adapter private structure,
3552  * and a hardware reset occur.
3553  **/
3554 static int __devinit ixgbe_probe(struct pci_dev *pdev,
3555                                  const struct pci_device_id *ent)
3556 {
3557         struct net_device *netdev;
3558         struct ixgbe_adapter *adapter = NULL;
3559         struct ixgbe_hw *hw;
3560         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
3561         unsigned long mmio_start, mmio_len;
3562         static int cards_found;
3563         int i, err, pci_using_dac;
3564         u16 link_status, link_speed, link_width;
3565         u32 part_num;
3566
3567         err = pci_enable_device(pdev);
3568         if (err)
3569                 return err;
3570
3571         if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK) &&
3572             !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
3573                 pci_using_dac = 1;
3574         } else {
3575                 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
3576                 if (err) {
3577                         err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
3578                         if (err) {
3579                                 dev_err(&pdev->dev, "No usable DMA "
3580                                         "configuration, aborting\n");
3581                                 goto err_dma;
3582                         }
3583                 }
3584                 pci_using_dac = 0;
3585         }
3586
3587         err = pci_request_regions(pdev, ixgbe_driver_name);
3588         if (err) {
3589                 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
3590                 goto err_pci_reg;
3591         }
3592
3593         pci_set_master(pdev);
3594         pci_save_state(pdev);
3595
3596         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), MAX_TX_QUEUES);
3597         if (!netdev) {
3598                 err = -ENOMEM;
3599                 goto err_alloc_etherdev;
3600         }
3601
3602         SET_NETDEV_DEV(netdev, &pdev->dev);
3603
3604         pci_set_drvdata(pdev, netdev);
3605         adapter = netdev_priv(netdev);
3606
3607         adapter->netdev = netdev;
3608         adapter->pdev = pdev;
3609         hw = &adapter->hw;
3610         hw->back = adapter;
3611         adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
3612
3613         mmio_start = pci_resource_start(pdev, 0);
3614         mmio_len = pci_resource_len(pdev, 0);
3615
3616         hw->hw_addr = ioremap(mmio_start, mmio_len);
3617         if (!hw->hw_addr) {
3618                 err = -EIO;
3619                 goto err_ioremap;
3620         }
3621
3622         for (i = 1; i <= 5; i++) {
3623                 if (pci_resource_len(pdev, i) == 0)
3624                         continue;
3625         }
3626
3627         netdev->open = &ixgbe_open;
3628         netdev->stop = &ixgbe_close;
3629         netdev->hard_start_xmit = &ixgbe_xmit_frame;
3630         netdev->get_stats = &ixgbe_get_stats;
3631         netdev->set_rx_mode = &ixgbe_set_rx_mode;
3632         netdev->set_multicast_list = &ixgbe_set_rx_mode;
3633         netdev->set_mac_address = &ixgbe_set_mac;
3634         netdev->change_mtu = &ixgbe_change_mtu;
3635         ixgbe_set_ethtool_ops(netdev);
3636         netdev->tx_timeout = &ixgbe_tx_timeout;
3637         netdev->watchdog_timeo = 5 * HZ;
3638         netdev->vlan_rx_register = ixgbe_vlan_rx_register;
3639         netdev->vlan_rx_add_vid = ixgbe_vlan_rx_add_vid;
3640         netdev->vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid;
3641 #ifdef CONFIG_NET_POLL_CONTROLLER
3642         netdev->poll_controller = ixgbe_netpoll;
3643 #endif
3644         strcpy(netdev->name, pci_name(pdev));
3645
3646         netdev->mem_start = mmio_start;
3647         netdev->mem_end = mmio_start + mmio_len;
3648
3649         adapter->bd_number = cards_found;
3650
3651         /* PCI config space info */
3652         hw->vendor_id = pdev->vendor;
3653         hw->device_id = pdev->device;
3654         hw->revision_id = pdev->revision;
3655         hw->subsystem_vendor_id = pdev->subsystem_vendor;
3656         hw->subsystem_device_id = pdev->subsystem_device;
3657
3658         /* Setup hw api */
3659         memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
3660         hw->mac.type  = ii->mac;
3661
3662         err = ii->get_invariants(hw);
3663         if (err)
3664                 goto err_hw_init;
3665
3666         /* setup the private structure */
3667         err = ixgbe_sw_init(adapter);
3668         if (err)
3669                 goto err_sw_init;
3670
3671         netdev->features = NETIF_F_SG |
3672                            NETIF_F_IP_CSUM |
3673                            NETIF_F_HW_VLAN_TX |
3674                            NETIF_F_HW_VLAN_RX |
3675                            NETIF_F_HW_VLAN_FILTER;
3676
3677         netdev->features |= NETIF_F_IPV6_CSUM;
3678         netdev->features |= NETIF_F_TSO;
3679         netdev->features |= NETIF_F_TSO6;
3680         netdev->features |= NETIF_F_LRO;
3681
3682         netdev->vlan_features |= NETIF_F_TSO;
3683         netdev->vlan_features |= NETIF_F_TSO6;
3684         netdev->vlan_features |= NETIF_F_IP_CSUM;
3685         netdev->vlan_features |= NETIF_F_SG;
3686
3687         if (pci_using_dac)
3688                 netdev->features |= NETIF_F_HIGHDMA;
3689
3690         /* make sure the EEPROM is good */
3691         if (ixgbe_validate_eeprom_checksum(hw, NULL) < 0) {
3692                 dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n");
3693                 err = -EIO;
3694                 goto err_eeprom;
3695         }
3696
3697         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
3698         memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
3699
3700         if (ixgbe_validate_mac_addr(netdev->dev_addr)) {
3701                 err = -EIO;
3702                 goto err_eeprom;
3703         }
3704
3705         init_timer(&adapter->watchdog_timer);
3706         adapter->watchdog_timer.function = &ixgbe_watchdog;
3707         adapter->watchdog_timer.data = (unsigned long)adapter;
3708
3709         INIT_WORK(&adapter->reset_task, ixgbe_reset_task);
3710
3711         err = ixgbe_init_interrupt_scheme(adapter);
3712         if (err)
3713                 goto err_sw_init;
3714
3715         /* print bus type/speed/width info */
3716         pci_read_config_word(pdev, IXGBE_PCI_LINK_STATUS, &link_status);
3717         link_speed = link_status & IXGBE_PCI_LINK_SPEED;
3718         link_width = link_status & IXGBE_PCI_LINK_WIDTH;
3719         dev_info(&pdev->dev, "(PCI Express:%s:%s) "
3720                  "%02x:%02x:%02x:%02x:%02x:%02x\n",
3721                 ((link_speed == IXGBE_PCI_LINK_SPEED_5000) ? "5.0Gb/s" :
3722                  (link_speed == IXGBE_PCI_LINK_SPEED_2500) ? "2.5Gb/s" :
3723                  "Unknown"),
3724                 ((link_width == IXGBE_PCI_LINK_WIDTH_8) ? "Width x8" :
3725                  (link_width == IXGBE_PCI_LINK_WIDTH_4) ? "Width x4" :
3726                  (link_width == IXGBE_PCI_LINK_WIDTH_2) ? "Width x2" :
3727                  (link_width == IXGBE_PCI_LINK_WIDTH_1) ? "Width x1" :
3728                  "Unknown"),
3729                 netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
3730                 netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
3731         ixgbe_read_part_num(hw, &part_num);
3732         dev_info(&pdev->dev, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
3733                  hw->mac.type, hw->phy.type,
3734                  (part_num >> 8), (part_num & 0xff));
3735
3736         if (link_width <= IXGBE_PCI_LINK_WIDTH_4) {
3737                 dev_warn(&pdev->dev, "PCI-Express bandwidth available for "
3738                          "this card is not sufficient for optimal "
3739                          "performance.\n");
3740                 dev_warn(&pdev->dev, "For optimal performance a x8 "
3741                          "PCI-Express slot is required.\n");
3742         }
3743
3744         /* reset the hardware with the new settings */
3745         ixgbe_start_hw(hw);
3746
3747         netif_carrier_off(netdev);
3748         netif_tx_stop_all_queues(netdev);
3749
3750         ixgbe_napi_add_all(adapter);
3751
3752         strcpy(netdev->name, "eth%d");
3753         err = register_netdev(netdev);
3754         if (err)
3755                 goto err_register;
3756
3757 #if defined(CONFIG_DCA) || defined (CONFIG_DCA_MODULE)
3758         if (dca_add_requester(&pdev->dev) == 0) {
3759                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
3760                 /* always use CB2 mode, difference is masked
3761                  * in the CB driver */
3762                 IXGBE_WRITE_REG(hw, IXGBE_DCA_CTRL, 2);
3763                 ixgbe_setup_dca(adapter);
3764         }
3765 #endif
3766
3767         dev_info(&pdev->dev, "Intel(R) 10 Gigabit Network Connection\n");
3768         cards_found++;
3769         return 0;
3770
3771 err_register:
3772         ixgbe_release_hw_control(adapter);
3773 err_hw_init:
3774 err_sw_init:
3775         ixgbe_reset_interrupt_capability(adapter);
3776 err_eeprom:
3777         iounmap(hw->hw_addr);
3778 err_ioremap:
3779         free_netdev(netdev);
3780 err_alloc_etherdev:
3781         pci_release_regions(pdev);
3782 err_pci_reg:
3783 err_dma:
3784         pci_disable_device(pdev);
3785         return err;
3786 }
3787
3788 /**
3789  * ixgbe_remove - Device Removal Routine
3790  * @pdev: PCI device information struct
3791  *
3792  * ixgbe_remove is called by the PCI subsystem to alert the driver
3793  * that it should release a PCI device.  The could be caused by a
3794  * Hot-Plug event, or because the driver is going to be removed from
3795  * memory.
3796  **/
3797 static void __devexit ixgbe_remove(struct pci_dev *pdev)
3798 {
3799         struct net_device *netdev = pci_get_drvdata(pdev);
3800         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3801
3802         set_bit(__IXGBE_DOWN, &adapter->state);
3803         del_timer_sync(&adapter->watchdog_timer);
3804
3805         flush_scheduled_work();
3806
3807 #if defined(CONFIG_DCA) || defined (CONFIG_DCA_MODULE)
3808         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
3809                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
3810                 dca_remove_requester(&pdev->dev);
3811                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
3812         }
3813
3814 #endif
3815         unregister_netdev(netdev);
3816
3817         ixgbe_reset_interrupt_capability(adapter);
3818
3819         ixgbe_release_hw_control(adapter);
3820
3821         iounmap(adapter->hw.hw_addr);
3822         pci_release_regions(pdev);
3823
3824         DPRINTK(PROBE, INFO, "complete\n");
3825         kfree(adapter->tx_ring);
3826         kfree(adapter->rx_ring);
3827
3828         free_netdev(netdev);
3829
3830         pci_disable_device(pdev);
3831 }
3832
3833 /**
3834  * ixgbe_io_error_detected - called when PCI error is detected
3835  * @pdev: Pointer to PCI device
3836  * @state: The current pci connection state
3837  *
3838  * This function is called after a PCI bus error affecting
3839  * this device has been detected.
3840  */
3841 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
3842                                                 pci_channel_state_t state)
3843 {
3844         struct net_device *netdev = pci_get_drvdata(pdev);
3845         struct ixgbe_adapter *adapter = netdev->priv;
3846
3847         netif_device_detach(netdev);
3848
3849         if (netif_running(netdev))
3850                 ixgbe_down(adapter);
3851         pci_disable_device(pdev);
3852
3853         /* Request a slot slot reset. */
3854         return PCI_ERS_RESULT_NEED_RESET;
3855 }
3856
3857 /**
3858  * ixgbe_io_slot_reset - called after the pci bus has been reset.
3859  * @pdev: Pointer to PCI device
3860  *
3861  * Restart the card from scratch, as if from a cold-boot.
3862  */
3863 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
3864 {
3865         struct net_device *netdev = pci_get_drvdata(pdev);
3866         struct ixgbe_adapter *adapter = netdev->priv;
3867
3868         if (pci_enable_device(pdev)) {
3869                 DPRINTK(PROBE, ERR,
3870                         "Cannot re-enable PCI device after reset.\n");
3871                 return PCI_ERS_RESULT_DISCONNECT;
3872         }
3873         pci_set_master(pdev);
3874         pci_restore_state(pdev);
3875
3876         pci_enable_wake(pdev, PCI_D3hot, 0);
3877         pci_enable_wake(pdev, PCI_D3cold, 0);
3878
3879         ixgbe_reset(adapter);
3880
3881         return PCI_ERS_RESULT_RECOVERED;
3882 }
3883
3884 /**
3885  * ixgbe_io_resume - called when traffic can start flowing again.
3886  * @pdev: Pointer to PCI device
3887  *
3888  * This callback is called when the error recovery driver tells us that
3889  * its OK to resume normal operation.
3890  */
3891 static void ixgbe_io_resume(struct pci_dev *pdev)
3892 {
3893         struct net_device *netdev = pci_get_drvdata(pdev);
3894         struct ixgbe_adapter *adapter = netdev->priv;
3895
3896         if (netif_running(netdev)) {
3897                 if (ixgbe_up(adapter)) {
3898                         DPRINTK(PROBE, INFO, "ixgbe_up failed after reset\n");
3899                         return;
3900                 }
3901         }
3902
3903         netif_device_attach(netdev);
3904
3905 }
3906
3907 static struct pci_error_handlers ixgbe_err_handler = {
3908         .error_detected = ixgbe_io_error_detected,
3909         .slot_reset = ixgbe_io_slot_reset,
3910         .resume = ixgbe_io_resume,
3911 };
3912
3913 static struct pci_driver ixgbe_driver = {
3914         .name     = ixgbe_driver_name,
3915         .id_table = ixgbe_pci_tbl,
3916         .probe    = ixgbe_probe,
3917         .remove   = __devexit_p(ixgbe_remove),
3918 #ifdef CONFIG_PM
3919         .suspend  = ixgbe_suspend,
3920         .resume   = ixgbe_resume,
3921 #endif
3922         .shutdown = ixgbe_shutdown,
3923         .err_handler = &ixgbe_err_handler
3924 };
3925
3926 /**
3927  * ixgbe_init_module - Driver Registration Routine
3928  *
3929  * ixgbe_init_module is the first routine called when the driver is
3930  * loaded. All it does is register with the PCI subsystem.
3931  **/
3932 static int __init ixgbe_init_module(void)
3933 {
3934         int ret;
3935         printk(KERN_INFO "%s: %s - version %s\n", ixgbe_driver_name,
3936                ixgbe_driver_string, ixgbe_driver_version);
3937
3938         printk(KERN_INFO "%s: %s\n", ixgbe_driver_name, ixgbe_copyright);
3939
3940 #if defined(CONFIG_DCA) || defined (CONFIG_DCA_MODULE)
3941         dca_register_notify(&dca_notifier);
3942
3943 #endif
3944         ret = pci_register_driver(&ixgbe_driver);
3945         return ret;
3946 }
3947 module_init(ixgbe_init_module);
3948
3949 /**
3950  * ixgbe_exit_module - Driver Exit Cleanup Routine
3951  *
3952  * ixgbe_exit_module is called just before the driver is removed
3953  * from memory.
3954  **/
3955 static void __exit ixgbe_exit_module(void)
3956 {
3957 #if defined(CONFIG_DCA) || defined (CONFIG_DCA_MODULE)
3958         dca_unregister_notify(&dca_notifier);
3959 #endif
3960         pci_unregister_driver(&ixgbe_driver);
3961 }
3962
3963 #if defined(CONFIG_DCA) || defined (CONFIG_DCA_MODULE)
3964 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
3965                             void *p)
3966 {
3967         int ret_val;
3968
3969         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
3970                                          __ixgbe_notify_dca);
3971
3972         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
3973 }
3974 #endif /* CONFIG_DCA or CONFIG_DCA_MODULE */
3975
3976 module_exit(ixgbe_exit_module);
3977
3978 /* ixgbe_main.c */