1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2009 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/types.h>
29 #include <linux/module.h>
30 #include <linux/pci.h>
31 #include <linux/netdevice.h>
32 #include <linux/vmalloc.h>
33 #include <linux/string.h>
36 #include <linux/tcp.h>
37 #include <linux/ipv6.h>
38 #include <net/checksum.h>
39 #include <net/ip6_checksum.h>
40 #include <linux/ethtool.h>
41 #include <linux/if_vlan.h>
44 #include "ixgbe_common.h"
46 char ixgbe_driver_name[] = "ixgbe";
47 static const char ixgbe_driver_string[] =
48 "Intel(R) 10 Gigabit PCI Express Network Driver";
50 #define DRV_VERSION "1.3.56-k2"
51 const char ixgbe_driver_version[] = DRV_VERSION;
52 static char ixgbe_copyright[] = "Copyright (c) 1999-2009 Intel Corporation.";
54 static const struct ixgbe_info *ixgbe_info_tbl[] = {
55 [board_82598] = &ixgbe_82598_info,
58 /* ixgbe_pci_tbl - PCI Device ID Table
60 * Wildcard entries (PCI_ANY_ID) should come last
61 * Last entry must be all 0s
63 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
64 * Class, Class Mask, private data (not used) }
66 static struct pci_device_id ixgbe_pci_tbl[] = {
67 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598),
69 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT),
71 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT),
73 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT),
75 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4),
77 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT),
79 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT),
81 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM),
83 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR),
85 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM),
87 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX),
90 /* required last entry */
93 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
95 #ifdef CONFIG_IXGBE_DCA
96 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
98 static struct notifier_block dca_notifier = {
99 .notifier_call = ixgbe_notify_dca,
105 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
106 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
107 MODULE_LICENSE("GPL");
108 MODULE_VERSION(DRV_VERSION);
110 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
112 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
116 /* Let firmware take over control of h/w */
117 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
118 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
119 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
122 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
126 /* Let firmware know the driver has taken over */
127 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
128 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
129 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
132 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, u16 int_alloc_entry,
137 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
138 index = (int_alloc_entry >> 2) & 0x1F;
139 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR(index));
140 ivar &= ~(0xFF << (8 * (int_alloc_entry & 0x3)));
141 ivar |= (msix_vector << (8 * (int_alloc_entry & 0x3)));
142 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR(index), ivar);
145 static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter,
146 struct ixgbe_tx_buffer
149 if (tx_buffer_info->dma) {
150 pci_unmap_page(adapter->pdev, tx_buffer_info->dma,
151 tx_buffer_info->length, PCI_DMA_TODEVICE);
152 tx_buffer_info->dma = 0;
154 if (tx_buffer_info->skb) {
155 dev_kfree_skb_any(tx_buffer_info->skb);
156 tx_buffer_info->skb = NULL;
158 /* tx_buffer_info must be completely set up in the transmit path */
161 static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
162 struct ixgbe_ring *tx_ring,
165 struct ixgbe_hw *hw = &adapter->hw;
168 /* Detect a transmit hang in hardware, this serializes the
169 * check with the clearing of time_stamp and movement of eop */
170 head = IXGBE_READ_REG(hw, tx_ring->head);
171 tail = IXGBE_READ_REG(hw, tx_ring->tail);
172 adapter->detect_tx_hung = false;
173 if ((head != tail) &&
174 tx_ring->tx_buffer_info[eop].time_stamp &&
175 time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) &&
176 !(IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & IXGBE_TFCS_TXOFF)) {
177 /* detected Tx unit hang */
178 union ixgbe_adv_tx_desc *tx_desc;
179 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
180 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
182 " TDH, TDT <%x>, <%x>\n"
183 " next_to_use <%x>\n"
184 " next_to_clean <%x>\n"
185 "tx_buffer_info[next_to_clean]\n"
186 " time_stamp <%lx>\n"
188 tx_ring->queue_index,
190 tx_ring->next_to_use, eop,
191 tx_ring->tx_buffer_info[eop].time_stamp, jiffies);
198 #define IXGBE_MAX_TXD_PWR 14
199 #define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
201 /* Tx Descriptors needed, worst case */
202 #define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
203 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
204 #define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
205 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
207 #define GET_TX_HEAD_FROM_RING(ring) (\
209 ((union ixgbe_adv_tx_desc *)(ring)->desc + (ring)->count))
210 static void ixgbe_tx_timeout(struct net_device *netdev);
213 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
214 * @adapter: board private structure
215 * @tx_ring: tx ring to clean
217 static bool ixgbe_clean_tx_irq(struct ixgbe_adapter *adapter,
218 struct ixgbe_ring *tx_ring)
220 union ixgbe_adv_tx_desc *tx_desc;
221 struct ixgbe_tx_buffer *tx_buffer_info;
222 struct net_device *netdev = adapter->netdev;
226 unsigned int count = 0;
227 unsigned int total_bytes = 0, total_packets = 0;
230 head = GET_TX_HEAD_FROM_RING(tx_ring);
231 head = le32_to_cpu(head);
232 i = tx_ring->next_to_clean;
235 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
236 tx_buffer_info = &tx_ring->tx_buffer_info[i];
237 skb = tx_buffer_info->skb;
240 unsigned int segs, bytecount;
242 /* gso_segs is currently only valid for tcp */
243 segs = skb_shinfo(skb)->gso_segs ?: 1;
244 /* multiply data chunks by size of headers */
245 bytecount = ((segs - 1) * skb_headlen(skb)) +
247 total_packets += segs;
248 total_bytes += bytecount;
251 ixgbe_unmap_and_free_tx_resource(adapter,
255 if (i == tx_ring->count)
259 if (count == tx_ring->count)
264 head = GET_TX_HEAD_FROM_RING(tx_ring);
265 head = le32_to_cpu(head);
271 tx_ring->next_to_clean = i;
273 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
274 if (unlikely(count && netif_carrier_ok(netdev) &&
275 (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
276 /* Make sure that anybody stopping the queue after this
277 * sees the new next_to_clean.
280 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
281 !test_bit(__IXGBE_DOWN, &adapter->state)) {
282 netif_wake_subqueue(netdev, tx_ring->queue_index);
283 ++adapter->restart_queue;
287 if (adapter->detect_tx_hung) {
288 if (ixgbe_check_tx_hang(adapter, tx_ring, i)) {
289 /* schedule immediate reset if we believe we hung */
291 "tx hang %d detected, resetting adapter\n",
292 adapter->tx_timeout_count + 1);
293 ixgbe_tx_timeout(adapter->netdev);
297 /* re-arm the interrupt */
298 if ((total_packets >= tx_ring->work_limit) ||
299 (count == tx_ring->count))
300 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, tx_ring->v_idx);
302 tx_ring->total_bytes += total_bytes;
303 tx_ring->total_packets += total_packets;
304 tx_ring->stats.bytes += total_bytes;
305 tx_ring->stats.packets += total_packets;
306 adapter->net_stats.tx_bytes += total_bytes;
307 adapter->net_stats.tx_packets += total_packets;
308 return (total_packets ? true : false);
311 #ifdef CONFIG_IXGBE_DCA
312 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
313 struct ixgbe_ring *rx_ring)
317 int q = rx_ring - adapter->rx_ring;
319 if (rx_ring->cpu != cpu) {
320 rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q));
321 rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK;
322 rxctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
323 rxctrl |= IXGBE_DCA_RXCTRL_DESC_DCA_EN;
324 rxctrl |= IXGBE_DCA_RXCTRL_HEAD_DCA_EN;
325 rxctrl &= ~(IXGBE_DCA_RXCTRL_DESC_RRO_EN);
326 rxctrl &= ~(IXGBE_DCA_RXCTRL_DESC_WRO_EN |
327 IXGBE_DCA_RXCTRL_DESC_HSRO_EN);
328 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q), rxctrl);
334 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
335 struct ixgbe_ring *tx_ring)
339 int q = tx_ring - adapter->tx_ring;
341 if (tx_ring->cpu != cpu) {
342 txctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q));
343 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK;
344 txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
345 txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN;
346 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q), txctrl);
352 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
356 if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
359 for (i = 0; i < adapter->num_tx_queues; i++) {
360 adapter->tx_ring[i].cpu = -1;
361 ixgbe_update_tx_dca(adapter, &adapter->tx_ring[i]);
363 for (i = 0; i < adapter->num_rx_queues; i++) {
364 adapter->rx_ring[i].cpu = -1;
365 ixgbe_update_rx_dca(adapter, &adapter->rx_ring[i]);
369 static int __ixgbe_notify_dca(struct device *dev, void *data)
371 struct net_device *netdev = dev_get_drvdata(dev);
372 struct ixgbe_adapter *adapter = netdev_priv(netdev);
373 unsigned long event = *(unsigned long *)data;
376 case DCA_PROVIDER_ADD:
377 /* if we're already enabled, don't do it again */
378 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
380 /* Always use CB2 mode, difference is masked
381 * in the CB driver. */
382 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
383 if (dca_add_requester(dev) == 0) {
384 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
385 ixgbe_setup_dca(adapter);
388 /* Fall Through since DCA is disabled. */
389 case DCA_PROVIDER_REMOVE:
390 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
391 dca_remove_requester(dev);
392 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
393 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
401 #endif /* CONFIG_IXGBE_DCA */
403 * ixgbe_receive_skb - Send a completed packet up the stack
404 * @adapter: board private structure
405 * @skb: packet to send up
406 * @status: hardware indication of status of receive
407 * @rx_ring: rx descriptor ring (for a specific queue) to setup
408 * @rx_desc: rx descriptor
410 static void ixgbe_receive_skb(struct ixgbe_q_vector *q_vector,
411 struct sk_buff *skb, u8 status,
412 union ixgbe_adv_rx_desc *rx_desc)
414 struct ixgbe_adapter *adapter = q_vector->adapter;
415 struct napi_struct *napi = &q_vector->napi;
416 bool is_vlan = (status & IXGBE_RXD_STAT_VP);
417 u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
419 skb_record_rx_queue(skb, q_vector - &adapter->q_vector[0]);
420 if (skb->ip_summed == CHECKSUM_UNNECESSARY) {
421 if (adapter->vlgrp && is_vlan && (tag != 0))
422 vlan_gro_receive(napi, adapter->vlgrp, tag, skb);
424 napi_gro_receive(napi, skb);
426 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
427 if (adapter->vlgrp && is_vlan && (tag != 0))
428 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, tag);
430 netif_receive_skb(skb);
432 if (adapter->vlgrp && is_vlan && (tag != 0))
433 vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
441 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
442 * @adapter: address of board private structure
443 * @status_err: hardware indication of status of receive
444 * @skb: skb currently being received and modified
446 static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter,
447 u32 status_err, struct sk_buff *skb)
449 skb->ip_summed = CHECKSUM_NONE;
451 /* Rx csum disabled */
452 if (!(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
455 /* if IP and error */
456 if ((status_err & IXGBE_RXD_STAT_IPCS) &&
457 (status_err & IXGBE_RXDADV_ERR_IPE)) {
458 adapter->hw_csum_rx_error++;
462 if (!(status_err & IXGBE_RXD_STAT_L4CS))
465 if (status_err & IXGBE_RXDADV_ERR_TCPE) {
466 adapter->hw_csum_rx_error++;
470 /* It must be a TCP or UDP packet with a valid checksum */
471 skb->ip_summed = CHECKSUM_UNNECESSARY;
472 adapter->hw_csum_rx_good++;
476 * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
477 * @adapter: address of board private structure
479 static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter *adapter,
480 struct ixgbe_ring *rx_ring,
483 struct pci_dev *pdev = adapter->pdev;
484 union ixgbe_adv_rx_desc *rx_desc;
485 struct ixgbe_rx_buffer *bi;
488 i = rx_ring->next_to_use;
489 bi = &rx_ring->rx_buffer_info[i];
491 while (cleaned_count--) {
492 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
495 (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
497 bi->page = alloc_page(GFP_ATOMIC);
499 adapter->alloc_rx_page_failed++;
504 /* use a half page if we're re-using */
505 bi->page_offset ^= (PAGE_SIZE / 2);
508 bi->page_dma = pci_map_page(pdev, bi->page,
516 skb = netdev_alloc_skb(adapter->netdev,
517 (rx_ring->rx_buf_len +
521 adapter->alloc_rx_buff_failed++;
526 * Make buffer alignment 2 beyond a 16 byte boundary
527 * this will result in a 16 byte aligned IP header after
528 * the 14 byte MAC header is removed
530 skb_reserve(skb, NET_IP_ALIGN);
533 bi->dma = pci_map_single(pdev, skb->data,
537 /* Refresh the desc even if buffer_addrs didn't change because
538 * each write-back erases this info. */
539 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
540 rx_desc->read.pkt_addr = cpu_to_le64(bi->page_dma);
541 rx_desc->read.hdr_addr = cpu_to_le64(bi->dma);
543 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
547 if (i == rx_ring->count)
549 bi = &rx_ring->rx_buffer_info[i];
553 if (rx_ring->next_to_use != i) {
554 rx_ring->next_to_use = i;
556 i = (rx_ring->count - 1);
559 * Force memory writes to complete before letting h/w
560 * know there are new descriptors to fetch. (Only
561 * applicable for weak-ordered memory model archs,
565 writel(i, adapter->hw.hw_addr + rx_ring->tail);
569 static inline u16 ixgbe_get_hdr_info(union ixgbe_adv_rx_desc *rx_desc)
571 return rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
574 static inline u16 ixgbe_get_pkt_info(union ixgbe_adv_rx_desc *rx_desc)
576 return rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
579 static bool ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
580 struct ixgbe_ring *rx_ring,
581 int *work_done, int work_to_do)
583 struct ixgbe_adapter *adapter = q_vector->adapter;
584 struct pci_dev *pdev = adapter->pdev;
585 union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
586 struct ixgbe_rx_buffer *rx_buffer_info, *next_buffer;
591 bool cleaned = false;
592 int cleaned_count = 0;
593 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
595 i = rx_ring->next_to_clean;
596 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
597 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
598 rx_buffer_info = &rx_ring->rx_buffer_info[i];
600 while (staterr & IXGBE_RXD_STAT_DD) {
602 if (*work_done >= work_to_do)
606 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
607 hdr_info = le16_to_cpu(ixgbe_get_hdr_info(rx_desc));
608 len = (hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
609 IXGBE_RXDADV_HDRBUFLEN_SHIFT;
610 if (hdr_info & IXGBE_RXDADV_SPH)
611 adapter->rx_hdr_split++;
612 if (len > IXGBE_RX_HDR_SIZE)
613 len = IXGBE_RX_HDR_SIZE;
614 upper_len = le16_to_cpu(rx_desc->wb.upper.length);
616 len = le16_to_cpu(rx_desc->wb.upper.length);
620 skb = rx_buffer_info->skb;
621 prefetch(skb->data - NET_IP_ALIGN);
622 rx_buffer_info->skb = NULL;
624 if (len && !skb_shinfo(skb)->nr_frags) {
625 pci_unmap_single(pdev, rx_buffer_info->dma,
632 pci_unmap_page(pdev, rx_buffer_info->page_dma,
633 PAGE_SIZE / 2, PCI_DMA_FROMDEVICE);
634 rx_buffer_info->page_dma = 0;
635 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
636 rx_buffer_info->page,
637 rx_buffer_info->page_offset,
640 if ((rx_ring->rx_buf_len > (PAGE_SIZE / 2)) ||
641 (page_count(rx_buffer_info->page) != 1))
642 rx_buffer_info->page = NULL;
644 get_page(rx_buffer_info->page);
646 skb->len += upper_len;
647 skb->data_len += upper_len;
648 skb->truesize += upper_len;
652 if (i == rx_ring->count)
654 next_buffer = &rx_ring->rx_buffer_info[i];
656 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
660 if (staterr & IXGBE_RXD_STAT_EOP) {
661 rx_ring->stats.packets++;
662 rx_ring->stats.bytes += skb->len;
664 rx_buffer_info->skb = next_buffer->skb;
665 rx_buffer_info->dma = next_buffer->dma;
666 next_buffer->skb = skb;
667 next_buffer->dma = 0;
668 adapter->non_eop_descs++;
672 if (staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK) {
673 dev_kfree_skb_irq(skb);
677 ixgbe_rx_checksum(adapter, staterr, skb);
679 /* probably a little skewed due to removing CRC */
680 total_rx_bytes += skb->len;
683 skb->protocol = eth_type_trans(skb, adapter->netdev);
684 ixgbe_receive_skb(q_vector, skb, staterr, rx_desc);
687 rx_desc->wb.upper.status_error = 0;
689 /* return some buffers to hardware, one at a time is too slow */
690 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
691 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
695 /* use prefetched values */
697 rx_buffer_info = next_buffer;
699 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
702 rx_ring->next_to_clean = i;
703 cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
706 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
708 rx_ring->total_packets += total_rx_packets;
709 rx_ring->total_bytes += total_rx_bytes;
710 adapter->net_stats.rx_bytes += total_rx_bytes;
711 adapter->net_stats.rx_packets += total_rx_packets;
716 static int ixgbe_clean_rxonly(struct napi_struct *, int);
718 * ixgbe_configure_msix - Configure MSI-X hardware
719 * @adapter: board private structure
721 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
724 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
726 struct ixgbe_q_vector *q_vector;
727 int i, j, q_vectors, v_idx, r_idx;
730 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
732 /* Populate the IVAR table and set the ITR values to the
733 * corresponding register.
735 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
736 q_vector = &adapter->q_vector[v_idx];
737 /* XXX for_each_bit(...) */
738 r_idx = find_first_bit(q_vector->rxr_idx,
739 adapter->num_rx_queues);
741 for (i = 0; i < q_vector->rxr_count; i++) {
742 j = adapter->rx_ring[r_idx].reg_idx;
743 ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(j), v_idx);
744 r_idx = find_next_bit(q_vector->rxr_idx,
745 adapter->num_rx_queues,
748 r_idx = find_first_bit(q_vector->txr_idx,
749 adapter->num_tx_queues);
751 for (i = 0; i < q_vector->txr_count; i++) {
752 j = adapter->tx_ring[r_idx].reg_idx;
753 ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(j), v_idx);
754 r_idx = find_next_bit(q_vector->txr_idx,
755 adapter->num_tx_queues,
759 /* if this is a tx only vector halve the interrupt rate */
760 if (q_vector->txr_count && !q_vector->rxr_count)
761 q_vector->eitr = (adapter->eitr_param >> 1);
764 q_vector->eitr = adapter->eitr_param;
766 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx),
767 EITR_INTS_PER_SEC_TO_REG(q_vector->eitr));
770 ixgbe_set_ivar(adapter, IXGBE_IVAR_OTHER_CAUSES_INDEX, v_idx);
771 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
773 /* set up to autoclear timer, and the vectors */
774 mask = IXGBE_EIMS_ENABLE_MASK;
775 mask &= ~(IXGBE_EIMS_OTHER | IXGBE_EIMS_LSC);
776 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
783 latency_invalid = 255
787 * ixgbe_update_itr - update the dynamic ITR value based on statistics
788 * @adapter: pointer to adapter
789 * @eitr: eitr setting (ints per sec) to give last timeslice
790 * @itr_setting: current throttle rate in ints/second
791 * @packets: the number of packets during this measurement interval
792 * @bytes: the number of bytes during this measurement interval
794 * Stores a new ITR value based on packets and byte
795 * counts during the last interrupt. The advantage of per interrupt
796 * computation is faster updates and more accurate ITR for the current
797 * traffic pattern. Constants in this function were computed
798 * based on theoretical maximum wire speed and thresholds were set based
799 * on testing data as well as attempting to minimize response time
800 * while increasing bulk throughput.
801 * this functionality is controlled by the InterruptThrottleRate module
802 * parameter (see ixgbe_param.c)
804 static u8 ixgbe_update_itr(struct ixgbe_adapter *adapter,
805 u32 eitr, u8 itr_setting,
806 int packets, int bytes)
808 unsigned int retval = itr_setting;
813 goto update_itr_done;
816 /* simple throttlerate management
817 * 0-20MB/s lowest (100000 ints/s)
818 * 20-100MB/s low (20000 ints/s)
819 * 100-1249MB/s bulk (8000 ints/s)
821 /* what was last interrupt timeslice? */
822 timepassed_us = 1000000/eitr;
823 bytes_perint = bytes / timepassed_us; /* bytes/usec */
825 switch (itr_setting) {
827 if (bytes_perint > adapter->eitr_low)
828 retval = low_latency;
831 if (bytes_perint > adapter->eitr_high)
832 retval = bulk_latency;
833 else if (bytes_perint <= adapter->eitr_low)
834 retval = lowest_latency;
837 if (bytes_perint <= adapter->eitr_high)
838 retval = low_latency;
846 static void ixgbe_set_itr_msix(struct ixgbe_q_vector *q_vector)
848 struct ixgbe_adapter *adapter = q_vector->adapter;
849 struct ixgbe_hw *hw = &adapter->hw;
851 u8 current_itr, ret_itr;
852 int i, r_idx, v_idx = ((void *)q_vector - (void *)(adapter->q_vector)) /
853 sizeof(struct ixgbe_q_vector);
854 struct ixgbe_ring *rx_ring, *tx_ring;
856 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
857 for (i = 0; i < q_vector->txr_count; i++) {
858 tx_ring = &(adapter->tx_ring[r_idx]);
859 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
861 tx_ring->total_packets,
862 tx_ring->total_bytes);
863 /* if the result for this queue would decrease interrupt
864 * rate for this vector then use that result */
865 q_vector->tx_itr = ((q_vector->tx_itr > ret_itr) ?
866 q_vector->tx_itr - 1 : ret_itr);
867 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
871 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
872 for (i = 0; i < q_vector->rxr_count; i++) {
873 rx_ring = &(adapter->rx_ring[r_idx]);
874 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
876 rx_ring->total_packets,
877 rx_ring->total_bytes);
878 /* if the result for this queue would decrease interrupt
879 * rate for this vector then use that result */
880 q_vector->rx_itr = ((q_vector->rx_itr > ret_itr) ?
881 q_vector->rx_itr - 1 : ret_itr);
882 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
886 current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
888 switch (current_itr) {
889 /* counts and packets in update_itr are dependent on these numbers */
894 new_itr = 20000; /* aka hwitr = ~200 */
902 if (new_itr != q_vector->eitr) {
904 /* do an exponential smoothing */
905 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
906 q_vector->eitr = new_itr;
907 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
908 /* must write high and low 16 bits to reset counter */
909 DPRINTK(TX_ERR, DEBUG, "writing eitr(%d): %08X\n", v_idx,
911 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg | (itr_reg)<<16);
917 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
919 struct ixgbe_hw *hw = &adapter->hw;
921 if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
922 (eicr & IXGBE_EICR_GPI_SDP1)) {
923 DPRINTK(PROBE, CRIT, "Fan has stopped, replace the adapter\n");
924 /* write to clear the interrupt */
925 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
929 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
931 struct ixgbe_hw *hw = &adapter->hw;
934 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
935 adapter->link_check_timeout = jiffies;
936 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
937 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
938 schedule_work(&adapter->watchdog_task);
942 static irqreturn_t ixgbe_msix_lsc(int irq, void *data)
944 struct net_device *netdev = data;
945 struct ixgbe_adapter *adapter = netdev_priv(netdev);
946 struct ixgbe_hw *hw = &adapter->hw;
947 u32 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
949 if (eicr & IXGBE_EICR_LSC)
950 ixgbe_check_lsc(adapter);
952 ixgbe_check_fan_failure(adapter, eicr);
954 if (!test_bit(__IXGBE_DOWN, &adapter->state))
955 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER);
960 static irqreturn_t ixgbe_msix_clean_tx(int irq, void *data)
962 struct ixgbe_q_vector *q_vector = data;
963 struct ixgbe_adapter *adapter = q_vector->adapter;
964 struct ixgbe_ring *tx_ring;
967 if (!q_vector->txr_count)
970 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
971 for (i = 0; i < q_vector->txr_count; i++) {
972 tx_ring = &(adapter->tx_ring[r_idx]);
973 #ifdef CONFIG_IXGBE_DCA
974 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
975 ixgbe_update_tx_dca(adapter, tx_ring);
977 tx_ring->total_bytes = 0;
978 tx_ring->total_packets = 0;
979 ixgbe_clean_tx_irq(adapter, tx_ring);
980 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
988 * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
990 * @data: pointer to our q_vector struct for this interrupt vector
992 static irqreturn_t ixgbe_msix_clean_rx(int irq, void *data)
994 struct ixgbe_q_vector *q_vector = data;
995 struct ixgbe_adapter *adapter = q_vector->adapter;
996 struct ixgbe_ring *rx_ring;
1000 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1001 for (i = 0; i < q_vector->rxr_count; i++) {
1002 rx_ring = &(adapter->rx_ring[r_idx]);
1003 rx_ring->total_bytes = 0;
1004 rx_ring->total_packets = 0;
1005 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1009 if (!q_vector->rxr_count)
1012 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1013 rx_ring = &(adapter->rx_ring[r_idx]);
1014 /* disable interrupts on this vector only */
1015 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, rx_ring->v_idx);
1016 napi_schedule(&q_vector->napi);
1021 static irqreturn_t ixgbe_msix_clean_many(int irq, void *data)
1023 ixgbe_msix_clean_rx(irq, data);
1024 ixgbe_msix_clean_tx(irq, data);
1030 * ixgbe_clean_rxonly - msix (aka one shot) rx clean routine
1031 * @napi: napi struct with our devices info in it
1032 * @budget: amount of work driver is allowed to do this pass, in packets
1034 * This function is optimized for cleaning one queue only on a single
1037 static int ixgbe_clean_rxonly(struct napi_struct *napi, int budget)
1039 struct ixgbe_q_vector *q_vector =
1040 container_of(napi, struct ixgbe_q_vector, napi);
1041 struct ixgbe_adapter *adapter = q_vector->adapter;
1042 struct ixgbe_ring *rx_ring = NULL;
1046 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1047 rx_ring = &(adapter->rx_ring[r_idx]);
1048 #ifdef CONFIG_IXGBE_DCA
1049 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1050 ixgbe_update_rx_dca(adapter, rx_ring);
1053 ixgbe_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
1055 /* If all Rx work done, exit the polling mode */
1056 if (work_done < budget) {
1057 napi_complete(napi);
1058 if (adapter->itr_setting & 3)
1059 ixgbe_set_itr_msix(q_vector);
1060 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1061 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, rx_ring->v_idx);
1068 * ixgbe_clean_rxonly_many - msix (aka one shot) rx clean routine
1069 * @napi: napi struct with our devices info in it
1070 * @budget: amount of work driver is allowed to do this pass, in packets
1072 * This function will clean more than one rx queue associated with a
1075 static int ixgbe_clean_rxonly_many(struct napi_struct *napi, int budget)
1077 struct ixgbe_q_vector *q_vector =
1078 container_of(napi, struct ixgbe_q_vector, napi);
1079 struct ixgbe_adapter *adapter = q_vector->adapter;
1080 struct ixgbe_ring *rx_ring = NULL;
1081 int work_done = 0, i;
1083 u16 enable_mask = 0;
1085 /* attempt to distribute budget to each queue fairly, but don't allow
1086 * the budget to go below 1 because we'll exit polling */
1087 budget /= (q_vector->rxr_count ?: 1);
1088 budget = max(budget, 1);
1089 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1090 for (i = 0; i < q_vector->rxr_count; i++) {
1091 rx_ring = &(adapter->rx_ring[r_idx]);
1092 #ifdef CONFIG_IXGBE_DCA
1093 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1094 ixgbe_update_rx_dca(adapter, rx_ring);
1096 ixgbe_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
1097 enable_mask |= rx_ring->v_idx;
1098 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1102 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1103 rx_ring = &(adapter->rx_ring[r_idx]);
1104 /* If all Rx work done, exit the polling mode */
1105 if (work_done < budget) {
1106 napi_complete(napi);
1107 if (adapter->itr_setting & 3)
1108 ixgbe_set_itr_msix(q_vector);
1109 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1110 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, enable_mask);
1116 static inline void map_vector_to_rxq(struct ixgbe_adapter *a, int v_idx,
1119 a->q_vector[v_idx].adapter = a;
1120 set_bit(r_idx, a->q_vector[v_idx].rxr_idx);
1121 a->q_vector[v_idx].rxr_count++;
1122 a->rx_ring[r_idx].v_idx = 1 << v_idx;
1125 static inline void map_vector_to_txq(struct ixgbe_adapter *a, int v_idx,
1128 a->q_vector[v_idx].adapter = a;
1129 set_bit(r_idx, a->q_vector[v_idx].txr_idx);
1130 a->q_vector[v_idx].txr_count++;
1131 a->tx_ring[r_idx].v_idx = 1 << v_idx;
1135 * ixgbe_map_rings_to_vectors - Maps descriptor rings to vectors
1136 * @adapter: board private structure to initialize
1137 * @vectors: allotted vector count for descriptor rings
1139 * This function maps descriptor rings to the queue-specific vectors
1140 * we were allotted through the MSI-X enabling code. Ideally, we'd have
1141 * one vector per ring/queue, but on a constrained vector budget, we
1142 * group the rings as "efficiently" as possible. You would add new
1143 * mapping configurations in here.
1145 static int ixgbe_map_rings_to_vectors(struct ixgbe_adapter *adapter,
1149 int rxr_idx = 0, txr_idx = 0;
1150 int rxr_remaining = adapter->num_rx_queues;
1151 int txr_remaining = adapter->num_tx_queues;
1156 /* No mapping required if MSI-X is disabled. */
1157 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1161 * The ideal configuration...
1162 * We have enough vectors to map one per queue.
1164 if (vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1165 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1166 map_vector_to_rxq(adapter, v_start, rxr_idx);
1168 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1169 map_vector_to_txq(adapter, v_start, txr_idx);
1175 * If we don't have enough vectors for a 1-to-1
1176 * mapping, we'll have to group them so there are
1177 * multiple queues per vector.
1179 /* Re-adjusting *qpv takes care of the remainder. */
1180 for (i = v_start; i < vectors; i++) {
1181 rqpv = DIV_ROUND_UP(rxr_remaining, vectors - i);
1182 for (j = 0; j < rqpv; j++) {
1183 map_vector_to_rxq(adapter, i, rxr_idx);
1188 for (i = v_start; i < vectors; i++) {
1189 tqpv = DIV_ROUND_UP(txr_remaining, vectors - i);
1190 for (j = 0; j < tqpv; j++) {
1191 map_vector_to_txq(adapter, i, txr_idx);
1202 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
1203 * @adapter: board private structure
1205 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
1206 * interrupts from the kernel.
1208 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
1210 struct net_device *netdev = adapter->netdev;
1211 irqreturn_t (*handler)(int, void *);
1212 int i, vector, q_vectors, err;
1215 /* Decrement for Other and TCP Timer vectors */
1216 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1218 /* Map the Tx/Rx rings to the vectors we were allotted. */
1219 err = ixgbe_map_rings_to_vectors(adapter, q_vectors);
1223 #define SET_HANDLER(_v) ((!(_v)->rxr_count) ? &ixgbe_msix_clean_tx : \
1224 (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \
1225 &ixgbe_msix_clean_many)
1226 for (vector = 0; vector < q_vectors; vector++) {
1227 handler = SET_HANDLER(&adapter->q_vector[vector]);
1229 if(handler == &ixgbe_msix_clean_rx) {
1230 sprintf(adapter->name[vector], "%s-%s-%d",
1231 netdev->name, "rx", ri++);
1233 else if(handler == &ixgbe_msix_clean_tx) {
1234 sprintf(adapter->name[vector], "%s-%s-%d",
1235 netdev->name, "tx", ti++);
1238 sprintf(adapter->name[vector], "%s-%s-%d",
1239 netdev->name, "TxRx", vector);
1241 err = request_irq(adapter->msix_entries[vector].vector,
1242 handler, 0, adapter->name[vector],
1243 &(adapter->q_vector[vector]));
1246 "request_irq failed for MSIX interrupt "
1247 "Error: %d\n", err);
1248 goto free_queue_irqs;
1252 sprintf(adapter->name[vector], "%s:lsc", netdev->name);
1253 err = request_irq(adapter->msix_entries[vector].vector,
1254 &ixgbe_msix_lsc, 0, adapter->name[vector], netdev);
1257 "request_irq for msix_lsc failed: %d\n", err);
1258 goto free_queue_irqs;
1264 for (i = vector - 1; i >= 0; i--)
1265 free_irq(adapter->msix_entries[--vector].vector,
1266 &(adapter->q_vector[i]));
1267 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
1268 pci_disable_msix(adapter->pdev);
1269 kfree(adapter->msix_entries);
1270 adapter->msix_entries = NULL;
1275 static void ixgbe_set_itr(struct ixgbe_adapter *adapter)
1277 struct ixgbe_hw *hw = &adapter->hw;
1278 struct ixgbe_q_vector *q_vector = adapter->q_vector;
1280 u32 new_itr = q_vector->eitr;
1281 struct ixgbe_ring *rx_ring = &adapter->rx_ring[0];
1282 struct ixgbe_ring *tx_ring = &adapter->tx_ring[0];
1284 q_vector->tx_itr = ixgbe_update_itr(adapter, new_itr,
1286 tx_ring->total_packets,
1287 tx_ring->total_bytes);
1288 q_vector->rx_itr = ixgbe_update_itr(adapter, new_itr,
1290 rx_ring->total_packets,
1291 rx_ring->total_bytes);
1293 current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
1295 switch (current_itr) {
1296 /* counts and packets in update_itr are dependent on these numbers */
1297 case lowest_latency:
1301 new_itr = 20000; /* aka hwitr = ~200 */
1310 if (new_itr != q_vector->eitr) {
1312 /* do an exponential smoothing */
1313 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
1314 q_vector->eitr = new_itr;
1315 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
1316 /* must write high and low 16 bits to reset counter */
1317 IXGBE_WRITE_REG(hw, IXGBE_EITR(0), itr_reg | (itr_reg)<<16);
1324 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
1325 * @adapter: board private structure
1327 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
1329 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
1330 IXGBE_WRITE_FLUSH(&adapter->hw);
1331 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1333 for (i = 0; i < adapter->num_msix_vectors; i++)
1334 synchronize_irq(adapter->msix_entries[i].vector);
1336 synchronize_irq(adapter->pdev->irq);
1341 * ixgbe_irq_enable - Enable default interrupt generation settings
1342 * @adapter: board private structure
1344 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter)
1347 mask = IXGBE_EIMS_ENABLE_MASK;
1348 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
1349 mask |= IXGBE_EIMS_GPI_SDP1;
1350 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1351 IXGBE_WRITE_FLUSH(&adapter->hw);
1355 * ixgbe_intr - legacy mode Interrupt Handler
1356 * @irq: interrupt number
1357 * @data: pointer to a network interface device structure
1359 static irqreturn_t ixgbe_intr(int irq, void *data)
1361 struct net_device *netdev = data;
1362 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1363 struct ixgbe_hw *hw = &adapter->hw;
1366 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
1367 * therefore no explict interrupt disable is necessary */
1368 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
1370 /* shared interrupt alert!
1371 * make sure interrupts are enabled because the read will
1372 * have disabled interrupts due to EIAM */
1373 ixgbe_irq_enable(adapter);
1374 return IRQ_NONE; /* Not our interrupt */
1377 if (eicr & IXGBE_EICR_LSC)
1378 ixgbe_check_lsc(adapter);
1380 ixgbe_check_fan_failure(adapter, eicr);
1382 if (napi_schedule_prep(&adapter->q_vector[0].napi)) {
1383 adapter->tx_ring[0].total_packets = 0;
1384 adapter->tx_ring[0].total_bytes = 0;
1385 adapter->rx_ring[0].total_packets = 0;
1386 adapter->rx_ring[0].total_bytes = 0;
1387 /* would disable interrupts here but EIAM disabled it */
1388 __napi_schedule(&adapter->q_vector[0].napi);
1394 static inline void ixgbe_reset_q_vectors(struct ixgbe_adapter *adapter)
1396 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1398 for (i = 0; i < q_vectors; i++) {
1399 struct ixgbe_q_vector *q_vector = &adapter->q_vector[i];
1400 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES);
1401 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES);
1402 q_vector->rxr_count = 0;
1403 q_vector->txr_count = 0;
1408 * ixgbe_request_irq - initialize interrupts
1409 * @adapter: board private structure
1411 * Attempts to configure interrupts using the best available
1412 * capabilities of the hardware and kernel.
1414 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
1416 struct net_device *netdev = adapter->netdev;
1419 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1420 err = ixgbe_request_msix_irqs(adapter);
1421 } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1422 err = request_irq(adapter->pdev->irq, &ixgbe_intr, 0,
1423 netdev->name, netdev);
1425 err = request_irq(adapter->pdev->irq, &ixgbe_intr, IRQF_SHARED,
1426 netdev->name, netdev);
1430 DPRINTK(PROBE, ERR, "request_irq failed, Error %d\n", err);
1435 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
1437 struct net_device *netdev = adapter->netdev;
1439 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1442 q_vectors = adapter->num_msix_vectors;
1445 free_irq(adapter->msix_entries[i].vector, netdev);
1448 for (; i >= 0; i--) {
1449 free_irq(adapter->msix_entries[i].vector,
1450 &(adapter->q_vector[i]));
1453 ixgbe_reset_q_vectors(adapter);
1455 free_irq(adapter->pdev->irq, netdev);
1460 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
1463 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
1465 struct ixgbe_hw *hw = &adapter->hw;
1467 IXGBE_WRITE_REG(hw, IXGBE_EITR(0),
1468 EITR_INTS_PER_SEC_TO_REG(adapter->eitr_param));
1470 ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(0), 0);
1471 ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(0), 0);
1473 map_vector_to_rxq(adapter, 0, 0);
1474 map_vector_to_txq(adapter, 0, 0);
1476 DPRINTK(HW, INFO, "Legacy interrupt IVAR setup done\n");
1480 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
1481 * @adapter: board private structure
1483 * Configure the Tx unit of the MAC after a reset.
1485 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
1488 struct ixgbe_hw *hw = &adapter->hw;
1489 u32 i, j, tdlen, txctrl;
1491 /* Setup the HW Tx Head and Tail descriptor pointers */
1492 for (i = 0; i < adapter->num_tx_queues; i++) {
1493 struct ixgbe_ring *ring = &adapter->tx_ring[i];
1496 tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc);
1497 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j),
1498 (tdba & DMA_32BIT_MASK));
1499 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32));
1501 (ring->count * sizeof(union ixgbe_adv_tx_desc));
1502 tdwba |= IXGBE_TDWBAL_HEAD_WB_ENABLE;
1503 IXGBE_WRITE_REG(hw, IXGBE_TDWBAL(j), tdwba & DMA_32BIT_MASK);
1504 IXGBE_WRITE_REG(hw, IXGBE_TDWBAH(j), (tdwba >> 32));
1505 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), tdlen);
1506 IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0);
1507 IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0);
1508 adapter->tx_ring[i].head = IXGBE_TDH(j);
1509 adapter->tx_ring[i].tail = IXGBE_TDT(j);
1510 /* Disable Tx Head Writeback RO bit, since this hoses
1511 * bookkeeping if things aren't delivered in order.
1513 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j));
1514 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
1515 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl);
1519 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1521 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter, int index)
1523 struct ixgbe_ring *rx_ring;
1528 /* program one srrctl register per VMDq index */
1529 if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
1531 mask = (unsigned long) adapter->ring_feature[RING_F_RSS].mask;
1532 len = sizeof(adapter->ring_feature[RING_F_VMDQ].mask) * 8;
1533 shift = find_first_bit(&mask, len);
1534 queue0 = index & mask;
1535 index = (index & mask) >> shift;
1536 /* program one srrctl per RSS queue since RDRXCTL.MVMEN is enabled */
1538 mask = (unsigned long) adapter->ring_feature[RING_F_RSS].mask;
1539 queue0 = index & mask;
1540 index = index & mask;
1543 rx_ring = &adapter->rx_ring[queue0];
1545 srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(index));
1547 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
1548 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
1550 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1551 srrctl |= IXGBE_RXBUFFER_2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1552 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1553 srrctl |= ((IXGBE_RX_HDR_SIZE <<
1554 IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1555 IXGBE_SRRCTL_BSIZEHDR_MASK);
1557 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1559 if (rx_ring->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1560 srrctl |= IXGBE_RXBUFFER_2048 >>
1561 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1563 srrctl |= rx_ring->rx_buf_len >>
1564 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1566 IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(index), srrctl);
1569 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1570 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1573 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
1574 * @adapter: board private structure
1576 * Configure the Rx unit of the MAC after a reset.
1578 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
1581 struct ixgbe_hw *hw = &adapter->hw;
1582 struct net_device *netdev = adapter->netdev;
1583 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1585 u32 rdlen, rxctrl, rxcsum;
1586 static const u32 seed[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
1587 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
1588 0x6A3E67EA, 0x14364D17, 0x3BED200D};
1595 /* Decide whether to use packet split mode or not */
1596 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1598 /* Set the RX buffer length according to the mode */
1599 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1600 rx_buf_len = IXGBE_RX_HDR_SIZE;
1602 if (netdev->mtu <= ETH_DATA_LEN)
1603 rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1605 rx_buf_len = ALIGN(max_frame, 1024);
1608 fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
1609 fctrl |= IXGBE_FCTRL_BAM;
1610 fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
1611 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl);
1613 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
1614 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1615 hlreg0 &= ~IXGBE_HLREG0_JUMBOEN;
1617 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
1618 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
1620 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1622 rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1623 /* disable receives while setting up the descriptors */
1624 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1625 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
1627 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1628 * the Base and Length of the Rx Descriptor Ring */
1629 for (i = 0; i < adapter->num_rx_queues; i++) {
1630 rdba = adapter->rx_ring[i].dma;
1631 j = adapter->rx_ring[i].reg_idx;
1632 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), (rdba & DMA_32BIT_MASK));
1633 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32));
1634 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j), rdlen);
1635 IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0);
1636 IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0);
1637 adapter->rx_ring[i].head = IXGBE_RDH(j);
1638 adapter->rx_ring[i].tail = IXGBE_RDT(j);
1639 adapter->rx_ring[i].rx_buf_len = rx_buf_len;
1641 ixgbe_configure_srrctl(adapter, j);
1645 * For VMDq support of different descriptor types or
1646 * buffer sizes through the use of multiple SRRCTL
1647 * registers, RDRXCTL.MVMEN must be set to 1
1649 * also, the manual doesn't mention it clearly but DCA hints
1650 * will only use queue 0's tags unless this bit is set. Side
1651 * effects of setting this bit are only that SRRCTL must be
1652 * fully programmed [0..15]
1654 if (adapter->flags &
1655 (IXGBE_FLAG_RSS_ENABLED | IXGBE_FLAG_VMDQ_ENABLED)) {
1656 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
1657 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
1658 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
1661 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
1662 /* Fill out redirection table */
1663 for (i = 0, j = 0; i < 128; i++, j++) {
1664 if (j == adapter->ring_feature[RING_F_RSS].indices)
1666 /* reta = 4-byte sliding window of
1667 * 0x00..(indices-1)(indices-1)00..etc. */
1668 reta = (reta << 8) | (j * 0x11);
1670 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
1673 /* Fill out hash function seeds */
1674 for (i = 0; i < 10; i++)
1675 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), seed[i]);
1677 mrqc = IXGBE_MRQC_RSSEN
1678 /* Perform hash on these packet types */
1679 | IXGBE_MRQC_RSS_FIELD_IPV4
1680 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
1681 | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
1682 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP
1683 | IXGBE_MRQC_RSS_FIELD_IPV6_EX
1684 | IXGBE_MRQC_RSS_FIELD_IPV6
1685 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
1686 | IXGBE_MRQC_RSS_FIELD_IPV6_UDP
1687 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP;
1688 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
1691 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
1693 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED ||
1694 adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED) {
1695 /* Disable indicating checksum in descriptor, enables
1697 rxcsum |= IXGBE_RXCSUM_PCSD;
1699 if (!(rxcsum & IXGBE_RXCSUM_PCSD)) {
1700 /* Enable IPv4 payload checksum for UDP fragments
1701 * if PCSD is not set */
1702 rxcsum |= IXGBE_RXCSUM_IPPCSE;
1705 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
1708 static void ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1710 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1711 struct ixgbe_hw *hw = &adapter->hw;
1713 /* add VID to filter table */
1714 hw->mac.ops.set_vfta(&adapter->hw, vid, 0, true);
1717 static void ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1719 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1720 struct ixgbe_hw *hw = &adapter->hw;
1722 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1723 ixgbe_irq_disable(adapter);
1725 vlan_group_set_device(adapter->vlgrp, vid, NULL);
1727 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1728 ixgbe_irq_enable(adapter);
1730 /* remove VID from filter table */
1731 hw->mac.ops.set_vfta(&adapter->hw, vid, 0, false);
1734 static void ixgbe_vlan_rx_register(struct net_device *netdev,
1735 struct vlan_group *grp)
1737 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1740 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1741 ixgbe_irq_disable(adapter);
1742 adapter->vlgrp = grp;
1745 * For a DCB driver, always enable VLAN tag stripping so we can
1746 * still receive traffic from a DCB-enabled host even if we're
1749 ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL);
1750 ctrl |= IXGBE_VLNCTRL_VME;
1751 ctrl &= ~IXGBE_VLNCTRL_CFIEN;
1752 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl);
1753 ixgbe_vlan_rx_add_vid(netdev, 0);
1756 /* enable VLAN tag insert/strip */
1757 ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL);
1758 ctrl |= IXGBE_VLNCTRL_VME;
1759 ctrl &= ~IXGBE_VLNCTRL_CFIEN;
1760 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl);
1763 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1764 ixgbe_irq_enable(adapter);
1767 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
1769 ixgbe_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1771 if (adapter->vlgrp) {
1773 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1774 if (!vlan_group_get_device(adapter->vlgrp, vid))
1776 ixgbe_vlan_rx_add_vid(adapter->netdev, vid);
1781 static u8 *ixgbe_addr_list_itr(struct ixgbe_hw *hw, u8 **mc_addr_ptr, u32 *vmdq)
1783 struct dev_mc_list *mc_ptr;
1784 u8 *addr = *mc_addr_ptr;
1787 mc_ptr = container_of(addr, struct dev_mc_list, dmi_addr[0]);
1789 *mc_addr_ptr = mc_ptr->next->dmi_addr;
1791 *mc_addr_ptr = NULL;
1797 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
1798 * @netdev: network interface device structure
1800 * The set_rx_method entry point is called whenever the unicast/multicast
1801 * address list or the network interface flags are updated. This routine is
1802 * responsible for configuring the hardware for proper unicast, multicast and
1805 static void ixgbe_set_rx_mode(struct net_device *netdev)
1807 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1808 struct ixgbe_hw *hw = &adapter->hw;
1810 u8 *addr_list = NULL;
1813 /* Check for Promiscuous and All Multicast modes */
1815 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1816 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
1818 if (netdev->flags & IFF_PROMISC) {
1819 hw->addr_ctrl.user_set_promisc = 1;
1820 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1821 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
1823 if (netdev->flags & IFF_ALLMULTI) {
1824 fctrl |= IXGBE_FCTRL_MPE;
1825 fctrl &= ~IXGBE_FCTRL_UPE;
1827 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1829 vlnctrl |= IXGBE_VLNCTRL_VFE;
1830 hw->addr_ctrl.user_set_promisc = 0;
1833 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
1834 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
1836 /* reprogram secondary unicast list */
1837 addr_count = netdev->uc_count;
1839 addr_list = netdev->uc_list->dmi_addr;
1840 hw->mac.ops.update_uc_addr_list(hw, addr_list, addr_count,
1841 ixgbe_addr_list_itr);
1843 /* reprogram multicast list */
1844 addr_count = netdev->mc_count;
1846 addr_list = netdev->mc_list->dmi_addr;
1847 hw->mac.ops.update_mc_addr_list(hw, addr_list, addr_count,
1848 ixgbe_addr_list_itr);
1851 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
1854 struct ixgbe_q_vector *q_vector;
1855 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1857 /* legacy and MSI only use one vector */
1858 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1861 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1862 struct napi_struct *napi;
1863 q_vector = &adapter->q_vector[q_idx];
1864 if (!q_vector->rxr_count)
1866 napi = &q_vector->napi;
1867 if ((adapter->flags & IXGBE_FLAG_MSIX_ENABLED) &&
1868 (q_vector->rxr_count > 1))
1869 napi->poll = &ixgbe_clean_rxonly_many;
1875 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
1878 struct ixgbe_q_vector *q_vector;
1879 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1881 /* legacy and MSI only use one vector */
1882 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
1885 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1886 q_vector = &adapter->q_vector[q_idx];
1887 if (!q_vector->rxr_count)
1889 napi_disable(&q_vector->napi);
1893 #ifdef CONFIG_IXGBE_DCB
1895 * ixgbe_configure_dcb - Configure DCB hardware
1896 * @adapter: ixgbe adapter struct
1898 * This is called by the driver on open to configure the DCB hardware.
1899 * This is also called by the gennetlink interface when reconfiguring
1902 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
1904 struct ixgbe_hw *hw = &adapter->hw;
1905 u32 txdctl, vlnctrl;
1908 ixgbe_dcb_check_config(&adapter->dcb_cfg);
1909 ixgbe_dcb_calculate_tc_credits(&adapter->dcb_cfg, DCB_TX_CONFIG);
1910 ixgbe_dcb_calculate_tc_credits(&adapter->dcb_cfg, DCB_RX_CONFIG);
1912 /* reconfigure the hardware */
1913 ixgbe_dcb_hw_config(&adapter->hw, &adapter->dcb_cfg);
1915 for (i = 0; i < adapter->num_tx_queues; i++) {
1916 j = adapter->tx_ring[i].reg_idx;
1917 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
1918 /* PThresh workaround for Tx hang with DFP enabled. */
1920 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
1922 /* Enable VLAN tag insert/strip */
1923 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
1924 vlnctrl |= IXGBE_VLNCTRL_VME | IXGBE_VLNCTRL_VFE;
1925 vlnctrl &= ~IXGBE_VLNCTRL_CFIEN;
1926 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
1927 hw->mac.ops.set_vfta(&adapter->hw, 0, 0, true);
1931 static void ixgbe_configure(struct ixgbe_adapter *adapter)
1933 struct net_device *netdev = adapter->netdev;
1936 ixgbe_set_rx_mode(netdev);
1938 ixgbe_restore_vlan(adapter);
1939 #ifdef CONFIG_IXGBE_DCB
1940 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
1941 netif_set_gso_max_size(netdev, 32768);
1942 ixgbe_configure_dcb(adapter);
1944 netif_set_gso_max_size(netdev, 65536);
1947 netif_set_gso_max_size(netdev, 65536);
1950 ixgbe_configure_tx(adapter);
1951 ixgbe_configure_rx(adapter);
1952 for (i = 0; i < adapter->num_rx_queues; i++)
1953 ixgbe_alloc_rx_buffers(adapter, &adapter->rx_ring[i],
1954 (adapter->rx_ring[i].count - 1));
1958 * ixgbe_link_config - set up initial link with default speed and duplex
1959 * @hw: pointer to private hardware struct
1961 * Returns 0 on success, negative on failure
1963 static int ixgbe_link_config(struct ixgbe_hw *hw)
1966 bool link_up = false;
1967 u32 ret = IXGBE_ERR_LINK_SETUP;
1969 if (hw->mac.ops.check_link)
1970 ret = hw->mac.ops.check_link(hw, &autoneg, &link_up, false);
1975 if (hw->mac.ops.get_link_capabilities)
1976 ret = hw->mac.ops.get_link_capabilities(hw, &autoneg,
1981 if (hw->mac.ops.setup_link_speed)
1982 ret = hw->mac.ops.setup_link_speed(hw, autoneg, true, link_up);
1988 static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
1990 struct net_device *netdev = adapter->netdev;
1991 struct ixgbe_hw *hw = &adapter->hw;
1994 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1995 u32 txdctl, rxdctl, mhadd;
1998 ixgbe_get_hw_control(adapter);
2000 if ((adapter->flags & IXGBE_FLAG_MSIX_ENABLED) ||
2001 (adapter->flags & IXGBE_FLAG_MSI_ENABLED)) {
2002 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2003 gpie = (IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_EIAME |
2004 IXGBE_GPIE_PBA_SUPPORT | IXGBE_GPIE_OCD);
2009 /* XXX: to interrupt immediately for EICS writes, enable this */
2010 /* gpie |= IXGBE_GPIE_EIMEN; */
2011 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
2014 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
2015 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
2016 * specifically only auto mask tx and rx interrupts */
2017 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
2020 /* Enable fan failure interrupt if media type is copper */
2021 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
2022 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE);
2023 gpie |= IXGBE_SDP1_GPIEN;
2024 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
2027 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
2028 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
2029 mhadd &= ~IXGBE_MHADD_MFS_MASK;
2030 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
2032 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
2035 for (i = 0; i < adapter->num_tx_queues; i++) {
2036 j = adapter->tx_ring[i].reg_idx;
2037 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
2038 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
2039 txdctl |= (8 << 16);
2040 txdctl |= IXGBE_TXDCTL_ENABLE;
2041 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
2044 for (i = 0; i < adapter->num_rx_queues; i++) {
2045 j = adapter->rx_ring[i].reg_idx;
2046 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
2047 /* enable PTHRESH=32 descriptors (half the internal cache)
2048 * and HTHRESH=0 descriptors (to minimize latency on fetch),
2049 * this also removes a pesky rx_no_buffer_count increment */
2051 rxdctl |= IXGBE_RXDCTL_ENABLE;
2052 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), rxdctl);
2054 /* enable all receives */
2055 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
2056 rxdctl |= (IXGBE_RXCTRL_DMBYPS | IXGBE_RXCTRL_RXEN);
2057 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxdctl);
2059 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2060 ixgbe_configure_msix(adapter);
2062 ixgbe_configure_msi_and_legacy(adapter);
2064 ixgbe_napi_add_all(adapter);
2066 clear_bit(__IXGBE_DOWN, &adapter->state);
2067 ixgbe_napi_enable_all(adapter);
2069 /* clear any pending interrupts, may auto mask */
2070 IXGBE_READ_REG(hw, IXGBE_EICR);
2072 ixgbe_irq_enable(adapter);
2074 err = ixgbe_link_config(hw);
2076 dev_err(&adapter->pdev->dev, "link_config FAILED %d\n", err);
2078 /* enable transmits */
2079 netif_tx_start_all_queues(netdev);
2081 /* bring the link up in the watchdog, this could race with our first
2082 * link up interrupt but shouldn't be a problem */
2083 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2084 adapter->link_check_timeout = jiffies;
2085 mod_timer(&adapter->watchdog_timer, jiffies);
2089 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
2091 WARN_ON(in_interrupt());
2092 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
2094 ixgbe_down(adapter);
2096 clear_bit(__IXGBE_RESETTING, &adapter->state);
2099 int ixgbe_up(struct ixgbe_adapter *adapter)
2101 /* hardware has been reset, we need to reload some things */
2102 ixgbe_configure(adapter);
2104 return ixgbe_up_complete(adapter);
2107 void ixgbe_reset(struct ixgbe_adapter *adapter)
2109 struct ixgbe_hw *hw = &adapter->hw;
2110 if (hw->mac.ops.init_hw(hw))
2111 dev_err(&adapter->pdev->dev, "Hardware Error\n");
2113 /* reprogram the RAR[0] in case user changed it. */
2114 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);
2119 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
2120 * @adapter: board private structure
2121 * @rx_ring: ring to free buffers from
2123 static void ixgbe_clean_rx_ring(struct ixgbe_adapter *adapter,
2124 struct ixgbe_ring *rx_ring)
2126 struct pci_dev *pdev = adapter->pdev;
2130 /* Free all the Rx ring sk_buffs */
2132 for (i = 0; i < rx_ring->count; i++) {
2133 struct ixgbe_rx_buffer *rx_buffer_info;
2135 rx_buffer_info = &rx_ring->rx_buffer_info[i];
2136 if (rx_buffer_info->dma) {
2137 pci_unmap_single(pdev, rx_buffer_info->dma,
2138 rx_ring->rx_buf_len,
2139 PCI_DMA_FROMDEVICE);
2140 rx_buffer_info->dma = 0;
2142 if (rx_buffer_info->skb) {
2143 dev_kfree_skb(rx_buffer_info->skb);
2144 rx_buffer_info->skb = NULL;
2146 if (!rx_buffer_info->page)
2148 pci_unmap_page(pdev, rx_buffer_info->page_dma, PAGE_SIZE / 2,
2149 PCI_DMA_FROMDEVICE);
2150 rx_buffer_info->page_dma = 0;
2151 put_page(rx_buffer_info->page);
2152 rx_buffer_info->page = NULL;
2153 rx_buffer_info->page_offset = 0;
2156 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
2157 memset(rx_ring->rx_buffer_info, 0, size);
2159 /* Zero out the descriptor ring */
2160 memset(rx_ring->desc, 0, rx_ring->size);
2162 rx_ring->next_to_clean = 0;
2163 rx_ring->next_to_use = 0;
2165 writel(0, adapter->hw.hw_addr + rx_ring->head);
2166 writel(0, adapter->hw.hw_addr + rx_ring->tail);
2170 * ixgbe_clean_tx_ring - Free Tx Buffers
2171 * @adapter: board private structure
2172 * @tx_ring: ring to be cleaned
2174 static void ixgbe_clean_tx_ring(struct ixgbe_adapter *adapter,
2175 struct ixgbe_ring *tx_ring)
2177 struct ixgbe_tx_buffer *tx_buffer_info;
2181 /* Free all the Tx ring sk_buffs */
2183 for (i = 0; i < tx_ring->count; i++) {
2184 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2185 ixgbe_unmap_and_free_tx_resource(adapter, tx_buffer_info);
2188 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
2189 memset(tx_ring->tx_buffer_info, 0, size);
2191 /* Zero out the descriptor ring */
2192 memset(tx_ring->desc, 0, tx_ring->size);
2194 tx_ring->next_to_use = 0;
2195 tx_ring->next_to_clean = 0;
2197 writel(0, adapter->hw.hw_addr + tx_ring->head);
2198 writel(0, adapter->hw.hw_addr + tx_ring->tail);
2202 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
2203 * @adapter: board private structure
2205 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
2209 for (i = 0; i < adapter->num_rx_queues; i++)
2210 ixgbe_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2214 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
2215 * @adapter: board private structure
2217 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
2221 for (i = 0; i < adapter->num_tx_queues; i++)
2222 ixgbe_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2225 void ixgbe_down(struct ixgbe_adapter *adapter)
2227 struct net_device *netdev = adapter->netdev;
2228 struct ixgbe_hw *hw = &adapter->hw;
2233 /* signal that we are down to the interrupt handler */
2234 set_bit(__IXGBE_DOWN, &adapter->state);
2236 /* disable receives */
2237 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
2238 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
2240 netif_tx_disable(netdev);
2242 IXGBE_WRITE_FLUSH(hw);
2245 netif_tx_stop_all_queues(netdev);
2247 ixgbe_irq_disable(adapter);
2249 ixgbe_napi_disable_all(adapter);
2251 del_timer_sync(&adapter->watchdog_timer);
2252 cancel_work_sync(&adapter->watchdog_task);
2254 /* disable transmits in the hardware now that interrupts are off */
2255 for (i = 0; i < adapter->num_tx_queues; i++) {
2256 j = adapter->tx_ring[i].reg_idx;
2257 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
2258 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j),
2259 (txdctl & ~IXGBE_TXDCTL_ENABLE));
2262 netif_carrier_off(netdev);
2264 #ifdef CONFIG_IXGBE_DCA
2265 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
2266 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
2267 dca_remove_requester(&adapter->pdev->dev);
2271 if (!pci_channel_offline(adapter->pdev))
2272 ixgbe_reset(adapter);
2273 ixgbe_clean_all_tx_rings(adapter);
2274 ixgbe_clean_all_rx_rings(adapter);
2276 #ifdef CONFIG_IXGBE_DCA
2277 /* since we reset the hardware DCA settings were cleared */
2278 if (dca_add_requester(&adapter->pdev->dev) == 0) {
2279 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
2280 /* always use CB2 mode, difference is masked
2281 * in the CB driver */
2282 IXGBE_WRITE_REG(hw, IXGBE_DCA_CTRL, 2);
2283 ixgbe_setup_dca(adapter);
2289 * ixgbe_poll - NAPI Rx polling callback
2290 * @napi: structure for representing this polling device
2291 * @budget: how many packets driver is allowed to clean
2293 * This function is used for legacy and MSI, NAPI mode
2295 static int ixgbe_poll(struct napi_struct *napi, int budget)
2297 struct ixgbe_q_vector *q_vector = container_of(napi,
2298 struct ixgbe_q_vector, napi);
2299 struct ixgbe_adapter *adapter = q_vector->adapter;
2300 int tx_cleaned, work_done = 0;
2302 #ifdef CONFIG_IXGBE_DCA
2303 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
2304 ixgbe_update_tx_dca(adapter, adapter->tx_ring);
2305 ixgbe_update_rx_dca(adapter, adapter->rx_ring);
2309 tx_cleaned = ixgbe_clean_tx_irq(adapter, adapter->tx_ring);
2310 ixgbe_clean_rx_irq(q_vector, adapter->rx_ring, &work_done, budget);
2315 /* If budget not fully consumed, exit the polling mode */
2316 if (work_done < budget) {
2317 napi_complete(napi);
2318 if (adapter->itr_setting & 3)
2319 ixgbe_set_itr(adapter);
2320 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2321 ixgbe_irq_enable(adapter);
2327 * ixgbe_tx_timeout - Respond to a Tx Hang
2328 * @netdev: network interface device structure
2330 static void ixgbe_tx_timeout(struct net_device *netdev)
2332 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2334 /* Do the reset outside of interrupt context */
2335 schedule_work(&adapter->reset_task);
2338 static void ixgbe_reset_task(struct work_struct *work)
2340 struct ixgbe_adapter *adapter;
2341 adapter = container_of(work, struct ixgbe_adapter, reset_task);
2343 /* If we're already down or resetting, just bail */
2344 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
2345 test_bit(__IXGBE_RESETTING, &adapter->state))
2348 adapter->tx_timeout_count++;
2350 ixgbe_reinit_locked(adapter);
2353 #ifdef CONFIG_IXGBE_DCB
2354 static inline bool ixgbe_set_dcb_queues(struct ixgbe_adapter *adapter)
2358 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
2359 adapter->ring_feature[RING_F_DCB].mask = 0x7 << 3;
2360 adapter->num_rx_queues =
2361 adapter->ring_feature[RING_F_DCB].indices;
2362 adapter->num_tx_queues =
2363 adapter->ring_feature[RING_F_DCB].indices;
2366 adapter->ring_feature[RING_F_DCB].mask = 0;
2367 adapter->ring_feature[RING_F_DCB].indices = 0;
2375 static inline bool ixgbe_set_rss_queues(struct ixgbe_adapter *adapter)
2379 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
2380 adapter->ring_feature[RING_F_RSS].mask = 0xF;
2381 adapter->num_rx_queues =
2382 adapter->ring_feature[RING_F_RSS].indices;
2383 adapter->num_tx_queues =
2384 adapter->ring_feature[RING_F_RSS].indices;
2387 adapter->ring_feature[RING_F_RSS].mask = 0;
2388 adapter->ring_feature[RING_F_RSS].indices = 0;
2395 static void ixgbe_set_num_queues(struct ixgbe_adapter *adapter)
2397 /* Start with base case */
2398 adapter->num_rx_queues = 1;
2399 adapter->num_tx_queues = 1;
2401 #ifdef CONFIG_IXGBE_DCB
2402 if (ixgbe_set_dcb_queues(adapter))
2406 if (ixgbe_set_rss_queues(adapter))
2410 static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter *adapter,
2413 int err, vector_threshold;
2415 /* We'll want at least 3 (vector_threshold):
2418 * 3) Other (Link Status Change, etc.)
2419 * 4) TCP Timer (optional)
2421 vector_threshold = MIN_MSIX_COUNT;
2423 /* The more we get, the more we will assign to Tx/Rx Cleanup
2424 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
2425 * Right now, we simply care about how many we'll get; we'll
2426 * set them up later while requesting irq's.
2428 while (vectors >= vector_threshold) {
2429 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
2431 if (!err) /* Success in acquiring all requested vectors. */
2434 vectors = 0; /* Nasty failure, quit now */
2435 else /* err == number of vectors we should try again with */
2439 if (vectors < vector_threshold) {
2440 /* Can't allocate enough MSI-X interrupts? Oh well.
2441 * This just means we'll go with either a single MSI
2442 * vector or fall back to legacy interrupts.
2444 DPRINTK(HW, DEBUG, "Unable to allocate MSI-X interrupts\n");
2445 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2446 kfree(adapter->msix_entries);
2447 adapter->msix_entries = NULL;
2448 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
2449 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2450 ixgbe_set_num_queues(adapter);
2452 adapter->flags |= IXGBE_FLAG_MSIX_ENABLED; /* Woot! */
2454 * Adjust for only the vectors we'll use, which is minimum
2455 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
2456 * vectors we were allocated.
2458 adapter->num_msix_vectors = min(vectors,
2459 adapter->max_msix_q_vectors + NON_Q_VECTORS);
2464 * ixgbe_cache_ring_rss - Descriptor ring to register mapping for RSS
2465 * @adapter: board private structure to initialize
2467 * Cache the descriptor ring offsets for RSS to the assigned rings.
2470 static inline bool ixgbe_cache_ring_rss(struct ixgbe_adapter *adapter)
2475 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
2476 for (i = 0; i < adapter->num_rx_queues; i++)
2477 adapter->rx_ring[i].reg_idx = i;
2478 for (i = 0; i < adapter->num_tx_queues; i++)
2479 adapter->tx_ring[i].reg_idx = i;
2488 #ifdef CONFIG_IXGBE_DCB
2490 * ixgbe_cache_ring_dcb - Descriptor ring to register mapping for DCB
2491 * @adapter: board private structure to initialize
2493 * Cache the descriptor ring offsets for DCB to the assigned rings.
2496 static inline bool ixgbe_cache_ring_dcb(struct ixgbe_adapter *adapter)
2500 int dcb_i = adapter->ring_feature[RING_F_DCB].indices;
2502 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
2503 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
2504 /* the number of queues is assumed to be symmetric */
2505 for (i = 0; i < dcb_i; i++) {
2506 adapter->rx_ring[i].reg_idx = i << 3;
2507 adapter->tx_ring[i].reg_idx = i << 2;
2522 * ixgbe_cache_ring_register - Descriptor ring to register mapping
2523 * @adapter: board private structure to initialize
2525 * Once we know the feature-set enabled for the device, we'll cache
2526 * the register offset the descriptor ring is assigned to.
2528 * Note, the order the various feature calls is important. It must start with
2529 * the "most" features enabled at the same time, then trickle down to the
2530 * least amount of features turned on at once.
2532 static void ixgbe_cache_ring_register(struct ixgbe_adapter *adapter)
2534 /* start with default case */
2535 adapter->rx_ring[0].reg_idx = 0;
2536 adapter->tx_ring[0].reg_idx = 0;
2538 #ifdef CONFIG_IXGBE_DCB
2539 if (ixgbe_cache_ring_dcb(adapter))
2543 if (ixgbe_cache_ring_rss(adapter))
2548 * ixgbe_alloc_queues - Allocate memory for all rings
2549 * @adapter: board private structure to initialize
2551 * We allocate one ring per queue at run-time since we don't know the
2552 * number of queues at compile-time.
2554 static int ixgbe_alloc_queues(struct ixgbe_adapter *adapter)
2558 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
2559 sizeof(struct ixgbe_ring), GFP_KERNEL);
2560 if (!adapter->tx_ring)
2561 goto err_tx_ring_allocation;
2563 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
2564 sizeof(struct ixgbe_ring), GFP_KERNEL);
2565 if (!adapter->rx_ring)
2566 goto err_rx_ring_allocation;
2568 for (i = 0; i < adapter->num_tx_queues; i++) {
2569 adapter->tx_ring[i].count = adapter->tx_ring_count;
2570 adapter->tx_ring[i].queue_index = i;
2573 for (i = 0; i < adapter->num_rx_queues; i++) {
2574 adapter->rx_ring[i].count = adapter->rx_ring_count;
2575 adapter->rx_ring[i].queue_index = i;
2578 ixgbe_cache_ring_register(adapter);
2582 err_rx_ring_allocation:
2583 kfree(adapter->tx_ring);
2584 err_tx_ring_allocation:
2589 * ixgbe_set_interrupt_capability - set MSI-X or MSI if supported
2590 * @adapter: board private structure to initialize
2592 * Attempt to configure the interrupts using the best available
2593 * capabilities of the hardware and the kernel.
2595 static int ixgbe_set_interrupt_capability(struct ixgbe_adapter *adapter)
2598 int vector, v_budget;
2601 * It's easy to be greedy for MSI-X vectors, but it really
2602 * doesn't do us much good if we have a lot more vectors
2603 * than CPU's. So let's be conservative and only ask for
2604 * (roughly) twice the number of vectors as there are CPU's.
2606 v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues,
2607 (int)(num_online_cpus() * 2)) + NON_Q_VECTORS;
2610 * At the same time, hardware can only support a maximum of
2611 * MAX_MSIX_COUNT vectors. With features such as RSS and VMDq,
2612 * we can easily reach upwards of 64 Rx descriptor queues and
2613 * 32 Tx queues. Thus, we cap it off in those rare cases where
2614 * the cpu count also exceeds our vector limit.
2616 v_budget = min(v_budget, MAX_MSIX_COUNT);
2618 /* A failure in MSI-X entry allocation isn't fatal, but it does
2619 * mean we disable MSI-X capabilities of the adapter. */
2620 adapter->msix_entries = kcalloc(v_budget,
2621 sizeof(struct msix_entry), GFP_KERNEL);
2622 if (!adapter->msix_entries) {
2623 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
2624 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2625 ixgbe_set_num_queues(adapter);
2626 kfree(adapter->tx_ring);
2627 kfree(adapter->rx_ring);
2628 err = ixgbe_alloc_queues(adapter);
2630 DPRINTK(PROBE, ERR, "Unable to allocate memory "
2638 for (vector = 0; vector < v_budget; vector++)
2639 adapter->msix_entries[vector].entry = vector;
2641 ixgbe_acquire_msix_vectors(adapter, v_budget);
2643 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2647 err = pci_enable_msi(adapter->pdev);
2649 adapter->flags |= IXGBE_FLAG_MSI_ENABLED;
2651 DPRINTK(HW, DEBUG, "Unable to allocate MSI interrupt, "
2652 "falling back to legacy. Error: %d\n", err);
2658 /* Notify the stack of the (possibly) reduced Tx Queue count. */
2659 adapter->netdev->real_num_tx_queues = adapter->num_tx_queues;
2664 void ixgbe_reset_interrupt_capability(struct ixgbe_adapter *adapter)
2666 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2667 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2668 pci_disable_msix(adapter->pdev);
2669 kfree(adapter->msix_entries);
2670 adapter->msix_entries = NULL;
2671 } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
2672 adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED;
2673 pci_disable_msi(adapter->pdev);
2679 * ixgbe_init_interrupt_scheme - Determine proper interrupt scheme
2680 * @adapter: board private structure to initialize
2682 * We determine which interrupt scheme to use based on...
2683 * - Kernel support (MSI, MSI-X)
2684 * - which can be user-defined (via MODULE_PARAM)
2685 * - Hardware queue count (num_*_queues)
2686 * - defined by miscellaneous hardware support/features (RSS, etc.)
2688 int ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter)
2692 /* Number of supported queues */
2693 ixgbe_set_num_queues(adapter);
2695 err = ixgbe_alloc_queues(adapter);
2697 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
2698 goto err_alloc_queues;
2701 err = ixgbe_set_interrupt_capability(adapter);
2703 DPRINTK(PROBE, ERR, "Unable to setup interrupt capabilities\n");
2704 goto err_set_interrupt;
2707 DPRINTK(DRV, INFO, "Multiqueue %s: Rx Queue count = %u, "
2708 "Tx Queue count = %u\n",
2709 (adapter->num_rx_queues > 1) ? "Enabled" :
2710 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2712 set_bit(__IXGBE_DOWN, &adapter->state);
2717 kfree(adapter->tx_ring);
2718 kfree(adapter->rx_ring);
2724 * ixgbe_sfp_timer - worker thread to find a missing module
2725 * @data: pointer to our adapter struct
2727 static void ixgbe_sfp_timer(unsigned long data)
2729 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
2731 /* Do the sfp_timer outside of interrupt context due to the
2732 * delays that sfp+ detection requires
2734 schedule_work(&adapter->sfp_task);
2738 * ixgbe_sfp_task - worker thread to find a missing module
2739 * @work: pointer to work_struct containing our data
2741 static void ixgbe_sfp_task(struct work_struct *work)
2743 struct ixgbe_adapter *adapter = container_of(work,
2744 struct ixgbe_adapter,
2746 struct ixgbe_hw *hw = &adapter->hw;
2748 if ((hw->phy.type == ixgbe_phy_nl) &&
2749 (hw->phy.sfp_type == ixgbe_sfp_type_not_present)) {
2750 s32 ret = hw->phy.ops.identify_sfp(hw);
2753 ret = hw->phy.ops.reset(hw);
2754 if (ret == IXGBE_ERR_SFP_NOT_SUPPORTED) {
2755 DPRINTK(PROBE, ERR, "failed to initialize because an "
2756 "unsupported SFP+ module type was detected.\n"
2757 "Reload the driver after installing a "
2758 "supported module.\n");
2759 unregister_netdev(adapter->netdev);
2761 DPRINTK(PROBE, INFO, "detected SFP+: %d\n",
2764 /* don't need this routine any more */
2765 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
2769 if (test_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state))
2770 mod_timer(&adapter->sfp_timer,
2771 round_jiffies(jiffies + (2 * HZ)));
2775 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
2776 * @adapter: board private structure to initialize
2778 * ixgbe_sw_init initializes the Adapter private data structure.
2779 * Fields are initialized based on PCI device information and
2780 * OS network device settings (MTU size).
2782 static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
2784 struct ixgbe_hw *hw = &adapter->hw;
2785 struct pci_dev *pdev = adapter->pdev;
2787 #ifdef CONFIG_IXGBE_DCB
2789 struct tc_configuration *tc;
2792 /* PCI config space info */
2794 hw->vendor_id = pdev->vendor;
2795 hw->device_id = pdev->device;
2796 hw->revision_id = pdev->revision;
2797 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2798 hw->subsystem_device_id = pdev->subsystem_device;
2800 /* Set capability flags */
2801 rss = min(IXGBE_MAX_RSS_INDICES, (int)num_online_cpus());
2802 adapter->ring_feature[RING_F_RSS].indices = rss;
2803 adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
2804 adapter->ring_feature[RING_F_DCB].indices = IXGBE_MAX_DCB_INDICES;
2805 adapter->max_msix_q_vectors = MAX_MSIX_Q_VECTORS_82598;
2807 #ifdef CONFIG_IXGBE_DCB
2808 /* Configure DCB traffic classes */
2809 for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
2810 tc = &adapter->dcb_cfg.tc_config[j];
2811 tc->path[DCB_TX_CONFIG].bwg_id = 0;
2812 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
2813 tc->path[DCB_RX_CONFIG].bwg_id = 0;
2814 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
2815 tc->dcb_pfc = pfc_disabled;
2817 adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
2818 adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
2819 adapter->dcb_cfg.rx_pba_cfg = pba_equal;
2820 adapter->dcb_cfg.round_robin_enable = false;
2821 adapter->dcb_set_bitmap = 0x00;
2822 ixgbe_copy_dcb_cfg(&adapter->dcb_cfg, &adapter->temp_dcb_cfg,
2823 adapter->ring_feature[RING_F_DCB].indices);
2826 if (hw->mac.ops.get_media_type &&
2827 (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_copper))
2828 adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
2830 /* default flow control settings */
2831 hw->fc.requested_mode = ixgbe_fc_none;
2832 hw->fc.high_water = IXGBE_DEFAULT_FCRTH;
2833 hw->fc.low_water = IXGBE_DEFAULT_FCRTL;
2834 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
2835 hw->fc.send_xon = true;
2837 /* enable itr by default in dynamic mode */
2838 adapter->itr_setting = 1;
2839 adapter->eitr_param = 20000;
2841 /* set defaults for eitr in MegaBytes */
2842 adapter->eitr_low = 10;
2843 adapter->eitr_high = 20;
2845 /* set default ring sizes */
2846 adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
2847 adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
2849 /* initialize eeprom parameters */
2850 if (ixgbe_init_eeprom_params_generic(hw)) {
2851 dev_err(&pdev->dev, "EEPROM initialization failed\n");
2855 /* enable rx csum by default */
2856 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
2858 set_bit(__IXGBE_DOWN, &adapter->state);
2864 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
2865 * @adapter: board private structure
2866 * @tx_ring: tx descriptor ring (for a specific queue) to setup
2868 * Return 0 on success, negative on failure
2870 int ixgbe_setup_tx_resources(struct ixgbe_adapter *adapter,
2871 struct ixgbe_ring *tx_ring)
2873 struct pci_dev *pdev = adapter->pdev;
2876 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
2877 tx_ring->tx_buffer_info = vmalloc(size);
2878 if (!tx_ring->tx_buffer_info)
2880 memset(tx_ring->tx_buffer_info, 0, size);
2882 /* round up to nearest 4K */
2883 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc) +
2885 tx_ring->size = ALIGN(tx_ring->size, 4096);
2887 tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
2892 tx_ring->next_to_use = 0;
2893 tx_ring->next_to_clean = 0;
2894 tx_ring->work_limit = tx_ring->count;
2898 vfree(tx_ring->tx_buffer_info);
2899 tx_ring->tx_buffer_info = NULL;
2900 DPRINTK(PROBE, ERR, "Unable to allocate memory for the transmit "
2901 "descriptor ring\n");
2906 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
2907 * @adapter: board private structure
2909 * If this function returns with an error, then it's possible one or
2910 * more of the rings is populated (while the rest are not). It is the
2911 * callers duty to clean those orphaned rings.
2913 * Return 0 on success, negative on failure
2915 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
2919 for (i = 0; i < adapter->num_tx_queues; i++) {
2920 err = ixgbe_setup_tx_resources(adapter, &adapter->tx_ring[i]);
2923 DPRINTK(PROBE, ERR, "Allocation for Tx Queue %u failed\n", i);
2931 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
2932 * @adapter: board private structure
2933 * @rx_ring: rx descriptor ring (for a specific queue) to setup
2935 * Returns 0 on success, negative on failure
2937 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
2938 struct ixgbe_ring *rx_ring)
2940 struct pci_dev *pdev = adapter->pdev;
2943 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
2944 rx_ring->rx_buffer_info = vmalloc(size);
2945 if (!rx_ring->rx_buffer_info) {
2947 "vmalloc allocation failed for the rx desc ring\n");
2950 memset(rx_ring->rx_buffer_info, 0, size);
2952 /* Round up to nearest 4K */
2953 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
2954 rx_ring->size = ALIGN(rx_ring->size, 4096);
2956 rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size, &rx_ring->dma);
2958 if (!rx_ring->desc) {
2960 "Memory allocation failed for the rx desc ring\n");
2961 vfree(rx_ring->rx_buffer_info);
2965 rx_ring->next_to_clean = 0;
2966 rx_ring->next_to_use = 0;
2975 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
2976 * @adapter: board private structure
2978 * If this function returns with an error, then it's possible one or
2979 * more of the rings is populated (while the rest are not). It is the
2980 * callers duty to clean those orphaned rings.
2982 * Return 0 on success, negative on failure
2985 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
2989 for (i = 0; i < adapter->num_rx_queues; i++) {
2990 err = ixgbe_setup_rx_resources(adapter, &adapter->rx_ring[i]);
2993 DPRINTK(PROBE, ERR, "Allocation for Rx Queue %u failed\n", i);
3001 * ixgbe_free_tx_resources - Free Tx Resources per Queue
3002 * @adapter: board private structure
3003 * @tx_ring: Tx descriptor ring for a specific queue
3005 * Free all transmit software resources
3007 void ixgbe_free_tx_resources(struct ixgbe_adapter *adapter,
3008 struct ixgbe_ring *tx_ring)
3010 struct pci_dev *pdev = adapter->pdev;
3012 ixgbe_clean_tx_ring(adapter, tx_ring);
3014 vfree(tx_ring->tx_buffer_info);
3015 tx_ring->tx_buffer_info = NULL;
3017 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
3019 tx_ring->desc = NULL;
3023 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
3024 * @adapter: board private structure
3026 * Free all transmit software resources
3028 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
3032 for (i = 0; i < adapter->num_tx_queues; i++)
3033 ixgbe_free_tx_resources(adapter, &adapter->tx_ring[i]);
3037 * ixgbe_free_rx_resources - Free Rx Resources
3038 * @adapter: board private structure
3039 * @rx_ring: ring to clean the resources from
3041 * Free all receive software resources
3043 void ixgbe_free_rx_resources(struct ixgbe_adapter *adapter,
3044 struct ixgbe_ring *rx_ring)
3046 struct pci_dev *pdev = adapter->pdev;
3048 ixgbe_clean_rx_ring(adapter, rx_ring);
3050 vfree(rx_ring->rx_buffer_info);
3051 rx_ring->rx_buffer_info = NULL;
3053 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
3055 rx_ring->desc = NULL;
3059 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
3060 * @adapter: board private structure
3062 * Free all receive software resources
3064 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
3068 for (i = 0; i < adapter->num_rx_queues; i++)
3069 ixgbe_free_rx_resources(adapter, &adapter->rx_ring[i]);
3073 * ixgbe_change_mtu - Change the Maximum Transfer Unit
3074 * @netdev: network interface device structure
3075 * @new_mtu: new value for maximum frame size
3077 * Returns 0 on success, negative on failure
3079 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
3081 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3082 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
3084 /* MTU < 68 is an error and causes problems on some kernels */
3085 if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
3088 DPRINTK(PROBE, INFO, "changing MTU from %d to %d\n",
3089 netdev->mtu, new_mtu);
3090 /* must set new MTU before calling down or up */
3091 netdev->mtu = new_mtu;
3093 if (netif_running(netdev))
3094 ixgbe_reinit_locked(adapter);
3100 * ixgbe_open - Called when a network interface is made active
3101 * @netdev: network interface device structure
3103 * Returns 0 on success, negative value on failure
3105 * The open entry point is called when a network interface is made
3106 * active by the system (IFF_UP). At this point all resources needed
3107 * for transmit and receive operations are allocated, the interrupt
3108 * handler is registered with the OS, the watchdog timer is started,
3109 * and the stack is notified that the interface is ready.
3111 static int ixgbe_open(struct net_device *netdev)
3113 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3116 /* disallow open during test */
3117 if (test_bit(__IXGBE_TESTING, &adapter->state))
3120 /* allocate transmit descriptors */
3121 err = ixgbe_setup_all_tx_resources(adapter);
3125 /* allocate receive descriptors */
3126 err = ixgbe_setup_all_rx_resources(adapter);
3130 ixgbe_configure(adapter);
3132 err = ixgbe_request_irq(adapter);
3136 err = ixgbe_up_complete(adapter);
3140 netif_tx_start_all_queues(netdev);
3145 ixgbe_release_hw_control(adapter);
3146 ixgbe_free_irq(adapter);
3148 ixgbe_free_all_rx_resources(adapter);
3150 ixgbe_free_all_tx_resources(adapter);
3152 ixgbe_reset(adapter);
3158 * ixgbe_close - Disables a network interface
3159 * @netdev: network interface device structure
3161 * Returns 0, this is not allowed to fail
3163 * The close entry point is called when an interface is de-activated
3164 * by the OS. The hardware is still under the drivers control, but
3165 * needs to be disabled. A global MAC reset is issued to stop the
3166 * hardware, and all transmit and receive resources are freed.
3168 static int ixgbe_close(struct net_device *netdev)
3170 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3172 ixgbe_down(adapter);
3173 ixgbe_free_irq(adapter);
3175 ixgbe_free_all_tx_resources(adapter);
3176 ixgbe_free_all_rx_resources(adapter);
3178 ixgbe_release_hw_control(adapter);
3184 * ixgbe_napi_add_all - prep napi structs for use
3185 * @adapter: private struct
3186 * helper function to napi_add each possible q_vector->napi
3188 void ixgbe_napi_add_all(struct ixgbe_adapter *adapter)
3190 int q_idx, q_vectors;
3191 struct net_device *netdev = adapter->netdev;
3192 int (*poll)(struct napi_struct *, int);
3194 /* check if we already have our netdev->napi_list populated */
3195 if (&netdev->napi_list != netdev->napi_list.next)
3198 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3199 poll = &ixgbe_clean_rxonly;
3200 /* Only enable as many vectors as we have rx queues. */
3201 q_vectors = adapter->num_rx_queues;
3204 /* only one q_vector for legacy modes */
3208 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
3209 struct ixgbe_q_vector *q_vector = &adapter->q_vector[q_idx];
3210 netif_napi_add(adapter->netdev, &q_vector->napi, (*poll), 64);
3214 void ixgbe_napi_del_all(struct ixgbe_adapter *adapter)
3217 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
3219 /* legacy and MSI only use one vector */
3220 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
3223 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
3224 struct ixgbe_q_vector *q_vector = &adapter->q_vector[q_idx];
3225 if (!q_vector->rxr_count)
3227 netif_napi_del(&q_vector->napi);
3232 static int ixgbe_resume(struct pci_dev *pdev)
3234 struct net_device *netdev = pci_get_drvdata(pdev);
3235 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3238 pci_set_power_state(pdev, PCI_D0);
3239 pci_restore_state(pdev);
3240 err = pci_enable_device(pdev);
3242 printk(KERN_ERR "ixgbe: Cannot enable PCI device from "
3246 pci_set_master(pdev);
3248 pci_enable_wake(pdev, PCI_D3hot, 0);
3249 pci_enable_wake(pdev, PCI_D3cold, 0);
3251 err = ixgbe_init_interrupt_scheme(adapter);
3253 printk(KERN_ERR "ixgbe: Cannot initialize interrupts for "
3258 ixgbe_napi_add_all(adapter);
3259 ixgbe_reset(adapter);
3261 if (netif_running(netdev)) {
3262 err = ixgbe_open(adapter->netdev);
3267 netif_device_attach(netdev);
3272 #endif /* CONFIG_PM */
3273 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
3275 struct net_device *netdev = pci_get_drvdata(pdev);
3276 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3281 netif_device_detach(netdev);
3283 if (netif_running(netdev)) {
3284 ixgbe_down(adapter);
3285 ixgbe_free_irq(adapter);
3286 ixgbe_free_all_tx_resources(adapter);
3287 ixgbe_free_all_rx_resources(adapter);
3289 ixgbe_reset_interrupt_capability(adapter);
3290 ixgbe_napi_del_all(adapter);
3291 INIT_LIST_HEAD(&netdev->napi_list);
3292 kfree(adapter->tx_ring);
3293 kfree(adapter->rx_ring);
3296 retval = pci_save_state(pdev);
3301 pci_enable_wake(pdev, PCI_D3hot, 0);
3302 pci_enable_wake(pdev, PCI_D3cold, 0);
3304 ixgbe_release_hw_control(adapter);
3306 pci_disable_device(pdev);
3308 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3313 static void ixgbe_shutdown(struct pci_dev *pdev)
3315 ixgbe_suspend(pdev, PMSG_SUSPEND);
3319 * ixgbe_update_stats - Update the board statistics counters.
3320 * @adapter: board private structure
3322 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
3324 struct ixgbe_hw *hw = &adapter->hw;
3326 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
3328 adapter->stats.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
3329 for (i = 0; i < 8; i++) {
3330 /* for packet buffers not used, the register should read 0 */
3331 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
3333 adapter->stats.mpc[i] += mpc;
3334 total_mpc += adapter->stats.mpc[i];
3335 adapter->stats.rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
3336 adapter->stats.qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
3337 adapter->stats.qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
3338 adapter->stats.qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
3339 adapter->stats.qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
3340 adapter->stats.pxonrxc[i] += IXGBE_READ_REG(hw,
3342 adapter->stats.pxontxc[i] += IXGBE_READ_REG(hw,
3344 adapter->stats.pxoffrxc[i] += IXGBE_READ_REG(hw,
3346 adapter->stats.pxofftxc[i] += IXGBE_READ_REG(hw,
3349 adapter->stats.gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
3350 /* work around hardware counting issue */
3351 adapter->stats.gprc -= missed_rx;
3353 /* 82598 hardware only has a 32 bit counter in the high register */
3354 adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
3355 adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
3356 adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORH);
3357 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
3358 adapter->stats.bprc += bprc;
3359 adapter->stats.mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
3360 adapter->stats.mprc -= bprc;
3361 adapter->stats.roc += IXGBE_READ_REG(hw, IXGBE_ROC);
3362 adapter->stats.prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
3363 adapter->stats.prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
3364 adapter->stats.prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
3365 adapter->stats.prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
3366 adapter->stats.prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
3367 adapter->stats.prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
3368 adapter->stats.rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
3369 adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
3370 adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
3371 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
3372 adapter->stats.lxontxc += lxon;
3373 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
3374 adapter->stats.lxofftxc += lxoff;
3375 adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
3376 adapter->stats.gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
3377 adapter->stats.mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
3379 * 82598 errata - tx of flow control packets is included in tx counters
3381 xon_off_tot = lxon + lxoff;
3382 adapter->stats.gptc -= xon_off_tot;
3383 adapter->stats.mptc -= xon_off_tot;
3384 adapter->stats.gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
3385 adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
3386 adapter->stats.rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
3387 adapter->stats.rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
3388 adapter->stats.tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
3389 adapter->stats.ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
3390 adapter->stats.ptc64 -= xon_off_tot;
3391 adapter->stats.ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
3392 adapter->stats.ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
3393 adapter->stats.ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
3394 adapter->stats.ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
3395 adapter->stats.ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
3396 adapter->stats.bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
3398 /* Fill out the OS statistics structure */
3399 adapter->net_stats.multicast = adapter->stats.mprc;
3402 adapter->net_stats.rx_errors = adapter->stats.crcerrs +
3403 adapter->stats.rlec;
3404 adapter->net_stats.rx_dropped = 0;
3405 adapter->net_stats.rx_length_errors = adapter->stats.rlec;
3406 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3407 adapter->net_stats.rx_missed_errors = total_mpc;
3411 * ixgbe_watchdog - Timer Call-back
3412 * @data: pointer to adapter cast into an unsigned long
3414 static void ixgbe_watchdog(unsigned long data)
3416 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
3417 struct ixgbe_hw *hw = &adapter->hw;
3419 /* Do the watchdog outside of interrupt context due to the lovely
3420 * delays that some of the newer hardware requires */
3421 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
3422 /* Cause software interrupt to ensure rx rings are cleaned */
3423 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3425 (1 << (adapter->num_msix_vectors - NON_Q_VECTORS)) - 1;
3426 IXGBE_WRITE_REG(hw, IXGBE_EICS, eics);
3428 /* For legacy and MSI interrupts don't set any bits that
3429 * are enabled for EIAM, because this operation would
3430 * set *both* EIMS and EICS for any bit in EIAM */
3431 IXGBE_WRITE_REG(hw, IXGBE_EICS,
3432 (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
3434 /* Reset the timer */
3435 mod_timer(&adapter->watchdog_timer,
3436 round_jiffies(jiffies + 2 * HZ));
3439 schedule_work(&adapter->watchdog_task);
3443 * ixgbe_watchdog_task - worker thread to bring link up
3444 * @work: pointer to work_struct containing our data
3446 static void ixgbe_watchdog_task(struct work_struct *work)
3448 struct ixgbe_adapter *adapter = container_of(work,
3449 struct ixgbe_adapter,
3451 struct net_device *netdev = adapter->netdev;
3452 struct ixgbe_hw *hw = &adapter->hw;
3453 u32 link_speed = adapter->link_speed;
3454 bool link_up = adapter->link_up;
3456 adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK;
3458 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE) {
3459 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
3461 time_after(jiffies, (adapter->link_check_timeout +
3462 IXGBE_TRY_LINK_TIMEOUT))) {
3463 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
3464 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
3466 adapter->link_up = link_up;
3467 adapter->link_speed = link_speed;
3471 if (!netif_carrier_ok(netdev)) {
3472 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
3473 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
3474 #define FLOW_RX (frctl & IXGBE_FCTRL_RFCE)
3475 #define FLOW_TX (rmcs & IXGBE_RMCS_TFCE_802_3X)
3476 printk(KERN_INFO "ixgbe: %s NIC Link is Up %s, "
3477 "Flow Control: %s\n",
3479 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
3481 (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
3482 "1 Gbps" : "unknown speed")),
3483 ((FLOW_RX && FLOW_TX) ? "RX/TX" :
3485 (FLOW_TX ? "TX" : "None"))));
3487 netif_carrier_on(netdev);
3489 /* Force detection of hung controller */
3490 adapter->detect_tx_hung = true;
3493 adapter->link_up = false;
3494 adapter->link_speed = 0;
3495 if (netif_carrier_ok(netdev)) {
3496 printk(KERN_INFO "ixgbe: %s NIC Link is Down\n",
3498 netif_carrier_off(netdev);
3502 ixgbe_update_stats(adapter);
3503 adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK;
3506 static int ixgbe_tso(struct ixgbe_adapter *adapter,
3507 struct ixgbe_ring *tx_ring, struct sk_buff *skb,
3508 u32 tx_flags, u8 *hdr_len)
3510 struct ixgbe_adv_tx_context_desc *context_desc;
3513 struct ixgbe_tx_buffer *tx_buffer_info;
3514 u32 vlan_macip_lens = 0, type_tucmd_mlhl;
3515 u32 mss_l4len_idx, l4len;
3517 if (skb_is_gso(skb)) {
3518 if (skb_header_cloned(skb)) {
3519 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
3523 l4len = tcp_hdrlen(skb);
3526 if (skb->protocol == htons(ETH_P_IP)) {
3527 struct iphdr *iph = ip_hdr(skb);
3530 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
3534 adapter->hw_tso_ctxt++;
3535 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
3536 ipv6_hdr(skb)->payload_len = 0;
3537 tcp_hdr(skb)->check =
3538 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3539 &ipv6_hdr(skb)->daddr,
3541 adapter->hw_tso6_ctxt++;
3544 i = tx_ring->next_to_use;
3546 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3547 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
3549 /* VLAN MACLEN IPLEN */
3550 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3552 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
3553 vlan_macip_lens |= ((skb_network_offset(skb)) <<
3554 IXGBE_ADVTXD_MACLEN_SHIFT);
3555 *hdr_len += skb_network_offset(skb);
3557 (skb_transport_header(skb) - skb_network_header(skb));
3559 (skb_transport_header(skb) - skb_network_header(skb));
3560 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3561 context_desc->seqnum_seed = 0;
3563 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3564 type_tucmd_mlhl = (IXGBE_TXD_CMD_DEXT |
3565 IXGBE_ADVTXD_DTYP_CTXT);
3567 if (skb->protocol == htons(ETH_P_IP))
3568 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
3569 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
3570 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
3574 (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
3575 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
3576 /* use index 1 for TSO */
3577 mss_l4len_idx |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3578 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
3580 tx_buffer_info->time_stamp = jiffies;
3581 tx_buffer_info->next_to_watch = i;
3584 if (i == tx_ring->count)
3586 tx_ring->next_to_use = i;
3593 static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
3594 struct ixgbe_ring *tx_ring,
3595 struct sk_buff *skb, u32 tx_flags)
3597 struct ixgbe_adv_tx_context_desc *context_desc;
3599 struct ixgbe_tx_buffer *tx_buffer_info;
3600 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
3602 if (skb->ip_summed == CHECKSUM_PARTIAL ||
3603 (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
3604 i = tx_ring->next_to_use;
3605 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3606 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
3608 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3610 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
3611 vlan_macip_lens |= (skb_network_offset(skb) <<
3612 IXGBE_ADVTXD_MACLEN_SHIFT);
3613 if (skb->ip_summed == CHECKSUM_PARTIAL)
3614 vlan_macip_lens |= (skb_transport_header(skb) -
3615 skb_network_header(skb));
3617 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3618 context_desc->seqnum_seed = 0;
3620 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
3621 IXGBE_ADVTXD_DTYP_CTXT);
3623 if (skb->ip_summed == CHECKSUM_PARTIAL) {
3624 switch (skb->protocol) {
3625 case cpu_to_be16(ETH_P_IP):
3626 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
3627 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
3629 IXGBE_ADVTXD_TUCMD_L4T_TCP;
3631 case cpu_to_be16(ETH_P_IPV6):
3632 /* XXX what about other V6 headers?? */
3633 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
3635 IXGBE_ADVTXD_TUCMD_L4T_TCP;
3638 if (unlikely(net_ratelimit())) {
3639 DPRINTK(PROBE, WARNING,
3640 "partial checksum but proto=%x!\n",
3647 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
3648 /* use index zero for tx checksum offload */
3649 context_desc->mss_l4len_idx = 0;
3651 tx_buffer_info->time_stamp = jiffies;
3652 tx_buffer_info->next_to_watch = i;
3654 adapter->hw_csum_tx_good++;
3656 if (i == tx_ring->count)
3658 tx_ring->next_to_use = i;
3666 static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
3667 struct ixgbe_ring *tx_ring,
3668 struct sk_buff *skb, unsigned int first)
3670 struct ixgbe_tx_buffer *tx_buffer_info;
3671 unsigned int len = skb->len;
3672 unsigned int offset = 0, size, count = 0, i;
3673 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
3676 len -= skb->data_len;
3678 i = tx_ring->next_to_use;
3681 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3682 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
3684 tx_buffer_info->length = size;
3685 tx_buffer_info->dma = pci_map_single(adapter->pdev,
3687 size, PCI_DMA_TODEVICE);
3688 tx_buffer_info->time_stamp = jiffies;
3689 tx_buffer_info->next_to_watch = i;
3695 if (i == tx_ring->count)
3699 for (f = 0; f < nr_frags; f++) {
3700 struct skb_frag_struct *frag;
3702 frag = &skb_shinfo(skb)->frags[f];
3704 offset = frag->page_offset;
3707 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3708 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
3710 tx_buffer_info->length = size;
3711 tx_buffer_info->dma = pci_map_page(adapter->pdev,
3716 tx_buffer_info->time_stamp = jiffies;
3717 tx_buffer_info->next_to_watch = i;
3723 if (i == tx_ring->count)
3728 i = tx_ring->count - 1;
3731 tx_ring->tx_buffer_info[i].skb = skb;
3732 tx_ring->tx_buffer_info[first].next_to_watch = i;
3737 static void ixgbe_tx_queue(struct ixgbe_adapter *adapter,
3738 struct ixgbe_ring *tx_ring,
3739 int tx_flags, int count, u32 paylen, u8 hdr_len)
3741 union ixgbe_adv_tx_desc *tx_desc = NULL;
3742 struct ixgbe_tx_buffer *tx_buffer_info;
3743 u32 olinfo_status = 0, cmd_type_len = 0;
3745 u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
3747 cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
3749 cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
3751 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3752 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
3754 if (tx_flags & IXGBE_TX_FLAGS_TSO) {
3755 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
3757 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3758 IXGBE_ADVTXD_POPTS_SHIFT;
3760 /* use index 1 context for tso */
3761 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3762 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3763 olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
3764 IXGBE_ADVTXD_POPTS_SHIFT;
3766 } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3767 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3768 IXGBE_ADVTXD_POPTS_SHIFT;
3770 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
3772 i = tx_ring->next_to_use;
3774 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3775 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
3776 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
3777 tx_desc->read.cmd_type_len =
3778 cpu_to_le32(cmd_type_len | tx_buffer_info->length);
3779 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
3781 if (i == tx_ring->count)
3785 tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
3788 * Force memory writes to complete before letting h/w
3789 * know there are new descriptors to fetch. (Only
3790 * applicable for weak-ordered memory model archs,
3795 tx_ring->next_to_use = i;
3796 writel(i, adapter->hw.hw_addr + tx_ring->tail);
3799 static int __ixgbe_maybe_stop_tx(struct net_device *netdev,
3800 struct ixgbe_ring *tx_ring, int size)
3802 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3804 netif_stop_subqueue(netdev, tx_ring->queue_index);
3805 /* Herbert's original patch had:
3806 * smp_mb__after_netif_stop_queue();
3807 * but since that doesn't exist yet, just open code it. */
3810 /* We need to check again in a case another CPU has just
3811 * made room available. */
3812 if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
3815 /* A reprieve! - use start_queue because it doesn't call schedule */
3816 netif_start_subqueue(netdev, tx_ring->queue_index);
3817 ++adapter->restart_queue;
3821 static int ixgbe_maybe_stop_tx(struct net_device *netdev,
3822 struct ixgbe_ring *tx_ring, int size)
3824 if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
3826 return __ixgbe_maybe_stop_tx(netdev, tx_ring, size);
3829 static int ixgbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3831 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3832 struct ixgbe_ring *tx_ring;
3834 unsigned int tx_flags = 0;
3840 r_idx = (adapter->num_tx_queues - 1) & skb->queue_mapping;
3841 tx_ring = &adapter->tx_ring[r_idx];
3843 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
3844 tx_flags |= vlan_tx_tag_get(skb);
3845 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
3846 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
3847 tx_flags |= (skb->queue_mapping << 13);
3849 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3850 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3851 } else if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
3852 tx_flags |= (skb->queue_mapping << 13);
3853 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3854 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3856 /* three things can cause us to need a context descriptor */
3857 if (skb_is_gso(skb) ||
3858 (skb->ip_summed == CHECKSUM_PARTIAL) ||
3859 (tx_flags & IXGBE_TX_FLAGS_VLAN))
3862 count += TXD_USE_COUNT(skb_headlen(skb));
3863 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
3864 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3866 if (ixgbe_maybe_stop_tx(netdev, tx_ring, count)) {
3868 return NETDEV_TX_BUSY;
3871 if (skb->protocol == htons(ETH_P_IP))
3872 tx_flags |= IXGBE_TX_FLAGS_IPV4;
3873 first = tx_ring->next_to_use;
3874 tso = ixgbe_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
3876 dev_kfree_skb_any(skb);
3877 return NETDEV_TX_OK;
3881 tx_flags |= IXGBE_TX_FLAGS_TSO;
3882 else if (ixgbe_tx_csum(adapter, tx_ring, skb, tx_flags) &&
3883 (skb->ip_summed == CHECKSUM_PARTIAL))
3884 tx_flags |= IXGBE_TX_FLAGS_CSUM;
3886 ixgbe_tx_queue(adapter, tx_ring, tx_flags,
3887 ixgbe_tx_map(adapter, tx_ring, skb, first),
3890 netdev->trans_start = jiffies;
3892 ixgbe_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
3894 return NETDEV_TX_OK;
3898 * ixgbe_get_stats - Get System Network Statistics
3899 * @netdev: network interface device structure
3901 * Returns the address of the device statistics structure.
3902 * The statistics are actually updated from the timer callback.
3904 static struct net_device_stats *ixgbe_get_stats(struct net_device *netdev)
3906 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3908 /* only return the current stats */
3909 return &adapter->net_stats;
3913 * ixgbe_set_mac - Change the Ethernet Address of the NIC
3914 * @netdev: network interface device structure
3915 * @p: pointer to an address structure
3917 * Returns 0 on success, negative on failure
3919 static int ixgbe_set_mac(struct net_device *netdev, void *p)
3921 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3922 struct ixgbe_hw *hw = &adapter->hw;
3923 struct sockaddr *addr = p;
3925 if (!is_valid_ether_addr(addr->sa_data))
3926 return -EADDRNOTAVAIL;
3928 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3929 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3931 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);
3936 #ifdef CONFIG_NET_POLL_CONTROLLER
3938 * Polling 'interrupt' - used by things like netconsole to send skbs
3939 * without having to re-enable interrupts. It's not called while
3940 * the interrupt routine is executing.
3942 static void ixgbe_netpoll(struct net_device *netdev)
3944 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3946 disable_irq(adapter->pdev->irq);
3947 adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
3948 ixgbe_intr(adapter->pdev->irq, netdev);
3949 adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
3950 enable_irq(adapter->pdev->irq);
3954 static const struct net_device_ops ixgbe_netdev_ops = {
3955 .ndo_open = ixgbe_open,
3956 .ndo_stop = ixgbe_close,
3957 .ndo_start_xmit = ixgbe_xmit_frame,
3958 .ndo_get_stats = ixgbe_get_stats,
3959 .ndo_set_multicast_list = ixgbe_set_rx_mode,
3960 .ndo_validate_addr = eth_validate_addr,
3961 .ndo_set_mac_address = ixgbe_set_mac,
3962 .ndo_change_mtu = ixgbe_change_mtu,
3963 .ndo_tx_timeout = ixgbe_tx_timeout,
3964 .ndo_vlan_rx_register = ixgbe_vlan_rx_register,
3965 .ndo_vlan_rx_add_vid = ixgbe_vlan_rx_add_vid,
3966 .ndo_vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid,
3967 #ifdef CONFIG_NET_POLL_CONTROLLER
3968 .ndo_poll_controller = ixgbe_netpoll,
3973 * ixgbe_probe - Device Initialization Routine
3974 * @pdev: PCI device information struct
3975 * @ent: entry in ixgbe_pci_tbl
3977 * Returns 0 on success, negative on failure
3979 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
3980 * The OS initialization, configuring of the adapter private structure,
3981 * and a hardware reset occur.
3983 static int __devinit ixgbe_probe(struct pci_dev *pdev,
3984 const struct pci_device_id *ent)
3986 struct net_device *netdev;
3987 struct ixgbe_adapter *adapter = NULL;
3988 struct ixgbe_hw *hw;
3989 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
3990 static int cards_found;
3991 int i, err, pci_using_dac;
3992 u16 link_status, link_speed, link_width;
3995 err = pci_enable_device(pdev);
3999 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK) &&
4000 !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
4003 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
4005 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
4007 dev_err(&pdev->dev, "No usable DMA "
4008 "configuration, aborting\n");
4015 err = pci_request_regions(pdev, ixgbe_driver_name);
4017 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
4021 err = pci_enable_pcie_error_reporting(pdev);
4023 dev_err(&pdev->dev, "pci_enable_pcie_error_reporting failed "
4025 /* non-fatal, continue */
4028 pci_set_master(pdev);
4029 pci_save_state(pdev);
4031 netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), MAX_TX_QUEUES);
4034 goto err_alloc_etherdev;
4037 SET_NETDEV_DEV(netdev, &pdev->dev);
4039 pci_set_drvdata(pdev, netdev);
4040 adapter = netdev_priv(netdev);
4042 adapter->netdev = netdev;
4043 adapter->pdev = pdev;
4046 adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
4048 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
4049 pci_resource_len(pdev, 0));
4055 for (i = 1; i <= 5; i++) {
4056 if (pci_resource_len(pdev, i) == 0)
4060 netdev->netdev_ops = &ixgbe_netdev_ops;
4061 ixgbe_set_ethtool_ops(netdev);
4062 netdev->watchdog_timeo = 5 * HZ;
4063 strcpy(netdev->name, pci_name(pdev));
4065 adapter->bd_number = cards_found;
4068 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
4069 hw->mac.type = ii->mac;
4072 memcpy(&hw->eeprom.ops, ii->eeprom_ops, sizeof(hw->eeprom.ops));
4073 eec = IXGBE_READ_REG(hw, IXGBE_EEC);
4074 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
4075 if (!(eec & (1 << 8)))
4076 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
4079 memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
4080 hw->phy.sfp_type = ixgbe_sfp_type_unknown;
4082 /* set up this timer and work struct before calling get_invariants
4083 * which might start the timer
4085 init_timer(&adapter->sfp_timer);
4086 adapter->sfp_timer.function = &ixgbe_sfp_timer;
4087 adapter->sfp_timer.data = (unsigned long) adapter;
4089 INIT_WORK(&adapter->sfp_task, ixgbe_sfp_task);
4091 err = ii->get_invariants(hw);
4092 if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
4093 /* start a kernel thread to watch for a module to arrive */
4094 set_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
4095 mod_timer(&adapter->sfp_timer,
4096 round_jiffies(jiffies + (2 * HZ)));
4098 } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
4099 DPRINTK(PROBE, ERR, "failed to load because an "
4100 "unsupported SFP+ module type was detected.\n");
4106 /* setup the private structure */
4107 err = ixgbe_sw_init(adapter);
4111 /* reset_hw fills in the perm_addr as well */
4112 err = hw->mac.ops.reset_hw(hw);
4114 dev_err(&adapter->pdev->dev, "HW Init failed: %d\n", err);
4118 netdev->features = NETIF_F_SG |
4120 NETIF_F_HW_VLAN_TX |
4121 NETIF_F_HW_VLAN_RX |
4122 NETIF_F_HW_VLAN_FILTER;
4124 netdev->features |= NETIF_F_IPV6_CSUM;
4125 netdev->features |= NETIF_F_TSO;
4126 netdev->features |= NETIF_F_TSO6;
4127 netdev->features |= NETIF_F_GRO;
4129 netdev->vlan_features |= NETIF_F_TSO;
4130 netdev->vlan_features |= NETIF_F_TSO6;
4131 netdev->vlan_features |= NETIF_F_IP_CSUM;
4132 netdev->vlan_features |= NETIF_F_SG;
4134 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
4135 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
4137 #ifdef CONFIG_IXGBE_DCB
4138 netdev->dcbnl_ops = &dcbnl_ops;
4142 netdev->features |= NETIF_F_HIGHDMA;
4144 /* make sure the EEPROM is good */
4145 if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
4146 dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n");
4151 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
4152 memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
4154 if (ixgbe_validate_mac_addr(netdev->perm_addr)) {
4155 dev_err(&pdev->dev, "invalid MAC address\n");
4160 init_timer(&adapter->watchdog_timer);
4161 adapter->watchdog_timer.function = &ixgbe_watchdog;
4162 adapter->watchdog_timer.data = (unsigned long)adapter;
4164 INIT_WORK(&adapter->reset_task, ixgbe_reset_task);
4165 INIT_WORK(&adapter->watchdog_task, ixgbe_watchdog_task);
4167 err = ixgbe_init_interrupt_scheme(adapter);
4171 /* print bus type/speed/width info */
4172 pci_read_config_word(pdev, IXGBE_PCI_LINK_STATUS, &link_status);
4173 link_speed = link_status & IXGBE_PCI_LINK_SPEED;
4174 link_width = link_status & IXGBE_PCI_LINK_WIDTH;
4175 dev_info(&pdev->dev, "(PCI Express:%s:%s) %pM\n",
4176 ((link_speed == IXGBE_PCI_LINK_SPEED_5000) ? "5.0Gb/s" :
4177 (link_speed == IXGBE_PCI_LINK_SPEED_2500) ? "2.5Gb/s" :
4179 ((link_width == IXGBE_PCI_LINK_WIDTH_8) ? "Width x8" :
4180 (link_width == IXGBE_PCI_LINK_WIDTH_4) ? "Width x4" :
4181 (link_width == IXGBE_PCI_LINK_WIDTH_2) ? "Width x2" :
4182 (link_width == IXGBE_PCI_LINK_WIDTH_1) ? "Width x1" :
4185 ixgbe_read_pba_num_generic(hw, &part_num);
4186 dev_info(&pdev->dev, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
4187 hw->mac.type, hw->phy.type,
4188 (part_num >> 8), (part_num & 0xff));
4190 if (link_width <= IXGBE_PCI_LINK_WIDTH_4) {
4191 dev_warn(&pdev->dev, "PCI-Express bandwidth available for "
4192 "this card is not sufficient for optimal "
4194 dev_warn(&pdev->dev, "For optimal performance a x8 "
4195 "PCI-Express slot is required.\n");
4198 /* save off EEPROM version number */
4199 hw->eeprom.ops.read(hw, 0x29, &adapter->eeprom_version);
4201 /* reset the hardware with the new settings */
4202 hw->mac.ops.start_hw(hw);
4204 netif_carrier_off(netdev);
4206 strcpy(netdev->name, "eth%d");
4207 err = register_netdev(netdev);
4211 #ifdef CONFIG_IXGBE_DCA
4212 if (dca_add_requester(&pdev->dev) == 0) {
4213 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
4214 /* always use CB2 mode, difference is masked
4215 * in the CB driver */
4216 IXGBE_WRITE_REG(hw, IXGBE_DCA_CTRL, 2);
4217 ixgbe_setup_dca(adapter);
4221 dev_info(&pdev->dev, "Intel(R) 10 Gigabit Network Connection\n");
4226 ixgbe_release_hw_control(adapter);
4229 ixgbe_reset_interrupt_capability(adapter);
4231 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
4232 del_timer_sync(&adapter->sfp_timer);
4233 cancel_work_sync(&adapter->sfp_task);
4234 iounmap(hw->hw_addr);
4236 free_netdev(netdev);
4238 pci_release_regions(pdev);
4241 pci_disable_device(pdev);
4246 * ixgbe_remove - Device Removal Routine
4247 * @pdev: PCI device information struct
4249 * ixgbe_remove is called by the PCI subsystem to alert the driver
4250 * that it should release a PCI device. The could be caused by a
4251 * Hot-Plug event, or because the driver is going to be removed from
4254 static void __devexit ixgbe_remove(struct pci_dev *pdev)
4256 struct net_device *netdev = pci_get_drvdata(pdev);
4257 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4260 set_bit(__IXGBE_DOWN, &adapter->state);
4261 /* clear the module not found bit to make sure the worker won't
4264 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
4265 del_timer_sync(&adapter->watchdog_timer);
4267 del_timer_sync(&adapter->sfp_timer);
4268 cancel_work_sync(&adapter->watchdog_task);
4269 cancel_work_sync(&adapter->sfp_task);
4270 flush_scheduled_work();
4272 #ifdef CONFIG_IXGBE_DCA
4273 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
4274 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
4275 dca_remove_requester(&pdev->dev);
4276 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
4280 if (netdev->reg_state == NETREG_REGISTERED)
4281 unregister_netdev(netdev);
4283 ixgbe_reset_interrupt_capability(adapter);
4285 ixgbe_release_hw_control(adapter);
4287 iounmap(adapter->hw.hw_addr);
4288 pci_release_regions(pdev);
4290 DPRINTK(PROBE, INFO, "complete\n");
4291 kfree(adapter->tx_ring);
4292 kfree(adapter->rx_ring);
4294 free_netdev(netdev);
4296 err = pci_disable_pcie_error_reporting(pdev);
4299 "pci_disable_pcie_error_reporting failed 0x%x\n", err);
4301 pci_disable_device(pdev);
4305 * ixgbe_io_error_detected - called when PCI error is detected
4306 * @pdev: Pointer to PCI device
4307 * @state: The current pci connection state
4309 * This function is called after a PCI bus error affecting
4310 * this device has been detected.
4312 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
4313 pci_channel_state_t state)
4315 struct net_device *netdev = pci_get_drvdata(pdev);
4316 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4318 netif_device_detach(netdev);
4320 if (netif_running(netdev))
4321 ixgbe_down(adapter);
4322 pci_disable_device(pdev);
4324 /* Request a slot reset. */
4325 return PCI_ERS_RESULT_NEED_RESET;
4329 * ixgbe_io_slot_reset - called after the pci bus has been reset.
4330 * @pdev: Pointer to PCI device
4332 * Restart the card from scratch, as if from a cold-boot.
4334 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
4336 struct net_device *netdev = pci_get_drvdata(pdev);
4337 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4338 pci_ers_result_t result;
4341 if (pci_enable_device(pdev)) {
4343 "Cannot re-enable PCI device after reset.\n");
4344 result = PCI_ERS_RESULT_DISCONNECT;
4346 pci_set_master(pdev);
4347 pci_restore_state(pdev);
4349 pci_enable_wake(pdev, PCI_D3hot, 0);
4350 pci_enable_wake(pdev, PCI_D3cold, 0);
4352 ixgbe_reset(adapter);
4354 result = PCI_ERS_RESULT_RECOVERED;
4357 err = pci_cleanup_aer_uncorrect_error_status(pdev);
4360 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n", err);
4361 /* non-fatal, continue */
4368 * ixgbe_io_resume - called when traffic can start flowing again.
4369 * @pdev: Pointer to PCI device
4371 * This callback is called when the error recovery driver tells us that
4372 * its OK to resume normal operation.
4374 static void ixgbe_io_resume(struct pci_dev *pdev)
4376 struct net_device *netdev = pci_get_drvdata(pdev);
4377 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4379 if (netif_running(netdev)) {
4380 if (ixgbe_up(adapter)) {
4381 DPRINTK(PROBE, INFO, "ixgbe_up failed after reset\n");
4386 netif_device_attach(netdev);
4389 static struct pci_error_handlers ixgbe_err_handler = {
4390 .error_detected = ixgbe_io_error_detected,
4391 .slot_reset = ixgbe_io_slot_reset,
4392 .resume = ixgbe_io_resume,
4395 static struct pci_driver ixgbe_driver = {
4396 .name = ixgbe_driver_name,
4397 .id_table = ixgbe_pci_tbl,
4398 .probe = ixgbe_probe,
4399 .remove = __devexit_p(ixgbe_remove),
4401 .suspend = ixgbe_suspend,
4402 .resume = ixgbe_resume,
4404 .shutdown = ixgbe_shutdown,
4405 .err_handler = &ixgbe_err_handler
4409 * ixgbe_init_module - Driver Registration Routine
4411 * ixgbe_init_module is the first routine called when the driver is
4412 * loaded. All it does is register with the PCI subsystem.
4414 static int __init ixgbe_init_module(void)
4417 printk(KERN_INFO "%s: %s - version %s\n", ixgbe_driver_name,
4418 ixgbe_driver_string, ixgbe_driver_version);
4420 printk(KERN_INFO "%s: %s\n", ixgbe_driver_name, ixgbe_copyright);
4422 #ifdef CONFIG_IXGBE_DCA
4423 dca_register_notify(&dca_notifier);
4426 ret = pci_register_driver(&ixgbe_driver);
4430 module_init(ixgbe_init_module);
4433 * ixgbe_exit_module - Driver Exit Cleanup Routine
4435 * ixgbe_exit_module is called just before the driver is removed
4438 static void __exit ixgbe_exit_module(void)
4440 #ifdef CONFIG_IXGBE_DCA
4441 dca_unregister_notify(&dca_notifier);
4443 pci_unregister_driver(&ixgbe_driver);
4446 #ifdef CONFIG_IXGBE_DCA
4447 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
4452 ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
4453 __ixgbe_notify_dca);
4455 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
4457 #endif /* CONFIG_IXGBE_DCA */
4459 module_exit(ixgbe_exit_module);