1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/module.h>
29 #include <linux/types.h>
30 #include <linux/init.h>
31 #include <linux/vmalloc.h>
32 #include <linux/pagemap.h>
33 #include <linux/netdevice.h>
34 #include <linux/ipv6.h>
35 #include <net/checksum.h>
36 #include <net/ip6_checksum.h>
37 #include <linux/mii.h>
38 #include <linux/ethtool.h>
39 #include <linux/if_vlan.h>
40 #include <linux/pci.h>
41 #include <linux/pci-aspm.h>
42 #include <linux/delay.h>
43 #include <linux/interrupt.h>
44 #include <linux/if_ether.h>
46 #include <linux/dca.h>
50 #define DRV_VERSION "1.2.45-k2"
51 char igb_driver_name[] = "igb";
52 char igb_driver_version[] = DRV_VERSION;
53 static const char igb_driver_string[] =
54 "Intel(R) Gigabit Ethernet Network Driver";
55 static const char igb_copyright[] = "Copyright (c) 2008 Intel Corporation.";
57 static const struct e1000_info *igb_info_tbl[] = {
58 [board_82575] = &e1000_82575_info,
61 static struct pci_device_id igb_pci_tbl[] = {
62 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
63 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
64 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
65 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
66 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
67 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
68 /* required last entry */
72 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
74 void igb_reset(struct igb_adapter *);
75 static int igb_setup_all_tx_resources(struct igb_adapter *);
76 static int igb_setup_all_rx_resources(struct igb_adapter *);
77 static void igb_free_all_tx_resources(struct igb_adapter *);
78 static void igb_free_all_rx_resources(struct igb_adapter *);
79 void igb_update_stats(struct igb_adapter *);
80 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
81 static void __devexit igb_remove(struct pci_dev *pdev);
82 static int igb_sw_init(struct igb_adapter *);
83 static int igb_open(struct net_device *);
84 static int igb_close(struct net_device *);
85 static void igb_configure_tx(struct igb_adapter *);
86 static void igb_configure_rx(struct igb_adapter *);
87 static void igb_setup_rctl(struct igb_adapter *);
88 static void igb_clean_all_tx_rings(struct igb_adapter *);
89 static void igb_clean_all_rx_rings(struct igb_adapter *);
90 static void igb_clean_tx_ring(struct igb_ring *);
91 static void igb_clean_rx_ring(struct igb_ring *);
92 static void igb_set_multi(struct net_device *);
93 static void igb_update_phy_info(unsigned long);
94 static void igb_watchdog(unsigned long);
95 static void igb_watchdog_task(struct work_struct *);
96 static int igb_xmit_frame_ring_adv(struct sk_buff *, struct net_device *,
98 static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *);
99 static struct net_device_stats *igb_get_stats(struct net_device *);
100 static int igb_change_mtu(struct net_device *, int);
101 static int igb_set_mac(struct net_device *, void *);
102 static irqreturn_t igb_intr(int irq, void *);
103 static irqreturn_t igb_intr_msi(int irq, void *);
104 static irqreturn_t igb_msix_other(int irq, void *);
105 static irqreturn_t igb_msix_rx(int irq, void *);
106 static irqreturn_t igb_msix_tx(int irq, void *);
107 static int igb_clean_rx_ring_msix(struct napi_struct *, int);
108 #ifdef CONFIG_IGB_DCA
109 static void igb_update_rx_dca(struct igb_ring *);
110 static void igb_update_tx_dca(struct igb_ring *);
111 static void igb_setup_dca(struct igb_adapter *);
112 #endif /* CONFIG_IGB_DCA */
113 static bool igb_clean_tx_irq(struct igb_ring *);
114 static int igb_poll(struct napi_struct *, int);
115 static bool igb_clean_rx_irq_adv(struct igb_ring *, int *, int);
116 static void igb_alloc_rx_buffers_adv(struct igb_ring *, int);
117 #ifdef CONFIG_IGB_LRO
118 static int igb_get_skb_hdr(struct sk_buff *skb, void **, void **, u64 *, void *);
120 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
121 static void igb_tx_timeout(struct net_device *);
122 static void igb_reset_task(struct work_struct *);
123 static void igb_vlan_rx_register(struct net_device *, struct vlan_group *);
124 static void igb_vlan_rx_add_vid(struct net_device *, u16);
125 static void igb_vlan_rx_kill_vid(struct net_device *, u16);
126 static void igb_restore_vlan(struct igb_adapter *);
128 static int igb_suspend(struct pci_dev *, pm_message_t);
130 static int igb_resume(struct pci_dev *);
132 static void igb_shutdown(struct pci_dev *);
133 #ifdef CONFIG_IGB_DCA
134 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
135 static struct notifier_block dca_notifier = {
136 .notifier_call = igb_notify_dca,
142 #ifdef CONFIG_NET_POLL_CONTROLLER
143 /* for netdump / net console */
144 static void igb_netpoll(struct net_device *);
147 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
148 pci_channel_state_t);
149 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
150 static void igb_io_resume(struct pci_dev *);
152 static struct pci_error_handlers igb_err_handler = {
153 .error_detected = igb_io_error_detected,
154 .slot_reset = igb_io_slot_reset,
155 .resume = igb_io_resume,
159 static struct pci_driver igb_driver = {
160 .name = igb_driver_name,
161 .id_table = igb_pci_tbl,
163 .remove = __devexit_p(igb_remove),
165 /* Power Managment Hooks */
166 .suspend = igb_suspend,
167 .resume = igb_resume,
169 .shutdown = igb_shutdown,
170 .err_handler = &igb_err_handler
173 static int global_quad_port_a; /* global quad port a indication */
175 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
176 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
177 MODULE_LICENSE("GPL");
178 MODULE_VERSION(DRV_VERSION);
182 * igb_get_hw_dev_name - return device name string
183 * used by hardware layer to print debugging information
185 char *igb_get_hw_dev_name(struct e1000_hw *hw)
187 struct igb_adapter *adapter = hw->back;
188 return adapter->netdev->name;
193 * igb_init_module - Driver Registration Routine
195 * igb_init_module is the first routine called when the driver is
196 * loaded. All it does is register with the PCI subsystem.
198 static int __init igb_init_module(void)
201 printk(KERN_INFO "%s - version %s\n",
202 igb_driver_string, igb_driver_version);
204 printk(KERN_INFO "%s\n", igb_copyright);
206 global_quad_port_a = 0;
208 ret = pci_register_driver(&igb_driver);
209 #ifdef CONFIG_IGB_DCA
210 dca_register_notify(&dca_notifier);
215 module_init(igb_init_module);
218 * igb_exit_module - Driver Exit Cleanup Routine
220 * igb_exit_module is called just before the driver is removed
223 static void __exit igb_exit_module(void)
225 #ifdef CONFIG_IGB_DCA
226 dca_unregister_notify(&dca_notifier);
228 pci_unregister_driver(&igb_driver);
231 module_exit(igb_exit_module);
234 * igb_alloc_queues - Allocate memory for all rings
235 * @adapter: board private structure to initialize
237 * We allocate one ring per queue at run-time since we don't know the
238 * number of queues at compile-time.
240 static int igb_alloc_queues(struct igb_adapter *adapter)
244 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
245 sizeof(struct igb_ring), GFP_KERNEL);
246 if (!adapter->tx_ring)
249 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
250 sizeof(struct igb_ring), GFP_KERNEL);
251 if (!adapter->rx_ring) {
252 kfree(adapter->tx_ring);
256 adapter->rx_ring->buddy = adapter->tx_ring;
258 for (i = 0; i < adapter->num_tx_queues; i++) {
259 struct igb_ring *ring = &(adapter->tx_ring[i]);
260 ring->count = adapter->tx_ring_count;
261 ring->adapter = adapter;
262 ring->queue_index = i;
264 for (i = 0; i < adapter->num_rx_queues; i++) {
265 struct igb_ring *ring = &(adapter->rx_ring[i]);
266 ring->count = adapter->rx_ring_count;
267 ring->adapter = adapter;
268 ring->queue_index = i;
269 ring->itr_register = E1000_ITR;
271 /* set a default napi handler for each rx_ring */
272 netif_napi_add(adapter->netdev, &ring->napi, igb_poll, 64);
277 static void igb_free_queues(struct igb_adapter *adapter)
281 for (i = 0; i < adapter->num_rx_queues; i++)
282 netif_napi_del(&adapter->rx_ring[i].napi);
284 kfree(adapter->tx_ring);
285 kfree(adapter->rx_ring);
288 #define IGB_N0_QUEUE -1
289 static void igb_assign_vector(struct igb_adapter *adapter, int rx_queue,
290 int tx_queue, int msix_vector)
293 struct e1000_hw *hw = &adapter->hw;
296 switch (hw->mac.type) {
298 /* The 82575 assigns vectors using a bitmask, which matches the
299 bitmask for the EICR/EIMS/EIMC registers. To assign one
300 or more queues to a vector, we write the appropriate bits
301 into the MSIXBM register for that vector. */
302 if (rx_queue > IGB_N0_QUEUE) {
303 msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
304 adapter->rx_ring[rx_queue].eims_value = msixbm;
306 if (tx_queue > IGB_N0_QUEUE) {
307 msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
308 adapter->tx_ring[tx_queue].eims_value =
309 E1000_EICR_TX_QUEUE0 << tx_queue;
311 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
314 /* The 82576 uses a table-based method for assigning vectors.
315 Each queue has a single entry in the table to which we write
316 a vector number along with a "valid" bit. Sadly, the layout
317 of the table is somewhat counterintuitive. */
318 if (rx_queue > IGB_N0_QUEUE) {
319 index = (rx_queue & 0x7);
320 ivar = array_rd32(E1000_IVAR0, index);
322 /* vector goes into low byte of register */
323 ivar = ivar & 0xFFFFFF00;
324 ivar |= msix_vector | E1000_IVAR_VALID;
326 /* vector goes into third byte of register */
327 ivar = ivar & 0xFF00FFFF;
328 ivar |= (msix_vector | E1000_IVAR_VALID) << 16;
330 adapter->rx_ring[rx_queue].eims_value= 1 << msix_vector;
331 array_wr32(E1000_IVAR0, index, ivar);
333 if (tx_queue > IGB_N0_QUEUE) {
334 index = (tx_queue & 0x7);
335 ivar = array_rd32(E1000_IVAR0, index);
337 /* vector goes into second byte of register */
338 ivar = ivar & 0xFFFF00FF;
339 ivar |= (msix_vector | E1000_IVAR_VALID) << 8;
341 /* vector goes into high byte of register */
342 ivar = ivar & 0x00FFFFFF;
343 ivar |= (msix_vector | E1000_IVAR_VALID) << 24;
345 adapter->tx_ring[tx_queue].eims_value= 1 << msix_vector;
346 array_wr32(E1000_IVAR0, index, ivar);
356 * igb_configure_msix - Configure MSI-X hardware
358 * igb_configure_msix sets up the hardware to properly
359 * generate MSI-X interrupts.
361 static void igb_configure_msix(struct igb_adapter *adapter)
365 struct e1000_hw *hw = &adapter->hw;
367 adapter->eims_enable_mask = 0;
368 if (hw->mac.type == e1000_82576)
369 /* Turn on MSI-X capability first, or our settings
370 * won't stick. And it will take days to debug. */
371 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
372 E1000_GPIE_PBA | E1000_GPIE_EIAME |
375 for (i = 0; i < adapter->num_tx_queues; i++) {
376 struct igb_ring *tx_ring = &adapter->tx_ring[i];
377 igb_assign_vector(adapter, IGB_N0_QUEUE, i, vector++);
378 adapter->eims_enable_mask |= tx_ring->eims_value;
379 if (tx_ring->itr_val)
380 writel(tx_ring->itr_val,
381 hw->hw_addr + tx_ring->itr_register);
383 writel(1, hw->hw_addr + tx_ring->itr_register);
386 for (i = 0; i < adapter->num_rx_queues; i++) {
387 struct igb_ring *rx_ring = &adapter->rx_ring[i];
388 rx_ring->buddy = NULL;
389 igb_assign_vector(adapter, i, IGB_N0_QUEUE, vector++);
390 adapter->eims_enable_mask |= rx_ring->eims_value;
391 if (rx_ring->itr_val)
392 writel(rx_ring->itr_val,
393 hw->hw_addr + rx_ring->itr_register);
395 writel(1, hw->hw_addr + rx_ring->itr_register);
399 /* set vector for other causes, i.e. link changes */
400 switch (hw->mac.type) {
402 array_wr32(E1000_MSIXBM(0), vector++,
405 tmp = rd32(E1000_CTRL_EXT);
406 /* enable MSI-X PBA support*/
407 tmp |= E1000_CTRL_EXT_PBA_CLR;
409 /* Auto-Mask interrupts upon ICR read. */
410 tmp |= E1000_CTRL_EXT_EIAME;
411 tmp |= E1000_CTRL_EXT_IRCA;
413 wr32(E1000_CTRL_EXT, tmp);
414 adapter->eims_enable_mask |= E1000_EIMS_OTHER;
415 adapter->eims_other = E1000_EIMS_OTHER;
420 tmp = (vector++ | E1000_IVAR_VALID) << 8;
421 wr32(E1000_IVAR_MISC, tmp);
423 adapter->eims_enable_mask = (1 << (vector)) - 1;
424 adapter->eims_other = 1 << (vector - 1);
427 /* do nothing, since nothing else supports MSI-X */
429 } /* switch (hw->mac.type) */
434 * igb_request_msix - Initialize MSI-X interrupts
436 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
439 static int igb_request_msix(struct igb_adapter *adapter)
441 struct net_device *netdev = adapter->netdev;
442 int i, err = 0, vector = 0;
446 for (i = 0; i < adapter->num_tx_queues; i++) {
447 struct igb_ring *ring = &(adapter->tx_ring[i]);
448 sprintf(ring->name, "%s-tx%d", netdev->name, i);
449 err = request_irq(adapter->msix_entries[vector].vector,
450 &igb_msix_tx, 0, ring->name,
451 &(adapter->tx_ring[i]));
454 ring->itr_register = E1000_EITR(0) + (vector << 2);
455 ring->itr_val = 976; /* ~4000 ints/sec */
458 for (i = 0; i < adapter->num_rx_queues; i++) {
459 struct igb_ring *ring = &(adapter->rx_ring[i]);
460 if (strlen(netdev->name) < (IFNAMSIZ - 5))
461 sprintf(ring->name, "%s-rx%d", netdev->name, i);
463 memcpy(ring->name, netdev->name, IFNAMSIZ);
464 err = request_irq(adapter->msix_entries[vector].vector,
465 &igb_msix_rx, 0, ring->name,
466 &(adapter->rx_ring[i]));
469 ring->itr_register = E1000_EITR(0) + (vector << 2);
470 ring->itr_val = adapter->itr;
471 /* overwrite the poll routine for MSIX, we've already done
473 ring->napi.poll = &igb_clean_rx_ring_msix;
477 err = request_irq(adapter->msix_entries[vector].vector,
478 &igb_msix_other, 0, netdev->name, netdev);
482 igb_configure_msix(adapter);
488 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
490 if (adapter->msix_entries) {
491 pci_disable_msix(adapter->pdev);
492 kfree(adapter->msix_entries);
493 adapter->msix_entries = NULL;
494 } else if (adapter->flags & IGB_FLAG_HAS_MSI)
495 pci_disable_msi(adapter->pdev);
501 * igb_set_interrupt_capability - set MSI or MSI-X if supported
503 * Attempt to configure interrupts using the best available
504 * capabilities of the hardware and kernel.
506 static void igb_set_interrupt_capability(struct igb_adapter *adapter)
511 numvecs = adapter->num_tx_queues + adapter->num_rx_queues + 1;
512 adapter->msix_entries = kcalloc(numvecs, sizeof(struct msix_entry),
514 if (!adapter->msix_entries)
517 for (i = 0; i < numvecs; i++)
518 adapter->msix_entries[i].entry = i;
520 err = pci_enable_msix(adapter->pdev,
521 adapter->msix_entries,
526 igb_reset_interrupt_capability(adapter);
528 /* If we can't do MSI-X, try MSI */
530 adapter->num_rx_queues = 1;
531 adapter->num_tx_queues = 1;
532 if (!pci_enable_msi(adapter->pdev))
533 adapter->flags |= IGB_FLAG_HAS_MSI;
535 /* Notify the stack of the (possibly) reduced Tx Queue count. */
536 adapter->netdev->real_num_tx_queues = adapter->num_tx_queues;
541 * igb_request_irq - initialize interrupts
543 * Attempts to configure interrupts using the best available
544 * capabilities of the hardware and kernel.
546 static int igb_request_irq(struct igb_adapter *adapter)
548 struct net_device *netdev = adapter->netdev;
549 struct e1000_hw *hw = &adapter->hw;
552 if (adapter->msix_entries) {
553 err = igb_request_msix(adapter);
556 /* fall back to MSI */
557 igb_reset_interrupt_capability(adapter);
558 if (!pci_enable_msi(adapter->pdev))
559 adapter->flags |= IGB_FLAG_HAS_MSI;
560 igb_free_all_tx_resources(adapter);
561 igb_free_all_rx_resources(adapter);
562 adapter->num_rx_queues = 1;
563 igb_alloc_queues(adapter);
565 switch (hw->mac.type) {
567 wr32(E1000_MSIXBM(0),
568 (E1000_EICR_RX_QUEUE0 | E1000_EIMS_OTHER));
571 wr32(E1000_IVAR0, E1000_IVAR_VALID);
578 if (adapter->flags & IGB_FLAG_HAS_MSI) {
579 err = request_irq(adapter->pdev->irq, &igb_intr_msi, 0,
580 netdev->name, netdev);
583 /* fall back to legacy interrupts */
584 igb_reset_interrupt_capability(adapter);
585 adapter->flags &= ~IGB_FLAG_HAS_MSI;
588 err = request_irq(adapter->pdev->irq, &igb_intr, IRQF_SHARED,
589 netdev->name, netdev);
592 dev_err(&adapter->pdev->dev, "Error %d getting interrupt\n",
599 static void igb_free_irq(struct igb_adapter *adapter)
601 struct net_device *netdev = adapter->netdev;
603 if (adapter->msix_entries) {
606 for (i = 0; i < adapter->num_tx_queues; i++)
607 free_irq(adapter->msix_entries[vector++].vector,
608 &(adapter->tx_ring[i]));
609 for (i = 0; i < adapter->num_rx_queues; i++)
610 free_irq(adapter->msix_entries[vector++].vector,
611 &(adapter->rx_ring[i]));
613 free_irq(adapter->msix_entries[vector++].vector, netdev);
617 free_irq(adapter->pdev->irq, netdev);
621 * igb_irq_disable - Mask off interrupt generation on the NIC
622 * @adapter: board private structure
624 static void igb_irq_disable(struct igb_adapter *adapter)
626 struct e1000_hw *hw = &adapter->hw;
628 if (adapter->msix_entries) {
630 wr32(E1000_EIMC, ~0);
637 synchronize_irq(adapter->pdev->irq);
641 * igb_irq_enable - Enable default interrupt generation settings
642 * @adapter: board private structure
644 static void igb_irq_enable(struct igb_adapter *adapter)
646 struct e1000_hw *hw = &adapter->hw;
648 if (adapter->msix_entries) {
649 wr32(E1000_EIAC, adapter->eims_enable_mask);
650 wr32(E1000_EIAM, adapter->eims_enable_mask);
651 wr32(E1000_EIMS, adapter->eims_enable_mask);
652 wr32(E1000_IMS, E1000_IMS_LSC);
654 wr32(E1000_IMS, IMS_ENABLE_MASK);
655 wr32(E1000_IAM, IMS_ENABLE_MASK);
659 static void igb_update_mng_vlan(struct igb_adapter *adapter)
661 struct net_device *netdev = adapter->netdev;
662 u16 vid = adapter->hw.mng_cookie.vlan_id;
663 u16 old_vid = adapter->mng_vlan_id;
664 if (adapter->vlgrp) {
665 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
666 if (adapter->hw.mng_cookie.status &
667 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
668 igb_vlan_rx_add_vid(netdev, vid);
669 adapter->mng_vlan_id = vid;
671 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
673 if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
675 !vlan_group_get_device(adapter->vlgrp, old_vid))
676 igb_vlan_rx_kill_vid(netdev, old_vid);
678 adapter->mng_vlan_id = vid;
683 * igb_release_hw_control - release control of the h/w to f/w
684 * @adapter: address of board private structure
686 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
687 * For ASF and Pass Through versions of f/w this means that the
688 * driver is no longer loaded.
691 static void igb_release_hw_control(struct igb_adapter *adapter)
693 struct e1000_hw *hw = &adapter->hw;
696 /* Let firmware take over control of h/w */
697 ctrl_ext = rd32(E1000_CTRL_EXT);
699 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
704 * igb_get_hw_control - get control of the h/w from f/w
705 * @adapter: address of board private structure
707 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
708 * For ASF and Pass Through versions of f/w this means that
709 * the driver is loaded.
712 static void igb_get_hw_control(struct igb_adapter *adapter)
714 struct e1000_hw *hw = &adapter->hw;
717 /* Let firmware know the driver has taken over */
718 ctrl_ext = rd32(E1000_CTRL_EXT);
720 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
724 * igb_configure - configure the hardware for RX and TX
725 * @adapter: private board structure
727 static void igb_configure(struct igb_adapter *adapter)
729 struct net_device *netdev = adapter->netdev;
732 igb_get_hw_control(adapter);
733 igb_set_multi(netdev);
735 igb_restore_vlan(adapter);
737 igb_configure_tx(adapter);
738 igb_setup_rctl(adapter);
739 igb_configure_rx(adapter);
741 igb_rx_fifo_flush_82575(&adapter->hw);
743 /* call IGB_DESC_UNUSED which always leaves
744 * at least 1 descriptor unused to make sure
745 * next_to_use != next_to_clean */
746 for (i = 0; i < adapter->num_rx_queues; i++) {
747 struct igb_ring *ring = &adapter->rx_ring[i];
748 igb_alloc_rx_buffers_adv(ring, IGB_DESC_UNUSED(ring));
752 adapter->tx_queue_len = netdev->tx_queue_len;
757 * igb_up - Open the interface and prepare it to handle traffic
758 * @adapter: board private structure
761 int igb_up(struct igb_adapter *adapter)
763 struct e1000_hw *hw = &adapter->hw;
766 /* hardware has been reset, we need to reload some things */
767 igb_configure(adapter);
769 clear_bit(__IGB_DOWN, &adapter->state);
771 for (i = 0; i < adapter->num_rx_queues; i++)
772 napi_enable(&adapter->rx_ring[i].napi);
773 if (adapter->msix_entries)
774 igb_configure_msix(adapter);
776 /* Clear any pending interrupts. */
778 igb_irq_enable(adapter);
780 /* Fire a link change interrupt to start the watchdog. */
781 wr32(E1000_ICS, E1000_ICS_LSC);
785 void igb_down(struct igb_adapter *adapter)
787 struct e1000_hw *hw = &adapter->hw;
788 struct net_device *netdev = adapter->netdev;
792 /* signal that we're down so the interrupt handler does not
793 * reschedule our watchdog timer */
794 set_bit(__IGB_DOWN, &adapter->state);
796 /* disable receives in the hardware */
797 rctl = rd32(E1000_RCTL);
798 wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
799 /* flush and sleep below */
801 netif_tx_stop_all_queues(netdev);
803 /* disable transmits in the hardware */
804 tctl = rd32(E1000_TCTL);
805 tctl &= ~E1000_TCTL_EN;
806 wr32(E1000_TCTL, tctl);
807 /* flush both disables and wait for them to finish */
811 for (i = 0; i < adapter->num_rx_queues; i++)
812 napi_disable(&adapter->rx_ring[i].napi);
814 igb_irq_disable(adapter);
816 del_timer_sync(&adapter->watchdog_timer);
817 del_timer_sync(&adapter->phy_info_timer);
819 netdev->tx_queue_len = adapter->tx_queue_len;
820 netif_carrier_off(netdev);
821 adapter->link_speed = 0;
822 adapter->link_duplex = 0;
824 if (!pci_channel_offline(adapter->pdev))
826 igb_clean_all_tx_rings(adapter);
827 igb_clean_all_rx_rings(adapter);
830 void igb_reinit_locked(struct igb_adapter *adapter)
832 WARN_ON(in_interrupt());
833 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
837 clear_bit(__IGB_RESETTING, &adapter->state);
840 void igb_reset(struct igb_adapter *adapter)
842 struct e1000_hw *hw = &adapter->hw;
843 struct e1000_mac_info *mac = &hw->mac;
844 struct e1000_fc_info *fc = &hw->fc;
845 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
848 /* Repartition Pba for greater than 9k mtu
849 * To take effect CTRL.RST is required.
851 if (mac->type != e1000_82576) {
858 if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
859 (mac->type < e1000_82576)) {
860 /* adjust PBA for jumbo frames */
861 wr32(E1000_PBA, pba);
863 /* To maintain wire speed transmits, the Tx FIFO should be
864 * large enough to accommodate two full transmit packets,
865 * rounded up to the next 1KB and expressed in KB. Likewise,
866 * the Rx FIFO should be large enough to accommodate at least
867 * one full receive packet and is similarly rounded up and
868 * expressed in KB. */
869 pba = rd32(E1000_PBA);
870 /* upper 16 bits has Tx packet buffer allocation size in KB */
871 tx_space = pba >> 16;
872 /* lower 16 bits has Rx packet buffer allocation size in KB */
874 /* the tx fifo also stores 16 bytes of information about the tx
875 * but don't include ethernet FCS because hardware appends it */
876 min_tx_space = (adapter->max_frame_size +
877 sizeof(struct e1000_tx_desc) -
879 min_tx_space = ALIGN(min_tx_space, 1024);
881 /* software strips receive CRC, so leave room for it */
882 min_rx_space = adapter->max_frame_size;
883 min_rx_space = ALIGN(min_rx_space, 1024);
886 /* If current Tx allocation is less than the min Tx FIFO size,
887 * and the min Tx FIFO size is less than the current Rx FIFO
888 * allocation, take space away from current Rx allocation */
889 if (tx_space < min_tx_space &&
890 ((min_tx_space - tx_space) < pba)) {
891 pba = pba - (min_tx_space - tx_space);
893 /* if short on rx space, rx wins and must trump tx
895 if (pba < min_rx_space)
898 wr32(E1000_PBA, pba);
901 /* flow control settings */
902 /* The high water mark must be low enough to fit one full frame
903 * (or the size used for early receive) above it in the Rx FIFO.
904 * Set it to the lower of:
905 * - 90% of the Rx FIFO size, or
906 * - the full Rx FIFO size minus one full frame */
907 hwm = min(((pba << 10) * 9 / 10),
908 ((pba << 10) - 2 * adapter->max_frame_size));
910 if (mac->type < e1000_82576) {
911 fc->high_water = hwm & 0xFFF8; /* 8-byte granularity */
912 fc->low_water = fc->high_water - 8;
914 fc->high_water = hwm & 0xFFF0; /* 16-byte granularity */
915 fc->low_water = fc->high_water - 16;
917 fc->pause_time = 0xFFFF;
919 fc->type = fc->original_type;
921 /* Allow time for pending master requests to run */
922 adapter->hw.mac.ops.reset_hw(&adapter->hw);
925 if (adapter->hw.mac.ops.init_hw(&adapter->hw))
926 dev_err(&adapter->pdev->dev, "Hardware Error\n");
928 igb_update_mng_vlan(adapter);
930 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
931 wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
933 igb_reset_adaptive(&adapter->hw);
934 igb_get_phy_info(&adapter->hw);
938 * igb_is_need_ioport - determine if an adapter needs ioport resources or not
939 * @pdev: PCI device information struct
941 * Returns true if an adapter needs ioport resources
943 static int igb_is_need_ioport(struct pci_dev *pdev)
945 switch (pdev->device) {
946 /* Currently there are no adapters that need ioport resources */
952 static const struct net_device_ops igb_netdev_ops = {
953 .ndo_open = igb_open,
954 .ndo_stop = igb_close,
955 .ndo_start_xmit = igb_xmit_frame_adv,
956 .ndo_get_stats = igb_get_stats,
957 .ndo_set_multicast_list = igb_set_multi,
958 .ndo_set_mac_address = igb_set_mac,
959 .ndo_change_mtu = igb_change_mtu,
960 .ndo_do_ioctl = igb_ioctl,
961 .ndo_tx_timeout = igb_tx_timeout,
962 .ndo_validate_addr = eth_validate_addr,
963 .ndo_vlan_rx_register = igb_vlan_rx_register,
964 .ndo_vlan_rx_add_vid = igb_vlan_rx_add_vid,
965 .ndo_vlan_rx_kill_vid = igb_vlan_rx_kill_vid,
966 #ifdef CONFIG_NET_POLL_CONTROLLER
967 .ndo_poll_controller = igb_netpoll,
972 * igb_probe - Device Initialization Routine
973 * @pdev: PCI device information struct
974 * @ent: entry in igb_pci_tbl
976 * Returns 0 on success, negative on failure
978 * igb_probe initializes an adapter identified by a pci_dev structure.
979 * The OS initialization, configuring of the adapter private structure,
980 * and a hardware reset occur.
982 static int __devinit igb_probe(struct pci_dev *pdev,
983 const struct pci_device_id *ent)
985 struct net_device *netdev;
986 struct igb_adapter *adapter;
988 struct pci_dev *us_dev;
989 const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
990 unsigned long mmio_start, mmio_len;
991 int i, err, pci_using_dac, pos;
992 u16 eeprom_data = 0, state = 0;
993 u16 eeprom_apme_mask = IGB_EEPROM_APME;
995 int bars, need_ioport;
997 /* do not allocate ioport bars when not needed */
998 need_ioport = igb_is_need_ioport(pdev);
1000 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
1001 err = pci_enable_device(pdev);
1003 bars = pci_select_bars(pdev, IORESOURCE_MEM);
1004 err = pci_enable_device_mem(pdev);
1010 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
1012 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
1016 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1018 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
1020 dev_err(&pdev->dev, "No usable DMA "
1021 "configuration, aborting\n");
1027 /* 82575 requires that the pci-e link partner disable the L0s state */
1028 switch (pdev->device) {
1029 case E1000_DEV_ID_82575EB_COPPER:
1030 case E1000_DEV_ID_82575EB_FIBER_SERDES:
1031 case E1000_DEV_ID_82575GB_QUAD_COPPER:
1032 us_dev = pdev->bus->self;
1033 pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
1035 pci_read_config_word(us_dev, pos + PCI_EXP_LNKCTL,
1037 state &= ~PCIE_LINK_STATE_L0S;
1038 pci_write_config_word(us_dev, pos + PCI_EXP_LNKCTL,
1040 dev_info(&pdev->dev,
1041 "Disabling ASPM L0s upstream switch port %s\n",
1048 err = pci_request_selected_regions(pdev, bars, igb_driver_name);
1052 pci_set_master(pdev);
1053 pci_save_state(pdev);
1056 netdev = alloc_etherdev_mq(sizeof(struct igb_adapter), IGB_MAX_TX_QUEUES);
1058 goto err_alloc_etherdev;
1060 SET_NETDEV_DEV(netdev, &pdev->dev);
1062 pci_set_drvdata(pdev, netdev);
1063 adapter = netdev_priv(netdev);
1064 adapter->netdev = netdev;
1065 adapter->pdev = pdev;
1068 adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE;
1069 adapter->bars = bars;
1070 adapter->need_ioport = need_ioport;
1072 mmio_start = pci_resource_start(pdev, 0);
1073 mmio_len = pci_resource_len(pdev, 0);
1076 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
1077 if (!adapter->hw.hw_addr)
1080 netdev->netdev_ops = &igb_netdev_ops;
1081 igb_set_ethtool_ops(netdev);
1082 netdev->watchdog_timeo = 5 * HZ;
1084 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1086 netdev->mem_start = mmio_start;
1087 netdev->mem_end = mmio_start + mmio_len;
1089 /* PCI config space info */
1090 hw->vendor_id = pdev->vendor;
1091 hw->device_id = pdev->device;
1092 hw->revision_id = pdev->revision;
1093 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1094 hw->subsystem_device_id = pdev->subsystem_device;
1096 /* setup the private structure */
1098 /* Copy the default MAC, PHY and NVM function pointers */
1099 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
1100 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
1101 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
1102 /* Initialize skew-specific constants */
1103 err = ei->get_invariants(hw);
1107 err = igb_sw_init(adapter);
1111 igb_get_bus_info_pcie(hw);
1114 switch (hw->mac.type) {
1117 adapter->flags |= IGB_FLAG_HAS_DCA;
1118 adapter->flags |= IGB_FLAG_NEED_CTX_IDX;
1124 hw->phy.autoneg_wait_to_complete = false;
1125 hw->mac.adaptive_ifs = true;
1127 /* Copper options */
1128 if (hw->phy.media_type == e1000_media_type_copper) {
1129 hw->phy.mdix = AUTO_ALL_MODES;
1130 hw->phy.disable_polarity_correction = false;
1131 hw->phy.ms_type = e1000_ms_hw_default;
1134 if (igb_check_reset_block(hw))
1135 dev_info(&pdev->dev,
1136 "PHY reset is blocked due to SOL/IDER session.\n");
1138 netdev->features = NETIF_F_SG |
1140 NETIF_F_HW_VLAN_TX |
1141 NETIF_F_HW_VLAN_RX |
1142 NETIF_F_HW_VLAN_FILTER;
1144 netdev->features |= NETIF_F_TSO;
1145 netdev->features |= NETIF_F_TSO6;
1147 #ifdef CONFIG_IGB_LRO
1148 netdev->features |= NETIF_F_LRO;
1151 netdev->vlan_features |= NETIF_F_TSO;
1152 netdev->vlan_features |= NETIF_F_TSO6;
1153 netdev->vlan_features |= NETIF_F_HW_CSUM;
1154 netdev->vlan_features |= NETIF_F_SG;
1157 netdev->features |= NETIF_F_HIGHDMA;
1159 netdev->features |= NETIF_F_LLTX;
1160 adapter->en_mng_pt = igb_enable_mng_pass_thru(&adapter->hw);
1162 /* before reading the NVM, reset the controller to put the device in a
1163 * known good starting state */
1164 hw->mac.ops.reset_hw(hw);
1166 /* make sure the NVM is good */
1167 if (igb_validate_nvm_checksum(hw) < 0) {
1168 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
1173 /* copy the MAC address out of the NVM */
1174 if (hw->mac.ops.read_mac_addr(hw))
1175 dev_err(&pdev->dev, "NVM Read Error\n");
1177 memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
1178 memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
1180 if (!is_valid_ether_addr(netdev->perm_addr)) {
1181 dev_err(&pdev->dev, "Invalid MAC Address\n");
1186 init_timer(&adapter->watchdog_timer);
1187 adapter->watchdog_timer.function = &igb_watchdog;
1188 adapter->watchdog_timer.data = (unsigned long) adapter;
1190 init_timer(&adapter->phy_info_timer);
1191 adapter->phy_info_timer.function = &igb_update_phy_info;
1192 adapter->phy_info_timer.data = (unsigned long) adapter;
1194 INIT_WORK(&adapter->reset_task, igb_reset_task);
1195 INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
1197 /* Initialize link & ring properties that are user-changeable */
1198 adapter->tx_ring->count = 256;
1199 for (i = 0; i < adapter->num_tx_queues; i++)
1200 adapter->tx_ring[i].count = adapter->tx_ring->count;
1201 adapter->rx_ring->count = 256;
1202 for (i = 0; i < adapter->num_rx_queues; i++)
1203 adapter->rx_ring[i].count = adapter->rx_ring->count;
1205 adapter->fc_autoneg = true;
1206 hw->mac.autoneg = true;
1207 hw->phy.autoneg_advertised = 0x2f;
1209 hw->fc.original_type = e1000_fc_default;
1210 hw->fc.type = e1000_fc_default;
1212 adapter->itr_setting = 3;
1213 adapter->itr = IGB_START_ITR;
1215 igb_validate_mdi_setting(hw);
1217 adapter->rx_csum = 1;
1219 /* Initial Wake on LAN setting If APM wake is enabled in the EEPROM,
1220 * enable the ACPI Magic Packet filter
1223 if (hw->bus.func == 0 ||
1224 hw->device_id == E1000_DEV_ID_82575EB_COPPER)
1225 hw->nvm.ops.read_nvm(hw, NVM_INIT_CONTROL3_PORT_A, 1,
1228 if (eeprom_data & eeprom_apme_mask)
1229 adapter->eeprom_wol |= E1000_WUFC_MAG;
1231 /* now that we have the eeprom settings, apply the special cases where
1232 * the eeprom may be wrong or the board simply won't support wake on
1233 * lan on a particular port */
1234 switch (pdev->device) {
1235 case E1000_DEV_ID_82575GB_QUAD_COPPER:
1236 adapter->eeprom_wol = 0;
1238 case E1000_DEV_ID_82575EB_FIBER_SERDES:
1239 case E1000_DEV_ID_82576_FIBER:
1240 case E1000_DEV_ID_82576_SERDES:
1241 /* Wake events only supported on port A for dual fiber
1242 * regardless of eeprom setting */
1243 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
1244 adapter->eeprom_wol = 0;
1248 /* initialize the wol settings based on the eeprom settings */
1249 adapter->wol = adapter->eeprom_wol;
1250 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1252 /* reset the hardware with the new settings */
1255 /* let the f/w know that the h/w is now under the control of the
1257 igb_get_hw_control(adapter);
1259 /* tell the stack to leave us alone until igb_open() is called */
1260 netif_carrier_off(netdev);
1261 netif_tx_stop_all_queues(netdev);
1263 strcpy(netdev->name, "eth%d");
1264 err = register_netdev(netdev);
1268 #ifdef CONFIG_IGB_DCA
1269 if ((adapter->flags & IGB_FLAG_HAS_DCA) &&
1270 (dca_add_requester(&pdev->dev) == 0)) {
1271 adapter->flags |= IGB_FLAG_DCA_ENABLED;
1272 dev_info(&pdev->dev, "DCA enabled\n");
1273 /* Always use CB2 mode, difference is masked
1274 * in the CB driver. */
1275 wr32(E1000_DCA_CTRL, 2);
1276 igb_setup_dca(adapter);
1280 dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
1281 /* print bus type/speed/width info */
1282 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
1284 ((hw->bus.speed == e1000_bus_speed_2500)
1285 ? "2.5Gb/s" : "unknown"),
1286 ((hw->bus.width == e1000_bus_width_pcie_x4)
1287 ? "Width x4" : (hw->bus.width == e1000_bus_width_pcie_x1)
1288 ? "Width x1" : "unknown"),
1291 igb_read_part_num(hw, &part_num);
1292 dev_info(&pdev->dev, "%s: PBA No: %06x-%03x\n", netdev->name,
1293 (part_num >> 8), (part_num & 0xff));
1295 dev_info(&pdev->dev,
1296 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
1297 adapter->msix_entries ? "MSI-X" :
1298 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
1299 adapter->num_rx_queues, adapter->num_tx_queues);
1304 igb_release_hw_control(adapter);
1306 if (!igb_check_reset_block(hw))
1309 if (hw->flash_address)
1310 iounmap(hw->flash_address);
1312 igb_remove_device(hw);
1313 igb_free_queues(adapter);
1316 iounmap(hw->hw_addr);
1318 free_netdev(netdev);
1320 pci_release_selected_regions(pdev, bars);
1323 pci_disable_device(pdev);
1328 * igb_remove - Device Removal Routine
1329 * @pdev: PCI device information struct
1331 * igb_remove is called by the PCI subsystem to alert the driver
1332 * that it should release a PCI device. The could be caused by a
1333 * Hot-Plug event, or because the driver is going to be removed from
1336 static void __devexit igb_remove(struct pci_dev *pdev)
1338 struct net_device *netdev = pci_get_drvdata(pdev);
1339 struct igb_adapter *adapter = netdev_priv(netdev);
1340 #ifdef CONFIG_IGB_DCA
1341 struct e1000_hw *hw = &adapter->hw;
1344 /* flush_scheduled work may reschedule our watchdog task, so
1345 * explicitly disable watchdog tasks from being rescheduled */
1346 set_bit(__IGB_DOWN, &adapter->state);
1347 del_timer_sync(&adapter->watchdog_timer);
1348 del_timer_sync(&adapter->phy_info_timer);
1350 flush_scheduled_work();
1352 #ifdef CONFIG_IGB_DCA
1353 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
1354 dev_info(&pdev->dev, "DCA disabled\n");
1355 dca_remove_requester(&pdev->dev);
1356 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
1357 wr32(E1000_DCA_CTRL, 1);
1361 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1362 * would have already happened in close and is redundant. */
1363 igb_release_hw_control(adapter);
1365 unregister_netdev(netdev);
1367 if (!igb_check_reset_block(&adapter->hw))
1368 igb_reset_phy(&adapter->hw);
1370 igb_remove_device(&adapter->hw);
1371 igb_reset_interrupt_capability(adapter);
1373 igb_free_queues(adapter);
1375 iounmap(adapter->hw.hw_addr);
1376 if (adapter->hw.flash_address)
1377 iounmap(adapter->hw.flash_address);
1378 pci_release_selected_regions(pdev, adapter->bars);
1380 free_netdev(netdev);
1382 pci_disable_device(pdev);
1386 * igb_sw_init - Initialize general software structures (struct igb_adapter)
1387 * @adapter: board private structure to initialize
1389 * igb_sw_init initializes the Adapter private data structure.
1390 * Fields are initialized based on PCI device information and
1391 * OS network device settings (MTU size).
1393 static int __devinit igb_sw_init(struct igb_adapter *adapter)
1395 struct e1000_hw *hw = &adapter->hw;
1396 struct net_device *netdev = adapter->netdev;
1397 struct pci_dev *pdev = adapter->pdev;
1399 pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
1401 adapter->tx_ring_count = IGB_DEFAULT_TXD;
1402 adapter->rx_ring_count = IGB_DEFAULT_RXD;
1403 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1404 adapter->rx_ps_hdr_size = 0; /* disable packet split */
1405 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1406 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
1408 /* Number of supported queues. */
1409 /* Having more queues than CPUs doesn't make sense. */
1410 adapter->num_rx_queues = min((u32)IGB_MAX_RX_QUEUES, (u32)num_online_cpus());
1411 adapter->num_tx_queues = min(IGB_MAX_TX_QUEUES, num_online_cpus());
1413 /* This call may decrease the number of queues depending on
1414 * interrupt mode. */
1415 igb_set_interrupt_capability(adapter);
1417 if (igb_alloc_queues(adapter)) {
1418 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
1422 /* Explicitly disable IRQ since the NIC can be in any state. */
1423 igb_irq_disable(adapter);
1425 set_bit(__IGB_DOWN, &adapter->state);
1430 * igb_open - Called when a network interface is made active
1431 * @netdev: network interface device structure
1433 * Returns 0 on success, negative value on failure
1435 * The open entry point is called when a network interface is made
1436 * active by the system (IFF_UP). At this point all resources needed
1437 * for transmit and receive operations are allocated, the interrupt
1438 * handler is registered with the OS, the watchdog timer is started,
1439 * and the stack is notified that the interface is ready.
1441 static int igb_open(struct net_device *netdev)
1443 struct igb_adapter *adapter = netdev_priv(netdev);
1444 struct e1000_hw *hw = &adapter->hw;
1448 /* disallow open during test */
1449 if (test_bit(__IGB_TESTING, &adapter->state))
1452 /* allocate transmit descriptors */
1453 err = igb_setup_all_tx_resources(adapter);
1457 /* allocate receive descriptors */
1458 err = igb_setup_all_rx_resources(adapter);
1462 /* e1000_power_up_phy(adapter); */
1464 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1465 if ((adapter->hw.mng_cookie.status &
1466 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
1467 igb_update_mng_vlan(adapter);
1469 /* before we allocate an interrupt, we must be ready to handle it.
1470 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1471 * as soon as we call pci_request_irq, so we have to setup our
1472 * clean_rx handler before we do so. */
1473 igb_configure(adapter);
1475 err = igb_request_irq(adapter);
1479 /* From here on the code is the same as igb_up() */
1480 clear_bit(__IGB_DOWN, &adapter->state);
1482 for (i = 0; i < adapter->num_rx_queues; i++)
1483 napi_enable(&adapter->rx_ring[i].napi);
1485 /* Clear any pending interrupts. */
1488 igb_irq_enable(adapter);
1490 netif_tx_start_all_queues(netdev);
1492 /* Fire a link status change interrupt to start the watchdog. */
1493 wr32(E1000_ICS, E1000_ICS_LSC);
1498 igb_release_hw_control(adapter);
1499 /* e1000_power_down_phy(adapter); */
1500 igb_free_all_rx_resources(adapter);
1502 igb_free_all_tx_resources(adapter);
1510 * igb_close - Disables a network interface
1511 * @netdev: network interface device structure
1513 * Returns 0, this is not allowed to fail
1515 * The close entry point is called when an interface is de-activated
1516 * by the OS. The hardware is still under the driver's control, but
1517 * needs to be disabled. A global MAC reset is issued to stop the
1518 * hardware, and all transmit and receive resources are freed.
1520 static int igb_close(struct net_device *netdev)
1522 struct igb_adapter *adapter = netdev_priv(netdev);
1524 WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
1527 igb_free_irq(adapter);
1529 igb_free_all_tx_resources(adapter);
1530 igb_free_all_rx_resources(adapter);
1532 /* kill manageability vlan ID if supported, but not if a vlan with
1533 * the same ID is registered on the host OS (let 8021q kill it) */
1534 if ((adapter->hw.mng_cookie.status &
1535 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
1537 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
1538 igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1544 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
1545 * @adapter: board private structure
1546 * @tx_ring: tx descriptor ring (for a specific queue) to setup
1548 * Return 0 on success, negative on failure
1551 int igb_setup_tx_resources(struct igb_adapter *adapter,
1552 struct igb_ring *tx_ring)
1554 struct pci_dev *pdev = adapter->pdev;
1557 size = sizeof(struct igb_buffer) * tx_ring->count;
1558 tx_ring->buffer_info = vmalloc(size);
1559 if (!tx_ring->buffer_info)
1561 memset(tx_ring->buffer_info, 0, size);
1563 /* round up to nearest 4K */
1564 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc)
1566 tx_ring->size = ALIGN(tx_ring->size, 4096);
1568 tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
1574 tx_ring->adapter = adapter;
1575 tx_ring->next_to_use = 0;
1576 tx_ring->next_to_clean = 0;
1580 vfree(tx_ring->buffer_info);
1581 dev_err(&adapter->pdev->dev,
1582 "Unable to allocate memory for the transmit descriptor ring\n");
1587 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
1588 * (Descriptors) for all queues
1589 * @adapter: board private structure
1591 * Return 0 on success, negative on failure
1593 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
1598 for (i = 0; i < adapter->num_tx_queues; i++) {
1599 err = igb_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1601 dev_err(&adapter->pdev->dev,
1602 "Allocation for Tx Queue %u failed\n", i);
1603 for (i--; i >= 0; i--)
1604 igb_free_tx_resources(&adapter->tx_ring[i]);
1609 for (i = 0; i < IGB_MAX_TX_QUEUES; i++) {
1610 r_idx = i % adapter->num_tx_queues;
1611 adapter->multi_tx_table[i] = &adapter->tx_ring[r_idx];
1617 * igb_configure_tx - Configure transmit Unit after Reset
1618 * @adapter: board private structure
1620 * Configure the Tx unit of the MAC after a reset.
1622 static void igb_configure_tx(struct igb_adapter *adapter)
1625 struct e1000_hw *hw = &adapter->hw;
1630 for (i = 0; i < adapter->num_tx_queues; i++) {
1631 struct igb_ring *ring = &(adapter->tx_ring[i]);
1633 wr32(E1000_TDLEN(i),
1634 ring->count * sizeof(struct e1000_tx_desc));
1636 wr32(E1000_TDBAL(i),
1637 tdba & 0x00000000ffffffffULL);
1638 wr32(E1000_TDBAH(i), tdba >> 32);
1640 tdwba = ring->dma + ring->count * sizeof(struct e1000_tx_desc);
1641 tdwba |= 1; /* enable head wb */
1642 wr32(E1000_TDWBAL(i),
1643 tdwba & 0x00000000ffffffffULL);
1644 wr32(E1000_TDWBAH(i), tdwba >> 32);
1646 ring->head = E1000_TDH(i);
1647 ring->tail = E1000_TDT(i);
1648 writel(0, hw->hw_addr + ring->tail);
1649 writel(0, hw->hw_addr + ring->head);
1650 txdctl = rd32(E1000_TXDCTL(i));
1651 txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
1652 wr32(E1000_TXDCTL(i), txdctl);
1654 /* Turn off Relaxed Ordering on head write-backs. The
1655 * writebacks MUST be delivered in order or it will
1656 * completely screw up our bookeeping.
1658 txctrl = rd32(E1000_DCA_TXCTRL(i));
1659 txctrl &= ~E1000_DCA_TXCTRL_TX_WB_RO_EN;
1660 wr32(E1000_DCA_TXCTRL(i), txctrl);
1665 /* Use the default values for the Tx Inter Packet Gap (IPG) timer */
1667 /* Program the Transmit Control Register */
1669 tctl = rd32(E1000_TCTL);
1670 tctl &= ~E1000_TCTL_CT;
1671 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1672 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1674 igb_config_collision_dist(hw);
1676 /* Setup Transmit Descriptor Settings for eop descriptor */
1677 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_RS;
1679 /* Enable transmits */
1680 tctl |= E1000_TCTL_EN;
1682 wr32(E1000_TCTL, tctl);
1686 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
1687 * @adapter: board private structure
1688 * @rx_ring: rx descriptor ring (for a specific queue) to setup
1690 * Returns 0 on success, negative on failure
1693 int igb_setup_rx_resources(struct igb_adapter *adapter,
1694 struct igb_ring *rx_ring)
1696 struct pci_dev *pdev = adapter->pdev;
1699 #ifdef CONFIG_IGB_LRO
1700 size = sizeof(struct net_lro_desc) * MAX_LRO_DESCRIPTORS;
1701 rx_ring->lro_mgr.lro_arr = vmalloc(size);
1702 if (!rx_ring->lro_mgr.lro_arr)
1704 memset(rx_ring->lro_mgr.lro_arr, 0, size);
1707 size = sizeof(struct igb_buffer) * rx_ring->count;
1708 rx_ring->buffer_info = vmalloc(size);
1709 if (!rx_ring->buffer_info)
1711 memset(rx_ring->buffer_info, 0, size);
1713 desc_len = sizeof(union e1000_adv_rx_desc);
1715 /* Round up to nearest 4K */
1716 rx_ring->size = rx_ring->count * desc_len;
1717 rx_ring->size = ALIGN(rx_ring->size, 4096);
1719 rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size,
1725 rx_ring->next_to_clean = 0;
1726 rx_ring->next_to_use = 0;
1728 rx_ring->adapter = adapter;
1733 #ifdef CONFIG_IGB_LRO
1734 vfree(rx_ring->lro_mgr.lro_arr);
1735 rx_ring->lro_mgr.lro_arr = NULL;
1737 vfree(rx_ring->buffer_info);
1738 dev_err(&adapter->pdev->dev, "Unable to allocate memory for "
1739 "the receive descriptor ring\n");
1744 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
1745 * (Descriptors) for all queues
1746 * @adapter: board private structure
1748 * Return 0 on success, negative on failure
1750 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
1754 for (i = 0; i < adapter->num_rx_queues; i++) {
1755 err = igb_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1757 dev_err(&adapter->pdev->dev,
1758 "Allocation for Rx Queue %u failed\n", i);
1759 for (i--; i >= 0; i--)
1760 igb_free_rx_resources(&adapter->rx_ring[i]);
1769 * igb_setup_rctl - configure the receive control registers
1770 * @adapter: Board private structure
1772 static void igb_setup_rctl(struct igb_adapter *adapter)
1774 struct e1000_hw *hw = &adapter->hw;
1779 rctl = rd32(E1000_RCTL);
1781 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1782 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1784 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
1785 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
1788 * enable stripping of CRC. It's unlikely this will break BMC
1789 * redirection as it did with e1000. Newer features require
1790 * that the HW strips the CRC.
1792 rctl |= E1000_RCTL_SECRC;
1795 * disable store bad packets, long packet enable, and clear size bits.
1797 rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_LPE | E1000_RCTL_SZ_256);
1799 if (adapter->netdev->mtu <= ETH_DATA_LEN) {
1800 /* Setup buffer sizes */
1801 switch (adapter->rx_buffer_len) {
1802 case IGB_RXBUFFER_256:
1803 rctl |= E1000_RCTL_SZ_256;
1805 case IGB_RXBUFFER_512:
1806 rctl |= E1000_RCTL_SZ_512;
1808 case IGB_RXBUFFER_1024:
1809 rctl |= E1000_RCTL_SZ_1024;
1812 rctl |= E1000_RCTL_SZ_2048;
1816 rctl |= E1000_RCTL_LPE;
1817 srrctl = adapter->rx_buffer_len >> E1000_SRRCTL_BSIZEPKT_SHIFT;
1820 /* 82575 and greater support packet-split where the protocol
1821 * header is placed in skb->data and the packet data is
1822 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1823 * In the case of a non-split, skb->data is linearly filled,
1824 * followed by the page buffers. Therefore, skb->data is
1825 * sized to hold the largest protocol header.
1827 /* allocations using alloc_page take too long for regular MTU
1828 * so only enable packet split for jumbo frames */
1829 if (rctl & E1000_RCTL_LPE) {
1830 adapter->rx_ps_hdr_size = IGB_RXBUFFER_128;
1831 srrctl |= adapter->rx_ps_hdr_size <<
1832 E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
1833 srrctl |= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1835 adapter->rx_ps_hdr_size = 0;
1836 srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
1839 for (i = 0; i < adapter->num_rx_queues; i++)
1840 wr32(E1000_SRRCTL(i), srrctl);
1842 wr32(E1000_RCTL, rctl);
1846 * igb_configure_rx - Configure receive Unit after Reset
1847 * @adapter: board private structure
1849 * Configure the Rx unit of the MAC after a reset.
1851 static void igb_configure_rx(struct igb_adapter *adapter)
1854 struct e1000_hw *hw = &adapter->hw;
1859 /* disable receives while setting up the descriptors */
1860 rctl = rd32(E1000_RCTL);
1861 wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1865 if (adapter->itr_setting > 3)
1866 wr32(E1000_ITR, adapter->itr);
1868 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1869 * the Base and Length of the Rx Descriptor Ring */
1870 for (i = 0; i < adapter->num_rx_queues; i++) {
1871 struct igb_ring *ring = &(adapter->rx_ring[i]);
1873 wr32(E1000_RDBAL(i),
1874 rdba & 0x00000000ffffffffULL);
1875 wr32(E1000_RDBAH(i), rdba >> 32);
1876 wr32(E1000_RDLEN(i),
1877 ring->count * sizeof(union e1000_adv_rx_desc));
1879 ring->head = E1000_RDH(i);
1880 ring->tail = E1000_RDT(i);
1881 writel(0, hw->hw_addr + ring->tail);
1882 writel(0, hw->hw_addr + ring->head);
1884 rxdctl = rd32(E1000_RXDCTL(i));
1885 rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
1886 rxdctl &= 0xFFF00000;
1887 rxdctl |= IGB_RX_PTHRESH;
1888 rxdctl |= IGB_RX_HTHRESH << 8;
1889 rxdctl |= IGB_RX_WTHRESH << 16;
1890 wr32(E1000_RXDCTL(i), rxdctl);
1891 #ifdef CONFIG_IGB_LRO
1892 /* Intitial LRO Settings */
1893 ring->lro_mgr.max_aggr = MAX_LRO_AGGR;
1894 ring->lro_mgr.max_desc = MAX_LRO_DESCRIPTORS;
1895 ring->lro_mgr.get_skb_header = igb_get_skb_hdr;
1896 ring->lro_mgr.features = LRO_F_NAPI | LRO_F_EXTRACT_VLAN_ID;
1897 ring->lro_mgr.dev = adapter->netdev;
1898 ring->lro_mgr.ip_summed = CHECKSUM_UNNECESSARY;
1899 ring->lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY;
1903 if (adapter->num_rx_queues > 1) {
1912 get_random_bytes(&random[0], 40);
1914 if (hw->mac.type >= e1000_82576)
1918 for (j = 0; j < (32 * 4); j++) {
1920 (j % adapter->num_rx_queues) << shift;
1923 hw->hw_addr + E1000_RETA(0) + (j & ~3));
1925 mrqc = E1000_MRQC_ENABLE_RSS_4Q;
1927 /* Fill out hash function seeds */
1928 for (j = 0; j < 10; j++)
1929 array_wr32(E1000_RSSRK(0), j, random[j]);
1931 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
1932 E1000_MRQC_RSS_FIELD_IPV4_TCP);
1933 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6 |
1934 E1000_MRQC_RSS_FIELD_IPV6_TCP);
1935 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4_UDP |
1936 E1000_MRQC_RSS_FIELD_IPV6_UDP);
1937 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6_UDP_EX |
1938 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
1941 wr32(E1000_MRQC, mrqc);
1943 /* Multiqueue and raw packet checksumming are mutually
1944 * exclusive. Note that this not the same as TCP/IP
1945 * checksumming, which works fine. */
1946 rxcsum = rd32(E1000_RXCSUM);
1947 rxcsum |= E1000_RXCSUM_PCSD;
1948 wr32(E1000_RXCSUM, rxcsum);
1950 /* Enable Receive Checksum Offload for TCP and UDP */
1951 rxcsum = rd32(E1000_RXCSUM);
1952 if (adapter->rx_csum) {
1953 rxcsum |= E1000_RXCSUM_TUOFL;
1955 /* Enable IPv4 payload checksum for UDP fragments
1956 * Must be used in conjunction with packet-split. */
1957 if (adapter->rx_ps_hdr_size)
1958 rxcsum |= E1000_RXCSUM_IPPCSE;
1960 rxcsum &= ~E1000_RXCSUM_TUOFL;
1961 /* don't need to clear IPPCSE as it defaults to 0 */
1963 wr32(E1000_RXCSUM, rxcsum);
1968 adapter->max_frame_size + VLAN_TAG_SIZE);
1970 wr32(E1000_RLPML, adapter->max_frame_size);
1972 /* Enable Receives */
1973 wr32(E1000_RCTL, rctl);
1977 * igb_free_tx_resources - Free Tx Resources per Queue
1978 * @tx_ring: Tx descriptor ring for a specific queue
1980 * Free all transmit software resources
1982 void igb_free_tx_resources(struct igb_ring *tx_ring)
1984 struct pci_dev *pdev = tx_ring->adapter->pdev;
1986 igb_clean_tx_ring(tx_ring);
1988 vfree(tx_ring->buffer_info);
1989 tx_ring->buffer_info = NULL;
1991 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1993 tx_ring->desc = NULL;
1997 * igb_free_all_tx_resources - Free Tx Resources for All Queues
1998 * @adapter: board private structure
2000 * Free all transmit software resources
2002 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
2006 for (i = 0; i < adapter->num_tx_queues; i++)
2007 igb_free_tx_resources(&adapter->tx_ring[i]);
2010 static void igb_unmap_and_free_tx_resource(struct igb_adapter *adapter,
2011 struct igb_buffer *buffer_info)
2013 if (buffer_info->dma) {
2014 pci_unmap_page(adapter->pdev,
2016 buffer_info->length,
2018 buffer_info->dma = 0;
2020 if (buffer_info->skb) {
2021 dev_kfree_skb_any(buffer_info->skb);
2022 buffer_info->skb = NULL;
2024 buffer_info->time_stamp = 0;
2025 /* buffer_info must be completely set up in the transmit path */
2029 * igb_clean_tx_ring - Free Tx Buffers
2030 * @tx_ring: ring to be cleaned
2032 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
2034 struct igb_adapter *adapter = tx_ring->adapter;
2035 struct igb_buffer *buffer_info;
2039 if (!tx_ring->buffer_info)
2041 /* Free all the Tx ring sk_buffs */
2043 for (i = 0; i < tx_ring->count; i++) {
2044 buffer_info = &tx_ring->buffer_info[i];
2045 igb_unmap_and_free_tx_resource(adapter, buffer_info);
2048 size = sizeof(struct igb_buffer) * tx_ring->count;
2049 memset(tx_ring->buffer_info, 0, size);
2051 /* Zero out the descriptor ring */
2053 memset(tx_ring->desc, 0, tx_ring->size);
2055 tx_ring->next_to_use = 0;
2056 tx_ring->next_to_clean = 0;
2058 writel(0, adapter->hw.hw_addr + tx_ring->head);
2059 writel(0, adapter->hw.hw_addr + tx_ring->tail);
2063 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
2064 * @adapter: board private structure
2066 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
2070 for (i = 0; i < adapter->num_tx_queues; i++)
2071 igb_clean_tx_ring(&adapter->tx_ring[i]);
2075 * igb_free_rx_resources - Free Rx Resources
2076 * @rx_ring: ring to clean the resources from
2078 * Free all receive software resources
2080 void igb_free_rx_resources(struct igb_ring *rx_ring)
2082 struct pci_dev *pdev = rx_ring->adapter->pdev;
2084 igb_clean_rx_ring(rx_ring);
2086 vfree(rx_ring->buffer_info);
2087 rx_ring->buffer_info = NULL;
2089 #ifdef CONFIG_IGB_LRO
2090 vfree(rx_ring->lro_mgr.lro_arr);
2091 rx_ring->lro_mgr.lro_arr = NULL;
2094 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2096 rx_ring->desc = NULL;
2100 * igb_free_all_rx_resources - Free Rx Resources for All Queues
2101 * @adapter: board private structure
2103 * Free all receive software resources
2105 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
2109 for (i = 0; i < adapter->num_rx_queues; i++)
2110 igb_free_rx_resources(&adapter->rx_ring[i]);
2114 * igb_clean_rx_ring - Free Rx Buffers per Queue
2115 * @rx_ring: ring to free buffers from
2117 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
2119 struct igb_adapter *adapter = rx_ring->adapter;
2120 struct igb_buffer *buffer_info;
2121 struct pci_dev *pdev = adapter->pdev;
2125 if (!rx_ring->buffer_info)
2127 /* Free all the Rx ring sk_buffs */
2128 for (i = 0; i < rx_ring->count; i++) {
2129 buffer_info = &rx_ring->buffer_info[i];
2130 if (buffer_info->dma) {
2131 if (adapter->rx_ps_hdr_size)
2132 pci_unmap_single(pdev, buffer_info->dma,
2133 adapter->rx_ps_hdr_size,
2134 PCI_DMA_FROMDEVICE);
2136 pci_unmap_single(pdev, buffer_info->dma,
2137 adapter->rx_buffer_len,
2138 PCI_DMA_FROMDEVICE);
2139 buffer_info->dma = 0;
2142 if (buffer_info->skb) {
2143 dev_kfree_skb(buffer_info->skb);
2144 buffer_info->skb = NULL;
2146 if (buffer_info->page) {
2147 if (buffer_info->page_dma)
2148 pci_unmap_page(pdev, buffer_info->page_dma,
2150 PCI_DMA_FROMDEVICE);
2151 put_page(buffer_info->page);
2152 buffer_info->page = NULL;
2153 buffer_info->page_dma = 0;
2154 buffer_info->page_offset = 0;
2158 size = sizeof(struct igb_buffer) * rx_ring->count;
2159 memset(rx_ring->buffer_info, 0, size);
2161 /* Zero out the descriptor ring */
2162 memset(rx_ring->desc, 0, rx_ring->size);
2164 rx_ring->next_to_clean = 0;
2165 rx_ring->next_to_use = 0;
2167 writel(0, adapter->hw.hw_addr + rx_ring->head);
2168 writel(0, adapter->hw.hw_addr + rx_ring->tail);
2172 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
2173 * @adapter: board private structure
2175 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
2179 for (i = 0; i < adapter->num_rx_queues; i++)
2180 igb_clean_rx_ring(&adapter->rx_ring[i]);
2184 * igb_set_mac - Change the Ethernet Address of the NIC
2185 * @netdev: network interface device structure
2186 * @p: pointer to an address structure
2188 * Returns 0 on success, negative on failure
2190 static int igb_set_mac(struct net_device *netdev, void *p)
2192 struct igb_adapter *adapter = netdev_priv(netdev);
2193 struct sockaddr *addr = p;
2195 if (!is_valid_ether_addr(addr->sa_data))
2196 return -EADDRNOTAVAIL;
2198 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2199 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
2201 adapter->hw.mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
2207 * igb_set_multi - Multicast and Promiscuous mode set
2208 * @netdev: network interface device structure
2210 * The set_multi entry point is called whenever the multicast address
2211 * list or the network interface flags are updated. This routine is
2212 * responsible for configuring the hardware for proper multicast,
2213 * promiscuous mode, and all-multi behavior.
2215 static void igb_set_multi(struct net_device *netdev)
2217 struct igb_adapter *adapter = netdev_priv(netdev);
2218 struct e1000_hw *hw = &adapter->hw;
2219 struct e1000_mac_info *mac = &hw->mac;
2220 struct dev_mc_list *mc_ptr;
2225 /* Check for Promiscuous and All Multicast modes */
2227 rctl = rd32(E1000_RCTL);
2229 if (netdev->flags & IFF_PROMISC) {
2230 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2231 rctl &= ~E1000_RCTL_VFE;
2233 if (netdev->flags & IFF_ALLMULTI) {
2234 rctl |= E1000_RCTL_MPE;
2235 rctl &= ~E1000_RCTL_UPE;
2237 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2238 rctl |= E1000_RCTL_VFE;
2240 wr32(E1000_RCTL, rctl);
2242 if (!netdev->mc_count) {
2243 /* nothing to program, so clear mc list */
2244 igb_update_mc_addr_list_82575(hw, NULL, 0, 1,
2245 mac->rar_entry_count);
2249 mta_list = kzalloc(netdev->mc_count * 6, GFP_ATOMIC);
2253 /* The shared function expects a packed array of only addresses. */
2254 mc_ptr = netdev->mc_list;
2256 for (i = 0; i < netdev->mc_count; i++) {
2259 memcpy(mta_list + (i*ETH_ALEN), mc_ptr->dmi_addr, ETH_ALEN);
2260 mc_ptr = mc_ptr->next;
2262 igb_update_mc_addr_list_82575(hw, mta_list, i, 1,
2263 mac->rar_entry_count);
2267 /* Need to wait a few seconds after link up to get diagnostic information from
2269 static void igb_update_phy_info(unsigned long data)
2271 struct igb_adapter *adapter = (struct igb_adapter *) data;
2272 igb_get_phy_info(&adapter->hw);
2276 * igb_watchdog - Timer Call-back
2277 * @data: pointer to adapter cast into an unsigned long
2279 static void igb_watchdog(unsigned long data)
2281 struct igb_adapter *adapter = (struct igb_adapter *)data;
2282 /* Do the rest outside of interrupt context */
2283 schedule_work(&adapter->watchdog_task);
2286 static void igb_watchdog_task(struct work_struct *work)
2288 struct igb_adapter *adapter = container_of(work,
2289 struct igb_adapter, watchdog_task);
2290 struct e1000_hw *hw = &adapter->hw;
2292 struct net_device *netdev = adapter->netdev;
2293 struct igb_ring *tx_ring = adapter->tx_ring;
2294 struct e1000_mac_info *mac = &adapter->hw.mac;
2300 if ((netif_carrier_ok(netdev)) &&
2301 (rd32(E1000_STATUS) & E1000_STATUS_LU))
2304 ret_val = hw->mac.ops.check_for_link(&adapter->hw);
2305 if ((ret_val == E1000_ERR_PHY) &&
2306 (hw->phy.type == e1000_phy_igp_3) &&
2308 E1000_PHY_CTRL_GBE_DISABLE))
2309 dev_info(&adapter->pdev->dev,
2310 "Gigabit has been disabled, downgrading speed\n");
2312 if ((hw->phy.media_type == e1000_media_type_internal_serdes) &&
2313 !(rd32(E1000_TXCW) & E1000_TXCW_ANE))
2314 link = mac->serdes_has_link;
2316 link = rd32(E1000_STATUS) &
2320 if (!netif_carrier_ok(netdev)) {
2322 hw->mac.ops.get_speed_and_duplex(&adapter->hw,
2323 &adapter->link_speed,
2324 &adapter->link_duplex);
2326 ctrl = rd32(E1000_CTRL);
2327 dev_info(&adapter->pdev->dev,
2328 "NIC Link is Up %d Mbps %s, "
2329 "Flow Control: %s\n",
2330 adapter->link_speed,
2331 adapter->link_duplex == FULL_DUPLEX ?
2332 "Full Duplex" : "Half Duplex",
2333 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2334 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2335 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2336 E1000_CTRL_TFCE) ? "TX" : "None")));
2338 /* tweak tx_queue_len according to speed/duplex and
2339 * adjust the timeout factor */
2340 netdev->tx_queue_len = adapter->tx_queue_len;
2341 adapter->tx_timeout_factor = 1;
2342 switch (adapter->link_speed) {
2344 netdev->tx_queue_len = 10;
2345 adapter->tx_timeout_factor = 14;
2348 netdev->tx_queue_len = 100;
2349 /* maybe add some timeout factor ? */
2353 netif_carrier_on(netdev);
2354 netif_tx_wake_all_queues(netdev);
2356 if (!test_bit(__IGB_DOWN, &adapter->state))
2357 mod_timer(&adapter->phy_info_timer,
2358 round_jiffies(jiffies + 2 * HZ));
2361 if (netif_carrier_ok(netdev)) {
2362 adapter->link_speed = 0;
2363 adapter->link_duplex = 0;
2364 dev_info(&adapter->pdev->dev, "NIC Link is Down\n");
2365 netif_carrier_off(netdev);
2366 netif_tx_stop_all_queues(netdev);
2367 if (!test_bit(__IGB_DOWN, &adapter->state))
2368 mod_timer(&adapter->phy_info_timer,
2369 round_jiffies(jiffies + 2 * HZ));
2374 igb_update_stats(adapter);
2376 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2377 adapter->tpt_old = adapter->stats.tpt;
2378 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
2379 adapter->colc_old = adapter->stats.colc;
2381 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
2382 adapter->gorc_old = adapter->stats.gorc;
2383 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
2384 adapter->gotc_old = adapter->stats.gotc;
2386 igb_update_adaptive(&adapter->hw);
2388 if (!netif_carrier_ok(netdev)) {
2389 if (IGB_DESC_UNUSED(tx_ring) + 1 < tx_ring->count) {
2390 /* We've lost link, so the controller stops DMA,
2391 * but we've got queued Tx work that's never going
2392 * to get done, so reset controller to flush Tx.
2393 * (Do the reset outside of interrupt context). */
2394 adapter->tx_timeout_count++;
2395 schedule_work(&adapter->reset_task);
2399 /* Cause software interrupt to ensure rx ring is cleaned */
2400 if (adapter->msix_entries) {
2401 for (i = 0; i < adapter->num_rx_queues; i++)
2402 eics |= adapter->rx_ring[i].eims_value;
2403 wr32(E1000_EICS, eics);
2405 wr32(E1000_ICS, E1000_ICS_RXDMT0);
2408 /* Force detection of hung controller every watchdog period */
2409 tx_ring->detect_tx_hung = true;
2411 /* Reset the timer */
2412 if (!test_bit(__IGB_DOWN, &adapter->state))
2413 mod_timer(&adapter->watchdog_timer,
2414 round_jiffies(jiffies + 2 * HZ));
2417 enum latency_range {
2421 latency_invalid = 255
2426 * igb_update_ring_itr - update the dynamic ITR value based on packet size
2428 * Stores a new ITR value based on strictly on packet size. This
2429 * algorithm is less sophisticated than that used in igb_update_itr,
2430 * due to the difficulty of synchronizing statistics across multiple
2431 * receive rings. The divisors and thresholds used by this fuction
2432 * were determined based on theoretical maximum wire speed and testing
2433 * data, in order to minimize response time while increasing bulk
2435 * This functionality is controlled by the InterruptThrottleRate module
2436 * parameter (see igb_param.c)
2437 * NOTE: This function is called only when operating in a multiqueue
2438 * receive environment.
2439 * @rx_ring: pointer to ring
2441 static void igb_update_ring_itr(struct igb_ring *rx_ring)
2443 int new_val = rx_ring->itr_val;
2444 int avg_wire_size = 0;
2445 struct igb_adapter *adapter = rx_ring->adapter;
2447 if (!rx_ring->total_packets)
2448 goto clear_counts; /* no packets, so don't do anything */
2450 /* For non-gigabit speeds, just fix the interrupt rate at 4000
2451 * ints/sec - ITR timer value of 120 ticks.
2453 if (adapter->link_speed != SPEED_1000) {
2457 avg_wire_size = rx_ring->total_bytes / rx_ring->total_packets;
2459 /* Add 24 bytes to size to account for CRC, preamble, and gap */
2460 avg_wire_size += 24;
2462 /* Don't starve jumbo frames */
2463 avg_wire_size = min(avg_wire_size, 3000);
2465 /* Give a little boost to mid-size frames */
2466 if ((avg_wire_size > 300) && (avg_wire_size < 1200))
2467 new_val = avg_wire_size / 3;
2469 new_val = avg_wire_size / 2;
2472 if (new_val != rx_ring->itr_val) {
2473 rx_ring->itr_val = new_val;
2474 rx_ring->set_itr = 1;
2477 rx_ring->total_bytes = 0;
2478 rx_ring->total_packets = 0;
2482 * igb_update_itr - update the dynamic ITR value based on statistics
2483 * Stores a new ITR value based on packets and byte
2484 * counts during the last interrupt. The advantage of per interrupt
2485 * computation is faster updates and more accurate ITR for the current
2486 * traffic pattern. Constants in this function were computed
2487 * based on theoretical maximum wire speed and thresholds were set based
2488 * on testing data as well as attempting to minimize response time
2489 * while increasing bulk throughput.
2490 * this functionality is controlled by the InterruptThrottleRate module
2491 * parameter (see igb_param.c)
2492 * NOTE: These calculations are only valid when operating in a single-
2493 * queue environment.
2494 * @adapter: pointer to adapter
2495 * @itr_setting: current adapter->itr
2496 * @packets: the number of packets during this measurement interval
2497 * @bytes: the number of bytes during this measurement interval
2499 static unsigned int igb_update_itr(struct igb_adapter *adapter, u16 itr_setting,
2500 int packets, int bytes)
2502 unsigned int retval = itr_setting;
2505 goto update_itr_done;
2507 switch (itr_setting) {
2508 case lowest_latency:
2509 /* handle TSO and jumbo frames */
2510 if (bytes/packets > 8000)
2511 retval = bulk_latency;
2512 else if ((packets < 5) && (bytes > 512))
2513 retval = low_latency;
2515 case low_latency: /* 50 usec aka 20000 ints/s */
2516 if (bytes > 10000) {
2517 /* this if handles the TSO accounting */
2518 if (bytes/packets > 8000) {
2519 retval = bulk_latency;
2520 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
2521 retval = bulk_latency;
2522 } else if ((packets > 35)) {
2523 retval = lowest_latency;
2525 } else if (bytes/packets > 2000) {
2526 retval = bulk_latency;
2527 } else if (packets <= 2 && bytes < 512) {
2528 retval = lowest_latency;
2531 case bulk_latency: /* 250 usec aka 4000 ints/s */
2532 if (bytes > 25000) {
2534 retval = low_latency;
2535 } else if (bytes < 6000) {
2536 retval = low_latency;
2545 static void igb_set_itr(struct igb_adapter *adapter)
2548 u32 new_itr = adapter->itr;
2550 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2551 if (adapter->link_speed != SPEED_1000) {
2557 adapter->rx_itr = igb_update_itr(adapter,
2559 adapter->rx_ring->total_packets,
2560 adapter->rx_ring->total_bytes);
2562 if (adapter->rx_ring->buddy) {
2563 adapter->tx_itr = igb_update_itr(adapter,
2565 adapter->tx_ring->total_packets,
2566 adapter->tx_ring->total_bytes);
2568 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2570 current_itr = adapter->rx_itr;
2573 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2574 if (adapter->itr_setting == 3 &&
2575 current_itr == lowest_latency)
2576 current_itr = low_latency;
2578 switch (current_itr) {
2579 /* counts and packets in update_itr are dependent on these numbers */
2580 case lowest_latency:
2584 new_itr = 20000; /* aka hwitr = ~200 */
2594 adapter->rx_ring->total_bytes = 0;
2595 adapter->rx_ring->total_packets = 0;
2596 if (adapter->rx_ring->buddy) {
2597 adapter->rx_ring->buddy->total_bytes = 0;
2598 adapter->rx_ring->buddy->total_packets = 0;
2601 if (new_itr != adapter->itr) {
2602 /* this attempts to bias the interrupt rate towards Bulk
2603 * by adding intermediate steps when interrupt rate is
2605 new_itr = new_itr > adapter->itr ?
2606 min(adapter->itr + (new_itr >> 2), new_itr) :
2608 /* Don't write the value here; it resets the adapter's
2609 * internal timer, and causes us to delay far longer than
2610 * we should between interrupts. Instead, we write the ITR
2611 * value at the beginning of the next interrupt so the timing
2612 * ends up being correct.
2614 adapter->itr = new_itr;
2615 adapter->rx_ring->itr_val = 1000000000 / (new_itr * 256);
2616 adapter->rx_ring->set_itr = 1;
2623 #define IGB_TX_FLAGS_CSUM 0x00000001
2624 #define IGB_TX_FLAGS_VLAN 0x00000002
2625 #define IGB_TX_FLAGS_TSO 0x00000004
2626 #define IGB_TX_FLAGS_IPV4 0x00000008
2627 #define IGB_TX_FLAGS_VLAN_MASK 0xffff0000
2628 #define IGB_TX_FLAGS_VLAN_SHIFT 16
2630 static inline int igb_tso_adv(struct igb_adapter *adapter,
2631 struct igb_ring *tx_ring,
2632 struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
2634 struct e1000_adv_tx_context_desc *context_desc;
2637 struct igb_buffer *buffer_info;
2638 u32 info = 0, tu_cmd = 0;
2639 u32 mss_l4len_idx, l4len;
2642 if (skb_header_cloned(skb)) {
2643 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2648 l4len = tcp_hdrlen(skb);
2651 if (skb->protocol == htons(ETH_P_IP)) {
2652 struct iphdr *iph = ip_hdr(skb);
2655 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2659 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
2660 ipv6_hdr(skb)->payload_len = 0;
2661 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2662 &ipv6_hdr(skb)->daddr,
2666 i = tx_ring->next_to_use;
2668 buffer_info = &tx_ring->buffer_info[i];
2669 context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2670 /* VLAN MACLEN IPLEN */
2671 if (tx_flags & IGB_TX_FLAGS_VLAN)
2672 info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2673 info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2674 *hdr_len += skb_network_offset(skb);
2675 info |= skb_network_header_len(skb);
2676 *hdr_len += skb_network_header_len(skb);
2677 context_desc->vlan_macip_lens = cpu_to_le32(info);
2679 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2680 tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2682 if (skb->protocol == htons(ETH_P_IP))
2683 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
2684 tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2686 context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2689 mss_l4len_idx = (skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT);
2690 mss_l4len_idx |= (l4len << E1000_ADVTXD_L4LEN_SHIFT);
2692 /* Context index must be unique per ring. */
2693 if (adapter->flags & IGB_FLAG_NEED_CTX_IDX)
2694 mss_l4len_idx |= tx_ring->queue_index << 4;
2696 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2697 context_desc->seqnum_seed = 0;
2699 buffer_info->time_stamp = jiffies;
2700 buffer_info->dma = 0;
2702 if (i == tx_ring->count)
2705 tx_ring->next_to_use = i;
2710 static inline bool igb_tx_csum_adv(struct igb_adapter *adapter,
2711 struct igb_ring *tx_ring,
2712 struct sk_buff *skb, u32 tx_flags)
2714 struct e1000_adv_tx_context_desc *context_desc;
2716 struct igb_buffer *buffer_info;
2717 u32 info = 0, tu_cmd = 0;
2719 if ((skb->ip_summed == CHECKSUM_PARTIAL) ||
2720 (tx_flags & IGB_TX_FLAGS_VLAN)) {
2721 i = tx_ring->next_to_use;
2722 buffer_info = &tx_ring->buffer_info[i];
2723 context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2725 if (tx_flags & IGB_TX_FLAGS_VLAN)
2726 info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2727 info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2728 if (skb->ip_summed == CHECKSUM_PARTIAL)
2729 info |= skb_network_header_len(skb);
2731 context_desc->vlan_macip_lens = cpu_to_le32(info);
2733 tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2735 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2736 switch (skb->protocol) {
2737 case __constant_htons(ETH_P_IP):
2738 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
2739 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2740 tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2742 case __constant_htons(ETH_P_IPV6):
2743 /* XXX what about other V6 headers?? */
2744 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2745 tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2748 if (unlikely(net_ratelimit()))
2749 dev_warn(&adapter->pdev->dev,
2750 "partial checksum but proto=%x!\n",
2756 context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2757 context_desc->seqnum_seed = 0;
2758 if (adapter->flags & IGB_FLAG_NEED_CTX_IDX)
2759 context_desc->mss_l4len_idx =
2760 cpu_to_le32(tx_ring->queue_index << 4);
2762 buffer_info->time_stamp = jiffies;
2763 buffer_info->dma = 0;
2766 if (i == tx_ring->count)
2768 tx_ring->next_to_use = i;
2777 #define IGB_MAX_TXD_PWR 16
2778 #define IGB_MAX_DATA_PER_TXD (1<<IGB_MAX_TXD_PWR)
2780 static inline int igb_tx_map_adv(struct igb_adapter *adapter,
2781 struct igb_ring *tx_ring,
2782 struct sk_buff *skb)
2784 struct igb_buffer *buffer_info;
2785 unsigned int len = skb_headlen(skb);
2786 unsigned int count = 0, i;
2789 i = tx_ring->next_to_use;
2791 buffer_info = &tx_ring->buffer_info[i];
2792 BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2793 buffer_info->length = len;
2794 /* set time_stamp *before* dma to help avoid a possible race */
2795 buffer_info->time_stamp = jiffies;
2796 buffer_info->dma = pci_map_single(adapter->pdev, skb->data, len,
2800 if (i == tx_ring->count)
2803 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) {
2804 struct skb_frag_struct *frag;
2806 frag = &skb_shinfo(skb)->frags[f];
2809 buffer_info = &tx_ring->buffer_info[i];
2810 BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2811 buffer_info->length = len;
2812 buffer_info->time_stamp = jiffies;
2813 buffer_info->dma = pci_map_page(adapter->pdev,
2821 if (i == tx_ring->count)
2825 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2826 tx_ring->buffer_info[i].skb = skb;
2831 static inline void igb_tx_queue_adv(struct igb_adapter *adapter,
2832 struct igb_ring *tx_ring,
2833 int tx_flags, int count, u32 paylen,
2836 union e1000_adv_tx_desc *tx_desc = NULL;
2837 struct igb_buffer *buffer_info;
2838 u32 olinfo_status = 0, cmd_type_len;
2841 cmd_type_len = (E1000_ADVTXD_DTYP_DATA | E1000_ADVTXD_DCMD_IFCS |
2842 E1000_ADVTXD_DCMD_DEXT);
2844 if (tx_flags & IGB_TX_FLAGS_VLAN)
2845 cmd_type_len |= E1000_ADVTXD_DCMD_VLE;
2847 if (tx_flags & IGB_TX_FLAGS_TSO) {
2848 cmd_type_len |= E1000_ADVTXD_DCMD_TSE;
2850 /* insert tcp checksum */
2851 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2853 /* insert ip checksum */
2854 if (tx_flags & IGB_TX_FLAGS_IPV4)
2855 olinfo_status |= E1000_TXD_POPTS_IXSM << 8;
2857 } else if (tx_flags & IGB_TX_FLAGS_CSUM) {
2858 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2861 if ((adapter->flags & IGB_FLAG_NEED_CTX_IDX) &&
2862 (tx_flags & (IGB_TX_FLAGS_CSUM | IGB_TX_FLAGS_TSO |
2863 IGB_TX_FLAGS_VLAN)))
2864 olinfo_status |= tx_ring->queue_index << 4;
2866 olinfo_status |= ((paylen - hdr_len) << E1000_ADVTXD_PAYLEN_SHIFT);
2868 i = tx_ring->next_to_use;
2870 buffer_info = &tx_ring->buffer_info[i];
2871 tx_desc = E1000_TX_DESC_ADV(*tx_ring, i);
2872 tx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
2873 tx_desc->read.cmd_type_len =
2874 cpu_to_le32(cmd_type_len | buffer_info->length);
2875 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
2877 if (i == tx_ring->count)
2881 tx_desc->read.cmd_type_len |= cpu_to_le32(adapter->txd_cmd);
2882 /* Force memory writes to complete before letting h/w
2883 * know there are new descriptors to fetch. (Only
2884 * applicable for weak-ordered memory model archs,
2885 * such as IA-64). */
2888 tx_ring->next_to_use = i;
2889 writel(i, adapter->hw.hw_addr + tx_ring->tail);
2890 /* we need this if more than one processor can write to our tail
2891 * at a time, it syncronizes IO on IA64/Altix systems */
2895 static int __igb_maybe_stop_tx(struct net_device *netdev,
2896 struct igb_ring *tx_ring, int size)
2898 struct igb_adapter *adapter = netdev_priv(netdev);
2900 netif_stop_subqueue(netdev, tx_ring->queue_index);
2902 /* Herbert's original patch had:
2903 * smp_mb__after_netif_stop_queue();
2904 * but since that doesn't exist yet, just open code it. */
2907 /* We need to check again in a case another CPU has just
2908 * made room available. */
2909 if (IGB_DESC_UNUSED(tx_ring) < size)
2913 netif_wake_subqueue(netdev, tx_ring->queue_index);
2914 ++adapter->restart_queue;
2918 static int igb_maybe_stop_tx(struct net_device *netdev,
2919 struct igb_ring *tx_ring, int size)
2921 if (IGB_DESC_UNUSED(tx_ring) >= size)
2923 return __igb_maybe_stop_tx(netdev, tx_ring, size);
2926 #define TXD_USE_COUNT(S) (((S) >> (IGB_MAX_TXD_PWR)) + 1)
2928 static int igb_xmit_frame_ring_adv(struct sk_buff *skb,
2929 struct net_device *netdev,
2930 struct igb_ring *tx_ring)
2932 struct igb_adapter *adapter = netdev_priv(netdev);
2933 unsigned int tx_flags = 0;
2938 len = skb_headlen(skb);
2940 if (test_bit(__IGB_DOWN, &adapter->state)) {
2941 dev_kfree_skb_any(skb);
2942 return NETDEV_TX_OK;
2945 if (skb->len <= 0) {
2946 dev_kfree_skb_any(skb);
2947 return NETDEV_TX_OK;
2950 /* need: 1 descriptor per page,
2951 * + 2 desc gap to keep tail from touching head,
2952 * + 1 desc for skb->data,
2953 * + 1 desc for context descriptor,
2954 * otherwise try next time */
2955 if (igb_maybe_stop_tx(netdev, tx_ring, skb_shinfo(skb)->nr_frags + 4)) {
2956 /* this is a hard error */
2957 return NETDEV_TX_BUSY;
2961 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
2962 tx_flags |= IGB_TX_FLAGS_VLAN;
2963 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
2966 if (skb->protocol == htons(ETH_P_IP))
2967 tx_flags |= IGB_TX_FLAGS_IPV4;
2969 tso = skb_is_gso(skb) ? igb_tso_adv(adapter, tx_ring, skb, tx_flags,
2973 dev_kfree_skb_any(skb);
2974 return NETDEV_TX_OK;
2978 tx_flags |= IGB_TX_FLAGS_TSO;
2979 else if (igb_tx_csum_adv(adapter, tx_ring, skb, tx_flags))
2980 if (skb->ip_summed == CHECKSUM_PARTIAL)
2981 tx_flags |= IGB_TX_FLAGS_CSUM;
2983 igb_tx_queue_adv(adapter, tx_ring, tx_flags,
2984 igb_tx_map_adv(adapter, tx_ring, skb),
2987 netdev->trans_start = jiffies;
2989 /* Make sure there is space in the ring for the next send. */
2990 igb_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 4);
2992 return NETDEV_TX_OK;
2995 static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *netdev)
2997 struct igb_adapter *adapter = netdev_priv(netdev);
2998 struct igb_ring *tx_ring;
3001 r_idx = skb->queue_mapping & (IGB_MAX_TX_QUEUES - 1);
3002 tx_ring = adapter->multi_tx_table[r_idx];
3004 /* This goes back to the question of how to logically map a tx queue
3005 * to a flow. Right now, performance is impacted slightly negatively
3006 * if using multiple tx queues. If the stack breaks away from a
3007 * single qdisc implementation, we can look at this again. */
3008 return (igb_xmit_frame_ring_adv(skb, netdev, tx_ring));
3012 * igb_tx_timeout - Respond to a Tx Hang
3013 * @netdev: network interface device structure
3015 static void igb_tx_timeout(struct net_device *netdev)
3017 struct igb_adapter *adapter = netdev_priv(netdev);
3018 struct e1000_hw *hw = &adapter->hw;
3020 /* Do the reset outside of interrupt context */
3021 adapter->tx_timeout_count++;
3022 schedule_work(&adapter->reset_task);
3023 wr32(E1000_EICS, adapter->eims_enable_mask &
3024 ~(E1000_EIMS_TCP_TIMER | E1000_EIMS_OTHER));
3027 static void igb_reset_task(struct work_struct *work)
3029 struct igb_adapter *adapter;
3030 adapter = container_of(work, struct igb_adapter, reset_task);
3032 igb_reinit_locked(adapter);
3036 * igb_get_stats - Get System Network Statistics
3037 * @netdev: network interface device structure
3039 * Returns the address of the device statistics structure.
3040 * The statistics are actually updated from the timer callback.
3042 static struct net_device_stats *
3043 igb_get_stats(struct net_device *netdev)
3045 struct igb_adapter *adapter = netdev_priv(netdev);
3047 /* only return the current stats */
3048 return &adapter->net_stats;
3052 * igb_change_mtu - Change the Maximum Transfer Unit
3053 * @netdev: network interface device structure
3054 * @new_mtu: new value for maximum frame size
3056 * Returns 0 on success, negative on failure
3058 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
3060 struct igb_adapter *adapter = netdev_priv(netdev);
3061 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
3063 if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
3064 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3065 dev_err(&adapter->pdev->dev, "Invalid MTU setting\n");
3069 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3070 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3071 dev_err(&adapter->pdev->dev, "MTU > 9216 not supported.\n");
3075 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
3077 /* igb_down has a dependency on max_frame_size */
3078 adapter->max_frame_size = max_frame;
3079 if (netif_running(netdev))
3082 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3083 * means we reserve 2 more, this pushes us to allocate from the next
3085 * i.e. RXBUFFER_2048 --> size-4096 slab
3088 if (max_frame <= IGB_RXBUFFER_256)
3089 adapter->rx_buffer_len = IGB_RXBUFFER_256;
3090 else if (max_frame <= IGB_RXBUFFER_512)
3091 adapter->rx_buffer_len = IGB_RXBUFFER_512;
3092 else if (max_frame <= IGB_RXBUFFER_1024)
3093 adapter->rx_buffer_len = IGB_RXBUFFER_1024;
3094 else if (max_frame <= IGB_RXBUFFER_2048)
3095 adapter->rx_buffer_len = IGB_RXBUFFER_2048;
3097 #if (PAGE_SIZE / 2) > IGB_RXBUFFER_16384
3098 adapter->rx_buffer_len = IGB_RXBUFFER_16384;
3100 adapter->rx_buffer_len = PAGE_SIZE / 2;
3102 /* adjust allocation if LPE protects us, and we aren't using SBP */
3103 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
3104 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE))
3105 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3107 dev_info(&adapter->pdev->dev, "changing MTU from %d to %d\n",
3108 netdev->mtu, new_mtu);
3109 netdev->mtu = new_mtu;
3111 if (netif_running(netdev))
3116 clear_bit(__IGB_RESETTING, &adapter->state);
3122 * igb_update_stats - Update the board statistics counters
3123 * @adapter: board private structure
3126 void igb_update_stats(struct igb_adapter *adapter)
3128 struct e1000_hw *hw = &adapter->hw;
3129 struct pci_dev *pdev = adapter->pdev;
3132 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3135 * Prevent stats update while adapter is being reset, or if the pci
3136 * connection is down.
3138 if (adapter->link_speed == 0)
3140 if (pci_channel_offline(pdev))
3143 adapter->stats.crcerrs += rd32(E1000_CRCERRS);
3144 adapter->stats.gprc += rd32(E1000_GPRC);
3145 adapter->stats.gorc += rd32(E1000_GORCL);
3146 rd32(E1000_GORCH); /* clear GORCL */
3147 adapter->stats.bprc += rd32(E1000_BPRC);
3148 adapter->stats.mprc += rd32(E1000_MPRC);
3149 adapter->stats.roc += rd32(E1000_ROC);
3151 adapter->stats.prc64 += rd32(E1000_PRC64);
3152 adapter->stats.prc127 += rd32(E1000_PRC127);
3153 adapter->stats.prc255 += rd32(E1000_PRC255);
3154 adapter->stats.prc511 += rd32(E1000_PRC511);
3155 adapter->stats.prc1023 += rd32(E1000_PRC1023);
3156 adapter->stats.prc1522 += rd32(E1000_PRC1522);
3157 adapter->stats.symerrs += rd32(E1000_SYMERRS);
3158 adapter->stats.sec += rd32(E1000_SEC);
3160 adapter->stats.mpc += rd32(E1000_MPC);
3161 adapter->stats.scc += rd32(E1000_SCC);
3162 adapter->stats.ecol += rd32(E1000_ECOL);
3163 adapter->stats.mcc += rd32(E1000_MCC);
3164 adapter->stats.latecol += rd32(E1000_LATECOL);
3165 adapter->stats.dc += rd32(E1000_DC);
3166 adapter->stats.rlec += rd32(E1000_RLEC);
3167 adapter->stats.xonrxc += rd32(E1000_XONRXC);
3168 adapter->stats.xontxc += rd32(E1000_XONTXC);
3169 adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
3170 adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
3171 adapter->stats.fcruc += rd32(E1000_FCRUC);
3172 adapter->stats.gptc += rd32(E1000_GPTC);
3173 adapter->stats.gotc += rd32(E1000_GOTCL);
3174 rd32(E1000_GOTCH); /* clear GOTCL */
3175 adapter->stats.rnbc += rd32(E1000_RNBC);
3176 adapter->stats.ruc += rd32(E1000_RUC);
3177 adapter->stats.rfc += rd32(E1000_RFC);
3178 adapter->stats.rjc += rd32(E1000_RJC);
3179 adapter->stats.tor += rd32(E1000_TORH);
3180 adapter->stats.tot += rd32(E1000_TOTH);
3181 adapter->stats.tpr += rd32(E1000_TPR);
3183 adapter->stats.ptc64 += rd32(E1000_PTC64);
3184 adapter->stats.ptc127 += rd32(E1000_PTC127);
3185 adapter->stats.ptc255 += rd32(E1000_PTC255);
3186 adapter->stats.ptc511 += rd32(E1000_PTC511);
3187 adapter->stats.ptc1023 += rd32(E1000_PTC1023);
3188 adapter->stats.ptc1522 += rd32(E1000_PTC1522);
3190 adapter->stats.mptc += rd32(E1000_MPTC);
3191 adapter->stats.bptc += rd32(E1000_BPTC);
3193 /* used for adaptive IFS */
3195 hw->mac.tx_packet_delta = rd32(E1000_TPT);
3196 adapter->stats.tpt += hw->mac.tx_packet_delta;
3197 hw->mac.collision_delta = rd32(E1000_COLC);
3198 adapter->stats.colc += hw->mac.collision_delta;
3200 adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
3201 adapter->stats.rxerrc += rd32(E1000_RXERRC);
3202 adapter->stats.tncrs += rd32(E1000_TNCRS);
3203 adapter->stats.tsctc += rd32(E1000_TSCTC);
3204 adapter->stats.tsctfc += rd32(E1000_TSCTFC);
3206 adapter->stats.iac += rd32(E1000_IAC);
3207 adapter->stats.icrxoc += rd32(E1000_ICRXOC);
3208 adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
3209 adapter->stats.icrxatc += rd32(E1000_ICRXATC);
3210 adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
3211 adapter->stats.ictxatc += rd32(E1000_ICTXATC);
3212 adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
3213 adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
3214 adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
3216 /* Fill out the OS statistics structure */
3217 adapter->net_stats.multicast = adapter->stats.mprc;
3218 adapter->net_stats.collisions = adapter->stats.colc;
3222 /* RLEC on some newer hardware can be incorrect so build
3223 * our own version based on RUC and ROC */
3224 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3225 adapter->stats.crcerrs + adapter->stats.algnerrc +
3226 adapter->stats.ruc + adapter->stats.roc +
3227 adapter->stats.cexterr;
3228 adapter->net_stats.rx_length_errors = adapter->stats.ruc +
3230 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3231 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3232 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3235 adapter->net_stats.tx_errors = adapter->stats.ecol +
3236 adapter->stats.latecol;
3237 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3238 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3239 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3241 /* Tx Dropped needs to be maintained elsewhere */
3244 if (hw->phy.media_type == e1000_media_type_copper) {
3245 if ((adapter->link_speed == SPEED_1000) &&
3246 (!igb_read_phy_reg(hw, PHY_1000T_STATUS,
3248 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3249 adapter->phy_stats.idle_errors += phy_tmp;
3253 /* Management Stats */
3254 adapter->stats.mgptc += rd32(E1000_MGTPTC);
3255 adapter->stats.mgprc += rd32(E1000_MGTPRC);
3256 adapter->stats.mgpdc += rd32(E1000_MGTPDC);
3260 static irqreturn_t igb_msix_other(int irq, void *data)
3262 struct net_device *netdev = data;
3263 struct igb_adapter *adapter = netdev_priv(netdev);
3264 struct e1000_hw *hw = &adapter->hw;
3265 u32 icr = rd32(E1000_ICR);
3267 /* reading ICR causes bit 31 of EICR to be cleared */
3268 if (!(icr & E1000_ICR_LSC))
3269 goto no_link_interrupt;
3270 hw->mac.get_link_status = 1;
3271 /* guard against interrupt when we're going down */
3272 if (!test_bit(__IGB_DOWN, &adapter->state))
3273 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3276 wr32(E1000_IMS, E1000_IMS_LSC);
3277 wr32(E1000_EIMS, adapter->eims_other);
3282 static irqreturn_t igb_msix_tx(int irq, void *data)
3284 struct igb_ring *tx_ring = data;
3285 struct igb_adapter *adapter = tx_ring->adapter;
3286 struct e1000_hw *hw = &adapter->hw;
3288 #ifdef CONFIG_IGB_DCA
3289 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3290 igb_update_tx_dca(tx_ring);
3292 tx_ring->total_bytes = 0;
3293 tx_ring->total_packets = 0;
3295 /* auto mask will automatically reenable the interrupt when we write
3297 if (!igb_clean_tx_irq(tx_ring))
3298 /* Ring was not completely cleaned, so fire another interrupt */
3299 wr32(E1000_EICS, tx_ring->eims_value);
3301 wr32(E1000_EIMS, tx_ring->eims_value);
3306 static void igb_write_itr(struct igb_ring *ring)
3308 struct e1000_hw *hw = &ring->adapter->hw;
3309 if ((ring->adapter->itr_setting & 3) && ring->set_itr) {
3310 switch (hw->mac.type) {
3312 wr32(ring->itr_register,
3317 wr32(ring->itr_register,
3319 (ring->itr_val << 16));
3326 static irqreturn_t igb_msix_rx(int irq, void *data)
3328 struct igb_ring *rx_ring = data;
3329 struct igb_adapter *adapter = rx_ring->adapter;
3331 /* Write the ITR value calculated at the end of the
3332 * previous interrupt.
3335 igb_write_itr(rx_ring);
3337 if (netif_rx_schedule_prep(adapter->netdev, &rx_ring->napi))
3338 __netif_rx_schedule(adapter->netdev, &rx_ring->napi);
3340 #ifdef CONFIG_IGB_DCA
3341 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3342 igb_update_rx_dca(rx_ring);
3347 #ifdef CONFIG_IGB_DCA
3348 static void igb_update_rx_dca(struct igb_ring *rx_ring)
3351 struct igb_adapter *adapter = rx_ring->adapter;
3352 struct e1000_hw *hw = &adapter->hw;
3353 int cpu = get_cpu();
3354 int q = rx_ring - adapter->rx_ring;
3356 if (rx_ring->cpu != cpu) {
3357 dca_rxctrl = rd32(E1000_DCA_RXCTRL(q));
3358 if (hw->mac.type == e1000_82576) {
3359 dca_rxctrl &= ~E1000_DCA_RXCTRL_CPUID_MASK_82576;
3360 dca_rxctrl |= dca_get_tag(cpu) <<
3361 E1000_DCA_RXCTRL_CPUID_SHIFT;
3363 dca_rxctrl &= ~E1000_DCA_RXCTRL_CPUID_MASK;
3364 dca_rxctrl |= dca_get_tag(cpu);
3366 dca_rxctrl |= E1000_DCA_RXCTRL_DESC_DCA_EN;
3367 dca_rxctrl |= E1000_DCA_RXCTRL_HEAD_DCA_EN;
3368 dca_rxctrl |= E1000_DCA_RXCTRL_DATA_DCA_EN;
3369 wr32(E1000_DCA_RXCTRL(q), dca_rxctrl);
3375 static void igb_update_tx_dca(struct igb_ring *tx_ring)
3378 struct igb_adapter *adapter = tx_ring->adapter;
3379 struct e1000_hw *hw = &adapter->hw;
3380 int cpu = get_cpu();
3381 int q = tx_ring - adapter->tx_ring;
3383 if (tx_ring->cpu != cpu) {
3384 dca_txctrl = rd32(E1000_DCA_TXCTRL(q));
3385 if (hw->mac.type == e1000_82576) {
3386 dca_txctrl &= ~E1000_DCA_TXCTRL_CPUID_MASK_82576;
3387 dca_txctrl |= dca_get_tag(cpu) <<
3388 E1000_DCA_TXCTRL_CPUID_SHIFT;
3390 dca_txctrl &= ~E1000_DCA_TXCTRL_CPUID_MASK;
3391 dca_txctrl |= dca_get_tag(cpu);
3393 dca_txctrl |= E1000_DCA_TXCTRL_DESC_DCA_EN;
3394 wr32(E1000_DCA_TXCTRL(q), dca_txctrl);
3400 static void igb_setup_dca(struct igb_adapter *adapter)
3404 if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
3407 for (i = 0; i < adapter->num_tx_queues; i++) {
3408 adapter->tx_ring[i].cpu = -1;
3409 igb_update_tx_dca(&adapter->tx_ring[i]);
3411 for (i = 0; i < adapter->num_rx_queues; i++) {
3412 adapter->rx_ring[i].cpu = -1;
3413 igb_update_rx_dca(&adapter->rx_ring[i]);
3417 static int __igb_notify_dca(struct device *dev, void *data)
3419 struct net_device *netdev = dev_get_drvdata(dev);
3420 struct igb_adapter *adapter = netdev_priv(netdev);
3421 struct e1000_hw *hw = &adapter->hw;
3422 unsigned long event = *(unsigned long *)data;
3424 if (!(adapter->flags & IGB_FLAG_HAS_DCA))
3428 case DCA_PROVIDER_ADD:
3429 /* if already enabled, don't do it again */
3430 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3432 adapter->flags |= IGB_FLAG_DCA_ENABLED;
3433 /* Always use CB2 mode, difference is masked
3434 * in the CB driver. */
3435 wr32(E1000_DCA_CTRL, 2);
3436 if (dca_add_requester(dev) == 0) {
3437 dev_info(&adapter->pdev->dev, "DCA enabled\n");
3438 igb_setup_dca(adapter);
3441 /* Fall Through since DCA is disabled. */
3442 case DCA_PROVIDER_REMOVE:
3443 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
3444 /* without this a class_device is left
3445 * hanging around in the sysfs model */
3446 dca_remove_requester(dev);
3447 dev_info(&adapter->pdev->dev, "DCA disabled\n");
3448 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
3449 wr32(E1000_DCA_CTRL, 1);
3457 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
3462 ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
3465 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
3467 #endif /* CONFIG_IGB_DCA */
3470 * igb_intr_msi - Interrupt Handler
3471 * @irq: interrupt number
3472 * @data: pointer to a network interface device structure
3474 static irqreturn_t igb_intr_msi(int irq, void *data)
3476 struct net_device *netdev = data;
3477 struct igb_adapter *adapter = netdev_priv(netdev);
3478 struct e1000_hw *hw = &adapter->hw;
3479 /* read ICR disables interrupts using IAM */
3480 u32 icr = rd32(E1000_ICR);
3482 igb_write_itr(adapter->rx_ring);
3484 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3485 hw->mac.get_link_status = 1;
3486 if (!test_bit(__IGB_DOWN, &adapter->state))
3487 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3490 netif_rx_schedule(netdev, &adapter->rx_ring[0].napi);
3496 * igb_intr - Interrupt Handler
3497 * @irq: interrupt number
3498 * @data: pointer to a network interface device structure
3500 static irqreturn_t igb_intr(int irq, void *data)
3502 struct net_device *netdev = data;
3503 struct igb_adapter *adapter = netdev_priv(netdev);
3504 struct e1000_hw *hw = &adapter->hw;
3505 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
3506 * need for the IMC write */
3507 u32 icr = rd32(E1000_ICR);
3510 return IRQ_NONE; /* Not our interrupt */
3512 igb_write_itr(adapter->rx_ring);
3514 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3515 * not set, then the adapter didn't send an interrupt */
3516 if (!(icr & E1000_ICR_INT_ASSERTED))
3519 eicr = rd32(E1000_EICR);
3521 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3522 hw->mac.get_link_status = 1;
3523 /* guard against interrupt when we're going down */
3524 if (!test_bit(__IGB_DOWN, &adapter->state))
3525 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3528 netif_rx_schedule(netdev, &adapter->rx_ring[0].napi);
3534 * igb_poll - NAPI Rx polling callback
3535 * @napi: napi polling structure
3536 * @budget: count of how many packets we should handle
3538 static int igb_poll(struct napi_struct *napi, int budget)
3540 struct igb_ring *rx_ring = container_of(napi, struct igb_ring, napi);
3541 struct igb_adapter *adapter = rx_ring->adapter;
3542 struct net_device *netdev = adapter->netdev;
3543 int tx_clean_complete, work_done = 0;
3545 /* this poll routine only supports one tx and one rx queue */
3546 #ifdef CONFIG_IGB_DCA
3547 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3548 igb_update_tx_dca(&adapter->tx_ring[0]);
3550 tx_clean_complete = igb_clean_tx_irq(&adapter->tx_ring[0]);
3552 #ifdef CONFIG_IGB_DCA
3553 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3554 igb_update_rx_dca(&adapter->rx_ring[0]);
3556 igb_clean_rx_irq_adv(&adapter->rx_ring[0], &work_done, budget);
3558 /* If no Tx and not enough Rx work done, exit the polling mode */
3559 if ((tx_clean_complete && (work_done < budget)) ||
3560 !netif_running(netdev)) {
3561 if (adapter->itr_setting & 3)
3562 igb_set_itr(adapter);
3563 netif_rx_complete(netdev, napi);
3564 if (!test_bit(__IGB_DOWN, &adapter->state))
3565 igb_irq_enable(adapter);
3572 static int igb_clean_rx_ring_msix(struct napi_struct *napi, int budget)
3574 struct igb_ring *rx_ring = container_of(napi, struct igb_ring, napi);
3575 struct igb_adapter *adapter = rx_ring->adapter;
3576 struct e1000_hw *hw = &adapter->hw;
3577 struct net_device *netdev = adapter->netdev;
3580 #ifdef CONFIG_IGB_DCA
3581 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3582 igb_update_rx_dca(rx_ring);
3584 igb_clean_rx_irq_adv(rx_ring, &work_done, budget);
3587 /* If not enough Rx work done, exit the polling mode */
3588 if ((work_done == 0) || !netif_running(netdev)) {
3589 netif_rx_complete(netdev, napi);
3591 if (adapter->itr_setting & 3) {
3592 if (adapter->num_rx_queues == 1)
3593 igb_set_itr(adapter);
3595 igb_update_ring_itr(rx_ring);
3598 if (!test_bit(__IGB_DOWN, &adapter->state))
3599 wr32(E1000_EIMS, rx_ring->eims_value);
3607 static inline u32 get_head(struct igb_ring *tx_ring)
3609 void *end = (struct e1000_tx_desc *)tx_ring->desc + tx_ring->count;
3610 return le32_to_cpu(*(volatile __le32 *)end);
3614 * igb_clean_tx_irq - Reclaim resources after transmit completes
3615 * @adapter: board private structure
3616 * returns true if ring is completely cleaned
3618 static bool igb_clean_tx_irq(struct igb_ring *tx_ring)
3620 struct igb_adapter *adapter = tx_ring->adapter;
3621 struct e1000_hw *hw = &adapter->hw;
3622 struct net_device *netdev = adapter->netdev;
3623 struct e1000_tx_desc *tx_desc;
3624 struct igb_buffer *buffer_info;
3625 struct sk_buff *skb;
3628 unsigned int count = 0;
3629 unsigned int total_bytes = 0, total_packets = 0;
3633 head = get_head(tx_ring);
3634 i = tx_ring->next_to_clean;
3637 tx_desc = E1000_TX_DESC(*tx_ring, i);
3638 buffer_info = &tx_ring->buffer_info[i];
3639 skb = buffer_info->skb;
3642 unsigned int segs, bytecount;
3643 /* gso_segs is currently only valid for tcp */
3644 segs = skb_shinfo(skb)->gso_segs ?: 1;
3645 /* multiply data chunks by size of headers */
3646 bytecount = ((segs - 1) * skb_headlen(skb)) +
3648 total_packets += segs;
3649 total_bytes += bytecount;
3652 igb_unmap_and_free_tx_resource(adapter, buffer_info);
3655 if (i == tx_ring->count)
3659 if (count == IGB_MAX_TX_CLEAN) {
3666 head = get_head(tx_ring);
3667 if (head == oldhead)
3672 tx_ring->next_to_clean = i;
3674 if (unlikely(count &&
3675 netif_carrier_ok(netdev) &&
3676 IGB_DESC_UNUSED(tx_ring) >= IGB_TX_QUEUE_WAKE)) {
3677 /* Make sure that anybody stopping the queue after this
3678 * sees the new next_to_clean.
3681 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
3682 !(test_bit(__IGB_DOWN, &adapter->state))) {
3683 netif_wake_subqueue(netdev, tx_ring->queue_index);
3684 ++adapter->restart_queue;
3688 if (tx_ring->detect_tx_hung) {
3689 /* Detect a transmit hang in hardware, this serializes the
3690 * check with the clearing of time_stamp and movement of i */
3691 tx_ring->detect_tx_hung = false;
3692 if (tx_ring->buffer_info[i].time_stamp &&
3693 time_after(jiffies, tx_ring->buffer_info[i].time_stamp +
3694 (adapter->tx_timeout_factor * HZ))
3695 && !(rd32(E1000_STATUS) &
3696 E1000_STATUS_TXOFF)) {
3698 tx_desc = E1000_TX_DESC(*tx_ring, i);
3699 /* detected Tx unit hang */
3700 dev_err(&adapter->pdev->dev,
3701 "Detected Tx Unit Hang\n"
3705 " next_to_use <%x>\n"
3706 " next_to_clean <%x>\n"
3708 "buffer_info[next_to_clean]\n"
3709 " time_stamp <%lx>\n"
3711 " desc.status <%x>\n",
3712 tx_ring->queue_index,
3713 readl(adapter->hw.hw_addr + tx_ring->head),
3714 readl(adapter->hw.hw_addr + tx_ring->tail),
3715 tx_ring->next_to_use,
3716 tx_ring->next_to_clean,
3718 tx_ring->buffer_info[i].time_stamp,
3720 tx_desc->upper.fields.status);
3721 netif_stop_subqueue(netdev, tx_ring->queue_index);
3724 tx_ring->total_bytes += total_bytes;
3725 tx_ring->total_packets += total_packets;
3726 tx_ring->tx_stats.bytes += total_bytes;
3727 tx_ring->tx_stats.packets += total_packets;
3728 adapter->net_stats.tx_bytes += total_bytes;
3729 adapter->net_stats.tx_packets += total_packets;
3733 #ifdef CONFIG_IGB_LRO
3735 * igb_get_skb_hdr - helper function for LRO header processing
3736 * @skb: pointer to sk_buff to be added to LRO packet
3737 * @iphdr: pointer to ip header structure
3738 * @tcph: pointer to tcp header structure
3739 * @hdr_flags: pointer to header flags
3740 * @priv: pointer to the receive descriptor for the current sk_buff
3742 static int igb_get_skb_hdr(struct sk_buff *skb, void **iphdr, void **tcph,
3743 u64 *hdr_flags, void *priv)
3745 union e1000_adv_rx_desc *rx_desc = priv;
3746 u16 pkt_type = rx_desc->wb.lower.lo_dword.pkt_info &
3747 (E1000_RXDADV_PKTTYPE_IPV4 | E1000_RXDADV_PKTTYPE_TCP);
3749 /* Verify that this is a valid IPv4 TCP packet */
3750 if (pkt_type != (E1000_RXDADV_PKTTYPE_IPV4 |
3751 E1000_RXDADV_PKTTYPE_TCP))
3754 /* Set network headers */
3755 skb_reset_network_header(skb);
3756 skb_set_transport_header(skb, ip_hdrlen(skb));
3757 *iphdr = ip_hdr(skb);
3758 *tcph = tcp_hdr(skb);
3759 *hdr_flags = LRO_IPV4 | LRO_TCP;
3764 #endif /* CONFIG_IGB_LRO */
3767 * igb_receive_skb - helper function to handle rx indications
3768 * @ring: pointer to receive ring receving this packet
3769 * @status: descriptor status field as written by hardware
3770 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
3771 * @skb: pointer to sk_buff to be indicated to stack
3773 static void igb_receive_skb(struct igb_ring *ring, u8 status,
3774 union e1000_adv_rx_desc * rx_desc,
3775 struct sk_buff *skb)
3777 struct igb_adapter * adapter = ring->adapter;
3778 bool vlan_extracted = (adapter->vlgrp && (status & E1000_RXD_STAT_VP));
3780 #ifdef CONFIG_IGB_LRO
3781 if (adapter->netdev->features & NETIF_F_LRO &&
3782 skb->ip_summed == CHECKSUM_UNNECESSARY) {
3784 lro_vlan_hwaccel_receive_skb(&ring->lro_mgr, skb,
3786 le16_to_cpu(rx_desc->wb.upper.vlan),
3789 lro_receive_skb(&ring->lro_mgr,skb, rx_desc);
3794 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3795 le16_to_cpu(rx_desc->wb.upper.vlan));
3798 netif_receive_skb(skb);
3799 #ifdef CONFIG_IGB_LRO
3805 static inline void igb_rx_checksum_adv(struct igb_adapter *adapter,
3806 u32 status_err, struct sk_buff *skb)
3808 skb->ip_summed = CHECKSUM_NONE;
3810 /* Ignore Checksum bit is set or checksum is disabled through ethtool */
3811 if ((status_err & E1000_RXD_STAT_IXSM) || !adapter->rx_csum)
3813 /* TCP/UDP checksum error bit is set */
3815 (E1000_RXDEXT_STATERR_TCPE | E1000_RXDEXT_STATERR_IPE)) {
3816 /* let the stack verify checksum errors */
3817 adapter->hw_csum_err++;
3820 /* It must be a TCP or UDP packet with a valid checksum */
3821 if (status_err & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))
3822 skb->ip_summed = CHECKSUM_UNNECESSARY;
3824 adapter->hw_csum_good++;
3827 static bool igb_clean_rx_irq_adv(struct igb_ring *rx_ring,
3828 int *work_done, int budget)
3830 struct igb_adapter *adapter = rx_ring->adapter;
3831 struct net_device *netdev = adapter->netdev;
3832 struct pci_dev *pdev = adapter->pdev;
3833 union e1000_adv_rx_desc *rx_desc , *next_rxd;
3834 struct igb_buffer *buffer_info , *next_buffer;
3835 struct sk_buff *skb;
3837 u32 length, hlen, staterr;
3838 bool cleaned = false;
3839 int cleaned_count = 0;
3840 unsigned int total_bytes = 0, total_packets = 0;
3842 i = rx_ring->next_to_clean;
3843 rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
3844 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3846 while (staterr & E1000_RXD_STAT_DD) {
3847 if (*work_done >= budget)
3850 buffer_info = &rx_ring->buffer_info[i];
3852 /* HW will not DMA in data larger than the given buffer, even
3853 * if it parses the (NFS, of course) header to be larger. In
3854 * that case, it fills the header buffer and spills the rest
3857 hlen = (le16_to_cpu(rx_desc->wb.lower.lo_dword.hdr_info) &
3858 E1000_RXDADV_HDRBUFLEN_MASK) >> E1000_RXDADV_HDRBUFLEN_SHIFT;
3859 if (hlen > adapter->rx_ps_hdr_size)
3860 hlen = adapter->rx_ps_hdr_size;
3862 length = le16_to_cpu(rx_desc->wb.upper.length);
3866 skb = buffer_info->skb;
3867 prefetch(skb->data - NET_IP_ALIGN);
3868 buffer_info->skb = NULL;
3869 if (!adapter->rx_ps_hdr_size) {
3870 pci_unmap_single(pdev, buffer_info->dma,
3871 adapter->rx_buffer_len +
3873 PCI_DMA_FROMDEVICE);
3874 skb_put(skb, length);
3878 if (!skb_shinfo(skb)->nr_frags) {
3879 pci_unmap_single(pdev, buffer_info->dma,
3880 adapter->rx_ps_hdr_size +
3882 PCI_DMA_FROMDEVICE);
3887 pci_unmap_page(pdev, buffer_info->page_dma,
3888 PAGE_SIZE / 2, PCI_DMA_FROMDEVICE);
3889 buffer_info->page_dma = 0;
3891 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags++,
3893 buffer_info->page_offset,
3896 if ((adapter->rx_buffer_len > (PAGE_SIZE / 2)) ||
3897 (page_count(buffer_info->page) != 1))
3898 buffer_info->page = NULL;
3900 get_page(buffer_info->page);
3903 skb->data_len += length;
3905 skb->truesize += length;
3909 if (i == rx_ring->count)
3911 next_rxd = E1000_RX_DESC_ADV(*rx_ring, i);
3913 next_buffer = &rx_ring->buffer_info[i];
3915 if (!(staterr & E1000_RXD_STAT_EOP)) {
3916 buffer_info->skb = next_buffer->skb;
3917 buffer_info->dma = next_buffer->dma;
3918 next_buffer->skb = skb;
3919 next_buffer->dma = 0;
3923 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
3924 dev_kfree_skb_irq(skb);
3928 total_bytes += skb->len;
3931 igb_rx_checksum_adv(adapter, staterr, skb);
3933 skb->protocol = eth_type_trans(skb, netdev);
3935 igb_receive_skb(rx_ring, staterr, rx_desc, skb);
3938 rx_desc->wb.upper.status_error = 0;
3940 /* return some buffers to hardware, one at a time is too slow */
3941 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
3942 igb_alloc_rx_buffers_adv(rx_ring, cleaned_count);
3946 /* use prefetched values */
3948 buffer_info = next_buffer;
3950 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3953 rx_ring->next_to_clean = i;
3954 cleaned_count = IGB_DESC_UNUSED(rx_ring);
3956 #ifdef CONFIG_IGB_LRO
3957 if (rx_ring->lro_used) {
3958 lro_flush_all(&rx_ring->lro_mgr);
3959 rx_ring->lro_used = 0;
3964 igb_alloc_rx_buffers_adv(rx_ring, cleaned_count);
3966 rx_ring->total_packets += total_packets;
3967 rx_ring->total_bytes += total_bytes;
3968 rx_ring->rx_stats.packets += total_packets;
3969 rx_ring->rx_stats.bytes += total_bytes;
3970 adapter->net_stats.rx_bytes += total_bytes;
3971 adapter->net_stats.rx_packets += total_packets;
3977 * igb_alloc_rx_buffers_adv - Replace used receive buffers; packet split
3978 * @adapter: address of board private structure
3980 static void igb_alloc_rx_buffers_adv(struct igb_ring *rx_ring,
3983 struct igb_adapter *adapter = rx_ring->adapter;
3984 struct net_device *netdev = adapter->netdev;
3985 struct pci_dev *pdev = adapter->pdev;
3986 union e1000_adv_rx_desc *rx_desc;
3987 struct igb_buffer *buffer_info;
3988 struct sk_buff *skb;
3991 i = rx_ring->next_to_use;
3992 buffer_info = &rx_ring->buffer_info[i];
3994 while (cleaned_count--) {
3995 rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
3997 if (adapter->rx_ps_hdr_size && !buffer_info->page_dma) {
3998 if (!buffer_info->page) {
3999 buffer_info->page = alloc_page(GFP_ATOMIC);
4000 if (!buffer_info->page) {
4001 adapter->alloc_rx_buff_failed++;
4004 buffer_info->page_offset = 0;
4006 buffer_info->page_offset ^= PAGE_SIZE / 2;
4008 buffer_info->page_dma =
4011 buffer_info->page_offset,
4013 PCI_DMA_FROMDEVICE);
4016 if (!buffer_info->skb) {
4019 if (adapter->rx_ps_hdr_size)
4020 bufsz = adapter->rx_ps_hdr_size;
4022 bufsz = adapter->rx_buffer_len;
4023 bufsz += NET_IP_ALIGN;
4024 skb = netdev_alloc_skb(netdev, bufsz);
4027 adapter->alloc_rx_buff_failed++;
4031 /* Make buffer alignment 2 beyond a 16 byte boundary
4032 * this will result in a 16 byte aligned IP header after
4033 * the 14 byte MAC header is removed
4035 skb_reserve(skb, NET_IP_ALIGN);
4037 buffer_info->skb = skb;
4038 buffer_info->dma = pci_map_single(pdev, skb->data,
4040 PCI_DMA_FROMDEVICE);
4043 /* Refresh the desc even if buffer_addrs didn't change because
4044 * each write-back erases this info. */
4045 if (adapter->rx_ps_hdr_size) {
4046 rx_desc->read.pkt_addr =
4047 cpu_to_le64(buffer_info->page_dma);
4048 rx_desc->read.hdr_addr = cpu_to_le64(buffer_info->dma);
4050 rx_desc->read.pkt_addr =
4051 cpu_to_le64(buffer_info->dma);
4052 rx_desc->read.hdr_addr = 0;
4056 if (i == rx_ring->count)
4058 buffer_info = &rx_ring->buffer_info[i];
4062 if (rx_ring->next_to_use != i) {
4063 rx_ring->next_to_use = i;
4065 i = (rx_ring->count - 1);
4069 /* Force memory writes to complete before letting h/w
4070 * know there are new descriptors to fetch. (Only
4071 * applicable for weak-ordered memory model archs,
4072 * such as IA-64). */
4074 writel(i, adapter->hw.hw_addr + rx_ring->tail);
4084 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4086 struct igb_adapter *adapter = netdev_priv(netdev);
4087 struct mii_ioctl_data *data = if_mii(ifr);
4089 if (adapter->hw.phy.media_type != e1000_media_type_copper)
4094 data->phy_id = adapter->hw.phy.addr;
4097 if (!capable(CAP_NET_ADMIN))
4099 if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
4116 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4122 return igb_mii_ioctl(netdev, ifr, cmd);
4128 static void igb_vlan_rx_register(struct net_device *netdev,
4129 struct vlan_group *grp)
4131 struct igb_adapter *adapter = netdev_priv(netdev);
4132 struct e1000_hw *hw = &adapter->hw;
4135 igb_irq_disable(adapter);
4136 adapter->vlgrp = grp;
4139 /* enable VLAN tag insert/strip */
4140 ctrl = rd32(E1000_CTRL);
4141 ctrl |= E1000_CTRL_VME;
4142 wr32(E1000_CTRL, ctrl);
4144 /* enable VLAN receive filtering */
4145 rctl = rd32(E1000_RCTL);
4146 rctl &= ~E1000_RCTL_CFIEN;
4147 wr32(E1000_RCTL, rctl);
4148 igb_update_mng_vlan(adapter);
4150 adapter->max_frame_size + VLAN_TAG_SIZE);
4152 /* disable VLAN tag insert/strip */
4153 ctrl = rd32(E1000_CTRL);
4154 ctrl &= ~E1000_CTRL_VME;
4155 wr32(E1000_CTRL, ctrl);
4157 if (adapter->mng_vlan_id != (u16)IGB_MNG_VLAN_NONE) {
4158 igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4159 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
4162 adapter->max_frame_size);
4165 if (!test_bit(__IGB_DOWN, &adapter->state))
4166 igb_irq_enable(adapter);
4169 static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
4171 struct igb_adapter *adapter = netdev_priv(netdev);
4172 struct e1000_hw *hw = &adapter->hw;
4175 if ((adapter->hw.mng_cookie.status &
4176 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
4177 (vid == adapter->mng_vlan_id))
4179 /* add VID to filter table */
4180 index = (vid >> 5) & 0x7F;
4181 vfta = array_rd32(E1000_VFTA, index);
4182 vfta |= (1 << (vid & 0x1F));
4183 igb_write_vfta(&adapter->hw, index, vfta);
4186 static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
4188 struct igb_adapter *adapter = netdev_priv(netdev);
4189 struct e1000_hw *hw = &adapter->hw;
4192 igb_irq_disable(adapter);
4193 vlan_group_set_device(adapter->vlgrp, vid, NULL);
4195 if (!test_bit(__IGB_DOWN, &adapter->state))
4196 igb_irq_enable(adapter);
4198 if ((adapter->hw.mng_cookie.status &
4199 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
4200 (vid == adapter->mng_vlan_id)) {
4201 /* release control to f/w */
4202 igb_release_hw_control(adapter);
4206 /* remove VID from filter table */
4207 index = (vid >> 5) & 0x7F;
4208 vfta = array_rd32(E1000_VFTA, index);
4209 vfta &= ~(1 << (vid & 0x1F));
4210 igb_write_vfta(&adapter->hw, index, vfta);
4213 static void igb_restore_vlan(struct igb_adapter *adapter)
4215 igb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4217 if (adapter->vlgrp) {
4219 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4220 if (!vlan_group_get_device(adapter->vlgrp, vid))
4222 igb_vlan_rx_add_vid(adapter->netdev, vid);
4227 int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx)
4229 struct e1000_mac_info *mac = &adapter->hw.mac;
4233 /* Fiber NICs only allow 1000 gbps Full duplex */
4234 if ((adapter->hw.phy.media_type == e1000_media_type_fiber) &&
4235 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4236 dev_err(&adapter->pdev->dev,
4237 "Unsupported Speed/Duplex configuration\n");
4242 case SPEED_10 + DUPLEX_HALF:
4243 mac->forced_speed_duplex = ADVERTISE_10_HALF;
4245 case SPEED_10 + DUPLEX_FULL:
4246 mac->forced_speed_duplex = ADVERTISE_10_FULL;
4248 case SPEED_100 + DUPLEX_HALF:
4249 mac->forced_speed_duplex = ADVERTISE_100_HALF;
4251 case SPEED_100 + DUPLEX_FULL:
4252 mac->forced_speed_duplex = ADVERTISE_100_FULL;
4254 case SPEED_1000 + DUPLEX_FULL:
4256 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
4258 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4260 dev_err(&adapter->pdev->dev,
4261 "Unsupported Speed/Duplex configuration\n");
4268 static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
4270 struct net_device *netdev = pci_get_drvdata(pdev);
4271 struct igb_adapter *adapter = netdev_priv(netdev);
4272 struct e1000_hw *hw = &adapter->hw;
4273 u32 ctrl, rctl, status;
4274 u32 wufc = adapter->wol;
4279 netif_device_detach(netdev);
4281 if (netif_running(netdev))
4284 igb_reset_interrupt_capability(adapter);
4286 igb_free_queues(adapter);
4289 retval = pci_save_state(pdev);
4294 status = rd32(E1000_STATUS);
4295 if (status & E1000_STATUS_LU)
4296 wufc &= ~E1000_WUFC_LNKC;
4299 igb_setup_rctl(adapter);
4300 igb_set_multi(netdev);
4302 /* turn on all-multi mode if wake on multicast is enabled */
4303 if (wufc & E1000_WUFC_MC) {
4304 rctl = rd32(E1000_RCTL);
4305 rctl |= E1000_RCTL_MPE;
4306 wr32(E1000_RCTL, rctl);
4309 ctrl = rd32(E1000_CTRL);
4310 /* advertise wake from D3Cold */
4311 #define E1000_CTRL_ADVD3WUC 0x00100000
4312 /* phy power management enable */
4313 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4314 ctrl |= E1000_CTRL_ADVD3WUC;
4315 wr32(E1000_CTRL, ctrl);
4317 /* Allow time for pending master requests to run */
4318 igb_disable_pcie_master(&adapter->hw);
4320 wr32(E1000_WUC, E1000_WUC_PME_EN);
4321 wr32(E1000_WUFC, wufc);
4324 wr32(E1000_WUFC, 0);
4327 /* make sure adapter isn't asleep if manageability/wol is enabled */
4328 if (wufc || adapter->en_mng_pt) {
4329 pci_enable_wake(pdev, PCI_D3hot, 1);
4330 pci_enable_wake(pdev, PCI_D3cold, 1);
4332 igb_shutdown_fiber_serdes_link_82575(hw);
4333 pci_enable_wake(pdev, PCI_D3hot, 0);
4334 pci_enable_wake(pdev, PCI_D3cold, 0);
4337 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4338 * would have already happened in close and is redundant. */
4339 igb_release_hw_control(adapter);
4341 pci_disable_device(pdev);
4343 pci_set_power_state(pdev, pci_choose_state(pdev, state));
4349 static int igb_resume(struct pci_dev *pdev)
4351 struct net_device *netdev = pci_get_drvdata(pdev);
4352 struct igb_adapter *adapter = netdev_priv(netdev);
4353 struct e1000_hw *hw = &adapter->hw;
4356 pci_set_power_state(pdev, PCI_D0);
4357 pci_restore_state(pdev);
4359 if (adapter->need_ioport)
4360 err = pci_enable_device(pdev);
4362 err = pci_enable_device_mem(pdev);
4365 "igb: Cannot enable PCI device from suspend\n");
4368 pci_set_master(pdev);
4370 pci_enable_wake(pdev, PCI_D3hot, 0);
4371 pci_enable_wake(pdev, PCI_D3cold, 0);
4373 igb_set_interrupt_capability(adapter);
4375 if (igb_alloc_queues(adapter)) {
4376 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
4380 /* e1000_power_up_phy(adapter); */
4383 wr32(E1000_WUS, ~0);
4385 if (netif_running(netdev)) {
4386 err = igb_open(netdev);
4391 netif_device_attach(netdev);
4393 /* let the f/w know that the h/w is now under the control of the
4395 igb_get_hw_control(adapter);
4401 static void igb_shutdown(struct pci_dev *pdev)
4403 igb_suspend(pdev, PMSG_SUSPEND);
4406 #ifdef CONFIG_NET_POLL_CONTROLLER
4408 * Polling 'interrupt' - used by things like netconsole to send skbs
4409 * without having to re-enable interrupts. It's not called while
4410 * the interrupt routine is executing.
4412 static void igb_netpoll(struct net_device *netdev)
4414 struct igb_adapter *adapter = netdev_priv(netdev);
4418 igb_irq_disable(adapter);
4419 adapter->flags |= IGB_FLAG_IN_NETPOLL;
4421 for (i = 0; i < adapter->num_tx_queues; i++)
4422 igb_clean_tx_irq(&adapter->tx_ring[i]);
4424 for (i = 0; i < adapter->num_rx_queues; i++)
4425 igb_clean_rx_irq_adv(&adapter->rx_ring[i],
4427 adapter->rx_ring[i].napi.weight);
4429 adapter->flags &= ~IGB_FLAG_IN_NETPOLL;
4430 igb_irq_enable(adapter);
4432 #endif /* CONFIG_NET_POLL_CONTROLLER */
4435 * igb_io_error_detected - called when PCI error is detected
4436 * @pdev: Pointer to PCI device
4437 * @state: The current pci connection state
4439 * This function is called after a PCI bus error affecting
4440 * this device has been detected.
4442 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
4443 pci_channel_state_t state)
4445 struct net_device *netdev = pci_get_drvdata(pdev);
4446 struct igb_adapter *adapter = netdev_priv(netdev);
4448 netif_device_detach(netdev);
4450 if (netif_running(netdev))
4452 pci_disable_device(pdev);
4454 /* Request a slot slot reset. */
4455 return PCI_ERS_RESULT_NEED_RESET;
4459 * igb_io_slot_reset - called after the pci bus has been reset.
4460 * @pdev: Pointer to PCI device
4462 * Restart the card from scratch, as if from a cold-boot. Implementation
4463 * resembles the first-half of the igb_resume routine.
4465 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
4467 struct net_device *netdev = pci_get_drvdata(pdev);
4468 struct igb_adapter *adapter = netdev_priv(netdev);
4469 struct e1000_hw *hw = &adapter->hw;
4472 if (adapter->need_ioport)
4473 err = pci_enable_device(pdev);
4475 err = pci_enable_device_mem(pdev);
4478 "Cannot re-enable PCI device after reset.\n");
4479 return PCI_ERS_RESULT_DISCONNECT;
4481 pci_set_master(pdev);
4482 pci_restore_state(pdev);
4484 pci_enable_wake(pdev, PCI_D3hot, 0);
4485 pci_enable_wake(pdev, PCI_D3cold, 0);
4488 wr32(E1000_WUS, ~0);
4490 return PCI_ERS_RESULT_RECOVERED;
4494 * igb_io_resume - called when traffic can start flowing again.
4495 * @pdev: Pointer to PCI device
4497 * This callback is called when the error recovery driver tells us that
4498 * its OK to resume normal operation. Implementation resembles the
4499 * second-half of the igb_resume routine.
4501 static void igb_io_resume(struct pci_dev *pdev)
4503 struct net_device *netdev = pci_get_drvdata(pdev);
4504 struct igb_adapter *adapter = netdev_priv(netdev);
4506 if (netif_running(netdev)) {
4507 if (igb_up(adapter)) {
4508 dev_err(&pdev->dev, "igb_up failed after reset\n");
4513 netif_device_attach(netdev);
4515 /* let the f/w know that the h/w is now under the control of the
4517 igb_get_hw_control(adapter);