1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/module.h>
29 #include <linux/types.h>
30 #include <linux/init.h>
31 #include <linux/vmalloc.h>
32 #include <linux/pagemap.h>
33 #include <linux/netdevice.h>
34 #include <linux/ipv6.h>
35 #include <net/checksum.h>
36 #include <net/ip6_checksum.h>
37 #include <linux/mii.h>
38 #include <linux/ethtool.h>
39 #include <linux/if_vlan.h>
40 #include <linux/pci.h>
41 #include <linux/delay.h>
42 #include <linux/interrupt.h>
43 #include <linux/if_ether.h>
45 #include <linux/dca.h>
49 #define DRV_VERSION "1.2.45-k2"
50 char igb_driver_name[] = "igb";
51 char igb_driver_version[] = DRV_VERSION;
52 static const char igb_driver_string[] =
53 "Intel(R) Gigabit Ethernet Network Driver";
54 static const char igb_copyright[] = "Copyright (c) 2008 Intel Corporation.";
57 static const struct e1000_info *igb_info_tbl[] = {
58 [board_82575] = &e1000_82575_info,
61 static struct pci_device_id igb_pci_tbl[] = {
62 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
63 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
64 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
65 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
66 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
67 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
68 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
69 /* required last entry */
73 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
75 void igb_reset(struct igb_adapter *);
76 static int igb_setup_all_tx_resources(struct igb_adapter *);
77 static int igb_setup_all_rx_resources(struct igb_adapter *);
78 static void igb_free_all_tx_resources(struct igb_adapter *);
79 static void igb_free_all_rx_resources(struct igb_adapter *);
80 static void igb_free_tx_resources(struct igb_ring *);
81 static void igb_free_rx_resources(struct igb_ring *);
82 void igb_update_stats(struct igb_adapter *);
83 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
84 static void __devexit igb_remove(struct pci_dev *pdev);
85 static int igb_sw_init(struct igb_adapter *);
86 static int igb_open(struct net_device *);
87 static int igb_close(struct net_device *);
88 static void igb_configure_tx(struct igb_adapter *);
89 static void igb_configure_rx(struct igb_adapter *);
90 static void igb_setup_rctl(struct igb_adapter *);
91 static void igb_clean_all_tx_rings(struct igb_adapter *);
92 static void igb_clean_all_rx_rings(struct igb_adapter *);
93 static void igb_clean_tx_ring(struct igb_ring *);
94 static void igb_clean_rx_ring(struct igb_ring *);
95 static void igb_set_multi(struct net_device *);
96 static void igb_update_phy_info(unsigned long);
97 static void igb_watchdog(unsigned long);
98 static void igb_watchdog_task(struct work_struct *);
99 static int igb_xmit_frame_ring_adv(struct sk_buff *, struct net_device *,
101 static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *);
102 static struct net_device_stats *igb_get_stats(struct net_device *);
103 static int igb_change_mtu(struct net_device *, int);
104 static int igb_set_mac(struct net_device *, void *);
105 static irqreturn_t igb_intr(int irq, void *);
106 static irqreturn_t igb_intr_msi(int irq, void *);
107 static irqreturn_t igb_msix_other(int irq, void *);
108 static irqreturn_t igb_msix_rx(int irq, void *);
109 static irqreturn_t igb_msix_tx(int irq, void *);
110 static int igb_clean_rx_ring_msix(struct napi_struct *, int);
112 static void igb_update_rx_dca(struct igb_ring *);
113 static void igb_update_tx_dca(struct igb_ring *);
114 static void igb_setup_dca(struct igb_adapter *);
115 #endif /* CONFIG_DCA */
116 static bool igb_clean_tx_irq(struct igb_ring *);
117 static int igb_poll(struct napi_struct *, int);
118 static bool igb_clean_rx_irq_adv(struct igb_ring *, int *, int);
119 static void igb_alloc_rx_buffers_adv(struct igb_ring *, int);
120 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
121 static void igb_tx_timeout(struct net_device *);
122 static void igb_reset_task(struct work_struct *);
123 static void igb_vlan_rx_register(struct net_device *, struct vlan_group *);
124 static void igb_vlan_rx_add_vid(struct net_device *, u16);
125 static void igb_vlan_rx_kill_vid(struct net_device *, u16);
126 static void igb_restore_vlan(struct igb_adapter *);
128 static int igb_suspend(struct pci_dev *, pm_message_t);
130 static int igb_resume(struct pci_dev *);
132 static void igb_shutdown(struct pci_dev *);
134 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
135 static struct notifier_block dca_notifier = {
136 .notifier_call = igb_notify_dca,
142 #ifdef CONFIG_NET_POLL_CONTROLLER
143 /* for netdump / net console */
144 static void igb_netpoll(struct net_device *);
147 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
148 pci_channel_state_t);
149 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
150 static void igb_io_resume(struct pci_dev *);
152 static struct pci_error_handlers igb_err_handler = {
153 .error_detected = igb_io_error_detected,
154 .slot_reset = igb_io_slot_reset,
155 .resume = igb_io_resume,
159 static struct pci_driver igb_driver = {
160 .name = igb_driver_name,
161 .id_table = igb_pci_tbl,
163 .remove = __devexit_p(igb_remove),
165 /* Power Managment Hooks */
166 .suspend = igb_suspend,
167 .resume = igb_resume,
169 .shutdown = igb_shutdown,
170 .err_handler = &igb_err_handler
173 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
174 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
175 MODULE_LICENSE("GPL");
176 MODULE_VERSION(DRV_VERSION);
180 * igb_get_hw_dev_name - return device name string
181 * used by hardware layer to print debugging information
183 char *igb_get_hw_dev_name(struct e1000_hw *hw)
185 struct igb_adapter *adapter = hw->back;
186 return adapter->netdev->name;
191 * igb_init_module - Driver Registration Routine
193 * igb_init_module is the first routine called when the driver is
194 * loaded. All it does is register with the PCI subsystem.
196 static int __init igb_init_module(void)
199 printk(KERN_INFO "%s - version %s\n",
200 igb_driver_string, igb_driver_version);
202 printk(KERN_INFO "%s\n", igb_copyright);
204 ret = pci_register_driver(&igb_driver);
206 dca_register_notify(&dca_notifier);
211 module_init(igb_init_module);
214 * igb_exit_module - Driver Exit Cleanup Routine
216 * igb_exit_module is called just before the driver is removed
219 static void __exit igb_exit_module(void)
222 dca_unregister_notify(&dca_notifier);
224 pci_unregister_driver(&igb_driver);
227 module_exit(igb_exit_module);
230 * igb_alloc_queues - Allocate memory for all rings
231 * @adapter: board private structure to initialize
233 * We allocate one ring per queue at run-time since we don't know the
234 * number of queues at compile-time.
236 static int igb_alloc_queues(struct igb_adapter *adapter)
240 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
241 sizeof(struct igb_ring), GFP_KERNEL);
242 if (!adapter->tx_ring)
245 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
246 sizeof(struct igb_ring), GFP_KERNEL);
247 if (!adapter->rx_ring) {
248 kfree(adapter->tx_ring);
252 for (i = 0; i < adapter->num_tx_queues; i++) {
253 struct igb_ring *ring = &(adapter->tx_ring[i]);
254 ring->adapter = adapter;
255 ring->queue_index = i;
257 for (i = 0; i < adapter->num_rx_queues; i++) {
258 struct igb_ring *ring = &(adapter->rx_ring[i]);
259 ring->adapter = adapter;
260 ring->queue_index = i;
261 ring->itr_register = E1000_ITR;
263 /* set a default napi handler for each rx_ring */
264 netif_napi_add(adapter->netdev, &ring->napi, igb_poll, 64);
269 #define IGB_N0_QUEUE -1
270 static void igb_assign_vector(struct igb_adapter *adapter, int rx_queue,
271 int tx_queue, int msix_vector)
274 struct e1000_hw *hw = &adapter->hw;
277 switch (hw->mac.type) {
279 /* The 82575 assigns vectors using a bitmask, which matches the
280 bitmask for the EICR/EIMS/EIMC registers. To assign one
281 or more queues to a vector, we write the appropriate bits
282 into the MSIXBM register for that vector. */
283 if (rx_queue > IGB_N0_QUEUE) {
284 msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
285 adapter->rx_ring[rx_queue].eims_value = msixbm;
287 if (tx_queue > IGB_N0_QUEUE) {
288 msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
289 adapter->tx_ring[tx_queue].eims_value =
290 E1000_EICR_TX_QUEUE0 << tx_queue;
292 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
295 /* Kawela uses a table-based method for assigning vectors.
296 Each queue has a single entry in the table to which we write
297 a vector number along with a "valid" bit. Sadly, the layout
298 of the table is somewhat counterintuitive. */
299 if (rx_queue > IGB_N0_QUEUE) {
300 index = (rx_queue & 0x7);
301 ivar = array_rd32(E1000_IVAR0, index);
303 /* vector goes into low byte of register */
304 ivar = ivar & 0xFFFFFF00;
305 ivar |= msix_vector | E1000_IVAR_VALID;
307 /* vector goes into third byte of register */
308 ivar = ivar & 0xFF00FFFF;
309 ivar |= (msix_vector | E1000_IVAR_VALID) << 16;
311 adapter->rx_ring[rx_queue].eims_value= 1 << msix_vector;
312 array_wr32(E1000_IVAR0, index, ivar);
314 if (tx_queue > IGB_N0_QUEUE) {
315 index = (tx_queue & 0x7);
316 ivar = array_rd32(E1000_IVAR0, index);
318 /* vector goes into second byte of register */
319 ivar = ivar & 0xFFFF00FF;
320 ivar |= (msix_vector | E1000_IVAR_VALID) << 8;
322 /* vector goes into high byte of register */
323 ivar = ivar & 0x00FFFFFF;
324 ivar |= (msix_vector | E1000_IVAR_VALID) << 24;
326 adapter->tx_ring[tx_queue].eims_value= 1 << msix_vector;
327 array_wr32(E1000_IVAR0, index, ivar);
337 * igb_configure_msix - Configure MSI-X hardware
339 * igb_configure_msix sets up the hardware to properly
340 * generate MSI-X interrupts.
342 static void igb_configure_msix(struct igb_adapter *adapter)
346 struct e1000_hw *hw = &adapter->hw;
348 adapter->eims_enable_mask = 0;
349 if (hw->mac.type == e1000_82576)
350 /* Turn on MSI-X capability first, or our settings
351 * won't stick. And it will take days to debug. */
352 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
353 E1000_GPIE_PBA | E1000_GPIE_EIAME |
356 for (i = 0; i < adapter->num_tx_queues; i++) {
357 struct igb_ring *tx_ring = &adapter->tx_ring[i];
358 igb_assign_vector(adapter, IGB_N0_QUEUE, i, vector++);
359 adapter->eims_enable_mask |= tx_ring->eims_value;
360 if (tx_ring->itr_val)
361 writel(1000000000 / (tx_ring->itr_val * 256),
362 hw->hw_addr + tx_ring->itr_register);
364 writel(1, hw->hw_addr + tx_ring->itr_register);
367 for (i = 0; i < adapter->num_rx_queues; i++) {
368 struct igb_ring *rx_ring = &adapter->rx_ring[i];
369 igb_assign_vector(adapter, i, IGB_N0_QUEUE, vector++);
370 adapter->eims_enable_mask |= rx_ring->eims_value;
371 if (rx_ring->itr_val)
372 writel(1000000000 / (rx_ring->itr_val * 256),
373 hw->hw_addr + rx_ring->itr_register);
375 writel(1, hw->hw_addr + rx_ring->itr_register);
379 /* set vector for other causes, i.e. link changes */
380 switch (hw->mac.type) {
382 array_wr32(E1000_MSIXBM(0), vector++,
385 tmp = rd32(E1000_CTRL_EXT);
386 /* enable MSI-X PBA support*/
387 tmp |= E1000_CTRL_EXT_PBA_CLR;
389 /* Auto-Mask interrupts upon ICR read. */
390 tmp |= E1000_CTRL_EXT_EIAME;
391 tmp |= E1000_CTRL_EXT_IRCA;
393 wr32(E1000_CTRL_EXT, tmp);
394 adapter->eims_enable_mask |= E1000_EIMS_OTHER;
395 adapter->eims_other = E1000_EIMS_OTHER;
400 tmp = (vector++ | E1000_IVAR_VALID) << 8;
401 wr32(E1000_IVAR_MISC, tmp);
403 adapter->eims_enable_mask = (1 << (vector)) - 1;
404 adapter->eims_other = 1 << (vector - 1);
407 /* do nothing, since nothing else supports MSI-X */
409 } /* switch (hw->mac.type) */
414 * igb_request_msix - Initialize MSI-X interrupts
416 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
419 static int igb_request_msix(struct igb_adapter *adapter)
421 struct net_device *netdev = adapter->netdev;
422 int i, err = 0, vector = 0;
426 for (i = 0; i < adapter->num_tx_queues; i++) {
427 struct igb_ring *ring = &(adapter->tx_ring[i]);
428 sprintf(ring->name, "%s-tx%d", netdev->name, i);
429 err = request_irq(adapter->msix_entries[vector].vector,
430 &igb_msix_tx, 0, ring->name,
431 &(adapter->tx_ring[i]));
434 ring->itr_register = E1000_EITR(0) + (vector << 2);
435 ring->itr_val = adapter->itr;
438 for (i = 0; i < adapter->num_rx_queues; i++) {
439 struct igb_ring *ring = &(adapter->rx_ring[i]);
440 if (strlen(netdev->name) < (IFNAMSIZ - 5))
441 sprintf(ring->name, "%s-rx%d", netdev->name, i);
443 memcpy(ring->name, netdev->name, IFNAMSIZ);
444 err = request_irq(adapter->msix_entries[vector].vector,
445 &igb_msix_rx, 0, ring->name,
446 &(adapter->rx_ring[i]));
449 ring->itr_register = E1000_EITR(0) + (vector << 2);
450 ring->itr_val = adapter->itr;
451 /* overwrite the poll routine for MSIX, we've already done
453 ring->napi.poll = &igb_clean_rx_ring_msix;
457 err = request_irq(adapter->msix_entries[vector].vector,
458 &igb_msix_other, 0, netdev->name, netdev);
462 igb_configure_msix(adapter);
468 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
470 if (adapter->msix_entries) {
471 pci_disable_msix(adapter->pdev);
472 kfree(adapter->msix_entries);
473 adapter->msix_entries = NULL;
474 } else if (adapter->msi_enabled)
475 pci_disable_msi(adapter->pdev);
481 * igb_set_interrupt_capability - set MSI or MSI-X if supported
483 * Attempt to configure interrupts using the best available
484 * capabilities of the hardware and kernel.
486 static void igb_set_interrupt_capability(struct igb_adapter *adapter)
491 numvecs = adapter->num_tx_queues + adapter->num_rx_queues + 1;
492 adapter->msix_entries = kcalloc(numvecs, sizeof(struct msix_entry),
494 if (!adapter->msix_entries)
497 for (i = 0; i < numvecs; i++)
498 adapter->msix_entries[i].entry = i;
500 err = pci_enable_msix(adapter->pdev,
501 adapter->msix_entries,
506 igb_reset_interrupt_capability(adapter);
508 /* If we can't do MSI-X, try MSI */
510 adapter->num_rx_queues = 1;
511 adapter->num_tx_queues = 1;
512 if (!pci_enable_msi(adapter->pdev))
513 adapter->msi_enabled = 1;
515 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
516 /* Notify the stack of the (possibly) reduced Tx Queue count. */
517 adapter->netdev->egress_subqueue_count = adapter->num_tx_queues;
523 * igb_request_irq - initialize interrupts
525 * Attempts to configure interrupts using the best available
526 * capabilities of the hardware and kernel.
528 static int igb_request_irq(struct igb_adapter *adapter)
530 struct net_device *netdev = adapter->netdev;
531 struct e1000_hw *hw = &adapter->hw;
534 if (adapter->msix_entries) {
535 err = igb_request_msix(adapter);
538 /* fall back to MSI */
539 igb_reset_interrupt_capability(adapter);
540 if (!pci_enable_msi(adapter->pdev))
541 adapter->msi_enabled = 1;
542 igb_free_all_tx_resources(adapter);
543 igb_free_all_rx_resources(adapter);
544 adapter->num_rx_queues = 1;
545 igb_alloc_queues(adapter);
547 switch (hw->mac.type) {
549 wr32(E1000_MSIXBM(0),
550 (E1000_EICR_RX_QUEUE0 | E1000_EIMS_OTHER));
553 wr32(E1000_IVAR0, E1000_IVAR_VALID);
560 if (adapter->msi_enabled) {
561 err = request_irq(adapter->pdev->irq, &igb_intr_msi, 0,
562 netdev->name, netdev);
565 /* fall back to legacy interrupts */
566 igb_reset_interrupt_capability(adapter);
567 adapter->msi_enabled = 0;
570 err = request_irq(adapter->pdev->irq, &igb_intr, IRQF_SHARED,
571 netdev->name, netdev);
574 dev_err(&adapter->pdev->dev, "Error %d getting interrupt\n",
581 static void igb_free_irq(struct igb_adapter *adapter)
583 struct net_device *netdev = adapter->netdev;
585 if (adapter->msix_entries) {
588 for (i = 0; i < adapter->num_tx_queues; i++)
589 free_irq(adapter->msix_entries[vector++].vector,
590 &(adapter->tx_ring[i]));
591 for (i = 0; i < adapter->num_rx_queues; i++)
592 free_irq(adapter->msix_entries[vector++].vector,
593 &(adapter->rx_ring[i]));
595 free_irq(adapter->msix_entries[vector++].vector, netdev);
599 free_irq(adapter->pdev->irq, netdev);
603 * igb_irq_disable - Mask off interrupt generation on the NIC
604 * @adapter: board private structure
606 static void igb_irq_disable(struct igb_adapter *adapter)
608 struct e1000_hw *hw = &adapter->hw;
610 if (adapter->msix_entries) {
612 wr32(E1000_EIMC, ~0);
619 synchronize_irq(adapter->pdev->irq);
623 * igb_irq_enable - Enable default interrupt generation settings
624 * @adapter: board private structure
626 static void igb_irq_enable(struct igb_adapter *adapter)
628 struct e1000_hw *hw = &adapter->hw;
630 if (adapter->msix_entries) {
631 wr32(E1000_EIAC, adapter->eims_enable_mask);
632 wr32(E1000_EIAM, adapter->eims_enable_mask);
633 wr32(E1000_EIMS, adapter->eims_enable_mask);
634 wr32(E1000_IMS, E1000_IMS_LSC);
636 wr32(E1000_IMS, IMS_ENABLE_MASK);
637 wr32(E1000_IAM, IMS_ENABLE_MASK);
641 static void igb_update_mng_vlan(struct igb_adapter *adapter)
643 struct net_device *netdev = adapter->netdev;
644 u16 vid = adapter->hw.mng_cookie.vlan_id;
645 u16 old_vid = adapter->mng_vlan_id;
646 if (adapter->vlgrp) {
647 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
648 if (adapter->hw.mng_cookie.status &
649 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
650 igb_vlan_rx_add_vid(netdev, vid);
651 adapter->mng_vlan_id = vid;
653 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
655 if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
657 !vlan_group_get_device(adapter->vlgrp, old_vid))
658 igb_vlan_rx_kill_vid(netdev, old_vid);
660 adapter->mng_vlan_id = vid;
665 * igb_release_hw_control - release control of the h/w to f/w
666 * @adapter: address of board private structure
668 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
669 * For ASF and Pass Through versions of f/w this means that the
670 * driver is no longer loaded.
673 static void igb_release_hw_control(struct igb_adapter *adapter)
675 struct e1000_hw *hw = &adapter->hw;
678 /* Let firmware take over control of h/w */
679 ctrl_ext = rd32(E1000_CTRL_EXT);
681 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
686 * igb_get_hw_control - get control of the h/w from f/w
687 * @adapter: address of board private structure
689 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
690 * For ASF and Pass Through versions of f/w this means that
691 * the driver is loaded.
694 static void igb_get_hw_control(struct igb_adapter *adapter)
696 struct e1000_hw *hw = &adapter->hw;
699 /* Let firmware know the driver has taken over */
700 ctrl_ext = rd32(E1000_CTRL_EXT);
702 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
705 static void igb_init_manageability(struct igb_adapter *adapter)
707 struct e1000_hw *hw = &adapter->hw;
709 if (adapter->en_mng_pt) {
710 u32 manc2h = rd32(E1000_MANC2H);
711 u32 manc = rd32(E1000_MANC);
713 /* enable receiving management packets to the host */
714 /* this will probably generate destination unreachable messages
715 * from the host OS, but the packets will be handled on SMBUS */
716 manc |= E1000_MANC_EN_MNG2HOST;
717 #define E1000_MNG2HOST_PORT_623 (1 << 5)
718 #define E1000_MNG2HOST_PORT_664 (1 << 6)
719 manc2h |= E1000_MNG2HOST_PORT_623;
720 manc2h |= E1000_MNG2HOST_PORT_664;
721 wr32(E1000_MANC2H, manc2h);
723 wr32(E1000_MANC, manc);
728 * igb_configure - configure the hardware for RX and TX
729 * @adapter: private board structure
731 static void igb_configure(struct igb_adapter *adapter)
733 struct net_device *netdev = adapter->netdev;
736 igb_get_hw_control(adapter);
737 igb_set_multi(netdev);
739 igb_restore_vlan(adapter);
740 igb_init_manageability(adapter);
742 igb_configure_tx(adapter);
743 igb_setup_rctl(adapter);
744 igb_configure_rx(adapter);
746 igb_rx_fifo_flush_82575(&adapter->hw);
748 /* call IGB_DESC_UNUSED which always leaves
749 * at least 1 descriptor unused to make sure
750 * next_to_use != next_to_clean */
751 for (i = 0; i < adapter->num_rx_queues; i++) {
752 struct igb_ring *ring = &adapter->rx_ring[i];
753 igb_alloc_rx_buffers_adv(ring, IGB_DESC_UNUSED(ring));
757 adapter->tx_queue_len = netdev->tx_queue_len;
762 * igb_up - Open the interface and prepare it to handle traffic
763 * @adapter: board private structure
766 int igb_up(struct igb_adapter *adapter)
768 struct e1000_hw *hw = &adapter->hw;
771 /* hardware has been reset, we need to reload some things */
772 igb_configure(adapter);
774 clear_bit(__IGB_DOWN, &adapter->state);
776 for (i = 0; i < adapter->num_rx_queues; i++)
777 napi_enable(&adapter->rx_ring[i].napi);
778 if (adapter->msix_entries)
779 igb_configure_msix(adapter);
781 /* Clear any pending interrupts. */
783 igb_irq_enable(adapter);
785 /* Fire a link change interrupt to start the watchdog. */
786 wr32(E1000_ICS, E1000_ICS_LSC);
790 void igb_down(struct igb_adapter *adapter)
792 struct e1000_hw *hw = &adapter->hw;
793 struct net_device *netdev = adapter->netdev;
797 /* signal that we're down so the interrupt handler does not
798 * reschedule our watchdog timer */
799 set_bit(__IGB_DOWN, &adapter->state);
801 /* disable receives in the hardware */
802 rctl = rd32(E1000_RCTL);
803 wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
804 /* flush and sleep below */
806 netif_stop_queue(netdev);
807 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
808 for (i = 0; i < adapter->num_tx_queues; i++)
809 netif_stop_subqueue(netdev, i);
812 /* disable transmits in the hardware */
813 tctl = rd32(E1000_TCTL);
814 tctl &= ~E1000_TCTL_EN;
815 wr32(E1000_TCTL, tctl);
816 /* flush both disables and wait for them to finish */
820 for (i = 0; i < adapter->num_rx_queues; i++)
821 napi_disable(&adapter->rx_ring[i].napi);
823 igb_irq_disable(adapter);
825 del_timer_sync(&adapter->watchdog_timer);
826 del_timer_sync(&adapter->phy_info_timer);
828 netdev->tx_queue_len = adapter->tx_queue_len;
829 netif_carrier_off(netdev);
830 adapter->link_speed = 0;
831 adapter->link_duplex = 0;
833 if (!pci_channel_offline(adapter->pdev))
835 igb_clean_all_tx_rings(adapter);
836 igb_clean_all_rx_rings(adapter);
839 void igb_reinit_locked(struct igb_adapter *adapter)
841 WARN_ON(in_interrupt());
842 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
846 clear_bit(__IGB_RESETTING, &adapter->state);
849 void igb_reset(struct igb_adapter *adapter)
851 struct e1000_hw *hw = &adapter->hw;
852 struct e1000_mac_info *mac = &hw->mac;
853 struct e1000_fc_info *fc = &hw->fc;
854 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
857 /* Repartition Pba for greater than 9k mtu
858 * To take effect CTRL.RST is required.
860 if (mac->type != e1000_82576) {
867 if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
868 (mac->type < e1000_82576)) {
869 /* adjust PBA for jumbo frames */
870 wr32(E1000_PBA, pba);
872 /* To maintain wire speed transmits, the Tx FIFO should be
873 * large enough to accommodate two full transmit packets,
874 * rounded up to the next 1KB and expressed in KB. Likewise,
875 * the Rx FIFO should be large enough to accommodate at least
876 * one full receive packet and is similarly rounded up and
877 * expressed in KB. */
878 pba = rd32(E1000_PBA);
879 /* upper 16 bits has Tx packet buffer allocation size in KB */
880 tx_space = pba >> 16;
881 /* lower 16 bits has Rx packet buffer allocation size in KB */
883 /* the tx fifo also stores 16 bytes of information about the tx
884 * but don't include ethernet FCS because hardware appends it */
885 min_tx_space = (adapter->max_frame_size +
886 sizeof(struct e1000_tx_desc) -
888 min_tx_space = ALIGN(min_tx_space, 1024);
890 /* software strips receive CRC, so leave room for it */
891 min_rx_space = adapter->max_frame_size;
892 min_rx_space = ALIGN(min_rx_space, 1024);
895 /* If current Tx allocation is less than the min Tx FIFO size,
896 * and the min Tx FIFO size is less than the current Rx FIFO
897 * allocation, take space away from current Rx allocation */
898 if (tx_space < min_tx_space &&
899 ((min_tx_space - tx_space) < pba)) {
900 pba = pba - (min_tx_space - tx_space);
902 /* if short on rx space, rx wins and must trump tx
904 if (pba < min_rx_space)
907 wr32(E1000_PBA, pba);
910 /* flow control settings */
911 /* The high water mark must be low enough to fit one full frame
912 * (or the size used for early receive) above it in the Rx FIFO.
913 * Set it to the lower of:
914 * - 90% of the Rx FIFO size, or
915 * - the full Rx FIFO size minus one full frame */
916 hwm = min(((pba << 10) * 9 / 10),
917 ((pba << 10) - 2 * adapter->max_frame_size));
919 if (mac->type < e1000_82576) {
920 fc->high_water = hwm & 0xFFF8; /* 8-byte granularity */
921 fc->low_water = fc->high_water - 8;
923 fc->high_water = hwm & 0xFFF0; /* 16-byte granularity */
924 fc->low_water = fc->high_water - 16;
926 fc->pause_time = 0xFFFF;
928 fc->type = fc->original_type;
930 /* Allow time for pending master requests to run */
931 adapter->hw.mac.ops.reset_hw(&adapter->hw);
934 if (adapter->hw.mac.ops.init_hw(&adapter->hw))
935 dev_err(&adapter->pdev->dev, "Hardware Error\n");
937 igb_update_mng_vlan(adapter);
939 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
940 wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
942 igb_reset_adaptive(&adapter->hw);
943 if (adapter->hw.phy.ops.get_phy_info)
944 adapter->hw.phy.ops.get_phy_info(&adapter->hw);
948 * igb_is_need_ioport - determine if an adapter needs ioport resources or not
949 * @pdev: PCI device information struct
951 * Returns true if an adapter needs ioport resources
953 static int igb_is_need_ioport(struct pci_dev *pdev)
955 switch (pdev->device) {
956 /* Currently there are no adapters that need ioport resources */
963 * igb_probe - Device Initialization Routine
964 * @pdev: PCI device information struct
965 * @ent: entry in igb_pci_tbl
967 * Returns 0 on success, negative on failure
969 * igb_probe initializes an adapter identified by a pci_dev structure.
970 * The OS initialization, configuring of the adapter private structure,
971 * and a hardware reset occur.
973 static int __devinit igb_probe(struct pci_dev *pdev,
974 const struct pci_device_id *ent)
976 struct net_device *netdev;
977 struct igb_adapter *adapter;
979 const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
980 unsigned long mmio_start, mmio_len;
981 int i, err, pci_using_dac;
983 u16 eeprom_apme_mask = IGB_EEPROM_APME;
985 int bars, need_ioport;
987 /* do not allocate ioport bars when not needed */
988 need_ioport = igb_is_need_ioport(pdev);
990 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
991 err = pci_enable_device(pdev);
993 bars = pci_select_bars(pdev, IORESOURCE_MEM);
994 err = pci_enable_device_mem(pdev);
1000 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
1002 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
1006 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1008 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
1010 dev_err(&pdev->dev, "No usable DMA "
1011 "configuration, aborting\n");
1017 err = pci_request_selected_regions(pdev, bars, igb_driver_name);
1021 pci_set_master(pdev);
1022 pci_save_state(pdev);
1025 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1026 netdev = alloc_etherdev_mq(sizeof(struct igb_adapter), IGB_MAX_TX_QUEUES);
1028 netdev = alloc_etherdev(sizeof(struct igb_adapter));
1029 #endif /* CONFIG_NETDEVICES_MULTIQUEUE */
1031 goto err_alloc_etherdev;
1033 SET_NETDEV_DEV(netdev, &pdev->dev);
1035 pci_set_drvdata(pdev, netdev);
1036 adapter = netdev_priv(netdev);
1037 adapter->netdev = netdev;
1038 adapter->pdev = pdev;
1041 adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE;
1042 adapter->bars = bars;
1043 adapter->need_ioport = need_ioport;
1045 mmio_start = pci_resource_start(pdev, 0);
1046 mmio_len = pci_resource_len(pdev, 0);
1049 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
1050 if (!adapter->hw.hw_addr)
1053 netdev->open = &igb_open;
1054 netdev->stop = &igb_close;
1055 netdev->get_stats = &igb_get_stats;
1056 netdev->set_multicast_list = &igb_set_multi;
1057 netdev->set_mac_address = &igb_set_mac;
1058 netdev->change_mtu = &igb_change_mtu;
1059 netdev->do_ioctl = &igb_ioctl;
1060 igb_set_ethtool_ops(netdev);
1061 netdev->tx_timeout = &igb_tx_timeout;
1062 netdev->watchdog_timeo = 5 * HZ;
1063 netdev->vlan_rx_register = igb_vlan_rx_register;
1064 netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
1065 netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
1066 #ifdef CONFIG_NET_POLL_CONTROLLER
1067 netdev->poll_controller = igb_netpoll;
1069 netdev->hard_start_xmit = &igb_xmit_frame_adv;
1071 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1073 netdev->mem_start = mmio_start;
1074 netdev->mem_end = mmio_start + mmio_len;
1076 /* PCI config space info */
1077 hw->vendor_id = pdev->vendor;
1078 hw->device_id = pdev->device;
1079 hw->revision_id = pdev->revision;
1080 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1081 hw->subsystem_device_id = pdev->subsystem_device;
1083 /* setup the private structure */
1085 /* Copy the default MAC, PHY and NVM function pointers */
1086 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
1087 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
1088 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
1089 /* Initialize skew-specific constants */
1090 err = ei->get_invariants(hw);
1094 err = igb_sw_init(adapter);
1098 igb_get_bus_info_pcie(hw);
1100 hw->phy.autoneg_wait_to_complete = false;
1101 hw->mac.adaptive_ifs = true;
1103 /* Copper options */
1104 if (hw->phy.media_type == e1000_media_type_copper) {
1105 hw->phy.mdix = AUTO_ALL_MODES;
1106 hw->phy.disable_polarity_correction = false;
1107 hw->phy.ms_type = e1000_ms_hw_default;
1110 if (igb_check_reset_block(hw))
1111 dev_info(&pdev->dev,
1112 "PHY reset is blocked due to SOL/IDER session.\n");
1114 netdev->features = NETIF_F_SG |
1116 NETIF_F_HW_VLAN_TX |
1117 NETIF_F_HW_VLAN_RX |
1118 NETIF_F_HW_VLAN_FILTER;
1120 netdev->features |= NETIF_F_TSO;
1121 netdev->features |= NETIF_F_TSO6;
1123 netdev->vlan_features |= NETIF_F_TSO;
1124 netdev->vlan_features |= NETIF_F_TSO6;
1125 netdev->vlan_features |= NETIF_F_HW_CSUM;
1126 netdev->vlan_features |= NETIF_F_SG;
1129 netdev->features |= NETIF_F_HIGHDMA;
1131 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1132 netdev->features |= NETIF_F_MULTI_QUEUE;
1135 netdev->features |= NETIF_F_LLTX;
1136 adapter->en_mng_pt = igb_enable_mng_pass_thru(&adapter->hw);
1138 /* before reading the NVM, reset the controller to put the device in a
1139 * known good starting state */
1140 hw->mac.ops.reset_hw(hw);
1142 /* make sure the NVM is good */
1143 if (igb_validate_nvm_checksum(hw) < 0) {
1144 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
1149 /* copy the MAC address out of the NVM */
1150 if (hw->mac.ops.read_mac_addr(hw))
1151 dev_err(&pdev->dev, "NVM Read Error\n");
1153 memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
1154 memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
1156 if (!is_valid_ether_addr(netdev->perm_addr)) {
1157 dev_err(&pdev->dev, "Invalid MAC Address\n");
1162 init_timer(&adapter->watchdog_timer);
1163 adapter->watchdog_timer.function = &igb_watchdog;
1164 adapter->watchdog_timer.data = (unsigned long) adapter;
1166 init_timer(&adapter->phy_info_timer);
1167 adapter->phy_info_timer.function = &igb_update_phy_info;
1168 adapter->phy_info_timer.data = (unsigned long) adapter;
1170 INIT_WORK(&adapter->reset_task, igb_reset_task);
1171 INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
1173 /* Initialize link & ring properties that are user-changeable */
1174 adapter->tx_ring->count = 256;
1175 for (i = 0; i < adapter->num_tx_queues; i++)
1176 adapter->tx_ring[i].count = adapter->tx_ring->count;
1177 adapter->rx_ring->count = 256;
1178 for (i = 0; i < adapter->num_rx_queues; i++)
1179 adapter->rx_ring[i].count = adapter->rx_ring->count;
1181 adapter->fc_autoneg = true;
1182 hw->mac.autoneg = true;
1183 hw->phy.autoneg_advertised = 0x2f;
1185 hw->fc.original_type = e1000_fc_default;
1186 hw->fc.type = e1000_fc_default;
1188 adapter->itr_setting = 3;
1189 adapter->itr = IGB_START_ITR;
1191 igb_validate_mdi_setting(hw);
1193 adapter->rx_csum = 1;
1195 /* Initial Wake on LAN setting If APM wake is enabled in the EEPROM,
1196 * enable the ACPI Magic Packet filter
1199 if (hw->bus.func == 0 ||
1200 hw->device_id == E1000_DEV_ID_82575EB_COPPER)
1201 hw->nvm.ops.read_nvm(hw, NVM_INIT_CONTROL3_PORT_A, 1,
1204 if (eeprom_data & eeprom_apme_mask)
1205 adapter->eeprom_wol |= E1000_WUFC_MAG;
1207 /* now that we have the eeprom settings, apply the special cases where
1208 * the eeprom may be wrong or the board simply won't support wake on
1209 * lan on a particular port */
1210 switch (pdev->device) {
1211 case E1000_DEV_ID_82575GB_QUAD_COPPER:
1212 case E1000_DEV_ID_82576_QUAD_COPPER:
1213 adapter->eeprom_wol = 0;
1215 case E1000_DEV_ID_82575EB_FIBER_SERDES:
1216 case E1000_DEV_ID_82576_FIBER:
1217 case E1000_DEV_ID_82576_SERDES:
1218 /* Wake events only supported on port A for dual fiber
1219 * regardless of eeprom setting */
1220 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
1221 adapter->eeprom_wol = 0;
1225 /* initialize the wol settings based on the eeprom settings */
1226 adapter->wol = adapter->eeprom_wol;
1228 /* reset the hardware with the new settings */
1231 /* let the f/w know that the h/w is now under the control of the
1233 igb_get_hw_control(adapter);
1235 /* tell the stack to leave us alone until igb_open() is called */
1236 netif_carrier_off(netdev);
1237 netif_stop_queue(netdev);
1238 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1239 for (i = 0; i < adapter->num_tx_queues; i++)
1240 netif_stop_subqueue(netdev, i);
1243 strcpy(netdev->name, "eth%d");
1244 err = register_netdev(netdev);
1249 if (dca_add_requester(&pdev->dev) == 0) {
1250 adapter->dca_enabled = true;
1251 dev_info(&pdev->dev, "DCA enabled\n");
1252 /* Always use CB2 mode, difference is masked
1253 * in the CB driver. */
1254 wr32(E1000_DCA_CTRL, 2);
1255 igb_setup_dca(adapter);
1259 dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
1260 /* print bus type/speed/width info */
1261 dev_info(&pdev->dev,
1262 "%s: (PCIe:%s:%s) %02x:%02x:%02x:%02x:%02x:%02x\n",
1264 ((hw->bus.speed == e1000_bus_speed_2500)
1265 ? "2.5Gb/s" : "unknown"),
1266 ((hw->bus.width == e1000_bus_width_pcie_x4)
1267 ? "Width x4" : (hw->bus.width == e1000_bus_width_pcie_x1)
1268 ? "Width x1" : "unknown"),
1269 netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
1270 netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
1272 igb_read_part_num(hw, &part_num);
1273 dev_info(&pdev->dev, "%s: PBA No: %06x-%03x\n", netdev->name,
1274 (part_num >> 8), (part_num & 0xff));
1276 dev_info(&pdev->dev,
1277 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
1278 adapter->msix_entries ? "MSI-X" :
1279 adapter->msi_enabled ? "MSI" : "legacy",
1280 adapter->num_rx_queues, adapter->num_tx_queues);
1285 igb_release_hw_control(adapter);
1287 if (!igb_check_reset_block(hw))
1288 hw->phy.ops.reset_phy(hw);
1290 if (hw->flash_address)
1291 iounmap(hw->flash_address);
1293 igb_remove_device(hw);
1294 kfree(adapter->tx_ring);
1295 kfree(adapter->rx_ring);
1298 iounmap(hw->hw_addr);
1300 free_netdev(netdev);
1302 pci_release_selected_regions(pdev, bars);
1305 pci_disable_device(pdev);
1310 * igb_remove - Device Removal Routine
1311 * @pdev: PCI device information struct
1313 * igb_remove is called by the PCI subsystem to alert the driver
1314 * that it should release a PCI device. The could be caused by a
1315 * Hot-Plug event, or because the driver is going to be removed from
1318 static void __devexit igb_remove(struct pci_dev *pdev)
1320 struct net_device *netdev = pci_get_drvdata(pdev);
1321 struct igb_adapter *adapter = netdev_priv(netdev);
1322 struct e1000_hw *hw = &adapter->hw;
1324 /* flush_scheduled work may reschedule our watchdog task, so
1325 * explicitly disable watchdog tasks from being rescheduled */
1326 set_bit(__IGB_DOWN, &adapter->state);
1327 del_timer_sync(&adapter->watchdog_timer);
1328 del_timer_sync(&adapter->phy_info_timer);
1330 flush_scheduled_work();
1333 if (adapter->dca_enabled) {
1334 dev_info(&pdev->dev, "DCA disabled\n");
1335 dca_remove_requester(&pdev->dev);
1336 adapter->dca_enabled = false;
1337 wr32(E1000_DCA_CTRL, 1);
1341 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1342 * would have already happened in close and is redundant. */
1343 igb_release_hw_control(adapter);
1345 unregister_netdev(netdev);
1347 if (!igb_check_reset_block(&adapter->hw))
1348 adapter->hw.phy.ops.reset_phy(&adapter->hw);
1350 igb_remove_device(&adapter->hw);
1351 igb_reset_interrupt_capability(adapter);
1353 kfree(adapter->tx_ring);
1354 kfree(adapter->rx_ring);
1356 iounmap(adapter->hw.hw_addr);
1357 if (adapter->hw.flash_address)
1358 iounmap(adapter->hw.flash_address);
1359 pci_release_selected_regions(pdev, adapter->bars);
1361 free_netdev(netdev);
1363 pci_disable_device(pdev);
1367 * igb_sw_init - Initialize general software structures (struct igb_adapter)
1368 * @adapter: board private structure to initialize
1370 * igb_sw_init initializes the Adapter private data structure.
1371 * Fields are initialized based on PCI device information and
1372 * OS network device settings (MTU size).
1374 static int __devinit igb_sw_init(struct igb_adapter *adapter)
1376 struct e1000_hw *hw = &adapter->hw;
1377 struct net_device *netdev = adapter->netdev;
1378 struct pci_dev *pdev = adapter->pdev;
1380 pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
1382 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1383 adapter->rx_ps_hdr_size = 0; /* disable packet split */
1384 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1385 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
1387 /* Number of supported queues. */
1388 /* Having more queues than CPUs doesn't make sense. */
1389 adapter->num_rx_queues = min((u32)IGB_MAX_RX_QUEUES, (u32)num_online_cpus());
1390 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1391 adapter->num_tx_queues = min(IGB_MAX_TX_QUEUES, num_online_cpus());
1393 adapter->num_tx_queues = 1;
1394 #endif /* CONFIG_NET_MULTI_QUEUE_DEVICE */
1396 /* This call may decrease the number of queues depending on
1397 * interrupt mode. */
1398 igb_set_interrupt_capability(adapter);
1400 if (igb_alloc_queues(adapter)) {
1401 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
1405 /* Explicitly disable IRQ since the NIC can be in any state. */
1406 igb_irq_disable(adapter);
1408 set_bit(__IGB_DOWN, &adapter->state);
1413 * igb_open - Called when a network interface is made active
1414 * @netdev: network interface device structure
1416 * Returns 0 on success, negative value on failure
1418 * The open entry point is called when a network interface is made
1419 * active by the system (IFF_UP). At this point all resources needed
1420 * for transmit and receive operations are allocated, the interrupt
1421 * handler is registered with the OS, the watchdog timer is started,
1422 * and the stack is notified that the interface is ready.
1424 static int igb_open(struct net_device *netdev)
1426 struct igb_adapter *adapter = netdev_priv(netdev);
1427 struct e1000_hw *hw = &adapter->hw;
1431 /* disallow open during test */
1432 if (test_bit(__IGB_TESTING, &adapter->state))
1435 /* allocate transmit descriptors */
1436 err = igb_setup_all_tx_resources(adapter);
1440 /* allocate receive descriptors */
1441 err = igb_setup_all_rx_resources(adapter);
1445 /* e1000_power_up_phy(adapter); */
1447 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1448 if ((adapter->hw.mng_cookie.status &
1449 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
1450 igb_update_mng_vlan(adapter);
1452 /* before we allocate an interrupt, we must be ready to handle it.
1453 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1454 * as soon as we call pci_request_irq, so we have to setup our
1455 * clean_rx handler before we do so. */
1456 igb_configure(adapter);
1458 err = igb_request_irq(adapter);
1462 /* From here on the code is the same as igb_up() */
1463 clear_bit(__IGB_DOWN, &adapter->state);
1465 for (i = 0; i < adapter->num_rx_queues; i++)
1466 napi_enable(&adapter->rx_ring[i].napi);
1468 /* Clear any pending interrupts. */
1471 igb_irq_enable(adapter);
1473 /* Fire a link status change interrupt to start the watchdog. */
1474 wr32(E1000_ICS, E1000_ICS_LSC);
1479 igb_release_hw_control(adapter);
1480 /* e1000_power_down_phy(adapter); */
1481 igb_free_all_rx_resources(adapter);
1483 igb_free_all_tx_resources(adapter);
1491 * igb_close - Disables a network interface
1492 * @netdev: network interface device structure
1494 * Returns 0, this is not allowed to fail
1496 * The close entry point is called when an interface is de-activated
1497 * by the OS. The hardware is still under the driver's control, but
1498 * needs to be disabled. A global MAC reset is issued to stop the
1499 * hardware, and all transmit and receive resources are freed.
1501 static int igb_close(struct net_device *netdev)
1503 struct igb_adapter *adapter = netdev_priv(netdev);
1505 WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
1508 igb_free_irq(adapter);
1510 igb_free_all_tx_resources(adapter);
1511 igb_free_all_rx_resources(adapter);
1513 /* kill manageability vlan ID if supported, but not if a vlan with
1514 * the same ID is registered on the host OS (let 8021q kill it) */
1515 if ((adapter->hw.mng_cookie.status &
1516 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
1518 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
1519 igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1525 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
1526 * @adapter: board private structure
1527 * @tx_ring: tx descriptor ring (for a specific queue) to setup
1529 * Return 0 on success, negative on failure
1532 int igb_setup_tx_resources(struct igb_adapter *adapter,
1533 struct igb_ring *tx_ring)
1535 struct pci_dev *pdev = adapter->pdev;
1538 size = sizeof(struct igb_buffer) * tx_ring->count;
1539 tx_ring->buffer_info = vmalloc(size);
1540 if (!tx_ring->buffer_info)
1542 memset(tx_ring->buffer_info, 0, size);
1544 /* round up to nearest 4K */
1545 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc)
1547 tx_ring->size = ALIGN(tx_ring->size, 4096);
1549 tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
1555 tx_ring->adapter = adapter;
1556 tx_ring->next_to_use = 0;
1557 tx_ring->next_to_clean = 0;
1561 vfree(tx_ring->buffer_info);
1562 dev_err(&adapter->pdev->dev,
1563 "Unable to allocate memory for the transmit descriptor ring\n");
1568 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
1569 * (Descriptors) for all queues
1570 * @adapter: board private structure
1572 * Return 0 on success, negative on failure
1574 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
1577 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1581 for (i = 0; i < adapter->num_tx_queues; i++) {
1582 err = igb_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1584 dev_err(&adapter->pdev->dev,
1585 "Allocation for Tx Queue %u failed\n", i);
1586 for (i--; i >= 0; i--)
1587 igb_free_tx_resources(&adapter->tx_ring[i]);
1592 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1593 for (i = 0; i < IGB_MAX_TX_QUEUES; i++) {
1594 r_idx = i % adapter->num_tx_queues;
1595 adapter->multi_tx_table[i] = &adapter->tx_ring[r_idx];
1602 * igb_configure_tx - Configure transmit Unit after Reset
1603 * @adapter: board private structure
1605 * Configure the Tx unit of the MAC after a reset.
1607 static void igb_configure_tx(struct igb_adapter *adapter)
1610 struct e1000_hw *hw = &adapter->hw;
1615 for (i = 0; i < adapter->num_tx_queues; i++) {
1616 struct igb_ring *ring = &(adapter->tx_ring[i]);
1618 wr32(E1000_TDLEN(i),
1619 ring->count * sizeof(struct e1000_tx_desc));
1621 wr32(E1000_TDBAL(i),
1622 tdba & 0x00000000ffffffffULL);
1623 wr32(E1000_TDBAH(i), tdba >> 32);
1625 tdwba = ring->dma + ring->count * sizeof(struct e1000_tx_desc);
1626 tdwba |= 1; /* enable head wb */
1627 wr32(E1000_TDWBAL(i),
1628 tdwba & 0x00000000ffffffffULL);
1629 wr32(E1000_TDWBAH(i), tdwba >> 32);
1631 ring->head = E1000_TDH(i);
1632 ring->tail = E1000_TDT(i);
1633 writel(0, hw->hw_addr + ring->tail);
1634 writel(0, hw->hw_addr + ring->head);
1635 txdctl = rd32(E1000_TXDCTL(i));
1636 txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
1637 wr32(E1000_TXDCTL(i), txdctl);
1639 /* Turn off Relaxed Ordering on head write-backs. The
1640 * writebacks MUST be delivered in order or it will
1641 * completely screw up our bookeeping.
1643 txctrl = rd32(E1000_DCA_TXCTRL(i));
1644 txctrl &= ~E1000_DCA_TXCTRL_TX_WB_RO_EN;
1645 wr32(E1000_DCA_TXCTRL(i), txctrl);
1650 /* Use the default values for the Tx Inter Packet Gap (IPG) timer */
1652 /* Program the Transmit Control Register */
1654 tctl = rd32(E1000_TCTL);
1655 tctl &= ~E1000_TCTL_CT;
1656 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1657 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1659 igb_config_collision_dist(hw);
1661 /* Setup Transmit Descriptor Settings for eop descriptor */
1662 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_RS;
1664 /* Enable transmits */
1665 tctl |= E1000_TCTL_EN;
1667 wr32(E1000_TCTL, tctl);
1671 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
1672 * @adapter: board private structure
1673 * @rx_ring: rx descriptor ring (for a specific queue) to setup
1675 * Returns 0 on success, negative on failure
1678 int igb_setup_rx_resources(struct igb_adapter *adapter,
1679 struct igb_ring *rx_ring)
1681 struct pci_dev *pdev = adapter->pdev;
1684 size = sizeof(struct igb_buffer) * rx_ring->count;
1685 rx_ring->buffer_info = vmalloc(size);
1686 if (!rx_ring->buffer_info)
1688 memset(rx_ring->buffer_info, 0, size);
1690 desc_len = sizeof(union e1000_adv_rx_desc);
1692 /* Round up to nearest 4K */
1693 rx_ring->size = rx_ring->count * desc_len;
1694 rx_ring->size = ALIGN(rx_ring->size, 4096);
1696 rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size,
1702 rx_ring->next_to_clean = 0;
1703 rx_ring->next_to_use = 0;
1704 rx_ring->pending_skb = NULL;
1706 rx_ring->adapter = adapter;
1711 vfree(rx_ring->buffer_info);
1712 dev_err(&adapter->pdev->dev, "Unable to allocate memory for "
1713 "the receive descriptor ring\n");
1718 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
1719 * (Descriptors) for all queues
1720 * @adapter: board private structure
1722 * Return 0 on success, negative on failure
1724 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
1728 for (i = 0; i < adapter->num_rx_queues; i++) {
1729 err = igb_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1731 dev_err(&adapter->pdev->dev,
1732 "Allocation for Rx Queue %u failed\n", i);
1733 for (i--; i >= 0; i--)
1734 igb_free_rx_resources(&adapter->rx_ring[i]);
1743 * igb_setup_rctl - configure the receive control registers
1744 * @adapter: Board private structure
1746 static void igb_setup_rctl(struct igb_adapter *adapter)
1748 struct e1000_hw *hw = &adapter->hw;
1753 rctl = rd32(E1000_RCTL);
1755 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1757 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1758 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1759 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
1762 * enable stripping of CRC. It's unlikely this will break BMC
1763 * redirection as it did with e1000. Newer features require
1764 * that the HW strips the CRC.
1766 rctl |= E1000_RCTL_SECRC;
1768 rctl &= ~E1000_RCTL_SBP;
1770 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1771 rctl &= ~E1000_RCTL_LPE;
1773 rctl |= E1000_RCTL_LPE;
1774 if (adapter->rx_buffer_len <= IGB_RXBUFFER_2048) {
1775 /* Setup buffer sizes */
1776 rctl &= ~E1000_RCTL_SZ_4096;
1777 rctl |= E1000_RCTL_BSEX;
1778 switch (adapter->rx_buffer_len) {
1779 case IGB_RXBUFFER_256:
1780 rctl |= E1000_RCTL_SZ_256;
1781 rctl &= ~E1000_RCTL_BSEX;
1783 case IGB_RXBUFFER_512:
1784 rctl |= E1000_RCTL_SZ_512;
1785 rctl &= ~E1000_RCTL_BSEX;
1787 case IGB_RXBUFFER_1024:
1788 rctl |= E1000_RCTL_SZ_1024;
1789 rctl &= ~E1000_RCTL_BSEX;
1791 case IGB_RXBUFFER_2048:
1793 rctl |= E1000_RCTL_SZ_2048;
1794 rctl &= ~E1000_RCTL_BSEX;
1796 case IGB_RXBUFFER_4096:
1797 rctl |= E1000_RCTL_SZ_4096;
1799 case IGB_RXBUFFER_8192:
1800 rctl |= E1000_RCTL_SZ_8192;
1802 case IGB_RXBUFFER_16384:
1803 rctl |= E1000_RCTL_SZ_16384;
1807 rctl &= ~E1000_RCTL_BSEX;
1808 srrctl = adapter->rx_buffer_len >> E1000_SRRCTL_BSIZEPKT_SHIFT;
1811 /* 82575 and greater support packet-split where the protocol
1812 * header is placed in skb->data and the packet data is
1813 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1814 * In the case of a non-split, skb->data is linearly filled,
1815 * followed by the page buffers. Therefore, skb->data is
1816 * sized to hold the largest protocol header.
1818 /* allocations using alloc_page take too long for regular MTU
1819 * so only enable packet split for jumbo frames */
1820 if (rctl & E1000_RCTL_LPE) {
1821 adapter->rx_ps_hdr_size = IGB_RXBUFFER_128;
1822 srrctl = adapter->rx_ps_hdr_size <<
1823 E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
1824 /* buffer size is ALWAYS one page */
1825 srrctl |= PAGE_SIZE >> E1000_SRRCTL_BSIZEPKT_SHIFT;
1826 srrctl |= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1828 adapter->rx_ps_hdr_size = 0;
1829 srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
1832 for (i = 0; i < adapter->num_rx_queues; i++)
1833 wr32(E1000_SRRCTL(i), srrctl);
1835 wr32(E1000_RCTL, rctl);
1839 * igb_configure_rx - Configure receive Unit after Reset
1840 * @adapter: board private structure
1842 * Configure the Rx unit of the MAC after a reset.
1844 static void igb_configure_rx(struct igb_adapter *adapter)
1847 struct e1000_hw *hw = &adapter->hw;
1852 /* disable receives while setting up the descriptors */
1853 rctl = rd32(E1000_RCTL);
1854 wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1858 if (adapter->itr_setting > 3)
1860 1000000000 / (adapter->itr * 256));
1862 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1863 * the Base and Length of the Rx Descriptor Ring */
1864 for (i = 0; i < adapter->num_rx_queues; i++) {
1865 struct igb_ring *ring = &(adapter->rx_ring[i]);
1867 wr32(E1000_RDBAL(i),
1868 rdba & 0x00000000ffffffffULL);
1869 wr32(E1000_RDBAH(i), rdba >> 32);
1870 wr32(E1000_RDLEN(i),
1871 ring->count * sizeof(union e1000_adv_rx_desc));
1873 ring->head = E1000_RDH(i);
1874 ring->tail = E1000_RDT(i);
1875 writel(0, hw->hw_addr + ring->tail);
1876 writel(0, hw->hw_addr + ring->head);
1878 rxdctl = rd32(E1000_RXDCTL(i));
1879 rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
1880 rxdctl &= 0xFFF00000;
1881 rxdctl |= IGB_RX_PTHRESH;
1882 rxdctl |= IGB_RX_HTHRESH << 8;
1883 rxdctl |= IGB_RX_WTHRESH << 16;
1884 wr32(E1000_RXDCTL(i), rxdctl);
1887 if (adapter->num_rx_queues > 1) {
1896 get_random_bytes(&random[0], 40);
1898 if (hw->mac.type >= e1000_82576)
1902 for (j = 0; j < (32 * 4); j++) {
1904 (j % adapter->num_rx_queues) << shift;
1907 hw->hw_addr + E1000_RETA(0) + (j & ~3));
1909 mrqc = E1000_MRQC_ENABLE_RSS_4Q;
1911 /* Fill out hash function seeds */
1912 for (j = 0; j < 10; j++)
1913 array_wr32(E1000_RSSRK(0), j, random[j]);
1915 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
1916 E1000_MRQC_RSS_FIELD_IPV4_TCP);
1917 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6 |
1918 E1000_MRQC_RSS_FIELD_IPV6_TCP);
1919 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4_UDP |
1920 E1000_MRQC_RSS_FIELD_IPV6_UDP);
1921 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6_UDP_EX |
1922 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
1925 wr32(E1000_MRQC, mrqc);
1927 /* Multiqueue and raw packet checksumming are mutually
1928 * exclusive. Note that this not the same as TCP/IP
1929 * checksumming, which works fine. */
1930 rxcsum = rd32(E1000_RXCSUM);
1931 rxcsum |= E1000_RXCSUM_PCSD;
1932 wr32(E1000_RXCSUM, rxcsum);
1934 /* Enable Receive Checksum Offload for TCP and UDP */
1935 rxcsum = rd32(E1000_RXCSUM);
1936 if (adapter->rx_csum) {
1937 rxcsum |= E1000_RXCSUM_TUOFL;
1939 /* Enable IPv4 payload checksum for UDP fragments
1940 * Must be used in conjunction with packet-split. */
1941 if (adapter->rx_ps_hdr_size)
1942 rxcsum |= E1000_RXCSUM_IPPCSE;
1944 rxcsum &= ~E1000_RXCSUM_TUOFL;
1945 /* don't need to clear IPPCSE as it defaults to 0 */
1947 wr32(E1000_RXCSUM, rxcsum);
1952 adapter->max_frame_size + VLAN_TAG_SIZE);
1954 wr32(E1000_RLPML, adapter->max_frame_size);
1956 /* Enable Receives */
1957 wr32(E1000_RCTL, rctl);
1961 * igb_free_tx_resources - Free Tx Resources per Queue
1962 * @adapter: board private structure
1963 * @tx_ring: Tx descriptor ring for a specific queue
1965 * Free all transmit software resources
1967 static void igb_free_tx_resources(struct igb_ring *tx_ring)
1969 struct pci_dev *pdev = tx_ring->adapter->pdev;
1971 igb_clean_tx_ring(tx_ring);
1973 vfree(tx_ring->buffer_info);
1974 tx_ring->buffer_info = NULL;
1976 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1978 tx_ring->desc = NULL;
1982 * igb_free_all_tx_resources - Free Tx Resources for All Queues
1983 * @adapter: board private structure
1985 * Free all transmit software resources
1987 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
1991 for (i = 0; i < adapter->num_tx_queues; i++)
1992 igb_free_tx_resources(&adapter->tx_ring[i]);
1995 static void igb_unmap_and_free_tx_resource(struct igb_adapter *adapter,
1996 struct igb_buffer *buffer_info)
1998 if (buffer_info->dma) {
1999 pci_unmap_page(adapter->pdev,
2001 buffer_info->length,
2003 buffer_info->dma = 0;
2005 if (buffer_info->skb) {
2006 dev_kfree_skb_any(buffer_info->skb);
2007 buffer_info->skb = NULL;
2009 buffer_info->time_stamp = 0;
2010 /* buffer_info must be completely set up in the transmit path */
2014 * igb_clean_tx_ring - Free Tx Buffers
2015 * @adapter: board private structure
2016 * @tx_ring: ring to be cleaned
2018 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
2020 struct igb_adapter *adapter = tx_ring->adapter;
2021 struct igb_buffer *buffer_info;
2025 if (!tx_ring->buffer_info)
2027 /* Free all the Tx ring sk_buffs */
2029 for (i = 0; i < tx_ring->count; i++) {
2030 buffer_info = &tx_ring->buffer_info[i];
2031 igb_unmap_and_free_tx_resource(adapter, buffer_info);
2034 size = sizeof(struct igb_buffer) * tx_ring->count;
2035 memset(tx_ring->buffer_info, 0, size);
2037 /* Zero out the descriptor ring */
2039 memset(tx_ring->desc, 0, tx_ring->size);
2041 tx_ring->next_to_use = 0;
2042 tx_ring->next_to_clean = 0;
2044 writel(0, adapter->hw.hw_addr + tx_ring->head);
2045 writel(0, adapter->hw.hw_addr + tx_ring->tail);
2049 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
2050 * @adapter: board private structure
2052 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
2056 for (i = 0; i < adapter->num_tx_queues; i++)
2057 igb_clean_tx_ring(&adapter->tx_ring[i]);
2061 * igb_free_rx_resources - Free Rx Resources
2062 * @adapter: board private structure
2063 * @rx_ring: ring to clean the resources from
2065 * Free all receive software resources
2067 static void igb_free_rx_resources(struct igb_ring *rx_ring)
2069 struct pci_dev *pdev = rx_ring->adapter->pdev;
2071 igb_clean_rx_ring(rx_ring);
2073 vfree(rx_ring->buffer_info);
2074 rx_ring->buffer_info = NULL;
2076 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2078 rx_ring->desc = NULL;
2082 * igb_free_all_rx_resources - Free Rx Resources for All Queues
2083 * @adapter: board private structure
2085 * Free all receive software resources
2087 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
2091 for (i = 0; i < adapter->num_rx_queues; i++)
2092 igb_free_rx_resources(&adapter->rx_ring[i]);
2096 * igb_clean_rx_ring - Free Rx Buffers per Queue
2097 * @adapter: board private structure
2098 * @rx_ring: ring to free buffers from
2100 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
2102 struct igb_adapter *adapter = rx_ring->adapter;
2103 struct igb_buffer *buffer_info;
2104 struct pci_dev *pdev = adapter->pdev;
2108 if (!rx_ring->buffer_info)
2110 /* Free all the Rx ring sk_buffs */
2111 for (i = 0; i < rx_ring->count; i++) {
2112 buffer_info = &rx_ring->buffer_info[i];
2113 if (buffer_info->dma) {
2114 if (adapter->rx_ps_hdr_size)
2115 pci_unmap_single(pdev, buffer_info->dma,
2116 adapter->rx_ps_hdr_size,
2117 PCI_DMA_FROMDEVICE);
2119 pci_unmap_single(pdev, buffer_info->dma,
2120 adapter->rx_buffer_len,
2121 PCI_DMA_FROMDEVICE);
2122 buffer_info->dma = 0;
2125 if (buffer_info->skb) {
2126 dev_kfree_skb(buffer_info->skb);
2127 buffer_info->skb = NULL;
2129 if (buffer_info->page) {
2130 pci_unmap_page(pdev, buffer_info->page_dma,
2131 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2132 put_page(buffer_info->page);
2133 buffer_info->page = NULL;
2134 buffer_info->page_dma = 0;
2138 /* there also may be some cached data from a chained receive */
2139 if (rx_ring->pending_skb) {
2140 dev_kfree_skb(rx_ring->pending_skb);
2141 rx_ring->pending_skb = NULL;
2144 size = sizeof(struct igb_buffer) * rx_ring->count;
2145 memset(rx_ring->buffer_info, 0, size);
2147 /* Zero out the descriptor ring */
2148 memset(rx_ring->desc, 0, rx_ring->size);
2150 rx_ring->next_to_clean = 0;
2151 rx_ring->next_to_use = 0;
2153 writel(0, adapter->hw.hw_addr + rx_ring->head);
2154 writel(0, adapter->hw.hw_addr + rx_ring->tail);
2158 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
2159 * @adapter: board private structure
2161 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
2165 for (i = 0; i < adapter->num_rx_queues; i++)
2166 igb_clean_rx_ring(&adapter->rx_ring[i]);
2170 * igb_set_mac - Change the Ethernet Address of the NIC
2171 * @netdev: network interface device structure
2172 * @p: pointer to an address structure
2174 * Returns 0 on success, negative on failure
2176 static int igb_set_mac(struct net_device *netdev, void *p)
2178 struct igb_adapter *adapter = netdev_priv(netdev);
2179 struct sockaddr *addr = p;
2181 if (!is_valid_ether_addr(addr->sa_data))
2182 return -EADDRNOTAVAIL;
2184 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2185 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
2187 adapter->hw.mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
2193 * igb_set_multi - Multicast and Promiscuous mode set
2194 * @netdev: network interface device structure
2196 * The set_multi entry point is called whenever the multicast address
2197 * list or the network interface flags are updated. This routine is
2198 * responsible for configuring the hardware for proper multicast,
2199 * promiscuous mode, and all-multi behavior.
2201 static void igb_set_multi(struct net_device *netdev)
2203 struct igb_adapter *adapter = netdev_priv(netdev);
2204 struct e1000_hw *hw = &adapter->hw;
2205 struct e1000_mac_info *mac = &hw->mac;
2206 struct dev_mc_list *mc_ptr;
2211 /* Check for Promiscuous and All Multicast modes */
2213 rctl = rd32(E1000_RCTL);
2215 if (netdev->flags & IFF_PROMISC)
2216 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2217 else if (netdev->flags & IFF_ALLMULTI) {
2218 rctl |= E1000_RCTL_MPE;
2219 rctl &= ~E1000_RCTL_UPE;
2221 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2223 wr32(E1000_RCTL, rctl);
2225 if (!netdev->mc_count) {
2226 /* nothing to program, so clear mc list */
2227 igb_update_mc_addr_list_82575(hw, NULL, 0, 1,
2228 mac->rar_entry_count);
2232 mta_list = kzalloc(netdev->mc_count * 6, GFP_ATOMIC);
2236 /* The shared function expects a packed array of only addresses. */
2237 mc_ptr = netdev->mc_list;
2239 for (i = 0; i < netdev->mc_count; i++) {
2242 memcpy(mta_list + (i*ETH_ALEN), mc_ptr->dmi_addr, ETH_ALEN);
2243 mc_ptr = mc_ptr->next;
2245 igb_update_mc_addr_list_82575(hw, mta_list, i, 1,
2246 mac->rar_entry_count);
2250 /* Need to wait a few seconds after link up to get diagnostic information from
2252 static void igb_update_phy_info(unsigned long data)
2254 struct igb_adapter *adapter = (struct igb_adapter *) data;
2255 if (adapter->hw.phy.ops.get_phy_info)
2256 adapter->hw.phy.ops.get_phy_info(&adapter->hw);
2260 * igb_watchdog - Timer Call-back
2261 * @data: pointer to adapter cast into an unsigned long
2263 static void igb_watchdog(unsigned long data)
2265 struct igb_adapter *adapter = (struct igb_adapter *)data;
2266 /* Do the rest outside of interrupt context */
2267 schedule_work(&adapter->watchdog_task);
2270 static void igb_watchdog_task(struct work_struct *work)
2272 struct igb_adapter *adapter = container_of(work,
2273 struct igb_adapter, watchdog_task);
2274 struct e1000_hw *hw = &adapter->hw;
2276 struct net_device *netdev = adapter->netdev;
2277 struct igb_ring *tx_ring = adapter->tx_ring;
2278 struct e1000_mac_info *mac = &adapter->hw.mac;
2281 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2285 if ((netif_carrier_ok(netdev)) &&
2286 (rd32(E1000_STATUS) & E1000_STATUS_LU))
2289 ret_val = hw->mac.ops.check_for_link(&adapter->hw);
2290 if ((ret_val == E1000_ERR_PHY) &&
2291 (hw->phy.type == e1000_phy_igp_3) &&
2293 E1000_PHY_CTRL_GBE_DISABLE))
2294 dev_info(&adapter->pdev->dev,
2295 "Gigabit has been disabled, downgrading speed\n");
2297 if ((hw->phy.media_type == e1000_media_type_internal_serdes) &&
2298 !(rd32(E1000_TXCW) & E1000_TXCW_ANE))
2299 link = mac->serdes_has_link;
2301 link = rd32(E1000_STATUS) &
2305 if (!netif_carrier_ok(netdev)) {
2307 hw->mac.ops.get_speed_and_duplex(&adapter->hw,
2308 &adapter->link_speed,
2309 &adapter->link_duplex);
2311 ctrl = rd32(E1000_CTRL);
2312 dev_info(&adapter->pdev->dev,
2313 "NIC Link is Up %d Mbps %s, "
2314 "Flow Control: %s\n",
2315 adapter->link_speed,
2316 adapter->link_duplex == FULL_DUPLEX ?
2317 "Full Duplex" : "Half Duplex",
2318 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2319 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2320 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2321 E1000_CTRL_TFCE) ? "TX" : "None")));
2323 /* tweak tx_queue_len according to speed/duplex and
2324 * adjust the timeout factor */
2325 netdev->tx_queue_len = adapter->tx_queue_len;
2326 adapter->tx_timeout_factor = 1;
2327 switch (adapter->link_speed) {
2329 netdev->tx_queue_len = 10;
2330 adapter->tx_timeout_factor = 14;
2333 netdev->tx_queue_len = 100;
2334 /* maybe add some timeout factor ? */
2338 netif_carrier_on(netdev);
2339 netif_wake_queue(netdev);
2340 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2341 for (i = 0; i < adapter->num_tx_queues; i++)
2342 netif_wake_subqueue(netdev, i);
2345 if (!test_bit(__IGB_DOWN, &adapter->state))
2346 mod_timer(&adapter->phy_info_timer,
2347 round_jiffies(jiffies + 2 * HZ));
2350 if (netif_carrier_ok(netdev)) {
2351 adapter->link_speed = 0;
2352 adapter->link_duplex = 0;
2353 dev_info(&adapter->pdev->dev, "NIC Link is Down\n");
2354 netif_carrier_off(netdev);
2355 netif_stop_queue(netdev);
2356 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2357 for (i = 0; i < adapter->num_tx_queues; i++)
2358 netif_stop_subqueue(netdev, i);
2360 if (!test_bit(__IGB_DOWN, &adapter->state))
2361 mod_timer(&adapter->phy_info_timer,
2362 round_jiffies(jiffies + 2 * HZ));
2367 igb_update_stats(adapter);
2369 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2370 adapter->tpt_old = adapter->stats.tpt;
2371 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
2372 adapter->colc_old = adapter->stats.colc;
2374 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
2375 adapter->gorc_old = adapter->stats.gorc;
2376 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
2377 adapter->gotc_old = adapter->stats.gotc;
2379 igb_update_adaptive(&adapter->hw);
2381 if (!netif_carrier_ok(netdev)) {
2382 if (IGB_DESC_UNUSED(tx_ring) + 1 < tx_ring->count) {
2383 /* We've lost link, so the controller stops DMA,
2384 * but we've got queued Tx work that's never going
2385 * to get done, so reset controller to flush Tx.
2386 * (Do the reset outside of interrupt context). */
2387 adapter->tx_timeout_count++;
2388 schedule_work(&adapter->reset_task);
2392 /* Cause software interrupt to ensure rx ring is cleaned */
2393 wr32(E1000_ICS, E1000_ICS_RXDMT0);
2395 /* Force detection of hung controller every watchdog period */
2396 tx_ring->detect_tx_hung = true;
2398 /* Reset the timer */
2399 if (!test_bit(__IGB_DOWN, &adapter->state))
2400 mod_timer(&adapter->watchdog_timer,
2401 round_jiffies(jiffies + 2 * HZ));
2404 enum latency_range {
2408 latency_invalid = 255
2412 static void igb_lower_rx_eitr(struct igb_adapter *adapter,
2413 struct igb_ring *rx_ring)
2415 struct e1000_hw *hw = &adapter->hw;
2418 new_val = rx_ring->itr_val / 2;
2419 if (new_val < IGB_MIN_DYN_ITR)
2420 new_val = IGB_MIN_DYN_ITR;
2422 if (new_val != rx_ring->itr_val) {
2423 rx_ring->itr_val = new_val;
2424 wr32(rx_ring->itr_register,
2425 1000000000 / (new_val * 256));
2429 static void igb_raise_rx_eitr(struct igb_adapter *adapter,
2430 struct igb_ring *rx_ring)
2432 struct e1000_hw *hw = &adapter->hw;
2435 new_val = rx_ring->itr_val * 2;
2436 if (new_val > IGB_MAX_DYN_ITR)
2437 new_val = IGB_MAX_DYN_ITR;
2439 if (new_val != rx_ring->itr_val) {
2440 rx_ring->itr_val = new_val;
2441 wr32(rx_ring->itr_register,
2442 1000000000 / (new_val * 256));
2447 * igb_update_itr - update the dynamic ITR value based on statistics
2448 * Stores a new ITR value based on packets and byte
2449 * counts during the last interrupt. The advantage of per interrupt
2450 * computation is faster updates and more accurate ITR for the current
2451 * traffic pattern. Constants in this function were computed
2452 * based on theoretical maximum wire speed and thresholds were set based
2453 * on testing data as well as attempting to minimize response time
2454 * while increasing bulk throughput.
2455 * this functionality is controlled by the InterruptThrottleRate module
2456 * parameter (see igb_param.c)
2457 * NOTE: These calculations are only valid when operating in a single-
2458 * queue environment.
2459 * @adapter: pointer to adapter
2460 * @itr_setting: current adapter->itr
2461 * @packets: the number of packets during this measurement interval
2462 * @bytes: the number of bytes during this measurement interval
2464 static unsigned int igb_update_itr(struct igb_adapter *adapter, u16 itr_setting,
2465 int packets, int bytes)
2467 unsigned int retval = itr_setting;
2470 goto update_itr_done;
2472 switch (itr_setting) {
2473 case lowest_latency:
2474 /* handle TSO and jumbo frames */
2475 if (bytes/packets > 8000)
2476 retval = bulk_latency;
2477 else if ((packets < 5) && (bytes > 512))
2478 retval = low_latency;
2480 case low_latency: /* 50 usec aka 20000 ints/s */
2481 if (bytes > 10000) {
2482 /* this if handles the TSO accounting */
2483 if (bytes/packets > 8000) {
2484 retval = bulk_latency;
2485 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
2486 retval = bulk_latency;
2487 } else if ((packets > 35)) {
2488 retval = lowest_latency;
2490 } else if (bytes/packets > 2000) {
2491 retval = bulk_latency;
2492 } else if (packets <= 2 && bytes < 512) {
2493 retval = lowest_latency;
2496 case bulk_latency: /* 250 usec aka 4000 ints/s */
2497 if (bytes > 25000) {
2499 retval = low_latency;
2500 } else if (bytes < 6000) {
2501 retval = low_latency;
2510 static void igb_set_itr(struct igb_adapter *adapter, u16 itr_register,
2514 u32 new_itr = adapter->itr;
2516 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2517 if (adapter->link_speed != SPEED_1000) {
2523 adapter->rx_itr = igb_update_itr(adapter,
2525 adapter->rx_ring->total_packets,
2526 adapter->rx_ring->total_bytes);
2527 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2528 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2529 adapter->rx_itr = low_latency;
2532 adapter->tx_itr = igb_update_itr(adapter,
2534 adapter->tx_ring->total_packets,
2535 adapter->tx_ring->total_bytes);
2536 /* conservative mode (itr 3) eliminates the
2537 * lowest_latency setting */
2538 if (adapter->itr_setting == 3 &&
2539 adapter->tx_itr == lowest_latency)
2540 adapter->tx_itr = low_latency;
2542 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2544 current_itr = adapter->rx_itr;
2547 switch (current_itr) {
2548 /* counts and packets in update_itr are dependent on these numbers */
2549 case lowest_latency:
2553 new_itr = 20000; /* aka hwitr = ~200 */
2563 if (new_itr != adapter->itr) {
2564 /* this attempts to bias the interrupt rate towards Bulk
2565 * by adding intermediate steps when interrupt rate is
2567 new_itr = new_itr > adapter->itr ?
2568 min(adapter->itr + (new_itr >> 2), new_itr) :
2570 /* Don't write the value here; it resets the adapter's
2571 * internal timer, and causes us to delay far longer than
2572 * we should between interrupts. Instead, we write the ITR
2573 * value at the beginning of the next interrupt so the timing
2574 * ends up being correct.
2576 adapter->itr = new_itr;
2577 adapter->set_itr = 1;
2584 #define IGB_TX_FLAGS_CSUM 0x00000001
2585 #define IGB_TX_FLAGS_VLAN 0x00000002
2586 #define IGB_TX_FLAGS_TSO 0x00000004
2587 #define IGB_TX_FLAGS_IPV4 0x00000008
2588 #define IGB_TX_FLAGS_VLAN_MASK 0xffff0000
2589 #define IGB_TX_FLAGS_VLAN_SHIFT 16
2591 static inline int igb_tso_adv(struct igb_adapter *adapter,
2592 struct igb_ring *tx_ring,
2593 struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
2595 struct e1000_adv_tx_context_desc *context_desc;
2598 struct igb_buffer *buffer_info;
2599 u32 info = 0, tu_cmd = 0;
2600 u32 mss_l4len_idx, l4len;
2603 if (skb_header_cloned(skb)) {
2604 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2609 l4len = tcp_hdrlen(skb);
2612 if (skb->protocol == htons(ETH_P_IP)) {
2613 struct iphdr *iph = ip_hdr(skb);
2616 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2620 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
2621 ipv6_hdr(skb)->payload_len = 0;
2622 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2623 &ipv6_hdr(skb)->daddr,
2627 i = tx_ring->next_to_use;
2629 buffer_info = &tx_ring->buffer_info[i];
2630 context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2631 /* VLAN MACLEN IPLEN */
2632 if (tx_flags & IGB_TX_FLAGS_VLAN)
2633 info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2634 info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2635 *hdr_len += skb_network_offset(skb);
2636 info |= skb_network_header_len(skb);
2637 *hdr_len += skb_network_header_len(skb);
2638 context_desc->vlan_macip_lens = cpu_to_le32(info);
2640 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2641 tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2643 if (skb->protocol == htons(ETH_P_IP))
2644 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
2645 tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2647 context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2650 mss_l4len_idx = (skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT);
2651 mss_l4len_idx |= (l4len << E1000_ADVTXD_L4LEN_SHIFT);
2653 /* Context index must be unique per ring. Luckily, so is the interrupt
2655 mss_l4len_idx |= tx_ring->eims_value >> 4;
2657 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2658 context_desc->seqnum_seed = 0;
2660 buffer_info->time_stamp = jiffies;
2661 buffer_info->dma = 0;
2663 if (i == tx_ring->count)
2666 tx_ring->next_to_use = i;
2671 static inline bool igb_tx_csum_adv(struct igb_adapter *adapter,
2672 struct igb_ring *tx_ring,
2673 struct sk_buff *skb, u32 tx_flags)
2675 struct e1000_adv_tx_context_desc *context_desc;
2677 struct igb_buffer *buffer_info;
2678 u32 info = 0, tu_cmd = 0;
2680 if ((skb->ip_summed == CHECKSUM_PARTIAL) ||
2681 (tx_flags & IGB_TX_FLAGS_VLAN)) {
2682 i = tx_ring->next_to_use;
2683 buffer_info = &tx_ring->buffer_info[i];
2684 context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2686 if (tx_flags & IGB_TX_FLAGS_VLAN)
2687 info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2688 info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2689 if (skb->ip_summed == CHECKSUM_PARTIAL)
2690 info |= skb_network_header_len(skb);
2692 context_desc->vlan_macip_lens = cpu_to_le32(info);
2694 tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2696 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2697 switch (skb->protocol) {
2698 case __constant_htons(ETH_P_IP):
2699 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
2700 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2701 tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2703 case __constant_htons(ETH_P_IPV6):
2704 /* XXX what about other V6 headers?? */
2705 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2706 tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2709 if (unlikely(net_ratelimit()))
2710 dev_warn(&adapter->pdev->dev,
2711 "partial checksum but proto=%x!\n",
2717 context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2718 context_desc->seqnum_seed = 0;
2719 context_desc->mss_l4len_idx =
2720 cpu_to_le32(tx_ring->queue_index << 4);
2722 buffer_info->time_stamp = jiffies;
2723 buffer_info->dma = 0;
2726 if (i == tx_ring->count)
2728 tx_ring->next_to_use = i;
2737 #define IGB_MAX_TXD_PWR 16
2738 #define IGB_MAX_DATA_PER_TXD (1<<IGB_MAX_TXD_PWR)
2740 static inline int igb_tx_map_adv(struct igb_adapter *adapter,
2741 struct igb_ring *tx_ring,
2742 struct sk_buff *skb)
2744 struct igb_buffer *buffer_info;
2745 unsigned int len = skb_headlen(skb);
2746 unsigned int count = 0, i;
2749 i = tx_ring->next_to_use;
2751 buffer_info = &tx_ring->buffer_info[i];
2752 BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2753 buffer_info->length = len;
2754 /* set time_stamp *before* dma to help avoid a possible race */
2755 buffer_info->time_stamp = jiffies;
2756 buffer_info->dma = pci_map_single(adapter->pdev, skb->data, len,
2760 if (i == tx_ring->count)
2763 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) {
2764 struct skb_frag_struct *frag;
2766 frag = &skb_shinfo(skb)->frags[f];
2769 buffer_info = &tx_ring->buffer_info[i];
2770 BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2771 buffer_info->length = len;
2772 buffer_info->time_stamp = jiffies;
2773 buffer_info->dma = pci_map_page(adapter->pdev,
2781 if (i == tx_ring->count)
2785 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2786 tx_ring->buffer_info[i].skb = skb;
2791 static inline void igb_tx_queue_adv(struct igb_adapter *adapter,
2792 struct igb_ring *tx_ring,
2793 int tx_flags, int count, u32 paylen,
2796 union e1000_adv_tx_desc *tx_desc = NULL;
2797 struct igb_buffer *buffer_info;
2798 u32 olinfo_status = 0, cmd_type_len;
2801 cmd_type_len = (E1000_ADVTXD_DTYP_DATA | E1000_ADVTXD_DCMD_IFCS |
2802 E1000_ADVTXD_DCMD_DEXT);
2804 if (tx_flags & IGB_TX_FLAGS_VLAN)
2805 cmd_type_len |= E1000_ADVTXD_DCMD_VLE;
2807 if (tx_flags & IGB_TX_FLAGS_TSO) {
2808 cmd_type_len |= E1000_ADVTXD_DCMD_TSE;
2810 /* insert tcp checksum */
2811 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2813 /* insert ip checksum */
2814 if (tx_flags & IGB_TX_FLAGS_IPV4)
2815 olinfo_status |= E1000_TXD_POPTS_IXSM << 8;
2817 } else if (tx_flags & IGB_TX_FLAGS_CSUM) {
2818 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2821 if (tx_flags & (IGB_TX_FLAGS_CSUM | IGB_TX_FLAGS_TSO |
2823 olinfo_status |= tx_ring->queue_index << 4;
2825 olinfo_status |= ((paylen - hdr_len) << E1000_ADVTXD_PAYLEN_SHIFT);
2827 i = tx_ring->next_to_use;
2829 buffer_info = &tx_ring->buffer_info[i];
2830 tx_desc = E1000_TX_DESC_ADV(*tx_ring, i);
2831 tx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
2832 tx_desc->read.cmd_type_len =
2833 cpu_to_le32(cmd_type_len | buffer_info->length);
2834 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
2836 if (i == tx_ring->count)
2840 tx_desc->read.cmd_type_len |= cpu_to_le32(adapter->txd_cmd);
2841 /* Force memory writes to complete before letting h/w
2842 * know there are new descriptors to fetch. (Only
2843 * applicable for weak-ordered memory model archs,
2844 * such as IA-64). */
2847 tx_ring->next_to_use = i;
2848 writel(i, adapter->hw.hw_addr + tx_ring->tail);
2849 /* we need this if more than one processor can write to our tail
2850 * at a time, it syncronizes IO on IA64/Altix systems */
2854 static int __igb_maybe_stop_tx(struct net_device *netdev,
2855 struct igb_ring *tx_ring, int size)
2857 struct igb_adapter *adapter = netdev_priv(netdev);
2859 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2860 netif_stop_subqueue(netdev, tx_ring->queue_index);
2862 netif_stop_queue(netdev);
2865 /* Herbert's original patch had:
2866 * smp_mb__after_netif_stop_queue();
2867 * but since that doesn't exist yet, just open code it. */
2870 /* We need to check again in a case another CPU has just
2871 * made room available. */
2872 if (IGB_DESC_UNUSED(tx_ring) < size)
2876 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2877 netif_wake_subqueue(netdev, tx_ring->queue_index);
2879 netif_wake_queue(netdev);
2881 ++adapter->restart_queue;
2885 static int igb_maybe_stop_tx(struct net_device *netdev,
2886 struct igb_ring *tx_ring, int size)
2888 if (IGB_DESC_UNUSED(tx_ring) >= size)
2890 return __igb_maybe_stop_tx(netdev, tx_ring, size);
2893 #define TXD_USE_COUNT(S) (((S) >> (IGB_MAX_TXD_PWR)) + 1)
2895 static int igb_xmit_frame_ring_adv(struct sk_buff *skb,
2896 struct net_device *netdev,
2897 struct igb_ring *tx_ring)
2899 struct igb_adapter *adapter = netdev_priv(netdev);
2900 unsigned int tx_flags = 0;
2905 len = skb_headlen(skb);
2907 if (test_bit(__IGB_DOWN, &adapter->state)) {
2908 dev_kfree_skb_any(skb);
2909 return NETDEV_TX_OK;
2912 if (skb->len <= 0) {
2913 dev_kfree_skb_any(skb);
2914 return NETDEV_TX_OK;
2917 /* need: 1 descriptor per page,
2918 * + 2 desc gap to keep tail from touching head,
2919 * + 1 desc for skb->data,
2920 * + 1 desc for context descriptor,
2921 * otherwise try next time */
2922 if (igb_maybe_stop_tx(netdev, tx_ring, skb_shinfo(skb)->nr_frags + 4)) {
2923 /* this is a hard error */
2924 return NETDEV_TX_BUSY;
2927 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
2928 tx_flags |= IGB_TX_FLAGS_VLAN;
2929 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
2932 if (skb->protocol == htons(ETH_P_IP))
2933 tx_flags |= IGB_TX_FLAGS_IPV4;
2935 tso = skb_is_gso(skb) ? igb_tso_adv(adapter, tx_ring, skb, tx_flags,
2939 dev_kfree_skb_any(skb);
2940 return NETDEV_TX_OK;
2944 tx_flags |= IGB_TX_FLAGS_TSO;
2945 else if (igb_tx_csum_adv(adapter, tx_ring, skb, tx_flags))
2946 if (skb->ip_summed == CHECKSUM_PARTIAL)
2947 tx_flags |= IGB_TX_FLAGS_CSUM;
2949 igb_tx_queue_adv(adapter, tx_ring, tx_flags,
2950 igb_tx_map_adv(adapter, tx_ring, skb),
2953 netdev->trans_start = jiffies;
2955 /* Make sure there is space in the ring for the next send. */
2956 igb_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 4);
2958 return NETDEV_TX_OK;
2961 static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *netdev)
2963 struct igb_adapter *adapter = netdev_priv(netdev);
2964 struct igb_ring *tx_ring;
2966 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
2968 r_idx = skb->queue_mapping & (IGB_MAX_TX_QUEUES - 1);
2969 tx_ring = adapter->multi_tx_table[r_idx];
2971 tx_ring = &adapter->tx_ring[0];
2975 /* This goes back to the question of how to logically map a tx queue
2976 * to a flow. Right now, performance is impacted slightly negatively
2977 * if using multiple tx queues. If the stack breaks away from a
2978 * single qdisc implementation, we can look at this again. */
2979 return (igb_xmit_frame_ring_adv(skb, netdev, tx_ring));
2983 * igb_tx_timeout - Respond to a Tx Hang
2984 * @netdev: network interface device structure
2986 static void igb_tx_timeout(struct net_device *netdev)
2988 struct igb_adapter *adapter = netdev_priv(netdev);
2989 struct e1000_hw *hw = &adapter->hw;
2991 /* Do the reset outside of interrupt context */
2992 adapter->tx_timeout_count++;
2993 schedule_work(&adapter->reset_task);
2994 wr32(E1000_EICS, adapter->eims_enable_mask &
2995 ~(E1000_EIMS_TCP_TIMER | E1000_EIMS_OTHER));
2998 static void igb_reset_task(struct work_struct *work)
3000 struct igb_adapter *adapter;
3001 adapter = container_of(work, struct igb_adapter, reset_task);
3003 igb_reinit_locked(adapter);
3007 * igb_get_stats - Get System Network Statistics
3008 * @netdev: network interface device structure
3010 * Returns the address of the device statistics structure.
3011 * The statistics are actually updated from the timer callback.
3013 static struct net_device_stats *
3014 igb_get_stats(struct net_device *netdev)
3016 struct igb_adapter *adapter = netdev_priv(netdev);
3018 /* only return the current stats */
3019 return &adapter->net_stats;
3023 * igb_change_mtu - Change the Maximum Transfer Unit
3024 * @netdev: network interface device structure
3025 * @new_mtu: new value for maximum frame size
3027 * Returns 0 on success, negative on failure
3029 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
3031 struct igb_adapter *adapter = netdev_priv(netdev);
3032 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
3034 if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
3035 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3036 dev_err(&adapter->pdev->dev, "Invalid MTU setting\n");
3040 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3041 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3042 dev_err(&adapter->pdev->dev, "MTU > 9216 not supported.\n");
3046 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
3048 /* igb_down has a dependency on max_frame_size */
3049 adapter->max_frame_size = max_frame;
3050 if (netif_running(netdev))
3053 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3054 * means we reserve 2 more, this pushes us to allocate from the next
3056 * i.e. RXBUFFER_2048 --> size-4096 slab
3059 if (max_frame <= IGB_RXBUFFER_256)
3060 adapter->rx_buffer_len = IGB_RXBUFFER_256;
3061 else if (max_frame <= IGB_RXBUFFER_512)
3062 adapter->rx_buffer_len = IGB_RXBUFFER_512;
3063 else if (max_frame <= IGB_RXBUFFER_1024)
3064 adapter->rx_buffer_len = IGB_RXBUFFER_1024;
3065 else if (max_frame <= IGB_RXBUFFER_2048)
3066 adapter->rx_buffer_len = IGB_RXBUFFER_2048;
3068 adapter->rx_buffer_len = IGB_RXBUFFER_4096;
3069 /* adjust allocation if LPE protects us, and we aren't using SBP */
3070 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
3071 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE))
3072 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3074 dev_info(&adapter->pdev->dev, "changing MTU from %d to %d\n",
3075 netdev->mtu, new_mtu);
3076 netdev->mtu = new_mtu;
3078 if (netif_running(netdev))
3083 clear_bit(__IGB_RESETTING, &adapter->state);
3089 * igb_update_stats - Update the board statistics counters
3090 * @adapter: board private structure
3093 void igb_update_stats(struct igb_adapter *adapter)
3095 struct e1000_hw *hw = &adapter->hw;
3096 struct pci_dev *pdev = adapter->pdev;
3099 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3102 * Prevent stats update while adapter is being reset, or if the pci
3103 * connection is down.
3105 if (adapter->link_speed == 0)
3107 if (pci_channel_offline(pdev))
3110 adapter->stats.crcerrs += rd32(E1000_CRCERRS);
3111 adapter->stats.gprc += rd32(E1000_GPRC);
3112 adapter->stats.gorc += rd32(E1000_GORCL);
3113 rd32(E1000_GORCH); /* clear GORCL */
3114 adapter->stats.bprc += rd32(E1000_BPRC);
3115 adapter->stats.mprc += rd32(E1000_MPRC);
3116 adapter->stats.roc += rd32(E1000_ROC);
3118 adapter->stats.prc64 += rd32(E1000_PRC64);
3119 adapter->stats.prc127 += rd32(E1000_PRC127);
3120 adapter->stats.prc255 += rd32(E1000_PRC255);
3121 adapter->stats.prc511 += rd32(E1000_PRC511);
3122 adapter->stats.prc1023 += rd32(E1000_PRC1023);
3123 adapter->stats.prc1522 += rd32(E1000_PRC1522);
3124 adapter->stats.symerrs += rd32(E1000_SYMERRS);
3125 adapter->stats.sec += rd32(E1000_SEC);
3127 adapter->stats.mpc += rd32(E1000_MPC);
3128 adapter->stats.scc += rd32(E1000_SCC);
3129 adapter->stats.ecol += rd32(E1000_ECOL);
3130 adapter->stats.mcc += rd32(E1000_MCC);
3131 adapter->stats.latecol += rd32(E1000_LATECOL);
3132 adapter->stats.dc += rd32(E1000_DC);
3133 adapter->stats.rlec += rd32(E1000_RLEC);
3134 adapter->stats.xonrxc += rd32(E1000_XONRXC);
3135 adapter->stats.xontxc += rd32(E1000_XONTXC);
3136 adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
3137 adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
3138 adapter->stats.fcruc += rd32(E1000_FCRUC);
3139 adapter->stats.gptc += rd32(E1000_GPTC);
3140 adapter->stats.gotc += rd32(E1000_GOTCL);
3141 rd32(E1000_GOTCH); /* clear GOTCL */
3142 adapter->stats.rnbc += rd32(E1000_RNBC);
3143 adapter->stats.ruc += rd32(E1000_RUC);
3144 adapter->stats.rfc += rd32(E1000_RFC);
3145 adapter->stats.rjc += rd32(E1000_RJC);
3146 adapter->stats.tor += rd32(E1000_TORH);
3147 adapter->stats.tot += rd32(E1000_TOTH);
3148 adapter->stats.tpr += rd32(E1000_TPR);
3150 adapter->stats.ptc64 += rd32(E1000_PTC64);
3151 adapter->stats.ptc127 += rd32(E1000_PTC127);
3152 adapter->stats.ptc255 += rd32(E1000_PTC255);
3153 adapter->stats.ptc511 += rd32(E1000_PTC511);
3154 adapter->stats.ptc1023 += rd32(E1000_PTC1023);
3155 adapter->stats.ptc1522 += rd32(E1000_PTC1522);
3157 adapter->stats.mptc += rd32(E1000_MPTC);
3158 adapter->stats.bptc += rd32(E1000_BPTC);
3160 /* used for adaptive IFS */
3162 hw->mac.tx_packet_delta = rd32(E1000_TPT);
3163 adapter->stats.tpt += hw->mac.tx_packet_delta;
3164 hw->mac.collision_delta = rd32(E1000_COLC);
3165 adapter->stats.colc += hw->mac.collision_delta;
3167 adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
3168 adapter->stats.rxerrc += rd32(E1000_RXERRC);
3169 adapter->stats.tncrs += rd32(E1000_TNCRS);
3170 adapter->stats.tsctc += rd32(E1000_TSCTC);
3171 adapter->stats.tsctfc += rd32(E1000_TSCTFC);
3173 adapter->stats.iac += rd32(E1000_IAC);
3174 adapter->stats.icrxoc += rd32(E1000_ICRXOC);
3175 adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
3176 adapter->stats.icrxatc += rd32(E1000_ICRXATC);
3177 adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
3178 adapter->stats.ictxatc += rd32(E1000_ICTXATC);
3179 adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
3180 adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
3181 adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
3183 /* Fill out the OS statistics structure */
3184 adapter->net_stats.multicast = adapter->stats.mprc;
3185 adapter->net_stats.collisions = adapter->stats.colc;
3189 /* RLEC on some newer hardware can be incorrect so build
3190 * our own version based on RUC and ROC */
3191 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3192 adapter->stats.crcerrs + adapter->stats.algnerrc +
3193 adapter->stats.ruc + adapter->stats.roc +
3194 adapter->stats.cexterr;
3195 adapter->net_stats.rx_length_errors = adapter->stats.ruc +
3197 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3198 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3199 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3202 adapter->net_stats.tx_errors = adapter->stats.ecol +
3203 adapter->stats.latecol;
3204 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3205 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3206 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3208 /* Tx Dropped needs to be maintained elsewhere */
3211 if (hw->phy.media_type == e1000_media_type_copper) {
3212 if ((adapter->link_speed == SPEED_1000) &&
3213 (!hw->phy.ops.read_phy_reg(hw, PHY_1000T_STATUS,
3215 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3216 adapter->phy_stats.idle_errors += phy_tmp;
3220 /* Management Stats */
3221 adapter->stats.mgptc += rd32(E1000_MGTPTC);
3222 adapter->stats.mgprc += rd32(E1000_MGTPRC);
3223 adapter->stats.mgpdc += rd32(E1000_MGTPDC);
3227 static irqreturn_t igb_msix_other(int irq, void *data)
3229 struct net_device *netdev = data;
3230 struct igb_adapter *adapter = netdev_priv(netdev);
3231 struct e1000_hw *hw = &adapter->hw;
3232 u32 icr = rd32(E1000_ICR);
3234 /* reading ICR causes bit 31 of EICR to be cleared */
3235 if (!(icr & E1000_ICR_LSC))
3236 goto no_link_interrupt;
3237 hw->mac.get_link_status = 1;
3238 /* guard against interrupt when we're going down */
3239 if (!test_bit(__IGB_DOWN, &adapter->state))
3240 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3243 wr32(E1000_IMS, E1000_IMS_LSC);
3244 wr32(E1000_EIMS, adapter->eims_other);
3249 static irqreturn_t igb_msix_tx(int irq, void *data)
3251 struct igb_ring *tx_ring = data;
3252 struct igb_adapter *adapter = tx_ring->adapter;
3253 struct e1000_hw *hw = &adapter->hw;
3255 if (!tx_ring->itr_val)
3256 wr32(E1000_EIMC, tx_ring->eims_value);
3258 if (adapter->dca_enabled)
3259 igb_update_tx_dca(tx_ring);
3261 tx_ring->total_bytes = 0;
3262 tx_ring->total_packets = 0;
3264 /* auto mask will automatically reenable the interrupt when we write
3266 if (!igb_clean_tx_irq(tx_ring))
3267 /* Ring was not completely cleaned, so fire another interrupt */
3268 wr32(E1000_EICS, tx_ring->eims_value);
3270 wr32(E1000_EIMS, tx_ring->eims_value);
3275 static irqreturn_t igb_msix_rx(int irq, void *data)
3277 struct igb_ring *rx_ring = data;
3278 struct igb_adapter *adapter = rx_ring->adapter;
3279 struct e1000_hw *hw = &adapter->hw;
3281 /* Write the ITR value calculated at the end of the
3282 * previous interrupt.
3285 if (adapter->set_itr) {
3286 wr32(rx_ring->itr_register,
3287 1000000000 / (rx_ring->itr_val * 256));
3288 adapter->set_itr = 0;
3291 if (netif_rx_schedule_prep(adapter->netdev, &rx_ring->napi))
3292 __netif_rx_schedule(adapter->netdev, &rx_ring->napi);
3295 if (adapter->dca_enabled)
3296 igb_update_rx_dca(rx_ring);
3302 static void igb_update_rx_dca(struct igb_ring *rx_ring)
3305 struct igb_adapter *adapter = rx_ring->adapter;
3306 struct e1000_hw *hw = &adapter->hw;
3307 int cpu = get_cpu();
3308 int q = rx_ring - adapter->rx_ring;
3310 if (rx_ring->cpu != cpu) {
3311 dca_rxctrl = rd32(E1000_DCA_RXCTRL(q));
3312 if (hw->mac.type == e1000_82576) {
3313 dca_rxctrl &= ~E1000_DCA_RXCTRL_CPUID_MASK_82576;
3314 dca_rxctrl |= dca_get_tag(cpu) <<
3315 E1000_DCA_RXCTRL_CPUID_SHIFT;
3317 dca_rxctrl &= ~E1000_DCA_RXCTRL_CPUID_MASK;
3318 dca_rxctrl |= dca_get_tag(cpu);
3320 dca_rxctrl |= E1000_DCA_RXCTRL_DESC_DCA_EN;
3321 dca_rxctrl |= E1000_DCA_RXCTRL_HEAD_DCA_EN;
3322 dca_rxctrl |= E1000_DCA_RXCTRL_DATA_DCA_EN;
3323 wr32(E1000_DCA_RXCTRL(q), dca_rxctrl);
3329 static void igb_update_tx_dca(struct igb_ring *tx_ring)
3332 struct igb_adapter *adapter = tx_ring->adapter;
3333 struct e1000_hw *hw = &adapter->hw;
3334 int cpu = get_cpu();
3335 int q = tx_ring - adapter->tx_ring;
3337 if (tx_ring->cpu != cpu) {
3338 dca_txctrl = rd32(E1000_DCA_TXCTRL(q));
3339 if (hw->mac.type == e1000_82576) {
3340 dca_txctrl &= ~E1000_DCA_TXCTRL_CPUID_MASK_82576;
3341 dca_txctrl |= dca_get_tag(cpu) <<
3342 E1000_DCA_TXCTRL_CPUID_SHIFT;
3344 dca_txctrl &= ~E1000_DCA_TXCTRL_CPUID_MASK;
3345 dca_txctrl |= dca_get_tag(cpu);
3347 dca_txctrl |= E1000_DCA_TXCTRL_DESC_DCA_EN;
3348 wr32(E1000_DCA_TXCTRL(q), dca_txctrl);
3354 static void igb_setup_dca(struct igb_adapter *adapter)
3358 if (!(adapter->dca_enabled))
3361 for (i = 0; i < adapter->num_tx_queues; i++) {
3362 adapter->tx_ring[i].cpu = -1;
3363 igb_update_tx_dca(&adapter->tx_ring[i]);
3365 for (i = 0; i < adapter->num_rx_queues; i++) {
3366 adapter->rx_ring[i].cpu = -1;
3367 igb_update_rx_dca(&adapter->rx_ring[i]);
3371 static int __igb_notify_dca(struct device *dev, void *data)
3373 struct net_device *netdev = dev_get_drvdata(dev);
3374 struct igb_adapter *adapter = netdev_priv(netdev);
3375 struct e1000_hw *hw = &adapter->hw;
3376 unsigned long event = *(unsigned long *)data;
3379 case DCA_PROVIDER_ADD:
3380 /* if already enabled, don't do it again */
3381 if (adapter->dca_enabled)
3383 adapter->dca_enabled = true;
3384 /* Always use CB2 mode, difference is masked
3385 * in the CB driver. */
3386 wr32(E1000_DCA_CTRL, 2);
3387 if (dca_add_requester(dev) == 0) {
3388 dev_info(&adapter->pdev->dev, "DCA enabled\n");
3389 igb_setup_dca(adapter);
3392 /* Fall Through since DCA is disabled. */
3393 case DCA_PROVIDER_REMOVE:
3394 if (adapter->dca_enabled) {
3395 /* without this a class_device is left
3396 * hanging around in the sysfs model */
3397 dca_remove_requester(dev);
3398 dev_info(&adapter->pdev->dev, "DCA disabled\n");
3399 adapter->dca_enabled = false;
3400 wr32(E1000_DCA_CTRL, 1);
3408 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
3413 ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
3416 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
3418 #endif /* CONFIG_DCA */
3421 * igb_intr_msi - Interrupt Handler
3422 * @irq: interrupt number
3423 * @data: pointer to a network interface device structure
3425 static irqreturn_t igb_intr_msi(int irq, void *data)
3427 struct net_device *netdev = data;
3428 struct igb_adapter *adapter = netdev_priv(netdev);
3429 struct e1000_hw *hw = &adapter->hw;
3430 /* read ICR disables interrupts using IAM */
3431 u32 icr = rd32(E1000_ICR);
3433 /* Write the ITR value calculated at the end of the
3434 * previous interrupt.
3436 if (adapter->set_itr) {
3437 wr32(E1000_ITR, 1000000000 / (adapter->itr * 256));
3438 adapter->set_itr = 0;
3441 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3442 hw->mac.get_link_status = 1;
3443 if (!test_bit(__IGB_DOWN, &adapter->state))
3444 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3447 netif_rx_schedule(netdev, &adapter->rx_ring[0].napi);
3453 * igb_intr - Interrupt Handler
3454 * @irq: interrupt number
3455 * @data: pointer to a network interface device structure
3457 static irqreturn_t igb_intr(int irq, void *data)
3459 struct net_device *netdev = data;
3460 struct igb_adapter *adapter = netdev_priv(netdev);
3461 struct e1000_hw *hw = &adapter->hw;
3462 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
3463 * need for the IMC write */
3464 u32 icr = rd32(E1000_ICR);
3467 return IRQ_NONE; /* Not our interrupt */
3469 /* Write the ITR value calculated at the end of the
3470 * previous interrupt.
3472 if (adapter->set_itr) {
3473 wr32(E1000_ITR, 1000000000 / (adapter->itr * 256));
3474 adapter->set_itr = 0;
3477 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3478 * not set, then the adapter didn't send an interrupt */
3479 if (!(icr & E1000_ICR_INT_ASSERTED))
3482 eicr = rd32(E1000_EICR);
3484 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3485 hw->mac.get_link_status = 1;
3486 /* guard against interrupt when we're going down */
3487 if (!test_bit(__IGB_DOWN, &adapter->state))
3488 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3491 netif_rx_schedule(netdev, &adapter->rx_ring[0].napi);
3497 * igb_poll - NAPI Rx polling callback
3498 * @napi: napi polling structure
3499 * @budget: count of how many packets we should handle
3501 static int igb_poll(struct napi_struct *napi, int budget)
3503 struct igb_ring *rx_ring = container_of(napi, struct igb_ring, napi);
3504 struct igb_adapter *adapter = rx_ring->adapter;
3505 struct net_device *netdev = adapter->netdev;
3506 int tx_clean_complete, work_done = 0;
3508 /* this poll routine only supports one tx and one rx queue */
3510 if (adapter->dca_enabled)
3511 igb_update_tx_dca(&adapter->tx_ring[0]);
3513 tx_clean_complete = igb_clean_tx_irq(&adapter->tx_ring[0]);
3516 if (adapter->dca_enabled)
3517 igb_update_rx_dca(&adapter->rx_ring[0]);
3519 igb_clean_rx_irq_adv(&adapter->rx_ring[0], &work_done, budget);
3521 /* If no Tx and not enough Rx work done, exit the polling mode */
3522 if ((tx_clean_complete && (work_done < budget)) ||
3523 !netif_running(netdev)) {
3524 if (adapter->itr_setting & 3)
3525 igb_set_itr(adapter, E1000_ITR, false);
3526 netif_rx_complete(netdev, napi);
3527 if (!test_bit(__IGB_DOWN, &adapter->state))
3528 igb_irq_enable(adapter);
3535 static int igb_clean_rx_ring_msix(struct napi_struct *napi, int budget)
3537 struct igb_ring *rx_ring = container_of(napi, struct igb_ring, napi);
3538 struct igb_adapter *adapter = rx_ring->adapter;
3539 struct e1000_hw *hw = &adapter->hw;
3540 struct net_device *netdev = adapter->netdev;
3543 /* Keep link state information with original netdev */
3544 if (!netif_carrier_ok(netdev))
3548 if (adapter->dca_enabled)
3549 igb_update_rx_dca(rx_ring);
3551 igb_clean_rx_irq_adv(rx_ring, &work_done, budget);
3554 /* If not enough Rx work done, exit the polling mode */
3555 if ((work_done == 0) || !netif_running(netdev)) {
3557 netif_rx_complete(netdev, napi);
3559 wr32(E1000_EIMS, rx_ring->eims_value);
3560 if ((adapter->itr_setting & 3) && !rx_ring->no_itr_adjust &&
3561 (rx_ring->total_packets > IGB_DYN_ITR_PACKET_THRESHOLD)) {
3562 int mean_size = rx_ring->total_bytes /
3563 rx_ring->total_packets;
3564 if (mean_size < IGB_DYN_ITR_LENGTH_LOW)
3565 igb_raise_rx_eitr(adapter, rx_ring);
3566 else if (mean_size > IGB_DYN_ITR_LENGTH_HIGH)
3567 igb_lower_rx_eitr(adapter, rx_ring);
3570 if (!test_bit(__IGB_DOWN, &adapter->state))
3571 wr32(E1000_EIMS, rx_ring->eims_value);
3579 static inline u32 get_head(struct igb_ring *tx_ring)
3581 void *end = (struct e1000_tx_desc *)tx_ring->desc + tx_ring->count;
3582 return le32_to_cpu(*(volatile __le32 *)end);
3586 * igb_clean_tx_irq - Reclaim resources after transmit completes
3587 * @adapter: board private structure
3588 * returns true if ring is completely cleaned
3590 static bool igb_clean_tx_irq(struct igb_ring *tx_ring)
3592 struct igb_adapter *adapter = tx_ring->adapter;
3593 struct e1000_hw *hw = &adapter->hw;
3594 struct net_device *netdev = adapter->netdev;
3595 struct e1000_tx_desc *tx_desc;
3596 struct igb_buffer *buffer_info;
3597 struct sk_buff *skb;
3600 unsigned int count = 0;
3601 bool cleaned = false;
3603 unsigned int total_bytes = 0, total_packets = 0;
3606 head = get_head(tx_ring);
3607 i = tx_ring->next_to_clean;
3611 tx_desc = E1000_TX_DESC(*tx_ring, i);
3612 buffer_info = &tx_ring->buffer_info[i];
3613 skb = buffer_info->skb;
3616 unsigned int segs, bytecount;
3617 /* gso_segs is currently only valid for tcp */
3618 segs = skb_shinfo(skb)->gso_segs ?: 1;
3619 /* multiply data chunks by size of headers */
3620 bytecount = ((segs - 1) * skb_headlen(skb)) +
3622 total_packets += segs;
3623 total_bytes += bytecount;
3626 igb_unmap_and_free_tx_resource(adapter, buffer_info);
3627 tx_desc->upper.data = 0;
3630 if (i == tx_ring->count)
3634 if (count == IGB_MAX_TX_CLEAN) {
3641 head = get_head(tx_ring);
3642 if (head == oldhead)
3647 tx_ring->next_to_clean = i;
3649 if (unlikely(cleaned &&
3650 netif_carrier_ok(netdev) &&
3651 IGB_DESC_UNUSED(tx_ring) >= IGB_TX_QUEUE_WAKE)) {
3652 /* Make sure that anybody stopping the queue after this
3653 * sees the new next_to_clean.
3656 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
3657 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
3658 !(test_bit(__IGB_DOWN, &adapter->state))) {
3659 netif_wake_subqueue(netdev, tx_ring->queue_index);
3660 ++adapter->restart_queue;
3663 if (netif_queue_stopped(netdev) &&
3664 !(test_bit(__IGB_DOWN, &adapter->state))) {
3665 netif_wake_queue(netdev);
3666 ++adapter->restart_queue;
3671 if (tx_ring->detect_tx_hung) {
3672 /* Detect a transmit hang in hardware, this serializes the
3673 * check with the clearing of time_stamp and movement of i */
3674 tx_ring->detect_tx_hung = false;
3675 if (tx_ring->buffer_info[i].time_stamp &&
3676 time_after(jiffies, tx_ring->buffer_info[i].time_stamp +
3677 (adapter->tx_timeout_factor * HZ))
3678 && !(rd32(E1000_STATUS) &
3679 E1000_STATUS_TXOFF)) {
3681 tx_desc = E1000_TX_DESC(*tx_ring, i);
3682 /* detected Tx unit hang */
3683 dev_err(&adapter->pdev->dev,
3684 "Detected Tx Unit Hang\n"
3688 " next_to_use <%x>\n"
3689 " next_to_clean <%x>\n"
3691 "buffer_info[next_to_clean]\n"
3692 " time_stamp <%lx>\n"
3694 " desc.status <%x>\n",
3695 tx_ring->queue_index,
3696 readl(adapter->hw.hw_addr + tx_ring->head),
3697 readl(adapter->hw.hw_addr + tx_ring->tail),
3698 tx_ring->next_to_use,
3699 tx_ring->next_to_clean,
3701 tx_ring->buffer_info[i].time_stamp,
3703 tx_desc->upper.fields.status);
3704 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
3705 netif_stop_subqueue(netdev, tx_ring->queue_index);
3707 netif_stop_queue(netdev);
3711 tx_ring->total_bytes += total_bytes;
3712 tx_ring->total_packets += total_packets;
3713 tx_ring->tx_stats.bytes += total_bytes;
3714 tx_ring->tx_stats.packets += total_packets;
3715 adapter->net_stats.tx_bytes += total_bytes;
3716 adapter->net_stats.tx_packets += total_packets;
3722 * igb_receive_skb - helper function to handle rx indications
3723 * @adapter: board private structure
3724 * @status: descriptor status field as written by hardware
3725 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
3726 * @skb: pointer to sk_buff to be indicated to stack
3728 static void igb_receive_skb(struct igb_adapter *adapter, u8 status, __le16 vlan,
3729 struct sk_buff *skb)
3731 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
3732 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3735 netif_receive_skb(skb);
3739 static inline void igb_rx_checksum_adv(struct igb_adapter *adapter,
3740 u32 status_err, struct sk_buff *skb)
3742 skb->ip_summed = CHECKSUM_NONE;
3744 /* Ignore Checksum bit is set or checksum is disabled through ethtool */
3745 if ((status_err & E1000_RXD_STAT_IXSM) || !adapter->rx_csum)
3747 /* TCP/UDP checksum error bit is set */
3749 (E1000_RXDEXT_STATERR_TCPE | E1000_RXDEXT_STATERR_IPE)) {
3750 /* let the stack verify checksum errors */
3751 adapter->hw_csum_err++;
3754 /* It must be a TCP or UDP packet with a valid checksum */
3755 if (status_err & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))
3756 skb->ip_summed = CHECKSUM_UNNECESSARY;
3758 adapter->hw_csum_good++;
3761 static bool igb_clean_rx_irq_adv(struct igb_ring *rx_ring,
3762 int *work_done, int budget)
3764 struct igb_adapter *adapter = rx_ring->adapter;
3765 struct net_device *netdev = adapter->netdev;
3766 struct pci_dev *pdev = adapter->pdev;
3767 union e1000_adv_rx_desc *rx_desc , *next_rxd;
3768 struct igb_buffer *buffer_info , *next_buffer;
3769 struct sk_buff *skb;
3771 u32 length, hlen, staterr;
3772 bool cleaned = false;
3773 int cleaned_count = 0;
3774 unsigned int total_bytes = 0, total_packets = 0;
3776 i = rx_ring->next_to_clean;
3777 rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
3778 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3780 while (staterr & E1000_RXD_STAT_DD) {
3781 if (*work_done >= budget)
3784 buffer_info = &rx_ring->buffer_info[i];
3786 /* HW will not DMA in data larger than the given buffer, even
3787 * if it parses the (NFS, of course) header to be larger. In
3788 * that case, it fills the header buffer and spills the rest
3791 hlen = (le16_to_cpu(rx_desc->wb.lower.lo_dword.hdr_info) &
3792 E1000_RXDADV_HDRBUFLEN_MASK) >> E1000_RXDADV_HDRBUFLEN_SHIFT;
3793 if (hlen > adapter->rx_ps_hdr_size)
3794 hlen = adapter->rx_ps_hdr_size;
3796 length = le16_to_cpu(rx_desc->wb.upper.length);
3800 if (rx_ring->pending_skb != NULL) {
3801 skb = rx_ring->pending_skb;
3802 rx_ring->pending_skb = NULL;
3803 j = rx_ring->pending_skb_page;
3805 skb = buffer_info->skb;
3806 prefetch(skb->data - NET_IP_ALIGN);
3807 buffer_info->skb = NULL;
3809 pci_unmap_single(pdev, buffer_info->dma,
3810 adapter->rx_ps_hdr_size +
3812 PCI_DMA_FROMDEVICE);
3815 pci_unmap_single(pdev, buffer_info->dma,
3816 adapter->rx_buffer_len +
3818 PCI_DMA_FROMDEVICE);
3819 skb_put(skb, length);
3826 pci_unmap_page(pdev, buffer_info->page_dma,
3827 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3828 buffer_info->page_dma = 0;
3829 skb_fill_page_desc(skb, j, buffer_info->page,
3831 buffer_info->page = NULL;
3834 skb->data_len += length;
3835 skb->truesize += length;
3836 rx_desc->wb.upper.status_error = 0;
3837 if (staterr & E1000_RXD_STAT_EOP)
3843 if (i == rx_ring->count)
3846 buffer_info = &rx_ring->buffer_info[i];
3847 rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
3848 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3849 length = le16_to_cpu(rx_desc->wb.upper.length);
3850 if (!(staterr & E1000_RXD_STAT_DD)) {
3851 rx_ring->pending_skb = skb;
3852 rx_ring->pending_skb_page = j;
3858 if (i == rx_ring->count)
3860 next_rxd = E1000_RX_DESC_ADV(*rx_ring, i);
3862 next_buffer = &rx_ring->buffer_info[i];
3864 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
3865 dev_kfree_skb_irq(skb);
3868 rx_ring->no_itr_adjust |= (staterr & E1000_RXD_STAT_DYNINT);
3870 total_bytes += skb->len;
3873 igb_rx_checksum_adv(adapter, staterr, skb);
3875 skb->protocol = eth_type_trans(skb, netdev);
3877 igb_receive_skb(adapter, staterr, rx_desc->wb.upper.vlan, skb);
3879 netdev->last_rx = jiffies;
3882 rx_desc->wb.upper.status_error = 0;
3884 /* return some buffers to hardware, one at a time is too slow */
3885 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
3886 igb_alloc_rx_buffers_adv(rx_ring, cleaned_count);
3890 /* use prefetched values */
3892 buffer_info = next_buffer;
3894 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3897 rx_ring->next_to_clean = i;
3898 cleaned_count = IGB_DESC_UNUSED(rx_ring);
3901 igb_alloc_rx_buffers_adv(rx_ring, cleaned_count);
3903 rx_ring->total_packets += total_packets;
3904 rx_ring->total_bytes += total_bytes;
3905 rx_ring->rx_stats.packets += total_packets;
3906 rx_ring->rx_stats.bytes += total_bytes;
3907 adapter->net_stats.rx_bytes += total_bytes;
3908 adapter->net_stats.rx_packets += total_packets;
3914 * igb_alloc_rx_buffers_adv - Replace used receive buffers; packet split
3915 * @adapter: address of board private structure
3917 static void igb_alloc_rx_buffers_adv(struct igb_ring *rx_ring,
3920 struct igb_adapter *adapter = rx_ring->adapter;
3921 struct net_device *netdev = adapter->netdev;
3922 struct pci_dev *pdev = adapter->pdev;
3923 union e1000_adv_rx_desc *rx_desc;
3924 struct igb_buffer *buffer_info;
3925 struct sk_buff *skb;
3928 i = rx_ring->next_to_use;
3929 buffer_info = &rx_ring->buffer_info[i];
3931 while (cleaned_count--) {
3932 rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
3934 if (adapter->rx_ps_hdr_size && !buffer_info->page) {
3935 buffer_info->page = alloc_page(GFP_ATOMIC);
3936 if (!buffer_info->page) {
3937 adapter->alloc_rx_buff_failed++;
3940 buffer_info->page_dma =
3944 PCI_DMA_FROMDEVICE);
3947 if (!buffer_info->skb) {
3950 if (adapter->rx_ps_hdr_size)
3951 bufsz = adapter->rx_ps_hdr_size;
3953 bufsz = adapter->rx_buffer_len;
3954 bufsz += NET_IP_ALIGN;
3955 skb = netdev_alloc_skb(netdev, bufsz);
3958 adapter->alloc_rx_buff_failed++;
3962 /* Make buffer alignment 2 beyond a 16 byte boundary
3963 * this will result in a 16 byte aligned IP header after
3964 * the 14 byte MAC header is removed
3966 skb_reserve(skb, NET_IP_ALIGN);
3968 buffer_info->skb = skb;
3969 buffer_info->dma = pci_map_single(pdev, skb->data,
3971 PCI_DMA_FROMDEVICE);
3974 /* Refresh the desc even if buffer_addrs didn't change because
3975 * each write-back erases this info. */
3976 if (adapter->rx_ps_hdr_size) {
3977 rx_desc->read.pkt_addr =
3978 cpu_to_le64(buffer_info->page_dma);
3979 rx_desc->read.hdr_addr = cpu_to_le64(buffer_info->dma);
3981 rx_desc->read.pkt_addr =
3982 cpu_to_le64(buffer_info->dma);
3983 rx_desc->read.hdr_addr = 0;
3987 if (i == rx_ring->count)
3989 buffer_info = &rx_ring->buffer_info[i];
3993 if (rx_ring->next_to_use != i) {
3994 rx_ring->next_to_use = i;
3996 i = (rx_ring->count - 1);
4000 /* Force memory writes to complete before letting h/w
4001 * know there are new descriptors to fetch. (Only
4002 * applicable for weak-ordered memory model archs,
4003 * such as IA-64). */
4005 writel(i, adapter->hw.hw_addr + rx_ring->tail);
4015 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4017 struct igb_adapter *adapter = netdev_priv(netdev);
4018 struct mii_ioctl_data *data = if_mii(ifr);
4020 if (adapter->hw.phy.media_type != e1000_media_type_copper)
4025 data->phy_id = adapter->hw.phy.addr;
4028 if (!capable(CAP_NET_ADMIN))
4030 if (adapter->hw.phy.ops.read_phy_reg(&adapter->hw,
4032 & 0x1F, &data->val_out))
4048 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4054 return igb_mii_ioctl(netdev, ifr, cmd);
4060 static void igb_vlan_rx_register(struct net_device *netdev,
4061 struct vlan_group *grp)
4063 struct igb_adapter *adapter = netdev_priv(netdev);
4064 struct e1000_hw *hw = &adapter->hw;
4067 igb_irq_disable(adapter);
4068 adapter->vlgrp = grp;
4071 /* enable VLAN tag insert/strip */
4072 ctrl = rd32(E1000_CTRL);
4073 ctrl |= E1000_CTRL_VME;
4074 wr32(E1000_CTRL, ctrl);
4076 /* enable VLAN receive filtering */
4077 rctl = rd32(E1000_RCTL);
4078 rctl |= E1000_RCTL_VFE;
4079 rctl &= ~E1000_RCTL_CFIEN;
4080 wr32(E1000_RCTL, rctl);
4081 igb_update_mng_vlan(adapter);
4083 adapter->max_frame_size + VLAN_TAG_SIZE);
4085 /* disable VLAN tag insert/strip */
4086 ctrl = rd32(E1000_CTRL);
4087 ctrl &= ~E1000_CTRL_VME;
4088 wr32(E1000_CTRL, ctrl);
4090 /* disable VLAN filtering */
4091 rctl = rd32(E1000_RCTL);
4092 rctl &= ~E1000_RCTL_VFE;
4093 wr32(E1000_RCTL, rctl);
4094 if (adapter->mng_vlan_id != (u16)IGB_MNG_VLAN_NONE) {
4095 igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4096 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
4099 adapter->max_frame_size);
4102 if (!test_bit(__IGB_DOWN, &adapter->state))
4103 igb_irq_enable(adapter);
4106 static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
4108 struct igb_adapter *adapter = netdev_priv(netdev);
4109 struct e1000_hw *hw = &adapter->hw;
4112 if ((adapter->hw.mng_cookie.status &
4113 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
4114 (vid == adapter->mng_vlan_id))
4116 /* add VID to filter table */
4117 index = (vid >> 5) & 0x7F;
4118 vfta = array_rd32(E1000_VFTA, index);
4119 vfta |= (1 << (vid & 0x1F));
4120 igb_write_vfta(&adapter->hw, index, vfta);
4123 static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
4125 struct igb_adapter *adapter = netdev_priv(netdev);
4126 struct e1000_hw *hw = &adapter->hw;
4129 igb_irq_disable(adapter);
4130 vlan_group_set_device(adapter->vlgrp, vid, NULL);
4132 if (!test_bit(__IGB_DOWN, &adapter->state))
4133 igb_irq_enable(adapter);
4135 if ((adapter->hw.mng_cookie.status &
4136 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
4137 (vid == adapter->mng_vlan_id)) {
4138 /* release control to f/w */
4139 igb_release_hw_control(adapter);
4143 /* remove VID from filter table */
4144 index = (vid >> 5) & 0x7F;
4145 vfta = array_rd32(E1000_VFTA, index);
4146 vfta &= ~(1 << (vid & 0x1F));
4147 igb_write_vfta(&adapter->hw, index, vfta);
4150 static void igb_restore_vlan(struct igb_adapter *adapter)
4152 igb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4154 if (adapter->vlgrp) {
4156 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4157 if (!vlan_group_get_device(adapter->vlgrp, vid))
4159 igb_vlan_rx_add_vid(adapter->netdev, vid);
4164 int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx)
4166 struct e1000_mac_info *mac = &adapter->hw.mac;
4170 /* Fiber NICs only allow 1000 gbps Full duplex */
4171 if ((adapter->hw.phy.media_type == e1000_media_type_fiber) &&
4172 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4173 dev_err(&adapter->pdev->dev,
4174 "Unsupported Speed/Duplex configuration\n");
4179 case SPEED_10 + DUPLEX_HALF:
4180 mac->forced_speed_duplex = ADVERTISE_10_HALF;
4182 case SPEED_10 + DUPLEX_FULL:
4183 mac->forced_speed_duplex = ADVERTISE_10_FULL;
4185 case SPEED_100 + DUPLEX_HALF:
4186 mac->forced_speed_duplex = ADVERTISE_100_HALF;
4188 case SPEED_100 + DUPLEX_FULL:
4189 mac->forced_speed_duplex = ADVERTISE_100_FULL;
4191 case SPEED_1000 + DUPLEX_FULL:
4193 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
4195 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4197 dev_err(&adapter->pdev->dev,
4198 "Unsupported Speed/Duplex configuration\n");
4205 static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
4207 struct net_device *netdev = pci_get_drvdata(pdev);
4208 struct igb_adapter *adapter = netdev_priv(netdev);
4209 struct e1000_hw *hw = &adapter->hw;
4210 u32 ctrl, rctl, status;
4211 u32 wufc = adapter->wol;
4216 netif_device_detach(netdev);
4218 if (netif_running(netdev)) {
4219 WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
4221 igb_free_irq(adapter);
4225 retval = pci_save_state(pdev);
4230 status = rd32(E1000_STATUS);
4231 if (status & E1000_STATUS_LU)
4232 wufc &= ~E1000_WUFC_LNKC;
4235 igb_setup_rctl(adapter);
4236 igb_set_multi(netdev);
4238 /* turn on all-multi mode if wake on multicast is enabled */
4239 if (wufc & E1000_WUFC_MC) {
4240 rctl = rd32(E1000_RCTL);
4241 rctl |= E1000_RCTL_MPE;
4242 wr32(E1000_RCTL, rctl);
4245 ctrl = rd32(E1000_CTRL);
4246 /* advertise wake from D3Cold */
4247 #define E1000_CTRL_ADVD3WUC 0x00100000
4248 /* phy power management enable */
4249 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4250 ctrl |= E1000_CTRL_ADVD3WUC;
4251 wr32(E1000_CTRL, ctrl);
4253 /* Allow time for pending master requests to run */
4254 igb_disable_pcie_master(&adapter->hw);
4256 wr32(E1000_WUC, E1000_WUC_PME_EN);
4257 wr32(E1000_WUFC, wufc);
4260 wr32(E1000_WUFC, 0);
4263 /* make sure adapter isn't asleep if manageability/wol is enabled */
4264 if (wufc || adapter->en_mng_pt) {
4265 pci_enable_wake(pdev, PCI_D3hot, 1);
4266 pci_enable_wake(pdev, PCI_D3cold, 1);
4268 igb_shutdown_fiber_serdes_link_82575(hw);
4269 pci_enable_wake(pdev, PCI_D3hot, 0);
4270 pci_enable_wake(pdev, PCI_D3cold, 0);
4273 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4274 * would have already happened in close and is redundant. */
4275 igb_release_hw_control(adapter);
4277 pci_disable_device(pdev);
4279 pci_set_power_state(pdev, pci_choose_state(pdev, state));
4285 static int igb_resume(struct pci_dev *pdev)
4287 struct net_device *netdev = pci_get_drvdata(pdev);
4288 struct igb_adapter *adapter = netdev_priv(netdev);
4289 struct e1000_hw *hw = &adapter->hw;
4292 pci_set_power_state(pdev, PCI_D0);
4293 pci_restore_state(pdev);
4295 if (adapter->need_ioport)
4296 err = pci_enable_device(pdev);
4298 err = pci_enable_device_mem(pdev);
4301 "igb: Cannot enable PCI device from suspend\n");
4304 pci_set_master(pdev);
4306 pci_enable_wake(pdev, PCI_D3hot, 0);
4307 pci_enable_wake(pdev, PCI_D3cold, 0);
4309 if (netif_running(netdev)) {
4310 err = igb_request_irq(adapter);
4315 /* e1000_power_up_phy(adapter); */
4318 wr32(E1000_WUS, ~0);
4320 igb_init_manageability(adapter);
4322 if (netif_running(netdev))
4325 netif_device_attach(netdev);
4327 /* let the f/w know that the h/w is now under the control of the
4329 igb_get_hw_control(adapter);
4335 static void igb_shutdown(struct pci_dev *pdev)
4337 igb_suspend(pdev, PMSG_SUSPEND);
4340 #ifdef CONFIG_NET_POLL_CONTROLLER
4342 * Polling 'interrupt' - used by things like netconsole to send skbs
4343 * without having to re-enable interrupts. It's not called while
4344 * the interrupt routine is executing.
4346 static void igb_netpoll(struct net_device *netdev)
4348 struct igb_adapter *adapter = netdev_priv(netdev);
4352 igb_irq_disable(adapter);
4353 for (i = 0; i < adapter->num_tx_queues; i++)
4354 igb_clean_tx_irq(&adapter->tx_ring[i]);
4356 for (i = 0; i < adapter->num_rx_queues; i++)
4357 igb_clean_rx_irq_adv(&adapter->rx_ring[i],
4359 adapter->rx_ring[i].napi.weight);
4361 igb_irq_enable(adapter);
4363 #endif /* CONFIG_NET_POLL_CONTROLLER */
4366 * igb_io_error_detected - called when PCI error is detected
4367 * @pdev: Pointer to PCI device
4368 * @state: The current pci connection state
4370 * This function is called after a PCI bus error affecting
4371 * this device has been detected.
4373 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
4374 pci_channel_state_t state)
4376 struct net_device *netdev = pci_get_drvdata(pdev);
4377 struct igb_adapter *adapter = netdev_priv(netdev);
4379 netif_device_detach(netdev);
4381 if (netif_running(netdev))
4383 pci_disable_device(pdev);
4385 /* Request a slot slot reset. */
4386 return PCI_ERS_RESULT_NEED_RESET;
4390 * igb_io_slot_reset - called after the pci bus has been reset.
4391 * @pdev: Pointer to PCI device
4393 * Restart the card from scratch, as if from a cold-boot. Implementation
4394 * resembles the first-half of the igb_resume routine.
4396 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
4398 struct net_device *netdev = pci_get_drvdata(pdev);
4399 struct igb_adapter *adapter = netdev_priv(netdev);
4400 struct e1000_hw *hw = &adapter->hw;
4403 if (adapter->need_ioport)
4404 err = pci_enable_device(pdev);
4406 err = pci_enable_device_mem(pdev);
4409 "Cannot re-enable PCI device after reset.\n");
4410 return PCI_ERS_RESULT_DISCONNECT;
4412 pci_set_master(pdev);
4413 pci_restore_state(pdev);
4415 pci_enable_wake(pdev, PCI_D3hot, 0);
4416 pci_enable_wake(pdev, PCI_D3cold, 0);
4419 wr32(E1000_WUS, ~0);
4421 return PCI_ERS_RESULT_RECOVERED;
4425 * igb_io_resume - called when traffic can start flowing again.
4426 * @pdev: Pointer to PCI device
4428 * This callback is called when the error recovery driver tells us that
4429 * its OK to resume normal operation. Implementation resembles the
4430 * second-half of the igb_resume routine.
4432 static void igb_io_resume(struct pci_dev *pdev)
4434 struct net_device *netdev = pci_get_drvdata(pdev);
4435 struct igb_adapter *adapter = netdev_priv(netdev);
4437 igb_init_manageability(adapter);
4439 if (netif_running(netdev)) {
4440 if (igb_up(adapter)) {
4441 dev_err(&pdev->dev, "igb_up failed after reset\n");
4446 netif_device_attach(netdev);
4448 /* let the f/w know that the h/w is now under the control of the
4450 igb_get_hw_control(adapter);