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   1 /*******************************************************************************
   2
   3   Intel(R) Gigabit Ethernet Linux driver
   4   Copyright(c) 2007-2009 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 /* ethtool support for igb */
  29
  30 #include <linux/vmalloc.h>
  31 #include <linux/netdevice.h>
  32 #include <linux/pci.h>
  33 #include <linux/delay.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/if_ether.h>
  36 #include <linux/ethtool.h>
  37
  38 #include "igb.h"
  39
  40 enum {NETDEV_STATS, IGB_STATS};
  41
  42 struct igb_stats {
  43         char stat_string[ETH_GSTRING_LEN];
  44         int type;
  45         int sizeof_stat;
  46         int stat_offset;
  47 };
  48
  49 #define IGB_STAT(m)             IGB_STATS, \
  50                                 FIELD_SIZEOF(struct igb_adapter, m), \
  51                                 offsetof(struct igb_adapter, m)
  52 #define IGB_NETDEV_STAT(m)      NETDEV_STATS, \
  53                                 FIELD_SIZEOF(struct net_device, m), \
  54                                 offsetof(struct net_device, m)
  55
  56 static const struct igb_stats igb_gstrings_stats[] = {
  57         { "rx_packets", IGB_STAT(stats.gprc) },
  58         { "tx_packets", IGB_STAT(stats.gptc) },
  59         { "rx_bytes", IGB_STAT(stats.gorc) },
  60         { "tx_bytes", IGB_STAT(stats.gotc) },
  61         { "rx_broadcast", IGB_STAT(stats.bprc) },
  62         { "tx_broadcast", IGB_STAT(stats.bptc) },
  63         { "rx_multicast", IGB_STAT(stats.mprc) },
  64         { "tx_multicast", IGB_STAT(stats.mptc) },
  65         { "rx_errors", IGB_NETDEV_STAT(stats.rx_errors) },
  66         { "tx_errors", IGB_NETDEV_STAT(stats.tx_errors) },
  67         { "tx_dropped", IGB_NETDEV_STAT(stats.tx_dropped) },
  68         { "multicast", IGB_STAT(stats.mprc) },
  69         { "collisions", IGB_STAT(stats.colc) },
  70         { "rx_length_errors", IGB_NETDEV_STAT(stats.rx_length_errors) },
  71         { "rx_over_errors", IGB_NETDEV_STAT(stats.rx_over_errors) },
  72         { "rx_crc_errors", IGB_STAT(stats.crcerrs) },
  73         { "rx_frame_errors", IGB_NETDEV_STAT(stats.rx_frame_errors) },
  74         { "rx_no_buffer_count", IGB_STAT(stats.rnbc) },
  75         { "rx_queue_drop_packet_count", IGB_NETDEV_STAT(stats.rx_fifo_errors) },
  76         { "rx_missed_errors", IGB_STAT(stats.mpc) },
  77         { "tx_aborted_errors", IGB_STAT(stats.ecol) },
  78         { "tx_carrier_errors", IGB_STAT(stats.tncrs) },
  79         { "tx_fifo_errors", IGB_NETDEV_STAT(stats.tx_fifo_errors) },
  80         { "tx_heartbeat_errors", IGB_NETDEV_STAT(stats.tx_heartbeat_errors) },
  81         { "tx_window_errors", IGB_STAT(stats.latecol) },
  82         { "tx_abort_late_coll", IGB_STAT(stats.latecol) },
  83         { "tx_deferred_ok", IGB_STAT(stats.dc) },
  84         { "tx_single_coll_ok", IGB_STAT(stats.scc) },
  85         { "tx_multi_coll_ok", IGB_STAT(stats.mcc) },
  86         { "tx_timeout_count", IGB_STAT(tx_timeout_count) },
  87         { "rx_long_length_errors", IGB_STAT(stats.roc) },
  88         { "rx_short_length_errors", IGB_STAT(stats.ruc) },
  89         { "rx_align_errors", IGB_STAT(stats.algnerrc) },
  90         { "tx_tcp_seg_good", IGB_STAT(stats.tsctc) },
  91         { "tx_tcp_seg_failed", IGB_STAT(stats.tsctfc) },
  92         { "rx_flow_control_xon", IGB_STAT(stats.xonrxc) },
  93         { "rx_flow_control_xoff", IGB_STAT(stats.xoffrxc) },
  94         { "tx_flow_control_xon", IGB_STAT(stats.xontxc) },
  95         { "tx_flow_control_xoff", IGB_STAT(stats.xofftxc) },
  96         { "rx_long_byte_count", IGB_STAT(stats.gorc) },
  97         { "tx_dma_out_of_sync", IGB_STAT(stats.doosync) },
  98         { "tx_smbus", IGB_STAT(stats.mgptc) },
  99         { "rx_smbus", IGB_STAT(stats.mgprc) },
 100         { "dropped_smbus", IGB_STAT(stats.mgpdc) },
 101 };
 102
 103 #define IGB_QUEUE_STATS_LEN \
 104         ((((struct igb_adapter *)netdev_priv(netdev))->num_rx_queues * \
 105           (sizeof(struct igb_rx_queue_stats) / sizeof(u64))) + \
 106          (((struct igb_adapter *)netdev_priv(netdev))->num_tx_queues * \
 107           (sizeof(struct igb_tx_queue_stats) / sizeof(u64))))
 108 #define IGB_GLOBAL_STATS_LEN    \
 109         (sizeof(igb_gstrings_stats) / sizeof(struct igb_stats))
 110 #define IGB_STATS_LEN (IGB_GLOBAL_STATS_LEN + IGB_QUEUE_STATS_LEN)
 111 static const char igb_gstrings_test[][ETH_GSTRING_LEN] = {
 112         "Register test  (offline)", "Eeprom test    (offline)",
 113         "Interrupt test (offline)", "Loopback test  (offline)",
 114         "Link test   (on/offline)"
 115 };
 116 #define IGB_TEST_LEN (sizeof(igb_gstrings_test) / ETH_GSTRING_LEN)
 117
 118 static int igb_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
 119 {
 120         struct igb_adapter *adapter = netdev_priv(netdev);
 121         struct e1000_hw *hw = &adapter->hw;
 122         u32 status;
 123
 124         if (hw->phy.media_type == e1000_media_type_copper) {
 125
 126                 ecmd->supported = (SUPPORTED_10baseT_Half |
 127                                    SUPPORTED_10baseT_Full |
 128                                    SUPPORTED_100baseT_Half |
 129                                    SUPPORTED_100baseT_Full |
 130                                    SUPPORTED_1000baseT_Full|
 131                                    SUPPORTED_Autoneg |
 132                                    SUPPORTED_TP);
 133                 ecmd->advertising = ADVERTISED_TP;
 134
 135                 if (hw->mac.autoneg == 1) {
 136                         ecmd->advertising |= ADVERTISED_Autoneg;
 137                         /* the e1000 autoneg seems to match ethtool nicely */
 138                         ecmd->advertising |= hw->phy.autoneg_advertised;
 139                 }
 140
 141                 ecmd->port = PORT_TP;
 142                 ecmd->phy_address = hw->phy.addr;
 143         } else {
 144                 ecmd->supported   = (SUPPORTED_1000baseT_Full |
 145                                      SUPPORTED_FIBRE |
 146                                      SUPPORTED_Autoneg);
 147
 148                 ecmd->advertising = (ADVERTISED_1000baseT_Full |
 149                                      ADVERTISED_FIBRE |
 150                                      ADVERTISED_Autoneg);
 151
 152                 ecmd->port = PORT_FIBRE;
 153         }
 154
 155         ecmd->transceiver = XCVR_INTERNAL;
 156
 157         status = rd32(E1000_STATUS);
 158
 159         if (status & E1000_STATUS_LU) {
 160
 161                 if ((status & E1000_STATUS_SPEED_1000) ||
 162                     hw->phy.media_type != e1000_media_type_copper)
 163                         ecmd->speed = SPEED_1000;
 164                 else if (status & E1000_STATUS_SPEED_100)
 165                         ecmd->speed = SPEED_100;
 166                 else
 167                         ecmd->speed = SPEED_10;
 168
 169                 if ((status & E1000_STATUS_FD) ||
 170                     hw->phy.media_type != e1000_media_type_copper)
 171                         ecmd->duplex = DUPLEX_FULL;
 172                 else
 173                         ecmd->duplex = DUPLEX_HALF;
 174         } else {
 175                 ecmd->speed = -1;
 176                 ecmd->duplex = -1;
 177         }
 178
 179         ecmd->autoneg = hw->mac.autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE;
 180         return 0;
 181 }
 182
 183 static int igb_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
 184 {
 185         struct igb_adapter *adapter = netdev_priv(netdev);
 186         struct e1000_hw *hw = &adapter->hw;
 187
 188         /* When SoL/IDER sessions are active, autoneg/speed/duplex
 189          * cannot be changed */
 190         if (igb_check_reset_block(hw)) {
 191                 dev_err(&adapter->pdev->dev, "Cannot change link "
 192                         "characteristics when SoL/IDER is active.\n");
 193                 return -EINVAL;
 194         }
 195
 196         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 197                 msleep(1);
 198
 199         if (ecmd->autoneg == AUTONEG_ENABLE) {
 200                 hw->mac.autoneg = 1;
 201                 hw->phy.autoneg_advertised = ecmd->advertising |
 202                                              ADVERTISED_TP |
 203                                              ADVERTISED_Autoneg;
 204                 ecmd->advertising = hw->phy.autoneg_advertised;
 205                 if (adapter->fc_autoneg)
 206                         hw->fc.requested_mode = e1000_fc_default;
 207         } else {
 208                 if (igb_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex)) {
 209                         clear_bit(__IGB_RESETTING, &adapter->state);
 210                         return -EINVAL;
 211                 }
 212         }
 213
 214         /* reset the link */
 215         if (netif_running(adapter->netdev)) {
 216                 igb_down(adapter);
 217                 igb_up(adapter);
 218         } else
 219                 igb_reset(adapter);
 220
 221         clear_bit(__IGB_RESETTING, &adapter->state);
 222         return 0;
 223 }
 224
 225 static void igb_get_pauseparam(struct net_device *netdev,
 226                                struct ethtool_pauseparam *pause)
 227 {
 228         struct igb_adapter *adapter = netdev_priv(netdev);
 229         struct e1000_hw *hw = &adapter->hw;
 230
 231         pause->autoneg =
 232                 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
 233
 234         if (hw->fc.current_mode == e1000_fc_rx_pause)
 235                 pause->rx_pause = 1;
 236         else if (hw->fc.current_mode == e1000_fc_tx_pause)
 237                 pause->tx_pause = 1;
 238         else if (hw->fc.current_mode == e1000_fc_full) {
 239                 pause->rx_pause = 1;
 240                 pause->tx_pause = 1;
 241         }
 242 }
 243
 244 static int igb_set_pauseparam(struct net_device *netdev,
 245                               struct ethtool_pauseparam *pause)
 246 {
 247         struct igb_adapter *adapter = netdev_priv(netdev);
 248         struct e1000_hw *hw = &adapter->hw;
 249         int retval = 0;
 250
 251         adapter->fc_autoneg = pause->autoneg;
 252
 253         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 254                 msleep(1);
 255
 256         if (adapter->fc_autoneg == AUTONEG_ENABLE) {
 257                 hw->fc.requested_mode = e1000_fc_default;
 258                 if (netif_running(adapter->netdev)) {
 259                         igb_down(adapter);
 260                         igb_up(adapter);
 261                 } else {
 262                         igb_reset(adapter);
 263                 }
 264         } else {
 265                 if (pause->rx_pause && pause->tx_pause)
 266                         hw->fc.requested_mode = e1000_fc_full;
 267                 else if (pause->rx_pause && !pause->tx_pause)
 268                         hw->fc.requested_mode = e1000_fc_rx_pause;
 269                 else if (!pause->rx_pause && pause->tx_pause)
 270                         hw->fc.requested_mode = e1000_fc_tx_pause;
 271                 else if (!pause->rx_pause && !pause->tx_pause)
 272                         hw->fc.requested_mode = e1000_fc_none;
 273
 274                 hw->fc.current_mode = hw->fc.requested_mode;
 275
 276                 retval = ((hw->phy.media_type == e1000_media_type_copper) ?
 277                           igb_force_mac_fc(hw) : igb_setup_link(hw));
 278         }
 279
 280         clear_bit(__IGB_RESETTING, &adapter->state);
 281         return retval;
 282 }
 283
 284 static u32 igb_get_rx_csum(struct net_device *netdev)
 285 {
 286         struct igb_adapter *adapter = netdev_priv(netdev);
 287         return !!(adapter->rx_ring[0].flags & IGB_RING_FLAG_RX_CSUM);
 288 }
 289
 290 static int igb_set_rx_csum(struct net_device *netdev, u32 data)
 291 {
 292         struct igb_adapter *adapter = netdev_priv(netdev);
 293         int i;
 294
 295         for (i = 0; i < adapter->num_rx_queues; i++) {
 296                 if (data)
 297                         adapter->rx_ring[i].flags |= IGB_RING_FLAG_RX_CSUM;
 298                 else
 299                         adapter->rx_ring[i].flags &= ~IGB_RING_FLAG_RX_CSUM;
 300         }
 301
 302         return 0;
 303 }
 304
 305 static u32 igb_get_tx_csum(struct net_device *netdev)
 306 {
 307         return (netdev->features & NETIF_F_IP_CSUM) != 0;
 308 }
 309
 310 static int igb_set_tx_csum(struct net_device *netdev, u32 data)
 311 {
 312         struct igb_adapter *adapter = netdev_priv(netdev);
 313
 314         if (data) {
 315                 netdev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
 316                 if (adapter->hw.mac.type >= e1000_82576)
 317                         netdev->features |= NETIF_F_SCTP_CSUM;
 318         } else {
 319                 netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
 320                                       NETIF_F_SCTP_CSUM);
 321         }
 322
 323         return 0;
 324 }
 325
 326 static int igb_set_tso(struct net_device *netdev, u32 data)
 327 {
 328         struct igb_adapter *adapter = netdev_priv(netdev);
 329
 330         if (data) {
 331                 netdev->features |= NETIF_F_TSO;
 332                 netdev->features |= NETIF_F_TSO6;
 333         } else {
 334                 netdev->features &= ~NETIF_F_TSO;
 335                 netdev->features &= ~NETIF_F_TSO6;
 336         }
 337
 338         dev_info(&adapter->pdev->dev, "TSO is %s\n",
 339                  data ? "Enabled" : "Disabled");
 340         return 0;
 341 }
 342
 343 static u32 igb_get_msglevel(struct net_device *netdev)
 344 {
 345         struct igb_adapter *adapter = netdev_priv(netdev);
 346         return adapter->msg_enable;
 347 }
 348
 349 static void igb_set_msglevel(struct net_device *netdev, u32 data)
 350 {
 351         struct igb_adapter *adapter = netdev_priv(netdev);
 352         adapter->msg_enable = data;
 353 }
 354
 355 static int igb_get_regs_len(struct net_device *netdev)
 356 {
 357 #define IGB_REGS_LEN 551
 358         return IGB_REGS_LEN * sizeof(u32);
 359 }
 360
 361 static void igb_get_regs(struct net_device *netdev,
 362                          struct ethtool_regs *regs, void *p)
 363 {
 364         struct igb_adapter *adapter = netdev_priv(netdev);
 365         struct e1000_hw *hw = &adapter->hw;
 366         u32 *regs_buff = p;
 367         u8 i;
 368
 369         memset(p, 0, IGB_REGS_LEN * sizeof(u32));
 370
 371         regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
 372
 373         /* General Registers */
 374         regs_buff[0] = rd32(E1000_CTRL);
 375         regs_buff[1] = rd32(E1000_STATUS);
 376         regs_buff[2] = rd32(E1000_CTRL_EXT);
 377         regs_buff[3] = rd32(E1000_MDIC);
 378         regs_buff[4] = rd32(E1000_SCTL);
 379         regs_buff[5] = rd32(E1000_CONNSW);
 380         regs_buff[6] = rd32(E1000_VET);
 381         regs_buff[7] = rd32(E1000_LEDCTL);
 382         regs_buff[8] = rd32(E1000_PBA);
 383         regs_buff[9] = rd32(E1000_PBS);
 384         regs_buff[10] = rd32(E1000_FRTIMER);
 385         regs_buff[11] = rd32(E1000_TCPTIMER);
 386
 387         /* NVM Register */
 388         regs_buff[12] = rd32(E1000_EECD);
 389
 390         /* Interrupt */
 391         /* Reading EICS for EICR because they read the
 392          * same but EICS does not clear on read */
 393         regs_buff[13] = rd32(E1000_EICS);
 394         regs_buff[14] = rd32(E1000_EICS);
 395         regs_buff[15] = rd32(E1000_EIMS);
 396         regs_buff[16] = rd32(E1000_EIMC);
 397         regs_buff[17] = rd32(E1000_EIAC);
 398         regs_buff[18] = rd32(E1000_EIAM);
 399         /* Reading ICS for ICR because they read the
 400          * same but ICS does not clear on read */
 401         regs_buff[19] = rd32(E1000_ICS);
 402         regs_buff[20] = rd32(E1000_ICS);
 403         regs_buff[21] = rd32(E1000_IMS);
 404         regs_buff[22] = rd32(E1000_IMC);
 405         regs_buff[23] = rd32(E1000_IAC);
 406         regs_buff[24] = rd32(E1000_IAM);
 407         regs_buff[25] = rd32(E1000_IMIRVP);
 408
 409         /* Flow Control */
 410         regs_buff[26] = rd32(E1000_FCAL);
 411         regs_buff[27] = rd32(E1000_FCAH);
 412         regs_buff[28] = rd32(E1000_FCTTV);
 413         regs_buff[29] = rd32(E1000_FCRTL);
 414         regs_buff[30] = rd32(E1000_FCRTH);
 415         regs_buff[31] = rd32(E1000_FCRTV);
 416
 417         /* Receive */
 418         regs_buff[32] = rd32(E1000_RCTL);
 419         regs_buff[33] = rd32(E1000_RXCSUM);
 420         regs_buff[34] = rd32(E1000_RLPML);
 421         regs_buff[35] = rd32(E1000_RFCTL);
 422         regs_buff[36] = rd32(E1000_MRQC);
 423         regs_buff[37] = rd32(E1000_VT_CTL);
 424
 425         /* Transmit */
 426         regs_buff[38] = rd32(E1000_TCTL);
 427         regs_buff[39] = rd32(E1000_TCTL_EXT);
 428         regs_buff[40] = rd32(E1000_TIPG);
 429         regs_buff[41] = rd32(E1000_DTXCTL);
 430
 431         /* Wake Up */
 432         regs_buff[42] = rd32(E1000_WUC);
 433         regs_buff[43] = rd32(E1000_WUFC);
 434         regs_buff[44] = rd32(E1000_WUS);
 435         regs_buff[45] = rd32(E1000_IPAV);
 436         regs_buff[46] = rd32(E1000_WUPL);
 437
 438         /* MAC */
 439         regs_buff[47] = rd32(E1000_PCS_CFG0);
 440         regs_buff[48] = rd32(E1000_PCS_LCTL);
 441         regs_buff[49] = rd32(E1000_PCS_LSTAT);
 442         regs_buff[50] = rd32(E1000_PCS_ANADV);
 443         regs_buff[51] = rd32(E1000_PCS_LPAB);
 444         regs_buff[52] = rd32(E1000_PCS_NPTX);
 445         regs_buff[53] = rd32(E1000_PCS_LPABNP);
 446
 447         /* Statistics */
 448         regs_buff[54] = adapter->stats.crcerrs;
 449         regs_buff[55] = adapter->stats.algnerrc;
 450         regs_buff[56] = adapter->stats.symerrs;
 451         regs_buff[57] = adapter->stats.rxerrc;
 452         regs_buff[58] = adapter->stats.mpc;
 453         regs_buff[59] = adapter->stats.scc;
 454         regs_buff[60] = adapter->stats.ecol;
 455         regs_buff[61] = adapter->stats.mcc;
 456         regs_buff[62] = adapter->stats.latecol;
 457         regs_buff[63] = adapter->stats.colc;
 458         regs_buff[64] = adapter->stats.dc;
 459         regs_buff[65] = adapter->stats.tncrs;
 460         regs_buff[66] = adapter->stats.sec;
 461         regs_buff[67] = adapter->stats.htdpmc;
 462         regs_buff[68] = adapter->stats.rlec;
 463         regs_buff[69] = adapter->stats.xonrxc;
 464         regs_buff[70] = adapter->stats.xontxc;
 465         regs_buff[71] = adapter->stats.xoffrxc;
 466         regs_buff[72] = adapter->stats.xofftxc;
 467         regs_buff[73] = adapter->stats.fcruc;
 468         regs_buff[74] = adapter->stats.prc64;
 469         regs_buff[75] = adapter->stats.prc127;
 470         regs_buff[76] = adapter->stats.prc255;
 471         regs_buff[77] = adapter->stats.prc511;
 472         regs_buff[78] = adapter->stats.prc1023;
 473         regs_buff[79] = adapter->stats.prc1522;
 474         regs_buff[80] = adapter->stats.gprc;
 475         regs_buff[81] = adapter->stats.bprc;
 476         regs_buff[82] = adapter->stats.mprc;
 477         regs_buff[83] = adapter->stats.gptc;
 478         regs_buff[84] = adapter->stats.gorc;
 479         regs_buff[86] = adapter->stats.gotc;
 480         regs_buff[88] = adapter->stats.rnbc;
 481         regs_buff[89] = adapter->stats.ruc;
 482         regs_buff[90] = adapter->stats.rfc;
 483         regs_buff[91] = adapter->stats.roc;
 484         regs_buff[92] = adapter->stats.rjc;
 485         regs_buff[93] = adapter->stats.mgprc;
 486         regs_buff[94] = adapter->stats.mgpdc;
 487         regs_buff[95] = adapter->stats.mgptc;
 488         regs_buff[96] = adapter->stats.tor;
 489         regs_buff[98] = adapter->stats.tot;
 490         regs_buff[100] = adapter->stats.tpr;
 491         regs_buff[101] = adapter->stats.tpt;
 492         regs_buff[102] = adapter->stats.ptc64;
 493         regs_buff[103] = adapter->stats.ptc127;
 494         regs_buff[104] = adapter->stats.ptc255;
 495         regs_buff[105] = adapter->stats.ptc511;
 496         regs_buff[106] = adapter->stats.ptc1023;
 497         regs_buff[107] = adapter->stats.ptc1522;
 498         regs_buff[108] = adapter->stats.mptc;
 499         regs_buff[109] = adapter->stats.bptc;
 500         regs_buff[110] = adapter->stats.tsctc;
 501         regs_buff[111] = adapter->stats.iac;
 502         regs_buff[112] = adapter->stats.rpthc;
 503         regs_buff[113] = adapter->stats.hgptc;
 504         regs_buff[114] = adapter->stats.hgorc;
 505         regs_buff[116] = adapter->stats.hgotc;
 506         regs_buff[118] = adapter->stats.lenerrs;
 507         regs_buff[119] = adapter->stats.scvpc;
 508         regs_buff[120] = adapter->stats.hrmpc;
 509
 510         for (i = 0; i < 4; i++)
 511                 regs_buff[121 + i] = rd32(E1000_SRRCTL(i));
 512         for (i = 0; i < 4; i++)
 513                 regs_buff[125 + i] = rd32(E1000_PSRTYPE(i));
 514         for (i = 0; i < 4; i++)
 515                 regs_buff[129 + i] = rd32(E1000_RDBAL(i));
 516         for (i = 0; i < 4; i++)
 517                 regs_buff[133 + i] = rd32(E1000_RDBAH(i));
 518         for (i = 0; i < 4; i++)
 519                 regs_buff[137 + i] = rd32(E1000_RDLEN(i));
 520         for (i = 0; i < 4; i++)
 521                 regs_buff[141 + i] = rd32(E1000_RDH(i));
 522         for (i = 0; i < 4; i++)
 523                 regs_buff[145 + i] = rd32(E1000_RDT(i));
 524         for (i = 0; i < 4; i++)
 525                 regs_buff[149 + i] = rd32(E1000_RXDCTL(i));
 526
 527         for (i = 0; i < 10; i++)
 528                 regs_buff[153 + i] = rd32(E1000_EITR(i));
 529         for (i = 0; i < 8; i++)
 530                 regs_buff[163 + i] = rd32(E1000_IMIR(i));
 531         for (i = 0; i < 8; i++)
 532                 regs_buff[171 + i] = rd32(E1000_IMIREXT(i));
 533         for (i = 0; i < 16; i++)
 534                 regs_buff[179 + i] = rd32(E1000_RAL(i));
 535         for (i = 0; i < 16; i++)
 536                 regs_buff[195 + i] = rd32(E1000_RAH(i));
 537
 538         for (i = 0; i < 4; i++)
 539                 regs_buff[211 + i] = rd32(E1000_TDBAL(i));
 540         for (i = 0; i < 4; i++)
 541                 regs_buff[215 + i] = rd32(E1000_TDBAH(i));
 542         for (i = 0; i < 4; i++)
 543                 regs_buff[219 + i] = rd32(E1000_TDLEN(i));
 544         for (i = 0; i < 4; i++)
 545                 regs_buff[223 + i] = rd32(E1000_TDH(i));
 546         for (i = 0; i < 4; i++)
 547                 regs_buff[227 + i] = rd32(E1000_TDT(i));
 548         for (i = 0; i < 4; i++)
 549                 regs_buff[231 + i] = rd32(E1000_TXDCTL(i));
 550         for (i = 0; i < 4; i++)
 551                 regs_buff[235 + i] = rd32(E1000_TDWBAL(i));
 552         for (i = 0; i < 4; i++)
 553                 regs_buff[239 + i] = rd32(E1000_TDWBAH(i));
 554         for (i = 0; i < 4; i++)
 555                 regs_buff[243 + i] = rd32(E1000_DCA_TXCTRL(i));
 556
 557         for (i = 0; i < 4; i++)
 558                 regs_buff[247 + i] = rd32(E1000_IP4AT_REG(i));
 559         for (i = 0; i < 4; i++)
 560                 regs_buff[251 + i] = rd32(E1000_IP6AT_REG(i));
 561         for (i = 0; i < 32; i++)
 562                 regs_buff[255 + i] = rd32(E1000_WUPM_REG(i));
 563         for (i = 0; i < 128; i++)
 564                 regs_buff[287 + i] = rd32(E1000_FFMT_REG(i));
 565         for (i = 0; i < 128; i++)
 566                 regs_buff[415 + i] = rd32(E1000_FFVT_REG(i));
 567         for (i = 0; i < 4; i++)
 568                 regs_buff[543 + i] = rd32(E1000_FFLT_REG(i));
 569
 570         regs_buff[547] = rd32(E1000_TDFH);
 571         regs_buff[548] = rd32(E1000_TDFT);
 572         regs_buff[549] = rd32(E1000_TDFHS);
 573         regs_buff[550] = rd32(E1000_TDFPC);
 574
 575 }
 576
 577 static int igb_get_eeprom_len(struct net_device *netdev)
 578 {
 579         struct igb_adapter *adapter = netdev_priv(netdev);
 580         return adapter->hw.nvm.word_size * 2;
 581 }
 582
 583 static int igb_get_eeprom(struct net_device *netdev,
 584                           struct ethtool_eeprom *eeprom, u8 *bytes)
 585 {
 586         struct igb_adapter *adapter = netdev_priv(netdev);
 587         struct e1000_hw *hw = &adapter->hw;
 588         u16 *eeprom_buff;
 589         int first_word, last_word;
 590         int ret_val = 0;
 591         u16 i;
 592
 593         if (eeprom->len == 0)
 594                 return -EINVAL;
 595
 596         eeprom->magic = hw->vendor_id | (hw->device_id << 16);
 597
 598         first_word = eeprom->offset >> 1;
 599         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 600
 601         eeprom_buff = kmalloc(sizeof(u16) *
 602                         (last_word - first_word + 1), GFP_KERNEL);
 603         if (!eeprom_buff)
 604                 return -ENOMEM;
 605
 606         if (hw->nvm.type == e1000_nvm_eeprom_spi)
 607                 ret_val = hw->nvm.ops.read(hw, first_word,
 608                                             last_word - first_word + 1,
 609                                             eeprom_buff);
 610         else {
 611                 for (i = 0; i < last_word - first_word + 1; i++) {
 612                         ret_val = hw->nvm.ops.read(hw, first_word + i, 1,
 613                                                     &eeprom_buff[i]);
 614                         if (ret_val)
 615                                 break;
 616                 }
 617         }
 618
 619         /* Device's eeprom is always little-endian, word addressable */
 620         for (i = 0; i < last_word - first_word + 1; i++)
 621                 le16_to_cpus(&eeprom_buff[i]);
 622
 623         memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1),
 624                         eeprom->len);
 625         kfree(eeprom_buff);
 626
 627         return ret_val;
 628 }
 629
 630 static int igb_set_eeprom(struct net_device *netdev,
 631                           struct ethtool_eeprom *eeprom, u8 *bytes)
 632 {
 633         struct igb_adapter *adapter = netdev_priv(netdev);
 634         struct e1000_hw *hw = &adapter->hw;
 635         u16 *eeprom_buff;
 636         void *ptr;
 637         int max_len, first_word, last_word, ret_val = 0;
 638         u16 i;
 639
 640         if (eeprom->len == 0)
 641                 return -EOPNOTSUPP;
 642
 643         if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
 644                 return -EFAULT;
 645
 646         max_len = hw->nvm.word_size * 2;
 647
 648         first_word = eeprom->offset >> 1;
 649         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 650         eeprom_buff = kmalloc(max_len, GFP_KERNEL);
 651         if (!eeprom_buff)
 652                 return -ENOMEM;
 653
 654         ptr = (void *)eeprom_buff;
 655
 656         if (eeprom->offset & 1) {
 657                 /* need read/modify/write of first changed EEPROM word */
 658                 /* only the second byte of the word is being modified */
 659                 ret_val = hw->nvm.ops.read(hw, first_word, 1,
 660                                             &eeprom_buff[0]);
 661                 ptr++;
 662         }
 663         if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
 664                 /* need read/modify/write of last changed EEPROM word */
 665                 /* only the first byte of the word is being modified */
 666                 ret_val = hw->nvm.ops.read(hw, last_word, 1,
 667                                    &eeprom_buff[last_word - first_word]);
 668         }
 669
 670         /* Device's eeprom is always little-endian, word addressable */
 671         for (i = 0; i < last_word - first_word + 1; i++)
 672                 le16_to_cpus(&eeprom_buff[i]);
 673
 674         memcpy(ptr, bytes, eeprom->len);
 675
 676         for (i = 0; i < last_word - first_word + 1; i++)
 677                 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
 678
 679         ret_val = hw->nvm.ops.write(hw, first_word,
 680                                      last_word - first_word + 1, eeprom_buff);
 681
 682         /* Update the checksum over the first part of the EEPROM if needed
 683          * and flush shadow RAM for 82573 controllers */
 684         if ((ret_val == 0) && ((first_word <= NVM_CHECKSUM_REG)))
 685                 igb_update_nvm_checksum(hw);
 686
 687         kfree(eeprom_buff);
 688         return ret_val;
 689 }
 690
 691 static void igb_get_drvinfo(struct net_device *netdev,
 692                             struct ethtool_drvinfo *drvinfo)
 693 {
 694         struct igb_adapter *adapter = netdev_priv(netdev);
 695         char firmware_version[32];
 696         u16 eeprom_data;
 697
 698         strncpy(drvinfo->driver,  igb_driver_name, 32);
 699         strncpy(drvinfo->version, igb_driver_version, 32);
 700
 701         /* EEPROM image version # is reported as firmware version # for
 702          * 82575 controllers */
 703         adapter->hw.nvm.ops.read(&adapter->hw, 5, 1, &eeprom_data);
 704         sprintf(firmware_version, "%d.%d-%d",
 705                 (eeprom_data & 0xF000) >> 12,
 706                 (eeprom_data & 0x0FF0) >> 4,
 707                 eeprom_data & 0x000F);
 708
 709         strncpy(drvinfo->fw_version, firmware_version, 32);
 710         strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
 711         drvinfo->n_stats = IGB_STATS_LEN;
 712         drvinfo->testinfo_len = IGB_TEST_LEN;
 713         drvinfo->regdump_len = igb_get_regs_len(netdev);
 714         drvinfo->eedump_len = igb_get_eeprom_len(netdev);
 715 }
 716
 717 static void igb_get_ringparam(struct net_device *netdev,
 718                               struct ethtool_ringparam *ring)
 719 {
 720         struct igb_adapter *adapter = netdev_priv(netdev);
 721
 722         ring->rx_max_pending = IGB_MAX_RXD;
 723         ring->tx_max_pending = IGB_MAX_TXD;
 724         ring->rx_mini_max_pending = 0;
 725         ring->rx_jumbo_max_pending = 0;
 726         ring->rx_pending = adapter->rx_ring_count;
 727         ring->tx_pending = adapter->tx_ring_count;
 728         ring->rx_mini_pending = 0;
 729         ring->rx_jumbo_pending = 0;
 730 }
 731
 732 static int igb_set_ringparam(struct net_device *netdev,
 733                              struct ethtool_ringparam *ring)
 734 {
 735         struct igb_adapter *adapter = netdev_priv(netdev);
 736         struct igb_ring *temp_ring;
 737         int i, err = 0;
 738         u32 new_rx_count, new_tx_count;
 739
 740         if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
 741                 return -EINVAL;
 742
 743         new_rx_count = min(ring->rx_pending, (u32)IGB_MAX_RXD);
 744         new_rx_count = max(new_rx_count, (u16)IGB_MIN_RXD);
 745         new_rx_count = ALIGN(new_rx_count, REQ_RX_DESCRIPTOR_MULTIPLE);
 746
 747         new_tx_count = min(ring->tx_pending, (u32)IGB_MAX_TXD);
 748         new_tx_count = max(new_tx_count, (u16)IGB_MIN_TXD);
 749         new_tx_count = ALIGN(new_tx_count, REQ_TX_DESCRIPTOR_MULTIPLE);
 750
 751         if ((new_tx_count == adapter->tx_ring_count) &&
 752             (new_rx_count == adapter->rx_ring_count)) {
 753                 /* nothing to do */
 754                 return 0;
 755         }
 756
 757         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 758                 msleep(1);
 759
 760         if (!netif_running(adapter->netdev)) {
 761                 for (i = 0; i < adapter->num_tx_queues; i++)
 762                         adapter->tx_ring[i].count = new_tx_count;
 763                 for (i = 0; i < adapter->num_rx_queues; i++)
 764                         adapter->rx_ring[i].count = new_rx_count;
 765                 adapter->tx_ring_count = new_tx_count;
 766                 adapter->rx_ring_count = new_rx_count;
 767                 goto clear_reset;
 768         }
 769
 770         if (adapter->num_tx_queues > adapter->num_rx_queues)
 771                 temp_ring = vmalloc(adapter->num_tx_queues * sizeof(struct igb_ring));
 772         else
 773                 temp_ring = vmalloc(adapter->num_rx_queues * sizeof(struct igb_ring));
 774
 775         if (!temp_ring) {
 776                 err = -ENOMEM;
 777                 goto clear_reset;
 778         }
 779
 780         igb_down(adapter);
 781
 782         /*
 783          * We can't just free everything and then setup again,
 784          * because the ISRs in MSI-X mode get passed pointers
 785          * to the tx and rx ring structs.
 786          */
 787         if (new_tx_count != adapter->tx_ring_count) {
 788                 memcpy(temp_ring, adapter->tx_ring,
 789                        adapter->num_tx_queues * sizeof(struct igb_ring));
 790
 791                 for (i = 0; i < adapter->num_tx_queues; i++) {
 792                         temp_ring[i].count = new_tx_count;
 793                         err = igb_setup_tx_resources(&temp_ring[i]);
 794                         if (err) {
 795                                 while (i) {
 796                                         i--;
 797                                         igb_free_tx_resources(&temp_ring[i]);
 798                                 }
 799                                 goto err_setup;
 800                         }
 801                 }
 802
 803                 for (i = 0; i < adapter->num_tx_queues; i++)
 804                         igb_free_tx_resources(&adapter->tx_ring[i]);
 805
 806                 memcpy(adapter->tx_ring, temp_ring,
 807                        adapter->num_tx_queues * sizeof(struct igb_ring));
 808
 809                 adapter->tx_ring_count = new_tx_count;
 810         }
 811
 812         if (new_rx_count != adapter->rx_ring->count) {
 813                 memcpy(temp_ring, adapter->rx_ring,
 814                        adapter->num_rx_queues * sizeof(struct igb_ring));
 815
 816                 for (i = 0; i < adapter->num_rx_queues; i++) {
 817                         temp_ring[i].count = new_rx_count;
 818                         err = igb_setup_rx_resources(&temp_ring[i]);
 819                         if (err) {
 820                                 while (i) {
 821                                         i--;
 822                                         igb_free_rx_resources(&temp_ring[i]);
 823                                 }
 824                                 goto err_setup;
 825                         }
 826
 827                 }
 828
 829                 for (i = 0; i < adapter->num_rx_queues; i++)
 830                         igb_free_rx_resources(&adapter->rx_ring[i]);
 831
 832                 memcpy(adapter->rx_ring, temp_ring,
 833                        adapter->num_rx_queues * sizeof(struct igb_ring));
 834
 835                 adapter->rx_ring_count = new_rx_count;
 836         }
 837 err_setup:
 838         igb_up(adapter);
 839         vfree(temp_ring);
 840 clear_reset:
 841         clear_bit(__IGB_RESETTING, &adapter->state);
 842         return err;
 843 }
 844
 845 /* ethtool register test data */
 846 struct igb_reg_test {
 847         u16 reg;
 848         u16 reg_offset;
 849         u16 array_len;
 850         u16 test_type;
 851         u32 mask;
 852         u32 write;
 853 };
 854
 855 /* In the hardware, registers are laid out either singly, in arrays
 856  * spaced 0x100 bytes apart, or in contiguous tables.  We assume
 857  * most tests take place on arrays or single registers (handled
 858  * as a single-element array) and special-case the tables.
 859  * Table tests are always pattern tests.
 860  *
 861  * We also make provision for some required setup steps by specifying
 862  * registers to be written without any read-back testing.
 863  */
 864
 865 #define PATTERN_TEST    1
 866 #define SET_READ_TEST   2
 867 #define WRITE_NO_TEST   3
 868 #define TABLE32_TEST    4
 869 #define TABLE64_TEST_LO 5
 870 #define TABLE64_TEST_HI 6
 871
 872 /* 82576 reg test */
 873 static struct igb_reg_test reg_test_82576[] = {
 874         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 875         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
 876         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
 877         { E1000_VET,       0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 878         { E1000_RDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 879         { E1000_RDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 880         { E1000_RDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
 881         { E1000_RDBAL(4),  0x40, 12, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 882         { E1000_RDBAH(4),  0x40, 12, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 883         { E1000_RDLEN(4),  0x40, 12, PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
 884         /* Enable all RX queues before testing. */
 885         { E1000_RXDCTL(0), 0x100, 4,  WRITE_NO_TEST, 0, E1000_RXDCTL_QUEUE_ENABLE },
 886         { E1000_RXDCTL(4), 0x40, 12,  WRITE_NO_TEST, 0, E1000_RXDCTL_QUEUE_ENABLE },
 887         /* RDH is read-only for 82576, only test RDT. */
 888         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 889         { E1000_RDT(4),    0x40, 12,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 890         { E1000_RXDCTL(0), 0x100, 4,  WRITE_NO_TEST, 0, 0 },
 891         { E1000_RXDCTL(4), 0x40, 12,  WRITE_NO_TEST, 0, 0 },
 892         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
 893         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 894         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
 895         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 896         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 897         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
 898         { E1000_TDBAL(4),  0x40, 12,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 899         { E1000_TDBAH(4),  0x40, 12,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 900         { E1000_TDLEN(4),  0x40, 12,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
 901         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
 902         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
 903         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
 904         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
 905         { E1000_RA,        0, 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
 906         { E1000_RA,        0, 16, TABLE64_TEST_HI, 0x83FFFFFF, 0xFFFFFFFF },
 907         { E1000_RA2,       0, 8, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
 908         { E1000_RA2,       0, 8, TABLE64_TEST_HI, 0x83FFFFFF, 0xFFFFFFFF },
 909         { E1000_MTA,       0, 128,TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 910         { 0, 0, 0, 0 }
 911 };
 912
 913 /* 82575 register test */
 914 static struct igb_reg_test reg_test_82575[] = {
 915         { E1000_FCAL,      0x100, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 916         { E1000_FCAH,      0x100, 1, PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
 917         { E1000_FCT,       0x100, 1, PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
 918         { E1000_VET,       0x100, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 919         { E1000_RDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 920         { E1000_RDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 921         { E1000_RDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
 922         /* Enable all four RX queues before testing. */
 923         { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0, E1000_RXDCTL_QUEUE_ENABLE },
 924         /* RDH is read-only for 82575, only test RDT. */
 925         { E1000_RDT(0),    0x100, 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 926         { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0, 0 },
 927         { E1000_FCRTH,     0x100, 1, PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
 928         { E1000_FCTTV,     0x100, 1, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 929         { E1000_TIPG,      0x100, 1, PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
 930         { E1000_TDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 931         { E1000_TDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 932         { E1000_TDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
 933         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
 934         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0x04CFB3FE, 0x003FFFFB },
 935         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0x04CFB3FE, 0xFFFFFFFF },
 936         { E1000_TCTL,      0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
 937         { E1000_TXCW,      0x100, 1, PATTERN_TEST, 0xC000FFFF, 0x0000FFFF },
 938         { E1000_RA,        0, 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
 939         { E1000_RA,        0, 16, TABLE64_TEST_HI, 0x800FFFFF, 0xFFFFFFFF },
 940         { E1000_MTA,       0, 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 941         { 0, 0, 0, 0 }
 942 };
 943
 944 static bool reg_pattern_test(struct igb_adapter *adapter, u64 *data,
 945                              int reg, u32 mask, u32 write)
 946 {
 947         struct e1000_hw *hw = &adapter->hw;
 948         u32 pat, val;
 949         static const u32 _test[] =
 950                 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
 951         for (pat = 0; pat < ARRAY_SIZE(_test); pat++) {
 952                 wr32(reg, (_test[pat] & write));
 953                 val = rd32(reg);
 954                 if (val != (_test[pat] & write & mask)) {
 955                         dev_err(&adapter->pdev->dev, "pattern test reg %04X "
 956                                 "failed: got 0x%08X expected 0x%08X\n",
 957                                 reg, val, (_test[pat] & write & mask));
 958                         *data = reg;
 959                         return 1;
 960                 }
 961         }
 962
 963         return 0;
 964 }
 965
 966 static bool reg_set_and_check(struct igb_adapter *adapter, u64 *data,
 967                               int reg, u32 mask, u32 write)
 968 {
 969         struct e1000_hw *hw = &adapter->hw;
 970         u32 val;
 971         wr32(reg, write & mask);
 972         val = rd32(reg);
 973         if ((write & mask) != (val & mask)) {
 974                 dev_err(&adapter->pdev->dev, "set/check reg %04X test failed:"
 975                         " got 0x%08X expected 0x%08X\n", reg,
 976                         (val & mask), (write & mask));
 977                 *data = reg;
 978                 return 1;
 979         }
 980
 981         return 0;
 982 }
 983
 984 #define REG_PATTERN_TEST(reg, mask, write) \
 985         do { \
 986                 if (reg_pattern_test(adapter, data, reg, mask, write)) \
 987                         return 1; \
 988         } while (0)
 989
 990 #define REG_SET_AND_CHECK(reg, mask, write) \
 991         do { \
 992                 if (reg_set_and_check(adapter, data, reg, mask, write)) \
 993                         return 1; \
 994         } while (0)
 995
 996 static int igb_reg_test(struct igb_adapter *adapter, u64 *data)
 997 {
 998         struct e1000_hw *hw = &adapter->hw;
 999         struct igb_reg_test *test;
1000         u32 value, before, after;
1001         u32 i, toggle;
1002
1003         switch (adapter->hw.mac.type) {
1004         case e1000_82576:
1005                 test = reg_test_82576;
1006                 toggle = 0x7FFFF3FF;
1007                 break;
1008         default:
1009                 test = reg_test_82575;
1010                 toggle = 0x7FFFF3FF;
1011                 break;
1012         }
1013
1014         /* Because the status register is such a special case,
1015          * we handle it separately from the rest of the register
1016          * tests.  Some bits are read-only, some toggle, and some
1017          * are writable on newer MACs.
1018          */
1019         before = rd32(E1000_STATUS);
1020         value = (rd32(E1000_STATUS) & toggle);
1021         wr32(E1000_STATUS, toggle);
1022         after = rd32(E1000_STATUS) & toggle;
1023         if (value != after) {
1024                 dev_err(&adapter->pdev->dev, "failed STATUS register test "
1025                         "got: 0x%08X expected: 0x%08X\n", after, value);
1026                 *data = 1;
1027                 return 1;
1028         }
1029         /* restore previous status */
1030         wr32(E1000_STATUS, before);
1031
1032         /* Perform the remainder of the register test, looping through
1033          * the test table until we either fail or reach the null entry.
1034          */
1035         while (test->reg) {
1036                 for (i = 0; i < test->array_len; i++) {
1037                         switch (test->test_type) {
1038                         case PATTERN_TEST:
1039                                 REG_PATTERN_TEST(test->reg +
1040                                                 (i * test->reg_offset),
1041                                                 test->mask,
1042                                                 test->write);
1043                                 break;
1044                         case SET_READ_TEST:
1045                                 REG_SET_AND_CHECK(test->reg +
1046                                                 (i * test->reg_offset),
1047                                                 test->mask,
1048                                                 test->write);
1049                                 break;
1050                         case WRITE_NO_TEST:
1051                                 writel(test->write,
1052                                     (adapter->hw.hw_addr + test->reg)
1053                                         + (i * test->reg_offset));
1054                                 break;
1055                         case TABLE32_TEST:
1056                                 REG_PATTERN_TEST(test->reg + (i * 4),
1057                                                 test->mask,
1058                                                 test->write);
1059                                 break;
1060                         case TABLE64_TEST_LO:
1061                                 REG_PATTERN_TEST(test->reg + (i * 8),
1062                                                 test->mask,
1063                                                 test->write);
1064                                 break;
1065                         case TABLE64_TEST_HI:
1066                                 REG_PATTERN_TEST((test->reg + 4) + (i * 8),
1067                                                 test->mask,
1068                                                 test->write);
1069                                 break;
1070                         }
1071                 }
1072                 test++;
1073         }
1074
1075         *data = 0;
1076         return 0;
1077 }
1078
1079 static int igb_eeprom_test(struct igb_adapter *adapter, u64 *data)
1080 {
1081         u16 temp;
1082         u16 checksum = 0;
1083         u16 i;
1084
1085         *data = 0;
1086         /* Read and add up the contents of the EEPROM */
1087         for (i = 0; i < (NVM_CHECKSUM_REG + 1); i++) {
1088                 if ((adapter->hw.nvm.ops.read(&adapter->hw, i, 1, &temp)) < 0) {
1089                         *data = 1;
1090                         break;
1091                 }
1092                 checksum += temp;
1093         }
1094
1095         /* If Checksum is not Correct return error else test passed */
1096         if ((checksum != (u16) NVM_SUM) && !(*data))
1097                 *data = 2;
1098
1099         return *data;
1100 }
1101
1102 static irqreturn_t igb_test_intr(int irq, void *data)
1103 {
1104         struct igb_adapter *adapter = (struct igb_adapter *) data;
1105         struct e1000_hw *hw = &adapter->hw;
1106
1107         adapter->test_icr |= rd32(E1000_ICR);
1108
1109         return IRQ_HANDLED;
1110 }
1111
1112 static int igb_intr_test(struct igb_adapter *adapter, u64 *data)
1113 {
1114         struct e1000_hw *hw = &adapter->hw;
1115         struct net_device *netdev = adapter->netdev;
1116         u32 mask, ics_mask, i = 0, shared_int = true;
1117         u32 irq = adapter->pdev->irq;
1118
1119         *data = 0;
1120
1121         /* Hook up test interrupt handler just for this test */
1122         if (adapter->msix_entries) {
1123                 if (request_irq(adapter->msix_entries[0].vector,
1124                                 &igb_test_intr, 0, netdev->name, adapter)) {
1125                         *data = 1;
1126                         return -1;
1127                 }
1128         } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
1129                 shared_int = false;
1130                 if (request_irq(irq,
1131                                 &igb_test_intr, 0, netdev->name, adapter)) {
1132                         *data = 1;
1133                         return -1;
1134                 }
1135         } else if (!request_irq(irq, &igb_test_intr, IRQF_PROBE_SHARED,
1136                                 netdev->name, adapter)) {
1137                 shared_int = false;
1138         } else if (request_irq(irq, &igb_test_intr, IRQF_SHARED,
1139                  netdev->name, adapter)) {
1140                 *data = 1;
1141                 return -1;
1142         }
1143         dev_info(&adapter->pdev->dev, "testing %s interrupt\n",
1144                 (shared_int ? "shared" : "unshared"));
1145
1146         /* Disable all the interrupts */
1147         wr32(E1000_IMC, ~0);
1148         msleep(10);
1149
1150         /* Define all writable bits for ICS */
1151         switch (hw->mac.type) {
1152         case e1000_82575:
1153                 ics_mask = 0x37F47EDD;
1154                 break;
1155         case e1000_82576:
1156                 ics_mask = 0x77D4FBFD;
1157                 break;
1158         default:
1159                 ics_mask = 0x7FFFFFFF;
1160                 break;
1161         }
1162
1163         /* Test each interrupt */
1164         for (; i < 31; i++) {
1165                 /* Interrupt to test */
1166                 mask = 1 << i;
1167
1168                 if (!(mask & ics_mask))
1169                         continue;
1170
1171                 if (!shared_int) {
1172                         /* Disable the interrupt to be reported in
1173                          * the cause register and then force the same
1174                          * interrupt and see if one gets posted.  If
1175                          * an interrupt was posted to the bus, the
1176                          * test failed.
1177                          */
1178                         adapter->test_icr = 0;
1179
1180                         /* Flush any pending interrupts */
1181                         wr32(E1000_ICR, ~0);
1182
1183                         wr32(E1000_IMC, mask);
1184                         wr32(E1000_ICS, mask);
1185                         msleep(10);
1186
1187                         if (adapter->test_icr & mask) {
1188                                 *data = 3;
1189                                 break;
1190                         }
1191                 }
1192
1193                 /* Enable the interrupt to be reported in
1194                  * the cause register and then force the same
1195                  * interrupt and see if one gets posted.  If
1196                  * an interrupt was not posted to the bus, the
1197                  * test failed.
1198                  */
1199                 adapter->test_icr = 0;
1200
1201                 /* Flush any pending interrupts */
1202                 wr32(E1000_ICR, ~0);
1203
1204                 wr32(E1000_IMS, mask);
1205                 wr32(E1000_ICS, mask);
1206                 msleep(10);
1207
1208                 if (!(adapter->test_icr & mask)) {
1209                         *data = 4;
1210                         break;
1211                 }
1212
1213                 if (!shared_int) {
1214                         /* Disable the other interrupts to be reported in
1215                          * the cause register and then force the other
1216                          * interrupts and see if any get posted.  If
1217                          * an interrupt was posted to the bus, the
1218                          * test failed.
1219                          */
1220                         adapter->test_icr = 0;
1221
1222                         /* Flush any pending interrupts */
1223                         wr32(E1000_ICR, ~0);
1224
1225                         wr32(E1000_IMC, ~mask);
1226                         wr32(E1000_ICS, ~mask);
1227                         msleep(10);
1228
1229                         if (adapter->test_icr & mask) {
1230                                 *data = 5;
1231                                 break;
1232                         }
1233                 }
1234         }
1235
1236         /* Disable all the interrupts */
1237         wr32(E1000_IMC, ~0);
1238         msleep(10);
1239
1240         /* Unhook test interrupt handler */
1241         if (adapter->msix_entries)
1242                 free_irq(adapter->msix_entries[0].vector, adapter);
1243         else
1244                 free_irq(irq, adapter);
1245
1246         return *data;
1247 }
1248
1249 static void igb_free_desc_rings(struct igb_adapter *adapter)
1250 {
1251         igb_free_tx_resources(&adapter->test_tx_ring);
1252         igb_free_rx_resources(&adapter->test_rx_ring);
1253 }
1254
1255 static int igb_setup_desc_rings(struct igb_adapter *adapter)
1256 {
1257         struct igb_ring *tx_ring = &adapter->test_tx_ring;
1258         struct igb_ring *rx_ring = &adapter->test_rx_ring;
1259         struct e1000_hw *hw = &adapter->hw;
1260         int ret_val;
1261
1262         /* Setup Tx descriptor ring and Tx buffers */
1263         tx_ring->count = IGB_DEFAULT_TXD;
1264         tx_ring->pdev = adapter->pdev;
1265         tx_ring->netdev = adapter->netdev;
1266         tx_ring->reg_idx = adapter->vfs_allocated_count;
1267
1268         if (igb_setup_tx_resources(tx_ring)) {
1269                 ret_val = 1;
1270                 goto err_nomem;
1271         }
1272
1273         igb_setup_tctl(adapter);
1274         igb_configure_tx_ring(adapter, tx_ring);
1275
1276         /* Setup Rx descriptor ring and Rx buffers */
1277         rx_ring->count = IGB_DEFAULT_RXD;
1278         rx_ring->pdev = adapter->pdev;
1279         rx_ring->netdev = adapter->netdev;
1280         rx_ring->rx_buffer_len = IGB_RXBUFFER_2048;
1281         rx_ring->reg_idx = adapter->vfs_allocated_count;
1282
1283         if (igb_setup_rx_resources(rx_ring)) {
1284                 ret_val = 3;
1285                 goto err_nomem;
1286         }
1287
1288         /* set the default queue to queue 0 of PF */
1289         wr32(E1000_MRQC, adapter->vfs_allocated_count << 3);
1290
1291         /* enable receive ring */
1292         igb_setup_rctl(adapter);
1293         igb_configure_rx_ring(adapter, rx_ring);
1294
1295         igb_alloc_rx_buffers_adv(rx_ring, igb_desc_unused(rx_ring));
1296
1297         return 0;
1298
1299 err_nomem:
1300         igb_free_desc_rings(adapter);
1301         return ret_val;
1302 }
1303
1304 static void igb_phy_disable_receiver(struct igb_adapter *adapter)
1305 {
1306         struct e1000_hw *hw = &adapter->hw;
1307
1308         /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1309         igb_write_phy_reg(hw, 29, 0x001F);
1310         igb_write_phy_reg(hw, 30, 0x8FFC);
1311         igb_write_phy_reg(hw, 29, 0x001A);
1312         igb_write_phy_reg(hw, 30, 0x8FF0);
1313 }
1314
1315 static int igb_integrated_phy_loopback(struct igb_adapter *adapter)
1316 {
1317         struct e1000_hw *hw = &adapter->hw;
1318         u32 ctrl_reg = 0;
1319
1320         hw->mac.autoneg = false;
1321
1322         if (hw->phy.type == e1000_phy_m88) {
1323                 /* Auto-MDI/MDIX Off */
1324                 igb_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, 0x0808);
1325                 /* reset to update Auto-MDI/MDIX */
1326                 igb_write_phy_reg(hw, PHY_CONTROL, 0x9140);
1327                 /* autoneg off */
1328                 igb_write_phy_reg(hw, PHY_CONTROL, 0x8140);
1329         }
1330
1331         ctrl_reg = rd32(E1000_CTRL);
1332
1333         /* force 1000, set loopback */
1334         igb_write_phy_reg(hw, PHY_CONTROL, 0x4140);
1335
1336         /* Now set up the MAC to the same speed/duplex as the PHY. */
1337         ctrl_reg = rd32(E1000_CTRL);
1338         ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1339         ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1340                      E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1341                      E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1342                      E1000_CTRL_FD |     /* Force Duplex to FULL */
1343                      E1000_CTRL_SLU);    /* Set link up enable bit */
1344
1345         if (hw->phy.type == e1000_phy_m88)
1346                 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
1347
1348         wr32(E1000_CTRL, ctrl_reg);
1349
1350         /* Disable the receiver on the PHY so when a cable is plugged in, the
1351          * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1352          */
1353         if (hw->phy.type == e1000_phy_m88)
1354                 igb_phy_disable_receiver(adapter);
1355
1356         udelay(500);
1357
1358         return 0;
1359 }
1360
1361 static int igb_set_phy_loopback(struct igb_adapter *adapter)
1362 {
1363         return igb_integrated_phy_loopback(adapter);
1364 }
1365
1366 static int igb_setup_loopback_test(struct igb_adapter *adapter)
1367 {
1368         struct e1000_hw *hw = &adapter->hw;
1369         u32 reg;
1370
1371         reg = rd32(E1000_CTRL_EXT);
1372
1373         /* use CTRL_EXT to identify link type as SGMII can appear as copper */
1374         if (reg & E1000_CTRL_EXT_LINK_MODE_MASK) {
1375                 reg = rd32(E1000_RCTL);
1376                 reg |= E1000_RCTL_LBM_TCVR;
1377                 wr32(E1000_RCTL, reg);
1378
1379                 wr32(E1000_SCTL, E1000_ENABLE_SERDES_LOOPBACK);
1380
1381                 reg = rd32(E1000_CTRL);
1382                 reg &= ~(E1000_CTRL_RFCE |
1383                          E1000_CTRL_TFCE |
1384                          E1000_CTRL_LRST);
1385                 reg |= E1000_CTRL_SLU |
1386                        E1000_CTRL_FD;
1387                 wr32(E1000_CTRL, reg);
1388
1389                 /* Unset switch control to serdes energy detect */
1390                 reg = rd32(E1000_CONNSW);
1391                 reg &= ~E1000_CONNSW_ENRGSRC;
1392                 wr32(E1000_CONNSW, reg);
1393
1394                 /* Set PCS register for forced speed */
1395                 reg = rd32(E1000_PCS_LCTL);
1396                 reg &= ~E1000_PCS_LCTL_AN_ENABLE;     /* Disable Autoneg*/
1397                 reg |= E1000_PCS_LCTL_FLV_LINK_UP |   /* Force link up */
1398                        E1000_PCS_LCTL_FSV_1000 |      /* Force 1000    */
1399                        E1000_PCS_LCTL_FDV_FULL |      /* SerDes Full duplex */
1400                        E1000_PCS_LCTL_FSD |           /* Force Speed */
1401                        E1000_PCS_LCTL_FORCE_LINK;     /* Force Link */
1402                 wr32(E1000_PCS_LCTL, reg);
1403
1404                 return 0;
1405         }
1406
1407         return igb_set_phy_loopback(adapter);
1408 }
1409
1410 static void igb_loopback_cleanup(struct igb_adapter *adapter)
1411 {
1412         struct e1000_hw *hw = &adapter->hw;
1413         u32 rctl;
1414         u16 phy_reg;
1415
1416         rctl = rd32(E1000_RCTL);
1417         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1418         wr32(E1000_RCTL, rctl);
1419
1420         hw->mac.autoneg = true;
1421         igb_read_phy_reg(hw, PHY_CONTROL, &phy_reg);
1422         if (phy_reg & MII_CR_LOOPBACK) {
1423                 phy_reg &= ~MII_CR_LOOPBACK;
1424                 igb_write_phy_reg(hw, PHY_CONTROL, phy_reg);
1425                 igb_phy_sw_reset(hw);
1426         }
1427 }
1428
1429 static void igb_create_lbtest_frame(struct sk_buff *skb,
1430                                     unsigned int frame_size)
1431 {
1432         memset(skb->data, 0xFF, frame_size);
1433         frame_size /= 2;
1434         memset(&skb->data[frame_size], 0xAA, frame_size - 1);
1435         memset(&skb->data[frame_size + 10], 0xBE, 1);
1436         memset(&skb->data[frame_size + 12], 0xAF, 1);
1437 }
1438
1439 static int igb_check_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1440 {
1441         frame_size /= 2;
1442         if (*(skb->data + 3) == 0xFF) {
1443                 if ((*(skb->data + frame_size + 10) == 0xBE) &&
1444                    (*(skb->data + frame_size + 12) == 0xAF)) {
1445                         return 0;
1446                 }
1447         }
1448         return 13;
1449 }
1450
1451 static int igb_clean_test_rings(struct igb_ring *rx_ring,
1452                                 struct igb_ring *tx_ring,
1453                                 unsigned int size)
1454 {
1455         union e1000_adv_rx_desc *rx_desc;
1456         struct igb_buffer *buffer_info;
1457         int rx_ntc, tx_ntc, count = 0;
1458         u32 staterr;
1459
1460         /* initialize next to clean and descriptor values */
1461         rx_ntc = rx_ring->next_to_clean;
1462         tx_ntc = tx_ring->next_to_clean;
1463         rx_desc = E1000_RX_DESC_ADV(*rx_ring, rx_ntc);
1464         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1465
1466         while (staterr & E1000_RXD_STAT_DD) {
1467                 /* check rx buffer */
1468                 buffer_info = &rx_ring->buffer_info[rx_ntc];
1469
1470                 /* unmap rx buffer, will be remapped by alloc_rx_buffers */
1471                 pci_unmap_single(rx_ring->pdev,
1472                                  buffer_info->dma,
1473                                  rx_ring->rx_buffer_len,
1474                                  PCI_DMA_FROMDEVICE);
1475                 buffer_info->dma = 0;
1476
1477                 /* verify contents of skb */
1478                 if (!igb_check_lbtest_frame(buffer_info->skb, size))
1479                         count++;
1480
1481                 /* unmap buffer on tx side */
1482                 buffer_info = &tx_ring->buffer_info[tx_ntc];
1483                 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
1484
1485                 /* increment rx/tx next to clean counters */
1486                 rx_ntc++;
1487                 if (rx_ntc == rx_ring->count)
1488                         rx_ntc = 0;
1489                 tx_ntc++;
1490                 if (tx_ntc == tx_ring->count)
1491                         tx_ntc = 0;
1492
1493                 /* fetch next descriptor */
1494                 rx_desc = E1000_RX_DESC_ADV(*rx_ring, rx_ntc);
1495                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1496         }
1497
1498         /* re-map buffers to ring, store next to clean values */
1499         igb_alloc_rx_buffers_adv(rx_ring, count);
1500         rx_ring->next_to_clean = rx_ntc;
1501         tx_ring->next_to_clean = tx_ntc;
1502
1503         return count;
1504 }
1505
1506 static int igb_run_loopback_test(struct igb_adapter *adapter)
1507 {
1508         struct igb_ring *tx_ring = &adapter->test_tx_ring;
1509         struct igb_ring *rx_ring = &adapter->test_rx_ring;
1510         int i, j, lc, good_cnt, ret_val = 0;
1511         unsigned int size = 1024;
1512         netdev_tx_t tx_ret_val;
1513         struct sk_buff *skb;
1514
1515         /* allocate test skb */
1516         skb = alloc_skb(size, GFP_KERNEL);
1517         if (!skb)
1518                 return 11;
1519
1520         /* place data into test skb */
1521         igb_create_lbtest_frame(skb, size);
1522         skb_put(skb, size);
1523
1524         /*
1525          * Calculate the loop count based on the largest descriptor ring
1526          * The idea is to wrap the largest ring a number of times using 64
1527          * send/receive pairs during each loop
1528          */
1529
1530         if (rx_ring->count <= tx_ring->count)
1531                 lc = ((tx_ring->count / 64) * 2) + 1;
1532         else
1533                 lc = ((rx_ring->count / 64) * 2) + 1;
1534
1535         for (j = 0; j <= lc; j++) { /* loop count loop */
1536                 /* reset count of good packets */
1537                 good_cnt = 0;
1538
1539                 /* place 64 packets on the transmit queue*/
1540                 for (i = 0; i < 64; i++) {
1541                         skb_get(skb);
1542                         tx_ret_val = igb_xmit_frame_ring_adv(skb, tx_ring);
1543                         if (tx_ret_val == NETDEV_TX_OK)
1544                                 good_cnt++;
1545                 }
1546
1547                 if (good_cnt != 64) {
1548                         ret_val = 12;
1549                         break;
1550                 }
1551
1552                 /* allow 200 milliseconds for packets to go from tx to rx */
1553                 msleep(200);
1554
1555                 good_cnt = igb_clean_test_rings(rx_ring, tx_ring, size);
1556                 if (good_cnt != 64) {
1557                         ret_val = 13;
1558                         break;
1559                 }
1560         } /* end loop count loop */
1561
1562         /* free the original skb */
1563         kfree_skb(skb);
1564
1565         return ret_val;
1566 }
1567
1568 static int igb_loopback_test(struct igb_adapter *adapter, u64 *data)
1569 {
1570         /* PHY loopback cannot be performed if SoL/IDER
1571          * sessions are active */
1572         if (igb_check_reset_block(&adapter->hw)) {
1573                 dev_err(&adapter->pdev->dev,
1574                         "Cannot do PHY loopback test "
1575                         "when SoL/IDER is active.\n");
1576                 *data = 0;
1577                 goto out;
1578         }
1579         *data = igb_setup_desc_rings(adapter);
1580         if (*data)
1581                 goto out;
1582         *data = igb_setup_loopback_test(adapter);
1583         if (*data)
1584                 goto err_loopback;
1585         *data = igb_run_loopback_test(adapter);
1586         igb_loopback_cleanup(adapter);
1587
1588 err_loopback:
1589         igb_free_desc_rings(adapter);
1590 out:
1591         return *data;
1592 }
1593
1594 static int igb_link_test(struct igb_adapter *adapter, u64 *data)
1595 {
1596         struct e1000_hw *hw = &adapter->hw;
1597         *data = 0;
1598         if (hw->phy.media_type == e1000_media_type_internal_serdes) {
1599                 int i = 0;
1600                 hw->mac.serdes_has_link = false;
1601
1602                 /* On some blade server designs, link establishment
1603                  * could take as long as 2-3 minutes */
1604                 do {
1605                         hw->mac.ops.check_for_link(&adapter->hw);
1606                         if (hw->mac.serdes_has_link)
1607                                 return *data;
1608                         msleep(20);
1609                 } while (i++ < 3750);
1610
1611                 *data = 1;
1612         } else {
1613                 hw->mac.ops.check_for_link(&adapter->hw);
1614                 if (hw->mac.autoneg)
1615                         msleep(4000);
1616
1617                 if (!(rd32(E1000_STATUS) & E1000_STATUS_LU))
1618                         *data = 1;
1619         }
1620         return *data;
1621 }
1622
1623 static void igb_diag_test(struct net_device *netdev,
1624                           struct ethtool_test *eth_test, u64 *data)
1625 {
1626         struct igb_adapter *adapter = netdev_priv(netdev);
1627         u16 autoneg_advertised;
1628         u8 forced_speed_duplex, autoneg;
1629         bool if_running = netif_running(netdev);
1630
1631         set_bit(__IGB_TESTING, &adapter->state);
1632         if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1633                 /* Offline tests */
1634
1635                 /* save speed, duplex, autoneg settings */
1636                 autoneg_advertised = adapter->hw.phy.autoneg_advertised;
1637                 forced_speed_duplex = adapter->hw.mac.forced_speed_duplex;
1638                 autoneg = adapter->hw.mac.autoneg;
1639
1640                 dev_info(&adapter->pdev->dev, "offline testing starting\n");
1641
1642                 /* Link test performed before hardware reset so autoneg doesn't
1643                  * interfere with test result */
1644                 if (igb_link_test(adapter, &data[4]))
1645                         eth_test->flags |= ETH_TEST_FL_FAILED;
1646
1647                 if (if_running)
1648                         /* indicate we're in test mode */
1649                         dev_close(netdev);
1650                 else
1651                         igb_reset(adapter);
1652
1653                 if (igb_reg_test(adapter, &data[0]))
1654                         eth_test->flags |= ETH_TEST_FL_FAILED;
1655
1656                 igb_reset(adapter);
1657                 if (igb_eeprom_test(adapter, &data[1]))
1658                         eth_test->flags |= ETH_TEST_FL_FAILED;
1659
1660                 igb_reset(adapter);
1661                 if (igb_intr_test(adapter, &data[2]))
1662                         eth_test->flags |= ETH_TEST_FL_FAILED;
1663
1664                 igb_reset(adapter);
1665                 if (igb_loopback_test(adapter, &data[3]))
1666                         eth_test->flags |= ETH_TEST_FL_FAILED;
1667
1668                 /* restore speed, duplex, autoneg settings */
1669                 adapter->hw.phy.autoneg_advertised = autoneg_advertised;
1670                 adapter->hw.mac.forced_speed_duplex = forced_speed_duplex;
1671                 adapter->hw.mac.autoneg = autoneg;
1672
1673                 /* force this routine to wait until autoneg complete/timeout */
1674                 adapter->hw.phy.autoneg_wait_to_complete = true;
1675                 igb_reset(adapter);
1676                 adapter->hw.phy.autoneg_wait_to_complete = false;
1677
1678                 clear_bit(__IGB_TESTING, &adapter->state);
1679                 if (if_running)
1680                         dev_open(netdev);
1681         } else {
1682                 dev_info(&adapter->pdev->dev, "online testing starting\n");
1683                 /* Online tests */
1684                 if (igb_link_test(adapter, &data[4]))
1685                         eth_test->flags |= ETH_TEST_FL_FAILED;
1686
1687                 /* Online tests aren't run; pass by default */
1688                 data[0] = 0;
1689                 data[1] = 0;
1690                 data[2] = 0;
1691                 data[3] = 0;
1692
1693                 clear_bit(__IGB_TESTING, &adapter->state);
1694         }
1695         msleep_interruptible(4 * 1000);
1696 }
1697
1698 static int igb_wol_exclusion(struct igb_adapter *adapter,
1699                              struct ethtool_wolinfo *wol)
1700 {
1701         struct e1000_hw *hw = &adapter->hw;
1702         int retval = 1; /* fail by default */
1703
1704         switch (hw->device_id) {
1705         case E1000_DEV_ID_82575GB_QUAD_COPPER:
1706                 /* WoL not supported */
1707                 wol->supported = 0;
1708                 break;
1709         case E1000_DEV_ID_82575EB_FIBER_SERDES:
1710         case E1000_DEV_ID_82576_FIBER:
1711         case E1000_DEV_ID_82576_SERDES:
1712                 /* Wake events not supported on port B */
1713                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1) {
1714                         wol->supported = 0;
1715                         break;
1716                 }
1717                 /* return success for non excluded adapter ports */
1718                 retval = 0;
1719                 break;
1720         case E1000_DEV_ID_82576_QUAD_COPPER:
1721                 /* quad port adapters only support WoL on port A */
1722                 if (!(adapter->flags & IGB_FLAG_QUAD_PORT_A)) {
1723                         wol->supported = 0;
1724                         break;
1725                 }
1726                 /* return success for non excluded adapter ports */
1727                 retval = 0;
1728                 break;
1729         default:
1730                 /* dual port cards only support WoL on port A from now on
1731                  * unless it was enabled in the eeprom for port B
1732                  * so exclude FUNC_1 ports from having WoL enabled */
1733                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1 &&
1734                     !adapter->eeprom_wol) {
1735                         wol->supported = 0;
1736                         break;
1737                 }
1738
1739                 retval = 0;
1740         }
1741
1742         return retval;
1743 }
1744
1745 static void igb_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1746 {
1747         struct igb_adapter *adapter = netdev_priv(netdev);
1748
1749         wol->supported = WAKE_UCAST | WAKE_MCAST |
1750                          WAKE_BCAST | WAKE_MAGIC;
1751         wol->wolopts = 0;
1752
1753         /* this function will set ->supported = 0 and return 1 if wol is not
1754          * supported by this hardware */
1755         if (igb_wol_exclusion(adapter, wol) ||
1756             !device_can_wakeup(&adapter->pdev->dev))
1757                 return;
1758
1759         /* apply any specific unsupported masks here */
1760         switch (adapter->hw.device_id) {
1761         default:
1762                 break;
1763         }
1764
1765         if (adapter->wol & E1000_WUFC_EX)
1766                 wol->wolopts |= WAKE_UCAST;
1767         if (adapter->wol & E1000_WUFC_MC)
1768                 wol->wolopts |= WAKE_MCAST;
1769         if (adapter->wol & E1000_WUFC_BC)
1770                 wol->wolopts |= WAKE_BCAST;
1771         if (adapter->wol & E1000_WUFC_MAG)
1772                 wol->wolopts |= WAKE_MAGIC;
1773
1774         return;
1775 }
1776
1777 static int igb_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1778 {
1779         struct igb_adapter *adapter = netdev_priv(netdev);
1780
1781         if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1782                 return -EOPNOTSUPP;
1783
1784         if (igb_wol_exclusion(adapter, wol) ||
1785             !device_can_wakeup(&adapter->pdev->dev))
1786                 return wol->wolopts ? -EOPNOTSUPP : 0;
1787
1788         /* these settings will always override what we currently have */
1789         adapter->wol = 0;
1790
1791         if (wol->wolopts & WAKE_UCAST)
1792                 adapter->wol |= E1000_WUFC_EX;
1793         if (wol->wolopts & WAKE_MCAST)
1794                 adapter->wol |= E1000_WUFC_MC;
1795         if (wol->wolopts & WAKE_BCAST)
1796                 adapter->wol |= E1000_WUFC_BC;
1797         if (wol->wolopts & WAKE_MAGIC)
1798                 adapter->wol |= E1000_WUFC_MAG;
1799         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1800
1801         return 0;
1802 }
1803
1804 /* bit defines for adapter->led_status */
1805 #define IGB_LED_ON              0
1806
1807 static int igb_phys_id(struct net_device *netdev, u32 data)
1808 {
1809         struct igb_adapter *adapter = netdev_priv(netdev);
1810         struct e1000_hw *hw = &adapter->hw;
1811         unsigned long timeout;
1812
1813         timeout = data * 1000;
1814
1815         /*
1816          *  msleep_interruptable only accepts unsigned int so we are limited
1817          * in how long a duration we can wait
1818          */
1819         if (!timeout || timeout > UINT_MAX)
1820                 timeout = UINT_MAX;
1821
1822         igb_blink_led(hw);
1823         msleep_interruptible(timeout);
1824
1825         igb_led_off(hw);
1826         clear_bit(IGB_LED_ON, &adapter->led_status);
1827         igb_cleanup_led(hw);
1828
1829         return 0;
1830 }
1831
1832 static int igb_set_coalesce(struct net_device *netdev,
1833                             struct ethtool_coalesce *ec)
1834 {
1835         struct igb_adapter *adapter = netdev_priv(netdev);
1836         int i;
1837
1838         if ((ec->rx_coalesce_usecs > IGB_MAX_ITR_USECS) ||
1839             ((ec->rx_coalesce_usecs > 3) &&
1840              (ec->rx_coalesce_usecs < IGB_MIN_ITR_USECS)) ||
1841             (ec->rx_coalesce_usecs == 2))
1842                 return -EINVAL;
1843
1844         if ((ec->tx_coalesce_usecs > IGB_MAX_ITR_USECS) ||
1845             ((ec->tx_coalesce_usecs > 3) &&
1846              (ec->tx_coalesce_usecs < IGB_MIN_ITR_USECS)) ||
1847             (ec->tx_coalesce_usecs == 2))
1848                 return -EINVAL;
1849
1850         if ((adapter->flags & IGB_FLAG_QUEUE_PAIRS) && ec->tx_coalesce_usecs)
1851                 return -EINVAL;
1852
1853         /* convert to rate of irq's per second */
1854         if (ec->rx_coalesce_usecs && ec->rx_coalesce_usecs <= 3)
1855                 adapter->rx_itr_setting = ec->rx_coalesce_usecs;
1856         else
1857                 adapter->rx_itr_setting = ec->rx_coalesce_usecs << 2;
1858
1859         /* convert to rate of irq's per second */
1860         if (adapter->flags & IGB_FLAG_QUEUE_PAIRS)
1861                 adapter->tx_itr_setting = adapter->rx_itr_setting;
1862         else if (ec->tx_coalesce_usecs && ec->tx_coalesce_usecs <= 3)
1863                 adapter->tx_itr_setting = ec->tx_coalesce_usecs;
1864         else
1865                 adapter->tx_itr_setting = ec->tx_coalesce_usecs << 2;
1866
1867         for (i = 0; i < adapter->num_q_vectors; i++) {
1868                 struct igb_q_vector *q_vector = adapter->q_vector[i];
1869                 if (q_vector->rx_ring)
1870                         q_vector->itr_val = adapter->rx_itr_setting;
1871                 else
1872                         q_vector->itr_val = adapter->tx_itr_setting;
1873                 if (q_vector->itr_val && q_vector->itr_val <= 3)
1874                         q_vector->itr_val = IGB_START_ITR;
1875                 q_vector->set_itr = 1;
1876         }
1877
1878         return 0;
1879 }
1880
1881 static int igb_get_coalesce(struct net_device *netdev,
1882                             struct ethtool_coalesce *ec)
1883 {
1884         struct igb_adapter *adapter = netdev_priv(netdev);
1885
1886         if (adapter->rx_itr_setting <= 3)
1887                 ec->rx_coalesce_usecs = adapter->rx_itr_setting;
1888         else
1889                 ec->rx_coalesce_usecs = adapter->rx_itr_setting >> 2;
1890
1891         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS)) {
1892                 if (adapter->tx_itr_setting <= 3)
1893                         ec->tx_coalesce_usecs = adapter->tx_itr_setting;
1894                 else
1895                         ec->tx_coalesce_usecs = adapter->tx_itr_setting >> 2;
1896         }
1897
1898         return 0;
1899 }
1900
1901 static int igb_nway_reset(struct net_device *netdev)
1902 {
1903         struct igb_adapter *adapter = netdev_priv(netdev);
1904         if (netif_running(netdev))
1905                 igb_reinit_locked(adapter);
1906         return 0;
1907 }
1908
1909 static int igb_get_sset_count(struct net_device *netdev, int sset)
1910 {
1911         switch (sset) {
1912         case ETH_SS_STATS:
1913                 return IGB_STATS_LEN;
1914         case ETH_SS_TEST:
1915                 return IGB_TEST_LEN;
1916         default:
1917                 return -ENOTSUPP;
1918         }
1919 }
1920
1921 static void igb_get_ethtool_stats(struct net_device *netdev,
1922                                   struct ethtool_stats *stats, u64 *data)
1923 {
1924         struct igb_adapter *adapter = netdev_priv(netdev);
1925         u64 *queue_stat;
1926         int stat_count_tx = sizeof(struct igb_tx_queue_stats) / sizeof(u64);
1927         int stat_count_rx = sizeof(struct igb_rx_queue_stats) / sizeof(u64);
1928         int j;
1929         int i;
1930         char *p = NULL;
1931
1932         igb_update_stats(adapter);
1933
1934         for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) {
1935                 switch (igb_gstrings_stats[i].type) {
1936                 case NETDEV_STATS:
1937                         p = (char *) netdev +
1938                                         igb_gstrings_stats[i].stat_offset;
1939                         break;
1940                 case IGB_STATS:
1941                         p = (char *) adapter +
1942                                         igb_gstrings_stats[i].stat_offset;
1943                         break;
1944                 }
1945
1946                 data[i] = (igb_gstrings_stats[i].sizeof_stat ==
1947                         sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1948         }
1949         for (j = 0; j < adapter->num_tx_queues; j++) {
1950                 int k;
1951                 queue_stat = (u64 *)&adapter->tx_ring[j].tx_stats;
1952                 for (k = 0; k < stat_count_tx; k++)
1953                         data[i + k] = queue_stat[k];
1954                 i += k;
1955         }
1956         for (j = 0; j < adapter->num_rx_queues; j++) {
1957                 int k;
1958                 queue_stat = (u64 *)&adapter->rx_ring[j].rx_stats;
1959                 for (k = 0; k < stat_count_rx; k++)
1960                         data[i + k] = queue_stat[k];
1961                 i += k;
1962         }
1963 }
1964
1965 static void igb_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
1966 {
1967         struct igb_adapter *adapter = netdev_priv(netdev);
1968         u8 *p = data;
1969         int i;
1970
1971         switch (stringset) {
1972         case ETH_SS_TEST:
1973                 memcpy(data, *igb_gstrings_test,
1974                         IGB_TEST_LEN*ETH_GSTRING_LEN);
1975                 break;
1976         case ETH_SS_STATS:
1977                 for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) {
1978                         memcpy(p, igb_gstrings_stats[i].stat_string,
1979                                ETH_GSTRING_LEN);
1980                         p += ETH_GSTRING_LEN;
1981                 }
1982                 for (i = 0; i < adapter->num_tx_queues; i++) {
1983                         sprintf(p, "tx_queue_%u_packets", i);
1984                         p += ETH_GSTRING_LEN;
1985                         sprintf(p, "tx_queue_%u_bytes", i);
1986                         p += ETH_GSTRING_LEN;
1987                         sprintf(p, "tx_queue_%u_restart", i);
1988                         p += ETH_GSTRING_LEN;
1989                 }
1990                 for (i = 0; i < adapter->num_rx_queues; i++) {
1991                         sprintf(p, "rx_queue_%u_packets", i);
1992                         p += ETH_GSTRING_LEN;
1993                         sprintf(p, "rx_queue_%u_bytes", i);
1994                         p += ETH_GSTRING_LEN;
1995                         sprintf(p, "rx_queue_%u_drops", i);
1996                         p += ETH_GSTRING_LEN;
1997                         sprintf(p, "rx_queue_%u_csum_err", i);
1998                         p += ETH_GSTRING_LEN;
1999                         sprintf(p, "rx_queue_%u_alloc_failed", i);
2000                         p += ETH_GSTRING_LEN;
2001                 }
2002 /*              BUG_ON(p - data != IGB_STATS_LEN * ETH_GSTRING_LEN); */
2003                 break;
2004         }
2005 }
2006
2007 static const struct ethtool_ops igb_ethtool_ops = {
2008         .get_settings           = igb_get_settings,
2009         .set_settings           = igb_set_settings,
2010         .get_drvinfo            = igb_get_drvinfo,
2011         .get_regs_len           = igb_get_regs_len,
2012         .get_regs               = igb_get_regs,
2013         .get_wol                = igb_get_wol,
2014         .set_wol                = igb_set_wol,
2015         .get_msglevel           = igb_get_msglevel,
2016         .set_msglevel           = igb_set_msglevel,
2017         .nway_reset             = igb_nway_reset,
2018         .get_link               = ethtool_op_get_link,
2019         .get_eeprom_len         = igb_get_eeprom_len,
2020         .get_eeprom             = igb_get_eeprom,
2021         .set_eeprom             = igb_set_eeprom,
2022         .get_ringparam          = igb_get_ringparam,
2023         .set_ringparam          = igb_set_ringparam,
2024         .get_pauseparam         = igb_get_pauseparam,
2025         .set_pauseparam         = igb_set_pauseparam,
2026         .get_rx_csum            = igb_get_rx_csum,
2027         .set_rx_csum            = igb_set_rx_csum,
2028         .get_tx_csum            = igb_get_tx_csum,
2029         .set_tx_csum            = igb_set_tx_csum,
2030         .get_sg                 = ethtool_op_get_sg,
2031         .set_sg                 = ethtool_op_set_sg,
2032         .get_tso                = ethtool_op_get_tso,
2033         .set_tso                = igb_set_tso,
2034         .self_test              = igb_diag_test,
2035         .get_strings            = igb_get_strings,
2036         .phys_id                = igb_phys_id,
2037         .get_sset_count         = igb_get_sset_count,
2038         .get_ethtool_stats      = igb_get_ethtool_stats,
2039         .get_coalesce           = igb_get_coalesce,
2040         .set_coalesce           = igb_set_coalesce,
2041 };
2042
2043 void igb_set_ethtool_ops(struct net_device *netdev)
2044 {
2045         SET_ETHTOOL_OPS(netdev, &igb_ethtool_ops);
2046 }