2 * Davicom DM9000 Fast Ethernet driver for Linux.
3 * Copyright (C) 1997 Sten Wang
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * (C) Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.
17 * Additional updates, Copyright:
18 * Ben Dooks <ben@simtec.co.uk>
19 * Sascha Hauer <s.hauer@pengutronix.de>
22 #include <linux/module.h>
23 #include <linux/ioport.h>
24 #include <linux/netdevice.h>
25 #include <linux/etherdevice.h>
26 #include <linux/init.h>
27 #include <linux/skbuff.h>
28 #include <linux/spinlock.h>
29 #include <linux/crc32.h>
30 #include <linux/mii.h>
31 #include <linux/ethtool.h>
32 #include <linux/dm9000.h>
33 #include <linux/delay.h>
34 #include <linux/platform_device.h>
35 #include <linux/irq.h>
37 #include <asm/delay.h>
43 /* Board/System/Debug information/definition ---------------- */
45 #define DM9000_PHY 0x40 /* PHY address 0x01 */
47 #define CARDNAME "dm9000"
48 #define DRV_VERSION "1.31"
50 #ifdef CONFIG_BLACKFIN
57 #define DEFAULT_TRIGGER IRQF_TRIGGER_HIGH
59 #define DEFAULT_TRIGGER (0)
63 * Transmit timeout, default 5 seconds.
65 static int watchdog = 5000;
66 module_param(watchdog, int, 0400);
67 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
69 /* DM9000 register address locking.
71 * The DM9000 uses an address register to control where data written
72 * to the data register goes. This means that the address register
73 * must be preserved over interrupts or similar calls.
75 * During interrupt and other critical calls, a spinlock is used to
76 * protect the system, but the calls themselves save the address
77 * in the address register in case they are interrupting another
78 * access to the device.
80 * For general accesses a lock is provided so that calls which are
81 * allowed to sleep are serialised so that the address register does
82 * not need to be saved. This lock also serves to serialise access
83 * to the EEPROM and PHY access registers which are shared between
87 /* The driver supports the original DM9000E, and now the two newer
88 * devices, DM9000A and DM9000B.
92 TYPE_DM9000E, /* original DM9000 */
97 /* Structure/enum declaration ------------------------------- */
98 typedef struct board_info {
100 void __iomem *io_addr; /* Register I/O base address */
101 void __iomem *io_data; /* Data I/O address */
106 u16 queue_start_addr;
108 u8 io_mode; /* 0:word, 2:byte */
113 unsigned int in_suspend :1;
116 enum dm9000_type type;
118 void (*inblk)(void __iomem *port, void *data, int length);
119 void (*outblk)(void __iomem *port, void *data, int length);
120 void (*dumpblk)(void __iomem *port, int length);
122 struct device *dev; /* parent device */
124 struct resource *addr_res; /* resources found */
125 struct resource *data_res;
126 struct resource *addr_req; /* resources requested */
127 struct resource *data_req;
128 struct resource *irq_res;
130 struct mutex addr_lock; /* phy and eeprom access lock */
132 struct delayed_work phy_poll;
133 struct net_device *ndev;
137 struct mii_if_info mii;
143 #define dm9000_dbg(db, lev, msg...) do { \
144 if ((lev) < CONFIG_DM9000_DEBUGLEVEL && \
145 (lev) < db->debug_level) { \
146 dev_dbg(db->dev, msg); \
150 static inline board_info_t *to_dm9000_board(struct net_device *dev)
155 /* DM9000 network board routine ---------------------------- */
158 dm9000_reset(board_info_t * db)
160 dev_dbg(db->dev, "resetting device\n");
163 writeb(DM9000_NCR, db->io_addr);
165 writeb(NCR_RST, db->io_data);
170 * Read a byte from I/O port
173 ior(board_info_t * db, int reg)
175 writeb(reg, db->io_addr);
176 return readb(db->io_data);
180 * Write a byte to I/O port
184 iow(board_info_t * db, int reg, int value)
186 writeb(reg, db->io_addr);
187 writeb(value, db->io_data);
190 /* routines for sending block to chip */
192 static void dm9000_outblk_8bit(void __iomem *reg, void *data, int count)
194 writesb(reg, data, count);
197 static void dm9000_outblk_16bit(void __iomem *reg, void *data, int count)
199 writesw(reg, data, (count+1) >> 1);
202 static void dm9000_outblk_32bit(void __iomem *reg, void *data, int count)
204 writesl(reg, data, (count+3) >> 2);
207 /* input block from chip to memory */
209 static void dm9000_inblk_8bit(void __iomem *reg, void *data, int count)
211 readsb(reg, data, count);
215 static void dm9000_inblk_16bit(void __iomem *reg, void *data, int count)
217 readsw(reg, data, (count+1) >> 1);
220 static void dm9000_inblk_32bit(void __iomem *reg, void *data, int count)
222 readsl(reg, data, (count+3) >> 2);
225 /* dump block from chip to null */
227 static void dm9000_dumpblk_8bit(void __iomem *reg, int count)
232 for (i = 0; i < count; i++)
236 static void dm9000_dumpblk_16bit(void __iomem *reg, int count)
241 count = (count + 1) >> 1;
243 for (i = 0; i < count; i++)
247 static void dm9000_dumpblk_32bit(void __iomem *reg, int count)
252 count = (count + 3) >> 2;
254 for (i = 0; i < count; i++)
260 * select the specified set of io routines to use with the
264 static void dm9000_set_io(struct board_info *db, int byte_width)
266 /* use the size of the data resource to work out what IO
267 * routines we want to use
270 switch (byte_width) {
272 db->dumpblk = dm9000_dumpblk_8bit;
273 db->outblk = dm9000_outblk_8bit;
274 db->inblk = dm9000_inblk_8bit;
279 dev_dbg(db->dev, ": 3 byte IO, falling back to 16bit\n");
281 db->dumpblk = dm9000_dumpblk_16bit;
282 db->outblk = dm9000_outblk_16bit;
283 db->inblk = dm9000_inblk_16bit;
288 db->dumpblk = dm9000_dumpblk_32bit;
289 db->outblk = dm9000_outblk_32bit;
290 db->inblk = dm9000_inblk_32bit;
295 static void dm9000_schedule_poll(board_info_t *db)
297 if (db->type == TYPE_DM9000E)
298 schedule_delayed_work(&db->phy_poll, HZ * 2);
301 static int dm9000_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
303 board_info_t *dm = to_dm9000_board(dev);
305 if (!netif_running(dev))
308 return generic_mii_ioctl(&dm->mii, if_mii(req), cmd, NULL);
312 dm9000_read_locked(board_info_t *db, int reg)
317 spin_lock_irqsave(&db->lock, flags);
319 spin_unlock_irqrestore(&db->lock, flags);
324 static int dm9000_wait_eeprom(board_info_t *db)
327 int timeout = 8; /* wait max 8msec */
329 /* The DM9000 data sheets say we should be able to
330 * poll the ERRE bit in EPCR to wait for the EEPROM
331 * operation. From testing several chips, this bit
332 * does not seem to work.
334 * We attempt to use the bit, but fall back to the
335 * timeout (which is why we do not return an error
336 * on expiry) to say that the EEPROM operation has
341 status = dm9000_read_locked(db, DM9000_EPCR);
343 if ((status & EPCR_ERRE) == 0)
347 dev_dbg(db->dev, "timeout waiting EEPROM\n");
356 * Read a word data from EEPROM
359 dm9000_read_eeprom(board_info_t *db, int offset, u8 *to)
363 if (db->flags & DM9000_PLATF_NO_EEPROM) {
369 mutex_lock(&db->addr_lock);
371 spin_lock_irqsave(&db->lock, flags);
373 iow(db, DM9000_EPAR, offset);
374 iow(db, DM9000_EPCR, EPCR_ERPRR);
376 spin_unlock_irqrestore(&db->lock, flags);
378 dm9000_wait_eeprom(db);
380 /* delay for at-least 150uS */
383 spin_lock_irqsave(&db->lock, flags);
385 iow(db, DM9000_EPCR, 0x0);
387 to[0] = ior(db, DM9000_EPDRL);
388 to[1] = ior(db, DM9000_EPDRH);
390 spin_unlock_irqrestore(&db->lock, flags);
392 mutex_unlock(&db->addr_lock);
396 * Write a word data to SROM
399 dm9000_write_eeprom(board_info_t *db, int offset, u8 *data)
403 if (db->flags & DM9000_PLATF_NO_EEPROM)
406 mutex_lock(&db->addr_lock);
408 spin_lock_irqsave(&db->lock, flags);
409 iow(db, DM9000_EPAR, offset);
410 iow(db, DM9000_EPDRH, data[1]);
411 iow(db, DM9000_EPDRL, data[0]);
412 iow(db, DM9000_EPCR, EPCR_WEP | EPCR_ERPRW);
413 spin_unlock_irqrestore(&db->lock, flags);
415 dm9000_wait_eeprom(db);
417 mdelay(1); /* wait at least 150uS to clear */
419 spin_lock_irqsave(&db->lock, flags);
420 iow(db, DM9000_EPCR, 0);
421 spin_unlock_irqrestore(&db->lock, flags);
423 mutex_unlock(&db->addr_lock);
428 static void dm9000_get_drvinfo(struct net_device *dev,
429 struct ethtool_drvinfo *info)
431 board_info_t *dm = to_dm9000_board(dev);
433 strcpy(info->driver, CARDNAME);
434 strcpy(info->version, DRV_VERSION);
435 strcpy(info->bus_info, to_platform_device(dm->dev)->name);
438 static u32 dm9000_get_msglevel(struct net_device *dev)
440 board_info_t *dm = to_dm9000_board(dev);
442 return dm->msg_enable;
445 static void dm9000_set_msglevel(struct net_device *dev, u32 value)
447 board_info_t *dm = to_dm9000_board(dev);
449 dm->msg_enable = value;
452 static int dm9000_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
454 board_info_t *dm = to_dm9000_board(dev);
456 mii_ethtool_gset(&dm->mii, cmd);
460 static int dm9000_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
462 board_info_t *dm = to_dm9000_board(dev);
464 return mii_ethtool_sset(&dm->mii, cmd);
467 static int dm9000_nway_reset(struct net_device *dev)
469 board_info_t *dm = to_dm9000_board(dev);
470 return mii_nway_restart(&dm->mii);
473 static u32 dm9000_get_link(struct net_device *dev)
475 board_info_t *dm = to_dm9000_board(dev);
476 return mii_link_ok(&dm->mii);
479 #define DM_EEPROM_MAGIC (0x444D394B)
481 static int dm9000_get_eeprom_len(struct net_device *dev)
486 static int dm9000_get_eeprom(struct net_device *dev,
487 struct ethtool_eeprom *ee, u8 *data)
489 board_info_t *dm = to_dm9000_board(dev);
490 int offset = ee->offset;
494 /* EEPROM access is aligned to two bytes */
496 if ((len & 1) != 0 || (offset & 1) != 0)
499 if (dm->flags & DM9000_PLATF_NO_EEPROM)
502 ee->magic = DM_EEPROM_MAGIC;
504 for (i = 0; i < len; i += 2)
505 dm9000_read_eeprom(dm, (offset + i) / 2, data + i);
510 static int dm9000_set_eeprom(struct net_device *dev,
511 struct ethtool_eeprom *ee, u8 *data)
513 board_info_t *dm = to_dm9000_board(dev);
514 int offset = ee->offset;
518 /* EEPROM access is aligned to two bytes */
520 if ((len & 1) != 0 || (offset & 1) != 0)
523 if (dm->flags & DM9000_PLATF_NO_EEPROM)
526 if (ee->magic != DM_EEPROM_MAGIC)
529 for (i = 0; i < len; i += 2)
530 dm9000_write_eeprom(dm, (offset + i) / 2, data + i);
535 static const struct ethtool_ops dm9000_ethtool_ops = {
536 .get_drvinfo = dm9000_get_drvinfo,
537 .get_settings = dm9000_get_settings,
538 .set_settings = dm9000_set_settings,
539 .get_msglevel = dm9000_get_msglevel,
540 .set_msglevel = dm9000_set_msglevel,
541 .nway_reset = dm9000_nway_reset,
542 .get_link = dm9000_get_link,
543 .get_eeprom_len = dm9000_get_eeprom_len,
544 .get_eeprom = dm9000_get_eeprom,
545 .set_eeprom = dm9000_set_eeprom,
549 dm9000_poll_work(struct work_struct *w)
551 struct delayed_work *dw = container_of(w, struct delayed_work, work);
552 board_info_t *db = container_of(dw, board_info_t, phy_poll);
554 mii_check_media(&db->mii, netif_msg_link(db), 0);
556 if (netif_running(db->ndev))
557 dm9000_schedule_poll(db);
560 /* dm9000_release_board
562 * release a board, and any mapped resources
566 dm9000_release_board(struct platform_device *pdev, struct board_info *db)
568 /* unmap our resources */
570 iounmap(db->io_addr);
571 iounmap(db->io_data);
573 /* release the resources */
575 release_resource(db->data_req);
578 release_resource(db->addr_req);
582 static unsigned char dm9000_type_to_char(enum dm9000_type type)
585 case TYPE_DM9000E: return 'e';
586 case TYPE_DM9000A: return 'a';
587 case TYPE_DM9000B: return 'b';
594 * Set DM9000 multicast address
597 dm9000_hash_table(struct net_device *dev)
599 board_info_t *db = (board_info_t *) dev->priv;
600 struct dev_mc_list *mcptr = dev->mc_list;
601 int mc_cnt = dev->mc_count;
605 u8 rcr = RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN;
608 dm9000_dbg(db, 1, "entering %s\n", __func__);
610 spin_lock_irqsave(&db->lock, flags);
612 for (i = 0, oft = DM9000_PAR; i < 6; i++, oft++)
613 iow(db, oft, dev->dev_addr[i]);
615 /* Clear Hash Table */
616 for (i = 0; i < 4; i++)
619 /* broadcast address */
620 hash_table[3] = 0x8000;
622 if (dev->flags & IFF_PROMISC)
625 if (dev->flags & IFF_ALLMULTI)
628 /* the multicast address in Hash Table : 64 bits */
629 for (i = 0; i < mc_cnt; i++, mcptr = mcptr->next) {
630 hash_val = ether_crc_le(6, mcptr->dmi_addr) & 0x3f;
631 hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16);
634 /* Write the hash table to MAC MD table */
635 for (i = 0, oft = DM9000_MAR; i < 4; i++) {
636 iow(db, oft++, hash_table[i]);
637 iow(db, oft++, hash_table[i] >> 8);
640 iow(db, DM9000_RCR, rcr);
641 spin_unlock_irqrestore(&db->lock, flags);
645 * Initilize dm9000 board
648 dm9000_init_dm9000(struct net_device *dev)
650 board_info_t *db = dev->priv;
653 dm9000_dbg(db, 1, "entering %s\n", __func__);
656 db->io_mode = ior(db, DM9000_ISR) >> 6; /* ISR bit7:6 keeps I/O mode */
658 /* GPIO0 on pre-activate PHY */
659 iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */
660 iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */
661 iow(db, DM9000_GPR, 0); /* Enable PHY */
663 if (db->flags & DM9000_PLATF_EXT_PHY)
664 iow(db, DM9000_NCR, NCR_EXT_PHY);
666 /* Program operating register */
667 iow(db, DM9000_TCR, 0); /* TX Polling clear */
668 iow(db, DM9000_BPTR, 0x3f); /* Less 3Kb, 200us */
669 iow(db, DM9000_FCR, 0xff); /* Flow Control */
670 iow(db, DM9000_SMCR, 0); /* Special Mode */
671 /* clear TX status */
672 iow(db, DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END);
673 iow(db, DM9000_ISR, ISR_CLR_STATUS); /* Clear interrupt status */
675 /* Set address filter table */
676 dm9000_hash_table(dev);
678 imr = IMR_PAR | IMR_PTM | IMR_PRM;
679 if (db->type != TYPE_DM9000E)
684 /* Enable TX/RX interrupt mask */
685 iow(db, DM9000_IMR, imr);
687 /* Init Driver variable */
689 db->queue_pkt_len = 0;
690 dev->trans_start = 0;
693 /* Our watchdog timed out. Called by the networking layer */
694 static void dm9000_timeout(struct net_device *dev)
696 board_info_t *db = (board_info_t *) dev->priv;
700 /* Save previous register address */
701 reg_save = readb(db->io_addr);
702 spin_lock_irqsave(&db->lock, flags);
704 netif_stop_queue(dev);
706 dm9000_init_dm9000(dev);
707 /* We can accept TX packets again */
708 dev->trans_start = jiffies;
709 netif_wake_queue(dev);
711 /* Restore previous register address */
712 writeb(reg_save, db->io_addr);
713 spin_unlock_irqrestore(&db->lock, flags);
717 * Hardware start transmission.
718 * Send a packet to media from the upper layer.
721 dm9000_start_xmit(struct sk_buff *skb, struct net_device *dev)
724 board_info_t *db = dev->priv;
726 dm9000_dbg(db, 3, "%s:\n", __func__);
728 if (db->tx_pkt_cnt > 1)
731 spin_lock_irqsave(&db->lock, flags);
733 /* Move data to DM9000 TX RAM */
734 writeb(DM9000_MWCMD, db->io_addr);
736 (db->outblk)(db->io_data, skb->data, skb->len);
737 dev->stats.tx_bytes += skb->len;
740 /* TX control: First packet immediately send, second packet queue */
741 if (db->tx_pkt_cnt == 1) {
742 /* Set TX length to DM9000 */
743 iow(db, DM9000_TXPLL, skb->len);
744 iow(db, DM9000_TXPLH, skb->len >> 8);
746 /* Issue TX polling command */
747 iow(db, DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */
749 dev->trans_start = jiffies; /* save the time stamp */
752 db->queue_pkt_len = skb->len;
753 netif_stop_queue(dev);
756 spin_unlock_irqrestore(&db->lock, flags);
765 * DM9000 interrupt handler
766 * receive the packet to upper layer, free the transmitted packet
769 static void dm9000_tx_done(struct net_device *dev, board_info_t *db)
771 int tx_status = ior(db, DM9000_NSR); /* Got TX status */
773 if (tx_status & (NSR_TX2END | NSR_TX1END)) {
774 /* One packet sent complete */
776 dev->stats.tx_packets++;
778 if (netif_msg_tx_done(db))
779 dev_dbg(db->dev, "tx done, NSR %02x\n", tx_status);
781 /* Queue packet check & send */
782 if (db->tx_pkt_cnt > 0) {
783 iow(db, DM9000_TXPLL, db->queue_pkt_len);
784 iow(db, DM9000_TXPLH, db->queue_pkt_len >> 8);
785 iow(db, DM9000_TCR, TCR_TXREQ);
786 dev->trans_start = jiffies;
788 netif_wake_queue(dev);
792 struct dm9000_rxhdr {
796 } __attribute__((__packed__));
799 * Received a packet and pass to upper layer
802 dm9000_rx(struct net_device *dev)
804 board_info_t *db = (board_info_t *) dev->priv;
805 struct dm9000_rxhdr rxhdr;
811 /* Check packet ready or not */
813 ior(db, DM9000_MRCMDX); /* Dummy read */
815 /* Get most updated data */
816 rxbyte = readb(db->io_data);
818 /* Status check: this byte must be 0 or 1 */
819 if (rxbyte > DM9000_PKT_RDY) {
820 dev_warn(db->dev, "status check fail: %d\n", rxbyte);
821 iow(db, DM9000_RCR, 0x00); /* Stop Device */
822 iow(db, DM9000_ISR, IMR_PAR); /* Stop INT request */
826 if (rxbyte != DM9000_PKT_RDY)
829 /* A packet ready now & Get status/length */
831 writeb(DM9000_MRCMD, db->io_addr);
833 (db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr));
835 RxLen = le16_to_cpu(rxhdr.RxLen);
837 if (netif_msg_rx_status(db))
838 dev_dbg(db->dev, "RX: status %02x, length %04x\n",
839 rxhdr.RxStatus, RxLen);
841 /* Packet Status check */
844 if (netif_msg_rx_err(db))
845 dev_dbg(db->dev, "RX: Bad Packet (runt)\n");
848 if (RxLen > DM9000_PKT_MAX) {
849 dev_dbg(db->dev, "RST: RX Len:%x\n", RxLen);
852 if (rxhdr.RxStatus & 0xbf) {
854 if (rxhdr.RxStatus & 0x01) {
855 if (netif_msg_rx_err(db))
856 dev_dbg(db->dev, "fifo error\n");
857 dev->stats.rx_fifo_errors++;
859 if (rxhdr.RxStatus & 0x02) {
860 if (netif_msg_rx_err(db))
861 dev_dbg(db->dev, "crc error\n");
862 dev->stats.rx_crc_errors++;
864 if (rxhdr.RxStatus & 0x80) {
865 if (netif_msg_rx_err(db))
866 dev_dbg(db->dev, "length error\n");
867 dev->stats.rx_length_errors++;
871 /* Move data from DM9000 */
873 && ((skb = dev_alloc_skb(RxLen + 4)) != NULL)) {
875 rdptr = (u8 *) skb_put(skb, RxLen - 4);
877 /* Read received packet from RX SRAM */
879 (db->inblk)(db->io_data, rdptr, RxLen);
880 dev->stats.rx_bytes += RxLen;
882 /* Pass to upper layer */
883 skb->protocol = eth_type_trans(skb, dev);
885 dev->stats.rx_packets++;
888 /* need to dump the packet's data */
890 (db->dumpblk)(db->io_data, RxLen);
892 } while (rxbyte == DM9000_PKT_RDY);
895 static irqreturn_t dm9000_interrupt(int irq, void *dev_id)
897 struct net_device *dev = dev_id;
898 board_info_t *db = dev->priv;
902 dm9000_dbg(db, 3, "entering %s\n", __func__);
904 /* A real interrupt coming */
906 spin_lock(&db->lock);
908 /* Save previous register address */
909 reg_save = readb(db->io_addr);
911 /* Disable all interrupts */
912 iow(db, DM9000_IMR, IMR_PAR);
914 /* Got DM9000 interrupt status */
915 int_status = ior(db, DM9000_ISR); /* Got ISR */
916 iow(db, DM9000_ISR, int_status); /* Clear ISR status */
918 if (netif_msg_intr(db))
919 dev_dbg(db->dev, "interrupt status %02x\n", int_status);
921 /* Received the coming packet */
922 if (int_status & ISR_PRS)
925 /* Trnasmit Interrupt check */
926 if (int_status & ISR_PTS)
927 dm9000_tx_done(dev, db);
929 if (db->type != TYPE_DM9000E) {
930 if (int_status & ISR_LNKCHNG) {
931 /* fire a link-change request */
932 schedule_delayed_work(&db->phy_poll, 1);
936 /* Re-enable interrupt mask */
937 iow(db, DM9000_IMR, db->imr_all);
939 /* Restore previous register address */
940 writeb(reg_save, db->io_addr);
942 spin_unlock(&db->lock);
947 #ifdef CONFIG_NET_POLL_CONTROLLER
951 static void dm9000_poll_controller(struct net_device *dev)
953 disable_irq(dev->irq);
954 dm9000_interrupt(dev->irq, dev);
955 enable_irq(dev->irq);
960 * Open the interface.
961 * The interface is opened whenever "ifconfig" actives it.
964 dm9000_open(struct net_device *dev)
966 board_info_t *db = dev->priv;
967 unsigned long irqflags = db->irq_res->flags & IRQF_TRIGGER_MASK;
969 if (netif_msg_ifup(db))
970 dev_dbg(db->dev, "enabling %s\n", dev->name);
972 /* If there is no IRQ type specified, default to something that
973 * may work, and tell the user that this is a problem */
975 if (irqflags == IRQF_TRIGGER_NONE) {
976 dev_warn(db->dev, "WARNING: no IRQ resource flags set.\n");
977 irqflags = DEFAULT_TRIGGER;
980 irqflags |= IRQF_SHARED;
982 if (request_irq(dev->irq, &dm9000_interrupt, irqflags, dev->name, dev))
985 /* Initialize DM9000 board */
987 dm9000_init_dm9000(dev);
989 /* Init driver variable */
992 mii_check_media(&db->mii, netif_msg_link(db), 1);
993 netif_start_queue(dev);
995 dm9000_schedule_poll(db);
1001 * Sleep, either by using msleep() or if we are suspending, then
1002 * use mdelay() to sleep.
1004 static void dm9000_msleep(board_info_t *db, unsigned int ms)
1013 * Read a word from phyxcer
1016 dm9000_phy_read(struct net_device *dev, int phy_reg_unused, int reg)
1018 board_info_t *db = (board_info_t *) dev->priv;
1019 unsigned long flags;
1020 unsigned int reg_save;
1023 mutex_lock(&db->addr_lock);
1025 spin_lock_irqsave(&db->lock,flags);
1027 /* Save previous register address */
1028 reg_save = readb(db->io_addr);
1030 /* Fill the phyxcer register into REG_0C */
1031 iow(db, DM9000_EPAR, DM9000_PHY | reg);
1033 iow(db, DM9000_EPCR, 0xc); /* Issue phyxcer read command */
1035 writeb(reg_save, db->io_addr);
1036 spin_unlock_irqrestore(&db->lock,flags);
1038 dm9000_msleep(db, 1); /* Wait read complete */
1040 spin_lock_irqsave(&db->lock,flags);
1041 reg_save = readb(db->io_addr);
1043 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer read command */
1045 /* The read data keeps on REG_0D & REG_0E */
1046 ret = (ior(db, DM9000_EPDRH) << 8) | ior(db, DM9000_EPDRL);
1048 /* restore the previous address */
1049 writeb(reg_save, db->io_addr);
1050 spin_unlock_irqrestore(&db->lock,flags);
1052 mutex_unlock(&db->addr_lock);
1054 dm9000_dbg(db, 5, "phy_read[%02x] -> %04x\n", reg, ret);
1059 * Write a word to phyxcer
1062 dm9000_phy_write(struct net_device *dev,
1063 int phyaddr_unused, int reg, int value)
1065 board_info_t *db = (board_info_t *) dev->priv;
1066 unsigned long flags;
1067 unsigned long reg_save;
1069 dm9000_dbg(db, 5, "phy_write[%02x] = %04x\n", reg, value);
1070 mutex_lock(&db->addr_lock);
1072 spin_lock_irqsave(&db->lock,flags);
1074 /* Save previous register address */
1075 reg_save = readb(db->io_addr);
1077 /* Fill the phyxcer register into REG_0C */
1078 iow(db, DM9000_EPAR, DM9000_PHY | reg);
1080 /* Fill the written data into REG_0D & REG_0E */
1081 iow(db, DM9000_EPDRL, value);
1082 iow(db, DM9000_EPDRH, value >> 8);
1084 iow(db, DM9000_EPCR, 0xa); /* Issue phyxcer write command */
1086 writeb(reg_save, db->io_addr);
1087 spin_unlock_irqrestore(&db->lock, flags);
1089 dm9000_msleep(db, 1); /* Wait write complete */
1091 spin_lock_irqsave(&db->lock,flags);
1092 reg_save = readb(db->io_addr);
1094 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer write command */
1096 /* restore the previous address */
1097 writeb(reg_save, db->io_addr);
1099 spin_unlock_irqrestore(&db->lock, flags);
1100 mutex_unlock(&db->addr_lock);
1104 dm9000_shutdown(struct net_device *dev)
1106 board_info_t *db = dev->priv;
1109 dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET); /* PHY RESET */
1110 iow(db, DM9000_GPR, 0x01); /* Power-Down PHY */
1111 iow(db, DM9000_IMR, IMR_PAR); /* Disable all interrupt */
1112 iow(db, DM9000_RCR, 0x00); /* Disable RX */
1116 * Stop the interface.
1117 * The interface is stopped when it is brought.
1120 dm9000_stop(struct net_device *ndev)
1122 board_info_t *db = ndev->priv;
1124 if (netif_msg_ifdown(db))
1125 dev_dbg(db->dev, "shutting down %s\n", ndev->name);
1127 cancel_delayed_work_sync(&db->phy_poll);
1129 netif_stop_queue(ndev);
1130 netif_carrier_off(ndev);
1132 /* free interrupt */
1133 free_irq(ndev->irq, ndev);
1135 dm9000_shutdown(ndev);
1140 #define res_size(_r) (((_r)->end - (_r)->start) + 1)
1143 * Search DM9000 board, allocate space and register it
1145 static int __devinit
1146 dm9000_probe(struct platform_device *pdev)
1148 struct dm9000_plat_data *pdata = pdev->dev.platform_data;
1149 struct board_info *db; /* Point a board information structure */
1150 struct net_device *ndev;
1151 const unsigned char *mac_src;
1157 /* Init network device */
1158 ndev = alloc_etherdev(sizeof(struct board_info));
1160 dev_err(&pdev->dev, "could not allocate device.\n");
1164 SET_NETDEV_DEV(ndev, &pdev->dev);
1166 dev_dbg(&pdev->dev, "dm9000_probe()\n");
1168 /* setup board info structure */
1170 memset(db, 0, sizeof(*db));
1172 db->dev = &pdev->dev;
1175 spin_lock_init(&db->lock);
1176 mutex_init(&db->addr_lock);
1178 INIT_DELAYED_WORK(&db->phy_poll, dm9000_poll_work);
1180 db->addr_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1181 db->data_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1182 db->irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1184 if (db->addr_res == NULL || db->data_res == NULL ||
1185 db->irq_res == NULL) {
1186 dev_err(db->dev, "insufficient resources\n");
1191 iosize = res_size(db->addr_res);
1192 db->addr_req = request_mem_region(db->addr_res->start, iosize,
1195 if (db->addr_req == NULL) {
1196 dev_err(db->dev, "cannot claim address reg area\n");
1201 db->io_addr = ioremap(db->addr_res->start, iosize);
1203 if (db->io_addr == NULL) {
1204 dev_err(db->dev, "failed to ioremap address reg\n");
1209 iosize = res_size(db->data_res);
1210 db->data_req = request_mem_region(db->data_res->start, iosize,
1213 if (db->data_req == NULL) {
1214 dev_err(db->dev, "cannot claim data reg area\n");
1219 db->io_data = ioremap(db->data_res->start, iosize);
1221 if (db->io_data == NULL) {
1222 dev_err(db->dev, "failed to ioremap data reg\n");
1227 /* fill in parameters for net-dev structure */
1228 ndev->base_addr = (unsigned long)db->io_addr;
1229 ndev->irq = db->irq_res->start;
1231 /* ensure at least we have a default set of IO routines */
1232 dm9000_set_io(db, iosize);
1234 /* check to see if anything is being over-ridden */
1235 if (pdata != NULL) {
1236 /* check to see if the driver wants to over-ride the
1237 * default IO width */
1239 if (pdata->flags & DM9000_PLATF_8BITONLY)
1240 dm9000_set_io(db, 1);
1242 if (pdata->flags & DM9000_PLATF_16BITONLY)
1243 dm9000_set_io(db, 2);
1245 if (pdata->flags & DM9000_PLATF_32BITONLY)
1246 dm9000_set_io(db, 4);
1248 /* check to see if there are any IO routine
1251 if (pdata->inblk != NULL)
1252 db->inblk = pdata->inblk;
1254 if (pdata->outblk != NULL)
1255 db->outblk = pdata->outblk;
1257 if (pdata->dumpblk != NULL)
1258 db->dumpblk = pdata->dumpblk;
1260 db->flags = pdata->flags;
1265 /* try multiple times, DM9000 sometimes gets the read wrong */
1266 for (i = 0; i < 8; i++) {
1267 id_val = ior(db, DM9000_VIDL);
1268 id_val |= (u32)ior(db, DM9000_VIDH) << 8;
1269 id_val |= (u32)ior(db, DM9000_PIDL) << 16;
1270 id_val |= (u32)ior(db, DM9000_PIDH) << 24;
1272 if (id_val == DM9000_ID)
1274 dev_err(db->dev, "read wrong id 0x%08x\n", id_val);
1277 if (id_val != DM9000_ID) {
1278 dev_err(db->dev, "wrong id: 0x%08x\n", id_val);
1283 /* Identify what type of DM9000 we are working on */
1285 id_val = ior(db, DM9000_CHIPR);
1286 dev_dbg(db->dev, "dm9000 revision 0x%02x\n", id_val);
1290 db->type = TYPE_DM9000A;
1293 db->type = TYPE_DM9000B;
1296 dev_dbg(db->dev, "ID %02x => defaulting to DM9000E\n", id_val);
1297 db->type = TYPE_DM9000E;
1300 /* from this point we assume that we have found a DM9000 */
1302 /* driver system function */
1305 ndev->open = &dm9000_open;
1306 ndev->hard_start_xmit = &dm9000_start_xmit;
1307 ndev->tx_timeout = &dm9000_timeout;
1308 ndev->watchdog_timeo = msecs_to_jiffies(watchdog);
1309 ndev->stop = &dm9000_stop;
1310 ndev->set_multicast_list = &dm9000_hash_table;
1311 ndev->ethtool_ops = &dm9000_ethtool_ops;
1312 ndev->do_ioctl = &dm9000_ioctl;
1314 #ifdef CONFIG_NET_POLL_CONTROLLER
1315 ndev->poll_controller = &dm9000_poll_controller;
1318 db->msg_enable = NETIF_MSG_LINK;
1319 db->mii.phy_id_mask = 0x1f;
1320 db->mii.reg_num_mask = 0x1f;
1321 db->mii.force_media = 0;
1322 db->mii.full_duplex = 0;
1324 db->mii.mdio_read = dm9000_phy_read;
1325 db->mii.mdio_write = dm9000_phy_write;
1329 /* try reading the node address from the attached EEPROM */
1330 for (i = 0; i < 6; i += 2)
1331 dm9000_read_eeprom(db, i / 2, ndev->dev_addr+i);
1333 if (!is_valid_ether_addr(ndev->dev_addr)) {
1334 /* try reading from mac */
1337 for (i = 0; i < 6; i++)
1338 ndev->dev_addr[i] = ior(db, i+DM9000_PAR);
1341 if (!is_valid_ether_addr(ndev->dev_addr))
1342 dev_warn(db->dev, "%s: Invalid ethernet MAC address. Please "
1343 "set using ifconfig\n", ndev->name);
1345 platform_set_drvdata(pdev, ndev);
1346 ret = register_netdev(ndev);
1349 DECLARE_MAC_BUF(mac);
1350 printk(KERN_INFO "%s: dm9000%c at %p,%p IRQ %d MAC: %s (%s)\n",
1351 ndev->name, dm9000_type_to_char(db->type),
1352 db->io_addr, db->io_data, ndev->irq,
1353 print_mac(mac, ndev->dev_addr), mac_src);
1358 dev_err(db->dev, "not found (%d).\n", ret);
1360 dm9000_release_board(pdev, db);
1367 dm9000_drv_suspend(struct platform_device *dev, pm_message_t state)
1369 struct net_device *ndev = platform_get_drvdata(dev);
1373 db = (board_info_t *) ndev->priv;
1376 if (netif_running(ndev)) {
1377 netif_device_detach(ndev);
1378 dm9000_shutdown(ndev);
1385 dm9000_drv_resume(struct platform_device *dev)
1387 struct net_device *ndev = platform_get_drvdata(dev);
1388 board_info_t *db = (board_info_t *) ndev->priv;
1392 if (netif_running(ndev)) {
1394 dm9000_init_dm9000(ndev);
1396 netif_device_attach(ndev);
1404 static int __devexit
1405 dm9000_drv_remove(struct platform_device *pdev)
1407 struct net_device *ndev = platform_get_drvdata(pdev);
1409 platform_set_drvdata(pdev, NULL);
1411 unregister_netdev(ndev);
1412 dm9000_release_board(pdev, (board_info_t *) ndev->priv);
1413 free_netdev(ndev); /* free device structure */
1415 dev_dbg(&pdev->dev, "released and freed device\n");
1419 static struct platform_driver dm9000_driver = {
1422 .owner = THIS_MODULE,
1424 .probe = dm9000_probe,
1425 .remove = __devexit_p(dm9000_drv_remove),
1426 .suspend = dm9000_drv_suspend,
1427 .resume = dm9000_drv_resume,
1433 printk(KERN_INFO "%s Ethernet Driver, V%s\n", CARDNAME, DRV_VERSION);
1435 return platform_driver_register(&dm9000_driver);
1439 dm9000_cleanup(void)
1441 platform_driver_unregister(&dm9000_driver);
1444 module_init(dm9000_init);
1445 module_exit(dm9000_cleanup);
1447 MODULE_AUTHOR("Sascha Hauer, Ben Dooks");
1448 MODULE_DESCRIPTION("Davicom DM9000 network driver");
1449 MODULE_LICENSE("GPL");
1450 MODULE_ALIAS("platform:dm9000");