2 * Blackfin On-Chip MAC Driver
4 * Copyright 2004-2007 Analog Devices Inc.
6 * Enter bugs at http://blackfin.uclinux.org/
8 * Licensed under the GPL-2 or later.
11 #include <linux/init.h>
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/sched.h>
15 #include <linux/slab.h>
16 #include <linux/delay.h>
17 #include <linux/timer.h>
18 #include <linux/errno.h>
19 #include <linux/irq.h>
21 #include <linux/ioport.h>
22 #include <linux/crc32.h>
23 #include <linux/device.h>
24 #include <linux/spinlock.h>
25 #include <linux/ethtool.h>
26 #include <linux/mii.h>
27 #include <linux/phy.h>
28 #include <linux/netdevice.h>
29 #include <linux/etherdevice.h>
30 #include <linux/skbuff.h>
31 #include <linux/platform_device.h>
34 #include <linux/dma-mapping.h>
36 #include <asm/blackfin.h>
37 #include <asm/cacheflush.h>
38 #include <asm/portmux.h>
42 #define DRV_NAME "bfin_mac"
43 #define DRV_VERSION "1.1"
44 #define DRV_AUTHOR "Bryan Wu, Luke Yang"
45 #define DRV_DESC "Blackfin on-chip Ethernet MAC driver"
47 MODULE_AUTHOR(DRV_AUTHOR);
48 MODULE_LICENSE("GPL");
49 MODULE_DESCRIPTION(DRV_DESC);
50 MODULE_ALIAS("platform:bfin_mac");
52 #if defined(CONFIG_BFIN_MAC_USE_L1)
53 # define bfin_mac_alloc(dma_handle, size) l1_data_sram_zalloc(size)
54 # define bfin_mac_free(dma_handle, ptr) l1_data_sram_free(ptr)
56 # define bfin_mac_alloc(dma_handle, size) \
57 dma_alloc_coherent(NULL, size, dma_handle, GFP_KERNEL)
58 # define bfin_mac_free(dma_handle, ptr) \
59 dma_free_coherent(NULL, sizeof(*ptr), ptr, dma_handle)
62 #define PKT_BUF_SZ 1580
64 #define MAX_TIMEOUT_CNT 500
66 /* pointers to maintain transmit list */
67 static struct net_dma_desc_tx *tx_list_head;
68 static struct net_dma_desc_tx *tx_list_tail;
69 static struct net_dma_desc_rx *rx_list_head;
70 static struct net_dma_desc_rx *rx_list_tail;
71 static struct net_dma_desc_rx *current_rx_ptr;
72 static struct net_dma_desc_tx *current_tx_ptr;
73 static struct net_dma_desc_tx *tx_desc;
74 static struct net_dma_desc_rx *rx_desc;
76 #if defined(CONFIG_BFIN_MAC_RMII)
77 static u16 pin_req[] = P_RMII0;
79 static u16 pin_req[] = P_MII0;
82 static void bfin_mac_disable(void);
83 static void bfin_mac_enable(void);
85 static void desc_list_free(void)
87 struct net_dma_desc_rx *r;
88 struct net_dma_desc_tx *t;
90 #if !defined(CONFIG_BFIN_MAC_USE_L1)
91 dma_addr_t dma_handle = 0;
96 for (i = 0; i < CONFIG_BFIN_TX_DESC_NUM; i++) {
99 dev_kfree_skb(t->skb);
105 bfin_mac_free(dma_handle, tx_desc);
110 for (i = 0; i < CONFIG_BFIN_RX_DESC_NUM; i++) {
113 dev_kfree_skb(r->skb);
119 bfin_mac_free(dma_handle, rx_desc);
123 static int desc_list_init(void)
126 struct sk_buff *new_skb;
127 #if !defined(CONFIG_BFIN_MAC_USE_L1)
129 * This dma_handle is useless in Blackfin dma_alloc_coherent().
130 * The real dma handler is the return value of dma_alloc_coherent().
132 dma_addr_t dma_handle;
135 tx_desc = bfin_mac_alloc(&dma_handle,
136 sizeof(struct net_dma_desc_tx) *
137 CONFIG_BFIN_TX_DESC_NUM);
141 rx_desc = bfin_mac_alloc(&dma_handle,
142 sizeof(struct net_dma_desc_rx) *
143 CONFIG_BFIN_RX_DESC_NUM);
148 tx_list_head = tx_list_tail = tx_desc;
150 for (i = 0; i < CONFIG_BFIN_TX_DESC_NUM; i++) {
151 struct net_dma_desc_tx *t = tx_desc + i;
152 struct dma_descriptor *a = &(t->desc_a);
153 struct dma_descriptor *b = &(t->desc_b);
157 * read from memory WNR = 0
158 * wordsize is 32 bits
159 * 6 half words is desc size
162 a->config = WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
163 a->start_addr = (unsigned long)t->packet;
165 a->next_dma_desc = b;
169 * write to memory WNR = 1
170 * wordsize is 32 bits
172 * 6 half words is desc size
175 b->config = DMAEN | WNR | WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
176 b->start_addr = (unsigned long)(&(t->status));
180 tx_list_tail->desc_b.next_dma_desc = a;
181 tx_list_tail->next = t;
184 tx_list_tail->next = tx_list_head; /* tx_list is a circle */
185 tx_list_tail->desc_b.next_dma_desc = &(tx_list_head->desc_a);
186 current_tx_ptr = tx_list_head;
189 rx_list_head = rx_list_tail = rx_desc;
191 for (i = 0; i < CONFIG_BFIN_RX_DESC_NUM; i++) {
192 struct net_dma_desc_rx *r = rx_desc + i;
193 struct dma_descriptor *a = &(r->desc_a);
194 struct dma_descriptor *b = &(r->desc_b);
196 /* allocate a new skb for next time receive */
197 new_skb = dev_alloc_skb(PKT_BUF_SZ + 2);
199 printk(KERN_NOTICE DRV_NAME
200 ": init: low on mem - packet dropped\n");
203 skb_reserve(new_skb, 2);
208 * write to memory WNR = 1
209 * wordsize is 32 bits
211 * 6 half words is desc size
214 a->config = DMAEN | WNR | WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
215 /* since RXDWA is enabled */
216 a->start_addr = (unsigned long)new_skb->data - 2;
218 a->next_dma_desc = b;
222 * write to memory WNR = 1
223 * wordsize is 32 bits
225 * 6 half words is desc size
228 b->config = DMAEN | WNR | WDSIZE_32 | DI_EN |
229 NDSIZE_6 | DMAFLOW_LARGE;
230 b->start_addr = (unsigned long)(&(r->status));
233 rx_list_tail->desc_b.next_dma_desc = a;
234 rx_list_tail->next = r;
237 rx_list_tail->next = rx_list_head; /* rx_list is a circle */
238 rx_list_tail->desc_b.next_dma_desc = &(rx_list_head->desc_a);
239 current_rx_ptr = rx_list_head;
245 printk(KERN_ERR DRV_NAME ": kmalloc failed\n");
250 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
255 /* Wait until the previous MDC/MDIO transaction has completed */
256 static void mdio_poll(void)
258 int timeout_cnt = MAX_TIMEOUT_CNT;
260 /* poll the STABUSY bit */
261 while ((bfin_read_EMAC_STAADD()) & STABUSY) {
263 if (timeout_cnt-- < 0) {
264 printk(KERN_ERR DRV_NAME
265 ": wait MDC/MDIO transaction to complete timeout\n");
271 /* Read an off-chip register in a PHY through the MDC/MDIO port */
272 static int mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
277 bfin_write_EMAC_STAADD(SET_PHYAD((u16) phy_addr) |
278 SET_REGAD((u16) regnum) |
283 return (int) bfin_read_EMAC_STADAT();
286 /* Write an off-chip register in a PHY through the MDC/MDIO port */
287 static int mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum,
292 bfin_write_EMAC_STADAT((u32) value);
295 bfin_write_EMAC_STAADD(SET_PHYAD((u16) phy_addr) |
296 SET_REGAD((u16) regnum) |
305 static int mdiobus_reset(struct mii_bus *bus)
310 static void bfin_mac_adjust_link(struct net_device *dev)
312 struct bfin_mac_local *lp = netdev_priv(dev);
313 struct phy_device *phydev = lp->phydev;
317 spin_lock_irqsave(&lp->lock, flags);
319 /* Now we make sure that we can be in full duplex mode.
320 * If not, we operate in half-duplex mode. */
321 if (phydev->duplex != lp->old_duplex) {
322 u32 opmode = bfin_read_EMAC_OPMODE();
330 bfin_write_EMAC_OPMODE(opmode);
331 lp->old_duplex = phydev->duplex;
334 if (phydev->speed != lp->old_speed) {
335 #if defined(CONFIG_BFIN_MAC_RMII)
336 u32 opmode = bfin_read_EMAC_OPMODE();
337 switch (phydev->speed) {
342 opmode &= ~(RMII_10);
346 "%s: Ack! Speed (%d) is not 10/100!\n",
347 DRV_NAME, phydev->speed);
350 bfin_write_EMAC_OPMODE(opmode);
354 lp->old_speed = phydev->speed;
362 } else if (lp->old_link) {
370 u32 opmode = bfin_read_EMAC_OPMODE();
371 phy_print_status(phydev);
372 pr_debug("EMAC_OPMODE = 0x%08x\n", opmode);
375 spin_unlock_irqrestore(&lp->lock, flags);
379 #define MDC_CLK 2500000
381 static int mii_probe(struct net_device *dev)
383 struct bfin_mac_local *lp = netdev_priv(dev);
384 struct phy_device *phydev = NULL;
385 unsigned short sysctl;
389 /* Enable PHY output early */
390 if (!(bfin_read_VR_CTL() & PHYCLKOE))
391 bfin_write_VR_CTL(bfin_read_VR_CTL() | PHYCLKOE);
394 mdc_div = ((sclk / MDC_CLK) / 2) - 1;
396 sysctl = bfin_read_EMAC_SYSCTL();
397 sysctl = (sysctl & ~MDCDIV) | SET_MDCDIV(mdc_div);
398 bfin_write_EMAC_SYSCTL(sysctl);
400 /* search for connect PHY device */
401 for (i = 0; i < PHY_MAX_ADDR; i++) {
402 struct phy_device *const tmp_phydev = lp->mii_bus.phy_map[i];
405 continue; /* no PHY here... */
408 break; /* found it */
411 /* now we are supposed to have a proper phydev, to attach to... */
413 printk(KERN_INFO "%s: Don't found any phy device at all\n",
418 #if defined(CONFIG_BFIN_MAC_RMII)
419 phydev = phy_connect(dev, phydev->dev.bus_id, &bfin_mac_adjust_link, 0,
420 PHY_INTERFACE_MODE_RMII);
422 phydev = phy_connect(dev, phydev->dev.bus_id, &bfin_mac_adjust_link, 0,
423 PHY_INTERFACE_MODE_MII);
426 if (IS_ERR(phydev)) {
427 printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
428 return PTR_ERR(phydev);
431 /* mask with MAC supported features */
432 phydev->supported &= (SUPPORTED_10baseT_Half
433 | SUPPORTED_10baseT_Full
434 | SUPPORTED_100baseT_Half
435 | SUPPORTED_100baseT_Full
437 | SUPPORTED_Pause | SUPPORTED_Asym_Pause
441 phydev->advertising = phydev->supported;
448 printk(KERN_INFO "%s: attached PHY driver [%s] "
449 "(mii_bus:phy_addr=%s, irq=%d, mdc_clk=%dHz(mdc_div=%d)"
451 DRV_NAME, phydev->drv->name, phydev->dev.bus_id, phydev->irq,
452 MDC_CLK, mdc_div, sclk/1000000);
457 /**************************************************************************/
458 void setup_system_regs(struct net_device *dev)
460 unsigned short sysctl;
463 * Odd word alignment for Receive Frame DMA word
464 * Configure checksum support and rcve frame word alignment
466 sysctl = bfin_read_EMAC_SYSCTL();
467 #if defined(BFIN_MAC_CSUM_OFFLOAD)
468 sysctl |= RXDWA | RXCKS;
472 bfin_write_EMAC_SYSCTL(sysctl);
474 bfin_write_EMAC_MMC_CTL(RSTC | CROLL);
476 /* Initialize the TX DMA channel registers */
477 bfin_write_DMA2_X_COUNT(0);
478 bfin_write_DMA2_X_MODIFY(4);
479 bfin_write_DMA2_Y_COUNT(0);
480 bfin_write_DMA2_Y_MODIFY(0);
482 /* Initialize the RX DMA channel registers */
483 bfin_write_DMA1_X_COUNT(0);
484 bfin_write_DMA1_X_MODIFY(4);
485 bfin_write_DMA1_Y_COUNT(0);
486 bfin_write_DMA1_Y_MODIFY(0);
489 static void setup_mac_addr(u8 *mac_addr)
491 u32 addr_low = le32_to_cpu(*(__le32 *) & mac_addr[0]);
492 u16 addr_hi = le16_to_cpu(*(__le16 *) & mac_addr[4]);
494 /* this depends on a little-endian machine */
495 bfin_write_EMAC_ADDRLO(addr_low);
496 bfin_write_EMAC_ADDRHI(addr_hi);
499 static int bfin_mac_set_mac_address(struct net_device *dev, void *p)
501 struct sockaddr *addr = p;
502 if (netif_running(dev))
504 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
505 setup_mac_addr(dev->dev_addr);
509 static void adjust_tx_list(void)
511 int timeout_cnt = MAX_TIMEOUT_CNT;
513 if (tx_list_head->status.status_word != 0
514 && current_tx_ptr != tx_list_head) {
515 goto adjust_head; /* released something, just return; */
519 * if nothing released, check wait condition
520 * current's next can not be the head,
521 * otherwise the dma will not stop as we want
523 if (current_tx_ptr->next->next == tx_list_head) {
524 while (tx_list_head->status.status_word == 0) {
526 if (tx_list_head->status.status_word != 0
527 || !(bfin_read_DMA2_IRQ_STATUS() & 0x08)) {
530 if (timeout_cnt-- < 0) {
531 printk(KERN_ERR DRV_NAME
532 ": wait for adjust tx list head timeout\n");
536 if (tx_list_head->status.status_word != 0) {
545 tx_list_head->desc_a.config &= ~DMAEN;
546 tx_list_head->status.status_word = 0;
547 if (tx_list_head->skb) {
548 dev_kfree_skb(tx_list_head->skb);
549 tx_list_head->skb = NULL;
551 printk(KERN_ERR DRV_NAME
552 ": no sk_buff in a transmitted frame!\n");
554 tx_list_head = tx_list_head->next;
555 } while (tx_list_head->status.status_word != 0
556 && current_tx_ptr != tx_list_head);
561 static int bfin_mac_hard_start_xmit(struct sk_buff *skb,
562 struct net_device *dev)
566 current_tx_ptr->skb = skb;
569 * Is skb->data always 16-bit aligned?
570 * Do we need to memcpy((char *)(tail->packet + 2), skb->data, len)?
572 if ((((unsigned int)(skb->data)) & 0x02) == 2) {
573 /* move skb->data to current_tx_ptr payload */
574 data = (unsigned int)(skb->data) - 2;
575 *((unsigned short *)data) = (unsigned short)(skb->len);
576 current_tx_ptr->desc_a.start_addr = (unsigned long)data;
577 /* this is important! */
578 blackfin_dcache_flush_range(data, (data + (skb->len)) + 2);
581 *((unsigned short *)(current_tx_ptr->packet)) =
582 (unsigned short)(skb->len);
583 memcpy((char *)(current_tx_ptr->packet + 2), skb->data,
585 current_tx_ptr->desc_a.start_addr =
586 (unsigned long)current_tx_ptr->packet;
587 if (current_tx_ptr->status.status_word != 0)
588 current_tx_ptr->status.status_word = 0;
589 blackfin_dcache_flush_range((unsigned int)current_tx_ptr->
591 (unsigned int)(current_tx_ptr->
596 /* enable this packet's dma */
597 current_tx_ptr->desc_a.config |= DMAEN;
599 /* tx dma is running, just return */
600 if (bfin_read_DMA2_IRQ_STATUS() & 0x08)
603 /* tx dma is not running */
604 bfin_write_DMA2_NEXT_DESC_PTR(&(current_tx_ptr->desc_a));
605 /* dma enabled, read from memory, size is 6 */
606 bfin_write_DMA2_CONFIG(current_tx_ptr->desc_a.config);
607 /* Turn on the EMAC tx */
608 bfin_write_EMAC_OPMODE(bfin_read_EMAC_OPMODE() | TE);
612 current_tx_ptr = current_tx_ptr->next;
613 dev->trans_start = jiffies;
614 dev->stats.tx_packets++;
615 dev->stats.tx_bytes += (skb->len);
619 static void bfin_mac_rx(struct net_device *dev)
621 struct sk_buff *skb, *new_skb;
624 /* allocate a new skb for next time receive */
625 skb = current_rx_ptr->skb;
626 new_skb = dev_alloc_skb(PKT_BUF_SZ + 2);
628 printk(KERN_NOTICE DRV_NAME
629 ": rx: low on mem - packet dropped\n");
630 dev->stats.rx_dropped++;
633 /* reserve 2 bytes for RXDWA padding */
634 skb_reserve(new_skb, 2);
635 current_rx_ptr->skb = new_skb;
636 current_rx_ptr->desc_a.start_addr = (unsigned long)new_skb->data - 2;
638 /* Invidate the data cache of skb->data range when it is write back
639 * cache. It will prevent overwritting the new data from DMA
641 blackfin_dcache_invalidate_range((unsigned long)new_skb->head,
642 (unsigned long)new_skb->end);
644 len = (unsigned short)((current_rx_ptr->status.status_word) & RX_FRLEN);
646 blackfin_dcache_invalidate_range((unsigned long)skb->head,
647 (unsigned long)skb->tail);
649 dev->last_rx = jiffies;
651 skb->protocol = eth_type_trans(skb, dev);
652 #if defined(BFIN_MAC_CSUM_OFFLOAD)
653 skb->csum = current_rx_ptr->status.ip_payload_csum;
654 skb->ip_summed = CHECKSUM_COMPLETE;
658 dev->stats.rx_packets++;
659 dev->stats.rx_bytes += len;
660 current_rx_ptr->status.status_word = 0x00000000;
661 current_rx_ptr = current_rx_ptr->next;
667 /* interrupt routine to handle rx and error signal */
668 static irqreturn_t bfin_mac_interrupt(int irq, void *dev_id)
670 struct net_device *dev = dev_id;
674 if (current_rx_ptr->status.status_word == 0) {
675 /* no more new packet received */
677 if (current_rx_ptr->next->status.status_word != 0) {
678 current_rx_ptr = current_rx_ptr->next;
682 bfin_write_DMA1_IRQ_STATUS(bfin_read_DMA1_IRQ_STATUS() |
693 #ifdef CONFIG_NET_POLL_CONTROLLER
694 static void bfin_mac_poll(struct net_device *dev)
696 disable_irq(IRQ_MAC_RX);
697 bfin_mac_interrupt(IRQ_MAC_RX, dev);
698 enable_irq(IRQ_MAC_RX);
700 #endif /* CONFIG_NET_POLL_CONTROLLER */
702 static void bfin_mac_disable(void)
706 opmode = bfin_read_EMAC_OPMODE();
709 /* Turn off the EMAC */
710 bfin_write_EMAC_OPMODE(opmode);
714 * Enable Interrupts, Receive, and Transmit
716 static void bfin_mac_enable(void)
720 pr_debug("%s: %s\n", DRV_NAME, __FUNCTION__);
723 bfin_write_DMA1_NEXT_DESC_PTR(&(rx_list_head->desc_a));
724 bfin_write_DMA1_CONFIG(rx_list_head->desc_a.config);
729 /* We enable only RX here */
730 /* ASTP : Enable Automatic Pad Stripping
731 PR : Promiscuous Mode for test
732 PSF : Receive frames with total length less than 64 bytes.
733 FDMODE : Full Duplex Mode
734 LB : Internal Loopback for test
735 RE : Receiver Enable */
736 opmode = bfin_read_EMAC_OPMODE();
740 opmode |= DRO | DC | PSF;
743 #if defined(CONFIG_BFIN_MAC_RMII)
744 opmode |= RMII; /* For Now only 100MBit are supported */
745 #if (defined(CONFIG_BF537) || defined(CONFIG_BF536)) && CONFIG_BF_REV_0_2
749 /* Turn on the EMAC rx */
750 bfin_write_EMAC_OPMODE(opmode);
753 /* Our watchdog timed out. Called by the networking layer */
754 static void bfin_mac_timeout(struct net_device *dev)
756 pr_debug("%s: %s\n", dev->name, __FUNCTION__);
761 tx_list_tail = tx_list_head->next;
765 /* We can accept TX packets again */
766 dev->trans_start = jiffies;
767 netif_wake_queue(dev);
770 static void bfin_mac_multicast_hash(struct net_device *dev)
772 u32 emac_hashhi, emac_hashlo;
773 struct dev_mc_list *dmi = dev->mc_list;
778 emac_hashhi = emac_hashlo = 0;
780 for (i = 0; i < dev->mc_count; i++) {
781 addrs = dmi->dmi_addr;
784 /* skip non-multicast addresses */
788 crc = ether_crc(ETH_ALEN, addrs);
792 emac_hashhi |= 1 << (crc & 0x1f);
794 emac_hashlo |= 1 << (crc & 0x1f);
797 bfin_write_EMAC_HASHHI(emac_hashhi);
798 bfin_write_EMAC_HASHLO(emac_hashlo);
804 * This routine will, depending on the values passed to it,
805 * either make it accept multicast packets, go into
806 * promiscuous mode (for TCPDUMP and cousins) or accept
807 * a select set of multicast packets
809 static void bfin_mac_set_multicast_list(struct net_device *dev)
813 if (dev->flags & IFF_PROMISC) {
814 printk(KERN_INFO "%s: set to promisc mode\n", dev->name);
815 sysctl = bfin_read_EMAC_OPMODE();
817 bfin_write_EMAC_OPMODE(sysctl);
818 } else if (dev->flags & IFF_ALLMULTI) {
819 /* accept all multicast */
820 sysctl = bfin_read_EMAC_OPMODE();
822 bfin_write_EMAC_OPMODE(sysctl);
823 } else if (dev->mc_count) {
824 /* set up multicast hash table */
825 sysctl = bfin_read_EMAC_OPMODE();
827 bfin_write_EMAC_OPMODE(sysctl);
828 bfin_mac_multicast_hash(dev);
830 /* clear promisc or multicast mode */
831 sysctl = bfin_read_EMAC_OPMODE();
832 sysctl &= ~(RAF | PAM);
833 bfin_write_EMAC_OPMODE(sysctl);
838 * this puts the device in an inactive state
840 static void bfin_mac_shutdown(struct net_device *dev)
842 /* Turn off the EMAC */
843 bfin_write_EMAC_OPMODE(0x00000000);
844 /* Turn off the EMAC RX DMA */
845 bfin_write_DMA1_CONFIG(0x0000);
846 bfin_write_DMA2_CONFIG(0x0000);
850 * Open and Initialize the interface
852 * Set up everything, reset the card, etc..
854 static int bfin_mac_open(struct net_device *dev)
856 struct bfin_mac_local *lp = netdev_priv(dev);
858 pr_debug("%s: %s\n", dev->name, __FUNCTION__);
861 * Check that the address is valid. If its not, refuse
862 * to bring the device up. The user must specify an
863 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
865 if (!is_valid_ether_addr(dev->dev_addr)) {
866 printk(KERN_WARNING DRV_NAME ": no valid ethernet hw addr\n");
870 /* initial rx and tx list */
871 retval = desc_list_init();
876 phy_start(lp->phydev);
877 phy_write(lp->phydev, MII_BMCR, BMCR_RESET);
878 setup_system_regs(dev);
881 pr_debug("hardware init finished\n");
882 netif_start_queue(dev);
883 netif_carrier_on(dev);
890 * this makes the board clean up everything that it can
891 * and not talk to the outside world. Caused by
892 * an 'ifconfig ethX down'
894 static int bfin_mac_close(struct net_device *dev)
896 struct bfin_mac_local *lp = netdev_priv(dev);
897 pr_debug("%s: %s\n", dev->name, __FUNCTION__);
899 netif_stop_queue(dev);
900 netif_carrier_off(dev);
902 phy_stop(lp->phydev);
903 phy_write(lp->phydev, MII_BMCR, BMCR_PDOWN);
905 /* clear everything */
906 bfin_mac_shutdown(dev);
908 /* free the rx/tx buffers */
914 static int __init bfin_mac_probe(struct platform_device *pdev)
916 struct net_device *ndev;
917 struct bfin_mac_local *lp;
920 ndev = alloc_etherdev(sizeof(struct bfin_mac_local));
922 dev_err(&pdev->dev, "Cannot allocate net device!\n");
926 SET_NETDEV_DEV(ndev, &pdev->dev);
927 platform_set_drvdata(pdev, ndev);
928 lp = netdev_priv(ndev);
930 /* Grab the MAC address in the MAC */
931 *(__le32 *) (&(ndev->dev_addr[0])) = cpu_to_le32(bfin_read_EMAC_ADDRLO());
932 *(__le16 *) (&(ndev->dev_addr[4])) = cpu_to_le16((u16) bfin_read_EMAC_ADDRHI());
935 /*todo: how to proble? which is revision_register */
936 bfin_write_EMAC_ADDRLO(0x12345678);
937 if (bfin_read_EMAC_ADDRLO() != 0x12345678) {
938 dev_err(&pdev->dev, "Cannot detect Blackfin on-chip ethernet MAC controller!\n");
940 goto out_err_probe_mac;
943 /* set the GPIO pins to Ethernet mode */
944 rc = peripheral_request_list(pin_req, DRV_NAME);
946 dev_err(&pdev->dev, "Requesting peripherals failed!\n");
948 goto out_err_setup_pin_mux;
952 * Is it valid? (Did bootloader initialize it?)
953 * Grab the MAC from the board somehow
954 * this is done in the arch/blackfin/mach-bfxxx/boards/eth_mac.c
956 if (!is_valid_ether_addr(ndev->dev_addr))
957 bfin_get_ether_addr(ndev->dev_addr);
959 /* If still not valid, get a random one */
960 if (!is_valid_ether_addr(ndev->dev_addr))
961 random_ether_addr(ndev->dev_addr);
963 setup_mac_addr(ndev->dev_addr);
965 /* MDIO bus initial */
966 lp->mii_bus.priv = ndev;
967 lp->mii_bus.read = mdiobus_read;
968 lp->mii_bus.write = mdiobus_write;
969 lp->mii_bus.reset = mdiobus_reset;
970 lp->mii_bus.name = "bfin_mac_mdio";
971 snprintf(lp->mii_bus.id, MII_BUS_ID_SIZE, "0");
972 lp->mii_bus.irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
973 for (i = 0; i < PHY_MAX_ADDR; ++i)
974 lp->mii_bus.irq[i] = PHY_POLL;
976 rc = mdiobus_register(&lp->mii_bus);
978 dev_err(&pdev->dev, "Cannot register MDIO bus!\n");
979 goto out_err_mdiobus_register;
982 rc = mii_probe(ndev);
984 dev_err(&pdev->dev, "MII Probe failed!\n");
985 goto out_err_mii_probe;
988 /* Fill in the fields of the device structure with ethernet values. */
991 ndev->open = bfin_mac_open;
992 ndev->stop = bfin_mac_close;
993 ndev->hard_start_xmit = bfin_mac_hard_start_xmit;
994 ndev->set_mac_address = bfin_mac_set_mac_address;
995 ndev->tx_timeout = bfin_mac_timeout;
996 ndev->set_multicast_list = bfin_mac_set_multicast_list;
997 #ifdef CONFIG_NET_POLL_CONTROLLER
998 ndev->poll_controller = bfin_mac_poll;
1001 spin_lock_init(&lp->lock);
1003 /* now, enable interrupts */
1004 /* register irq handler */
1005 rc = request_irq(IRQ_MAC_RX, bfin_mac_interrupt,
1006 IRQF_DISABLED | IRQF_SHARED, "EMAC_RX", ndev);
1008 dev_err(&pdev->dev, "Cannot request Blackfin MAC RX IRQ!\n");
1010 goto out_err_request_irq;
1013 rc = register_netdev(ndev);
1015 dev_err(&pdev->dev, "Cannot register net device!\n");
1016 goto out_err_reg_ndev;
1019 /* now, print out the card info, in a short format.. */
1020 dev_info(&pdev->dev, "%s, Version %s\n", DRV_DESC, DRV_VERSION);
1025 free_irq(IRQ_MAC_RX, ndev);
1026 out_err_request_irq:
1028 mdiobus_unregister(&lp->mii_bus);
1029 out_err_mdiobus_register:
1030 peripheral_free_list(pin_req);
1031 out_err_setup_pin_mux:
1033 platform_set_drvdata(pdev, NULL);
1039 static int bfin_mac_remove(struct platform_device *pdev)
1041 struct net_device *ndev = platform_get_drvdata(pdev);
1042 struct bfin_mac_local *lp = netdev_priv(ndev);
1044 platform_set_drvdata(pdev, NULL);
1046 mdiobus_unregister(&lp->mii_bus);
1048 unregister_netdev(ndev);
1050 free_irq(IRQ_MAC_RX, ndev);
1054 peripheral_free_list(pin_req);
1060 static int bfin_mac_suspend(struct platform_device *pdev, pm_message_t mesg)
1062 struct net_device *net_dev = platform_get_drvdata(pdev);
1064 if (netif_running(net_dev))
1065 bfin_mac_close(net_dev);
1070 static int bfin_mac_resume(struct platform_device *pdev)
1072 struct net_device *net_dev = platform_get_drvdata(pdev);
1074 if (netif_running(net_dev))
1075 bfin_mac_open(net_dev);
1080 #define bfin_mac_suspend NULL
1081 #define bfin_mac_resume NULL
1082 #endif /* CONFIG_PM */
1084 static struct platform_driver bfin_mac_driver = {
1085 .probe = bfin_mac_probe,
1086 .remove = bfin_mac_remove,
1087 .resume = bfin_mac_resume,
1088 .suspend = bfin_mac_suspend,
1091 .owner = THIS_MODULE,
1095 static int __init bfin_mac_init(void)
1097 return platform_driver_register(&bfin_mac_driver);
1100 module_init(bfin_mac_init);
1102 static void __exit bfin_mac_cleanup(void)
1104 platform_driver_unregister(&bfin_mac_driver);
1107 module_exit(bfin_mac_cleanup);