2 * Copyright (C) 2005 - 2009 ServerEngines
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
10 * Contact Information:
11 * linux-drivers@serverengines.com
14 * 209 N. Fair Oaks Ave
20 #include <asm/div64.h>
22 MODULE_VERSION(DRV_VER);
23 MODULE_DEVICE_TABLE(pci, be_dev_ids);
24 MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
25 MODULE_AUTHOR("ServerEngines Corporation");
26 MODULE_LICENSE("GPL");
28 static unsigned int rx_frag_size = 2048;
29 module_param(rx_frag_size, uint, S_IRUGO);
30 MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
32 static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
33 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
34 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
35 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
36 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
39 MODULE_DEVICE_TABLE(pci, be_dev_ids);
41 static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
43 struct be_dma_mem *mem = &q->dma_mem;
45 pci_free_consistent(adapter->pdev, mem->size,
49 static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
50 u16 len, u16 entry_size)
52 struct be_dma_mem *mem = &q->dma_mem;
54 memset(q, 0, sizeof(*q));
56 q->entry_size = entry_size;
57 mem->size = len * entry_size;
58 mem->va = pci_alloc_consistent(adapter->pdev, mem->size, &mem->dma);
61 memset(mem->va, 0, mem->size);
65 static void be_intr_set(struct be_adapter *adapter, bool enable)
67 u8 __iomem *addr = adapter->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
68 u32 reg = ioread32(addr);
69 u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
74 if (!enabled && enable)
75 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
76 else if (enabled && !enable)
77 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
84 static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
87 val |= qid & DB_RQ_RING_ID_MASK;
88 val |= posted << DB_RQ_NUM_POSTED_SHIFT;
89 iowrite32(val, adapter->db + DB_RQ_OFFSET);
92 static void be_txq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
95 val |= qid & DB_TXULP_RING_ID_MASK;
96 val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
97 iowrite32(val, adapter->db + DB_TXULP1_OFFSET);
100 static void be_eq_notify(struct be_adapter *adapter, u16 qid,
101 bool arm, bool clear_int, u16 num_popped)
104 val |= qid & DB_EQ_RING_ID_MASK;
106 if (adapter->eeh_err)
110 val |= 1 << DB_EQ_REARM_SHIFT;
112 val |= 1 << DB_EQ_CLR_SHIFT;
113 val |= 1 << DB_EQ_EVNT_SHIFT;
114 val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
115 iowrite32(val, adapter->db + DB_EQ_OFFSET);
118 void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped)
121 val |= qid & DB_CQ_RING_ID_MASK;
123 if (adapter->eeh_err)
127 val |= 1 << DB_CQ_REARM_SHIFT;
128 val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
129 iowrite32(val, adapter->db + DB_CQ_OFFSET);
132 static int be_mac_addr_set(struct net_device *netdev, void *p)
134 struct be_adapter *adapter = netdev_priv(netdev);
135 struct sockaddr *addr = p;
138 if (!is_valid_ether_addr(addr->sa_data))
139 return -EADDRNOTAVAIL;
141 status = be_cmd_pmac_del(adapter, adapter->if_handle, adapter->pmac_id);
145 status = be_cmd_pmac_add(adapter, (u8 *)addr->sa_data,
146 adapter->if_handle, &adapter->pmac_id);
148 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
153 void netdev_stats_update(struct be_adapter *adapter)
155 struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va);
156 struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
157 struct be_port_rxf_stats *port_stats =
158 &rxf_stats->port[adapter->port_num];
159 struct net_device_stats *dev_stats = &adapter->netdev->stats;
160 struct be_erx_stats *erx_stats = &hw_stats->erx;
162 dev_stats->rx_packets = port_stats->rx_total_frames;
163 dev_stats->tx_packets = port_stats->tx_unicastframes +
164 port_stats->tx_multicastframes + port_stats->tx_broadcastframes;
165 dev_stats->rx_bytes = (u64) port_stats->rx_bytes_msd << 32 |
166 (u64) port_stats->rx_bytes_lsd;
167 dev_stats->tx_bytes = (u64) port_stats->tx_bytes_msd << 32 |
168 (u64) port_stats->tx_bytes_lsd;
170 /* bad pkts received */
171 dev_stats->rx_errors = port_stats->rx_crc_errors +
172 port_stats->rx_alignment_symbol_errors +
173 port_stats->rx_in_range_errors +
174 port_stats->rx_out_range_errors +
175 port_stats->rx_frame_too_long +
176 port_stats->rx_dropped_too_small +
177 port_stats->rx_dropped_too_short +
178 port_stats->rx_dropped_header_too_small +
179 port_stats->rx_dropped_tcp_length +
180 port_stats->rx_dropped_runt +
181 port_stats->rx_tcp_checksum_errs +
182 port_stats->rx_ip_checksum_errs +
183 port_stats->rx_udp_checksum_errs;
185 /* no space in linux buffers: best possible approximation */
186 dev_stats->rx_dropped =
187 erx_stats->rx_drops_no_fragments[adapter->rx_obj.q.id];
189 /* detailed rx errors */
190 dev_stats->rx_length_errors = port_stats->rx_in_range_errors +
191 port_stats->rx_out_range_errors +
192 port_stats->rx_frame_too_long;
194 /* receive ring buffer overflow */
195 dev_stats->rx_over_errors = 0;
197 dev_stats->rx_crc_errors = port_stats->rx_crc_errors;
199 /* frame alignment errors */
200 dev_stats->rx_frame_errors = port_stats->rx_alignment_symbol_errors;
202 /* receiver fifo overrun */
203 /* drops_no_pbuf is no per i/f, it's per BE card */
204 dev_stats->rx_fifo_errors = port_stats->rx_fifo_overflow +
205 port_stats->rx_input_fifo_overflow +
206 rxf_stats->rx_drops_no_pbuf;
207 /* receiver missed packetd */
208 dev_stats->rx_missed_errors = 0;
210 /* packet transmit problems */
211 dev_stats->tx_errors = 0;
213 /* no space available in linux */
214 dev_stats->tx_dropped = 0;
216 dev_stats->multicast = port_stats->rx_multicast_frames;
217 dev_stats->collisions = 0;
219 /* detailed tx_errors */
220 dev_stats->tx_aborted_errors = 0;
221 dev_stats->tx_carrier_errors = 0;
222 dev_stats->tx_fifo_errors = 0;
223 dev_stats->tx_heartbeat_errors = 0;
224 dev_stats->tx_window_errors = 0;
227 void be_link_status_update(struct be_adapter *adapter, bool link_up)
229 struct net_device *netdev = adapter->netdev;
231 /* If link came up or went down */
232 if (adapter->link_up != link_up) {
233 adapter->link_speed = -1;
235 netif_start_queue(netdev);
236 netif_carrier_on(netdev);
237 printk(KERN_INFO "%s: Link up\n", netdev->name);
239 netif_stop_queue(netdev);
240 netif_carrier_off(netdev);
241 printk(KERN_INFO "%s: Link down\n", netdev->name);
243 adapter->link_up = link_up;
247 /* Update the EQ delay n BE based on the RX frags consumed / sec */
248 static void be_rx_eqd_update(struct be_adapter *adapter)
250 struct be_eq_obj *rx_eq = &adapter->rx_eq;
251 struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
255 if (!rx_eq->enable_aic)
259 if (time_before(now, stats->rx_fps_jiffies)) {
260 stats->rx_fps_jiffies = now;
264 /* Update once a second */
265 if ((now - stats->rx_fps_jiffies) < HZ)
268 stats->be_rx_fps = (stats->be_rx_frags - stats->be_prev_rx_frags) /
269 ((now - stats->rx_fps_jiffies) / HZ);
271 stats->rx_fps_jiffies = now;
272 stats->be_prev_rx_frags = stats->be_rx_frags;
273 eqd = stats->be_rx_fps / 110000;
275 if (eqd > rx_eq->max_eqd)
276 eqd = rx_eq->max_eqd;
277 if (eqd < rx_eq->min_eqd)
278 eqd = rx_eq->min_eqd;
281 if (eqd != rx_eq->cur_eqd)
282 be_cmd_modify_eqd(adapter, rx_eq->q.id, eqd);
284 rx_eq->cur_eqd = eqd;
287 static struct net_device_stats *be_get_stats(struct net_device *dev)
292 static u32 be_calc_rate(u64 bytes, unsigned long ticks)
296 do_div(rate, ticks / HZ);
297 rate <<= 3; /* bytes/sec -> bits/sec */
298 do_div(rate, 1000000ul); /* MB/Sec */
303 static void be_tx_rate_update(struct be_adapter *adapter)
305 struct be_drvr_stats *stats = drvr_stats(adapter);
308 /* Wrapped around? */
309 if (time_before(now, stats->be_tx_jiffies)) {
310 stats->be_tx_jiffies = now;
314 /* Update tx rate once in two seconds */
315 if ((now - stats->be_tx_jiffies) > 2 * HZ) {
316 stats->be_tx_rate = be_calc_rate(stats->be_tx_bytes
317 - stats->be_tx_bytes_prev,
318 now - stats->be_tx_jiffies);
319 stats->be_tx_jiffies = now;
320 stats->be_tx_bytes_prev = stats->be_tx_bytes;
324 static void be_tx_stats_update(struct be_adapter *adapter,
325 u32 wrb_cnt, u32 copied, bool stopped)
327 struct be_drvr_stats *stats = drvr_stats(adapter);
329 stats->be_tx_wrbs += wrb_cnt;
330 stats->be_tx_bytes += copied;
332 stats->be_tx_stops++;
335 /* Determine number of WRB entries needed to xmit data in an skb */
336 static u32 wrb_cnt_for_skb(struct sk_buff *skb, bool *dummy)
338 int cnt = (skb->len > skb->data_len);
340 cnt += skb_shinfo(skb)->nr_frags;
342 /* to account for hdr wrb */
345 /* add a dummy to make it an even num */
350 BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
354 static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
356 wrb->frag_pa_hi = upper_32_bits(addr);
357 wrb->frag_pa_lo = addr & 0xFFFFFFFF;
358 wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
361 static void wrb_fill_hdr(struct be_eth_hdr_wrb *hdr, struct sk_buff *skb,
362 bool vlan, u32 wrb_cnt, u32 len)
364 memset(hdr, 0, sizeof(*hdr));
366 AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
368 if (skb_shinfo(skb)->gso_segs > 1 && skb_shinfo(skb)->gso_size) {
369 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
370 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
371 hdr, skb_shinfo(skb)->gso_size);
372 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
374 AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
375 else if (is_udp_pkt(skb))
376 AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
379 if (vlan && vlan_tx_tag_present(skb)) {
380 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
381 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag,
382 hdr, vlan_tx_tag_get(skb));
385 AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
386 AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
387 AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
388 AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
392 static int make_tx_wrbs(struct be_adapter *adapter,
393 struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
397 struct pci_dev *pdev = adapter->pdev;
398 struct sk_buff *first_skb = skb;
399 struct be_queue_info *txq = &adapter->tx_obj.q;
400 struct be_eth_wrb *wrb;
401 struct be_eth_hdr_wrb *hdr;
403 hdr = queue_head_node(txq);
404 atomic_add(wrb_cnt, &txq->used);
407 if (skb->len > skb->data_len) {
408 int len = skb->len - skb->data_len;
409 busaddr = pci_map_single(pdev, skb->data, len,
411 wrb = queue_head_node(txq);
412 wrb_fill(wrb, busaddr, len);
413 be_dws_cpu_to_le(wrb, sizeof(*wrb));
418 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
419 struct skb_frag_struct *frag =
420 &skb_shinfo(skb)->frags[i];
421 busaddr = pci_map_page(pdev, frag->page,
423 frag->size, PCI_DMA_TODEVICE);
424 wrb = queue_head_node(txq);
425 wrb_fill(wrb, busaddr, frag->size);
426 be_dws_cpu_to_le(wrb, sizeof(*wrb));
428 copied += frag->size;
432 wrb = queue_head_node(txq);
434 be_dws_cpu_to_le(wrb, sizeof(*wrb));
438 wrb_fill_hdr(hdr, first_skb, adapter->vlan_grp ? true : false,
440 be_dws_cpu_to_le(hdr, sizeof(*hdr));
445 static netdev_tx_t be_xmit(struct sk_buff *skb,
446 struct net_device *netdev)
448 struct be_adapter *adapter = netdev_priv(netdev);
449 struct be_tx_obj *tx_obj = &adapter->tx_obj;
450 struct be_queue_info *txq = &tx_obj->q;
451 u32 wrb_cnt = 0, copied = 0;
452 u32 start = txq->head;
453 bool dummy_wrb, stopped = false;
455 wrb_cnt = wrb_cnt_for_skb(skb, &dummy_wrb);
457 copied = make_tx_wrbs(adapter, skb, wrb_cnt, dummy_wrb);
459 /* record the sent skb in the sent_skb table */
460 BUG_ON(tx_obj->sent_skb_list[start]);
461 tx_obj->sent_skb_list[start] = skb;
463 /* Ensure txq has space for the next skb; Else stop the queue
464 * *BEFORE* ringing the tx doorbell, so that we serialze the
465 * tx compls of the current transmit which'll wake up the queue
467 if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >=
469 netif_stop_queue(netdev);
473 be_txq_notify(adapter, txq->id, wrb_cnt);
475 be_tx_stats_update(adapter, wrb_cnt, copied, stopped);
478 dev_kfree_skb_any(skb);
483 static int be_change_mtu(struct net_device *netdev, int new_mtu)
485 struct be_adapter *adapter = netdev_priv(netdev);
486 if (new_mtu < BE_MIN_MTU ||
487 new_mtu > (BE_MAX_JUMBO_FRAME_SIZE -
488 (ETH_HLEN + ETH_FCS_LEN))) {
489 dev_info(&adapter->pdev->dev,
490 "MTU must be between %d and %d bytes\n",
492 (BE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN)));
495 dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
496 netdev->mtu, new_mtu);
497 netdev->mtu = new_mtu;
502 * A max of 64 (BE_NUM_VLANS_SUPPORTED) vlans can be configured in BE.
503 * If the user configures more, place BE in vlan promiscuous mode.
505 static int be_vid_config(struct be_adapter *adapter)
507 u16 vtag[BE_NUM_VLANS_SUPPORTED];
511 if (adapter->vlans_added <= adapter->max_vlans) {
512 /* Construct VLAN Table to give to HW */
513 for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
514 if (adapter->vlan_tag[i]) {
515 vtag[ntags] = cpu_to_le16(i);
519 status = be_cmd_vlan_config(adapter, adapter->if_handle,
522 status = be_cmd_vlan_config(adapter, adapter->if_handle,
528 static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp)
530 struct be_adapter *adapter = netdev_priv(netdev);
531 struct be_eq_obj *rx_eq = &adapter->rx_eq;
532 struct be_eq_obj *tx_eq = &adapter->tx_eq;
534 be_eq_notify(adapter, rx_eq->q.id, false, false, 0);
535 be_eq_notify(adapter, tx_eq->q.id, false, false, 0);
536 adapter->vlan_grp = grp;
537 be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
538 be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
541 static void be_vlan_add_vid(struct net_device *netdev, u16 vid)
543 struct be_adapter *adapter = netdev_priv(netdev);
545 adapter->vlan_tag[vid] = 1;
546 adapter->vlans_added++;
547 if (adapter->vlans_added <= (adapter->max_vlans + 1))
548 be_vid_config(adapter);
551 static void be_vlan_rem_vid(struct net_device *netdev, u16 vid)
553 struct be_adapter *adapter = netdev_priv(netdev);
555 adapter->vlan_tag[vid] = 0;
556 vlan_group_set_device(adapter->vlan_grp, vid, NULL);
557 adapter->vlans_added--;
558 if (adapter->vlans_added <= adapter->max_vlans)
559 be_vid_config(adapter);
562 static void be_set_multicast_list(struct net_device *netdev)
564 struct be_adapter *adapter = netdev_priv(netdev);
566 if (netdev->flags & IFF_PROMISC) {
567 be_cmd_promiscuous_config(adapter, adapter->port_num, 1);
568 adapter->promiscuous = true;
572 /* BE was previously in promiscous mode; disable it */
573 if (adapter->promiscuous) {
574 adapter->promiscuous = false;
575 be_cmd_promiscuous_config(adapter, adapter->port_num, 0);
578 /* Enable multicast promisc if num configured exceeds what we support */
579 if (netdev->flags & IFF_ALLMULTI ||
580 netdev_mc_count(netdev) > BE_MAX_MC) {
581 be_cmd_multicast_set(adapter, adapter->if_handle, NULL, 0,
582 &adapter->mc_cmd_mem);
586 be_cmd_multicast_set(adapter, adapter->if_handle, netdev->mc_list,
587 netdev_mc_count(netdev), &adapter->mc_cmd_mem);
592 static void be_rx_rate_update(struct be_adapter *adapter)
594 struct be_drvr_stats *stats = drvr_stats(adapter);
598 if (time_before(now, stats->be_rx_jiffies)) {
599 stats->be_rx_jiffies = now;
603 /* Update the rate once in two seconds */
604 if ((now - stats->be_rx_jiffies) < 2 * HZ)
607 stats->be_rx_rate = be_calc_rate(stats->be_rx_bytes
608 - stats->be_rx_bytes_prev,
609 now - stats->be_rx_jiffies);
610 stats->be_rx_jiffies = now;
611 stats->be_rx_bytes_prev = stats->be_rx_bytes;
614 static void be_rx_stats_update(struct be_adapter *adapter,
615 u32 pktsize, u16 numfrags)
617 struct be_drvr_stats *stats = drvr_stats(adapter);
619 stats->be_rx_compl++;
620 stats->be_rx_frags += numfrags;
621 stats->be_rx_bytes += pktsize;
624 static inline bool do_pkt_csum(struct be_eth_rx_compl *rxcp, bool cso)
626 u8 l4_cksm, ip_version, ipcksm, tcpf = 0, udpf = 0, ipv6_chk;
628 l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp);
629 ipcksm = AMAP_GET_BITS(struct amap_eth_rx_compl, ipcksm, rxcp);
630 ip_version = AMAP_GET_BITS(struct amap_eth_rx_compl, ip_version, rxcp);
632 tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
633 udpf = AMAP_GET_BITS(struct amap_eth_rx_compl, udpf, rxcp);
635 ipv6_chk = (ip_version && (tcpf || udpf));
637 return ((l4_cksm && ipv6_chk && ipcksm) && cso) ? false : true;
640 static struct be_rx_page_info *
641 get_rx_page_info(struct be_adapter *adapter, u16 frag_idx)
643 struct be_rx_page_info *rx_page_info;
644 struct be_queue_info *rxq = &adapter->rx_obj.q;
646 rx_page_info = &adapter->rx_obj.page_info_tbl[frag_idx];
647 BUG_ON(!rx_page_info->page);
649 if (rx_page_info->last_page_user) {
650 pci_unmap_page(adapter->pdev, pci_unmap_addr(rx_page_info, bus),
651 adapter->big_page_size, PCI_DMA_FROMDEVICE);
652 rx_page_info->last_page_user = false;
655 atomic_dec(&rxq->used);
659 /* Throwaway the data in the Rx completion */
660 static void be_rx_compl_discard(struct be_adapter *adapter,
661 struct be_eth_rx_compl *rxcp)
663 struct be_queue_info *rxq = &adapter->rx_obj.q;
664 struct be_rx_page_info *page_info;
665 u16 rxq_idx, i, num_rcvd;
667 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
668 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
670 for (i = 0; i < num_rcvd; i++) {
671 page_info = get_rx_page_info(adapter, rxq_idx);
672 put_page(page_info->page);
673 memset(page_info, 0, sizeof(*page_info));
674 index_inc(&rxq_idx, rxq->len);
679 * skb_fill_rx_data forms a complete skb for an ether frame
682 static void skb_fill_rx_data(struct be_adapter *adapter,
683 struct sk_buff *skb, struct be_eth_rx_compl *rxcp,
686 struct be_queue_info *rxq = &adapter->rx_obj.q;
687 struct be_rx_page_info *page_info;
689 u32 pktsize, hdr_len, curr_frag_len, size;
692 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
693 pktsize = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
695 page_info = get_rx_page_info(adapter, rxq_idx);
697 start = page_address(page_info->page) + page_info->page_offset;
700 /* Copy data in the first descriptor of this completion */
701 curr_frag_len = min(pktsize, rx_frag_size);
703 /* Copy the header portion into skb_data */
704 hdr_len = min((u32)BE_HDR_LEN, curr_frag_len);
705 memcpy(skb->data, start, hdr_len);
706 skb->len = curr_frag_len;
707 if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
708 /* Complete packet has now been moved to data */
709 put_page(page_info->page);
711 skb->tail += curr_frag_len;
713 skb_shinfo(skb)->nr_frags = 1;
714 skb_shinfo(skb)->frags[0].page = page_info->page;
715 skb_shinfo(skb)->frags[0].page_offset =
716 page_info->page_offset + hdr_len;
717 skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len;
718 skb->data_len = curr_frag_len - hdr_len;
719 skb->tail += hdr_len;
721 page_info->page = NULL;
723 if (pktsize <= rx_frag_size) {
724 BUG_ON(num_rcvd != 1);
728 /* More frags present for this completion */
730 for (i = 1, j = 0; i < num_rcvd; i++) {
731 size -= curr_frag_len;
732 index_inc(&rxq_idx, rxq->len);
733 page_info = get_rx_page_info(adapter, rxq_idx);
735 curr_frag_len = min(size, rx_frag_size);
737 /* Coalesce all frags from the same physical page in one slot */
738 if (page_info->page_offset == 0) {
741 skb_shinfo(skb)->frags[j].page = page_info->page;
742 skb_shinfo(skb)->frags[j].page_offset =
743 page_info->page_offset;
744 skb_shinfo(skb)->frags[j].size = 0;
745 skb_shinfo(skb)->nr_frags++;
747 put_page(page_info->page);
750 skb_shinfo(skb)->frags[j].size += curr_frag_len;
751 skb->len += curr_frag_len;
752 skb->data_len += curr_frag_len;
754 page_info->page = NULL;
756 BUG_ON(j > MAX_SKB_FRAGS);
759 be_rx_stats_update(adapter, pktsize, num_rcvd);
763 /* Process the RX completion indicated by rxcp when GRO is disabled */
764 static void be_rx_compl_process(struct be_adapter *adapter,
765 struct be_eth_rx_compl *rxcp)
772 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
773 /* Is it a flush compl that has no data */
774 if (unlikely(num_rcvd == 0))
777 skb = netdev_alloc_skb_ip_align(adapter->netdev, BE_HDR_LEN);
778 if (unlikely(!skb)) {
780 dev_warn(&adapter->pdev->dev, "skb alloc failed\n");
781 be_rx_compl_discard(adapter, rxcp);
785 skb_fill_rx_data(adapter, skb, rxcp, num_rcvd);
787 if (do_pkt_csum(rxcp, adapter->rx_csum))
788 skb->ip_summed = CHECKSUM_NONE;
790 skb->ip_summed = CHECKSUM_UNNECESSARY;
792 skb->truesize = skb->len + sizeof(struct sk_buff);
793 skb->protocol = eth_type_trans(skb, adapter->netdev);
794 skb->dev = adapter->netdev;
796 vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
797 vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
799 /* vlanf could be wrongly set in some cards.
800 * ignore if vtm is not set */
801 if ((adapter->cap & 0x400) && !vtm)
804 if (unlikely(vlanf)) {
805 if (!adapter->vlan_grp || adapter->vlans_added == 0) {
809 vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
810 vid = be16_to_cpu(vid);
811 vlan_hwaccel_receive_skb(skb, adapter->vlan_grp, vid);
813 netif_receive_skb(skb);
819 /* Process the RX completion indicated by rxcp when GRO is enabled */
820 static void be_rx_compl_process_gro(struct be_adapter *adapter,
821 struct be_eth_rx_compl *rxcp)
823 struct be_rx_page_info *page_info;
824 struct sk_buff *skb = NULL;
825 struct be_queue_info *rxq = &adapter->rx_obj.q;
826 struct be_eq_obj *eq_obj = &adapter->rx_eq;
827 u32 num_rcvd, pkt_size, remaining, vlanf, curr_frag_len;
828 u16 i, rxq_idx = 0, vid, j;
831 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
832 /* Is it a flush compl that has no data */
833 if (unlikely(num_rcvd == 0))
836 pkt_size = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
837 vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
838 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
839 vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
841 /* vlanf could be wrongly set in some cards.
842 * ignore if vtm is not set */
843 if ((adapter->cap & 0x400) && !vtm)
846 skb = napi_get_frags(&eq_obj->napi);
848 be_rx_compl_discard(adapter, rxcp);
852 remaining = pkt_size;
853 for (i = 0, j = -1; i < num_rcvd; i++) {
854 page_info = get_rx_page_info(adapter, rxq_idx);
856 curr_frag_len = min(remaining, rx_frag_size);
858 /* Coalesce all frags from the same physical page in one slot */
859 if (i == 0 || page_info->page_offset == 0) {
860 /* First frag or Fresh page */
862 skb_shinfo(skb)->frags[j].page = page_info->page;
863 skb_shinfo(skb)->frags[j].page_offset =
864 page_info->page_offset;
865 skb_shinfo(skb)->frags[j].size = 0;
867 put_page(page_info->page);
869 skb_shinfo(skb)->frags[j].size += curr_frag_len;
871 remaining -= curr_frag_len;
872 index_inc(&rxq_idx, rxq->len);
873 memset(page_info, 0, sizeof(*page_info));
875 BUG_ON(j > MAX_SKB_FRAGS);
877 skb_shinfo(skb)->nr_frags = j + 1;
879 skb->data_len = pkt_size;
880 skb->truesize += pkt_size;
881 skb->ip_summed = CHECKSUM_UNNECESSARY;
883 if (likely(!vlanf)) {
884 napi_gro_frags(&eq_obj->napi);
886 vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
887 vid = be16_to_cpu(vid);
889 if (!adapter->vlan_grp || adapter->vlans_added == 0)
892 vlan_gro_frags(&eq_obj->napi, adapter->vlan_grp, vid);
895 be_rx_stats_update(adapter, pkt_size, num_rcvd);
899 static struct be_eth_rx_compl *be_rx_compl_get(struct be_adapter *adapter)
901 struct be_eth_rx_compl *rxcp = queue_tail_node(&adapter->rx_obj.cq);
903 if (rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] == 0)
906 be_dws_le_to_cpu(rxcp, sizeof(*rxcp));
908 queue_tail_inc(&adapter->rx_obj.cq);
912 /* To reset the valid bit, we need to reset the whole word as
913 * when walking the queue the valid entries are little-endian
914 * and invalid entries are host endian
916 static inline void be_rx_compl_reset(struct be_eth_rx_compl *rxcp)
918 rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] = 0;
921 static inline struct page *be_alloc_pages(u32 size)
923 gfp_t alloc_flags = GFP_ATOMIC;
924 u32 order = get_order(size);
926 alloc_flags |= __GFP_COMP;
927 return alloc_pages(alloc_flags, order);
931 * Allocate a page, split it to fragments of size rx_frag_size and post as
932 * receive buffers to BE
934 static void be_post_rx_frags(struct be_adapter *adapter)
936 struct be_rx_page_info *page_info_tbl = adapter->rx_obj.page_info_tbl;
937 struct be_rx_page_info *page_info = NULL, *prev_page_info = NULL;
938 struct be_queue_info *rxq = &adapter->rx_obj.q;
939 struct page *pagep = NULL;
940 struct be_eth_rx_d *rxd;
941 u64 page_dmaaddr = 0, frag_dmaaddr;
942 u32 posted, page_offset = 0;
944 page_info = &page_info_tbl[rxq->head];
945 for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
947 pagep = be_alloc_pages(adapter->big_page_size);
948 if (unlikely(!pagep)) {
949 drvr_stats(adapter)->be_ethrx_post_fail++;
952 page_dmaaddr = pci_map_page(adapter->pdev, pagep, 0,
953 adapter->big_page_size,
955 page_info->page_offset = 0;
958 page_info->page_offset = page_offset + rx_frag_size;
960 page_offset = page_info->page_offset;
961 page_info->page = pagep;
962 pci_unmap_addr_set(page_info, bus, page_dmaaddr);
963 frag_dmaaddr = page_dmaaddr + page_info->page_offset;
965 rxd = queue_head_node(rxq);
966 rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
967 rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
969 /* Any space left in the current big page for another frag? */
970 if ((page_offset + rx_frag_size + rx_frag_size) >
971 adapter->big_page_size) {
973 page_info->last_page_user = true;
976 prev_page_info = page_info;
978 page_info = &page_info_tbl[rxq->head];
981 prev_page_info->last_page_user = true;
984 atomic_add(posted, &rxq->used);
985 be_rxq_notify(adapter, rxq->id, posted);
986 } else if (atomic_read(&rxq->used) == 0) {
987 /* Let be_worker replenish when memory is available */
988 adapter->rx_post_starved = true;
994 static struct be_eth_tx_compl *be_tx_compl_get(struct be_queue_info *tx_cq)
996 struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
998 if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
1001 be_dws_le_to_cpu(txcp, sizeof(*txcp));
1003 txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
1005 queue_tail_inc(tx_cq);
1009 static void be_tx_compl_process(struct be_adapter *adapter, u16 last_index)
1011 struct be_queue_info *txq = &adapter->tx_obj.q;
1012 struct be_eth_wrb *wrb;
1013 struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
1014 struct sk_buff *sent_skb;
1016 u16 cur_index, num_wrbs = 0;
1018 cur_index = txq->tail;
1019 sent_skb = sent_skbs[cur_index];
1021 sent_skbs[cur_index] = NULL;
1022 wrb = queue_tail_node(txq);
1023 be_dws_le_to_cpu(wrb, sizeof(*wrb));
1024 busaddr = ((u64)wrb->frag_pa_hi << 32) | (u64)wrb->frag_pa_lo;
1026 pci_unmap_single(adapter->pdev, busaddr,
1027 wrb->frag_len, PCI_DMA_TODEVICE);
1030 queue_tail_inc(txq);
1032 while (cur_index != last_index) {
1033 cur_index = txq->tail;
1034 wrb = queue_tail_node(txq);
1035 be_dws_le_to_cpu(wrb, sizeof(*wrb));
1036 busaddr = ((u64)wrb->frag_pa_hi << 32) | (u64)wrb->frag_pa_lo;
1038 pci_unmap_page(adapter->pdev, busaddr,
1039 wrb->frag_len, PCI_DMA_TODEVICE);
1042 queue_tail_inc(txq);
1045 atomic_sub(num_wrbs, &txq->used);
1047 kfree_skb(sent_skb);
1050 static inline struct be_eq_entry *event_get(struct be_eq_obj *eq_obj)
1052 struct be_eq_entry *eqe = queue_tail_node(&eq_obj->q);
1057 eqe->evt = le32_to_cpu(eqe->evt);
1058 queue_tail_inc(&eq_obj->q);
1062 static int event_handle(struct be_adapter *adapter,
1063 struct be_eq_obj *eq_obj)
1065 struct be_eq_entry *eqe;
1068 while ((eqe = event_get(eq_obj)) != NULL) {
1073 /* Deal with any spurious interrupts that come
1076 be_eq_notify(adapter, eq_obj->q.id, true, true, num);
1078 napi_schedule(&eq_obj->napi);
1083 /* Just read and notify events without processing them.
1084 * Used at the time of destroying event queues */
1085 static void be_eq_clean(struct be_adapter *adapter,
1086 struct be_eq_obj *eq_obj)
1088 struct be_eq_entry *eqe;
1091 while ((eqe = event_get(eq_obj)) != NULL) {
1097 be_eq_notify(adapter, eq_obj->q.id, false, true, num);
1100 static void be_rx_q_clean(struct be_adapter *adapter)
1102 struct be_rx_page_info *page_info;
1103 struct be_queue_info *rxq = &adapter->rx_obj.q;
1104 struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
1105 struct be_eth_rx_compl *rxcp;
1108 /* First cleanup pending rx completions */
1109 while ((rxcp = be_rx_compl_get(adapter)) != NULL) {
1110 be_rx_compl_discard(adapter, rxcp);
1111 be_rx_compl_reset(rxcp);
1112 be_cq_notify(adapter, rx_cq->id, true, 1);
1115 /* Then free posted rx buffer that were not used */
1116 tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
1117 for (; atomic_read(&rxq->used) > 0; index_inc(&tail, rxq->len)) {
1118 page_info = get_rx_page_info(adapter, tail);
1119 put_page(page_info->page);
1120 memset(page_info, 0, sizeof(*page_info));
1122 BUG_ON(atomic_read(&rxq->used));
1125 static void be_tx_compl_clean(struct be_adapter *adapter)
1127 struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
1128 struct be_queue_info *txq = &adapter->tx_obj.q;
1129 struct be_eth_tx_compl *txcp;
1130 u16 end_idx, cmpl = 0, timeo = 0;
1132 /* Wait for a max of 200ms for all the tx-completions to arrive. */
1134 while ((txcp = be_tx_compl_get(tx_cq))) {
1135 end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
1137 be_tx_compl_process(adapter, end_idx);
1141 be_cq_notify(adapter, tx_cq->id, false, cmpl);
1145 if (atomic_read(&txq->used) == 0 || ++timeo > 200)
1151 if (atomic_read(&txq->used))
1152 dev_err(&adapter->pdev->dev, "%d pending tx-completions\n",
1153 atomic_read(&txq->used));
1156 static void be_mcc_queues_destroy(struct be_adapter *adapter)
1158 struct be_queue_info *q;
1160 q = &adapter->mcc_obj.q;
1162 be_cmd_q_destroy(adapter, q, QTYPE_MCCQ);
1163 be_queue_free(adapter, q);
1165 q = &adapter->mcc_obj.cq;
1167 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1168 be_queue_free(adapter, q);
1171 /* Must be called only after TX qs are created as MCC shares TX EQ */
1172 static int be_mcc_queues_create(struct be_adapter *adapter)
1174 struct be_queue_info *q, *cq;
1176 /* Alloc MCC compl queue */
1177 cq = &adapter->mcc_obj.cq;
1178 if (be_queue_alloc(adapter, cq, MCC_CQ_LEN,
1179 sizeof(struct be_mcc_compl)))
1182 /* Ask BE to create MCC compl queue; share TX's eq */
1183 if (be_cmd_cq_create(adapter, cq, &adapter->tx_eq.q, false, true, 0))
1186 /* Alloc MCC queue */
1187 q = &adapter->mcc_obj.q;
1188 if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
1189 goto mcc_cq_destroy;
1191 /* Ask BE to create MCC queue */
1192 if (be_cmd_mccq_create(adapter, q, cq))
1198 be_queue_free(adapter, q);
1200 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
1202 be_queue_free(adapter, cq);
1207 static void be_tx_queues_destroy(struct be_adapter *adapter)
1209 struct be_queue_info *q;
1211 q = &adapter->tx_obj.q;
1213 be_cmd_q_destroy(adapter, q, QTYPE_TXQ);
1214 be_queue_free(adapter, q);
1216 q = &adapter->tx_obj.cq;
1218 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1219 be_queue_free(adapter, q);
1221 /* Clear any residual events */
1222 be_eq_clean(adapter, &adapter->tx_eq);
1224 q = &adapter->tx_eq.q;
1226 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
1227 be_queue_free(adapter, q);
1230 static int be_tx_queues_create(struct be_adapter *adapter)
1232 struct be_queue_info *eq, *q, *cq;
1234 adapter->tx_eq.max_eqd = 0;
1235 adapter->tx_eq.min_eqd = 0;
1236 adapter->tx_eq.cur_eqd = 96;
1237 adapter->tx_eq.enable_aic = false;
1238 /* Alloc Tx Event queue */
1239 eq = &adapter->tx_eq.q;
1240 if (be_queue_alloc(adapter, eq, EVNT_Q_LEN, sizeof(struct be_eq_entry)))
1243 /* Ask BE to create Tx Event queue */
1244 if (be_cmd_eq_create(adapter, eq, adapter->tx_eq.cur_eqd))
1246 /* Alloc TX eth compl queue */
1247 cq = &adapter->tx_obj.cq;
1248 if (be_queue_alloc(adapter, cq, TX_CQ_LEN,
1249 sizeof(struct be_eth_tx_compl)))
1252 /* Ask BE to create Tx eth compl queue */
1253 if (be_cmd_cq_create(adapter, cq, eq, false, false, 3))
1256 /* Alloc TX eth queue */
1257 q = &adapter->tx_obj.q;
1258 if (be_queue_alloc(adapter, q, TX_Q_LEN, sizeof(struct be_eth_wrb)))
1261 /* Ask BE to create Tx eth queue */
1262 if (be_cmd_txq_create(adapter, q, cq))
1267 be_queue_free(adapter, q);
1269 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
1271 be_queue_free(adapter, cq);
1273 be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
1275 be_queue_free(adapter, eq);
1279 static void be_rx_queues_destroy(struct be_adapter *adapter)
1281 struct be_queue_info *q;
1283 q = &adapter->rx_obj.q;
1285 be_cmd_q_destroy(adapter, q, QTYPE_RXQ);
1287 /* After the rxq is invalidated, wait for a grace time
1288 * of 1ms for all dma to end and the flush compl to arrive
1291 be_rx_q_clean(adapter);
1293 be_queue_free(adapter, q);
1295 q = &adapter->rx_obj.cq;
1297 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1298 be_queue_free(adapter, q);
1300 /* Clear any residual events */
1301 be_eq_clean(adapter, &adapter->rx_eq);
1303 q = &adapter->rx_eq.q;
1305 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
1306 be_queue_free(adapter, q);
1309 static int be_rx_queues_create(struct be_adapter *adapter)
1311 struct be_queue_info *eq, *q, *cq;
1314 adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
1315 adapter->rx_eq.max_eqd = BE_MAX_EQD;
1316 adapter->rx_eq.min_eqd = 0;
1317 adapter->rx_eq.cur_eqd = 0;
1318 adapter->rx_eq.enable_aic = true;
1320 /* Alloc Rx Event queue */
1321 eq = &adapter->rx_eq.q;
1322 rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
1323 sizeof(struct be_eq_entry));
1327 /* Ask BE to create Rx Event queue */
1328 rc = be_cmd_eq_create(adapter, eq, adapter->rx_eq.cur_eqd);
1332 /* Alloc RX eth compl queue */
1333 cq = &adapter->rx_obj.cq;
1334 rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
1335 sizeof(struct be_eth_rx_compl));
1339 /* Ask BE to create Rx eth compl queue */
1340 rc = be_cmd_cq_create(adapter, cq, eq, false, false, 3);
1344 /* Alloc RX eth queue */
1345 q = &adapter->rx_obj.q;
1346 rc = be_queue_alloc(adapter, q, RX_Q_LEN, sizeof(struct be_eth_rx_d));
1350 /* Ask BE to create Rx eth queue */
1351 rc = be_cmd_rxq_create(adapter, q, cq->id, rx_frag_size,
1352 BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle, false);
1358 be_queue_free(adapter, q);
1360 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
1362 be_queue_free(adapter, cq);
1364 be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
1366 be_queue_free(adapter, eq);
1370 /* There are 8 evt ids per func. Retruns the evt id's bit number */
1371 static inline int be_evt_bit_get(struct be_adapter *adapter, u32 eq_id)
1373 return eq_id - 8 * be_pci_func(adapter);
1376 static irqreturn_t be_intx(int irq, void *dev)
1378 struct be_adapter *adapter = dev;
1381 isr = ioread32(adapter->csr + CEV_ISR0_OFFSET +
1382 (adapter->tx_eq.q.id/ 8) * CEV_ISR_SIZE);
1386 event_handle(adapter, &adapter->tx_eq);
1387 event_handle(adapter, &adapter->rx_eq);
1392 static irqreturn_t be_msix_rx(int irq, void *dev)
1394 struct be_adapter *adapter = dev;
1396 event_handle(adapter, &adapter->rx_eq);
1401 static irqreturn_t be_msix_tx_mcc(int irq, void *dev)
1403 struct be_adapter *adapter = dev;
1405 event_handle(adapter, &adapter->tx_eq);
1410 static inline bool do_gro(struct be_adapter *adapter,
1411 struct be_eth_rx_compl *rxcp)
1413 int err = AMAP_GET_BITS(struct amap_eth_rx_compl, err, rxcp);
1414 int tcp_frame = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
1417 drvr_stats(adapter)->be_rxcp_err++;
1419 return (tcp_frame && !err) ? true : false;
1422 int be_poll_rx(struct napi_struct *napi, int budget)
1424 struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
1425 struct be_adapter *adapter =
1426 container_of(rx_eq, struct be_adapter, rx_eq);
1427 struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
1428 struct be_eth_rx_compl *rxcp;
1431 adapter->stats.drvr_stats.be_rx_polls++;
1432 for (work_done = 0; work_done < budget; work_done++) {
1433 rxcp = be_rx_compl_get(adapter);
1437 if (do_gro(adapter, rxcp))
1438 be_rx_compl_process_gro(adapter, rxcp);
1440 be_rx_compl_process(adapter, rxcp);
1442 be_rx_compl_reset(rxcp);
1445 /* Refill the queue */
1446 if (atomic_read(&adapter->rx_obj.q.used) < RX_FRAGS_REFILL_WM)
1447 be_post_rx_frags(adapter);
1450 if (work_done < budget) {
1451 napi_complete(napi);
1452 be_cq_notify(adapter, rx_cq->id, true, work_done);
1454 /* More to be consumed; continue with interrupts disabled */
1455 be_cq_notify(adapter, rx_cq->id, false, work_done);
1460 void be_process_tx(struct be_adapter *adapter)
1462 struct be_queue_info *txq = &adapter->tx_obj.q;
1463 struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
1464 struct be_eth_tx_compl *txcp;
1468 while ((txcp = be_tx_compl_get(tx_cq))) {
1469 end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
1471 be_tx_compl_process(adapter, end_idx);
1476 be_cq_notify(adapter, tx_cq->id, true, num_cmpl);
1478 /* As Tx wrbs have been freed up, wake up netdev queue if
1479 * it was stopped due to lack of tx wrbs.
1481 if (netif_queue_stopped(adapter->netdev) &&
1482 atomic_read(&txq->used) < txq->len / 2) {
1483 netif_wake_queue(adapter->netdev);
1486 drvr_stats(adapter)->be_tx_events++;
1487 drvr_stats(adapter)->be_tx_compl += num_cmpl;
1491 /* As TX and MCC share the same EQ check for both TX and MCC completions.
1492 * For TX/MCC we don't honour budget; consume everything
1494 static int be_poll_tx_mcc(struct napi_struct *napi, int budget)
1496 struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
1497 struct be_adapter *adapter =
1498 container_of(tx_eq, struct be_adapter, tx_eq);
1500 napi_complete(napi);
1502 be_process_tx(adapter);
1504 be_process_mcc(adapter);
1509 static void be_worker(struct work_struct *work)
1511 struct be_adapter *adapter =
1512 container_of(work, struct be_adapter, work.work);
1514 be_cmd_get_stats(adapter, &adapter->stats.cmd);
1517 be_rx_eqd_update(adapter);
1519 be_tx_rate_update(adapter);
1520 be_rx_rate_update(adapter);
1522 if (adapter->rx_post_starved) {
1523 adapter->rx_post_starved = false;
1524 be_post_rx_frags(adapter);
1527 schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
1530 static void be_msix_disable(struct be_adapter *adapter)
1532 if (adapter->msix_enabled) {
1533 pci_disable_msix(adapter->pdev);
1534 adapter->msix_enabled = false;
1538 static void be_msix_enable(struct be_adapter *adapter)
1542 for (i = 0; i < BE_NUM_MSIX_VECTORS; i++)
1543 adapter->msix_entries[i].entry = i;
1545 status = pci_enable_msix(adapter->pdev, adapter->msix_entries,
1546 BE_NUM_MSIX_VECTORS);
1548 adapter->msix_enabled = true;
1552 static inline int be_msix_vec_get(struct be_adapter *adapter, u32 eq_id)
1554 return adapter->msix_entries[
1555 be_evt_bit_get(adapter, eq_id)].vector;
1558 static int be_request_irq(struct be_adapter *adapter,
1559 struct be_eq_obj *eq_obj,
1560 void *handler, char *desc)
1562 struct net_device *netdev = adapter->netdev;
1565 sprintf(eq_obj->desc, "%s-%s", netdev->name, desc);
1566 vec = be_msix_vec_get(adapter, eq_obj->q.id);
1567 return request_irq(vec, handler, 0, eq_obj->desc, adapter);
1570 static void be_free_irq(struct be_adapter *adapter, struct be_eq_obj *eq_obj)
1572 int vec = be_msix_vec_get(adapter, eq_obj->q.id);
1573 free_irq(vec, adapter);
1576 static int be_msix_register(struct be_adapter *adapter)
1580 status = be_request_irq(adapter, &adapter->tx_eq, be_msix_tx_mcc, "tx");
1584 status = be_request_irq(adapter, &adapter->rx_eq, be_msix_rx, "rx");
1591 be_free_irq(adapter, &adapter->tx_eq);
1593 dev_warn(&adapter->pdev->dev,
1594 "MSIX Request IRQ failed - err %d\n", status);
1595 pci_disable_msix(adapter->pdev);
1596 adapter->msix_enabled = false;
1600 static int be_irq_register(struct be_adapter *adapter)
1602 struct net_device *netdev = adapter->netdev;
1605 if (adapter->msix_enabled) {
1606 status = be_msix_register(adapter);
1612 netdev->irq = adapter->pdev->irq;
1613 status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
1616 dev_err(&adapter->pdev->dev,
1617 "INTx request IRQ failed - err %d\n", status);
1621 adapter->isr_registered = true;
1625 static void be_irq_unregister(struct be_adapter *adapter)
1627 struct net_device *netdev = adapter->netdev;
1629 if (!adapter->isr_registered)
1633 if (!adapter->msix_enabled) {
1634 free_irq(netdev->irq, adapter);
1639 be_free_irq(adapter, &adapter->tx_eq);
1640 be_free_irq(adapter, &adapter->rx_eq);
1642 adapter->isr_registered = false;
1646 static int be_open(struct net_device *netdev)
1648 struct be_adapter *adapter = netdev_priv(netdev);
1649 struct be_eq_obj *rx_eq = &adapter->rx_eq;
1650 struct be_eq_obj *tx_eq = &adapter->tx_eq;
1656 /* First time posting */
1657 be_post_rx_frags(adapter);
1659 napi_enable(&rx_eq->napi);
1660 napi_enable(&tx_eq->napi);
1662 be_irq_register(adapter);
1664 be_intr_set(adapter, true);
1666 /* The evt queues are created in unarmed state; arm them */
1667 be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
1668 be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
1670 /* Rx compl queue may be in unarmed state; rearm it */
1671 be_cq_notify(adapter, adapter->rx_obj.cq.id, true, 0);
1673 /* Now that interrupts are on we can process async mcc */
1674 be_async_mcc_enable(adapter);
1676 status = be_cmd_link_status_query(adapter, &link_up, &mac_speed,
1680 be_link_status_update(adapter, link_up);
1682 status = be_vid_config(adapter);
1686 status = be_cmd_set_flow_control(adapter,
1687 adapter->tx_fc, adapter->rx_fc);
1691 schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
1696 static int be_setup_wol(struct be_adapter *adapter, bool enable)
1698 struct be_dma_mem cmd;
1702 memset(mac, 0, ETH_ALEN);
1704 cmd.size = sizeof(struct be_cmd_req_acpi_wol_magic_config);
1705 cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma);
1708 memset(cmd.va, 0, cmd.size);
1711 status = pci_write_config_dword(adapter->pdev,
1712 PCICFG_PM_CONTROL_OFFSET, PCICFG_PM_CONTROL_MASK);
1714 dev_err(&adapter->pdev->dev,
1715 "Could not enable Wake-on-lan \n");
1716 pci_free_consistent(adapter->pdev, cmd.size, cmd.va,
1720 status = be_cmd_enable_magic_wol(adapter,
1721 adapter->netdev->dev_addr, &cmd);
1722 pci_enable_wake(adapter->pdev, PCI_D3hot, 1);
1723 pci_enable_wake(adapter->pdev, PCI_D3cold, 1);
1725 status = be_cmd_enable_magic_wol(adapter, mac, &cmd);
1726 pci_enable_wake(adapter->pdev, PCI_D3hot, 0);
1727 pci_enable_wake(adapter->pdev, PCI_D3cold, 0);
1730 pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma);
1734 static int be_setup(struct be_adapter *adapter)
1736 struct net_device *netdev = adapter->netdev;
1737 u32 cap_flags, en_flags;
1740 cap_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
1741 BE_IF_FLAGS_MCAST_PROMISCUOUS |
1742 BE_IF_FLAGS_PROMISCUOUS |
1743 BE_IF_FLAGS_PASS_L3L4_ERRORS;
1744 en_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
1745 BE_IF_FLAGS_PASS_L3L4_ERRORS;
1747 status = be_cmd_if_create(adapter, cap_flags, en_flags,
1748 netdev->dev_addr, false/* pmac_invalid */,
1749 &adapter->if_handle, &adapter->pmac_id);
1753 status = be_tx_queues_create(adapter);
1757 status = be_rx_queues_create(adapter);
1761 status = be_mcc_queues_create(adapter);
1765 adapter->link_speed = -1;
1770 be_rx_queues_destroy(adapter);
1772 be_tx_queues_destroy(adapter);
1774 be_cmd_if_destroy(adapter, adapter->if_handle);
1779 static int be_clear(struct be_adapter *adapter)
1781 be_mcc_queues_destroy(adapter);
1782 be_rx_queues_destroy(adapter);
1783 be_tx_queues_destroy(adapter);
1785 be_cmd_if_destroy(adapter, adapter->if_handle);
1787 /* tell fw we're done with firing cmds */
1788 be_cmd_fw_clean(adapter);
1792 static int be_close(struct net_device *netdev)
1794 struct be_adapter *adapter = netdev_priv(netdev);
1795 struct be_eq_obj *rx_eq = &adapter->rx_eq;
1796 struct be_eq_obj *tx_eq = &adapter->tx_eq;
1799 cancel_delayed_work_sync(&adapter->work);
1801 be_async_mcc_disable(adapter);
1803 netif_stop_queue(netdev);
1804 netif_carrier_off(netdev);
1805 adapter->link_up = false;
1807 be_intr_set(adapter, false);
1809 if (adapter->msix_enabled) {
1810 vec = be_msix_vec_get(adapter, tx_eq->q.id);
1811 synchronize_irq(vec);
1812 vec = be_msix_vec_get(adapter, rx_eq->q.id);
1813 synchronize_irq(vec);
1815 synchronize_irq(netdev->irq);
1817 be_irq_unregister(adapter);
1819 napi_disable(&rx_eq->napi);
1820 napi_disable(&tx_eq->napi);
1822 /* Wait for all pending tx completions to arrive so that
1823 * all tx skbs are freed.
1825 be_tx_compl_clean(adapter);
1830 #define FW_FILE_HDR_SIGN "ServerEngines Corp. "
1831 char flash_cookie[2][16] = {"*** SE FLAS",
1832 "H DIRECTORY *** "};
1834 static bool be_flash_redboot(struct be_adapter *adapter,
1835 const u8 *p, u32 img_start, int image_size,
1842 crc_offset = hdr_size + img_start + image_size - 4;
1846 status = be_cmd_get_flash_crc(adapter, flashed_crc,
1847 (img_start + image_size - 4));
1849 dev_err(&adapter->pdev->dev,
1850 "could not get crc from flash, not flashing redboot\n");
1854 /*update redboot only if crc does not match*/
1855 if (!memcmp(flashed_crc, p, 4))
1861 static int be_flash_data(struct be_adapter *adapter,
1862 const struct firmware *fw,
1863 struct be_dma_mem *flash_cmd, int num_of_images)
1866 int status = 0, i, filehdr_size = 0;
1867 u32 total_bytes = 0, flash_op;
1869 const u8 *p = fw->data;
1870 struct be_cmd_write_flashrom *req = flash_cmd->va;
1871 struct flash_comp *pflashcomp;
1873 struct flash_comp gen3_flash_types[8] = {
1874 { FLASH_iSCSI_PRIMARY_IMAGE_START_g3, IMG_TYPE_ISCSI_ACTIVE,
1875 FLASH_IMAGE_MAX_SIZE_g3},
1876 { FLASH_REDBOOT_START_g3, IMG_TYPE_REDBOOT,
1877 FLASH_REDBOOT_IMAGE_MAX_SIZE_g3},
1878 { FLASH_iSCSI_BIOS_START_g3, IMG_TYPE_BIOS,
1879 FLASH_BIOS_IMAGE_MAX_SIZE_g3},
1880 { FLASH_PXE_BIOS_START_g3, IMG_TYPE_PXE_BIOS,
1881 FLASH_BIOS_IMAGE_MAX_SIZE_g3},
1882 { FLASH_FCoE_BIOS_START_g3, IMG_TYPE_FCOE_BIOS,
1883 FLASH_BIOS_IMAGE_MAX_SIZE_g3},
1884 { FLASH_iSCSI_BACKUP_IMAGE_START_g3, IMG_TYPE_ISCSI_BACKUP,
1885 FLASH_IMAGE_MAX_SIZE_g3},
1886 { FLASH_FCoE_PRIMARY_IMAGE_START_g3, IMG_TYPE_FCOE_FW_ACTIVE,
1887 FLASH_IMAGE_MAX_SIZE_g3},
1888 { FLASH_FCoE_BACKUP_IMAGE_START_g3, IMG_TYPE_FCOE_FW_BACKUP,
1889 FLASH_IMAGE_MAX_SIZE_g3}
1891 struct flash_comp gen2_flash_types[8] = {
1892 { FLASH_iSCSI_PRIMARY_IMAGE_START_g2, IMG_TYPE_ISCSI_ACTIVE,
1893 FLASH_IMAGE_MAX_SIZE_g2},
1894 { FLASH_REDBOOT_START_g2, IMG_TYPE_REDBOOT,
1895 FLASH_REDBOOT_IMAGE_MAX_SIZE_g2},
1896 { FLASH_iSCSI_BIOS_START_g2, IMG_TYPE_BIOS,
1897 FLASH_BIOS_IMAGE_MAX_SIZE_g2},
1898 { FLASH_PXE_BIOS_START_g2, IMG_TYPE_PXE_BIOS,
1899 FLASH_BIOS_IMAGE_MAX_SIZE_g2},
1900 { FLASH_FCoE_BIOS_START_g2, IMG_TYPE_FCOE_BIOS,
1901 FLASH_BIOS_IMAGE_MAX_SIZE_g2},
1902 { FLASH_iSCSI_BACKUP_IMAGE_START_g2, IMG_TYPE_ISCSI_BACKUP,
1903 FLASH_IMAGE_MAX_SIZE_g2},
1904 { FLASH_FCoE_PRIMARY_IMAGE_START_g2, IMG_TYPE_FCOE_FW_ACTIVE,
1905 FLASH_IMAGE_MAX_SIZE_g2},
1906 { FLASH_FCoE_BACKUP_IMAGE_START_g2, IMG_TYPE_FCOE_FW_BACKUP,
1907 FLASH_IMAGE_MAX_SIZE_g2}
1910 if (adapter->generation == BE_GEN3) {
1911 pflashcomp = gen3_flash_types;
1912 filehdr_size = sizeof(struct flash_file_hdr_g3);
1914 pflashcomp = gen2_flash_types;
1915 filehdr_size = sizeof(struct flash_file_hdr_g2);
1917 for (i = 0; i < 8; i++) {
1918 if ((pflashcomp[i].optype == IMG_TYPE_REDBOOT) &&
1919 (!be_flash_redboot(adapter, fw->data,
1920 pflashcomp[i].offset, pflashcomp[i].size,
1924 p += filehdr_size + pflashcomp[i].offset
1925 + (num_of_images * sizeof(struct image_hdr));
1926 if (p + pflashcomp[i].size > fw->data + fw->size)
1928 total_bytes = pflashcomp[i].size;
1929 while (total_bytes) {
1930 if (total_bytes > 32*1024)
1931 num_bytes = 32*1024;
1933 num_bytes = total_bytes;
1934 total_bytes -= num_bytes;
1937 flash_op = FLASHROM_OPER_FLASH;
1939 flash_op = FLASHROM_OPER_SAVE;
1940 memcpy(req->params.data_buf, p, num_bytes);
1942 status = be_cmd_write_flashrom(adapter, flash_cmd,
1943 pflashcomp[i].optype, flash_op, num_bytes);
1945 dev_err(&adapter->pdev->dev,
1946 "cmd to write to flash rom failed.\n");
1955 static int get_ufigen_type(struct flash_file_hdr_g2 *fhdr)
1959 if (fhdr->build[0] == '3')
1961 else if (fhdr->build[0] == '2')
1967 int be_load_fw(struct be_adapter *adapter, u8 *func)
1969 char fw_file[ETHTOOL_FLASH_MAX_FILENAME];
1970 const struct firmware *fw;
1971 struct flash_file_hdr_g2 *fhdr;
1972 struct flash_file_hdr_g3 *fhdr3;
1973 struct image_hdr *img_hdr_ptr = NULL;
1974 struct be_dma_mem flash_cmd;
1977 char fw_ver[FW_VER_LEN];
1980 status = be_cmd_get_fw_ver(adapter, fw_ver);
1984 fw_cfg = *(fw_ver + 2);
1987 strcpy(fw_file, func);
1989 status = request_firmware(&fw, fw_file, &adapter->pdev->dev);
1994 fhdr = (struct flash_file_hdr_g2 *) p;
1995 dev_info(&adapter->pdev->dev, "Flashing firmware file %s\n", fw_file);
1997 flash_cmd.size = sizeof(struct be_cmd_write_flashrom) + 32*1024;
1998 flash_cmd.va = pci_alloc_consistent(adapter->pdev, flash_cmd.size,
2000 if (!flash_cmd.va) {
2002 dev_err(&adapter->pdev->dev,
2003 "Memory allocation failure while flashing\n");
2007 if ((adapter->generation == BE_GEN3) &&
2008 (get_ufigen_type(fhdr) == BE_GEN3)) {
2009 fhdr3 = (struct flash_file_hdr_g3 *) fw->data;
2010 for (i = 0; i < fhdr3->num_imgs; i++) {
2011 img_hdr_ptr = (struct image_hdr *) (fw->data +
2012 (sizeof(struct flash_file_hdr_g3) +
2013 i * sizeof(struct image_hdr)));
2014 if (img_hdr_ptr->imageid == 1) {
2015 status = be_flash_data(adapter, fw,
2016 &flash_cmd, fhdr3->num_imgs);
2020 } else if ((adapter->generation == BE_GEN2) &&
2021 (get_ufigen_type(fhdr) == BE_GEN2)) {
2022 status = be_flash_data(adapter, fw, &flash_cmd, 0);
2024 dev_err(&adapter->pdev->dev,
2025 "UFI and Interface are not compatible for flashing\n");
2029 pci_free_consistent(adapter->pdev, flash_cmd.size, flash_cmd.va,
2032 dev_err(&adapter->pdev->dev, "Firmware load error\n");
2036 dev_info(&adapter->pdev->dev, "Firmware flashed successfully\n");
2039 release_firmware(fw);
2043 static struct net_device_ops be_netdev_ops = {
2044 .ndo_open = be_open,
2045 .ndo_stop = be_close,
2046 .ndo_start_xmit = be_xmit,
2047 .ndo_get_stats = be_get_stats,
2048 .ndo_set_rx_mode = be_set_multicast_list,
2049 .ndo_set_mac_address = be_mac_addr_set,
2050 .ndo_change_mtu = be_change_mtu,
2051 .ndo_validate_addr = eth_validate_addr,
2052 .ndo_vlan_rx_register = be_vlan_register,
2053 .ndo_vlan_rx_add_vid = be_vlan_add_vid,
2054 .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
2057 static void be_netdev_init(struct net_device *netdev)
2059 struct be_adapter *adapter = netdev_priv(netdev);
2061 netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO |
2062 NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_HW_CSUM |
2065 netdev->vlan_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_HW_CSUM;
2067 netdev->flags |= IFF_MULTICAST;
2069 adapter->rx_csum = true;
2071 /* Default settings for Rx and Tx flow control */
2072 adapter->rx_fc = true;
2073 adapter->tx_fc = true;
2075 netif_set_gso_max_size(netdev, 65535);
2077 BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
2079 SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
2081 netif_napi_add(netdev, &adapter->rx_eq.napi, be_poll_rx,
2083 netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc,
2086 netif_carrier_off(netdev);
2087 netif_stop_queue(netdev);
2090 static void be_unmap_pci_bars(struct be_adapter *adapter)
2093 iounmap(adapter->csr);
2095 iounmap(adapter->db);
2096 if (adapter->pcicfg)
2097 iounmap(adapter->pcicfg);
2100 static int be_map_pci_bars(struct be_adapter *adapter)
2105 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
2106 pci_resource_len(adapter->pdev, 2));
2109 adapter->csr = addr;
2111 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 4),
2117 if (adapter->generation == BE_GEN2)
2122 addr = ioremap_nocache(pci_resource_start(adapter->pdev, pcicfg_reg),
2123 pci_resource_len(adapter->pdev, pcicfg_reg));
2126 adapter->pcicfg = addr;
2130 be_unmap_pci_bars(adapter);
2135 static void be_ctrl_cleanup(struct be_adapter *adapter)
2137 struct be_dma_mem *mem = &adapter->mbox_mem_alloced;
2139 be_unmap_pci_bars(adapter);
2142 pci_free_consistent(adapter->pdev, mem->size,
2145 mem = &adapter->mc_cmd_mem;
2147 pci_free_consistent(adapter->pdev, mem->size,
2151 static int be_ctrl_init(struct be_adapter *adapter)
2153 struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced;
2154 struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem;
2155 struct be_dma_mem *mc_cmd_mem = &adapter->mc_cmd_mem;
2158 status = be_map_pci_bars(adapter);
2162 mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
2163 mbox_mem_alloc->va = pci_alloc_consistent(adapter->pdev,
2164 mbox_mem_alloc->size, &mbox_mem_alloc->dma);
2165 if (!mbox_mem_alloc->va) {
2167 goto unmap_pci_bars;
2170 mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
2171 mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
2172 mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
2173 memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
2175 mc_cmd_mem->size = sizeof(struct be_cmd_req_mcast_mac_config);
2176 mc_cmd_mem->va = pci_alloc_consistent(adapter->pdev, mc_cmd_mem->size,
2178 if (mc_cmd_mem->va == NULL) {
2182 memset(mc_cmd_mem->va, 0, mc_cmd_mem->size);
2184 spin_lock_init(&adapter->mbox_lock);
2185 spin_lock_init(&adapter->mcc_lock);
2186 spin_lock_init(&adapter->mcc_cq_lock);
2188 pci_save_state(adapter->pdev);
2192 pci_free_consistent(adapter->pdev, mbox_mem_alloc->size,
2193 mbox_mem_alloc->va, mbox_mem_alloc->dma);
2196 be_unmap_pci_bars(adapter);
2202 static void be_stats_cleanup(struct be_adapter *adapter)
2204 struct be_stats_obj *stats = &adapter->stats;
2205 struct be_dma_mem *cmd = &stats->cmd;
2208 pci_free_consistent(adapter->pdev, cmd->size,
2212 static int be_stats_init(struct be_adapter *adapter)
2214 struct be_stats_obj *stats = &adapter->stats;
2215 struct be_dma_mem *cmd = &stats->cmd;
2217 cmd->size = sizeof(struct be_cmd_req_get_stats);
2218 cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma);
2219 if (cmd->va == NULL)
2221 memset(cmd->va, 0, cmd->size);
2225 static void __devexit be_remove(struct pci_dev *pdev)
2227 struct be_adapter *adapter = pci_get_drvdata(pdev);
2232 unregister_netdev(adapter->netdev);
2236 be_stats_cleanup(adapter);
2238 be_ctrl_cleanup(adapter);
2240 be_msix_disable(adapter);
2242 pci_set_drvdata(pdev, NULL);
2243 pci_release_regions(pdev);
2244 pci_disable_device(pdev);
2246 free_netdev(adapter->netdev);
2249 static int be_get_config(struct be_adapter *adapter)
2254 status = be_cmd_get_fw_ver(adapter, adapter->fw_ver);
2258 status = be_cmd_query_fw_cfg(adapter,
2259 &adapter->port_num, &adapter->cap);
2263 memset(mac, 0, ETH_ALEN);
2264 status = be_cmd_mac_addr_query(adapter, mac,
2265 MAC_ADDRESS_TYPE_NETWORK, true /*permanent */, 0);
2269 if (!is_valid_ether_addr(mac))
2270 return -EADDRNOTAVAIL;
2272 memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
2273 memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
2275 if (adapter->cap & 0x400)
2276 adapter->max_vlans = BE_NUM_VLANS_SUPPORTED/4;
2278 adapter->max_vlans = BE_NUM_VLANS_SUPPORTED;
2283 static int __devinit be_probe(struct pci_dev *pdev,
2284 const struct pci_device_id *pdev_id)
2287 struct be_adapter *adapter;
2288 struct net_device *netdev;
2290 status = pci_enable_device(pdev);
2294 status = pci_request_regions(pdev, DRV_NAME);
2297 pci_set_master(pdev);
2299 netdev = alloc_etherdev(sizeof(struct be_adapter));
2300 if (netdev == NULL) {
2304 adapter = netdev_priv(netdev);
2306 switch (pdev->device) {
2309 adapter->generation = BE_GEN2;
2313 adapter->generation = BE_GEN3;
2316 adapter->generation = 0;
2319 adapter->pdev = pdev;
2320 pci_set_drvdata(pdev, adapter);
2321 adapter->netdev = netdev;
2322 be_netdev_init(netdev);
2323 SET_NETDEV_DEV(netdev, &pdev->dev);
2325 be_msix_enable(adapter);
2327 status = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
2329 netdev->features |= NETIF_F_HIGHDMA;
2331 status = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2333 dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
2338 status = be_ctrl_init(adapter);
2342 /* sync up with fw's ready state */
2343 status = be_cmd_POST(adapter);
2347 /* tell fw we're ready to fire cmds */
2348 status = be_cmd_fw_init(adapter);
2352 status = be_cmd_reset_function(adapter);
2356 status = be_stats_init(adapter);
2360 status = be_get_config(adapter);
2364 INIT_DELAYED_WORK(&adapter->work, be_worker);
2366 status = be_setup(adapter);
2370 status = register_netdev(netdev);
2374 dev_info(&pdev->dev, "%s port %d\n", nic_name(pdev), adapter->port_num);
2380 be_stats_cleanup(adapter);
2382 be_ctrl_cleanup(adapter);
2384 be_msix_disable(adapter);
2385 free_netdev(adapter->netdev);
2386 pci_set_drvdata(pdev, NULL);
2388 pci_release_regions(pdev);
2390 pci_disable_device(pdev);
2392 dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev));
2396 static int be_suspend(struct pci_dev *pdev, pm_message_t state)
2398 struct be_adapter *adapter = pci_get_drvdata(pdev);
2399 struct net_device *netdev = adapter->netdev;
2402 be_setup_wol(adapter, true);
2404 netif_device_detach(netdev);
2405 if (netif_running(netdev)) {
2410 be_cmd_get_flow_control(adapter, &adapter->tx_fc, &adapter->rx_fc);
2413 pci_save_state(pdev);
2414 pci_disable_device(pdev);
2415 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2419 static int be_resume(struct pci_dev *pdev)
2422 struct be_adapter *adapter = pci_get_drvdata(pdev);
2423 struct net_device *netdev = adapter->netdev;
2425 netif_device_detach(netdev);
2427 status = pci_enable_device(pdev);
2431 pci_set_power_state(pdev, 0);
2432 pci_restore_state(pdev);
2434 /* tell fw we're ready to fire cmds */
2435 status = be_cmd_fw_init(adapter);
2440 if (netif_running(netdev)) {
2445 netif_device_attach(netdev);
2448 be_setup_wol(adapter, false);
2453 * An FLR will stop BE from DMAing any data.
2455 static void be_shutdown(struct pci_dev *pdev)
2457 struct be_adapter *adapter = pci_get_drvdata(pdev);
2458 struct net_device *netdev = adapter->netdev;
2460 netif_device_detach(netdev);
2462 be_cmd_reset_function(adapter);
2465 be_setup_wol(adapter, true);
2467 pci_disable_device(pdev);
2472 static pci_ers_result_t be_eeh_err_detected(struct pci_dev *pdev,
2473 pci_channel_state_t state)
2475 struct be_adapter *adapter = pci_get_drvdata(pdev);
2476 struct net_device *netdev = adapter->netdev;
2478 dev_err(&adapter->pdev->dev, "EEH error detected\n");
2480 adapter->eeh_err = true;
2482 netif_device_detach(netdev);
2484 if (netif_running(netdev)) {
2491 if (state == pci_channel_io_perm_failure)
2492 return PCI_ERS_RESULT_DISCONNECT;
2494 pci_disable_device(pdev);
2496 return PCI_ERS_RESULT_NEED_RESET;
2499 static pci_ers_result_t be_eeh_reset(struct pci_dev *pdev)
2501 struct be_adapter *adapter = pci_get_drvdata(pdev);
2504 dev_info(&adapter->pdev->dev, "EEH reset\n");
2505 adapter->eeh_err = false;
2507 status = pci_enable_device(pdev);
2509 return PCI_ERS_RESULT_DISCONNECT;
2511 pci_set_master(pdev);
2512 pci_set_power_state(pdev, 0);
2513 pci_restore_state(pdev);
2515 /* Check if card is ok and fw is ready */
2516 status = be_cmd_POST(adapter);
2518 return PCI_ERS_RESULT_DISCONNECT;
2520 return PCI_ERS_RESULT_RECOVERED;
2523 static void be_eeh_resume(struct pci_dev *pdev)
2526 struct be_adapter *adapter = pci_get_drvdata(pdev);
2527 struct net_device *netdev = adapter->netdev;
2529 dev_info(&adapter->pdev->dev, "EEH resume\n");
2531 pci_save_state(pdev);
2533 /* tell fw we're ready to fire cmds */
2534 status = be_cmd_fw_init(adapter);
2538 status = be_setup(adapter);
2542 if (netif_running(netdev)) {
2543 status = be_open(netdev);
2547 netif_device_attach(netdev);
2550 dev_err(&adapter->pdev->dev, "EEH resume failed\n");
2554 static struct pci_error_handlers be_eeh_handlers = {
2555 .error_detected = be_eeh_err_detected,
2556 .slot_reset = be_eeh_reset,
2557 .resume = be_eeh_resume,
2560 static struct pci_driver be_driver = {
2562 .id_table = be_dev_ids,
2564 .remove = be_remove,
2565 .suspend = be_suspend,
2566 .resume = be_resume,
2567 .shutdown = be_shutdown,
2568 .err_handler = &be_eeh_handlers
2571 static int __init be_init_module(void)
2573 if (rx_frag_size != 8192 && rx_frag_size != 4096 &&
2574 rx_frag_size != 2048) {
2575 printk(KERN_WARNING DRV_NAME
2576 " : Module param rx_frag_size must be 2048/4096/8192."
2578 rx_frag_size = 2048;
2581 return pci_register_driver(&be_driver);
2583 module_init(be_init_module);
2585 static void __exit be_exit_module(void)
2587 pci_unregister_driver(&be_driver);
2589 module_exit(be_exit_module);