SAFE public projects git trees. - safe/jmp/linux-2.6/blob - drivers/net/atl1e/atl1e_main.c

   1 /*
   2  * Copyright(c) 2007 Atheros Corporation. All rights reserved.
   3  *
   4  * Derived from Intel e1000 driver
   5  * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms of the GNU General Public License as published by the Free
   9  * Software Foundation; either version 2 of the License, or (at your option)
  10  * any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program; if not, write to the Free Software Foundation, Inc., 59
  19  * Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  20  */
  21
  22 #include "atl1e.h"
  23
  24 #define DRV_VERSION "1.0.0.7-NAPI"
  25
  26 char atl1e_driver_name[] = "ATL1E";
  27 char atl1e_driver_version[] = DRV_VERSION;
  28 #define PCI_DEVICE_ID_ATTANSIC_L1E      0x1026
  29 /*
  30  * atl1e_pci_tbl - PCI Device ID Table
  31  *
  32  * Wildcard entries (PCI_ANY_ID) should come last
  33  * Last entry must be all 0s
  34  *
  35  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  36  *   Class, Class Mask, private data (not used) }
  37  */
  38 static struct pci_device_id atl1e_pci_tbl[] = {
  39         {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1E)},
  40         {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, 0x1066)},
  41         /* required last entry */
  42         { 0 }
  43 };
  44 MODULE_DEVICE_TABLE(pci, atl1e_pci_tbl);
  45
  46 MODULE_AUTHOR("Atheros Corporation, <xiong.huang@atheros.com>, Jie Yang <jie.yang@atheros.com>");
  47 MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver");
  48 MODULE_LICENSE("GPL");
  49 MODULE_VERSION(DRV_VERSION);
  50
  51 static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter);
  52
  53 static const u16
  54 atl1e_rx_page_vld_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
  55 {
  56         {REG_HOST_RXF0_PAGE0_VLD, REG_HOST_RXF0_PAGE1_VLD},
  57         {REG_HOST_RXF1_PAGE0_VLD, REG_HOST_RXF1_PAGE1_VLD},
  58         {REG_HOST_RXF2_PAGE0_VLD, REG_HOST_RXF2_PAGE1_VLD},
  59         {REG_HOST_RXF3_PAGE0_VLD, REG_HOST_RXF3_PAGE1_VLD}
  60 };
  61
  62 static const u16 atl1e_rx_page_hi_addr_regs[AT_MAX_RECEIVE_QUEUE] =
  63 {
  64         REG_RXF0_BASE_ADDR_HI,
  65         REG_RXF1_BASE_ADDR_HI,
  66         REG_RXF2_BASE_ADDR_HI,
  67         REG_RXF3_BASE_ADDR_HI
  68 };
  69
  70 static const u16
  71 atl1e_rx_page_lo_addr_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
  72 {
  73         {REG_HOST_RXF0_PAGE0_LO, REG_HOST_RXF0_PAGE1_LO},
  74         {REG_HOST_RXF1_PAGE0_LO, REG_HOST_RXF1_PAGE1_LO},
  75         {REG_HOST_RXF2_PAGE0_LO, REG_HOST_RXF2_PAGE1_LO},
  76         {REG_HOST_RXF3_PAGE0_LO, REG_HOST_RXF3_PAGE1_LO}
  77 };
  78
  79 static const u16
  80 atl1e_rx_page_write_offset_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
  81 {
  82         {REG_HOST_RXF0_MB0_LO,  REG_HOST_RXF0_MB1_LO},
  83         {REG_HOST_RXF1_MB0_LO,  REG_HOST_RXF1_MB1_LO},
  84         {REG_HOST_RXF2_MB0_LO,  REG_HOST_RXF2_MB1_LO},
  85         {REG_HOST_RXF3_MB0_LO,  REG_HOST_RXF3_MB1_LO}
  86 };
  87
  88 static const u16 atl1e_pay_load_size[] = {
  89         128, 256, 512, 1024, 2048, 4096,
  90 };
  91
  92 /*
  93  * atl1e_irq_enable - Enable default interrupt generation settings
  94  * @adapter: board private structure
  95  */
  96 static inline void atl1e_irq_enable(struct atl1e_adapter *adapter)
  97 {
  98         if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
  99                 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
 100                 AT_WRITE_REG(&adapter->hw, REG_IMR, IMR_NORMAL_MASK);
 101                 AT_WRITE_FLUSH(&adapter->hw);
 102         }
 103 }
 104
 105 /*
 106  * atl1e_irq_disable - Mask off interrupt generation on the NIC
 107  * @adapter: board private structure
 108  */
 109 static inline void atl1e_irq_disable(struct atl1e_adapter *adapter)
 110 {
 111         atomic_inc(&adapter->irq_sem);
 112         AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
 113         AT_WRITE_FLUSH(&adapter->hw);
 114         synchronize_irq(adapter->pdev->irq);
 115 }
 116
 117 /*
 118  * atl1e_irq_reset - reset interrupt confiure on the NIC
 119  * @adapter: board private structure
 120  */
 121 static inline void atl1e_irq_reset(struct atl1e_adapter *adapter)
 122 {
 123         atomic_set(&adapter->irq_sem, 0);
 124         AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
 125         AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
 126         AT_WRITE_FLUSH(&adapter->hw);
 127 }
 128
 129 /*
 130  * atl1e_phy_config - Timer Call-back
 131  * @data: pointer to netdev cast into an unsigned long
 132  */
 133 static void atl1e_phy_config(unsigned long data)
 134 {
 135         struct atl1e_adapter *adapter = (struct atl1e_adapter *) data;
 136         struct atl1e_hw *hw = &adapter->hw;
 137         unsigned long flags;
 138
 139         spin_lock_irqsave(&adapter->mdio_lock, flags);
 140         atl1e_restart_autoneg(hw);
 141         spin_unlock_irqrestore(&adapter->mdio_lock, flags);
 142 }
 143
 144 void atl1e_reinit_locked(struct atl1e_adapter *adapter)
 145 {
 146
 147         WARN_ON(in_interrupt());
 148         while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
 149                 msleep(1);
 150         atl1e_down(adapter);
 151         atl1e_up(adapter);
 152         clear_bit(__AT_RESETTING, &adapter->flags);
 153 }
 154
 155 static void atl1e_reset_task(struct work_struct *work)
 156 {
 157         struct atl1e_adapter *adapter;
 158         adapter = container_of(work, struct atl1e_adapter, reset_task);
 159
 160         atl1e_reinit_locked(adapter);
 161 }
 162
 163 static int atl1e_check_link(struct atl1e_adapter *adapter)
 164 {
 165         struct atl1e_hw *hw = &adapter->hw;
 166         struct net_device *netdev = adapter->netdev;
 167         struct pci_dev    *pdev   = adapter->pdev;
 168         int err = 0;
 169         u16 speed, duplex, phy_data;
 170
 171         /* MII_BMSR must read twise */
 172         atl1e_read_phy_reg(hw, MII_BMSR, &phy_data);
 173         atl1e_read_phy_reg(hw, MII_BMSR, &phy_data);
 174         if ((phy_data & BMSR_LSTATUS) == 0) {
 175                 /* link down */
 176                 if (netif_carrier_ok(netdev)) { /* old link state: Up */
 177                         u32 value;
 178                         /* disable rx */
 179                         value = AT_READ_REG(hw, REG_MAC_CTRL);
 180                         value &= ~MAC_CTRL_RX_EN;
 181                         AT_WRITE_REG(hw, REG_MAC_CTRL, value);
 182                         adapter->link_speed = SPEED_0;
 183                         netif_carrier_off(netdev);
 184                         netif_stop_queue(netdev);
 185                 }
 186         } else {
 187                 /* Link Up */
 188                 err = atl1e_get_speed_and_duplex(hw, &speed, &duplex);
 189                 if (unlikely(err))
 190                         return err;
 191
 192                 /* link result is our setting */
 193                 if (adapter->link_speed != speed ||
 194                     adapter->link_duplex != duplex) {
 195                         adapter->link_speed  = speed;
 196                         adapter->link_duplex = duplex;
 197                         atl1e_setup_mac_ctrl(adapter);
 198                         dev_info(&pdev->dev,
 199                                 "%s: %s NIC Link is Up<%d Mbps %s>\n",
 200                                 atl1e_driver_name, netdev->name,
 201                                 adapter->link_speed,
 202                                 adapter->link_duplex == FULL_DUPLEX ?
 203                                 "Full Duplex" : "Half Duplex");
 204                 }
 205
 206                 if (!netif_carrier_ok(netdev)) {
 207                         /* Link down -> Up */
 208                         netif_carrier_on(netdev);
 209                         netif_wake_queue(netdev);
 210                 }
 211         }
 212         return 0;
 213 }
 214
 215 /*
 216  * atl1e_link_chg_task - deal with link change event Out of interrupt context
 217  * @netdev: network interface device structure
 218  */
 219 static void atl1e_link_chg_task(struct work_struct *work)
 220 {
 221         struct atl1e_adapter *adapter;
 222         unsigned long flags;
 223
 224         adapter = container_of(work, struct atl1e_adapter, link_chg_task);
 225         spin_lock_irqsave(&adapter->mdio_lock, flags);
 226         atl1e_check_link(adapter);
 227         spin_unlock_irqrestore(&adapter->mdio_lock, flags);
 228 }
 229
 230 static void atl1e_link_chg_event(struct atl1e_adapter *adapter)
 231 {
 232         struct net_device *netdev = adapter->netdev;
 233         struct pci_dev    *pdev   = adapter->pdev;
 234         u16 phy_data = 0;
 235         u16 link_up = 0;
 236
 237         spin_lock(&adapter->mdio_lock);
 238         atl1e_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
 239         atl1e_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
 240         spin_unlock(&adapter->mdio_lock);
 241         link_up = phy_data & BMSR_LSTATUS;
 242         /* notify upper layer link down ASAP */
 243         if (!link_up) {
 244                 if (netif_carrier_ok(netdev)) {
 245                         /* old link state: Up */
 246                         dev_info(&pdev->dev, "%s: %s NIC Link is Down\n",
 247                                         atl1e_driver_name, netdev->name);
 248                         adapter->link_speed = SPEED_0;
 249                         netif_stop_queue(netdev);
 250                 }
 251         }
 252         schedule_work(&adapter->link_chg_task);
 253 }
 254
 255 static void atl1e_del_timer(struct atl1e_adapter *adapter)
 256 {
 257         del_timer_sync(&adapter->phy_config_timer);
 258 }
 259
 260 static void atl1e_cancel_work(struct atl1e_adapter *adapter)
 261 {
 262         cancel_work_sync(&adapter->reset_task);
 263         cancel_work_sync(&adapter->link_chg_task);
 264 }
 265
 266 /*
 267  * atl1e_tx_timeout - Respond to a Tx Hang
 268  * @netdev: network interface device structure
 269  */
 270 static void atl1e_tx_timeout(struct net_device *netdev)
 271 {
 272         struct atl1e_adapter *adapter = netdev_priv(netdev);
 273
 274         /* Do the reset outside of interrupt context */
 275         schedule_work(&adapter->reset_task);
 276 }
 277
 278 /*
 279  * atl1e_set_multi - Multicast and Promiscuous mode set
 280  * @netdev: network interface device structure
 281  *
 282  * The set_multi entry point is called whenever the multicast address
 283  * list or the network interface flags are updated.  This routine is
 284  * responsible for configuring the hardware for proper multicast,
 285  * promiscuous mode, and all-multi behavior.
 286  */
 287 static void atl1e_set_multi(struct net_device *netdev)
 288 {
 289         struct atl1e_adapter *adapter = netdev_priv(netdev);
 290         struct atl1e_hw *hw = &adapter->hw;
 291         struct dev_mc_list *mc_ptr;
 292         u32 mac_ctrl_data = 0;
 293         u32 hash_value;
 294
 295         /* Check for Promiscuous and All Multicast modes */
 296         mac_ctrl_data = AT_READ_REG(hw, REG_MAC_CTRL);
 297
 298         if (netdev->flags & IFF_PROMISC) {
 299                 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
 300         } else if (netdev->flags & IFF_ALLMULTI) {
 301                 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
 302                 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
 303         } else {
 304                 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
 305         }
 306
 307         AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
 308
 309         /* clear the old settings from the multicast hash table */
 310         AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
 311         AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
 312
 313         /* comoute mc addresses' hash value ,and put it into hash table */
 314         for (mc_ptr = netdev->mc_list; mc_ptr; mc_ptr = mc_ptr->next) {
 315                 hash_value = atl1e_hash_mc_addr(hw, mc_ptr->dmi_addr);
 316                 atl1e_hash_set(hw, hash_value);
 317         }
 318 }
 319
 320 static void atl1e_vlan_rx_register(struct net_device *netdev,
 321                                    struct vlan_group *grp)
 322 {
 323         struct atl1e_adapter *adapter = netdev_priv(netdev);
 324         struct pci_dev *pdev = adapter->pdev;
 325         u32 mac_ctrl_data = 0;
 326
 327         dev_dbg(&pdev->dev, "atl1e_vlan_rx_register\n");
 328
 329         atl1e_irq_disable(adapter);
 330
 331         adapter->vlgrp = grp;
 332         mac_ctrl_data = AT_READ_REG(&adapter->hw, REG_MAC_CTRL);
 333
 334         if (grp) {
 335                 /* enable VLAN tag insert/strip */
 336                 mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
 337         } else {
 338                 /* disable VLAN tag insert/strip */
 339                 mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
 340         }
 341
 342         AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
 343         atl1e_irq_enable(adapter);
 344 }
 345
 346 static void atl1e_restore_vlan(struct atl1e_adapter *adapter)
 347 {
 348         struct pci_dev *pdev = adapter->pdev;
 349
 350         dev_dbg(&pdev->dev, "atl1e_restore_vlan !");
 351         atl1e_vlan_rx_register(adapter->netdev, adapter->vlgrp);
 352 }
 353 /*
 354  * atl1e_set_mac - Change the Ethernet Address of the NIC
 355  * @netdev: network interface device structure
 356  * @p: pointer to an address structure
 357  *
 358  * Returns 0 on success, negative on failure
 359  */
 360 static int atl1e_set_mac_addr(struct net_device *netdev, void *p)
 361 {
 362         struct atl1e_adapter *adapter = netdev_priv(netdev);
 363         struct sockaddr *addr = p;
 364
 365         if (!is_valid_ether_addr(addr->sa_data))
 366                 return -EADDRNOTAVAIL;
 367
 368         if (netif_running(netdev))
 369                 return -EBUSY;
 370
 371         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
 372         memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
 373
 374         atl1e_hw_set_mac_addr(&adapter->hw);
 375
 376         return 0;
 377 }
 378
 379 /*
 380  * atl1e_change_mtu - Change the Maximum Transfer Unit
 381  * @netdev: network interface device structure
 382  * @new_mtu: new value for maximum frame size
 383  *
 384  * Returns 0 on success, negative on failure
 385  */
 386 static int atl1e_change_mtu(struct net_device *netdev, int new_mtu)
 387 {
 388         struct atl1e_adapter *adapter = netdev_priv(netdev);
 389         int old_mtu   = netdev->mtu;
 390         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
 391
 392         if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
 393                         (max_frame > MAX_JUMBO_FRAME_SIZE)) {
 394                 dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
 395                 return -EINVAL;
 396         }
 397         /* set MTU */
 398         if (old_mtu != new_mtu && netif_running(netdev)) {
 399                 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
 400                         msleep(1);
 401                 netdev->mtu = new_mtu;
 402                 adapter->hw.max_frame_size = new_mtu;
 403                 adapter->hw.rx_jumbo_th = (max_frame + 7) >> 3;
 404                 atl1e_down(adapter);
 405                 atl1e_up(adapter);
 406                 clear_bit(__AT_RESETTING, &adapter->flags);
 407         }
 408         return 0;
 409 }
 410
 411 /*
 412  *  caller should hold mdio_lock
 413  */
 414 static int atl1e_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
 415 {
 416         struct atl1e_adapter *adapter = netdev_priv(netdev);
 417         u16 result;
 418
 419         atl1e_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result);
 420         return result;
 421 }
 422
 423 static void atl1e_mdio_write(struct net_device *netdev, int phy_id,
 424                              int reg_num, int val)
 425 {
 426         struct atl1e_adapter *adapter = netdev_priv(netdev);
 427
 428         atl1e_write_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, val);
 429 }
 430
 431 /*
 432  * atl1e_mii_ioctl -
 433  * @netdev:
 434  * @ifreq:
 435  * @cmd:
 436  */
 437 static int atl1e_mii_ioctl(struct net_device *netdev,
 438                            struct ifreq *ifr, int cmd)
 439 {
 440         struct atl1e_adapter *adapter = netdev_priv(netdev);
 441         struct pci_dev *pdev = adapter->pdev;
 442         struct mii_ioctl_data *data = if_mii(ifr);
 443         unsigned long flags;
 444         int retval = 0;
 445
 446         if (!netif_running(netdev))
 447                 return -EINVAL;
 448
 449         spin_lock_irqsave(&adapter->mdio_lock, flags);
 450         switch (cmd) {
 451         case SIOCGMIIPHY:
 452                 data->phy_id = 0;
 453                 break;
 454
 455         case SIOCGMIIREG:
 456                 if (atl1e_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
 457                                     &data->val_out)) {
 458                         retval = -EIO;
 459                         goto out;
 460                 }
 461                 break;
 462
 463         case SIOCSMIIREG:
 464                 if (data->reg_num & ~(0x1F)) {
 465                         retval = -EFAULT;
 466                         goto out;
 467                 }
 468
 469                 dev_dbg(&pdev->dev, "<atl1e_mii_ioctl> write %x %x",
 470                                 data->reg_num, data->val_in);
 471                 if (atl1e_write_phy_reg(&adapter->hw,
 472                                      data->reg_num, data->val_in)) {
 473                         retval = -EIO;
 474                         goto out;
 475                 }
 476                 break;
 477
 478         default:
 479                 retval = -EOPNOTSUPP;
 480                 break;
 481         }
 482 out:
 483         spin_unlock_irqrestore(&adapter->mdio_lock, flags);
 484         return retval;
 485
 486 }
 487
 488 /*
 489  * atl1e_ioctl -
 490  * @netdev:
 491  * @ifreq:
 492  * @cmd:
 493  */
 494 static int atl1e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
 495 {
 496         switch (cmd) {
 497         case SIOCGMIIPHY:
 498         case SIOCGMIIREG:
 499         case SIOCSMIIREG:
 500                 return atl1e_mii_ioctl(netdev, ifr, cmd);
 501         default:
 502                 return -EOPNOTSUPP;
 503         }
 504 }
 505
 506 static void atl1e_setup_pcicmd(struct pci_dev *pdev)
 507 {
 508         u16 cmd;
 509
 510         pci_read_config_word(pdev, PCI_COMMAND, &cmd);
 511         cmd &= ~(PCI_COMMAND_INTX_DISABLE | PCI_COMMAND_IO);
 512         cmd |=  (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
 513         pci_write_config_word(pdev, PCI_COMMAND, cmd);
 514
 515         /*
 516          * some motherboards BIOS(PXE/EFI) driver may set PME
 517          * while they transfer control to OS (Windows/Linux)
 518          * so we should clear this bit before NIC work normally
 519          */
 520         pci_write_config_dword(pdev, REG_PM_CTRLSTAT, 0);
 521         msleep(1);
 522 }
 523
 524 /*
 525  * atl1e_alloc_queues - Allocate memory for all rings
 526  * @adapter: board private structure to initialize
 527  *
 528  */
 529 static int __devinit atl1e_alloc_queues(struct atl1e_adapter *adapter)
 530 {
 531         return 0;
 532 }
 533
 534 /*
 535  * atl1e_sw_init - Initialize general software structures (struct atl1e_adapter)
 536  * @adapter: board private structure to initialize
 537  *
 538  * atl1e_sw_init initializes the Adapter private data structure.
 539  * Fields are initialized based on PCI device information and
 540  * OS network device settings (MTU size).
 541  */
 542 static int __devinit atl1e_sw_init(struct atl1e_adapter *adapter)
 543 {
 544         struct atl1e_hw *hw   = &adapter->hw;
 545         struct pci_dev  *pdev = adapter->pdev;
 546         u32 phy_status_data = 0;
 547
 548         adapter->wol = 0;
 549         adapter->link_speed = SPEED_0;   /* hardware init */
 550         adapter->link_duplex = FULL_DUPLEX;
 551         adapter->num_rx_queues = 1;
 552
 553         /* PCI config space info */
 554         hw->vendor_id = pdev->vendor;
 555         hw->device_id = pdev->device;
 556         hw->subsystem_vendor_id = pdev->subsystem_vendor;
 557         hw->subsystem_id = pdev->subsystem_device;
 558
 559         pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
 560         pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
 561
 562         phy_status_data = AT_READ_REG(hw, REG_PHY_STATUS);
 563         /* nic type */
 564         if (hw->revision_id >= 0xF0) {
 565                 hw->nic_type = athr_l2e_revB;
 566         } else {
 567                 if (phy_status_data & PHY_STATUS_100M)
 568                         hw->nic_type = athr_l1e;
 569                 else
 570                         hw->nic_type = athr_l2e_revA;
 571         }
 572
 573         phy_status_data = AT_READ_REG(hw, REG_PHY_STATUS);
 574
 575         if (phy_status_data & PHY_STATUS_EMI_CA)
 576                 hw->emi_ca = true;
 577         else
 578                 hw->emi_ca = false;
 579
 580         hw->phy_configured = false;
 581         hw->preamble_len = 7;
 582         hw->max_frame_size = adapter->netdev->mtu;
 583         hw->rx_jumbo_th = (hw->max_frame_size + ETH_HLEN +
 584                                 VLAN_HLEN + ETH_FCS_LEN + 7) >> 3;
 585
 586         hw->rrs_type = atl1e_rrs_disable;
 587         hw->indirect_tab = 0;
 588         hw->base_cpu = 0;
 589
 590         /* need confirm */
 591
 592         hw->ict = 50000;                 /* 100ms */
 593         hw->smb_timer = 200000;          /* 200ms  */
 594         hw->tpd_burst = 5;
 595         hw->rrd_thresh = 1;
 596         hw->tpd_thresh = adapter->tx_ring.count / 2;
 597         hw->rx_count_down = 4;  /* 2us resolution */
 598         hw->tx_count_down = hw->imt * 4 / 3;
 599         hw->dmar_block = atl1e_dma_req_1024;
 600         hw->dmaw_block = atl1e_dma_req_1024;
 601         hw->dmar_dly_cnt = 15;
 602         hw->dmaw_dly_cnt = 4;
 603
 604         if (atl1e_alloc_queues(adapter)) {
 605                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
 606                 return -ENOMEM;
 607         }
 608
 609         atomic_set(&adapter->irq_sem, 1);
 610         spin_lock_init(&adapter->mdio_lock);
 611         spin_lock_init(&adapter->tx_lock);
 612
 613         set_bit(__AT_DOWN, &adapter->flags);
 614
 615         return 0;
 616 }
 617
 618 /*
 619  * atl1e_clean_tx_ring - Free Tx-skb
 620  * @adapter: board private structure
 621  */
 622 static void atl1e_clean_tx_ring(struct atl1e_adapter *adapter)
 623 {
 624         struct atl1e_tx_ring *tx_ring = (struct atl1e_tx_ring *)
 625                                 &adapter->tx_ring;
 626         struct atl1e_tx_buffer *tx_buffer = NULL;
 627         struct pci_dev *pdev = adapter->pdev;
 628         u16 index, ring_count;
 629
 630         if (tx_ring->desc == NULL || tx_ring->tx_buffer == NULL)
 631                 return;
 632
 633         ring_count = tx_ring->count;
 634         /* first unmmap dma */
 635         for (index = 0; index < ring_count; index++) {
 636                 tx_buffer = &tx_ring->tx_buffer[index];
 637                 if (tx_buffer->dma) {
 638                         pci_unmap_page(pdev, tx_buffer->dma,
 639                                         tx_buffer->length, PCI_DMA_TODEVICE);
 640                         tx_buffer->dma = 0;
 641                 }
 642         }
 643         /* second free skb */
 644         for (index = 0; index < ring_count; index++) {
 645                 tx_buffer = &tx_ring->tx_buffer[index];
 646                 if (tx_buffer->skb) {
 647                         dev_kfree_skb_any(tx_buffer->skb);
 648                         tx_buffer->skb = NULL;
 649                 }
 650         }
 651         /* Zero out Tx-buffers */
 652         memset(tx_ring->desc, 0, sizeof(struct atl1e_tpd_desc) *
 653                                 ring_count);
 654         memset(tx_ring->tx_buffer, 0, sizeof(struct atl1e_tx_buffer) *
 655                                 ring_count);
 656 }
 657
 658 /*
 659  * atl1e_clean_rx_ring - Free rx-reservation skbs
 660  * @adapter: board private structure
 661  */
 662 static void atl1e_clean_rx_ring(struct atl1e_adapter *adapter)
 663 {
 664         struct atl1e_rx_ring *rx_ring =
 665                 (struct atl1e_rx_ring *)&adapter->rx_ring;
 666         struct atl1e_rx_page_desc *rx_page_desc = rx_ring->rx_page_desc;
 667         u16 i, j;
 668
 669
 670         if (adapter->ring_vir_addr == NULL)
 671                 return;
 672         /* Zero out the descriptor ring */
 673         for (i = 0; i < adapter->num_rx_queues; i++) {
 674                 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
 675                         if (rx_page_desc[i].rx_page[j].addr != NULL) {
 676                                 memset(rx_page_desc[i].rx_page[j].addr, 0,
 677                                                 rx_ring->real_page_size);
 678                         }
 679                 }
 680         }
 681 }
 682
 683 static void atl1e_cal_ring_size(struct atl1e_adapter *adapter, u32 *ring_size)
 684 {
 685         *ring_size = ((u32)(adapter->tx_ring.count *
 686                      sizeof(struct atl1e_tpd_desc) + 7
 687                         /* tx ring, qword align */
 688                      + adapter->rx_ring.real_page_size * AT_PAGE_NUM_PER_QUEUE *
 689                         adapter->num_rx_queues + 31
 690                         /* rx ring,  32 bytes align */
 691                      + (1 + AT_PAGE_NUM_PER_QUEUE * adapter->num_rx_queues) *
 692                         sizeof(u32) + 3));
 693                         /* tx, rx cmd, dword align   */
 694 }
 695
 696 static void atl1e_init_ring_resources(struct atl1e_adapter *adapter)
 697 {
 698         struct atl1e_tx_ring *tx_ring = NULL;
 699         struct atl1e_rx_ring *rx_ring = NULL;
 700
 701         tx_ring = &adapter->tx_ring;
 702         rx_ring = &adapter->rx_ring;
 703
 704         rx_ring->real_page_size = adapter->rx_ring.page_size
 705                                  + adapter->hw.max_frame_size
 706                                  + ETH_HLEN + VLAN_HLEN
 707                                  + ETH_FCS_LEN;
 708         rx_ring->real_page_size = roundup(rx_ring->real_page_size, 32);
 709         atl1e_cal_ring_size(adapter, &adapter->ring_size);
 710
 711         adapter->ring_vir_addr = NULL;
 712         adapter->rx_ring.desc = NULL;
 713         rwlock_init(&adapter->tx_ring.tx_lock);
 714
 715         return;
 716 }
 717
 718 /*
 719  * Read / Write Ptr Initialize:
 720  */
 721 static void atl1e_init_ring_ptrs(struct atl1e_adapter *adapter)
 722 {
 723         struct atl1e_tx_ring *tx_ring = NULL;
 724         struct atl1e_rx_ring *rx_ring = NULL;
 725         struct atl1e_rx_page_desc *rx_page_desc = NULL;
 726         int i, j;
 727
 728         tx_ring = &adapter->tx_ring;
 729         rx_ring = &adapter->rx_ring;
 730         rx_page_desc = rx_ring->rx_page_desc;
 731
 732         tx_ring->next_to_use = 0;
 733         atomic_set(&tx_ring->next_to_clean, 0);
 734
 735         for (i = 0; i < adapter->num_rx_queues; i++) {
 736                 rx_page_desc[i].rx_using  = 0;
 737                 rx_page_desc[i].rx_nxseq = 0;
 738                 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
 739                         *rx_page_desc[i].rx_page[j].write_offset_addr = 0;
 740                         rx_page_desc[i].rx_page[j].read_offset = 0;
 741                 }
 742         }
 743 }
 744
 745 /*
 746  * atl1e_free_ring_resources - Free Tx / RX descriptor Resources
 747  * @adapter: board private structure
 748  *
 749  * Free all transmit software resources
 750  */
 751 static void atl1e_free_ring_resources(struct atl1e_adapter *adapter)
 752 {
 753         struct pci_dev *pdev = adapter->pdev;
 754
 755         atl1e_clean_tx_ring(adapter);
 756         atl1e_clean_rx_ring(adapter);
 757
 758         if (adapter->ring_vir_addr) {
 759                 pci_free_consistent(pdev, adapter->ring_size,
 760                                 adapter->ring_vir_addr, adapter->ring_dma);
 761                 adapter->ring_vir_addr = NULL;
 762         }
 763
 764         if (adapter->tx_ring.tx_buffer) {
 765                 kfree(adapter->tx_ring.tx_buffer);
 766                 adapter->tx_ring.tx_buffer = NULL;
 767         }
 768 }
 769
 770 /*
 771  * atl1e_setup_mem_resources - allocate Tx / RX descriptor resources
 772  * @adapter: board private structure
 773  *
 774  * Return 0 on success, negative on failure
 775  */
 776 static int atl1e_setup_ring_resources(struct atl1e_adapter *adapter)
 777 {
 778         struct pci_dev *pdev = adapter->pdev;
 779         struct atl1e_tx_ring *tx_ring;
 780         struct atl1e_rx_ring *rx_ring;
 781         struct atl1e_rx_page_desc  *rx_page_desc;
 782         int size, i, j;
 783         u32 offset = 0;
 784         int err = 0;
 785
 786         if (adapter->ring_vir_addr != NULL)
 787                 return 0; /* alloced already */
 788
 789         tx_ring = &adapter->tx_ring;
 790         rx_ring = &adapter->rx_ring;
 791
 792         /* real ring DMA buffer */
 793
 794         size = adapter->ring_size;
 795         adapter->ring_vir_addr = pci_alloc_consistent(pdev,
 796                         adapter->ring_size, &adapter->ring_dma);
 797
 798         if (adapter->ring_vir_addr == NULL) {
 799                 dev_err(&pdev->dev, "pci_alloc_consistent failed, "
 800                                     "size = D%d", size);
 801                 return -ENOMEM;
 802         }
 803
 804         memset(adapter->ring_vir_addr, 0, adapter->ring_size);
 805
 806         rx_page_desc = rx_ring->rx_page_desc;
 807
 808         /* Init TPD Ring */
 809         tx_ring->dma = roundup(adapter->ring_dma, 8);
 810         offset = tx_ring->dma - adapter->ring_dma;
 811         tx_ring->desc = (struct atl1e_tpd_desc *)
 812                         (adapter->ring_vir_addr + offset);
 813         size = sizeof(struct atl1e_tx_buffer) * (tx_ring->count);
 814         tx_ring->tx_buffer = kzalloc(size, GFP_KERNEL);
 815         if (tx_ring->tx_buffer == NULL) {
 816                 dev_err(&pdev->dev, "kzalloc failed , size = D%d", size);
 817                 err = -ENOMEM;
 818                 goto failed;
 819         }
 820
 821         /* Init RXF-Pages */
 822         offset += (sizeof(struct atl1e_tpd_desc) * tx_ring->count);
 823         offset = roundup(offset, 32);
 824
 825         for (i = 0; i < adapter->num_rx_queues; i++) {
 826                 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
 827                         rx_page_desc[i].rx_page[j].dma =
 828                                 adapter->ring_dma + offset;
 829                         rx_page_desc[i].rx_page[j].addr =
 830                                 adapter->ring_vir_addr + offset;
 831                         offset += rx_ring->real_page_size;
 832                 }
 833         }
 834
 835         /* Init CMB dma address */
 836         tx_ring->cmb_dma = adapter->ring_dma + offset;
 837         tx_ring->cmb     = (u32 *)(adapter->ring_vir_addr + offset);
 838         offset += sizeof(u32);
 839
 840         for (i = 0; i < adapter->num_rx_queues; i++) {
 841                 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
 842                         rx_page_desc[i].rx_page[j].write_offset_dma =
 843                                 adapter->ring_dma + offset;
 844                         rx_page_desc[i].rx_page[j].write_offset_addr =
 845                                 adapter->ring_vir_addr + offset;
 846                         offset += sizeof(u32);
 847                 }
 848         }
 849
 850         if (unlikely(offset > adapter->ring_size)) {
 851                 dev_err(&pdev->dev, "offset(%d) > ring size(%d) !!\n",
 852                                 offset, adapter->ring_size);
 853                 err = -1;
 854                 goto failed;
 855         }
 856
 857         return 0;
 858 failed:
 859         if (adapter->ring_vir_addr != NULL) {
 860                 pci_free_consistent(pdev, adapter->ring_size,
 861                                 adapter->ring_vir_addr, adapter->ring_dma);
 862                 adapter->ring_vir_addr = NULL;
 863         }
 864         return err;
 865 }
 866
 867 static inline void atl1e_configure_des_ring(const struct atl1e_adapter *adapter)
 868 {
 869
 870         struct atl1e_hw *hw = (struct atl1e_hw *)&adapter->hw;
 871         struct atl1e_rx_ring *rx_ring =
 872                         (struct atl1e_rx_ring *)&adapter->rx_ring;
 873         struct atl1e_tx_ring *tx_ring =
 874                         (struct atl1e_tx_ring *)&adapter->tx_ring;
 875         struct atl1e_rx_page_desc *rx_page_desc = NULL;
 876         int i, j;
 877
 878         AT_WRITE_REG(hw, REG_DESC_BASE_ADDR_HI,
 879                         (u32)((adapter->ring_dma & AT_DMA_HI_ADDR_MASK) >> 32));
 880         AT_WRITE_REG(hw, REG_TPD_BASE_ADDR_LO,
 881                         (u32)((tx_ring->dma) & AT_DMA_LO_ADDR_MASK));
 882         AT_WRITE_REG(hw, REG_TPD_RING_SIZE, (u16)(tx_ring->count));
 883         AT_WRITE_REG(hw, REG_HOST_TX_CMB_LO,
 884                         (u32)((tx_ring->cmb_dma) & AT_DMA_LO_ADDR_MASK));
 885
 886         rx_page_desc = rx_ring->rx_page_desc;
 887         /* RXF Page Physical address / Page Length */
 888         for (i = 0; i < AT_MAX_RECEIVE_QUEUE; i++) {
 889                 AT_WRITE_REG(hw, atl1e_rx_page_hi_addr_regs[i],
 890                                  (u32)((adapter->ring_dma &
 891                                  AT_DMA_HI_ADDR_MASK) >> 32));
 892                 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
 893                         u32 page_phy_addr;
 894                         u32 offset_phy_addr;
 895
 896                         page_phy_addr = rx_page_desc[i].rx_page[j].dma;
 897                         offset_phy_addr =
 898                                    rx_page_desc[i].rx_page[j].write_offset_dma;
 899
 900                         AT_WRITE_REG(hw, atl1e_rx_page_lo_addr_regs[i][j],
 901                                         page_phy_addr & AT_DMA_LO_ADDR_MASK);
 902                         AT_WRITE_REG(hw, atl1e_rx_page_write_offset_regs[i][j],
 903                                         offset_phy_addr & AT_DMA_LO_ADDR_MASK);
 904                         AT_WRITE_REGB(hw, atl1e_rx_page_vld_regs[i][j], 1);
 905                 }
 906         }
 907         /* Page Length */
 908         AT_WRITE_REG(hw, REG_HOST_RXFPAGE_SIZE, rx_ring->page_size);
 909         /* Load all of base address above */
 910         AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
 911
 912         return;
 913 }
 914
 915 static inline void atl1e_configure_tx(struct atl1e_adapter *adapter)
 916 {
 917         struct atl1e_hw *hw = (struct atl1e_hw *)&adapter->hw;
 918         u32 dev_ctrl_data = 0;
 919         u32 max_pay_load = 0;
 920         u32 jumbo_thresh = 0;
 921         u32 extra_size = 0;     /* Jumbo frame threshold in QWORD unit */
 922
 923         /* configure TXQ param */
 924         if (hw->nic_type != athr_l2e_revB) {
 925                 extra_size = ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN;
 926                 if (hw->max_frame_size <= 1500) {
 927                         jumbo_thresh = hw->max_frame_size + extra_size;
 928                 } else if (hw->max_frame_size < 6*1024) {
 929                         jumbo_thresh =
 930                                 (hw->max_frame_size + extra_size) * 2 / 3;
 931                 } else {
 932                         jumbo_thresh = (hw->max_frame_size + extra_size) / 2;
 933                 }
 934                 AT_WRITE_REG(hw, REG_TX_EARLY_TH, (jumbo_thresh + 7) >> 3);
 935         }
 936
 937         dev_ctrl_data = AT_READ_REG(hw, REG_DEVICE_CTRL);
 938
 939         max_pay_load  = ((dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT)) &
 940                         DEVICE_CTRL_MAX_PAYLOAD_MASK;
 941
 942         hw->dmaw_block = min(max_pay_load, hw->dmaw_block);
 943
 944         max_pay_load  = ((dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT)) &
 945                         DEVICE_CTRL_MAX_RREQ_SZ_MASK;
 946         hw->dmar_block = min(max_pay_load, hw->dmar_block);
 947
 948         if (hw->nic_type != athr_l2e_revB)
 949                 AT_WRITE_REGW(hw, REG_TXQ_CTRL + 2,
 950                               atl1e_pay_load_size[hw->dmar_block]);
 951         /* enable TXQ */
 952         AT_WRITE_REGW(hw, REG_TXQ_CTRL,
 953                         (((u16)hw->tpd_burst & TXQ_CTRL_NUM_TPD_BURST_MASK)
 954                          << TXQ_CTRL_NUM_TPD_BURST_SHIFT)
 955                         | TXQ_CTRL_ENH_MODE | TXQ_CTRL_EN);
 956         return;
 957 }
 958
 959 static inline void atl1e_configure_rx(struct atl1e_adapter *adapter)
 960 {
 961         struct atl1e_hw *hw = (struct atl1e_hw *)&adapter->hw;
 962         u32 rxf_len  = 0;
 963         u32 rxf_low  = 0;
 964         u32 rxf_high = 0;
 965         u32 rxf_thresh_data = 0;
 966         u32 rxq_ctrl_data = 0;
 967
 968         if (hw->nic_type != athr_l2e_revB) {
 969                 AT_WRITE_REGW(hw, REG_RXQ_JMBOSZ_RRDTIM,
 970                               (u16)((hw->rx_jumbo_th & RXQ_JMBOSZ_TH_MASK) <<
 971                               RXQ_JMBOSZ_TH_SHIFT |
 972                               (1 & RXQ_JMBO_LKAH_MASK) <<
 973                               RXQ_JMBO_LKAH_SHIFT));
 974
 975                 rxf_len  = AT_READ_REG(hw, REG_SRAM_RXF_LEN);
 976                 rxf_high = rxf_len * 4 / 5;
 977                 rxf_low  = rxf_len / 5;
 978                 rxf_thresh_data = ((rxf_high  & RXQ_RXF_PAUSE_TH_HI_MASK)
 979                                   << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
 980                                   ((rxf_low & RXQ_RXF_PAUSE_TH_LO_MASK)
 981                                   << RXQ_RXF_PAUSE_TH_LO_SHIFT);
 982
 983                 AT_WRITE_REG(hw, REG_RXQ_RXF_PAUSE_THRESH, rxf_thresh_data);
 984         }
 985
 986         /* RRS */
 987         AT_WRITE_REG(hw, REG_IDT_TABLE, hw->indirect_tab);
 988         AT_WRITE_REG(hw, REG_BASE_CPU_NUMBER, hw->base_cpu);
 989
 990         if (hw->rrs_type & atl1e_rrs_ipv4)
 991                 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV4;
 992
 993         if (hw->rrs_type & atl1e_rrs_ipv4_tcp)
 994                 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV4_TCP;
 995
 996         if (hw->rrs_type & atl1e_rrs_ipv6)
 997                 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV6;
 998
 999         if (hw->rrs_type & atl1e_rrs_ipv6_tcp)
1000                 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV6_TCP;
1001
1002         if (hw->rrs_type != atl1e_rrs_disable)
1003                 rxq_ctrl_data |=
1004                         (RXQ_CTRL_HASH_ENABLE | RXQ_CTRL_RSS_MODE_MQUESINT);
1005
1006         rxq_ctrl_data |= RXQ_CTRL_IPV6_XSUM_VERIFY_EN | RXQ_CTRL_PBA_ALIGN_32 |
1007                          RXQ_CTRL_CUT_THRU_EN | RXQ_CTRL_EN;
1008
1009         AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
1010         return;
1011 }
1012
1013 static inline void atl1e_configure_dma(struct atl1e_adapter *adapter)
1014 {
1015         struct atl1e_hw *hw = &adapter->hw;
1016         u32 dma_ctrl_data = 0;
1017
1018         dma_ctrl_data = DMA_CTRL_RXCMB_EN;
1019         dma_ctrl_data |= (((u32)hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
1020                 << DMA_CTRL_DMAR_BURST_LEN_SHIFT;
1021         dma_ctrl_data |= (((u32)hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
1022                 << DMA_CTRL_DMAW_BURST_LEN_SHIFT;
1023         dma_ctrl_data |= DMA_CTRL_DMAR_REQ_PRI | DMA_CTRL_DMAR_OUT_ORDER;
1024         dma_ctrl_data |= (((u32)hw->dmar_dly_cnt) & DMA_CTRL_DMAR_DLY_CNT_MASK)
1025                 << DMA_CTRL_DMAR_DLY_CNT_SHIFT;
1026         dma_ctrl_data |= (((u32)hw->dmaw_dly_cnt) & DMA_CTRL_DMAW_DLY_CNT_MASK)
1027                 << DMA_CTRL_DMAW_DLY_CNT_SHIFT;
1028
1029         AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
1030         return;
1031 }
1032
1033 static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter)
1034 {
1035         u32 value;
1036         struct atl1e_hw *hw = &adapter->hw;
1037         struct net_device *netdev = adapter->netdev;
1038
1039         /* Config MAC CTRL Register */
1040         value = MAC_CTRL_TX_EN |
1041                 MAC_CTRL_RX_EN ;
1042
1043         if (FULL_DUPLEX == adapter->link_duplex)
1044                 value |= MAC_CTRL_DUPLX;
1045
1046         value |= ((u32)((SPEED_1000 == adapter->link_speed) ?
1047                           MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100) <<
1048                           MAC_CTRL_SPEED_SHIFT);
1049         value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
1050
1051         value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1052         value |= (((u32)adapter->hw.preamble_len &
1053                   MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
1054
1055         if (adapter->vlgrp)
1056                 value |= MAC_CTRL_RMV_VLAN;
1057
1058         value |= MAC_CTRL_BC_EN;
1059         if (netdev->flags & IFF_PROMISC)
1060                 value |= MAC_CTRL_PROMIS_EN;
1061         if (netdev->flags & IFF_ALLMULTI)
1062                 value |= MAC_CTRL_MC_ALL_EN;
1063
1064         AT_WRITE_REG(hw, REG_MAC_CTRL, value);
1065 }
1066
1067 /*
1068  * atl1e_configure - Configure Transmit&Receive Unit after Reset
1069  * @adapter: board private structure
1070  *
1071  * Configure the Tx /Rx unit of the MAC after a reset.
1072  */
1073 static int atl1e_configure(struct atl1e_adapter *adapter)
1074 {
1075         struct atl1e_hw *hw = &adapter->hw;
1076         struct pci_dev *pdev = adapter->pdev;
1077
1078         u32 intr_status_data = 0;
1079
1080         /* clear interrupt status */
1081         AT_WRITE_REG(hw, REG_ISR, ~0);
1082
1083         /* 1. set MAC Address */
1084         atl1e_hw_set_mac_addr(hw);
1085
1086         /* 2. Init the Multicast HASH table done by set_muti */
1087
1088         /* 3. Clear any WOL status */
1089         AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
1090
1091         /* 4. Descripter Ring BaseMem/Length/Read ptr/Write ptr
1092          *    TPD Ring/SMB/RXF0 Page CMBs, they use the same
1093          *    High 32bits memory */
1094         atl1e_configure_des_ring(adapter);
1095
1096         /* 5. set Interrupt Moderator Timer */
1097         AT_WRITE_REGW(hw, REG_IRQ_MODU_TIMER_INIT, hw->imt);
1098         AT_WRITE_REGW(hw, REG_IRQ_MODU_TIMER2_INIT, hw->imt);
1099         AT_WRITE_REG(hw, REG_MASTER_CTRL, MASTER_CTRL_LED_MODE |
1100                         MASTER_CTRL_ITIMER_EN | MASTER_CTRL_ITIMER2_EN);
1101
1102         /* 6. rx/tx threshold to trig interrupt */
1103         AT_WRITE_REGW(hw, REG_TRIG_RRD_THRESH, hw->rrd_thresh);
1104         AT_WRITE_REGW(hw, REG_TRIG_TPD_THRESH, hw->tpd_thresh);
1105         AT_WRITE_REGW(hw, REG_TRIG_RXTIMER, hw->rx_count_down);
1106         AT_WRITE_REGW(hw, REG_TRIG_TXTIMER, hw->tx_count_down);
1107
1108         /* 7. set Interrupt Clear Timer */
1109         AT_WRITE_REGW(hw, REG_CMBDISDMA_TIMER, hw->ict);
1110
1111         /* 8. set MTU */
1112         AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
1113                         VLAN_HLEN + ETH_FCS_LEN);
1114
1115         /* 9. config TXQ early tx threshold */
1116         atl1e_configure_tx(adapter);
1117
1118         /* 10. config RXQ */
1119         atl1e_configure_rx(adapter);
1120
1121         /* 11. config  DMA Engine */
1122         atl1e_configure_dma(adapter);
1123
1124         /* 12. smb timer to trig interrupt */
1125         AT_WRITE_REG(hw, REG_SMB_STAT_TIMER, hw->smb_timer);
1126
1127         intr_status_data = AT_READ_REG(hw, REG_ISR);
1128         if (unlikely((intr_status_data & ISR_PHY_LINKDOWN) != 0)) {
1129                 dev_err(&pdev->dev, "atl1e_configure failed,"
1130                                 "PCIE phy link down\n");
1131                 return -1;
1132         }
1133
1134         AT_WRITE_REG(hw, REG_ISR, 0x7fffffff);
1135         return 0;
1136 }
1137
1138 /*
1139  * atl1e_get_stats - Get System Network Statistics
1140  * @netdev: network interface device structure
1141  *
1142  * Returns the address of the device statistics structure.
1143  * The statistics are actually updated from the timer callback.
1144  */
1145 static struct net_device_stats *atl1e_get_stats(struct net_device *netdev)
1146 {
1147         struct atl1e_adapter *adapter = netdev_priv(netdev);
1148         struct atl1e_hw_stats  *hw_stats = &adapter->hw_stats;
1149         struct net_device_stats *net_stats = &netdev->stats;
1150
1151         net_stats->rx_packets = hw_stats->rx_ok;
1152         net_stats->tx_packets = hw_stats->tx_ok;
1153         net_stats->rx_bytes   = hw_stats->rx_byte_cnt;
1154         net_stats->tx_bytes   = hw_stats->tx_byte_cnt;
1155         net_stats->multicast  = hw_stats->rx_mcast;
1156         net_stats->collisions = hw_stats->tx_1_col +
1157                                 hw_stats->tx_2_col * 2 +
1158                                 hw_stats->tx_late_col + hw_stats->tx_abort_col;
1159
1160         net_stats->rx_errors  = hw_stats->rx_frag + hw_stats->rx_fcs_err +
1161                                 hw_stats->rx_len_err + hw_stats->rx_sz_ov +
1162                                 hw_stats->rx_rrd_ov + hw_stats->rx_align_err;
1163         net_stats->rx_fifo_errors   = hw_stats->rx_rxf_ov;
1164         net_stats->rx_length_errors = hw_stats->rx_len_err;
1165         net_stats->rx_crc_errors    = hw_stats->rx_fcs_err;
1166         net_stats->rx_frame_errors  = hw_stats->rx_align_err;
1167         net_stats->rx_over_errors   = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1168
1169         net_stats->rx_missed_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1170
1171         net_stats->tx_errors = hw_stats->tx_late_col + hw_stats->tx_abort_col +
1172                                hw_stats->tx_underrun + hw_stats->tx_trunc;
1173         net_stats->tx_fifo_errors    = hw_stats->tx_underrun;
1174         net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
1175         net_stats->tx_window_errors  = hw_stats->tx_late_col;
1176
1177         return net_stats;
1178 }
1179
1180 static void atl1e_update_hw_stats(struct atl1e_adapter *adapter)
1181 {
1182         u16 hw_reg_addr = 0;
1183         unsigned long *stats_item = NULL;
1184
1185         /* update rx status */
1186         hw_reg_addr = REG_MAC_RX_STATUS_BIN;
1187         stats_item  = &adapter->hw_stats.rx_ok;
1188         while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
1189                 *stats_item += AT_READ_REG(&adapter->hw, hw_reg_addr);
1190                 stats_item++;
1191                 hw_reg_addr += 4;
1192         }
1193         /* update tx status */
1194         hw_reg_addr = REG_MAC_TX_STATUS_BIN;
1195         stats_item  = &adapter->hw_stats.tx_ok;
1196         while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
1197                 *stats_item += AT_READ_REG(&adapter->hw, hw_reg_addr);
1198                 stats_item++;
1199                 hw_reg_addr += 4;
1200         }
1201 }
1202
1203 static inline void atl1e_clear_phy_int(struct atl1e_adapter *adapter)
1204 {
1205         u16 phy_data;
1206
1207         spin_lock(&adapter->mdio_lock);
1208         atl1e_read_phy_reg(&adapter->hw, MII_INT_STATUS, &phy_data);
1209         spin_unlock(&adapter->mdio_lock);
1210 }
1211
1212 static bool atl1e_clean_tx_irq(struct atl1e_adapter *adapter)
1213 {
1214         struct atl1e_tx_ring *tx_ring = (struct atl1e_tx_ring *)
1215                                         &adapter->tx_ring;
1216         struct atl1e_tx_buffer *tx_buffer = NULL;
1217         u16 hw_next_to_clean = AT_READ_REGW(&adapter->hw, REG_TPD_CONS_IDX);
1218         u16 next_to_clean = atomic_read(&tx_ring->next_to_clean);
1219
1220         while (next_to_clean != hw_next_to_clean) {
1221                 tx_buffer = &tx_ring->tx_buffer[next_to_clean];
1222                 if (tx_buffer->dma) {
1223                         pci_unmap_page(adapter->pdev, tx_buffer->dma,
1224                                         tx_buffer->length, PCI_DMA_TODEVICE);
1225                         tx_buffer->dma = 0;
1226                 }
1227
1228                 if (tx_buffer->skb) {
1229                         dev_kfree_skb_irq(tx_buffer->skb);
1230                         tx_buffer->skb = NULL;
1231                 }
1232
1233                 if (++next_to_clean == tx_ring->count)
1234                         next_to_clean = 0;
1235         }
1236
1237         atomic_set(&tx_ring->next_to_clean, next_to_clean);
1238
1239         if (netif_queue_stopped(adapter->netdev) &&
1240                         netif_carrier_ok(adapter->netdev)) {
1241                 netif_wake_queue(adapter->netdev);
1242         }
1243
1244         return true;
1245 }
1246
1247 /*
1248  * atl1e_intr - Interrupt Handler
1249  * @irq: interrupt number
1250  * @data: pointer to a network interface device structure
1251  * @pt_regs: CPU registers structure
1252  */
1253 static irqreturn_t atl1e_intr(int irq, void *data)
1254 {
1255         struct net_device *netdev  = data;
1256         struct atl1e_adapter *adapter = netdev_priv(netdev);
1257         struct pci_dev *pdev = adapter->pdev;
1258         struct atl1e_hw *hw = &adapter->hw;
1259         int max_ints = AT_MAX_INT_WORK;
1260         int handled = IRQ_NONE;
1261         u32 status;
1262
1263         do {
1264                 status = AT_READ_REG(hw, REG_ISR);
1265                 if ((status & IMR_NORMAL_MASK) == 0 ||
1266                                 (status & ISR_DIS_INT) != 0) {
1267                         if (max_ints != AT_MAX_INT_WORK)
1268                                 handled = IRQ_HANDLED;
1269                         break;
1270                 }
1271                 /* link event */
1272                 if (status & ISR_GPHY)
1273                         atl1e_clear_phy_int(adapter);
1274                 /* Ack ISR */
1275                 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
1276
1277                 handled = IRQ_HANDLED;
1278                 /* check if PCIE PHY Link down */
1279                 if (status & ISR_PHY_LINKDOWN) {
1280                         dev_err(&pdev->dev,
1281                                 "pcie phy linkdown %x\n", status);
1282                         if (netif_running(adapter->netdev)) {
1283                                 /* reset MAC */
1284                                 atl1e_irq_reset(adapter);
1285                                 schedule_work(&adapter->reset_task);
1286                                 break;
1287                         }
1288                 }
1289
1290                 /* check if DMA read/write error */
1291                 if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) {
1292                         dev_err(&pdev->dev,
1293                                 "PCIE DMA RW error (status = 0x%x)\n",
1294                                 status);
1295                         atl1e_irq_reset(adapter);
1296                         schedule_work(&adapter->reset_task);
1297                         break;
1298                 }
1299
1300                 if (status & ISR_SMB)
1301                         atl1e_update_hw_stats(adapter);
1302
1303                 /* link event */
1304                 if (status & (ISR_GPHY | ISR_MANUAL)) {
1305                         netdev->stats.tx_carrier_errors++;
1306                         atl1e_link_chg_event(adapter);
1307                         break;
1308                 }
1309
1310                 /* transmit event */
1311                 if (status & ISR_TX_EVENT)
1312                         atl1e_clean_tx_irq(adapter);
1313
1314                 if (status & ISR_RX_EVENT) {
1315                         /*
1316                          * disable rx interrupts, without
1317                          * the synchronize_irq bit
1318                          */
1319                         AT_WRITE_REG(hw, REG_IMR,
1320                                      IMR_NORMAL_MASK & ~ISR_RX_EVENT);
1321                         AT_WRITE_FLUSH(hw);
1322                         if (likely(napi_schedule_prep(
1323                                    &adapter->napi)))
1324                                 __napi_schedule(&adapter->napi);
1325                 }
1326         } while (--max_ints > 0);
1327         /* re-enable Interrupt*/
1328         AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
1329
1330         return handled;
1331 }
1332
1333 static inline void atl1e_rx_checksum(struct atl1e_adapter *adapter,
1334                   struct sk_buff *skb, struct atl1e_recv_ret_status *prrs)
1335 {
1336         u8 *packet = (u8 *)(prrs + 1);
1337         struct iphdr *iph;
1338         u16 head_len = ETH_HLEN;
1339         u16 pkt_flags;
1340         u16 err_flags;
1341
1342         skb->ip_summed = CHECKSUM_NONE;
1343         pkt_flags = prrs->pkt_flag;
1344         err_flags = prrs->err_flag;
1345         if (((pkt_flags & RRS_IS_IPV4) || (pkt_flags & RRS_IS_IPV6)) &&
1346                 ((pkt_flags & RRS_IS_TCP) || (pkt_flags & RRS_IS_UDP))) {
1347                 if (pkt_flags & RRS_IS_IPV4) {
1348                         if (pkt_flags & RRS_IS_802_3)
1349                                 head_len += 8;
1350                         iph = (struct iphdr *) (packet + head_len);
1351                         if (iph->frag_off != 0 && !(pkt_flags & RRS_IS_IP_DF))
1352                                 goto hw_xsum;
1353                 }
1354                 if (!(err_flags & (RRS_ERR_IP_CSUM | RRS_ERR_L4_CSUM))) {
1355                         skb->ip_summed = CHECKSUM_UNNECESSARY;
1356                         return;
1357                 }
1358         }
1359
1360 hw_xsum :
1361         return;
1362 }
1363
1364 static struct atl1e_rx_page *atl1e_get_rx_page(struct atl1e_adapter *adapter,
1365                                                u8 que)
1366 {
1367         struct atl1e_rx_page_desc *rx_page_desc =
1368                 (struct atl1e_rx_page_desc *) adapter->rx_ring.rx_page_desc;
1369         u8 rx_using = rx_page_desc[que].rx_using;
1370
1371         return (struct atl1e_rx_page *)&(rx_page_desc[que].rx_page[rx_using]);
1372 }
1373
1374 static void atl1e_clean_rx_irq(struct atl1e_adapter *adapter, u8 que,
1375                    int *work_done, int work_to_do)
1376 {
1377         struct pci_dev *pdev = adapter->pdev;
1378         struct net_device *netdev  = adapter->netdev;
1379         struct atl1e_rx_ring *rx_ring = (struct atl1e_rx_ring *)
1380                                          &adapter->rx_ring;
1381         struct atl1e_rx_page_desc *rx_page_desc =
1382                 (struct atl1e_rx_page_desc *) rx_ring->rx_page_desc;
1383         struct sk_buff *skb = NULL;
1384         struct atl1e_rx_page *rx_page = atl1e_get_rx_page(adapter, que);
1385         u32 packet_size, write_offset;
1386         struct atl1e_recv_ret_status *prrs;
1387
1388         write_offset = *(rx_page->write_offset_addr);
1389         if (likely(rx_page->read_offset < write_offset)) {
1390                 do {
1391                         if (*work_done >= work_to_do)
1392                                 break;
1393                         (*work_done)++;
1394                         /* get new packet's  rrs */
1395                         prrs = (struct atl1e_recv_ret_status *) (rx_page->addr +
1396                                                  rx_page->read_offset);
1397                         /* check sequence number */
1398                         if (prrs->seq_num != rx_page_desc[que].rx_nxseq) {
1399                                 dev_err(&pdev->dev,
1400                                         "rx sequence number"
1401                                         " error (rx=%d) (expect=%d)\n",
1402                                         prrs->seq_num,
1403                                         rx_page_desc[que].rx_nxseq);
1404                                 rx_page_desc[que].rx_nxseq++;
1405                                 /* just for debug use */
1406                                 AT_WRITE_REG(&adapter->hw, REG_DEBUG_DATA0,
1407                                              (((u32)prrs->seq_num) << 16) |
1408                                              rx_page_desc[que].rx_nxseq);
1409                                 goto fatal_err;
1410                         }
1411                         rx_page_desc[que].rx_nxseq++;
1412
1413                         /* error packet */
1414                         if (prrs->pkt_flag & RRS_IS_ERR_FRAME) {
1415                                 if (prrs->err_flag & (RRS_ERR_BAD_CRC |
1416                                         RRS_ERR_DRIBBLE | RRS_ERR_CODE |
1417                                         RRS_ERR_TRUNC)) {
1418                                 /* hardware error, discard this packet*/
1419                                         dev_err(&pdev->dev,
1420                                                 "rx packet desc error %x\n",
1421                                                 *((u32 *)prrs + 1));
1422                                         goto skip_pkt;
1423                                 }
1424                         }
1425
1426                         packet_size = ((prrs->word1 >> RRS_PKT_SIZE_SHIFT) &
1427                                         RRS_PKT_SIZE_MASK) - 4; /* CRC */
1428                         skb = netdev_alloc_skb(netdev,
1429                                                packet_size + NET_IP_ALIGN);
1430                         if (skb == NULL) {
1431                                 dev_warn(&pdev->dev, "%s: Memory squeeze,"
1432                                         "deferring packet.\n", netdev->name);
1433                                 goto skip_pkt;
1434                         }
1435                         skb_reserve(skb, NET_IP_ALIGN);
1436                         skb->dev = netdev;
1437                         memcpy(skb->data, (u8 *)(prrs + 1), packet_size);
1438                         skb_put(skb, packet_size);
1439                         skb->protocol = eth_type_trans(skb, netdev);
1440                         atl1e_rx_checksum(adapter, skb, prrs);
1441
1442                         if (unlikely(adapter->vlgrp &&
1443                                 (prrs->pkt_flag & RRS_IS_VLAN_TAG))) {
1444                                 u16 vlan_tag = (prrs->vtag >> 4) |
1445                                                ((prrs->vtag & 7) << 13) |
1446                                                ((prrs->vtag & 8) << 9);
1447                                 dev_dbg(&pdev->dev,
1448                                         "RXD VLAN TAG<RRD>=0x%04x\n",
1449                                         prrs->vtag);
1450                                 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
1451                                                          vlan_tag);
1452                         } else {
1453                                 netif_receive_skb(skb);
1454                         }
1455
1456 skip_pkt:
1457         /* skip current packet whether it's ok or not. */
1458                         rx_page->read_offset +=
1459                                 (((u32)((prrs->word1 >> RRS_PKT_SIZE_SHIFT) &
1460                                 RRS_PKT_SIZE_MASK) +
1461                                 sizeof(struct atl1e_recv_ret_status) + 31) &
1462                                                 0xFFFFFFE0);
1463
1464                         if (rx_page->read_offset >= rx_ring->page_size) {
1465                                 /* mark this page clean */
1466                                 u16 reg_addr;
1467                                 u8  rx_using;
1468
1469                                 rx_page->read_offset =
1470                                         *(rx_page->write_offset_addr) = 0;
1471                                 rx_using = rx_page_desc[que].rx_using;
1472                                 reg_addr =
1473                                         atl1e_rx_page_vld_regs[que][rx_using];
1474                                 AT_WRITE_REGB(&adapter->hw, reg_addr, 1);
1475                                 rx_page_desc[que].rx_using ^= 1;
1476                                 rx_page = atl1e_get_rx_page(adapter, que);
1477                         }
1478                         write_offset = *(rx_page->write_offset_addr);
1479                 } while (rx_page->read_offset < write_offset);
1480         }
1481
1482         return;
1483
1484 fatal_err:
1485         if (!test_bit(__AT_DOWN, &adapter->flags))
1486                 schedule_work(&adapter->reset_task);
1487 }
1488
1489 /*
1490  * atl1e_clean - NAPI Rx polling callback
1491  * @adapter: board private structure
1492  */
1493 static int atl1e_clean(struct napi_struct *napi, int budget)
1494 {
1495         struct atl1e_adapter *adapter =
1496                         container_of(napi, struct atl1e_adapter, napi);
1497         struct pci_dev    *pdev    = adapter->pdev;
1498         u32 imr_data;
1499         int work_done = 0;
1500
1501         /* Keep link state information with original netdev */
1502         if (!netif_carrier_ok(adapter->netdev))
1503                 goto quit_polling;
1504
1505         atl1e_clean_rx_irq(adapter, 0, &work_done, budget);
1506
1507         /* If no Tx and not enough Rx work done, exit the polling mode */
1508         if (work_done < budget) {
1509 quit_polling:
1510                 napi_complete(napi);
1511                 imr_data = AT_READ_REG(&adapter->hw, REG_IMR);
1512                 AT_WRITE_REG(&adapter->hw, REG_IMR, imr_data | ISR_RX_EVENT);
1513                 /* test debug */
1514                 if (test_bit(__AT_DOWN, &adapter->flags)) {
1515                         atomic_dec(&adapter->irq_sem);
1516                         dev_err(&pdev->dev,
1517                                 "atl1e_clean is called when AT_DOWN\n");
1518                 }
1519                 /* reenable RX intr */
1520                 /*atl1e_irq_enable(adapter); */
1521
1522         }
1523         return work_done;
1524 }
1525
1526 #ifdef CONFIG_NET_POLL_CONTROLLER
1527
1528 /*
1529  * Polling 'interrupt' - used by things like netconsole to send skbs
1530  * without having to re-enable interrupts. It's not called while
1531  * the interrupt routine is executing.
1532  */
1533 static void atl1e_netpoll(struct net_device *netdev)
1534 {
1535         struct atl1e_adapter *adapter = netdev_priv(netdev);
1536
1537         disable_irq(adapter->pdev->irq);
1538         atl1e_intr(adapter->pdev->irq, netdev);
1539         enable_irq(adapter->pdev->irq);
1540 }
1541 #endif
1542
1543 static inline u16 atl1e_tpd_avail(struct atl1e_adapter *adapter)
1544 {
1545         struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1546         u16 next_to_use = 0;
1547         u16 next_to_clean = 0;
1548
1549         next_to_clean = atomic_read(&tx_ring->next_to_clean);
1550         next_to_use   = tx_ring->next_to_use;
1551
1552         return (u16)(next_to_clean > next_to_use) ?
1553                 (next_to_clean - next_to_use - 1) :
1554                 (tx_ring->count + next_to_clean - next_to_use - 1);
1555 }
1556
1557 /*
1558  * get next usable tpd
1559  * Note: should call atl1e_tdp_avail to make sure
1560  * there is enough tpd to use
1561  */
1562 static struct atl1e_tpd_desc *atl1e_get_tpd(struct atl1e_adapter *adapter)
1563 {
1564         struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1565         u16 next_to_use = 0;
1566
1567         next_to_use = tx_ring->next_to_use;
1568         if (++tx_ring->next_to_use == tx_ring->count)
1569                 tx_ring->next_to_use = 0;
1570
1571         memset(&tx_ring->desc[next_to_use], 0, sizeof(struct atl1e_tpd_desc));
1572         return (struct atl1e_tpd_desc *)&tx_ring->desc[next_to_use];
1573 }
1574
1575 static struct atl1e_tx_buffer *
1576 atl1e_get_tx_buffer(struct atl1e_adapter *adapter, struct atl1e_tpd_desc *tpd)
1577 {
1578         struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1579
1580         return &tx_ring->tx_buffer[tpd - tx_ring->desc];
1581 }
1582
1583 /* Calculate the transmit packet descript needed*/
1584 static u16 atl1e_cal_tdp_req(const struct sk_buff *skb)
1585 {
1586         int i = 0;
1587         u16 tpd_req = 1;
1588         u16 fg_size = 0;
1589         u16 proto_hdr_len = 0;
1590
1591         for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1592                 fg_size = skb_shinfo(skb)->frags[i].size;
1593                 tpd_req += ((fg_size + MAX_TX_BUF_LEN - 1) >> MAX_TX_BUF_SHIFT);
1594         }
1595
1596         if (skb_is_gso(skb)) {
1597                 if (skb->protocol == htons(ETH_P_IP) ||
1598                    (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6)) {
1599                         proto_hdr_len = skb_transport_offset(skb) +
1600                                         tcp_hdrlen(skb);
1601                         if (proto_hdr_len < skb_headlen(skb)) {
1602                                 tpd_req += ((skb_headlen(skb) - proto_hdr_len +
1603                                            MAX_TX_BUF_LEN - 1) >>
1604                                            MAX_TX_BUF_SHIFT);
1605                         }
1606                 }
1607
1608         }
1609         return tpd_req;
1610 }
1611
1612 static int atl1e_tso_csum(struct atl1e_adapter *adapter,
1613                        struct sk_buff *skb, struct atl1e_tpd_desc *tpd)
1614 {
1615         struct pci_dev *pdev = adapter->pdev;
1616         u8 hdr_len;
1617         u32 real_len;
1618         unsigned short offload_type;
1619         int err;
1620
1621         if (skb_is_gso(skb)) {
1622                 if (skb_header_cloned(skb)) {
1623                         err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1624                         if (unlikely(err))
1625                                 return -1;
1626                 }
1627                 offload_type = skb_shinfo(skb)->gso_type;
1628
1629                 if (offload_type & SKB_GSO_TCPV4) {
1630                         real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
1631                                         + ntohs(ip_hdr(skb)->tot_len));
1632
1633                         if (real_len < skb->len)
1634                                 pskb_trim(skb, real_len);
1635
1636                         hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
1637                         if (unlikely(skb->len == hdr_len)) {
1638                                 /* only xsum need */
1639                                 dev_warn(&pdev->dev,
1640                                       "IPV4 tso with zero data??\n");
1641                                 goto check_sum;
1642                         } else {
1643                                 ip_hdr(skb)->check = 0;
1644                                 ip_hdr(skb)->tot_len = 0;
1645                                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(
1646                                                         ip_hdr(skb)->saddr,
1647                                                         ip_hdr(skb)->daddr,
1648                                                         0, IPPROTO_TCP, 0);
1649                                 tpd->word3 |= (ip_hdr(skb)->ihl &
1650                                         TDP_V4_IPHL_MASK) <<
1651                                         TPD_V4_IPHL_SHIFT;
1652                                 tpd->word3 |= ((tcp_hdrlen(skb) >> 2) &
1653                                         TPD_TCPHDRLEN_MASK) <<
1654                                         TPD_TCPHDRLEN_SHIFT;
1655                                 tpd->word3 |= ((skb_shinfo(skb)->gso_size) &
1656                                         TPD_MSS_MASK) << TPD_MSS_SHIFT;
1657                                 tpd->word3 |= 1 << TPD_SEGMENT_EN_SHIFT;
1658                         }
1659                         return 0;
1660                 }
1661
1662                 if (offload_type & SKB_GSO_TCPV6) {
1663                         real_len = (((unsigned char *)ipv6_hdr(skb) - skb->data)
1664                                         + ntohs(ipv6_hdr(skb)->payload_len));
1665                         if (real_len < skb->len)
1666                                 pskb_trim(skb, real_len);
1667
1668                         /* check payload == 0 byte ? */
1669                         hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
1670                         if (unlikely(skb->len == hdr_len)) {
1671                                 /* only xsum need */
1672                                 dev_warn(&pdev->dev,
1673                                         "IPV6 tso with zero data??\n");
1674                                 goto check_sum;
1675                         } else {
1676                                 tcp_hdr(skb)->check = ~csum_ipv6_magic(
1677                                                 &ipv6_hdr(skb)->saddr,
1678                                                 &ipv6_hdr(skb)->daddr,
1679                                                 0, IPPROTO_TCP, 0);
1680                                 tpd->word3 |= 1 << TPD_IP_VERSION_SHIFT;
1681                                 hdr_len >>= 1;
1682                                 tpd->word3 |= (hdr_len & TPD_V6_IPHLLO_MASK) <<
1683                                         TPD_V6_IPHLLO_SHIFT;
1684                                 tpd->word3 |= ((hdr_len >> 3) &
1685                                         TPD_V6_IPHLHI_MASK) <<
1686                                         TPD_V6_IPHLHI_SHIFT;
1687                                 tpd->word3 |= (tcp_hdrlen(skb) >> 2 &
1688                                         TPD_TCPHDRLEN_MASK) <<
1689                                         TPD_TCPHDRLEN_SHIFT;
1690                                 tpd->word3 |= ((skb_shinfo(skb)->gso_size) &
1691                                         TPD_MSS_MASK) << TPD_MSS_SHIFT;
1692                                         tpd->word3 |= 1 << TPD_SEGMENT_EN_SHIFT;
1693                         }
1694                 }
1695                 return 0;
1696         }
1697
1698 check_sum:
1699         if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1700                 u8 css, cso;
1701
1702                 cso = skb_transport_offset(skb);
1703                 if (unlikely(cso & 0x1)) {
1704                         dev_err(&adapter->pdev->dev,
1705                            "pay load offset should not ant event number\n");
1706                         return -1;
1707                 } else {
1708                         css = cso + skb->csum_offset;
1709                         tpd->word3 |= (cso & TPD_PLOADOFFSET_MASK) <<
1710                                         TPD_PLOADOFFSET_SHIFT;
1711                         tpd->word3 |= (css & TPD_CCSUMOFFSET_MASK) <<
1712                                         TPD_CCSUMOFFSET_SHIFT;
1713                         tpd->word3 |= 1 << TPD_CC_SEGMENT_EN_SHIFT;
1714                 }
1715         }
1716
1717         return 0;
1718 }
1719
1720 static void atl1e_tx_map(struct atl1e_adapter *adapter,
1721                       struct sk_buff *skb, struct atl1e_tpd_desc *tpd)
1722 {
1723         struct atl1e_tpd_desc *use_tpd = NULL;
1724         struct atl1e_tx_buffer *tx_buffer = NULL;
1725         u16 buf_len = skb->len - skb->data_len;
1726         u16 map_len = 0;
1727         u16 mapped_len = 0;
1728         u16 hdr_len = 0;
1729         u16 nr_frags;
1730         u16 f;
1731         int segment;
1732
1733         nr_frags = skb_shinfo(skb)->nr_frags;
1734         segment = (tpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK;
1735         if (segment) {
1736                 /* TSO */
1737                 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
1738                 use_tpd = tpd;
1739
1740                 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd);
1741                 tx_buffer->length = map_len;
1742                 tx_buffer->dma = pci_map_single(adapter->pdev,
1743                                         skb->data, hdr_len, PCI_DMA_TODEVICE);
1744                 mapped_len += map_len;
1745                 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma);
1746                 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) |
1747                         ((cpu_to_le32(tx_buffer->length) &
1748                         TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT);
1749         }
1750
1751         while (mapped_len < buf_len) {
1752                 /* mapped_len == 0, means we should use the first tpd,
1753                    which is given by caller  */
1754                 if (mapped_len == 0) {
1755                         use_tpd = tpd;
1756                 } else {
1757                         use_tpd = atl1e_get_tpd(adapter);
1758                         memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc));
1759                 }
1760                 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd);
1761                 tx_buffer->skb = NULL;
1762
1763                 tx_buffer->length = map_len =
1764                         ((buf_len - mapped_len) >= MAX_TX_BUF_LEN) ?
1765                         MAX_TX_BUF_LEN : (buf_len - mapped_len);
1766                 tx_buffer->dma =
1767                         pci_map_single(adapter->pdev, skb->data + mapped_len,
1768                                         map_len, PCI_DMA_TODEVICE);
1769                 mapped_len  += map_len;
1770                 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma);
1771                 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) |
1772                         ((cpu_to_le32(tx_buffer->length) &
1773                         TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT);
1774         }
1775
1776         for (f = 0; f < nr_frags; f++) {
1777                 struct skb_frag_struct *frag;
1778                 u16 i;
1779                 u16 seg_num;
1780
1781                 frag = &skb_shinfo(skb)->frags[f];
1782                 buf_len = frag->size;
1783
1784                 seg_num = (buf_len + MAX_TX_BUF_LEN - 1) / MAX_TX_BUF_LEN;
1785                 for (i = 0; i < seg_num; i++) {
1786                         use_tpd = atl1e_get_tpd(adapter);
1787                         memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc));
1788
1789                         tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd);
1790                         BUG_ON(tx_buffer->skb);
1791
1792                         tx_buffer->skb = NULL;
1793                         tx_buffer->length =
1794                                 (buf_len > MAX_TX_BUF_LEN) ?
1795                                 MAX_TX_BUF_LEN : buf_len;
1796                         buf_len -= tx_buffer->length;
1797
1798                         tx_buffer->dma =
1799                                 pci_map_page(adapter->pdev, frag->page,
1800                                                 frag->page_offset +
1801                                                 (i * MAX_TX_BUF_LEN),
1802                                                 tx_buffer->length,
1803                                                 PCI_DMA_TODEVICE);
1804                         use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma);
1805                         use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) |
1806                                         ((cpu_to_le32(tx_buffer->length) &
1807                                         TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT);
1808                 }
1809         }
1810
1811         if ((tpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK)
1812                 /* note this one is a tcp header */
1813                 tpd->word3 |= 1 << TPD_HDRFLAG_SHIFT;
1814         /* The last tpd */
1815
1816         use_tpd->word3 |= 1 << TPD_EOP_SHIFT;
1817         /* The last buffer info contain the skb address,
1818            so it will be free after unmap */
1819         tx_buffer->skb = skb;
1820 }
1821
1822 static void atl1e_tx_queue(struct atl1e_adapter *adapter, u16 count,
1823                            struct atl1e_tpd_desc *tpd)
1824 {
1825         struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1826         /* Force memory writes to complete before letting h/w
1827          * know there are new descriptors to fetch.  (Only
1828          * applicable for weak-ordered memory model archs,
1829          * such as IA-64). */
1830         wmb();
1831         AT_WRITE_REG(&adapter->hw, REG_MB_TPD_PROD_IDX, tx_ring->next_to_use);
1832 }
1833
1834 static netdev_tx_t atl1e_xmit_frame(struct sk_buff *skb,
1835                                           struct net_device *netdev)
1836 {
1837         struct atl1e_adapter *adapter = netdev_priv(netdev);
1838         unsigned long flags;
1839         u16 tpd_req = 1;
1840         struct atl1e_tpd_desc *tpd;
1841
1842         if (test_bit(__AT_DOWN, &adapter->flags)) {
1843                 dev_kfree_skb_any(skb);
1844                 return NETDEV_TX_OK;
1845         }
1846
1847         if (unlikely(skb->len <= 0)) {
1848                 dev_kfree_skb_any(skb);
1849                 return NETDEV_TX_OK;
1850         }
1851         tpd_req = atl1e_cal_tdp_req(skb);
1852         if (!spin_trylock_irqsave(&adapter->tx_lock, flags))
1853                 return NETDEV_TX_LOCKED;
1854
1855         if (atl1e_tpd_avail(adapter) < tpd_req) {
1856                 /* no enough descriptor, just stop queue */
1857                 netif_stop_queue(netdev);
1858                 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1859                 return NETDEV_TX_BUSY;
1860         }
1861
1862         tpd = atl1e_get_tpd(adapter);
1863
1864         if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1865                 u16 vlan_tag = vlan_tx_tag_get(skb);
1866                 u16 atl1e_vlan_tag;
1867
1868                 tpd->word3 |= 1 << TPD_INS_VL_TAG_SHIFT;
1869                 AT_VLAN_TAG_TO_TPD_TAG(vlan_tag, atl1e_vlan_tag);
1870                 tpd->word2 |= (atl1e_vlan_tag & TPD_VLANTAG_MASK) <<
1871                                 TPD_VLAN_SHIFT;
1872         }
1873
1874         if (skb->protocol == htons(ETH_P_8021Q))
1875                 tpd->word3 |= 1 << TPD_VL_TAGGED_SHIFT;
1876
1877         if (skb_network_offset(skb) != ETH_HLEN)
1878                 tpd->word3 |= 1 << TPD_ETHTYPE_SHIFT; /* 802.3 frame */
1879
1880         /* do TSO and check sum */
1881         if (atl1e_tso_csum(adapter, skb, tpd) != 0) {
1882                 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1883                 dev_kfree_skb_any(skb);
1884                 return NETDEV_TX_OK;
1885         }
1886
1887         atl1e_tx_map(adapter, skb, tpd);
1888         atl1e_tx_queue(adapter, tpd_req, tpd);
1889
1890         netdev->trans_start = jiffies; /* NETIF_F_LLTX driver :( */
1891         spin_unlock_irqrestore(&adapter->tx_lock, flags);
1892         return NETDEV_TX_OK;
1893 }
1894
1895 static void atl1e_free_irq(struct atl1e_adapter *adapter)
1896 {
1897         struct net_device *netdev = adapter->netdev;
1898
1899         free_irq(adapter->pdev->irq, netdev);
1900
1901         if (adapter->have_msi)
1902                 pci_disable_msi(adapter->pdev);
1903 }
1904
1905 static int atl1e_request_irq(struct atl1e_adapter *adapter)
1906 {
1907         struct pci_dev    *pdev   = adapter->pdev;
1908         struct net_device *netdev = adapter->netdev;
1909         int flags = 0;
1910         int err = 0;
1911
1912         adapter->have_msi = true;
1913         err = pci_enable_msi(adapter->pdev);
1914         if (err) {
1915                 dev_dbg(&pdev->dev,
1916                         "Unable to allocate MSI interrupt Error: %d\n", err);
1917                 adapter->have_msi = false;
1918         } else
1919                 netdev->irq = pdev->irq;
1920
1921
1922         if (!adapter->have_msi)
1923                 flags |= IRQF_SHARED;
1924         err = request_irq(adapter->pdev->irq, &atl1e_intr, flags,
1925                         netdev->name, netdev);
1926         if (err) {
1927                 dev_dbg(&pdev->dev,
1928                         "Unable to allocate interrupt Error: %d\n", err);
1929                 if (adapter->have_msi)
1930                         pci_disable_msi(adapter->pdev);
1931                 return err;
1932         }
1933         dev_dbg(&pdev->dev, "atl1e_request_irq OK\n");
1934         return err;
1935 }
1936
1937 int atl1e_up(struct atl1e_adapter *adapter)
1938 {
1939         struct net_device *netdev = adapter->netdev;
1940         int err = 0;
1941         u32 val;
1942
1943         /* hardware has been reset, we need to reload some things */
1944         err = atl1e_init_hw(&adapter->hw);
1945         if (err) {
1946                 err = -EIO;
1947                 return err;
1948         }
1949         atl1e_init_ring_ptrs(adapter);
1950         atl1e_set_multi(netdev);
1951         atl1e_restore_vlan(adapter);
1952
1953         if (atl1e_configure(adapter)) {
1954                 err = -EIO;
1955                 goto err_up;
1956         }
1957
1958         clear_bit(__AT_DOWN, &adapter->flags);
1959         napi_enable(&adapter->napi);
1960         atl1e_irq_enable(adapter);
1961         val = AT_READ_REG(&adapter->hw, REG_MASTER_CTRL);
1962         AT_WRITE_REG(&adapter->hw, REG_MASTER_CTRL,
1963                       val | MASTER_CTRL_MANUAL_INT);
1964
1965 err_up:
1966         return err;
1967 }
1968
1969 void atl1e_down(struct atl1e_adapter *adapter)
1970 {
1971         struct net_device *netdev = adapter->netdev;
1972
1973         /* signal that we're down so the interrupt handler does not
1974          * reschedule our watchdog timer */
1975         set_bit(__AT_DOWN, &adapter->flags);
1976
1977 #ifdef NETIF_F_LLTX
1978         netif_stop_queue(netdev);
1979 #else
1980         netif_tx_disable(netdev);
1981 #endif
1982
1983         /* reset MAC to disable all RX/TX */
1984         atl1e_reset_hw(&adapter->hw);
1985         msleep(1);
1986
1987         napi_disable(&adapter->napi);
1988         atl1e_del_timer(adapter);
1989         atl1e_irq_disable(adapter);
1990
1991         netif_carrier_off(netdev);
1992         adapter->link_speed = SPEED_0;
1993         adapter->link_duplex = -1;
1994         atl1e_clean_tx_ring(adapter);
1995         atl1e_clean_rx_ring(adapter);
1996 }
1997
1998 /*
1999  * atl1e_open - Called when a network interface is made active
2000  * @netdev: network interface device structure
2001  *
2002  * Returns 0 on success, negative value on failure
2003  *
2004  * The open entry point is called when a network interface is made
2005  * active by the system (IFF_UP).  At this point all resources needed
2006  * for transmit and receive operations are allocated, the interrupt
2007  * handler is registered with the OS, the watchdog timer is started,
2008  * and the stack is notified that the interface is ready.
2009  */
2010 static int atl1e_open(struct net_device *netdev)
2011 {
2012         struct atl1e_adapter *adapter = netdev_priv(netdev);
2013         int err;
2014
2015         /* disallow open during test */
2016         if (test_bit(__AT_TESTING, &adapter->flags))
2017                 return -EBUSY;
2018
2019         /* allocate rx/tx dma buffer & descriptors */
2020         atl1e_init_ring_resources(adapter);
2021         err = atl1e_setup_ring_resources(adapter);
2022         if (unlikely(err))
2023                 return err;
2024
2025         err = atl1e_request_irq(adapter);
2026         if (unlikely(err))
2027                 goto err_req_irq;
2028
2029         err = atl1e_up(adapter);
2030         if (unlikely(err))
2031                 goto err_up;
2032
2033         return 0;
2034
2035 err_up:
2036         atl1e_free_irq(adapter);
2037 err_req_irq:
2038         atl1e_free_ring_resources(adapter);
2039         atl1e_reset_hw(&adapter->hw);
2040
2041         return err;
2042 }
2043
2044 /*
2045  * atl1e_close - Disables a network interface
2046  * @netdev: network interface device structure
2047  *
2048  * Returns 0, this is not allowed to fail
2049  *
2050  * The close entry point is called when an interface is de-activated
2051  * by the OS.  The hardware is still under the drivers control, but
2052  * needs to be disabled.  A global MAC reset is issued to stop the
2053  * hardware, and all transmit and receive resources are freed.
2054  */
2055 static int atl1e_close(struct net_device *netdev)
2056 {
2057         struct atl1e_adapter *adapter = netdev_priv(netdev);
2058
2059         WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2060         atl1e_down(adapter);
2061         atl1e_free_irq(adapter);
2062         atl1e_free_ring_resources(adapter);
2063
2064         return 0;
2065 }
2066
2067 static int atl1e_suspend(struct pci_dev *pdev, pm_message_t state)
2068 {
2069         struct net_device *netdev = pci_get_drvdata(pdev);
2070         struct atl1e_adapter *adapter = netdev_priv(netdev);
2071         struct atl1e_hw *hw = &adapter->hw;
2072         u32 ctrl = 0;
2073         u32 mac_ctrl_data = 0;
2074         u32 wol_ctrl_data = 0;
2075         u16 mii_advertise_data = 0;
2076         u16 mii_bmsr_data = 0;
2077         u16 mii_intr_status_data = 0;
2078         u32 wufc = adapter->wol;
2079         u32 i;
2080 #ifdef CONFIG_PM
2081         int retval = 0;
2082 #endif
2083
2084         if (netif_running(netdev)) {
2085                 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2086                 atl1e_down(adapter);
2087         }
2088         netif_device_detach(netdev);
2089
2090 #ifdef CONFIG_PM
2091         retval = pci_save_state(pdev);
2092         if (retval)
2093                 return retval;
2094 #endif
2095
2096         if (wufc) {
2097                 /* get link status */
2098                 atl1e_read_phy_reg(hw, MII_BMSR, (u16 *)&mii_bmsr_data);
2099                 atl1e_read_phy_reg(hw, MII_BMSR, (u16 *)&mii_bmsr_data);
2100
2101                 mii_advertise_data = MII_AR_10T_HD_CAPS;
2102
2103                 if ((atl1e_write_phy_reg(hw, MII_AT001_CR, 0) != 0) ||
2104                     (atl1e_write_phy_reg(hw,
2105                            MII_ADVERTISE, mii_advertise_data) != 0) ||
2106                     (atl1e_phy_commit(hw)) != 0) {
2107                         dev_dbg(&pdev->dev, "set phy register failed\n");
2108                         goto wol_dis;
2109                 }
2110
2111                 hw->phy_configured = false; /* re-init PHY when resume */
2112
2113                 /* turn on magic packet wol */
2114                 if (wufc & AT_WUFC_MAG)
2115                         wol_ctrl_data |= WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
2116
2117                 if (wufc & AT_WUFC_LNKC) {
2118                 /* if orignal link status is link, just wait for retrive link */
2119                         if (mii_bmsr_data & BMSR_LSTATUS) {
2120                                 for (i = 0; i < AT_SUSPEND_LINK_TIMEOUT; i++) {
2121                                         msleep(100);
2122                                         atl1e_read_phy_reg(hw, MII_BMSR,
2123                                                         (u16 *)&mii_bmsr_data);
2124                                         if (mii_bmsr_data & BMSR_LSTATUS)
2125                                                 break;
2126                                 }
2127
2128                                 if ((mii_bmsr_data & BMSR_LSTATUS) == 0)
2129                                         dev_dbg(&pdev->dev,
2130                                                 "%s: Link may change"
2131                                                 "when suspend\n",
2132                                                 atl1e_driver_name);
2133                         }
2134                         wol_ctrl_data |=  WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN;
2135                         /* only link up can wake up */
2136                         if (atl1e_write_phy_reg(hw, MII_INT_CTRL, 0x400) != 0) {
2137                                 dev_dbg(&pdev->dev, "%s: read write phy "
2138                                                   "register failed.\n",
2139                                                   atl1e_driver_name);
2140                                 goto wol_dis;
2141                         }
2142                 }
2143                 /* clear phy interrupt */
2144                 atl1e_read_phy_reg(hw, MII_INT_STATUS, &mii_intr_status_data);
2145                 /* Config MAC Ctrl register */
2146                 mac_ctrl_data = MAC_CTRL_RX_EN;
2147                 /* set to 10/100M halt duplex */
2148                 mac_ctrl_data |= MAC_CTRL_SPEED_10_100 << MAC_CTRL_SPEED_SHIFT;
2149                 mac_ctrl_data |= (((u32)adapter->hw.preamble_len &
2150                                  MAC_CTRL_PRMLEN_MASK) <<
2151                                  MAC_CTRL_PRMLEN_SHIFT);
2152
2153                 if (adapter->vlgrp)
2154                         mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
2155
2156                 /* magic packet maybe Broadcast&multicast&Unicast frame */
2157                 if (wufc & AT_WUFC_MAG)
2158                         mac_ctrl_data |= MAC_CTRL_BC_EN;
2159
2160                 dev_dbg(&pdev->dev,
2161                         "%s: suspend MAC=0x%x\n",
2162                         atl1e_driver_name, mac_ctrl_data);
2163
2164                 AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data);
2165                 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
2166                 /* pcie patch */
2167                 ctrl = AT_READ_REG(hw, REG_PCIE_PHYMISC);
2168                 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2169                 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
2170                 pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
2171                 goto suspend_exit;
2172         }
2173 wol_dis:
2174
2175         /* WOL disabled */
2176         AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
2177
2178         /* pcie patch */
2179         ctrl = AT_READ_REG(hw, REG_PCIE_PHYMISC);
2180         ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2181         AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
2182
2183         atl1e_force_ps(hw);
2184         hw->phy_configured = false; /* re-init PHY when resume */
2185
2186         pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
2187
2188 suspend_exit:
2189
2190         if (netif_running(netdev))
2191                 atl1e_free_irq(adapter);
2192
2193         pci_disable_device(pdev);
2194
2195         pci_set_power_state(pdev, pci_choose_state(pdev, state));
2196
2197         return 0;
2198 }
2199
2200 #ifdef CONFIG_PM
2201 static int atl1e_resume(struct pci_dev *pdev)
2202 {
2203         struct net_device *netdev = pci_get_drvdata(pdev);
2204         struct atl1e_adapter *adapter = netdev_priv(netdev);
2205         u32 err;
2206
2207         pci_set_power_state(pdev, PCI_D0);
2208         pci_restore_state(pdev);
2209
2210         err = pci_enable_device(pdev);
2211         if (err) {
2212                 dev_err(&pdev->dev, "ATL1e: Cannot enable PCI"
2213                                 " device from suspend\n");
2214                 return err;
2215         }
2216
2217         pci_set_master(pdev);
2218
2219         AT_READ_REG(&adapter->hw, REG_WOL_CTRL); /* clear WOL status */
2220
2221         pci_enable_wake(pdev, PCI_D3hot, 0);
2222         pci_enable_wake(pdev, PCI_D3cold, 0);
2223
2224         AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
2225
2226         if (netif_running(netdev)) {
2227                 err = atl1e_request_irq(adapter);
2228                 if (err)
2229                         return err;
2230         }
2231
2232         atl1e_reset_hw(&adapter->hw);
2233
2234         if (netif_running(netdev))
2235                 atl1e_up(adapter);
2236
2237         netif_device_attach(netdev);
2238
2239         return 0;
2240 }
2241 #endif
2242
2243 static void atl1e_shutdown(struct pci_dev *pdev)
2244 {
2245         atl1e_suspend(pdev, PMSG_SUSPEND);
2246 }
2247
2248 static const struct net_device_ops atl1e_netdev_ops = {
2249         .ndo_open               = atl1e_open,
2250         .ndo_stop               = atl1e_close,
2251         .ndo_start_xmit         = atl1e_xmit_frame,
2252         .ndo_get_stats          = atl1e_get_stats,
2253         .ndo_set_multicast_list = atl1e_set_multi,
2254         .ndo_validate_addr      = eth_validate_addr,
2255         .ndo_set_mac_address    = atl1e_set_mac_addr,
2256         .ndo_change_mtu         = atl1e_change_mtu,
2257         .ndo_do_ioctl           = atl1e_ioctl,
2258         .ndo_tx_timeout         = atl1e_tx_timeout,
2259         .ndo_vlan_rx_register   = atl1e_vlan_rx_register,
2260 #ifdef CONFIG_NET_POLL_CONTROLLER
2261         .ndo_poll_controller    = atl1e_netpoll,
2262 #endif
2263
2264 };
2265
2266 static int atl1e_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
2267 {
2268         SET_NETDEV_DEV(netdev, &pdev->dev);
2269         pci_set_drvdata(pdev, netdev);
2270
2271         netdev->irq  = pdev->irq;
2272         netdev->netdev_ops = &atl1e_netdev_ops;
2273
2274         netdev->watchdog_timeo = AT_TX_WATCHDOG;
2275         atl1e_set_ethtool_ops(netdev);
2276
2277         netdev->features = NETIF_F_SG | NETIF_F_HW_CSUM |
2278                 NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
2279         netdev->features |= NETIF_F_LLTX;
2280         netdev->features |= NETIF_F_TSO;
2281         netdev->features |= NETIF_F_TSO6;
2282
2283         return 0;
2284 }
2285
2286 /*
2287  * atl1e_probe - Device Initialization Routine
2288  * @pdev: PCI device information struct
2289  * @ent: entry in atl1e_pci_tbl
2290  *
2291  * Returns 0 on success, negative on failure
2292  *
2293  * atl1e_probe initializes an adapter identified by a pci_dev structure.
2294  * The OS initialization, configuring of the adapter private structure,
2295  * and a hardware reset occur.
2296  */
2297 static int __devinit atl1e_probe(struct pci_dev *pdev,
2298                                  const struct pci_device_id *ent)
2299 {
2300         struct net_device *netdev;
2301         struct atl1e_adapter *adapter = NULL;
2302         static int cards_found;
2303
2304         int err = 0;
2305
2306         err = pci_enable_device(pdev);
2307         if (err) {
2308                 dev_err(&pdev->dev, "cannot enable PCI device\n");
2309                 return err;
2310         }
2311
2312         /*
2313          * The atl1e chip can DMA to 64-bit addresses, but it uses a single
2314          * shared register for the high 32 bits, so only a single, aligned,
2315          * 4 GB physical address range can be used at a time.
2316          *
2317          * Supporting 64-bit DMA on this hardware is more trouble than it's
2318          * worth.  It is far easier to limit to 32-bit DMA than update
2319          * various kernel subsystems to support the mechanics required by a
2320          * fixed-high-32-bit system.
2321          */
2322         if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) ||
2323             (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) {
2324                 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
2325                 goto err_dma;
2326         }
2327
2328         err = pci_request_regions(pdev, atl1e_driver_name);
2329         if (err) {
2330                 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
2331                 goto err_pci_reg;
2332         }
2333
2334         pci_set_master(pdev);
2335
2336         netdev = alloc_etherdev(sizeof(struct atl1e_adapter));
2337         if (netdev == NULL) {
2338                 err = -ENOMEM;
2339                 dev_err(&pdev->dev, "etherdev alloc failed\n");
2340                 goto err_alloc_etherdev;
2341         }
2342
2343         err = atl1e_init_netdev(netdev, pdev);
2344         if (err) {
2345                 dev_err(&pdev->dev, "init netdevice failed\n");
2346                 goto err_init_netdev;
2347         }
2348         adapter = netdev_priv(netdev);
2349         adapter->bd_number = cards_found;
2350         adapter->netdev = netdev;
2351         adapter->pdev = pdev;
2352         adapter->hw.adapter = adapter;
2353         adapter->hw.hw_addr = pci_iomap(pdev, BAR_0, 0);
2354         if (!adapter->hw.hw_addr) {
2355                 err = -EIO;
2356                 dev_err(&pdev->dev, "cannot map device registers\n");
2357                 goto err_ioremap;
2358         }
2359         netdev->base_addr = (unsigned long)adapter->hw.hw_addr;
2360
2361         /* init mii data */
2362         adapter->mii.dev = netdev;
2363         adapter->mii.mdio_read  = atl1e_mdio_read;
2364         adapter->mii.mdio_write = atl1e_mdio_write;
2365         adapter->mii.phy_id_mask = 0x1f;
2366         adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK;
2367
2368         netif_napi_add(netdev, &adapter->napi, atl1e_clean, 64);
2369
2370         init_timer(&adapter->phy_config_timer);
2371         adapter->phy_config_timer.function = &atl1e_phy_config;
2372         adapter->phy_config_timer.data = (unsigned long) adapter;
2373
2374         /* get user settings */
2375         atl1e_check_options(adapter);
2376         /*
2377          * Mark all PCI regions associated with PCI device
2378          * pdev as being reserved by owner atl1e_driver_name
2379          * Enables bus-mastering on the device and calls
2380          * pcibios_set_master to do the needed arch specific settings
2381          */
2382         atl1e_setup_pcicmd(pdev);
2383         /* setup the private structure */
2384         err = atl1e_sw_init(adapter);
2385         if (err) {
2386                 dev_err(&pdev->dev, "net device private data init failed\n");
2387                 goto err_sw_init;
2388         }
2389
2390         /* Init GPHY as early as possible due to power saving issue  */
2391         atl1e_phy_init(&adapter->hw);
2392         /* reset the controller to
2393          * put the device in a known good starting state */
2394         err = atl1e_reset_hw(&adapter->hw);
2395         if (err) {
2396                 err = -EIO;
2397                 goto err_reset;
2398         }
2399
2400         if (atl1e_read_mac_addr(&adapter->hw) != 0) {
2401                 err = -EIO;
2402                 dev_err(&pdev->dev, "get mac address failed\n");
2403                 goto err_eeprom;
2404         }
2405
2406         memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
2407         memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
2408         dev_dbg(&pdev->dev, "mac address : %02x-%02x-%02x-%02x-%02x-%02x\n",
2409                         adapter->hw.mac_addr[0], adapter->hw.mac_addr[1],
2410                         adapter->hw.mac_addr[2], adapter->hw.mac_addr[3],
2411                         adapter->hw.mac_addr[4], adapter->hw.mac_addr[5]);
2412
2413         INIT_WORK(&adapter->reset_task, atl1e_reset_task);
2414         INIT_WORK(&adapter->link_chg_task, atl1e_link_chg_task);
2415         err = register_netdev(netdev);
2416         if (err) {
2417                 dev_err(&pdev->dev, "register netdevice failed\n");
2418                 goto err_register;
2419         }
2420
2421         /* assume we have no link for now */
2422         netif_stop_queue(netdev);
2423         netif_carrier_off(netdev);
2424
2425         cards_found++;
2426
2427         return 0;
2428
2429 err_reset:
2430 err_register:
2431 err_sw_init:
2432 err_eeprom:
2433         iounmap(adapter->hw.hw_addr);
2434 err_init_netdev:
2435 err_ioremap:
2436         free_netdev(netdev);
2437 err_alloc_etherdev:
2438         pci_release_regions(pdev);
2439 err_pci_reg:
2440 err_dma:
2441         pci_disable_device(pdev);
2442         return err;
2443 }
2444
2445 /*
2446  * atl1e_remove - Device Removal Routine
2447  * @pdev: PCI device information struct
2448  *
2449  * atl1e_remove is called by the PCI subsystem to alert the driver
2450  * that it should release a PCI device.  The could be caused by a
2451  * Hot-Plug event, or because the driver is going to be removed from
2452  * memory.
2453  */
2454 static void __devexit atl1e_remove(struct pci_dev *pdev)
2455 {
2456         struct net_device *netdev = pci_get_drvdata(pdev);
2457         struct atl1e_adapter *adapter = netdev_priv(netdev);
2458
2459         /*
2460          * flush_scheduled work may reschedule our watchdog task, so
2461          * explicitly disable watchdog tasks from being rescheduled
2462          */
2463         set_bit(__AT_DOWN, &adapter->flags);
2464
2465         atl1e_del_timer(adapter);
2466         atl1e_cancel_work(adapter);
2467
2468         unregister_netdev(netdev);
2469         atl1e_free_ring_resources(adapter);
2470         atl1e_force_ps(&adapter->hw);
2471         iounmap(adapter->hw.hw_addr);
2472         pci_release_regions(pdev);
2473         free_netdev(netdev);
2474         pci_disable_device(pdev);
2475 }
2476
2477 /*
2478  * atl1e_io_error_detected - called when PCI error is detected
2479  * @pdev: Pointer to PCI device
2480  * @state: The current pci connection state
2481  *
2482  * This function is called after a PCI bus error affecting
2483  * this device has been detected.
2484  */
2485 static pci_ers_result_t
2486 atl1e_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
2487 {
2488         struct net_device *netdev = pci_get_drvdata(pdev);
2489         struct atl1e_adapter *adapter = netdev_priv(netdev);
2490
2491         netif_device_detach(netdev);
2492
2493         if (state == pci_channel_io_perm_failure)
2494                 return PCI_ERS_RESULT_DISCONNECT;
2495
2496         if (netif_running(netdev))
2497                 atl1e_down(adapter);
2498
2499         pci_disable_device(pdev);
2500
2501         /* Request a slot slot reset. */
2502         return PCI_ERS_RESULT_NEED_RESET;
2503 }
2504
2505 /*
2506  * atl1e_io_slot_reset - called after the pci bus has been reset.
2507  * @pdev: Pointer to PCI device
2508  *
2509  * Restart the card from scratch, as if from a cold-boot. Implementation
2510  * resembles the first-half of the e1000_resume routine.
2511  */
2512 static pci_ers_result_t atl1e_io_slot_reset(struct pci_dev *pdev)
2513 {
2514         struct net_device *netdev = pci_get_drvdata(pdev);
2515         struct atl1e_adapter *adapter = netdev_priv(netdev);
2516
2517         if (pci_enable_device(pdev)) {
2518                 dev_err(&pdev->dev,
2519                        "ATL1e: Cannot re-enable PCI device after reset.\n");
2520                 return PCI_ERS_RESULT_DISCONNECT;
2521         }
2522         pci_set_master(pdev);
2523
2524         pci_enable_wake(pdev, PCI_D3hot, 0);
2525         pci_enable_wake(pdev, PCI_D3cold, 0);
2526
2527         atl1e_reset_hw(&adapter->hw);
2528
2529         return PCI_ERS_RESULT_RECOVERED;
2530 }
2531
2532 /*
2533  * atl1e_io_resume - called when traffic can start flowing again.
2534  * @pdev: Pointer to PCI device
2535  *
2536  * This callback is called when the error recovery driver tells us that
2537  * its OK to resume normal operation. Implementation resembles the
2538  * second-half of the atl1e_resume routine.
2539  */
2540 static void atl1e_io_resume(struct pci_dev *pdev)
2541 {
2542         struct net_device *netdev = pci_get_drvdata(pdev);
2543         struct atl1e_adapter *adapter = netdev_priv(netdev);
2544
2545         if (netif_running(netdev)) {
2546                 if (atl1e_up(adapter)) {
2547                         dev_err(&pdev->dev,
2548                           "ATL1e: can't bring device back up after reset\n");
2549                         return;
2550                 }
2551         }
2552
2553         netif_device_attach(netdev);
2554 }
2555
2556 static struct pci_error_handlers atl1e_err_handler = {
2557         .error_detected = atl1e_io_error_detected,
2558         .slot_reset = atl1e_io_slot_reset,
2559         .resume = atl1e_io_resume,
2560 };
2561
2562 static struct pci_driver atl1e_driver = {
2563         .name     = atl1e_driver_name,
2564         .id_table = atl1e_pci_tbl,
2565         .probe    = atl1e_probe,
2566         .remove   = __devexit_p(atl1e_remove),
2567         /* Power Managment Hooks */
2568 #ifdef CONFIG_PM
2569         .suspend  = atl1e_suspend,
2570         .resume   = atl1e_resume,
2571 #endif
2572         .shutdown = atl1e_shutdown,
2573         .err_handler = &atl1e_err_handler
2574 };
2575
2576 /*
2577  * atl1e_init_module - Driver Registration Routine
2578  *
2579  * atl1e_init_module is the first routine called when the driver is
2580  * loaded. All it does is register with the PCI subsystem.
2581  */
2582 static int __init atl1e_init_module(void)
2583 {
2584         return pci_register_driver(&atl1e_driver);
2585 }
2586
2587 /*
2588  * atl1e_exit_module - Driver Exit Cleanup Routine
2589  *
2590  * atl1e_exit_module is called just before the driver is removed
2591  * from memory.
2592  */
2593 static void __exit atl1e_exit_module(void)
2594 {
2595         pci_unregister_driver(&atl1e_driver);
2596 }
2597
2598 module_init(atl1e_init_module);
2599 module_exit(atl1e_exit_module);