2 * Atmel MultiMedia Card Interface driver
4 * Copyright (C) 2004-2008 Atmel Corporation
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 #include <linux/blkdev.h>
11 #include <linux/clk.h>
12 #include <linux/debugfs.h>
13 #include <linux/device.h>
14 #include <linux/err.h>
15 #include <linux/gpio.h>
16 #include <linux/init.h>
17 #include <linux/interrupt.h>
18 #include <linux/ioport.h>
19 #include <linux/module.h>
20 #include <linux/platform_device.h>
21 #include <linux/scatterlist.h>
22 #include <linux/seq_file.h>
23 #include <linux/stat.h>
25 #include <linux/mmc/host.h>
27 #include <asm/atmel-mci.h>
29 #include <asm/unaligned.h>
31 #include <mach/board.h>
33 #include "atmel-mci-regs.h"
35 #define ATMCI_DATA_ERROR_FLAGS (MCI_DCRCE | MCI_DTOE | MCI_OVRE | MCI_UNRE)
38 EVENT_CMD_COMPLETE = 0,
44 enum atmel_mci_state {
54 * struct atmel_mci - MMC controller state shared between all slots
55 * @lock: Spinlock protecting the queue and associated data.
56 * @regs: Pointer to MMIO registers.
57 * @sg: Scatterlist entry currently being processed by PIO code, if any.
58 * @pio_offset: Offset into the current scatterlist entry.
59 * @cur_slot: The slot which is currently using the controller.
60 * @mrq: The request currently being processed on @cur_slot,
61 * or NULL if the controller is idle.
62 * @cmd: The command currently being sent to the card, or NULL.
63 * @data: The data currently being transferred, or NULL if no data
64 * transfer is in progress.
65 * @cmd_status: Snapshot of SR taken upon completion of the current
66 * command. Only valid when EVENT_CMD_COMPLETE is pending.
67 * @data_status: Snapshot of SR taken upon completion of the current
68 * data transfer. Only valid when EVENT_DATA_COMPLETE or
69 * EVENT_DATA_ERROR is pending.
70 * @stop_cmdr: Value to be loaded into CMDR when the stop command is
72 * @tasklet: Tasklet running the request state machine.
73 * @pending_events: Bitmask of events flagged by the interrupt handler
74 * to be processed by the tasklet.
75 * @completed_events: Bitmask of events which the state machine has
77 * @state: Tasklet state.
78 * @queue: List of slots waiting for access to the controller.
79 * @need_clock_update: Update the clock rate before the next request.
80 * @need_reset: Reset controller before next request.
81 * @mode_reg: Value of the MR register.
82 * @bus_hz: The rate of @mck in Hz. This forms the basis for MMC bus
83 * rate and timeout calculations.
84 * @mapbase: Physical address of the MMIO registers.
85 * @mck: The peripheral bus clock hooked up to the MMC controller.
86 * @pdev: Platform device associated with the MMC controller.
87 * @slot: Slots sharing this MMC controller.
92 * @lock is a softirq-safe spinlock protecting @queue as well as
93 * @cur_slot, @mrq and @state. These must always be updated
94 * at the same time while holding @lock.
96 * @lock also protects mode_reg and need_clock_update since these are
97 * used to synchronize mode register updates with the queue
100 * The @mrq field of struct atmel_mci_slot is also protected by @lock,
101 * and must always be written at the same time as the slot is added to
104 * @pending_events and @completed_events are accessed using atomic bit
105 * operations, so they don't need any locking.
107 * None of the fields touched by the interrupt handler need any
108 * locking. However, ordering is important: Before EVENT_DATA_ERROR or
109 * EVENT_DATA_COMPLETE is set in @pending_events, all data-related
110 * interrupts must be disabled and @data_status updated with a
111 * snapshot of SR. Similarly, before EVENT_CMD_COMPLETE is set, the
112 * CMDRDY interupt must be disabled and @cmd_status updated with a
113 * snapshot of SR, and before EVENT_XFER_COMPLETE can be set, the
114 * bytes_xfered field of @data must be written. This is ensured by
121 struct scatterlist *sg;
122 unsigned int pio_offset;
124 struct atmel_mci_slot *cur_slot;
125 struct mmc_request *mrq;
126 struct mmc_command *cmd;
127 struct mmc_data *data;
133 struct tasklet_struct tasklet;
134 unsigned long pending_events;
135 unsigned long completed_events;
136 enum atmel_mci_state state;
137 struct list_head queue;
139 bool need_clock_update;
142 unsigned long bus_hz;
143 unsigned long mapbase;
145 struct platform_device *pdev;
147 struct atmel_mci_slot *slot[ATMEL_MCI_MAX_NR_SLOTS];
151 * struct atmel_mci_slot - MMC slot state
152 * @mmc: The mmc_host representing this slot.
153 * @host: The MMC controller this slot is using.
154 * @sdc_reg: Value of SDCR to be written before using this slot.
155 * @mrq: mmc_request currently being processed or waiting to be
156 * processed, or NULL when the slot is idle.
157 * @queue_node: List node for placing this node in the @queue list of
159 * @clock: Clock rate configured by set_ios(). Protected by host->lock.
160 * @flags: Random state bits associated with the slot.
161 * @detect_pin: GPIO pin used for card detection, or negative if not
163 * @wp_pin: GPIO pin used for card write protect sending, or negative
165 * @detect_timer: Timer used for debouncing @detect_pin interrupts.
167 struct atmel_mci_slot {
168 struct mmc_host *mmc;
169 struct atmel_mci *host;
173 struct mmc_request *mrq;
174 struct list_head queue_node;
178 #define ATMCI_CARD_PRESENT 0
179 #define ATMCI_CARD_NEED_INIT 1
180 #define ATMCI_SHUTDOWN 2
185 struct timer_list detect_timer;
188 #define atmci_test_and_clear_pending(host, event) \
189 test_and_clear_bit(event, &host->pending_events)
190 #define atmci_set_completed(host, event) \
191 set_bit(event, &host->completed_events)
192 #define atmci_set_pending(host, event) \
193 set_bit(event, &host->pending_events)
196 * The debugfs stuff below is mostly optimized away when
197 * CONFIG_DEBUG_FS is not set.
199 static int atmci_req_show(struct seq_file *s, void *v)
201 struct atmel_mci_slot *slot = s->private;
202 struct mmc_request *mrq;
203 struct mmc_command *cmd;
204 struct mmc_command *stop;
205 struct mmc_data *data;
207 /* Make sure we get a consistent snapshot */
208 spin_lock_bh(&slot->host->lock);
218 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
219 cmd->opcode, cmd->arg, cmd->flags,
220 cmd->resp[0], cmd->resp[1], cmd->resp[2],
221 cmd->resp[2], cmd->error);
223 seq_printf(s, "DATA %u / %u * %u flg %x err %d\n",
224 data->bytes_xfered, data->blocks,
225 data->blksz, data->flags, data->error);
228 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
229 stop->opcode, stop->arg, stop->flags,
230 stop->resp[0], stop->resp[1], stop->resp[2],
231 stop->resp[2], stop->error);
234 spin_unlock_bh(&slot->host->lock);
239 static int atmci_req_open(struct inode *inode, struct file *file)
241 return single_open(file, atmci_req_show, inode->i_private);
244 static const struct file_operations atmci_req_fops = {
245 .owner = THIS_MODULE,
246 .open = atmci_req_open,
249 .release = single_release,
252 static void atmci_show_status_reg(struct seq_file *s,
253 const char *regname, u32 value)
255 static const char *sr_bit[] = {
276 seq_printf(s, "%s:\t0x%08x", regname, value);
277 for (i = 0; i < ARRAY_SIZE(sr_bit); i++) {
278 if (value & (1 << i)) {
280 seq_printf(s, " %s", sr_bit[i]);
282 seq_puts(s, " UNKNOWN");
288 static int atmci_regs_show(struct seq_file *s, void *v)
290 struct atmel_mci *host = s->private;
293 buf = kmalloc(MCI_REGS_SIZE, GFP_KERNEL);
298 * Grab a more or less consistent snapshot. Note that we're
299 * not disabling interrupts, so IMR and SR may not be
302 spin_lock_bh(&host->lock);
303 clk_enable(host->mck);
304 memcpy_fromio(buf, host->regs, MCI_REGS_SIZE);
305 clk_disable(host->mck);
306 spin_unlock_bh(&host->lock);
308 seq_printf(s, "MR:\t0x%08x%s%s CLKDIV=%u\n",
310 buf[MCI_MR / 4] & MCI_MR_RDPROOF ? " RDPROOF" : "",
311 buf[MCI_MR / 4] & MCI_MR_WRPROOF ? " WRPROOF" : "",
312 buf[MCI_MR / 4] & 0xff);
313 seq_printf(s, "DTOR:\t0x%08x\n", buf[MCI_DTOR / 4]);
314 seq_printf(s, "SDCR:\t0x%08x\n", buf[MCI_SDCR / 4]);
315 seq_printf(s, "ARGR:\t0x%08x\n", buf[MCI_ARGR / 4]);
316 seq_printf(s, "BLKR:\t0x%08x BCNT=%u BLKLEN=%u\n",
318 buf[MCI_BLKR / 4] & 0xffff,
319 (buf[MCI_BLKR / 4] >> 16) & 0xffff);
321 /* Don't read RSPR and RDR; it will consume the data there */
323 atmci_show_status_reg(s, "SR", buf[MCI_SR / 4]);
324 atmci_show_status_reg(s, "IMR", buf[MCI_IMR / 4]);
331 static int atmci_regs_open(struct inode *inode, struct file *file)
333 return single_open(file, atmci_regs_show, inode->i_private);
336 static const struct file_operations atmci_regs_fops = {
337 .owner = THIS_MODULE,
338 .open = atmci_regs_open,
341 .release = single_release,
344 static void atmci_init_debugfs(struct atmel_mci_slot *slot)
346 struct mmc_host *mmc = slot->mmc;
347 struct atmel_mci *host = slot->host;
351 root = mmc->debugfs_root;
355 node = debugfs_create_file("regs", S_IRUSR, root, host,
362 node = debugfs_create_file("req", S_IRUSR, root, slot, &atmci_req_fops);
366 node = debugfs_create_u32("state", S_IRUSR, root, (u32 *)&host->state);
370 node = debugfs_create_x32("pending_events", S_IRUSR, root,
371 (u32 *)&host->pending_events);
375 node = debugfs_create_x32("completed_events", S_IRUSR, root,
376 (u32 *)&host->completed_events);
383 dev_err(&mmc->class_dev, "failed to initialize debugfs for slot\n");
386 static inline unsigned int ns_to_clocks(struct atmel_mci *host,
389 return (ns * (host->bus_hz / 1000000) + 999) / 1000;
392 static void atmci_set_timeout(struct atmel_mci *host,
393 struct atmel_mci_slot *slot, struct mmc_data *data)
395 static unsigned dtomul_to_shift[] = {
396 0, 4, 7, 8, 10, 12, 16, 20
402 timeout = ns_to_clocks(host, data->timeout_ns) + data->timeout_clks;
404 for (dtomul = 0; dtomul < 8; dtomul++) {
405 unsigned shift = dtomul_to_shift[dtomul];
406 dtocyc = (timeout + (1 << shift) - 1) >> shift;
416 dev_vdbg(&slot->mmc->class_dev, "setting timeout to %u cycles\n",
417 dtocyc << dtomul_to_shift[dtomul]);
418 mci_writel(host, DTOR, (MCI_DTOMUL(dtomul) | MCI_DTOCYC(dtocyc)));
422 * Return mask with command flags to be enabled for this command.
424 static u32 atmci_prepare_command(struct mmc_host *mmc,
425 struct mmc_command *cmd)
427 struct mmc_data *data;
430 cmd->error = -EINPROGRESS;
432 cmdr = MCI_CMDR_CMDNB(cmd->opcode);
434 if (cmd->flags & MMC_RSP_PRESENT) {
435 if (cmd->flags & MMC_RSP_136)
436 cmdr |= MCI_CMDR_RSPTYP_136BIT;
438 cmdr |= MCI_CMDR_RSPTYP_48BIT;
442 * This should really be MAXLAT_5 for CMD2 and ACMD41, but
443 * it's too difficult to determine whether this is an ACMD or
444 * not. Better make it 64.
446 cmdr |= MCI_CMDR_MAXLAT_64CYC;
448 if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN)
449 cmdr |= MCI_CMDR_OPDCMD;
453 cmdr |= MCI_CMDR_START_XFER;
454 if (data->flags & MMC_DATA_STREAM)
455 cmdr |= MCI_CMDR_STREAM;
456 else if (data->blocks > 1)
457 cmdr |= MCI_CMDR_MULTI_BLOCK;
459 cmdr |= MCI_CMDR_BLOCK;
461 if (data->flags & MMC_DATA_READ)
462 cmdr |= MCI_CMDR_TRDIR_READ;
468 static void atmci_start_command(struct atmel_mci *host,
469 struct mmc_command *cmd, u32 cmd_flags)
474 dev_vdbg(&host->pdev->dev,
475 "start command: ARGR=0x%08x CMDR=0x%08x\n",
476 cmd->arg, cmd_flags);
478 mci_writel(host, ARGR, cmd->arg);
479 mci_writel(host, CMDR, cmd_flags);
482 static void send_stop_cmd(struct atmel_mci *host, struct mmc_data *data)
484 atmci_start_command(host, data->stop, host->stop_cmdr);
485 mci_writel(host, IER, MCI_CMDRDY);
489 * Returns a mask of interrupt flags to be enabled after the whole
490 * request has been prepared.
492 static u32 atmci_submit_data(struct atmel_mci *host, struct mmc_data *data)
496 data->error = -EINPROGRESS;
502 iflags = ATMCI_DATA_ERROR_FLAGS;
505 * Errata: MMC data write operation with less than 12
506 * bytes is impossible.
508 * Errata: MCI Transmit Data Register (TDR) FIFO
509 * corruption when length is not multiple of 4.
511 if (data->blocks * data->blksz < 12
512 || (data->blocks * data->blksz) & 3)
513 host->need_reset = true;
516 host->pio_offset = 0;
517 if (data->flags & MMC_DATA_READ)
525 static void atmci_start_request(struct atmel_mci *host,
526 struct atmel_mci_slot *slot)
528 struct mmc_request *mrq;
529 struct mmc_command *cmd;
530 struct mmc_data *data;
535 host->cur_slot = slot;
538 host->pending_events = 0;
539 host->completed_events = 0;
541 if (host->need_reset) {
542 mci_writel(host, CR, MCI_CR_SWRST);
543 mci_writel(host, CR, MCI_CR_MCIEN);
544 mci_writel(host, MR, host->mode_reg);
545 host->need_reset = false;
547 mci_writel(host, SDCR, slot->sdc_reg);
549 iflags = mci_readl(host, IMR);
551 dev_warn(&slot->mmc->class_dev, "WARNING: IMR=0x%08x\n",
554 if (unlikely(test_and_clear_bit(ATMCI_CARD_NEED_INIT, &slot->flags))) {
555 /* Send init sequence (74 clock cycles) */
556 mci_writel(host, CMDR, MCI_CMDR_SPCMD_INIT);
557 while (!(mci_readl(host, SR) & MCI_CMDRDY))
562 atmci_set_timeout(host, slot, data);
564 /* Must set block count/size before sending command */
565 mci_writel(host, BLKR, MCI_BCNT(data->blocks)
566 | MCI_BLKLEN(data->blksz));
567 dev_vdbg(&slot->mmc->class_dev, "BLKR=0x%08x\n",
568 MCI_BCNT(data->blocks) | MCI_BLKLEN(data->blksz));
573 cmdflags = atmci_prepare_command(slot->mmc, cmd);
574 atmci_start_command(host, cmd, cmdflags);
577 iflags |= atmci_submit_data(host, data);
580 host->stop_cmdr = atmci_prepare_command(slot->mmc, mrq->stop);
581 host->stop_cmdr |= MCI_CMDR_STOP_XFER;
582 if (!(data->flags & MMC_DATA_WRITE))
583 host->stop_cmdr |= MCI_CMDR_TRDIR_READ;
584 if (data->flags & MMC_DATA_STREAM)
585 host->stop_cmdr |= MCI_CMDR_STREAM;
587 host->stop_cmdr |= MCI_CMDR_MULTI_BLOCK;
591 * We could have enabled interrupts earlier, but I suspect
592 * that would open up a nice can of interesting race
593 * conditions (e.g. command and data complete, but stop not
596 mci_writel(host, IER, iflags);
599 static void atmci_queue_request(struct atmel_mci *host,
600 struct atmel_mci_slot *slot, struct mmc_request *mrq)
602 dev_vdbg(&slot->mmc->class_dev, "queue request: state=%d\n",
605 spin_lock_bh(&host->lock);
607 if (host->state == STATE_IDLE) {
608 host->state = STATE_SENDING_CMD;
609 atmci_start_request(host, slot);
611 list_add_tail(&slot->queue_node, &host->queue);
613 spin_unlock_bh(&host->lock);
616 static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
618 struct atmel_mci_slot *slot = mmc_priv(mmc);
619 struct atmel_mci *host = slot->host;
620 struct mmc_data *data;
625 * We may "know" the card is gone even though there's still an
626 * electrical connection. If so, we really need to communicate
627 * this to the MMC core since there won't be any more
628 * interrupts as the card is completely removed. Otherwise,
629 * the MMC core might believe the card is still there even
630 * though the card was just removed very slowly.
632 if (!test_bit(ATMCI_CARD_PRESENT, &slot->flags)) {
633 mrq->cmd->error = -ENOMEDIUM;
634 mmc_request_done(mmc, mrq);
638 /* We don't support multiple blocks of weird lengths. */
640 if (data && data->blocks > 1 && data->blksz & 3) {
641 mrq->cmd->error = -EINVAL;
642 mmc_request_done(mmc, mrq);
645 atmci_queue_request(host, slot, mrq);
648 static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
650 struct atmel_mci_slot *slot = mmc_priv(mmc);
651 struct atmel_mci *host = slot->host;
654 slot->sdc_reg &= ~MCI_SDCBUS_MASK;
655 switch (ios->bus_width) {
656 case MMC_BUS_WIDTH_1:
657 slot->sdc_reg |= MCI_SDCBUS_1BIT;
659 case MMC_BUS_WIDTH_4:
660 slot->sdc_reg = MCI_SDCBUS_4BIT;
665 unsigned int clock_min = ~0U;
668 spin_lock_bh(&host->lock);
669 if (!host->mode_reg) {
670 clk_enable(host->mck);
671 mci_writel(host, CR, MCI_CR_SWRST);
672 mci_writel(host, CR, MCI_CR_MCIEN);
676 * Use mirror of ios->clock to prevent race with mmc
677 * core ios update when finding the minimum.
679 slot->clock = ios->clock;
680 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
681 if (host->slot[i] && host->slot[i]->clock
682 && host->slot[i]->clock < clock_min)
683 clock_min = host->slot[i]->clock;
686 /* Calculate clock divider */
687 clkdiv = DIV_ROUND_UP(host->bus_hz, 2 * clock_min) - 1;
689 dev_warn(&mmc->class_dev,
690 "clock %u too slow; using %lu\n",
691 clock_min, host->bus_hz / (2 * 256));
696 * WRPROOF and RDPROOF prevent overruns/underruns by
697 * stopping the clock when the FIFO is full/empty.
698 * This state is not expected to last for long.
700 host->mode_reg = MCI_MR_CLKDIV(clkdiv) | MCI_MR_WRPROOF
703 if (list_empty(&host->queue))
704 mci_writel(host, MR, host->mode_reg);
706 host->need_clock_update = true;
708 spin_unlock_bh(&host->lock);
710 bool any_slot_active = false;
712 spin_lock_bh(&host->lock);
714 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
715 if (host->slot[i] && host->slot[i]->clock) {
716 any_slot_active = true;
720 if (!any_slot_active) {
721 mci_writel(host, CR, MCI_CR_MCIDIS);
722 if (host->mode_reg) {
724 clk_disable(host->mck);
728 spin_unlock_bh(&host->lock);
731 switch (ios->power_mode) {
733 set_bit(ATMCI_CARD_NEED_INIT, &slot->flags);
737 * TODO: None of the currently available AVR32-based
738 * boards allow MMC power to be turned off. Implement
739 * power control when this can be tested properly.
741 * We also need to hook this into the clock management
742 * somehow so that newly inserted cards aren't
743 * subjected to a fast clock before we have a chance
744 * to figure out what the maximum rate is. Currently,
745 * there's no way to avoid this, and there never will
746 * be for boards that don't support power control.
752 static int atmci_get_ro(struct mmc_host *mmc)
754 int read_only = -ENOSYS;
755 struct atmel_mci_slot *slot = mmc_priv(mmc);
757 if (gpio_is_valid(slot->wp_pin)) {
758 read_only = gpio_get_value(slot->wp_pin);
759 dev_dbg(&mmc->class_dev, "card is %s\n",
760 read_only ? "read-only" : "read-write");
766 static int atmci_get_cd(struct mmc_host *mmc)
768 int present = -ENOSYS;
769 struct atmel_mci_slot *slot = mmc_priv(mmc);
771 if (gpio_is_valid(slot->detect_pin)) {
772 present = !gpio_get_value(slot->detect_pin);
773 dev_dbg(&mmc->class_dev, "card is %spresent\n",
774 present ? "" : "not ");
780 static const struct mmc_host_ops atmci_ops = {
781 .request = atmci_request,
782 .set_ios = atmci_set_ios,
783 .get_ro = atmci_get_ro,
784 .get_cd = atmci_get_cd,
787 /* Called with host->lock held */
788 static void atmci_request_end(struct atmel_mci *host, struct mmc_request *mrq)
789 __releases(&host->lock)
790 __acquires(&host->lock)
792 struct atmel_mci_slot *slot = NULL;
793 struct mmc_host *prev_mmc = host->cur_slot->mmc;
795 WARN_ON(host->cmd || host->data);
798 * Update the MMC clock rate if necessary. This may be
799 * necessary if set_ios() is called when a different slot is
800 * busy transfering data.
802 if (host->need_clock_update)
803 mci_writel(host, MR, host->mode_reg);
805 host->cur_slot->mrq = NULL;
807 if (!list_empty(&host->queue)) {
808 slot = list_entry(host->queue.next,
809 struct atmel_mci_slot, queue_node);
810 list_del(&slot->queue_node);
811 dev_vdbg(&host->pdev->dev, "list not empty: %s is next\n",
812 mmc_hostname(slot->mmc));
813 host->state = STATE_SENDING_CMD;
814 atmci_start_request(host, slot);
816 dev_vdbg(&host->pdev->dev, "list empty\n");
817 host->state = STATE_IDLE;
820 spin_unlock(&host->lock);
821 mmc_request_done(prev_mmc, mrq);
822 spin_lock(&host->lock);
825 static void atmci_command_complete(struct atmel_mci *host,
826 struct mmc_command *cmd)
828 u32 status = host->cmd_status;
830 /* Read the response from the card (up to 16 bytes) */
831 cmd->resp[0] = mci_readl(host, RSPR);
832 cmd->resp[1] = mci_readl(host, RSPR);
833 cmd->resp[2] = mci_readl(host, RSPR);
834 cmd->resp[3] = mci_readl(host, RSPR);
836 if (status & MCI_RTOE)
837 cmd->error = -ETIMEDOUT;
838 else if ((cmd->flags & MMC_RSP_CRC) && (status & MCI_RCRCE))
839 cmd->error = -EILSEQ;
840 else if (status & (MCI_RINDE | MCI_RDIRE | MCI_RENDE))
846 dev_dbg(&host->pdev->dev,
847 "command error: status=0x%08x\n", status);
851 mci_writel(host, IDR, MCI_NOTBUSY
852 | MCI_TXRDY | MCI_RXRDY
853 | ATMCI_DATA_ERROR_FLAGS);
858 static void atmci_detect_change(unsigned long data)
860 struct atmel_mci_slot *slot = (struct atmel_mci_slot *)data;
865 * atmci_cleanup_slot() sets the ATMCI_SHUTDOWN flag before
866 * freeing the interrupt. We must not re-enable the interrupt
867 * if it has been freed, and if we're shutting down, it
868 * doesn't really matter whether the card is present or not.
871 if (test_bit(ATMCI_SHUTDOWN, &slot->flags))
874 enable_irq(gpio_to_irq(slot->detect_pin));
875 present = !gpio_get_value(slot->detect_pin);
876 present_old = test_bit(ATMCI_CARD_PRESENT, &slot->flags);
878 dev_vdbg(&slot->mmc->class_dev, "detect change: %d (was %d)\n",
879 present, present_old);
881 if (present != present_old) {
882 struct atmel_mci *host = slot->host;
883 struct mmc_request *mrq;
885 dev_dbg(&slot->mmc->class_dev, "card %s\n",
886 present ? "inserted" : "removed");
888 spin_lock(&host->lock);
891 clear_bit(ATMCI_CARD_PRESENT, &slot->flags);
893 set_bit(ATMCI_CARD_PRESENT, &slot->flags);
895 /* Clean up queue if present */
898 if (mrq == host->mrq) {
900 * Reset controller to terminate any ongoing
901 * commands or data transfers.
903 mci_writel(host, CR, MCI_CR_SWRST);
904 mci_writel(host, CR, MCI_CR_MCIEN);
905 mci_writel(host, MR, host->mode_reg);
910 switch (host->state) {
913 case STATE_SENDING_CMD:
914 mrq->cmd->error = -ENOMEDIUM;
918 case STATE_SENDING_DATA:
919 mrq->data->error = -ENOMEDIUM;
921 case STATE_DATA_BUSY:
922 case STATE_DATA_ERROR:
923 if (mrq->data->error == -EINPROGRESS)
924 mrq->data->error = -ENOMEDIUM;
928 case STATE_SENDING_STOP:
929 mrq->stop->error = -ENOMEDIUM;
933 atmci_request_end(host, mrq);
935 list_del(&slot->queue_node);
936 mrq->cmd->error = -ENOMEDIUM;
938 mrq->data->error = -ENOMEDIUM;
940 mrq->stop->error = -ENOMEDIUM;
942 spin_unlock(&host->lock);
943 mmc_request_done(slot->mmc, mrq);
944 spin_lock(&host->lock);
947 spin_unlock(&host->lock);
949 mmc_detect_change(slot->mmc, 0);
953 static void atmci_tasklet_func(unsigned long priv)
955 struct atmel_mci *host = (struct atmel_mci *)priv;
956 struct mmc_request *mrq = host->mrq;
957 struct mmc_data *data = host->data;
958 struct mmc_command *cmd = host->cmd;
959 enum atmel_mci_state state = host->state;
960 enum atmel_mci_state prev_state;
963 spin_lock(&host->lock);
967 dev_vdbg(&host->pdev->dev,
968 "tasklet: state %u pending/completed/mask %lx/%lx/%x\n",
969 state, host->pending_events, host->completed_events,
970 mci_readl(host, IMR));
979 case STATE_SENDING_CMD:
980 if (!atmci_test_and_clear_pending(host,
985 atmci_set_completed(host, EVENT_CMD_COMPLETE);
986 atmci_command_complete(host, mrq->cmd);
987 if (!mrq->data || cmd->error) {
988 atmci_request_end(host, host->mrq);
992 prev_state = state = STATE_SENDING_DATA;
995 case STATE_SENDING_DATA:
996 if (atmci_test_and_clear_pending(host,
999 send_stop_cmd(host, data);
1000 state = STATE_DATA_ERROR;
1004 if (!atmci_test_and_clear_pending(host,
1005 EVENT_XFER_COMPLETE))
1008 atmci_set_completed(host, EVENT_XFER_COMPLETE);
1009 prev_state = state = STATE_DATA_BUSY;
1012 case STATE_DATA_BUSY:
1013 if (!atmci_test_and_clear_pending(host,
1014 EVENT_DATA_COMPLETE))
1018 atmci_set_completed(host, EVENT_DATA_COMPLETE);
1019 status = host->data_status;
1020 if (unlikely(status & ATMCI_DATA_ERROR_FLAGS)) {
1021 if (status & MCI_DTOE) {
1022 dev_dbg(&host->pdev->dev,
1023 "data timeout error\n");
1024 data->error = -ETIMEDOUT;
1025 } else if (status & MCI_DCRCE) {
1026 dev_dbg(&host->pdev->dev,
1027 "data CRC error\n");
1028 data->error = -EILSEQ;
1030 dev_dbg(&host->pdev->dev,
1031 "data FIFO error (status=%08x)\n",
1036 data->bytes_xfered = data->blocks * data->blksz;
1041 atmci_request_end(host, host->mrq);
1045 prev_state = state = STATE_SENDING_STOP;
1047 send_stop_cmd(host, data);
1050 case STATE_SENDING_STOP:
1051 if (!atmci_test_and_clear_pending(host,
1052 EVENT_CMD_COMPLETE))
1056 atmci_command_complete(host, mrq->stop);
1057 atmci_request_end(host, host->mrq);
1060 case STATE_DATA_ERROR:
1061 if (!atmci_test_and_clear_pending(host,
1062 EVENT_XFER_COMPLETE))
1065 state = STATE_DATA_BUSY;
1068 } while (state != prev_state);
1070 host->state = state;
1073 spin_unlock(&host->lock);
1076 static void atmci_read_data_pio(struct atmel_mci *host)
1078 struct scatterlist *sg = host->sg;
1079 void *buf = sg_virt(sg);
1080 unsigned int offset = host->pio_offset;
1081 struct mmc_data *data = host->data;
1084 unsigned int nbytes = 0;
1087 value = mci_readl(host, RDR);
1088 if (likely(offset + 4 <= sg->length)) {
1089 put_unaligned(value, (u32 *)(buf + offset));
1094 if (offset == sg->length) {
1095 host->sg = sg = sg_next(sg);
1103 unsigned int remaining = sg->length - offset;
1104 memcpy(buf + offset, &value, remaining);
1105 nbytes += remaining;
1107 flush_dcache_page(sg_page(sg));
1108 host->sg = sg = sg_next(sg);
1112 offset = 4 - remaining;
1114 memcpy(buf, (u8 *)&value + remaining, offset);
1118 status = mci_readl(host, SR);
1119 if (status & ATMCI_DATA_ERROR_FLAGS) {
1120 mci_writel(host, IDR, (MCI_NOTBUSY | MCI_RXRDY
1121 | ATMCI_DATA_ERROR_FLAGS));
1122 host->data_status = status;
1123 data->bytes_xfered += nbytes;
1125 atmci_set_pending(host, EVENT_DATA_ERROR);
1126 tasklet_schedule(&host->tasklet);
1129 } while (status & MCI_RXRDY);
1131 host->pio_offset = offset;
1132 data->bytes_xfered += nbytes;
1137 mci_writel(host, IDR, MCI_RXRDY);
1138 mci_writel(host, IER, MCI_NOTBUSY);
1139 data->bytes_xfered += nbytes;
1141 atmci_set_pending(host, EVENT_XFER_COMPLETE);
1144 static void atmci_write_data_pio(struct atmel_mci *host)
1146 struct scatterlist *sg = host->sg;
1147 void *buf = sg_virt(sg);
1148 unsigned int offset = host->pio_offset;
1149 struct mmc_data *data = host->data;
1152 unsigned int nbytes = 0;
1155 if (likely(offset + 4 <= sg->length)) {
1156 value = get_unaligned((u32 *)(buf + offset));
1157 mci_writel(host, TDR, value);
1161 if (offset == sg->length) {
1162 host->sg = sg = sg_next(sg);
1170 unsigned int remaining = sg->length - offset;
1173 memcpy(&value, buf + offset, remaining);
1174 nbytes += remaining;
1176 host->sg = sg = sg_next(sg);
1178 mci_writel(host, TDR, value);
1182 offset = 4 - remaining;
1184 memcpy((u8 *)&value + remaining, buf, offset);
1185 mci_writel(host, TDR, value);
1189 status = mci_readl(host, SR);
1190 if (status & ATMCI_DATA_ERROR_FLAGS) {
1191 mci_writel(host, IDR, (MCI_NOTBUSY | MCI_TXRDY
1192 | ATMCI_DATA_ERROR_FLAGS));
1193 host->data_status = status;
1194 data->bytes_xfered += nbytes;
1196 atmci_set_pending(host, EVENT_DATA_ERROR);
1197 tasklet_schedule(&host->tasklet);
1200 } while (status & MCI_TXRDY);
1202 host->pio_offset = offset;
1203 data->bytes_xfered += nbytes;
1208 mci_writel(host, IDR, MCI_TXRDY);
1209 mci_writel(host, IER, MCI_NOTBUSY);
1210 data->bytes_xfered += nbytes;
1212 atmci_set_pending(host, EVENT_XFER_COMPLETE);
1215 static void atmci_cmd_interrupt(struct atmel_mci *host, u32 status)
1217 mci_writel(host, IDR, MCI_CMDRDY);
1219 host->cmd_status = status;
1221 atmci_set_pending(host, EVENT_CMD_COMPLETE);
1222 tasklet_schedule(&host->tasklet);
1225 static irqreturn_t atmci_interrupt(int irq, void *dev_id)
1227 struct atmel_mci *host = dev_id;
1228 u32 status, mask, pending;
1229 unsigned int pass_count = 0;
1232 status = mci_readl(host, SR);
1233 mask = mci_readl(host, IMR);
1234 pending = status & mask;
1238 if (pending & ATMCI_DATA_ERROR_FLAGS) {
1239 mci_writel(host, IDR, ATMCI_DATA_ERROR_FLAGS
1240 | MCI_RXRDY | MCI_TXRDY);
1241 pending &= mci_readl(host, IMR);
1243 host->data_status = status;
1245 atmci_set_pending(host, EVENT_DATA_ERROR);
1246 tasklet_schedule(&host->tasklet);
1248 if (pending & MCI_NOTBUSY) {
1249 mci_writel(host, IDR,
1250 ATMCI_DATA_ERROR_FLAGS | MCI_NOTBUSY);
1251 host->data_status = status;
1253 atmci_set_pending(host, EVENT_DATA_COMPLETE);
1254 tasklet_schedule(&host->tasklet);
1256 if (pending & MCI_RXRDY)
1257 atmci_read_data_pio(host);
1258 if (pending & MCI_TXRDY)
1259 atmci_write_data_pio(host);
1261 if (pending & MCI_CMDRDY)
1262 atmci_cmd_interrupt(host, status);
1263 } while (pass_count++ < 5);
1265 return pass_count ? IRQ_HANDLED : IRQ_NONE;
1268 static irqreturn_t atmci_detect_interrupt(int irq, void *dev_id)
1270 struct atmel_mci_slot *slot = dev_id;
1273 * Disable interrupts until the pin has stabilized and check
1274 * the state then. Use mod_timer() since we may be in the
1275 * middle of the timer routine when this interrupt triggers.
1277 disable_irq_nosync(irq);
1278 mod_timer(&slot->detect_timer, jiffies + msecs_to_jiffies(20));
1283 static int __init atmci_init_slot(struct atmel_mci *host,
1284 struct mci_slot_pdata *slot_data, unsigned int id,
1287 struct mmc_host *mmc;
1288 struct atmel_mci_slot *slot;
1290 mmc = mmc_alloc_host(sizeof(struct atmel_mci_slot), &host->pdev->dev);
1294 slot = mmc_priv(mmc);
1297 slot->detect_pin = slot_data->detect_pin;
1298 slot->wp_pin = slot_data->wp_pin;
1299 slot->sdc_reg = sdc_reg;
1301 mmc->ops = &atmci_ops;
1302 mmc->f_min = DIV_ROUND_UP(host->bus_hz, 512);
1303 mmc->f_max = host->bus_hz / 2;
1304 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
1305 if (slot_data->bus_width >= 4)
1306 mmc->caps |= MMC_CAP_4_BIT_DATA;
1308 mmc->max_hw_segs = 64;
1309 mmc->max_phys_segs = 64;
1310 mmc->max_req_size = 32768 * 512;
1311 mmc->max_blk_size = 32768;
1312 mmc->max_blk_count = 512;
1314 /* Assume card is present initially */
1315 set_bit(ATMCI_CARD_PRESENT, &slot->flags);
1316 if (gpio_is_valid(slot->detect_pin)) {
1317 if (gpio_request(slot->detect_pin, "mmc_detect")) {
1318 dev_dbg(&mmc->class_dev, "no detect pin available\n");
1319 slot->detect_pin = -EBUSY;
1320 } else if (gpio_get_value(slot->detect_pin)) {
1321 clear_bit(ATMCI_CARD_PRESENT, &slot->flags);
1325 if (!gpio_is_valid(slot->detect_pin))
1326 mmc->caps |= MMC_CAP_NEEDS_POLL;
1328 if (gpio_is_valid(slot->wp_pin)) {
1329 if (gpio_request(slot->wp_pin, "mmc_wp")) {
1330 dev_dbg(&mmc->class_dev, "no WP pin available\n");
1331 slot->wp_pin = -EBUSY;
1335 host->slot[id] = slot;
1338 if (gpio_is_valid(slot->detect_pin)) {
1341 setup_timer(&slot->detect_timer, atmci_detect_change,
1342 (unsigned long)slot);
1344 ret = request_irq(gpio_to_irq(slot->detect_pin),
1345 atmci_detect_interrupt,
1346 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
1347 "mmc-detect", slot);
1349 dev_dbg(&mmc->class_dev,
1350 "could not request IRQ %d for detect pin\n",
1351 gpio_to_irq(slot->detect_pin));
1352 gpio_free(slot->detect_pin);
1353 slot->detect_pin = -EBUSY;
1357 atmci_init_debugfs(slot);
1362 static void __exit atmci_cleanup_slot(struct atmel_mci_slot *slot,
1365 /* Debugfs stuff is cleaned up by mmc core */
1367 set_bit(ATMCI_SHUTDOWN, &slot->flags);
1370 mmc_remove_host(slot->mmc);
1372 if (gpio_is_valid(slot->detect_pin)) {
1373 int pin = slot->detect_pin;
1375 free_irq(gpio_to_irq(pin), slot);
1376 del_timer_sync(&slot->detect_timer);
1379 if (gpio_is_valid(slot->wp_pin))
1380 gpio_free(slot->wp_pin);
1382 slot->host->slot[id] = NULL;
1383 mmc_free_host(slot->mmc);
1386 static int __init atmci_probe(struct platform_device *pdev)
1388 struct mci_platform_data *pdata;
1389 struct atmel_mci *host;
1390 struct resource *regs;
1391 unsigned int nr_slots;
1395 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1398 pdata = pdev->dev.platform_data;
1401 irq = platform_get_irq(pdev, 0);
1405 host = kzalloc(sizeof(struct atmel_mci), GFP_KERNEL);
1410 spin_lock_init(&host->lock);
1411 INIT_LIST_HEAD(&host->queue);
1413 host->mck = clk_get(&pdev->dev, "mci_clk");
1414 if (IS_ERR(host->mck)) {
1415 ret = PTR_ERR(host->mck);
1420 host->regs = ioremap(regs->start, regs->end - regs->start + 1);
1424 clk_enable(host->mck);
1425 mci_writel(host, CR, MCI_CR_SWRST);
1426 host->bus_hz = clk_get_rate(host->mck);
1427 clk_disable(host->mck);
1429 host->mapbase = regs->start;
1431 tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)host);
1433 ret = request_irq(irq, atmci_interrupt, 0, pdev->dev.bus_id, host);
1435 goto err_request_irq;
1437 platform_set_drvdata(pdev, host);
1439 /* We need at least one slot to succeed */
1442 if (pdata->slot[0].bus_width) {
1443 ret = atmci_init_slot(host, &pdata->slot[0],
1444 MCI_SDCSEL_SLOT_A, 0);
1448 if (pdata->slot[1].bus_width) {
1449 ret = atmci_init_slot(host, &pdata->slot[1],
1450 MCI_SDCSEL_SLOT_B, 1);
1458 dev_info(&pdev->dev,
1459 "Atmel MCI controller at 0x%08lx irq %d, %u slots\n",
1460 host->mapbase, irq, nr_slots);
1465 free_irq(irq, host);
1467 iounmap(host->regs);
1475 static int __exit atmci_remove(struct platform_device *pdev)
1477 struct atmel_mci *host = platform_get_drvdata(pdev);
1480 platform_set_drvdata(pdev, NULL);
1482 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
1484 atmci_cleanup_slot(host->slot[i], i);
1487 clk_enable(host->mck);
1488 mci_writel(host, IDR, ~0UL);
1489 mci_writel(host, CR, MCI_CR_MCIDIS);
1490 mci_readl(host, SR);
1491 clk_disable(host->mck);
1493 free_irq(platform_get_irq(pdev, 0), host);
1494 iounmap(host->regs);
1502 static struct platform_driver atmci_driver = {
1503 .remove = __exit_p(atmci_remove),
1505 .name = "atmel_mci",
1509 static int __init atmci_init(void)
1511 return platform_driver_probe(&atmci_driver, atmci_probe);
1514 static void __exit atmci_exit(void)
1516 platform_driver_unregister(&atmci_driver);
1519 module_init(atmci_init);
1520 module_exit(atmci_exit);
1522 MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver");
1523 MODULE_AUTHOR("Haavard Skinnemoen <haavard.skinnemoen@atmel.com>");
1524 MODULE_LICENSE("GPL v2");