atmel-mci: Add experimental DMA support
[safe/jmp/linux-2.6] / drivers / mmc / host / atmel-mci.c
1 /*
2  * Atmel MultiMedia Card Interface driver
3  *
4  * Copyright (C) 2004-2008 Atmel Corporation
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10 #include <linux/blkdev.h>
11 #include <linux/clk.h>
12 #include <linux/debugfs.h>
13 #include <linux/device.h>
14 #include <linux/dmaengine.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/err.h>
17 #include <linux/gpio.h>
18 #include <linux/init.h>
19 #include <linux/interrupt.h>
20 #include <linux/ioport.h>
21 #include <linux/module.h>
22 #include <linux/platform_device.h>
23 #include <linux/scatterlist.h>
24 #include <linux/seq_file.h>
25 #include <linux/stat.h>
26
27 #include <linux/mmc/host.h>
28
29 #include <asm/atmel-mci.h>
30 #include <asm/io.h>
31 #include <asm/unaligned.h>
32
33 #include <mach/board.h>
34
35 #include "atmel-mci-regs.h"
36
37 #define ATMCI_DATA_ERROR_FLAGS  (MCI_DCRCE | MCI_DTOE | MCI_OVRE | MCI_UNRE)
38 #define ATMCI_DMA_THRESHOLD     16
39
40 enum {
41         EVENT_CMD_COMPLETE = 0,
42         EVENT_XFER_COMPLETE,
43         EVENT_DATA_COMPLETE,
44         EVENT_DATA_ERROR,
45 };
46
47 enum atmel_mci_state {
48         STATE_IDLE = 0,
49         STATE_SENDING_CMD,
50         STATE_SENDING_DATA,
51         STATE_DATA_BUSY,
52         STATE_SENDING_STOP,
53         STATE_DATA_ERROR,
54 };
55
56 struct atmel_mci_dma {
57 #ifdef CONFIG_MMC_ATMELMCI_DMA
58         struct dma_client               client;
59         struct dma_chan                 *chan;
60         struct dma_async_tx_descriptor  *data_desc;
61 #endif
62 };
63
64 /**
65  * struct atmel_mci - MMC controller state shared between all slots
66  * @lock: Spinlock protecting the queue and associated data.
67  * @regs: Pointer to MMIO registers.
68  * @sg: Scatterlist entry currently being processed by PIO code, if any.
69  * @pio_offset: Offset into the current scatterlist entry.
70  * @cur_slot: The slot which is currently using the controller.
71  * @mrq: The request currently being processed on @cur_slot,
72  *      or NULL if the controller is idle.
73  * @cmd: The command currently being sent to the card, or NULL.
74  * @data: The data currently being transferred, or NULL if no data
75  *      transfer is in progress.
76  * @dma: DMA client state.
77  * @data_chan: DMA channel being used for the current data transfer.
78  * @cmd_status: Snapshot of SR taken upon completion of the current
79  *      command. Only valid when EVENT_CMD_COMPLETE is pending.
80  * @data_status: Snapshot of SR taken upon completion of the current
81  *      data transfer. Only valid when EVENT_DATA_COMPLETE or
82  *      EVENT_DATA_ERROR is pending.
83  * @stop_cmdr: Value to be loaded into CMDR when the stop command is
84  *      to be sent.
85  * @tasklet: Tasklet running the request state machine.
86  * @pending_events: Bitmask of events flagged by the interrupt handler
87  *      to be processed by the tasklet.
88  * @completed_events: Bitmask of events which the state machine has
89  *      processed.
90  * @state: Tasklet state.
91  * @queue: List of slots waiting for access to the controller.
92  * @need_clock_update: Update the clock rate before the next request.
93  * @need_reset: Reset controller before next request.
94  * @mode_reg: Value of the MR register.
95  * @bus_hz: The rate of @mck in Hz. This forms the basis for MMC bus
96  *      rate and timeout calculations.
97  * @mapbase: Physical address of the MMIO registers.
98  * @mck: The peripheral bus clock hooked up to the MMC controller.
99  * @pdev: Platform device associated with the MMC controller.
100  * @slot: Slots sharing this MMC controller.
101  *
102  * Locking
103  * =======
104  *
105  * @lock is a softirq-safe spinlock protecting @queue as well as
106  * @cur_slot, @mrq and @state. These must always be updated
107  * at the same time while holding @lock.
108  *
109  * @lock also protects mode_reg and need_clock_update since these are
110  * used to synchronize mode register updates with the queue
111  * processing.
112  *
113  * The @mrq field of struct atmel_mci_slot is also protected by @lock,
114  * and must always be written at the same time as the slot is added to
115  * @queue.
116  *
117  * @pending_events and @completed_events are accessed using atomic bit
118  * operations, so they don't need any locking.
119  *
120  * None of the fields touched by the interrupt handler need any
121  * locking. However, ordering is important: Before EVENT_DATA_ERROR or
122  * EVENT_DATA_COMPLETE is set in @pending_events, all data-related
123  * interrupts must be disabled and @data_status updated with a
124  * snapshot of SR. Similarly, before EVENT_CMD_COMPLETE is set, the
125  * CMDRDY interupt must be disabled and @cmd_status updated with a
126  * snapshot of SR, and before EVENT_XFER_COMPLETE can be set, the
127  * bytes_xfered field of @data must be written. This is ensured by
128  * using barriers.
129  */
130 struct atmel_mci {
131         spinlock_t              lock;
132         void __iomem            *regs;
133
134         struct scatterlist      *sg;
135         unsigned int            pio_offset;
136
137         struct atmel_mci_slot   *cur_slot;
138         struct mmc_request      *mrq;
139         struct mmc_command      *cmd;
140         struct mmc_data         *data;
141
142         struct atmel_mci_dma    dma;
143         struct dma_chan         *data_chan;
144
145         u32                     cmd_status;
146         u32                     data_status;
147         u32                     stop_cmdr;
148
149         struct tasklet_struct   tasklet;
150         unsigned long           pending_events;
151         unsigned long           completed_events;
152         enum atmel_mci_state    state;
153         struct list_head        queue;
154
155         bool                    need_clock_update;
156         bool                    need_reset;
157         u32                     mode_reg;
158         unsigned long           bus_hz;
159         unsigned long           mapbase;
160         struct clk              *mck;
161         struct platform_device  *pdev;
162
163         struct atmel_mci_slot   *slot[ATMEL_MCI_MAX_NR_SLOTS];
164 };
165
166 /**
167  * struct atmel_mci_slot - MMC slot state
168  * @mmc: The mmc_host representing this slot.
169  * @host: The MMC controller this slot is using.
170  * @sdc_reg: Value of SDCR to be written before using this slot.
171  * @mrq: mmc_request currently being processed or waiting to be
172  *      processed, or NULL when the slot is idle.
173  * @queue_node: List node for placing this node in the @queue list of
174  *      &struct atmel_mci.
175  * @clock: Clock rate configured by set_ios(). Protected by host->lock.
176  * @flags: Random state bits associated with the slot.
177  * @detect_pin: GPIO pin used for card detection, or negative if not
178  *      available.
179  * @wp_pin: GPIO pin used for card write protect sending, or negative
180  *      if not available.
181  * @detect_timer: Timer used for debouncing @detect_pin interrupts.
182  */
183 struct atmel_mci_slot {
184         struct mmc_host         *mmc;
185         struct atmel_mci        *host;
186
187         u32                     sdc_reg;
188
189         struct mmc_request      *mrq;
190         struct list_head        queue_node;
191
192         unsigned int            clock;
193         unsigned long           flags;
194 #define ATMCI_CARD_PRESENT      0
195 #define ATMCI_CARD_NEED_INIT    1
196 #define ATMCI_SHUTDOWN          2
197
198         int                     detect_pin;
199         int                     wp_pin;
200
201         struct timer_list       detect_timer;
202 };
203
204 #define atmci_test_and_clear_pending(host, event)               \
205         test_and_clear_bit(event, &host->pending_events)
206 #define atmci_set_completed(host, event)                        \
207         set_bit(event, &host->completed_events)
208 #define atmci_set_pending(host, event)                          \
209         set_bit(event, &host->pending_events)
210
211 /*
212  * The debugfs stuff below is mostly optimized away when
213  * CONFIG_DEBUG_FS is not set.
214  */
215 static int atmci_req_show(struct seq_file *s, void *v)
216 {
217         struct atmel_mci_slot   *slot = s->private;
218         struct mmc_request      *mrq;
219         struct mmc_command      *cmd;
220         struct mmc_command      *stop;
221         struct mmc_data         *data;
222
223         /* Make sure we get a consistent snapshot */
224         spin_lock_bh(&slot->host->lock);
225         mrq = slot->mrq;
226
227         if (mrq) {
228                 cmd = mrq->cmd;
229                 data = mrq->data;
230                 stop = mrq->stop;
231
232                 if (cmd)
233                         seq_printf(s,
234                                 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
235                                 cmd->opcode, cmd->arg, cmd->flags,
236                                 cmd->resp[0], cmd->resp[1], cmd->resp[2],
237                                 cmd->resp[2], cmd->error);
238                 if (data)
239                         seq_printf(s, "DATA %u / %u * %u flg %x err %d\n",
240                                 data->bytes_xfered, data->blocks,
241                                 data->blksz, data->flags, data->error);
242                 if (stop)
243                         seq_printf(s,
244                                 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
245                                 stop->opcode, stop->arg, stop->flags,
246                                 stop->resp[0], stop->resp[1], stop->resp[2],
247                                 stop->resp[2], stop->error);
248         }
249
250         spin_unlock_bh(&slot->host->lock);
251
252         return 0;
253 }
254
255 static int atmci_req_open(struct inode *inode, struct file *file)
256 {
257         return single_open(file, atmci_req_show, inode->i_private);
258 }
259
260 static const struct file_operations atmci_req_fops = {
261         .owner          = THIS_MODULE,
262         .open           = atmci_req_open,
263         .read           = seq_read,
264         .llseek         = seq_lseek,
265         .release        = single_release,
266 };
267
268 static void atmci_show_status_reg(struct seq_file *s,
269                 const char *regname, u32 value)
270 {
271         static const char       *sr_bit[] = {
272                 [0]     = "CMDRDY",
273                 [1]     = "RXRDY",
274                 [2]     = "TXRDY",
275                 [3]     = "BLKE",
276                 [4]     = "DTIP",
277                 [5]     = "NOTBUSY",
278                 [8]     = "SDIOIRQA",
279                 [9]     = "SDIOIRQB",
280                 [16]    = "RINDE",
281                 [17]    = "RDIRE",
282                 [18]    = "RCRCE",
283                 [19]    = "RENDE",
284                 [20]    = "RTOE",
285                 [21]    = "DCRCE",
286                 [22]    = "DTOE",
287                 [30]    = "OVRE",
288                 [31]    = "UNRE",
289         };
290         unsigned int            i;
291
292         seq_printf(s, "%s:\t0x%08x", regname, value);
293         for (i = 0; i < ARRAY_SIZE(sr_bit); i++) {
294                 if (value & (1 << i)) {
295                         if (sr_bit[i])
296                                 seq_printf(s, " %s", sr_bit[i]);
297                         else
298                                 seq_puts(s, " UNKNOWN");
299                 }
300         }
301         seq_putc(s, '\n');
302 }
303
304 static int atmci_regs_show(struct seq_file *s, void *v)
305 {
306         struct atmel_mci        *host = s->private;
307         u32                     *buf;
308
309         buf = kmalloc(MCI_REGS_SIZE, GFP_KERNEL);
310         if (!buf)
311                 return -ENOMEM;
312
313         /*
314          * Grab a more or less consistent snapshot. Note that we're
315          * not disabling interrupts, so IMR and SR may not be
316          * consistent.
317          */
318         spin_lock_bh(&host->lock);
319         clk_enable(host->mck);
320         memcpy_fromio(buf, host->regs, MCI_REGS_SIZE);
321         clk_disable(host->mck);
322         spin_unlock_bh(&host->lock);
323
324         seq_printf(s, "MR:\t0x%08x%s%s CLKDIV=%u\n",
325                         buf[MCI_MR / 4],
326                         buf[MCI_MR / 4] & MCI_MR_RDPROOF ? " RDPROOF" : "",
327                         buf[MCI_MR / 4] & MCI_MR_WRPROOF ? " WRPROOF" : "",
328                         buf[MCI_MR / 4] & 0xff);
329         seq_printf(s, "DTOR:\t0x%08x\n", buf[MCI_DTOR / 4]);
330         seq_printf(s, "SDCR:\t0x%08x\n", buf[MCI_SDCR / 4]);
331         seq_printf(s, "ARGR:\t0x%08x\n", buf[MCI_ARGR / 4]);
332         seq_printf(s, "BLKR:\t0x%08x BCNT=%u BLKLEN=%u\n",
333                         buf[MCI_BLKR / 4],
334                         buf[MCI_BLKR / 4] & 0xffff,
335                         (buf[MCI_BLKR / 4] >> 16) & 0xffff);
336
337         /* Don't read RSPR and RDR; it will consume the data there */
338
339         atmci_show_status_reg(s, "SR", buf[MCI_SR / 4]);
340         atmci_show_status_reg(s, "IMR", buf[MCI_IMR / 4]);
341
342         kfree(buf);
343
344         return 0;
345 }
346
347 static int atmci_regs_open(struct inode *inode, struct file *file)
348 {
349         return single_open(file, atmci_regs_show, inode->i_private);
350 }
351
352 static const struct file_operations atmci_regs_fops = {
353         .owner          = THIS_MODULE,
354         .open           = atmci_regs_open,
355         .read           = seq_read,
356         .llseek         = seq_lseek,
357         .release        = single_release,
358 };
359
360 static void atmci_init_debugfs(struct atmel_mci_slot *slot)
361 {
362         struct mmc_host         *mmc = slot->mmc;
363         struct atmel_mci        *host = slot->host;
364         struct dentry           *root;
365         struct dentry           *node;
366
367         root = mmc->debugfs_root;
368         if (!root)
369                 return;
370
371         node = debugfs_create_file("regs", S_IRUSR, root, host,
372                         &atmci_regs_fops);
373         if (IS_ERR(node))
374                 return;
375         if (!node)
376                 goto err;
377
378         node = debugfs_create_file("req", S_IRUSR, root, slot, &atmci_req_fops);
379         if (!node)
380                 goto err;
381
382         node = debugfs_create_u32("state", S_IRUSR, root, (u32 *)&host->state);
383         if (!node)
384                 goto err;
385
386         node = debugfs_create_x32("pending_events", S_IRUSR, root,
387                                      (u32 *)&host->pending_events);
388         if (!node)
389                 goto err;
390
391         node = debugfs_create_x32("completed_events", S_IRUSR, root,
392                                      (u32 *)&host->completed_events);
393         if (!node)
394                 goto err;
395
396         return;
397
398 err:
399         dev_err(&mmc->class_dev, "failed to initialize debugfs for slot\n");
400 }
401
402 static inline unsigned int ns_to_clocks(struct atmel_mci *host,
403                                         unsigned int ns)
404 {
405         return (ns * (host->bus_hz / 1000000) + 999) / 1000;
406 }
407
408 static void atmci_set_timeout(struct atmel_mci *host,
409                 struct atmel_mci_slot *slot, struct mmc_data *data)
410 {
411         static unsigned dtomul_to_shift[] = {
412                 0, 4, 7, 8, 10, 12, 16, 20
413         };
414         unsigned        timeout;
415         unsigned        dtocyc;
416         unsigned        dtomul;
417
418         timeout = ns_to_clocks(host, data->timeout_ns) + data->timeout_clks;
419
420         for (dtomul = 0; dtomul < 8; dtomul++) {
421                 unsigned shift = dtomul_to_shift[dtomul];
422                 dtocyc = (timeout + (1 << shift) - 1) >> shift;
423                 if (dtocyc < 15)
424                         break;
425         }
426
427         if (dtomul >= 8) {
428                 dtomul = 7;
429                 dtocyc = 15;
430         }
431
432         dev_vdbg(&slot->mmc->class_dev, "setting timeout to %u cycles\n",
433                         dtocyc << dtomul_to_shift[dtomul]);
434         mci_writel(host, DTOR, (MCI_DTOMUL(dtomul) | MCI_DTOCYC(dtocyc)));
435 }
436
437 /*
438  * Return mask with command flags to be enabled for this command.
439  */
440 static u32 atmci_prepare_command(struct mmc_host *mmc,
441                                  struct mmc_command *cmd)
442 {
443         struct mmc_data *data;
444         u32             cmdr;
445
446         cmd->error = -EINPROGRESS;
447
448         cmdr = MCI_CMDR_CMDNB(cmd->opcode);
449
450         if (cmd->flags & MMC_RSP_PRESENT) {
451                 if (cmd->flags & MMC_RSP_136)
452                         cmdr |= MCI_CMDR_RSPTYP_136BIT;
453                 else
454                         cmdr |= MCI_CMDR_RSPTYP_48BIT;
455         }
456
457         /*
458          * This should really be MAXLAT_5 for CMD2 and ACMD41, but
459          * it's too difficult to determine whether this is an ACMD or
460          * not. Better make it 64.
461          */
462         cmdr |= MCI_CMDR_MAXLAT_64CYC;
463
464         if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN)
465                 cmdr |= MCI_CMDR_OPDCMD;
466
467         data = cmd->data;
468         if (data) {
469                 cmdr |= MCI_CMDR_START_XFER;
470                 if (data->flags & MMC_DATA_STREAM)
471                         cmdr |= MCI_CMDR_STREAM;
472                 else if (data->blocks > 1)
473                         cmdr |= MCI_CMDR_MULTI_BLOCK;
474                 else
475                         cmdr |= MCI_CMDR_BLOCK;
476
477                 if (data->flags & MMC_DATA_READ)
478                         cmdr |= MCI_CMDR_TRDIR_READ;
479         }
480
481         return cmdr;
482 }
483
484 static void atmci_start_command(struct atmel_mci *host,
485                 struct mmc_command *cmd, u32 cmd_flags)
486 {
487         WARN_ON(host->cmd);
488         host->cmd = cmd;
489
490         dev_vdbg(&host->pdev->dev,
491                         "start command: ARGR=0x%08x CMDR=0x%08x\n",
492                         cmd->arg, cmd_flags);
493
494         mci_writel(host, ARGR, cmd->arg);
495         mci_writel(host, CMDR, cmd_flags);
496 }
497
498 static void send_stop_cmd(struct atmel_mci *host, struct mmc_data *data)
499 {
500         atmci_start_command(host, data->stop, host->stop_cmdr);
501         mci_writel(host, IER, MCI_CMDRDY);
502 }
503
504 #ifdef CONFIG_MMC_ATMELMCI_DMA
505 static void atmci_dma_cleanup(struct atmel_mci *host)
506 {
507         struct mmc_data                 *data = host->data;
508
509         dma_unmap_sg(&host->pdev->dev, data->sg, data->sg_len,
510                      ((data->flags & MMC_DATA_WRITE)
511                       ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
512 }
513
514 static void atmci_stop_dma(struct atmel_mci *host)
515 {
516         struct dma_chan *chan = host->data_chan;
517
518         if (chan) {
519                 chan->device->device_terminate_all(chan);
520                 atmci_dma_cleanup(host);
521         } else {
522                 /* Data transfer was stopped by the interrupt handler */
523                 atmci_set_pending(host, EVENT_XFER_COMPLETE);
524                 mci_writel(host, IER, MCI_NOTBUSY);
525         }
526 }
527
528 /* This function is called by the DMA driver from tasklet context. */
529 static void atmci_dma_complete(void *arg)
530 {
531         struct atmel_mci        *host = arg;
532         struct mmc_data         *data = host->data;
533
534         dev_vdbg(&host->pdev->dev, "DMA complete\n");
535
536         atmci_dma_cleanup(host);
537
538         /*
539          * If the card was removed, data will be NULL. No point trying
540          * to send the stop command or waiting for NBUSY in this case.
541          */
542         if (data) {
543                 atmci_set_pending(host, EVENT_XFER_COMPLETE);
544                 tasklet_schedule(&host->tasklet);
545
546                 /*
547                  * Regardless of what the documentation says, we have
548                  * to wait for NOTBUSY even after block read
549                  * operations.
550                  *
551                  * When the DMA transfer is complete, the controller
552                  * may still be reading the CRC from the card, i.e.
553                  * the data transfer is still in progress and we
554                  * haven't seen all the potential error bits yet.
555                  *
556                  * The interrupt handler will schedule a different
557                  * tasklet to finish things up when the data transfer
558                  * is completely done.
559                  *
560                  * We may not complete the mmc request here anyway
561                  * because the mmc layer may call back and cause us to
562                  * violate the "don't submit new operations from the
563                  * completion callback" rule of the dma engine
564                  * framework.
565                  */
566                 mci_writel(host, IER, MCI_NOTBUSY);
567         }
568 }
569
570 static int
571 atmci_submit_data_dma(struct atmel_mci *host, struct mmc_data *data)
572 {
573         struct dma_chan                 *chan;
574         struct dma_async_tx_descriptor  *desc;
575         struct scatterlist              *sg;
576         unsigned int                    i;
577         enum dma_data_direction         direction;
578
579         /*
580          * We don't do DMA on "complex" transfers, i.e. with
581          * non-word-aligned buffers or lengths. Also, we don't bother
582          * with all the DMA setup overhead for short transfers.
583          */
584         if (data->blocks * data->blksz < ATMCI_DMA_THRESHOLD)
585                 return -EINVAL;
586         if (data->blksz & 3)
587                 return -EINVAL;
588
589         for_each_sg(data->sg, sg, data->sg_len, i) {
590                 if (sg->offset & 3 || sg->length & 3)
591                         return -EINVAL;
592         }
593
594         /* If we don't have a channel, we can't do DMA */
595         chan = host->dma.chan;
596         if (chan) {
597                 dma_chan_get(chan);
598                 host->data_chan = chan;
599         }
600
601         if (!chan)
602                 return -ENODEV;
603
604         if (data->flags & MMC_DATA_READ)
605                 direction = DMA_FROM_DEVICE;
606         else
607                 direction = DMA_TO_DEVICE;
608
609         desc = chan->device->device_prep_slave_sg(chan,
610                         data->sg, data->sg_len, direction,
611                         DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
612         if (!desc)
613                 return -ENOMEM;
614
615         host->dma.data_desc = desc;
616         desc->callback = atmci_dma_complete;
617         desc->callback_param = host;
618         desc->tx_submit(desc);
619
620         /* Go! */
621         chan->device->device_issue_pending(chan);
622
623         return 0;
624 }
625
626 #else /* CONFIG_MMC_ATMELMCI_DMA */
627
628 static int atmci_submit_data_dma(struct atmel_mci *host, struct mmc_data *data)
629 {
630         return -ENOSYS;
631 }
632
633 static void atmci_stop_dma(struct atmel_mci *host)
634 {
635         /* Data transfer was stopped by the interrupt handler */
636         atmci_set_pending(host, EVENT_XFER_COMPLETE);
637         mci_writel(host, IER, MCI_NOTBUSY);
638 }
639
640 #endif /* CONFIG_MMC_ATMELMCI_DMA */
641
642 /*
643  * Returns a mask of interrupt flags to be enabled after the whole
644  * request has been prepared.
645  */
646 static u32 atmci_submit_data(struct atmel_mci *host, struct mmc_data *data)
647 {
648         u32 iflags;
649
650         data->error = -EINPROGRESS;
651
652         WARN_ON(host->data);
653         host->sg = NULL;
654         host->data = data;
655
656         iflags = ATMCI_DATA_ERROR_FLAGS;
657         if (atmci_submit_data_dma(host, data)) {
658                 host->data_chan = NULL;
659
660                 /*
661                  * Errata: MMC data write operation with less than 12
662                  * bytes is impossible.
663                  *
664                  * Errata: MCI Transmit Data Register (TDR) FIFO
665                  * corruption when length is not multiple of 4.
666                  */
667                 if (data->blocks * data->blksz < 12
668                                 || (data->blocks * data->blksz) & 3)
669                         host->need_reset = true;
670
671                 host->sg = data->sg;
672                 host->pio_offset = 0;
673                 if (data->flags & MMC_DATA_READ)
674                         iflags |= MCI_RXRDY;
675                 else
676                         iflags |= MCI_TXRDY;
677         }
678
679         return iflags;
680 }
681
682 static void atmci_start_request(struct atmel_mci *host,
683                 struct atmel_mci_slot *slot)
684 {
685         struct mmc_request      *mrq;
686         struct mmc_command      *cmd;
687         struct mmc_data         *data;
688         u32                     iflags;
689         u32                     cmdflags;
690
691         mrq = slot->mrq;
692         host->cur_slot = slot;
693         host->mrq = mrq;
694
695         host->pending_events = 0;
696         host->completed_events = 0;
697
698         if (host->need_reset) {
699                 mci_writel(host, CR, MCI_CR_SWRST);
700                 mci_writel(host, CR, MCI_CR_MCIEN);
701                 mci_writel(host, MR, host->mode_reg);
702                 host->need_reset = false;
703         }
704         mci_writel(host, SDCR, slot->sdc_reg);
705
706         iflags = mci_readl(host, IMR);
707         if (iflags)
708                 dev_warn(&slot->mmc->class_dev, "WARNING: IMR=0x%08x\n",
709                                 iflags);
710
711         if (unlikely(test_and_clear_bit(ATMCI_CARD_NEED_INIT, &slot->flags))) {
712                 /* Send init sequence (74 clock cycles) */
713                 mci_writel(host, CMDR, MCI_CMDR_SPCMD_INIT);
714                 while (!(mci_readl(host, SR) & MCI_CMDRDY))
715                         cpu_relax();
716         }
717         data = mrq->data;
718         if (data) {
719                 atmci_set_timeout(host, slot, data);
720
721                 /* Must set block count/size before sending command */
722                 mci_writel(host, BLKR, MCI_BCNT(data->blocks)
723                                 | MCI_BLKLEN(data->blksz));
724                 dev_vdbg(&slot->mmc->class_dev, "BLKR=0x%08x\n",
725                         MCI_BCNT(data->blocks) | MCI_BLKLEN(data->blksz));
726         }
727
728         iflags = MCI_CMDRDY;
729         cmd = mrq->cmd;
730         cmdflags = atmci_prepare_command(slot->mmc, cmd);
731         atmci_start_command(host, cmd, cmdflags);
732
733         if (data)
734                 iflags |= atmci_submit_data(host, data);
735
736         if (mrq->stop) {
737                 host->stop_cmdr = atmci_prepare_command(slot->mmc, mrq->stop);
738                 host->stop_cmdr |= MCI_CMDR_STOP_XFER;
739                 if (!(data->flags & MMC_DATA_WRITE))
740                         host->stop_cmdr |= MCI_CMDR_TRDIR_READ;
741                 if (data->flags & MMC_DATA_STREAM)
742                         host->stop_cmdr |= MCI_CMDR_STREAM;
743                 else
744                         host->stop_cmdr |= MCI_CMDR_MULTI_BLOCK;
745         }
746
747         /*
748          * We could have enabled interrupts earlier, but I suspect
749          * that would open up a nice can of interesting race
750          * conditions (e.g. command and data complete, but stop not
751          * prepared yet.)
752          */
753         mci_writel(host, IER, iflags);
754 }
755
756 static void atmci_queue_request(struct atmel_mci *host,
757                 struct atmel_mci_slot *slot, struct mmc_request *mrq)
758 {
759         dev_vdbg(&slot->mmc->class_dev, "queue request: state=%d\n",
760                         host->state);
761
762         spin_lock_bh(&host->lock);
763         slot->mrq = mrq;
764         if (host->state == STATE_IDLE) {
765                 host->state = STATE_SENDING_CMD;
766                 atmci_start_request(host, slot);
767         } else {
768                 list_add_tail(&slot->queue_node, &host->queue);
769         }
770         spin_unlock_bh(&host->lock);
771 }
772
773 static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
774 {
775         struct atmel_mci_slot   *slot = mmc_priv(mmc);
776         struct atmel_mci        *host = slot->host;
777         struct mmc_data         *data;
778
779         WARN_ON(slot->mrq);
780
781         /*
782          * We may "know" the card is gone even though there's still an
783          * electrical connection. If so, we really need to communicate
784          * this to the MMC core since there won't be any more
785          * interrupts as the card is completely removed. Otherwise,
786          * the MMC core might believe the card is still there even
787          * though the card was just removed very slowly.
788          */
789         if (!test_bit(ATMCI_CARD_PRESENT, &slot->flags)) {
790                 mrq->cmd->error = -ENOMEDIUM;
791                 mmc_request_done(mmc, mrq);
792                 return;
793         }
794
795         /* We don't support multiple blocks of weird lengths. */
796         data = mrq->data;
797         if (data && data->blocks > 1 && data->blksz & 3) {
798                 mrq->cmd->error = -EINVAL;
799                 mmc_request_done(mmc, mrq);
800         }
801
802         atmci_queue_request(host, slot, mrq);
803 }
804
805 static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
806 {
807         struct atmel_mci_slot   *slot = mmc_priv(mmc);
808         struct atmel_mci        *host = slot->host;
809         unsigned int            i;
810
811         slot->sdc_reg &= ~MCI_SDCBUS_MASK;
812         switch (ios->bus_width) {
813         case MMC_BUS_WIDTH_1:
814                 slot->sdc_reg |= MCI_SDCBUS_1BIT;
815                 break;
816         case MMC_BUS_WIDTH_4:
817                 slot->sdc_reg = MCI_SDCBUS_4BIT;
818                 break;
819         }
820
821         if (ios->clock) {
822                 unsigned int clock_min = ~0U;
823                 u32 clkdiv;
824
825                 spin_lock_bh(&host->lock);
826                 if (!host->mode_reg) {
827                         clk_enable(host->mck);
828                         mci_writel(host, CR, MCI_CR_SWRST);
829                         mci_writel(host, CR, MCI_CR_MCIEN);
830                 }
831
832                 /*
833                  * Use mirror of ios->clock to prevent race with mmc
834                  * core ios update when finding the minimum.
835                  */
836                 slot->clock = ios->clock;
837                 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
838                         if (host->slot[i] && host->slot[i]->clock
839                                         && host->slot[i]->clock < clock_min)
840                                 clock_min = host->slot[i]->clock;
841                 }
842
843                 /* Calculate clock divider */
844                 clkdiv = DIV_ROUND_UP(host->bus_hz, 2 * clock_min) - 1;
845                 if (clkdiv > 255) {
846                         dev_warn(&mmc->class_dev,
847                                 "clock %u too slow; using %lu\n",
848                                 clock_min, host->bus_hz / (2 * 256));
849                         clkdiv = 255;
850                 }
851
852                 /*
853                  * WRPROOF and RDPROOF prevent overruns/underruns by
854                  * stopping the clock when the FIFO is full/empty.
855                  * This state is not expected to last for long.
856                  */
857                 host->mode_reg = MCI_MR_CLKDIV(clkdiv) | MCI_MR_WRPROOF
858                                         | MCI_MR_RDPROOF;
859
860                 if (list_empty(&host->queue))
861                         mci_writel(host, MR, host->mode_reg);
862                 else
863                         host->need_clock_update = true;
864
865                 spin_unlock_bh(&host->lock);
866         } else {
867                 bool any_slot_active = false;
868
869                 spin_lock_bh(&host->lock);
870                 slot->clock = 0;
871                 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
872                         if (host->slot[i] && host->slot[i]->clock) {
873                                 any_slot_active = true;
874                                 break;
875                         }
876                 }
877                 if (!any_slot_active) {
878                         mci_writel(host, CR, MCI_CR_MCIDIS);
879                         if (host->mode_reg) {
880                                 mci_readl(host, MR);
881                                 clk_disable(host->mck);
882                         }
883                         host->mode_reg = 0;
884                 }
885                 spin_unlock_bh(&host->lock);
886         }
887
888         switch (ios->power_mode) {
889         case MMC_POWER_UP:
890                 set_bit(ATMCI_CARD_NEED_INIT, &slot->flags);
891                 break;
892         default:
893                 /*
894                  * TODO: None of the currently available AVR32-based
895                  * boards allow MMC power to be turned off. Implement
896                  * power control when this can be tested properly.
897                  *
898                  * We also need to hook this into the clock management
899                  * somehow so that newly inserted cards aren't
900                  * subjected to a fast clock before we have a chance
901                  * to figure out what the maximum rate is. Currently,
902                  * there's no way to avoid this, and there never will
903                  * be for boards that don't support power control.
904                  */
905                 break;
906         }
907 }
908
909 static int atmci_get_ro(struct mmc_host *mmc)
910 {
911         int                     read_only = -ENOSYS;
912         struct atmel_mci_slot   *slot = mmc_priv(mmc);
913
914         if (gpio_is_valid(slot->wp_pin)) {
915                 read_only = gpio_get_value(slot->wp_pin);
916                 dev_dbg(&mmc->class_dev, "card is %s\n",
917                                 read_only ? "read-only" : "read-write");
918         }
919
920         return read_only;
921 }
922
923 static int atmci_get_cd(struct mmc_host *mmc)
924 {
925         int                     present = -ENOSYS;
926         struct atmel_mci_slot   *slot = mmc_priv(mmc);
927
928         if (gpio_is_valid(slot->detect_pin)) {
929                 present = !gpio_get_value(slot->detect_pin);
930                 dev_dbg(&mmc->class_dev, "card is %spresent\n",
931                                 present ? "" : "not ");
932         }
933
934         return present;
935 }
936
937 static const struct mmc_host_ops atmci_ops = {
938         .request        = atmci_request,
939         .set_ios        = atmci_set_ios,
940         .get_ro         = atmci_get_ro,
941         .get_cd         = atmci_get_cd,
942 };
943
944 /* Called with host->lock held */
945 static void atmci_request_end(struct atmel_mci *host, struct mmc_request *mrq)
946         __releases(&host->lock)
947         __acquires(&host->lock)
948 {
949         struct atmel_mci_slot   *slot = NULL;
950         struct mmc_host         *prev_mmc = host->cur_slot->mmc;
951
952         WARN_ON(host->cmd || host->data);
953
954         /*
955          * Update the MMC clock rate if necessary. This may be
956          * necessary if set_ios() is called when a different slot is
957          * busy transfering data.
958          */
959         if (host->need_clock_update)
960                 mci_writel(host, MR, host->mode_reg);
961
962         host->cur_slot->mrq = NULL;
963         host->mrq = NULL;
964         if (!list_empty(&host->queue)) {
965                 slot = list_entry(host->queue.next,
966                                 struct atmel_mci_slot, queue_node);
967                 list_del(&slot->queue_node);
968                 dev_vdbg(&host->pdev->dev, "list not empty: %s is next\n",
969                                 mmc_hostname(slot->mmc));
970                 host->state = STATE_SENDING_CMD;
971                 atmci_start_request(host, slot);
972         } else {
973                 dev_vdbg(&host->pdev->dev, "list empty\n");
974                 host->state = STATE_IDLE;
975         }
976
977         spin_unlock(&host->lock);
978         mmc_request_done(prev_mmc, mrq);
979         spin_lock(&host->lock);
980 }
981
982 static void atmci_command_complete(struct atmel_mci *host,
983                         struct mmc_command *cmd)
984 {
985         u32             status = host->cmd_status;
986
987         /* Read the response from the card (up to 16 bytes) */
988         cmd->resp[0] = mci_readl(host, RSPR);
989         cmd->resp[1] = mci_readl(host, RSPR);
990         cmd->resp[2] = mci_readl(host, RSPR);
991         cmd->resp[3] = mci_readl(host, RSPR);
992
993         if (status & MCI_RTOE)
994                 cmd->error = -ETIMEDOUT;
995         else if ((cmd->flags & MMC_RSP_CRC) && (status & MCI_RCRCE))
996                 cmd->error = -EILSEQ;
997         else if (status & (MCI_RINDE | MCI_RDIRE | MCI_RENDE))
998                 cmd->error = -EIO;
999         else
1000                 cmd->error = 0;
1001
1002         if (cmd->error) {
1003                 dev_dbg(&host->pdev->dev,
1004                         "command error: status=0x%08x\n", status);
1005
1006                 if (cmd->data) {
1007                         host->data = NULL;
1008                         atmci_stop_dma(host);
1009                         mci_writel(host, IDR, MCI_NOTBUSY
1010                                         | MCI_TXRDY | MCI_RXRDY
1011                                         | ATMCI_DATA_ERROR_FLAGS);
1012                 }
1013         }
1014 }
1015
1016 static void atmci_detect_change(unsigned long data)
1017 {
1018         struct atmel_mci_slot   *slot = (struct atmel_mci_slot *)data;
1019         bool                    present;
1020         bool                    present_old;
1021
1022         /*
1023          * atmci_cleanup_slot() sets the ATMCI_SHUTDOWN flag before
1024          * freeing the interrupt. We must not re-enable the interrupt
1025          * if it has been freed, and if we're shutting down, it
1026          * doesn't really matter whether the card is present or not.
1027          */
1028         smp_rmb();
1029         if (test_bit(ATMCI_SHUTDOWN, &slot->flags))
1030                 return;
1031
1032         enable_irq(gpio_to_irq(slot->detect_pin));
1033         present = !gpio_get_value(slot->detect_pin);
1034         present_old = test_bit(ATMCI_CARD_PRESENT, &slot->flags);
1035
1036         dev_vdbg(&slot->mmc->class_dev, "detect change: %d (was %d)\n",
1037                         present, present_old);
1038
1039         if (present != present_old) {
1040                 struct atmel_mci        *host = slot->host;
1041                 struct mmc_request      *mrq;
1042
1043                 dev_dbg(&slot->mmc->class_dev, "card %s\n",
1044                         present ? "inserted" : "removed");
1045
1046                 spin_lock(&host->lock);
1047
1048                 if (!present)
1049                         clear_bit(ATMCI_CARD_PRESENT, &slot->flags);
1050                 else
1051                         set_bit(ATMCI_CARD_PRESENT, &slot->flags);
1052
1053                 /* Clean up queue if present */
1054                 mrq = slot->mrq;
1055                 if (mrq) {
1056                         if (mrq == host->mrq) {
1057                                 /*
1058                                  * Reset controller to terminate any ongoing
1059                                  * commands or data transfers.
1060                                  */
1061                                 mci_writel(host, CR, MCI_CR_SWRST);
1062                                 mci_writel(host, CR, MCI_CR_MCIEN);
1063                                 mci_writel(host, MR, host->mode_reg);
1064
1065                                 host->data = NULL;
1066                                 host->cmd = NULL;
1067
1068                                 switch (host->state) {
1069                                 case STATE_IDLE:
1070                                         break;
1071                                 case STATE_SENDING_CMD:
1072                                         mrq->cmd->error = -ENOMEDIUM;
1073                                         if (!mrq->data)
1074                                                 break;
1075                                         /* fall through */
1076                                 case STATE_SENDING_DATA:
1077                                         mrq->data->error = -ENOMEDIUM;
1078                                         atmci_stop_dma(host);
1079                                         break;
1080                                 case STATE_DATA_BUSY:
1081                                 case STATE_DATA_ERROR:
1082                                         if (mrq->data->error == -EINPROGRESS)
1083                                                 mrq->data->error = -ENOMEDIUM;
1084                                         if (!mrq->stop)
1085                                                 break;
1086                                         /* fall through */
1087                                 case STATE_SENDING_STOP:
1088                                         mrq->stop->error = -ENOMEDIUM;
1089                                         break;
1090                                 }
1091
1092                                 atmci_request_end(host, mrq);
1093                         } else {
1094                                 list_del(&slot->queue_node);
1095                                 mrq->cmd->error = -ENOMEDIUM;
1096                                 if (mrq->data)
1097                                         mrq->data->error = -ENOMEDIUM;
1098                                 if (mrq->stop)
1099                                         mrq->stop->error = -ENOMEDIUM;
1100
1101                                 spin_unlock(&host->lock);
1102                                 mmc_request_done(slot->mmc, mrq);
1103                                 spin_lock(&host->lock);
1104                         }
1105                 }
1106                 spin_unlock(&host->lock);
1107
1108                 mmc_detect_change(slot->mmc, 0);
1109         }
1110 }
1111
1112 static void atmci_tasklet_func(unsigned long priv)
1113 {
1114         struct atmel_mci        *host = (struct atmel_mci *)priv;
1115         struct mmc_request      *mrq = host->mrq;
1116         struct mmc_data         *data = host->data;
1117         struct mmc_command      *cmd = host->cmd;
1118         enum atmel_mci_state    state = host->state;
1119         enum atmel_mci_state    prev_state;
1120         u32                     status;
1121
1122         spin_lock(&host->lock);
1123
1124         state = host->state;
1125
1126         dev_vdbg(&host->pdev->dev,
1127                 "tasklet: state %u pending/completed/mask %lx/%lx/%x\n",
1128                 state, host->pending_events, host->completed_events,
1129                 mci_readl(host, IMR));
1130
1131         do {
1132                 prev_state = state;
1133
1134                 switch (state) {
1135                 case STATE_IDLE:
1136                         break;
1137
1138                 case STATE_SENDING_CMD:
1139                         if (!atmci_test_and_clear_pending(host,
1140                                                 EVENT_CMD_COMPLETE))
1141                                 break;
1142
1143                         host->cmd = NULL;
1144                         atmci_set_completed(host, EVENT_CMD_COMPLETE);
1145                         atmci_command_complete(host, mrq->cmd);
1146                         if (!mrq->data || cmd->error) {
1147                                 atmci_request_end(host, host->mrq);
1148                                 goto unlock;
1149                         }
1150
1151                         prev_state = state = STATE_SENDING_DATA;
1152                         /* fall through */
1153
1154                 case STATE_SENDING_DATA:
1155                         if (atmci_test_and_clear_pending(host,
1156                                                 EVENT_DATA_ERROR)) {
1157                                 atmci_stop_dma(host);
1158                                 if (data->stop)
1159                                         send_stop_cmd(host, data);
1160                                 state = STATE_DATA_ERROR;
1161                                 break;
1162                         }
1163
1164                         if (!atmci_test_and_clear_pending(host,
1165                                                 EVENT_XFER_COMPLETE))
1166                                 break;
1167
1168                         atmci_set_completed(host, EVENT_XFER_COMPLETE);
1169                         prev_state = state = STATE_DATA_BUSY;
1170                         /* fall through */
1171
1172                 case STATE_DATA_BUSY:
1173                         if (!atmci_test_and_clear_pending(host,
1174                                                 EVENT_DATA_COMPLETE))
1175                                 break;
1176
1177                         host->data = NULL;
1178                         atmci_set_completed(host, EVENT_DATA_COMPLETE);
1179                         status = host->data_status;
1180                         if (unlikely(status & ATMCI_DATA_ERROR_FLAGS)) {
1181                                 if (status & MCI_DTOE) {
1182                                         dev_dbg(&host->pdev->dev,
1183                                                         "data timeout error\n");
1184                                         data->error = -ETIMEDOUT;
1185                                 } else if (status & MCI_DCRCE) {
1186                                         dev_dbg(&host->pdev->dev,
1187                                                         "data CRC error\n");
1188                                         data->error = -EILSEQ;
1189                                 } else {
1190                                         dev_dbg(&host->pdev->dev,
1191                                                 "data FIFO error (status=%08x)\n",
1192                                                 status);
1193                                         data->error = -EIO;
1194                                 }
1195                         } else {
1196                                 data->bytes_xfered = data->blocks * data->blksz;
1197                                 data->error = 0;
1198                         }
1199
1200                         if (!data->stop) {
1201                                 atmci_request_end(host, host->mrq);
1202                                 goto unlock;
1203                         }
1204
1205                         prev_state = state = STATE_SENDING_STOP;
1206                         if (!data->error)
1207                                 send_stop_cmd(host, data);
1208                         /* fall through */
1209
1210                 case STATE_SENDING_STOP:
1211                         if (!atmci_test_and_clear_pending(host,
1212                                                 EVENT_CMD_COMPLETE))
1213                                 break;
1214
1215                         host->cmd = NULL;
1216                         atmci_command_complete(host, mrq->stop);
1217                         atmci_request_end(host, host->mrq);
1218                         goto unlock;
1219
1220                 case STATE_DATA_ERROR:
1221                         if (!atmci_test_and_clear_pending(host,
1222                                                 EVENT_XFER_COMPLETE))
1223                                 break;
1224
1225                         state = STATE_DATA_BUSY;
1226                         break;
1227                 }
1228         } while (state != prev_state);
1229
1230         host->state = state;
1231
1232 unlock:
1233         spin_unlock(&host->lock);
1234 }
1235
1236 static void atmci_read_data_pio(struct atmel_mci *host)
1237 {
1238         struct scatterlist      *sg = host->sg;
1239         void                    *buf = sg_virt(sg);
1240         unsigned int            offset = host->pio_offset;
1241         struct mmc_data         *data = host->data;
1242         u32                     value;
1243         u32                     status;
1244         unsigned int            nbytes = 0;
1245
1246         do {
1247                 value = mci_readl(host, RDR);
1248                 if (likely(offset + 4 <= sg->length)) {
1249                         put_unaligned(value, (u32 *)(buf + offset));
1250
1251                         offset += 4;
1252                         nbytes += 4;
1253
1254                         if (offset == sg->length) {
1255                                 host->sg = sg = sg_next(sg);
1256                                 if (!sg)
1257                                         goto done;
1258
1259                                 offset = 0;
1260                                 buf = sg_virt(sg);
1261                         }
1262                 } else {
1263                         unsigned int remaining = sg->length - offset;
1264                         memcpy(buf + offset, &value, remaining);
1265                         nbytes += remaining;
1266
1267                         flush_dcache_page(sg_page(sg));
1268                         host->sg = sg = sg_next(sg);
1269                         if (!sg)
1270                                 goto done;
1271
1272                         offset = 4 - remaining;
1273                         buf = sg_virt(sg);
1274                         memcpy(buf, (u8 *)&value + remaining, offset);
1275                         nbytes += offset;
1276                 }
1277
1278                 status = mci_readl(host, SR);
1279                 if (status & ATMCI_DATA_ERROR_FLAGS) {
1280                         mci_writel(host, IDR, (MCI_NOTBUSY | MCI_RXRDY
1281                                                 | ATMCI_DATA_ERROR_FLAGS));
1282                         host->data_status = status;
1283                         data->bytes_xfered += nbytes;
1284                         smp_wmb();
1285                         atmci_set_pending(host, EVENT_DATA_ERROR);
1286                         tasklet_schedule(&host->tasklet);
1287                         return;
1288                 }
1289         } while (status & MCI_RXRDY);
1290
1291         host->pio_offset = offset;
1292         data->bytes_xfered += nbytes;
1293
1294         return;
1295
1296 done:
1297         mci_writel(host, IDR, MCI_RXRDY);
1298         mci_writel(host, IER, MCI_NOTBUSY);
1299         data->bytes_xfered += nbytes;
1300         smp_wmb();
1301         atmci_set_pending(host, EVENT_XFER_COMPLETE);
1302 }
1303
1304 static void atmci_write_data_pio(struct atmel_mci *host)
1305 {
1306         struct scatterlist      *sg = host->sg;
1307         void                    *buf = sg_virt(sg);
1308         unsigned int            offset = host->pio_offset;
1309         struct mmc_data         *data = host->data;
1310         u32                     value;
1311         u32                     status;
1312         unsigned int            nbytes = 0;
1313
1314         do {
1315                 if (likely(offset + 4 <= sg->length)) {
1316                         value = get_unaligned((u32 *)(buf + offset));
1317                         mci_writel(host, TDR, value);
1318
1319                         offset += 4;
1320                         nbytes += 4;
1321                         if (offset == sg->length) {
1322                                 host->sg = sg = sg_next(sg);
1323                                 if (!sg)
1324                                         goto done;
1325
1326                                 offset = 0;
1327                                 buf = sg_virt(sg);
1328                         }
1329                 } else {
1330                         unsigned int remaining = sg->length - offset;
1331
1332                         value = 0;
1333                         memcpy(&value, buf + offset, remaining);
1334                         nbytes += remaining;
1335
1336                         host->sg = sg = sg_next(sg);
1337                         if (!sg) {
1338                                 mci_writel(host, TDR, value);
1339                                 goto done;
1340                         }
1341
1342                         offset = 4 - remaining;
1343                         buf = sg_virt(sg);
1344                         memcpy((u8 *)&value + remaining, buf, offset);
1345                         mci_writel(host, TDR, value);
1346                         nbytes += offset;
1347                 }
1348
1349                 status = mci_readl(host, SR);
1350                 if (status & ATMCI_DATA_ERROR_FLAGS) {
1351                         mci_writel(host, IDR, (MCI_NOTBUSY | MCI_TXRDY
1352                                                 | ATMCI_DATA_ERROR_FLAGS));
1353                         host->data_status = status;
1354                         data->bytes_xfered += nbytes;
1355                         smp_wmb();
1356                         atmci_set_pending(host, EVENT_DATA_ERROR);
1357                         tasklet_schedule(&host->tasklet);
1358                         return;
1359                 }
1360         } while (status & MCI_TXRDY);
1361
1362         host->pio_offset = offset;
1363         data->bytes_xfered += nbytes;
1364
1365         return;
1366
1367 done:
1368         mci_writel(host, IDR, MCI_TXRDY);
1369         mci_writel(host, IER, MCI_NOTBUSY);
1370         data->bytes_xfered += nbytes;
1371         smp_wmb();
1372         atmci_set_pending(host, EVENT_XFER_COMPLETE);
1373 }
1374
1375 static void atmci_cmd_interrupt(struct atmel_mci *host, u32 status)
1376 {
1377         mci_writel(host, IDR, MCI_CMDRDY);
1378
1379         host->cmd_status = status;
1380         smp_wmb();
1381         atmci_set_pending(host, EVENT_CMD_COMPLETE);
1382         tasklet_schedule(&host->tasklet);
1383 }
1384
1385 static irqreturn_t atmci_interrupt(int irq, void *dev_id)
1386 {
1387         struct atmel_mci        *host = dev_id;
1388         u32                     status, mask, pending;
1389         unsigned int            pass_count = 0;
1390
1391         do {
1392                 status = mci_readl(host, SR);
1393                 mask = mci_readl(host, IMR);
1394                 pending = status & mask;
1395                 if (!pending)
1396                         break;
1397
1398                 if (pending & ATMCI_DATA_ERROR_FLAGS) {
1399                         mci_writel(host, IDR, ATMCI_DATA_ERROR_FLAGS
1400                                         | MCI_RXRDY | MCI_TXRDY);
1401                         pending &= mci_readl(host, IMR);
1402
1403                         host->data_status = status;
1404                         smp_wmb();
1405                         atmci_set_pending(host, EVENT_DATA_ERROR);
1406                         tasklet_schedule(&host->tasklet);
1407                 }
1408                 if (pending & MCI_NOTBUSY) {
1409                         mci_writel(host, IDR,
1410                                         ATMCI_DATA_ERROR_FLAGS | MCI_NOTBUSY);
1411                         host->data_status = status;
1412                         smp_wmb();
1413                         atmci_set_pending(host, EVENT_DATA_COMPLETE);
1414                         tasklet_schedule(&host->tasklet);
1415                 }
1416                 if (pending & MCI_RXRDY)
1417                         atmci_read_data_pio(host);
1418                 if (pending & MCI_TXRDY)
1419                         atmci_write_data_pio(host);
1420
1421                 if (pending & MCI_CMDRDY)
1422                         atmci_cmd_interrupt(host, status);
1423         } while (pass_count++ < 5);
1424
1425         return pass_count ? IRQ_HANDLED : IRQ_NONE;
1426 }
1427
1428 static irqreturn_t atmci_detect_interrupt(int irq, void *dev_id)
1429 {
1430         struct atmel_mci_slot   *slot = dev_id;
1431
1432         /*
1433          * Disable interrupts until the pin has stabilized and check
1434          * the state then. Use mod_timer() since we may be in the
1435          * middle of the timer routine when this interrupt triggers.
1436          */
1437         disable_irq_nosync(irq);
1438         mod_timer(&slot->detect_timer, jiffies + msecs_to_jiffies(20));
1439
1440         return IRQ_HANDLED;
1441 }
1442
1443 #ifdef CONFIG_MMC_ATMELMCI_DMA
1444
1445 static inline struct atmel_mci *
1446 dma_client_to_atmel_mci(struct dma_client *client)
1447 {
1448         return container_of(client, struct atmel_mci, dma.client);
1449 }
1450
1451 static enum dma_state_client atmci_dma_event(struct dma_client *client,
1452                 struct dma_chan *chan, enum dma_state state)
1453 {
1454         struct atmel_mci        *host;
1455         enum dma_state_client   ret = DMA_NAK;
1456
1457         host = dma_client_to_atmel_mci(client);
1458
1459         switch (state) {
1460         case DMA_RESOURCE_AVAILABLE:
1461                 spin_lock_bh(&host->lock);
1462                 if (!host->dma.chan) {
1463                         host->dma.chan = chan;
1464                         ret = DMA_ACK;
1465                 }
1466                 spin_unlock_bh(&host->lock);
1467
1468                 if (ret == DMA_ACK)
1469                         dev_info(&host->pdev->dev,
1470                                         "Using %s for DMA transfers\n",
1471                                         chan->dev.bus_id);
1472                 break;
1473
1474         case DMA_RESOURCE_REMOVED:
1475                 spin_lock_bh(&host->lock);
1476                 if (host->dma.chan == chan) {
1477                         host->dma.chan = NULL;
1478                         ret = DMA_ACK;
1479                 }
1480                 spin_unlock_bh(&host->lock);
1481
1482                 if (ret == DMA_ACK)
1483                         dev_info(&host->pdev->dev,
1484                                         "Lost %s, falling back to PIO\n",
1485                                         chan->dev.bus_id);
1486                 break;
1487
1488         default:
1489                 break;
1490         }
1491
1492
1493         return ret;
1494 }
1495 #endif /* CONFIG_MMC_ATMELMCI_DMA */
1496
1497 static int __init atmci_init_slot(struct atmel_mci *host,
1498                 struct mci_slot_pdata *slot_data, unsigned int id,
1499                 u32 sdc_reg)
1500 {
1501         struct mmc_host                 *mmc;
1502         struct atmel_mci_slot           *slot;
1503
1504         mmc = mmc_alloc_host(sizeof(struct atmel_mci_slot), &host->pdev->dev);
1505         if (!mmc)
1506                 return -ENOMEM;
1507
1508         slot = mmc_priv(mmc);
1509         slot->mmc = mmc;
1510         slot->host = host;
1511         slot->detect_pin = slot_data->detect_pin;
1512         slot->wp_pin = slot_data->wp_pin;
1513         slot->sdc_reg = sdc_reg;
1514
1515         mmc->ops = &atmci_ops;
1516         mmc->f_min = DIV_ROUND_UP(host->bus_hz, 512);
1517         mmc->f_max = host->bus_hz / 2;
1518         mmc->ocr_avail  = MMC_VDD_32_33 | MMC_VDD_33_34;
1519         if (slot_data->bus_width >= 4)
1520                 mmc->caps |= MMC_CAP_4_BIT_DATA;
1521
1522         mmc->max_hw_segs = 64;
1523         mmc->max_phys_segs = 64;
1524         mmc->max_req_size = 32768 * 512;
1525         mmc->max_blk_size = 32768;
1526         mmc->max_blk_count = 512;
1527
1528         /* Assume card is present initially */
1529         set_bit(ATMCI_CARD_PRESENT, &slot->flags);
1530         if (gpio_is_valid(slot->detect_pin)) {
1531                 if (gpio_request(slot->detect_pin, "mmc_detect")) {
1532                         dev_dbg(&mmc->class_dev, "no detect pin available\n");
1533                         slot->detect_pin = -EBUSY;
1534                 } else if (gpio_get_value(slot->detect_pin)) {
1535                         clear_bit(ATMCI_CARD_PRESENT, &slot->flags);
1536                 }
1537         }
1538
1539         if (!gpio_is_valid(slot->detect_pin))
1540                 mmc->caps |= MMC_CAP_NEEDS_POLL;
1541
1542         if (gpio_is_valid(slot->wp_pin)) {
1543                 if (gpio_request(slot->wp_pin, "mmc_wp")) {
1544                         dev_dbg(&mmc->class_dev, "no WP pin available\n");
1545                         slot->wp_pin = -EBUSY;
1546                 }
1547         }
1548
1549         host->slot[id] = slot;
1550         mmc_add_host(mmc);
1551
1552         if (gpio_is_valid(slot->detect_pin)) {
1553                 int ret;
1554
1555                 setup_timer(&slot->detect_timer, atmci_detect_change,
1556                                 (unsigned long)slot);
1557
1558                 ret = request_irq(gpio_to_irq(slot->detect_pin),
1559                                 atmci_detect_interrupt,
1560                                 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
1561                                 "mmc-detect", slot);
1562                 if (ret) {
1563                         dev_dbg(&mmc->class_dev,
1564                                 "could not request IRQ %d for detect pin\n",
1565                                 gpio_to_irq(slot->detect_pin));
1566                         gpio_free(slot->detect_pin);
1567                         slot->detect_pin = -EBUSY;
1568                 }
1569         }
1570
1571         atmci_init_debugfs(slot);
1572
1573         return 0;
1574 }
1575
1576 static void __exit atmci_cleanup_slot(struct atmel_mci_slot *slot,
1577                 unsigned int id)
1578 {
1579         /* Debugfs stuff is cleaned up by mmc core */
1580
1581         set_bit(ATMCI_SHUTDOWN, &slot->flags);
1582         smp_wmb();
1583
1584         mmc_remove_host(slot->mmc);
1585
1586         if (gpio_is_valid(slot->detect_pin)) {
1587                 int pin = slot->detect_pin;
1588
1589                 free_irq(gpio_to_irq(pin), slot);
1590                 del_timer_sync(&slot->detect_timer);
1591                 gpio_free(pin);
1592         }
1593         if (gpio_is_valid(slot->wp_pin))
1594                 gpio_free(slot->wp_pin);
1595
1596         slot->host->slot[id] = NULL;
1597         mmc_free_host(slot->mmc);
1598 }
1599
1600 static int __init atmci_probe(struct platform_device *pdev)
1601 {
1602         struct mci_platform_data        *pdata;
1603         struct atmel_mci                *host;
1604         struct resource                 *regs;
1605         unsigned int                    nr_slots;
1606         int                             irq;
1607         int                             ret;
1608
1609         regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1610         if (!regs)
1611                 return -ENXIO;
1612         pdata = pdev->dev.platform_data;
1613         if (!pdata)
1614                 return -ENXIO;
1615         irq = platform_get_irq(pdev, 0);
1616         if (irq < 0)
1617                 return irq;
1618
1619         host = kzalloc(sizeof(struct atmel_mci), GFP_KERNEL);
1620         if (!host)
1621                 return -ENOMEM;
1622
1623         host->pdev = pdev;
1624         spin_lock_init(&host->lock);
1625         INIT_LIST_HEAD(&host->queue);
1626
1627         host->mck = clk_get(&pdev->dev, "mci_clk");
1628         if (IS_ERR(host->mck)) {
1629                 ret = PTR_ERR(host->mck);
1630                 goto err_clk_get;
1631         }
1632
1633         ret = -ENOMEM;
1634         host->regs = ioremap(regs->start, regs->end - regs->start + 1);
1635         if (!host->regs)
1636                 goto err_ioremap;
1637
1638         clk_enable(host->mck);
1639         mci_writel(host, CR, MCI_CR_SWRST);
1640         host->bus_hz = clk_get_rate(host->mck);
1641         clk_disable(host->mck);
1642
1643         host->mapbase = regs->start;
1644
1645         tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)host);
1646
1647         ret = request_irq(irq, atmci_interrupt, 0, pdev->dev.bus_id, host);
1648         if (ret)
1649                 goto err_request_irq;
1650
1651 #ifdef CONFIG_MMC_ATMELMCI_DMA
1652         if (pdata->dma_slave) {
1653                 struct dma_slave *slave = pdata->dma_slave;
1654
1655                 slave->tx_reg = regs->start + MCI_TDR;
1656                 slave->rx_reg = regs->start + MCI_RDR;
1657
1658                 /* Try to grab a DMA channel */
1659                 host->dma.client.event_callback = atmci_dma_event;
1660                 dma_cap_set(DMA_SLAVE, host->dma.client.cap_mask);
1661                 host->dma.client.slave = slave;
1662
1663                 dma_async_client_register(&host->dma.client);
1664                 dma_async_client_chan_request(&host->dma.client);
1665         } else {
1666                 dev_notice(&pdev->dev, "DMA not available, using PIO\n");
1667         }
1668 #endif /* CONFIG_MMC_ATMELMCI_DMA */
1669
1670         platform_set_drvdata(pdev, host);
1671
1672         /* We need at least one slot to succeed */
1673         nr_slots = 0;
1674         ret = -ENODEV;
1675         if (pdata->slot[0].bus_width) {
1676                 ret = atmci_init_slot(host, &pdata->slot[0],
1677                                 MCI_SDCSEL_SLOT_A, 0);
1678                 if (!ret)
1679                         nr_slots++;
1680         }
1681         if (pdata->slot[1].bus_width) {
1682                 ret = atmci_init_slot(host, &pdata->slot[1],
1683                                 MCI_SDCSEL_SLOT_B, 1);
1684                 if (!ret)
1685                         nr_slots++;
1686         }
1687
1688         if (!nr_slots)
1689                 goto err_init_slot;
1690
1691         dev_info(&pdev->dev,
1692                         "Atmel MCI controller at 0x%08lx irq %d, %u slots\n",
1693                         host->mapbase, irq, nr_slots);
1694
1695         return 0;
1696
1697 err_init_slot:
1698 #ifdef CONFIG_MMC_ATMELMCI_DMA
1699         if (pdata->dma_slave)
1700                 dma_async_client_unregister(&host->dma.client);
1701 #endif
1702         free_irq(irq, host);
1703 err_request_irq:
1704         iounmap(host->regs);
1705 err_ioremap:
1706         clk_put(host->mck);
1707 err_clk_get:
1708         kfree(host);
1709         return ret;
1710 }
1711
1712 static int __exit atmci_remove(struct platform_device *pdev)
1713 {
1714         struct atmel_mci        *host = platform_get_drvdata(pdev);
1715         unsigned int            i;
1716
1717         platform_set_drvdata(pdev, NULL);
1718
1719         for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
1720                 if (host->slot[i])
1721                         atmci_cleanup_slot(host->slot[i], i);
1722         }
1723
1724         clk_enable(host->mck);
1725         mci_writel(host, IDR, ~0UL);
1726         mci_writel(host, CR, MCI_CR_MCIDIS);
1727         mci_readl(host, SR);
1728         clk_disable(host->mck);
1729
1730 #ifdef CONFIG_MMC_ATMELMCI_DMA
1731         if (host->dma.client.slave)
1732                 dma_async_client_unregister(&host->dma.client);
1733 #endif
1734
1735         free_irq(platform_get_irq(pdev, 0), host);
1736         iounmap(host->regs);
1737
1738         clk_put(host->mck);
1739         kfree(host);
1740
1741         return 0;
1742 }
1743
1744 static struct platform_driver atmci_driver = {
1745         .remove         = __exit_p(atmci_remove),
1746         .driver         = {
1747                 .name           = "atmel_mci",
1748         },
1749 };
1750
1751 static int __init atmci_init(void)
1752 {
1753         return platform_driver_probe(&atmci_driver, atmci_probe);
1754 }
1755
1756 static void __exit atmci_exit(void)
1757 {
1758         platform_driver_unregister(&atmci_driver);
1759 }
1760
1761 module_init(atmci_init);
1762 module_exit(atmci_exit);
1763
1764 MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver");
1765 MODULE_AUTHOR("Haavard Skinnemoen <haavard.skinnemoen@atmel.com>");
1766 MODULE_LICENSE("GPL v2");