2 * SN Platform GRU Driver
4 * FAULT HANDLER FOR GRU DETECTED TLB MISSES
6 * This file contains code that handles TLB misses within the GRU.
7 * These misses are reported either via interrupts or user polling of
10 * Copyright (c) 2008 Silicon Graphics, Inc. All Rights Reserved.
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
27 #include <linux/kernel.h>
28 #include <linux/errno.h>
29 #include <linux/spinlock.h>
31 #include <linux/hugetlb.h>
32 #include <linux/device.h>
34 #include <linux/uaccess.h>
35 #include <linux/security.h>
36 #include <asm/pgtable.h>
38 #include "grutables.h"
40 #include "gru_instructions.h"
41 #include <asm/uv/uv_hub.h>
44 * Test if a physical address is a valid GRU GSEG address
46 static inline int is_gru_paddr(unsigned long paddr)
48 return paddr >= gru_start_paddr && paddr < gru_end_paddr;
52 * Find the vma of a GRU segment. Caller must hold mmap_sem.
54 struct vm_area_struct *gru_find_vma(unsigned long vaddr)
56 struct vm_area_struct *vma;
58 vma = find_vma(current->mm, vaddr);
59 if (vma && vma->vm_start <= vaddr && vma->vm_ops == &gru_vm_ops)
65 * Find and lock the gts that contains the specified user vaddr.
68 * - *gts with the mmap_sem locked for read and the GTS locked.
69 * - NULL if vaddr invalid OR is not a valid GSEG vaddr.
72 static struct gru_thread_state *gru_find_lock_gts(unsigned long vaddr)
74 struct mm_struct *mm = current->mm;
75 struct vm_area_struct *vma;
76 struct gru_thread_state *gts = NULL;
78 down_read(&mm->mmap_sem);
79 vma = gru_find_vma(vaddr);
81 gts = gru_find_thread_state(vma, TSID(vaddr, vma));
83 mutex_lock(>s->ts_ctxlock);
85 up_read(&mm->mmap_sem);
89 static struct gru_thread_state *gru_alloc_locked_gts(unsigned long vaddr)
91 struct mm_struct *mm = current->mm;
92 struct vm_area_struct *vma;
93 struct gru_thread_state *gts = NULL;
95 down_write(&mm->mmap_sem);
96 vma = gru_find_vma(vaddr);
98 gts = gru_alloc_thread_state(vma, TSID(vaddr, vma));
100 mutex_lock(>s->ts_ctxlock);
101 downgrade_write(&mm->mmap_sem);
103 up_write(&mm->mmap_sem);
110 * Unlock a GTS that was previously locked with gru_find_lock_gts().
112 static void gru_unlock_gts(struct gru_thread_state *gts)
114 mutex_unlock(>s->ts_ctxlock);
115 up_read(¤t->mm->mmap_sem);
119 * Set a CB.istatus to active using a user virtual address. This must be done
120 * just prior to a TFH RESTART. The new cb.istatus is an in-cache status ONLY.
121 * If the line is evicted, the status may be lost. The in-cache update
122 * is necessary to prevent the user from seeing a stale cb.istatus that will
123 * change as soon as the TFH restart is complete. Races may cause an
124 * occasional failure to clear the cb.istatus, but that is ok.
126 * If the cb address is not valid (should not happen, but...), nothing
127 * bad will happen.. The get_user()/put_user() will fail but there
128 * are no bad side-effects.
130 static void gru_cb_set_istatus_active(unsigned long __user *cb)
133 struct gru_instruction_bits bits;
139 u.bits.istatus = CBS_ACTIVE;
145 * Convert a interrupt IRQ to a pointer to the GRU GTS that caused the
146 * interrupt. Interrupts are always sent to a cpu on the blade that contains the
147 * GRU (except for headless blades which are not currently supported). A blade
148 * has N grus; a block of N consecutive IRQs is assigned to the GRUs. The IRQ
149 * number uniquely identifies the GRU chiplet on the local blade that caused the
150 * interrupt. Always called in interrupt context.
152 static inline struct gru_state *irq_to_gru(int irq)
154 return &gru_base[uv_numa_blade_id()]->bs_grus[irq - IRQ_GRU];
160 * The GRU has an array of fault maps. A map is private to a cpu
161 * Only one cpu will be accessing a cpu's fault map.
163 * This function scans the cpu-private fault map & clears all bits that
164 * are set. The function returns a bitmap that indicates the bits that
165 * were cleared. Note that sense the maps may be updated asynchronously by
166 * the GRU, atomic operations must be used to clear bits.
168 static void get_clear_fault_map(struct gru_state *gru,
169 struct gru_tlb_fault_map *map)
172 struct gru_tlb_fault_map *tfm;
174 tfm = get_tfm_for_cpu(gru, gru_cpu_fault_map_id());
175 prefetchw(tfm); /* Helps on hardware, required for emulator */
176 for (i = 0; i < BITS_TO_LONGS(GRU_NUM_CBE); i++) {
177 k = tfm->fault_bits[i];
179 k = xchg(&tfm->fault_bits[i], 0UL);
180 map->fault_bits[i] = k;
184 * Not functionally required but helps performance. (Required
187 gru_flush_cache(tfm);
191 * Atomic (interrupt context) & non-atomic (user context) functions to
192 * convert a vaddr into a physical address. The size of the page
193 * is returned in pageshift.
197 * 1 - (atomic only) try again in non-atomic context
199 static int non_atomic_pte_lookup(struct vm_area_struct *vma,
200 unsigned long vaddr, int write,
201 unsigned long *paddr, int *pageshift)
205 /* ZZZ Need to handle HUGE pages */
206 if (is_vm_hugetlb_page(vma))
208 *pageshift = PAGE_SHIFT;
210 (current, current->mm, vaddr, 1, write, 0, &page, NULL) <= 0)
212 *paddr = page_to_phys(page);
220 * Convert a user virtual address to a physical address
221 * Only supports Intel large pages (2MB only) on x86_64.
222 * ZZZ - hugepage support is incomplete
224 * NOTE: mmap_sem is already held on entry to this function. This
225 * guarantees existence of the page tables.
227 static int atomic_pte_lookup(struct vm_area_struct *vma, unsigned long vaddr,
228 int write, unsigned long *paddr, int *pageshift)
235 pgdp = pgd_offset(vma->vm_mm, vaddr);
236 if (unlikely(pgd_none(*pgdp)))
239 pudp = pud_offset(pgdp, vaddr);
240 if (unlikely(pud_none(*pudp)))
243 pmdp = pmd_offset(pudp, vaddr);
244 if (unlikely(pmd_none(*pmdp)))
247 if (unlikely(pmd_large(*pmdp)))
248 pte = *(pte_t *) pmdp;
251 pte = *pte_offset_kernel(pmdp, vaddr);
253 if (unlikely(!pte_present(pte) ||
254 (write && (!pte_write(pte) || !pte_dirty(pte)))))
257 *paddr = pte_pfn(pte) << PAGE_SHIFT;
258 #ifdef CONFIG_HUGETLB_PAGE
259 *pageshift = is_vm_hugetlb_page(vma) ? HPAGE_SHIFT : PAGE_SHIFT;
261 *pageshift = PAGE_SHIFT;
271 * Drop a TLB entry into the GRU. The fault is described by info in an TFH.
273 * cb Address of user CBR. Null if not running in user context
275 * 0 = dropin, exception, or switch to UPM successful
276 * 1 = range invalidate active
280 static int gru_try_dropin(struct gru_thread_state *gts,
281 struct gru_tlb_fault_handle *tfh,
282 unsigned long __user *cb)
284 struct mm_struct *mm = gts->ts_mm;
285 struct vm_area_struct *vma;
286 int pageshift, asid, write, ret;
287 unsigned long paddr, gpa, vaddr;
290 * NOTE: The GRU contains magic hardware that eliminates races between
291 * TLB invalidates and TLB dropins. If an invalidate occurs
292 * in the window between reading the TFH and the subsequent TLB dropin,
293 * the dropin is ignored. This eliminates the need for additional locks.
297 * Error if TFH state is IDLE or FMM mode & the user issuing a UPM call.
298 * Might be a hardware race OR a stupid user. Ignore FMM because FMM
299 * is a transient state.
301 if (tfh->state == TFHSTATE_IDLE)
303 if (tfh->state == TFHSTATE_MISS_FMM && cb)
306 write = (tfh->cause & TFHCAUSE_TLB_MOD) != 0;
307 vaddr = tfh->missvaddr;
308 asid = tfh->missasid;
312 rmb(); /* TFH must be cache resident before reading ms_range_active */
315 * TFH is cache resident - at least briefly. Fail the dropin
316 * if a range invalidate is active.
318 if (atomic_read(>s->ts_gms->ms_range_active))
321 vma = find_vma(mm, vaddr);
326 * Atomic lookup is faster & usually works even if called in non-atomic
329 rmb(); /* Must/check ms_range_active before loading PTEs */
330 ret = atomic_pte_lookup(vma, vaddr, write, &paddr, &pageshift);
334 if (non_atomic_pte_lookup(vma, vaddr, write, &paddr,
338 if (is_gru_paddr(paddr))
341 paddr = paddr & ~((1UL << pageshift) - 1);
342 gpa = uv_soc_phys_ram_to_gpa(paddr);
343 gru_cb_set_istatus_active(cb);
344 tfh_write_restart(tfh, gpa, GAA_RAM, vaddr, asid, write,
345 GRU_PAGESIZE(pageshift));
348 "%s: tfh 0x%p, vaddr 0x%lx, asid 0x%x, ps %d, gpa 0x%lx\n",
349 ret ? "non-atomic" : "atomic", tfh, vaddr, asid,
354 /* No asid (delayed unload). */
355 STAT(tlb_dropin_fail_no_asid);
356 gru_dbg(grudev, "FAILED no_asid tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr);
358 tfh_user_polling_mode(tfh);
360 gru_flush_cache(tfh);
364 /* Atomic failure switch CBR to UPM */
365 tfh_user_polling_mode(tfh);
366 STAT(tlb_dropin_fail_upm);
367 gru_dbg(grudev, "FAILED upm tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr);
371 /* FMM state on UPM call */
372 gru_flush_cache(tfh);
373 STAT(tlb_dropin_fail_fmm);
374 gru_dbg(grudev, "FAILED fmm tfh: 0x%p, state %d\n", tfh, tfh->state);
378 /* TFH was idle - no miss pending */
379 gru_flush_cache(tfh);
382 STAT(tlb_dropin_fail_idle);
383 gru_dbg(grudev, "FAILED idle tfh: 0x%p, state %d\n", tfh, tfh->state);
387 /* All errors (atomic & non-atomic) switch CBR to EXCEPTION state */
389 STAT(tlb_dropin_fail_invalid);
390 gru_dbg(grudev, "FAILED inval tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr);
394 /* Range invalidate active. Switch to UPM iff atomic */
396 tfh_user_polling_mode(tfh);
398 gru_flush_cache(tfh);
399 STAT(tlb_dropin_fail_range_active);
400 gru_dbg(grudev, "FAILED range active: tfh 0x%p, vaddr 0x%lx\n",
406 * Process an external interrupt from the GRU. This interrupt is
407 * caused by a TLB miss.
408 * Note that this is the interrupt handler that is registered with linux
409 * interrupt handlers.
411 irqreturn_t gru_intr(int irq, void *dev_id)
413 struct gru_state *gru;
414 struct gru_tlb_fault_map map;
415 struct gru_thread_state *gts;
416 struct gru_tlb_fault_handle *tfh = NULL;
421 gru = irq_to_gru(irq);
423 dev_err(grudev, "GRU: invalid interrupt: cpu %d, irq %d\n",
424 raw_smp_processor_id(), irq);
427 get_clear_fault_map(gru, &map);
428 gru_dbg(grudev, "irq %d, gru %x, map 0x%lx\n", irq, gru->gs_gid,
431 for_each_cbr_in_tfm(cbrnum, map.fault_bits) {
432 tfh = get_tfh_by_index(gru, cbrnum);
433 prefetchw(tfh); /* Helps on hdw, required for emulator */
436 * When hardware sets a bit in the faultmap, it implicitly
437 * locks the GRU context so that it cannot be unloaded.
438 * The gts cannot change until a TFH start/writestart command
441 ctxnum = tfh->ctxnum;
442 gts = gru->gs_gts[ctxnum];
445 * This is running in interrupt context. Trylock the mmap_sem.
446 * If it fails, retry the fault in user context.
448 if (down_read_trylock(>s->ts_mm->mmap_sem)) {
449 gru_try_dropin(gts, tfh, NULL);
450 up_read(>s->ts_mm->mmap_sem);
452 tfh_user_polling_mode(tfh);
453 STAT(intr_mm_lock_failed);
460 static int gru_user_dropin(struct gru_thread_state *gts,
461 struct gru_tlb_fault_handle *tfh,
462 unsigned long __user *cb)
464 struct gru_mm_struct *gms = gts->ts_gms;
468 wait_event(gms->ms_wait_queue,
469 atomic_read(&gms->ms_range_active) == 0);
470 prefetchw(tfh); /* Helps on hdw, required for emulator */
471 ret = gru_try_dropin(gts, tfh, cb);
474 STAT(call_os_wait_queue);
479 * This interface is called as a result of a user detecting a "call OS" bit
480 * in a user CB. Normally means that a TLB fault has occurred.
481 * cb - user virtual address of the CB
483 int gru_handle_user_call_os(unsigned long cb)
485 struct gru_tlb_fault_handle *tfh;
486 struct gru_thread_state *gts;
487 unsigned long __user *cbp;
488 int ucbnum, cbrnum, ret = -EINVAL;
491 gru_dbg(grudev, "address 0x%lx\n", cb);
493 /* sanity check the cb pointer */
494 ucbnum = get_cb_number((void *)cb);
495 if ((cb & (GRU_HANDLE_STRIDE - 1)) || ucbnum >= GRU_NUM_CB)
497 cbp = (unsigned long *)cb;
499 gts = gru_find_lock_gts(cb);
503 if (ucbnum >= gts->ts_cbr_au_count * GRU_CBR_AU_SIZE)
507 * If force_unload is set, the UPM TLB fault is phony. The task
508 * has migrated to another node and the GSEG must be moved. Just
509 * unload the context. The task will page fault and assign a new
512 if (gts->ts_tgid_owner == current->tgid && gts->ts_blade >= 0 &&
513 gts->ts_blade != uv_numa_blade_id()) {
514 STAT(call_os_offnode_reference);
515 gts->ts_force_unload = 1;
519 cbrnum = thread_cbr_number(gts, ucbnum);
520 if (gts->ts_force_unload) {
521 gru_unload_context(gts, 1);
522 } else if (gts->ts_gru) {
523 tfh = get_tfh_by_index(gts->ts_gru, cbrnum);
524 ret = gru_user_dropin(gts, tfh, cbp);
532 * Fetch the exception detail information for a CB that terminated with
535 int gru_get_exception_detail(unsigned long arg)
537 struct control_block_extended_exc_detail excdet;
538 struct gru_control_block_extended *cbe;
539 struct gru_thread_state *gts;
540 int ucbnum, cbrnum, ret;
542 STAT(user_exception);
543 if (copy_from_user(&excdet, (void __user *)arg, sizeof(excdet)))
546 gru_dbg(grudev, "address 0x%lx\n", excdet.cb);
547 gts = gru_find_lock_gts(excdet.cb);
551 ucbnum = get_cb_number((void *)excdet.cb);
552 if (ucbnum >= gts->ts_cbr_au_count * GRU_CBR_AU_SIZE) {
554 } else if (gts->ts_gru) {
555 cbrnum = thread_cbr_number(gts, ucbnum);
556 cbe = get_cbe_by_index(gts->ts_gru, cbrnum);
557 prefetchw(cbe);/* Harmless on hardware, required for emulator */
558 excdet.opc = cbe->opccpy;
559 excdet.exopc = cbe->exopccpy;
560 excdet.ecause = cbe->ecause;
561 excdet.exceptdet0 = cbe->idef1upd;
562 excdet.exceptdet1 = cbe->idef3upd;
569 gru_dbg(grudev, "address 0x%lx, ecause 0x%x\n", excdet.cb,
571 if (!ret && copy_to_user((void __user *)arg, &excdet, sizeof(excdet)))
577 * User request to unload a context. Content is saved for possible reload.
579 static int gru_unload_all_contexts(void)
581 struct gru_thread_state *gts;
582 struct gru_state *gru;
583 int maxgid, gid, ctxnum;
586 if (!capable(CAP_SYS_ADMIN))
588 if (num_online_nodes() > 1 &&
589 (uv_node_to_blade_id(1) == uv_node_to_blade_id(0)))
593 maxgid = GRU_CHIPLETS_PER_BLADE * num_online_nodes() / nodesperblade;
594 for (gid = 0; gid < maxgid; gid++) {
595 gru = GID_TO_GRU(gid);
596 spin_lock(&gru->gs_lock);
597 for (ctxnum = 0; ctxnum < GRU_NUM_CCH; ctxnum++) {
598 gts = gru->gs_gts[ctxnum];
599 if (gts && mutex_trylock(>s->ts_ctxlock)) {
600 spin_unlock(&gru->gs_lock);
601 gru_unload_context(gts, 1);
603 spin_lock(&gru->gs_lock);
606 spin_unlock(&gru->gs_lock);
611 int gru_user_unload_context(unsigned long arg)
613 struct gru_thread_state *gts;
614 struct gru_unload_context_req req;
616 STAT(user_unload_context);
617 if (copy_from_user(&req, (void __user *)arg, sizeof(req)))
620 gru_dbg(grudev, "gseg 0x%lx\n", req.gseg);
623 return gru_unload_all_contexts();
625 gts = gru_find_lock_gts(req.gseg);
630 gru_unload_context(gts, 1);
637 * User request to flush a range of virtual addresses from the GRU TLB
638 * (Mainly for testing).
640 int gru_user_flush_tlb(unsigned long arg)
642 struct gru_thread_state *gts;
643 struct gru_flush_tlb_req req;
645 STAT(user_flush_tlb);
646 if (copy_from_user(&req, (void __user *)arg, sizeof(req)))
649 gru_dbg(grudev, "gseg 0x%lx, vaddr 0x%lx, len 0x%lx\n", req.gseg,
652 gts = gru_find_lock_gts(req.gseg);
656 gru_flush_tlb_range(gts->ts_gms, req.vaddr, req.len);
663 * Register the current task as the user of the GSEG slice.
664 * Needed for TLB fault interrupt targeting.
666 int gru_set_task_slice(long address)
668 struct gru_thread_state *gts;
670 STAT(set_task_slice);
671 gru_dbg(grudev, "address 0x%lx\n", address);
672 gts = gru_alloc_locked_gts(address);
676 gts->ts_tgid_owner = current->tgid;