4 * Copyright (C) 2008 Jean-Francois Moine (http://moinejf.free.fr)
5 * Copyright (C) 2009 Hans de Goede <hdegoede@redhat.com>
7 * This module is adapted from the ov51x-jpeg package, which itself
8 * was adapted from the ov511 driver.
10 * Original copyright for the ov511 driver is:
12 * Copyright (c) 1999-2006 Mark W. McClelland
13 * Support for OV519, OV8610 Copyright (c) 2003 Joerg Heckenbach
14 * Many improvements by Bret Wallach <bwallac1@san.rr.com>
15 * Color fixes by by Orion Sky Lawlor <olawlor@acm.org> (2/26/2000)
16 * OV7620 fixes by Charl P. Botha <cpbotha@ieee.org>
17 * Changes by Claudio Matsuoka <claudio@conectiva.com>
19 * ov51x-jpeg original copyright is:
21 * Copyright (c) 2004-2007 Romain Beauxis <toots@rastageeks.org>
22 * Support for OV7670 sensors was contributed by Sam Skipsey <aoanla@yahoo.com>
24 * This program is free software; you can redistribute it and/or modify
25 * it under the terms of the GNU General Public License as published by
26 * the Free Software Foundation; either version 2 of the License, or
29 * This program is distributed in the hope that it will be useful,
30 * but WITHOUT ANY WARRANTY; without even the implied warranty of
31 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
32 * GNU General Public License for more details.
34 * You should have received a copy of the GNU General Public License
35 * along with this program; if not, write to the Free Software
36 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
39 #define MODULE_NAME "ov519"
43 MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
44 MODULE_DESCRIPTION("OV519 USB Camera Driver");
45 MODULE_LICENSE("GPL");
47 /* global parameters */
48 static int frame_rate;
50 /* Number of times to retry a failed I2C transaction. Increase this if you
51 * are getting "Failed to read sensor ID..." */
52 static int i2c_detect_tries = 10;
54 /* ov519 device descriptor */
56 struct gspca_dev gspca_dev; /* !! must be the first item */
61 #define BRIDGE_OV511 0
62 #define BRIDGE_OV511PLUS 1
63 #define BRIDGE_OV518 2
64 #define BRIDGE_OV518PLUS 3
65 #define BRIDGE_OV519 4
66 #define BRIDGE_OVFX2 5
67 #define BRIDGE_W9968CF 6
71 #define BRIDGE_INVERT_LED 8
73 /* Determined by sensor type */
84 __u8 stopped; /* Streaming is temporarily paused */
86 __u8 frame_rate; /* current Framerate */
87 __u8 clockdiv; /* clockdiv override */
89 char sensor; /* Type of image sensor chip (SEN_*) */
95 #define SEN_OV66308AF 5
100 #define SEN_OV76BE 10
101 #define SEN_OV8610 11
106 int sensor_reg_cache[256];
109 /* Note this is a bit of a hack, but the w9968cf driver needs the code for all
110 the ov sensors which is already present here. When we have the time we
111 really should move the sensor drivers to v4l2 sub drivers. */
114 /* V4L2 controls supported by the driver */
115 static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val);
116 static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val);
117 static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val);
118 static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val);
119 static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val);
120 static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val);
121 static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val);
122 static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val);
123 static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val);
124 static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val);
125 static int sd_setautobrightness(struct gspca_dev *gspca_dev, __s32 val);
126 static int sd_getautobrightness(struct gspca_dev *gspca_dev, __s32 *val);
127 static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val);
128 static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val);
129 static void setbrightness(struct gspca_dev *gspca_dev);
130 static void setcontrast(struct gspca_dev *gspca_dev);
131 static void setcolors(struct gspca_dev *gspca_dev);
132 static void setautobrightness(struct sd *sd);
133 static void setfreq(struct sd *sd);
135 static const struct ctrl sd_ctrls[] = {
138 .id = V4L2_CID_BRIGHTNESS,
139 .type = V4L2_CTRL_TYPE_INTEGER,
140 .name = "Brightness",
144 #define BRIGHTNESS_DEF 127
145 .default_value = BRIGHTNESS_DEF,
147 .set = sd_setbrightness,
148 .get = sd_getbrightness,
152 .id = V4L2_CID_CONTRAST,
153 .type = V4L2_CTRL_TYPE_INTEGER,
158 #define CONTRAST_DEF 127
159 .default_value = CONTRAST_DEF,
161 .set = sd_setcontrast,
162 .get = sd_getcontrast,
166 .id = V4L2_CID_SATURATION,
167 .type = V4L2_CTRL_TYPE_INTEGER,
172 #define COLOR_DEF 127
173 .default_value = COLOR_DEF,
178 /* The flip controls work with ov7670 only */
182 .id = V4L2_CID_HFLIP,
183 .type = V4L2_CTRL_TYPE_BOOLEAN,
189 .default_value = HFLIP_DEF,
197 .id = V4L2_CID_VFLIP,
198 .type = V4L2_CTRL_TYPE_BOOLEAN,
204 .default_value = VFLIP_DEF,
209 #define AUTOBRIGHT_IDX 5
212 .id = V4L2_CID_AUTOBRIGHTNESS,
213 .type = V4L2_CTRL_TYPE_BOOLEAN,
214 .name = "Auto Brightness",
218 #define AUTOBRIGHT_DEF 1
219 .default_value = AUTOBRIGHT_DEF,
221 .set = sd_setautobrightness,
222 .get = sd_getautobrightness,
227 .id = V4L2_CID_POWER_LINE_FREQUENCY,
228 .type = V4L2_CTRL_TYPE_MENU,
229 .name = "Light frequency filter",
231 .maximum = 2, /* 0: 0, 1: 50Hz, 2:60Hz */
234 .default_value = FREQ_DEF,
239 #define OV7670_FREQ_IDX 7
242 .id = V4L2_CID_POWER_LINE_FREQUENCY,
243 .type = V4L2_CTRL_TYPE_MENU,
244 .name = "Light frequency filter",
246 .maximum = 3, /* 0: 0, 1: 50Hz, 2:60Hz 3: Auto Hz */
248 #define OV7670_FREQ_DEF 3
249 .default_value = OV7670_FREQ_DEF,
256 static const struct v4l2_pix_format ov519_vga_mode[] = {
257 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
259 .sizeimage = 320 * 240 * 3 / 8 + 590,
260 .colorspace = V4L2_COLORSPACE_JPEG,
262 {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
264 .sizeimage = 640 * 480 * 3 / 8 + 590,
265 .colorspace = V4L2_COLORSPACE_JPEG,
268 static const struct v4l2_pix_format ov519_sif_mode[] = {
269 {160, 120, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
271 .sizeimage = 160 * 120 * 3 / 8 + 590,
272 .colorspace = V4L2_COLORSPACE_JPEG,
274 {176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
276 .sizeimage = 176 * 144 * 3 / 8 + 590,
277 .colorspace = V4L2_COLORSPACE_JPEG,
279 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
281 .sizeimage = 320 * 240 * 3 / 8 + 590,
282 .colorspace = V4L2_COLORSPACE_JPEG,
284 {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
286 .sizeimage = 352 * 288 * 3 / 8 + 590,
287 .colorspace = V4L2_COLORSPACE_JPEG,
291 /* Note some of the sizeimage values for the ov511 / ov518 may seem
292 larger then necessary, however they need to be this big as the ov511 /
293 ov518 always fills the entire isoc frame, using 0 padding bytes when
294 it doesn't have any data. So with low framerates the amount of data
295 transfered can become quite large (libv4l will remove all the 0 padding
297 static const struct v4l2_pix_format ov518_vga_mode[] = {
298 {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
300 .sizeimage = 320 * 240 * 3,
301 .colorspace = V4L2_COLORSPACE_JPEG,
303 {640, 480, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
305 .sizeimage = 640 * 480 * 2,
306 .colorspace = V4L2_COLORSPACE_JPEG,
309 static const struct v4l2_pix_format ov518_sif_mode[] = {
310 {160, 120, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
313 .colorspace = V4L2_COLORSPACE_JPEG,
315 {176, 144, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
318 .colorspace = V4L2_COLORSPACE_JPEG,
320 {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
322 .sizeimage = 320 * 240 * 3,
323 .colorspace = V4L2_COLORSPACE_JPEG,
325 {352, 288, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
327 .sizeimage = 352 * 288 * 3,
328 .colorspace = V4L2_COLORSPACE_JPEG,
332 static const struct v4l2_pix_format ov511_vga_mode[] = {
333 {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
335 .sizeimage = 320 * 240 * 3,
336 .colorspace = V4L2_COLORSPACE_JPEG,
338 {640, 480, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
340 .sizeimage = 640 * 480 * 2,
341 .colorspace = V4L2_COLORSPACE_JPEG,
344 static const struct v4l2_pix_format ov511_sif_mode[] = {
345 {160, 120, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
348 .colorspace = V4L2_COLORSPACE_JPEG,
350 {176, 144, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
353 .colorspace = V4L2_COLORSPACE_JPEG,
355 {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
357 .sizeimage = 320 * 240 * 3,
358 .colorspace = V4L2_COLORSPACE_JPEG,
360 {352, 288, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
362 .sizeimage = 352 * 288 * 3,
363 .colorspace = V4L2_COLORSPACE_JPEG,
367 static const struct v4l2_pix_format ovfx2_vga_mode[] = {
368 {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
370 .sizeimage = 320 * 240,
371 .colorspace = V4L2_COLORSPACE_SRGB,
373 {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
375 .sizeimage = 640 * 480,
376 .colorspace = V4L2_COLORSPACE_SRGB,
379 static const struct v4l2_pix_format ovfx2_cif_mode[] = {
380 {160, 120, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
382 .sizeimage = 160 * 120,
383 .colorspace = V4L2_COLORSPACE_SRGB,
385 {176, 144, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
387 .sizeimage = 176 * 144,
388 .colorspace = V4L2_COLORSPACE_SRGB,
390 {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
392 .sizeimage = 320 * 240,
393 .colorspace = V4L2_COLORSPACE_SRGB,
395 {352, 288, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
397 .sizeimage = 352 * 288,
398 .colorspace = V4L2_COLORSPACE_SRGB,
401 static const struct v4l2_pix_format ovfx2_ov2610_mode[] = {
402 {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
403 .bytesperline = 1600,
404 .sizeimage = 1600 * 1200,
405 .colorspace = V4L2_COLORSPACE_SRGB},
407 static const struct v4l2_pix_format ovfx2_ov3610_mode[] = {
408 {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
410 .sizeimage = 640 * 480,
411 .colorspace = V4L2_COLORSPACE_SRGB,
413 {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
415 .sizeimage = 800 * 600,
416 .colorspace = V4L2_COLORSPACE_SRGB,
418 {1024, 768, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
419 .bytesperline = 1024,
420 .sizeimage = 1024 * 768,
421 .colorspace = V4L2_COLORSPACE_SRGB,
423 {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
424 .bytesperline = 1600,
425 .sizeimage = 1600 * 1200,
426 .colorspace = V4L2_COLORSPACE_SRGB,
428 {2048, 1536, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
429 .bytesperline = 2048,
430 .sizeimage = 2048 * 1536,
431 .colorspace = V4L2_COLORSPACE_SRGB,
436 /* Registers common to OV511 / OV518 */
437 #define R51x_FIFO_PSIZE 0x30 /* 2 bytes wide w/ OV518(+) */
438 #define R51x_SYS_RESET 0x50
439 /* Reset type flags */
440 #define OV511_RESET_OMNICE 0x08
441 #define R51x_SYS_INIT 0x53
442 #define R51x_SYS_SNAP 0x52
443 #define R51x_SYS_CUST_ID 0x5F
444 #define R51x_COMP_LUT_BEGIN 0x80
446 /* OV511 Camera interface register numbers */
447 #define R511_CAM_DELAY 0x10
448 #define R511_CAM_EDGE 0x11
449 #define R511_CAM_PXCNT 0x12
450 #define R511_CAM_LNCNT 0x13
451 #define R511_CAM_PXDIV 0x14
452 #define R511_CAM_LNDIV 0x15
453 #define R511_CAM_UV_EN 0x16
454 #define R511_CAM_LINE_MODE 0x17
455 #define R511_CAM_OPTS 0x18
457 #define R511_SNAP_FRAME 0x19
458 #define R511_SNAP_PXCNT 0x1A
459 #define R511_SNAP_LNCNT 0x1B
460 #define R511_SNAP_PXDIV 0x1C
461 #define R511_SNAP_LNDIV 0x1D
462 #define R511_SNAP_UV_EN 0x1E
463 #define R511_SNAP_UV_EN 0x1E
464 #define R511_SNAP_OPTS 0x1F
466 #define R511_DRAM_FLOW_CTL 0x20
467 #define R511_FIFO_OPTS 0x31
468 #define R511_I2C_CTL 0x40
469 #define R511_SYS_LED_CTL 0x55 /* OV511+ only */
470 #define R511_COMP_EN 0x78
471 #define R511_COMP_LUT_EN 0x79
473 /* OV518 Camera interface register numbers */
474 #define R518_GPIO_OUT 0x56 /* OV518(+) only */
475 #define R518_GPIO_CTL 0x57 /* OV518(+) only */
477 /* OV519 Camera interface register numbers */
478 #define OV519_R10_H_SIZE 0x10
479 #define OV519_R11_V_SIZE 0x11
480 #define OV519_R12_X_OFFSETL 0x12
481 #define OV519_R13_X_OFFSETH 0x13
482 #define OV519_R14_Y_OFFSETL 0x14
483 #define OV519_R15_Y_OFFSETH 0x15
484 #define OV519_R16_DIVIDER 0x16
485 #define OV519_R20_DFR 0x20
486 #define OV519_R25_FORMAT 0x25
488 /* OV519 System Controller register numbers */
489 #define OV519_SYS_RESET1 0x51
490 #define OV519_SYS_EN_CLK1 0x54
492 #define OV519_GPIO_DATA_OUT0 0x71
493 #define OV519_GPIO_IO_CTRL0 0x72
495 #define OV511_ENDPOINT_ADDRESS 1 /* Isoc endpoint number */
498 * The FX2 chip does not give us a zero length read at end of frame.
499 * It does, however, give a short read at the end of a frame, if
500 * neccessary, rather than run two frames together.
502 * By choosing the right bulk transfer size, we are guaranteed to always
503 * get a short read for the last read of each frame. Frame sizes are
504 * always a composite number (width * height, or a multiple) so if we
505 * choose a prime number, we are guaranteed that the last read of a
506 * frame will be short.
508 * But it isn't that easy: the 2.6 kernel requires a multiple of 4KB,
509 * otherwise EOVERFLOW "babbling" errors occur. I have not been able
510 * to figure out why. [PMiller]
512 * The constant (13 * 4096) is the largest "prime enough" number less than 64KB.
514 * It isn't enough to know the number of bytes per frame, in case we
515 * have data dropouts or buffer overruns (even though the FX2 double
516 * buffers, there are some pretty strict real time constraints for
517 * isochronous transfer for larger frame sizes).
519 #define OVFX2_BULK_SIZE (13 * 4096)
522 #define R51x_I2C_W_SID 0x41
523 #define R51x_I2C_SADDR_3 0x42
524 #define R51x_I2C_SADDR_2 0x43
525 #define R51x_I2C_R_SID 0x44
526 #define R51x_I2C_DATA 0x45
527 #define R518_I2C_CTL 0x47 /* OV518(+) only */
528 #define OVFX2_I2C_ADDR 0x00
531 #define OV7xx0_SID 0x42
532 #define OV_HIRES_SID 0x60 /* OV9xxx / OV2xxx / OV3xxx */
533 #define OV8xx0_SID 0xa0
534 #define OV6xx0_SID 0xc0
536 /* OV7610 registers */
537 #define OV7610_REG_GAIN 0x00 /* gain setting (5:0) */
538 #define OV7610_REG_BLUE 0x01 /* blue channel balance */
539 #define OV7610_REG_RED 0x02 /* red channel balance */
540 #define OV7610_REG_SAT 0x03 /* saturation */
541 #define OV8610_REG_HUE 0x04 /* 04 reserved */
542 #define OV7610_REG_CNT 0x05 /* Y contrast */
543 #define OV7610_REG_BRT 0x06 /* Y brightness */
544 #define OV7610_REG_COM_C 0x14 /* misc common regs */
545 #define OV7610_REG_ID_HIGH 0x1c /* manufacturer ID MSB */
546 #define OV7610_REG_ID_LOW 0x1d /* manufacturer ID LSB */
547 #define OV7610_REG_COM_I 0x29 /* misc settings */
549 /* OV7670 registers */
550 #define OV7670_REG_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
551 #define OV7670_REG_BLUE 0x01 /* blue gain */
552 #define OV7670_REG_RED 0x02 /* red gain */
553 #define OV7670_REG_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */
554 #define OV7670_REG_COM1 0x04 /* Control 1 */
555 #define OV7670_REG_AECHH 0x07 /* AEC MS 5 bits */
556 #define OV7670_REG_COM3 0x0c /* Control 3 */
557 #define OV7670_REG_COM4 0x0d /* Control 4 */
558 #define OV7670_REG_COM5 0x0e /* All "reserved" */
559 #define OV7670_REG_COM6 0x0f /* Control 6 */
560 #define OV7670_REG_AECH 0x10 /* More bits of AEC value */
561 #define OV7670_REG_CLKRC 0x11 /* Clock control */
562 #define OV7670_REG_COM7 0x12 /* Control 7 */
563 #define OV7670_COM7_FMT_VGA 0x00
564 #define OV7670_COM7_YUV 0x00 /* YUV */
565 #define OV7670_COM7_FMT_QVGA 0x10 /* QVGA format */
566 #define OV7670_COM7_FMT_MASK 0x38
567 #define OV7670_COM7_RESET 0x80 /* Register reset */
568 #define OV7670_REG_COM8 0x13 /* Control 8 */
569 #define OV7670_COM8_AEC 0x01 /* Auto exposure enable */
570 #define OV7670_COM8_AWB 0x02 /* White balance enable */
571 #define OV7670_COM8_AGC 0x04 /* Auto gain enable */
572 #define OV7670_COM8_BFILT 0x20 /* Band filter enable */
573 #define OV7670_COM8_AECSTEP 0x40 /* Unlimited AEC step size */
574 #define OV7670_COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */
575 #define OV7670_REG_COM9 0x14 /* Control 9 - gain ceiling */
576 #define OV7670_REG_COM10 0x15 /* Control 10 */
577 #define OV7670_REG_HSTART 0x17 /* Horiz start high bits */
578 #define OV7670_REG_HSTOP 0x18 /* Horiz stop high bits */
579 #define OV7670_REG_VSTART 0x19 /* Vert start high bits */
580 #define OV7670_REG_VSTOP 0x1a /* Vert stop high bits */
581 #define OV7670_REG_MVFP 0x1e /* Mirror / vflip */
582 #define OV7670_MVFP_VFLIP 0x10 /* vertical flip */
583 #define OV7670_MVFP_MIRROR 0x20 /* Mirror image */
584 #define OV7670_REG_AEW 0x24 /* AGC upper limit */
585 #define OV7670_REG_AEB 0x25 /* AGC lower limit */
586 #define OV7670_REG_VPT 0x26 /* AGC/AEC fast mode op region */
587 #define OV7670_REG_HREF 0x32 /* HREF pieces */
588 #define OV7670_REG_TSLB 0x3a /* lots of stuff */
589 #define OV7670_REG_COM11 0x3b /* Control 11 */
590 #define OV7670_COM11_EXP 0x02
591 #define OV7670_COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */
592 #define OV7670_REG_COM12 0x3c /* Control 12 */
593 #define OV7670_REG_COM13 0x3d /* Control 13 */
594 #define OV7670_COM13_GAMMA 0x80 /* Gamma enable */
595 #define OV7670_COM13_UVSAT 0x40 /* UV saturation auto adjustment */
596 #define OV7670_REG_COM14 0x3e /* Control 14 */
597 #define OV7670_REG_EDGE 0x3f /* Edge enhancement factor */
598 #define OV7670_REG_COM15 0x40 /* Control 15 */
599 #define OV7670_COM15_R00FF 0xc0 /* 00 to FF */
600 #define OV7670_REG_COM16 0x41 /* Control 16 */
601 #define OV7670_COM16_AWBGAIN 0x08 /* AWB gain enable */
602 #define OV7670_REG_BRIGHT 0x55 /* Brightness */
603 #define OV7670_REG_CONTRAS 0x56 /* Contrast control */
604 #define OV7670_REG_GFIX 0x69 /* Fix gain control */
605 #define OV7670_REG_RGB444 0x8c /* RGB 444 control */
606 #define OV7670_REG_HAECC1 0x9f /* Hist AEC/AGC control 1 */
607 #define OV7670_REG_HAECC2 0xa0 /* Hist AEC/AGC control 2 */
608 #define OV7670_REG_BD50MAX 0xa5 /* 50hz banding step limit */
609 #define OV7670_REG_HAECC3 0xa6 /* Hist AEC/AGC control 3 */
610 #define OV7670_REG_HAECC4 0xa7 /* Hist AEC/AGC control 4 */
611 #define OV7670_REG_HAECC5 0xa8 /* Hist AEC/AGC control 5 */
612 #define OV7670_REG_HAECC6 0xa9 /* Hist AEC/AGC control 6 */
613 #define OV7670_REG_HAECC7 0xaa /* Hist AEC/AGC control 7 */
614 #define OV7670_REG_BD60MAX 0xab /* 60hz banding step limit */
620 struct ov_i2c_regvals {
625 /* Settings for OV2610 camera chip */
626 static const struct ov_i2c_regvals norm_2610[] =
628 { 0x12, 0x80 }, /* reset */
631 static const struct ov_i2c_regvals norm_3620b[] =
634 * From the datasheet: "Note that after writing to register COMH
635 * (0x12) to change the sensor mode, registers related to the
636 * sensor’s cropping window will be reset back to their default
639 * "wait 4096 external clock ... to make sure the sensor is
640 * stable and ready to access registers" i.e. 160us at 24MHz
643 { 0x12, 0x80 }, /* COMH reset */
644 { 0x12, 0x00 }, /* QXGA, master */
647 * 11 CLKRC "Clock Rate Control"
648 * [7] internal frequency doublers: on
649 * [6] video port mode: master
650 * [5:0] clock divider: 1
655 * 13 COMI "Common Control I"
656 * = 192 (0xC0) 11000000
657 * COMI[7] "AEC speed selection"
658 * = 1 (0x01) 1....... "Faster AEC correction"
659 * COMI[6] "AEC speed step selection"
660 * = 1 (0x01) .1...... "Big steps, fast"
661 * COMI[5] "Banding filter on off"
662 * = 0 (0x00) ..0..... "Off"
663 * COMI[4] "Banding filter option"
664 * = 0 (0x00) ...0.... "Main clock is 48 MHz and
667 * = 0 (0x00) ....0...
668 * COMI[2] "AGC auto manual control selection"
669 * = 0 (0x00) .....0.. "Manual"
670 * COMI[1] "AWB auto manual control selection"
671 * = 0 (0x00) ......0. "Manual"
672 * COMI[0] "Exposure control"
673 * = 0 (0x00) .......0 "Manual"
678 * 09 COMC "Common Control C"
679 * = 8 (0x08) 00001000
680 * COMC[7:5] "Reserved"
681 * = 0 (0x00) 000.....
682 * COMC[4] "Sleep Mode Enable"
683 * = 0 (0x00) ...0.... "Normal mode"
684 * COMC[3:2] "Sensor sampling reset timing selection"
685 * = 2 (0x02) ....10.. "Longer reset time"
686 * COMC[1:0] "Output drive current select"
687 * = 0 (0x00) ......00 "Weakest"
692 * 0C COMD "Common Control D"
693 * = 8 (0x08) 00001000
695 * = 0 (0x00) 0.......
696 * COMD[6] "Swap MSB and LSB at the output port"
697 * = 0 (0x00) .0...... "False"
698 * COMD[5:3] "Reserved"
699 * = 1 (0x01) ..001...
700 * COMD[2] "Output Average On Off"
701 * = 0 (0x00) .....0.. "Output Normal"
702 * COMD[1] "Sensor precharge voltage selection"
703 * = 0 (0x00) ......0. "Selects internal
704 * reference precharge
706 * COMD[0] "Snapshot option"
707 * = 0 (0x00) .......0 "Enable live video output
708 * after snapshot sequence"
713 * 0D COME "Common Control E"
714 * = 161 (0xA1) 10100001
715 * COME[7] "Output average option"
716 * = 1 (0x01) 1....... "Output average of 4 pixels"
717 * COME[6] "Anti-blooming control"
718 * = 0 (0x00) .0...... "Off"
719 * COME[5:3] "Reserved"
720 * = 4 (0x04) ..100...
721 * COME[2] "Clock output power down pin status"
722 * = 0 (0x00) .....0.. "Tri-state data output pin
724 * COME[1] "Data output pin status selection at power down"
725 * = 0 (0x00) ......0. "Tri-state VSYNC, PCLK,
726 * HREF, and CHSYNC pins on
728 * COME[0] "Auto zero circuit select"
729 * = 1 (0x01) .......1 "On"
734 * 0E COMF "Common Control F"
735 * = 112 (0x70) 01110000
736 * COMF[7] "System clock selection"
737 * = 0 (0x00) 0....... "Use 24 MHz system clock"
738 * COMF[6:4] "Reserved"
739 * = 7 (0x07) .111....
740 * COMF[3] "Manual auto negative offset canceling selection"
741 * = 0 (0x00) ....0... "Auto detect negative
742 * offset and cancel it"
743 * COMF[2:0] "Reserved"
744 * = 0 (0x00) .....000
749 * 0F COMG "Common Control G"
750 * = 66 (0x42) 01000010
751 * COMG[7] "Optical black output selection"
752 * = 0 (0x00) 0....... "Disable"
753 * COMG[6] "Black level calibrate selection"
754 * = 1 (0x01) .1...... "Use optical black pixels
756 * COMG[5:4] "Reserved"
757 * = 0 (0x00) ..00....
758 * COMG[3] "Channel offset adjustment"
759 * = 0 (0x00) ....0... "Disable offset adjustment"
760 * COMG[2] "ADC black level calibration option"
761 * = 0 (0x00) .....0.. "Use B/G line and G/R
762 * line to calibrate each
763 * channel's black level"
765 * = 1 (0x01) ......1.
766 * COMG[0] "ADC black level calibration enable"
767 * = 0 (0x00) .......0 "Disable"
772 * 14 COMJ "Common Control J"
773 * = 198 (0xC6) 11000110
774 * COMJ[7:6] "AGC gain ceiling"
775 * = 3 (0x03) 11...... "8x"
776 * COMJ[5:4] "Reserved"
777 * = 0 (0x00) ..00....
778 * COMJ[3] "Auto banding filter"
779 * = 0 (0x00) ....0... "Banding filter is always
780 * on off depending on
782 * COMJ[2] "VSYNC drop option"
783 * = 1 (0x01) .....1.. "SYNC is dropped if frame
785 * COMJ[1] "Frame data drop"
786 * = 1 (0x01) ......1. "Drop frame data if
787 * exposure is not within
788 * tolerance. In AEC mode,
789 * data is normally dropped
790 * when data is out of
793 * = 0 (0x00) .......0
798 * 15 COMK "Common Control K"
799 * = 2 (0x02) 00000010
800 * COMK[7] "CHSYNC pin output swap"
801 * = 0 (0x00) 0....... "CHSYNC"
802 * COMK[6] "HREF pin output swap"
803 * = 0 (0x00) .0...... "HREF"
804 * COMK[5] "PCLK output selection"
805 * = 0 (0x00) ..0..... "PCLK always output"
806 * COMK[4] "PCLK edge selection"
807 * = 0 (0x00) ...0.... "Data valid on falling edge"
808 * COMK[3] "HREF output polarity"
809 * = 0 (0x00) ....0... "positive"
811 * = 0 (0x00) .....0..
812 * COMK[1] "VSYNC polarity"
813 * = 1 (0x01) ......1. "negative"
814 * COMK[0] "HSYNC polarity"
815 * = 0 (0x00) .......0 "positive"
820 * 33 CHLF "Current Control"
821 * = 9 (0x09) 00001001
822 * CHLF[7:6] "Sensor current control"
823 * = 0 (0x00) 00......
824 * CHLF[5] "Sensor current range control"
825 * = 0 (0x00) ..0..... "normal range"
826 * CHLF[4] "Sensor current"
827 * = 0 (0x00) ...0.... "normal current"
828 * CHLF[3] "Sensor buffer current control"
829 * = 1 (0x01) ....1... "half current"
830 * CHLF[2] "Column buffer current control"
831 * = 0 (0x00) .....0.. "normal current"
832 * CHLF[1] "Analog DSP current control"
833 * = 0 (0x00) ......0. "normal current"
834 * CHLF[1] "ADC current control"
835 * = 0 (0x00) ......0. "normal current"
840 * 34 VBLM "Blooming Control"
841 * = 80 (0x50) 01010000
842 * VBLM[7] "Hard soft reset switch"
843 * = 0 (0x00) 0....... "Hard reset"
844 * VBLM[6:4] "Blooming voltage selection"
845 * = 5 (0x05) .101....
846 * VBLM[3:0] "Sensor current control"
847 * = 0 (0x00) ....0000
852 * 36 VCHG "Sensor Precharge Voltage Control"
853 * = 0 (0x00) 00000000
855 * = 0 (0x00) 0.......
856 * VCHG[6:4] "Sensor precharge voltage control"
857 * = 0 (0x00) .000....
858 * VCHG[3:0] "Sensor array common reference"
859 * = 0 (0x00) ....0000
864 * 37 ADC "ADC Reference Control"
865 * = 4 (0x04) 00000100
866 * ADC[7:4] "Reserved"
867 * = 0 (0x00) 0000....
868 * ADC[3] "ADC input signal range"
869 * = 0 (0x00) ....0... "Input signal 1.0x"
870 * ADC[2:0] "ADC range control"
871 * = 4 (0x04) .....100
876 * 38 ACOM "Analog Common Ground"
877 * = 82 (0x52) 01010010
878 * ACOM[7] "Analog gain control"
879 * = 0 (0x00) 0....... "Gain 1x"
880 * ACOM[6] "Analog black level calibration"
881 * = 1 (0x01) .1...... "On"
882 * ACOM[5:0] "Reserved"
883 * = 18 (0x12) ..010010
888 * 3A FREFA "Internal Reference Adjustment"
889 * = 0 (0x00) 00000000
891 * = 0 (0x00) 00000000
896 * 3C FVOPT "Internal Reference Adjustment"
897 * = 31 (0x1F) 00011111
899 * = 31 (0x1F) 00011111
904 * 44 Undocumented = 0 (0x00) 00000000
905 * 44[7:0] "It's a secret"
906 * = 0 (0x00) 00000000
911 * 40 Undocumented = 0 (0x00) 00000000
912 * 40[7:0] "It's a secret"
913 * = 0 (0x00) 00000000
918 * 41 Undocumented = 0 (0x00) 00000000
919 * 41[7:0] "It's a secret"
920 * = 0 (0x00) 00000000
925 * 42 Undocumented = 0 (0x00) 00000000
926 * 42[7:0] "It's a secret"
927 * = 0 (0x00) 00000000
932 * 43 Undocumented = 0 (0x00) 00000000
933 * 43[7:0] "It's a secret"
934 * = 0 (0x00) 00000000
939 * 45 Undocumented = 128 (0x80) 10000000
940 * 45[7:0] "It's a secret"
941 * = 128 (0x80) 10000000
946 * 48 Undocumented = 192 (0xC0) 11000000
947 * 48[7:0] "It's a secret"
948 * = 192 (0xC0) 11000000
953 * 49 Undocumented = 25 (0x19) 00011001
954 * 49[7:0] "It's a secret"
955 * = 25 (0x19) 00011001
960 * 4B Undocumented = 128 (0x80) 10000000
961 * 4B[7:0] "It's a secret"
962 * = 128 (0x80) 10000000
967 * 4D Undocumented = 196 (0xC4) 11000100
968 * 4D[7:0] "It's a secret"
969 * = 196 (0xC4) 11000100
974 * 35 VREF "Reference Voltage Control"
975 * = 76 (0x4C) 01001100
976 * VREF[7:5] "Column high reference control"
977 * = 2 (0x02) 010..... "higher voltage"
978 * VREF[4:2] "Column low reference control"
979 * = 3 (0x03) ...011.. "Highest voltage"
980 * VREF[1:0] "Reserved"
981 * = 0 (0x00) ......00
986 * 3D Undocumented = 0 (0x00) 00000000
987 * 3D[7:0] "It's a secret"
988 * = 0 (0x00) 00000000
993 * 3E Undocumented = 0 (0x00) 00000000
994 * 3E[7:0] "It's a secret"
995 * = 0 (0x00) 00000000
1000 * 3B FREFB "Internal Reference Adjustment"
1001 * = 24 (0x18) 00011000
1002 * FREFB[7:0] "Range"
1003 * = 24 (0x18) 00011000
1008 * 33 CHLF "Current Control"
1009 * = 25 (0x19) 00011001
1010 * CHLF[7:6] "Sensor current control"
1011 * = 0 (0x00) 00......
1012 * CHLF[5] "Sensor current range control"
1013 * = 0 (0x00) ..0..... "normal range"
1014 * CHLF[4] "Sensor current"
1015 * = 1 (0x01) ...1.... "double current"
1016 * CHLF[3] "Sensor buffer current control"
1017 * = 1 (0x01) ....1... "half current"
1018 * CHLF[2] "Column buffer current control"
1019 * = 0 (0x00) .....0.. "normal current"
1020 * CHLF[1] "Analog DSP current control"
1021 * = 0 (0x00) ......0. "normal current"
1022 * CHLF[1] "ADC current control"
1023 * = 0 (0x00) ......0. "normal current"
1028 * 34 VBLM "Blooming Control"
1029 * = 90 (0x5A) 01011010
1030 * VBLM[7] "Hard soft reset switch"
1031 * = 0 (0x00) 0....... "Hard reset"
1032 * VBLM[6:4] "Blooming voltage selection"
1033 * = 5 (0x05) .101....
1034 * VBLM[3:0] "Sensor current control"
1035 * = 10 (0x0A) ....1010
1040 * 3B FREFB "Internal Reference Adjustment"
1041 * = 0 (0x00) 00000000
1042 * FREFB[7:0] "Range"
1043 * = 0 (0x00) 00000000
1048 * 33 CHLF "Current Control"
1049 * = 9 (0x09) 00001001
1050 * CHLF[7:6] "Sensor current control"
1051 * = 0 (0x00) 00......
1052 * CHLF[5] "Sensor current range control"
1053 * = 0 (0x00) ..0..... "normal range"
1054 * CHLF[4] "Sensor current"
1055 * = 0 (0x00) ...0.... "normal current"
1056 * CHLF[3] "Sensor buffer current control"
1057 * = 1 (0x01) ....1... "half current"
1058 * CHLF[2] "Column buffer current control"
1059 * = 0 (0x00) .....0.. "normal current"
1060 * CHLF[1] "Analog DSP current control"
1061 * = 0 (0x00) ......0. "normal current"
1062 * CHLF[1] "ADC current control"
1063 * = 0 (0x00) ......0. "normal current"
1068 * 34 VBLM "Blooming Control"
1069 * = 80 (0x50) 01010000
1070 * VBLM[7] "Hard soft reset switch"
1071 * = 0 (0x00) 0....... "Hard reset"
1072 * VBLM[6:4] "Blooming voltage selection"
1073 * = 5 (0x05) .101....
1074 * VBLM[3:0] "Sensor current control"
1075 * = 0 (0x00) ....0000
1080 * 12 COMH "Common Control H"
1081 * = 64 (0x40) 01000000
1083 * = 0 (0x00) 0....... "No-op"
1084 * COMH[6:4] "Resolution selection"
1085 * = 4 (0x04) .100.... "XGA"
1086 * COMH[3] "Master slave selection"
1087 * = 0 (0x00) ....0... "Master mode"
1088 * COMH[2] "Internal B/R channel option"
1089 * = 0 (0x00) .....0.. "B/R use same channel"
1090 * COMH[1] "Color bar test pattern"
1091 * = 0 (0x00) ......0. "Off"
1092 * COMH[0] "Reserved"
1093 * = 0 (0x00) .......0
1098 * 17 HREFST "Horizontal window start"
1099 * = 31 (0x1F) 00011111
1100 * HREFST[7:0] "Horizontal window start, 8 MSBs"
1101 * = 31 (0x1F) 00011111
1106 * 18 HREFEND "Horizontal window end"
1107 * = 95 (0x5F) 01011111
1108 * HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1109 * = 95 (0x5F) 01011111
1114 * 19 VSTRT "Vertical window start"
1115 * = 0 (0x00) 00000000
1116 * VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1117 * = 0 (0x00) 00000000
1122 * 1A VEND "Vertical window end"
1123 * = 96 (0x60) 01100000
1124 * VEND[7:0] "Vertical Window End, 8 MSBs"
1125 * = 96 (0x60) 01100000
1130 * 32 COMM "Common Control M"
1131 * = 18 (0x12) 00010010
1132 * COMM[7:6] "Pixel clock divide option"
1133 * = 0 (0x00) 00...... "/1"
1134 * COMM[5:3] "Horizontal window end position, 3 LSBs"
1135 * = 2 (0x02) ..010...
1136 * COMM[2:0] "Horizontal window start position, 3 LSBs"
1137 * = 2 (0x02) .....010
1142 * 03 COMA "Common Control A"
1143 * = 74 (0x4A) 01001010
1144 * COMA[7:4] "AWB Update Threshold"
1145 * = 4 (0x04) 0100....
1146 * COMA[3:2] "Vertical window end line control 2 LSBs"
1147 * = 2 (0x02) ....10..
1148 * COMA[1:0] "Vertical window start line control 2 LSBs"
1149 * = 2 (0x02) ......10
1154 * 11 CLKRC "Clock Rate Control"
1155 * = 128 (0x80) 10000000
1156 * CLKRC[7] "Internal frequency doublers on off seclection"
1157 * = 1 (0x01) 1....... "On"
1158 * CLKRC[6] "Digital video master slave selection"
1159 * = 0 (0x00) .0...... "Master mode, sensor
1161 * CLKRC[5:0] "Clock divider { CLK = PCLK/(1+CLKRC[5:0]) }"
1162 * = 0 (0x00) ..000000
1167 * 12 COMH "Common Control H"
1168 * = 0 (0x00) 00000000
1170 * = 0 (0x00) 0....... "No-op"
1171 * COMH[6:4] "Resolution selection"
1172 * = 0 (0x00) .000.... "QXGA"
1173 * COMH[3] "Master slave selection"
1174 * = 0 (0x00) ....0... "Master mode"
1175 * COMH[2] "Internal B/R channel option"
1176 * = 0 (0x00) .....0.. "B/R use same channel"
1177 * COMH[1] "Color bar test pattern"
1178 * = 0 (0x00) ......0. "Off"
1179 * COMH[0] "Reserved"
1180 * = 0 (0x00) .......0
1185 * 12 COMH "Common Control H"
1186 * = 64 (0x40) 01000000
1188 * = 0 (0x00) 0....... "No-op"
1189 * COMH[6:4] "Resolution selection"
1190 * = 4 (0x04) .100.... "XGA"
1191 * COMH[3] "Master slave selection"
1192 * = 0 (0x00) ....0... "Master mode"
1193 * COMH[2] "Internal B/R channel option"
1194 * = 0 (0x00) .....0.. "B/R use same channel"
1195 * COMH[1] "Color bar test pattern"
1196 * = 0 (0x00) ......0. "Off"
1197 * COMH[0] "Reserved"
1198 * = 0 (0x00) .......0
1203 * 17 HREFST "Horizontal window start"
1204 * = 31 (0x1F) 00011111
1205 * HREFST[7:0] "Horizontal window start, 8 MSBs"
1206 * = 31 (0x1F) 00011111
1211 * 18 HREFEND "Horizontal window end"
1212 * = 95 (0x5F) 01011111
1213 * HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1214 * = 95 (0x5F) 01011111
1219 * 19 VSTRT "Vertical window start"
1220 * = 0 (0x00) 00000000
1221 * VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1222 * = 0 (0x00) 00000000
1227 * 1A VEND "Vertical window end"
1228 * = 96 (0x60) 01100000
1229 * VEND[7:0] "Vertical Window End, 8 MSBs"
1230 * = 96 (0x60) 01100000
1235 * 32 COMM "Common Control M"
1236 * = 18 (0x12) 00010010
1237 * COMM[7:6] "Pixel clock divide option"
1238 * = 0 (0x00) 00...... "/1"
1239 * COMM[5:3] "Horizontal window end position, 3 LSBs"
1240 * = 2 (0x02) ..010...
1241 * COMM[2:0] "Horizontal window start position, 3 LSBs"
1242 * = 2 (0x02) .....010
1247 * 03 COMA "Common Control A"
1248 * = 74 (0x4A) 01001010
1249 * COMA[7:4] "AWB Update Threshold"
1250 * = 4 (0x04) 0100....
1251 * COMA[3:2] "Vertical window end line control 2 LSBs"
1252 * = 2 (0x02) ....10..
1253 * COMA[1:0] "Vertical window start line control 2 LSBs"
1254 * = 2 (0x02) ......10
1259 * 02 RED "Red Gain Control"
1260 * = 175 (0xAF) 10101111
1262 * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1264 * = 47 (0x2F) .0101111
1269 * 2D ADDVSL "VSYNC Pulse Width"
1270 * = 210 (0xD2) 11010010
1271 * ADDVSL[7:0] "VSYNC pulse width, LSB"
1272 * = 210 (0xD2) 11010010
1277 * 00 GAIN = 24 (0x18) 00011000
1278 * GAIN[7:6] "Reserved"
1279 * = 0 (0x00) 00......
1281 * = 0 (0x00) ..0..... "False"
1283 * = 1 (0x01) ...1.... "True"
1285 * = 8 (0x08) ....1000
1290 * 01 BLUE "Blue Gain Control"
1291 * = 240 (0xF0) 11110000
1293 * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1295 * = 112 (0x70) .1110000
1300 * 10 AEC "Automatic Exposure Control"
1301 * = 10 (0x0A) 00001010
1302 * AEC[7:0] "Automatic Exposure Control, 8 MSBs"
1303 * = 10 (0x0A) 00001010
1315 static const struct ov_i2c_regvals norm_6x20[] = {
1316 { 0x12, 0x80 }, /* reset */
1319 { 0x05, 0x7f }, /* For when autoadjust is off */
1321 /* The ratio of 0x0c and 0x0d controls the white point */
1324 { 0x0f, 0x15 }, /* COMS */
1325 { 0x10, 0x75 }, /* AEC Exposure time */
1326 { 0x12, 0x24 }, /* Enable AGC */
1328 /* 0x16: 0x06 helps frame stability with moving objects */
1330 /* { 0x20, 0x30 }, * Aperture correction enable */
1331 { 0x26, 0xb2 }, /* BLC enable */
1332 /* 0x28: 0x05 Selects RGB format if RGB on */
1334 { 0x2a, 0x04 }, /* Disable framerate adjust */
1335 /* { 0x2b, 0xac }, * Framerate; Set 2a[7] first */
1337 { 0x33, 0xa0 }, /* Color Processing Parameter */
1338 { 0x34, 0xd2 }, /* Max A/D range */
1342 { 0x3c, 0x39 }, /* Enable AEC mode changing */
1343 { 0x3c, 0x3c }, /* Change AEC mode */
1344 { 0x3c, 0x24 }, /* Disable AEC mode changing */
1347 /* These next two registers (0x4a, 0x4b) are undocumented.
1348 * They control the color balance */
1351 { 0x4d, 0xd2 }, /* This reduces noise a bit */
1354 /* Do 50-53 have any effect? */
1355 /* Toggle 0x12[2] off and on here? */
1358 static const struct ov_i2c_regvals norm_6x30[] = {
1359 { 0x12, 0x80 }, /* Reset */
1360 { 0x00, 0x1f }, /* Gain */
1361 { 0x01, 0x99 }, /* Blue gain */
1362 { 0x02, 0x7c }, /* Red gain */
1363 { 0x03, 0xc0 }, /* Saturation */
1364 { 0x05, 0x0a }, /* Contrast */
1365 { 0x06, 0x95 }, /* Brightness */
1366 { 0x07, 0x2d }, /* Sharpness */
1369 { 0x0e, 0xa0 }, /* Was 0x20, bit7 enables a 2x gain which we need */
1372 { 0x11, 0x00 }, /* Pixel clock = fastest */
1373 { 0x12, 0x24 }, /* Enable AGC and AWB */
1388 { 0x23, 0xc0 }, /* Crystal circuit power level */
1389 { 0x25, 0x9a }, /* Increase AEC black ratio */
1390 { 0x26, 0xb2 }, /* BLC enable */
1394 { 0x2a, 0x84 }, /* 60 Hz power */
1395 { 0x2b, 0xa8 }, /* 60 Hz power */
1397 { 0x2d, 0x95 }, /* Enable auto-brightness */
1411 { 0x40, 0x00 }, /* White bal */
1412 { 0x41, 0x00 }, /* White bal */
1414 { 0x43, 0x3f }, /* White bal */
1424 { 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */
1426 { 0x4f, 0x07 }, /* UV avg., col. killer: max */
1428 { 0x54, 0x23 }, /* Max AGC gain: 18dB */
1433 { 0x59, 0x01 }, /* AGC dark current comp.: +1 */
1435 { 0x5b, 0x0f }, /* AWB chrominance levels */
1439 { 0x12, 0x20 }, /* Toggle AWB */
1443 /* Lawrence Glaister <lg@jfm.bc.ca> reports:
1445 * Register 0x0f in the 7610 has the following effects:
1447 * 0x85 (AEC method 1): Best overall, good contrast range
1448 * 0x45 (AEC method 2): Very overexposed
1449 * 0xa5 (spec sheet default): Ok, but the black level is
1450 * shifted resulting in loss of contrast
1451 * 0x05 (old driver setting): very overexposed, too much
1454 static const struct ov_i2c_regvals norm_7610[] = {
1461 { 0x28, 0x24 }, /* 0c */
1462 { 0x0f, 0x85 }, /* lg's setting */
1484 static const struct ov_i2c_regvals norm_7620[] = {
1485 { 0x12, 0x80 }, /* reset */
1486 { 0x00, 0x00 }, /* gain */
1487 { 0x01, 0x80 }, /* blue gain */
1488 { 0x02, 0x80 }, /* red gain */
1489 { 0x03, 0xc0 }, /* OV7670_REG_VREF */
1512 { 0x28, 0x22 }, /* Was 0x20, bit1 enables a 2x gain which we need */
1551 /* 7640 and 7648. The defaults should be OK for most registers. */
1552 static const struct ov_i2c_regvals norm_7640[] = {
1557 /* 7670. Defaults taken from OmniVision provided data,
1558 * as provided by Jonathan Corbet of OLPC */
1559 static const struct ov_i2c_regvals norm_7670[] = {
1560 { OV7670_REG_COM7, OV7670_COM7_RESET },
1561 { OV7670_REG_TSLB, 0x04 }, /* OV */
1562 { OV7670_REG_COM7, OV7670_COM7_FMT_VGA }, /* VGA */
1563 { OV7670_REG_CLKRC, 0x01 },
1565 * Set the hardware window. These values from OV don't entirely
1566 * make sense - hstop is less than hstart. But they work...
1568 { OV7670_REG_HSTART, 0x13 },
1569 { OV7670_REG_HSTOP, 0x01 },
1570 { OV7670_REG_HREF, 0xb6 },
1571 { OV7670_REG_VSTART, 0x02 },
1572 { OV7670_REG_VSTOP, 0x7a },
1573 { OV7670_REG_VREF, 0x0a },
1575 { OV7670_REG_COM3, 0x00 },
1576 { OV7670_REG_COM14, 0x00 },
1577 /* Mystery scaling numbers */
1583 /* { OV7670_REG_COM10, 0x0 }, */
1585 /* Gamma curve values */
1603 /* AGC and AEC parameters. Note we start by disabling those features,
1604 then turn them only after tweaking the values. */
1605 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
1606 | OV7670_COM8_AECSTEP
1607 | OV7670_COM8_BFILT },
1608 { OV7670_REG_GAIN, 0x00 },
1609 { OV7670_REG_AECH, 0x00 },
1610 { OV7670_REG_COM4, 0x40 }, /* magic reserved bit */
1611 { OV7670_REG_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
1612 { OV7670_REG_BD50MAX, 0x05 },
1613 { OV7670_REG_BD60MAX, 0x07 },
1614 { OV7670_REG_AEW, 0x95 },
1615 { OV7670_REG_AEB, 0x33 },
1616 { OV7670_REG_VPT, 0xe3 },
1617 { OV7670_REG_HAECC1, 0x78 },
1618 { OV7670_REG_HAECC2, 0x68 },
1619 { 0xa1, 0x03 }, /* magic */
1620 { OV7670_REG_HAECC3, 0xd8 },
1621 { OV7670_REG_HAECC4, 0xd8 },
1622 { OV7670_REG_HAECC5, 0xf0 },
1623 { OV7670_REG_HAECC6, 0x90 },
1624 { OV7670_REG_HAECC7, 0x94 },
1625 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
1626 | OV7670_COM8_AECSTEP
1629 | OV7670_COM8_AEC },
1631 /* Almost all of these are magic "reserved" values. */
1632 { OV7670_REG_COM5, 0x61 },
1633 { OV7670_REG_COM6, 0x4b },
1635 { OV7670_REG_MVFP, 0x07 },
1644 { OV7670_REG_COM12, 0x78 },
1647 { OV7670_REG_GFIX, 0x00 },
1663 /* More reserved magic, some of which tweaks white balance */
1680 /* "9e for advance AWB" */
1682 { OV7670_REG_BLUE, 0x40 },
1683 { OV7670_REG_RED, 0x60 },
1684 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
1685 | OV7670_COM8_AECSTEP
1689 | OV7670_COM8_AWB },
1691 /* Matrix coefficients */
1700 { OV7670_REG_COM16, OV7670_COM16_AWBGAIN },
1701 { OV7670_REG_EDGE, 0x00 },
1706 { OV7670_REG_COM13, OV7670_COM13_GAMMA
1707 | OV7670_COM13_UVSAT
1711 { OV7670_REG_COM16, 0x38 },
1715 { OV7670_REG_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO },
1728 /* Extra-weird stuff. Some sort of multiplexor register */
1754 static const struct ov_i2c_regvals norm_8610[] = {
1761 { 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */
1762 { 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */
1771 { 0x15, 0x01 }, /* Lin and Win think different about UV order */
1773 { 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */
1774 { 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */
1775 { 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */
1778 { 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */
1779 { 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */
1780 { 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */
1781 { 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */
1787 { 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */
1789 { 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */
1791 { 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */
1793 { 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */
1794 { 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */
1795 { 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */
1796 { 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */
1798 { 0x64, 0x53 }, /* new windrv 090403 says 0x57,
1799 * maybe thats wrong */
1803 { 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */
1807 { 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but
1808 * deleting bit7 colors the first images red */
1809 { 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */
1810 { 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */
1816 { 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */
1818 { 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */
1823 { 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */
1825 { 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */
1826 { 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */
1833 { 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */
1839 { 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */
1842 static unsigned char ov7670_abs_to_sm(unsigned char v)
1846 return (128 - v) | 0x80;
1849 /* Write a OV519 register */
1850 static int reg_w(struct sd *sd, __u16 index, __u16 value)
1854 switch (sd->bridge) {
1856 case BRIDGE_OV511PLUS:
1862 case BRIDGE_W9968CF:
1863 ret = usb_control_msg(sd->gspca_dev.dev,
1864 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
1866 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1867 value, index, NULL, 0, 500);
1873 sd->gspca_dev.usb_buf[0] = value;
1874 ret = usb_control_msg(sd->gspca_dev.dev,
1875 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
1877 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1879 sd->gspca_dev.usb_buf, 1, 500);
1882 PDEBUG(D_ERR, "Write reg 0x%04x -> [0x%02x] failed",
1887 PDEBUG(D_USBO, "Write reg 0x%04x -> [0x%02x]", value, index);
1891 /* Read from a OV519 register, note not valid for the w9968cf!! */
1892 /* returns: negative is error, pos or zero is data */
1893 static int reg_r(struct sd *sd, __u16 index)
1898 switch (sd->bridge) {
1900 case BRIDGE_OV511PLUS:
1910 ret = usb_control_msg(sd->gspca_dev.dev,
1911 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
1913 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1914 0, index, sd->gspca_dev.usb_buf, 1, 500);
1917 ret = sd->gspca_dev.usb_buf[0];
1918 PDEBUG(D_USBI, "Read reg [0x%02X] -> 0x%04X", index, ret);
1920 PDEBUG(D_ERR, "Read reg [0x%02x] failed", index);
1925 /* Read 8 values from a OV519 register */
1926 static int reg_r8(struct sd *sd,
1931 ret = usb_control_msg(sd->gspca_dev.dev,
1932 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
1934 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1935 0, index, sd->gspca_dev.usb_buf, 8, 500);
1938 ret = sd->gspca_dev.usb_buf[0];
1940 PDEBUG(D_ERR, "Read reg 8 [0x%02x] failed", index);
1946 * Writes bits at positions specified by mask to an OV51x reg. Bits that are in
1947 * the same position as 1's in "mask" are cleared and set to "value". Bits
1948 * that are in the same position as 0's in "mask" are preserved, regardless
1949 * of their respective state in "value".
1951 static int reg_w_mask(struct sd *sd,
1960 value &= mask; /* Enforce mask on value */
1961 ret = reg_r(sd, index);
1965 oldval = ret & ~mask; /* Clear the masked bits */
1966 value |= oldval; /* Set the desired bits */
1968 return reg_w(sd, index, value);
1972 * Writes multiple (n) byte value to a single register. Only valid with certain
1973 * registers (0x30 and 0xc4 - 0xce).
1975 static int ov518_reg_w32(struct sd *sd, __u16 index, u32 value, int n)
1979 *((u32 *)sd->gspca_dev.usb_buf) = __cpu_to_le32(value);
1981 ret = usb_control_msg(sd->gspca_dev.dev,
1982 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
1984 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1986 sd->gspca_dev.usb_buf, n, 500);
1988 PDEBUG(D_ERR, "Write reg32 [%02x] %08x failed", index, value);
1995 static int ov511_i2c_w(struct sd *sd, __u8 reg, __u8 value)
1999 PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
2001 /* Three byte write cycle */
2002 for (retries = 6; ; ) {
2003 /* Select camera register */
2004 rc = reg_w(sd, R51x_I2C_SADDR_3, reg);
2008 /* Write "value" to I2C data port of OV511 */
2009 rc = reg_w(sd, R51x_I2C_DATA, value);
2013 /* Initiate 3-byte write cycle */
2014 rc = reg_w(sd, R511_I2C_CTL, 0x01);
2019 rc = reg_r(sd, R511_I2C_CTL);
2020 while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2025 if ((rc & 2) == 0) /* Ack? */
2027 if (--retries < 0) {
2028 PDEBUG(D_USBO, "i2c write retries exhausted");
2036 static int ov511_i2c_r(struct sd *sd, __u8 reg)
2038 int rc, value, retries;
2040 /* Two byte write cycle */
2041 for (retries = 6; ; ) {
2042 /* Select camera register */
2043 rc = reg_w(sd, R51x_I2C_SADDR_2, reg);
2047 /* Initiate 2-byte write cycle */
2048 rc = reg_w(sd, R511_I2C_CTL, 0x03);
2053 rc = reg_r(sd, R511_I2C_CTL);
2054 while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2059 if ((rc & 2) == 0) /* Ack? */
2063 reg_w(sd, R511_I2C_CTL, 0x10);
2065 if (--retries < 0) {
2066 PDEBUG(D_USBI, "i2c write retries exhausted");
2071 /* Two byte read cycle */
2072 for (retries = 6; ; ) {
2073 /* Initiate 2-byte read cycle */
2074 rc = reg_w(sd, R511_I2C_CTL, 0x05);
2079 rc = reg_r(sd, R511_I2C_CTL);
2080 while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2085 if ((rc & 2) == 0) /* Ack? */
2089 rc = reg_w(sd, R511_I2C_CTL, 0x10);
2093 if (--retries < 0) {
2094 PDEBUG(D_USBI, "i2c read retries exhausted");
2099 value = reg_r(sd, R51x_I2C_DATA);
2101 PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value);
2103 /* This is needed to make i2c_w() work */
2104 rc = reg_w(sd, R511_I2C_CTL, 0x05);
2112 * The OV518 I2C I/O procedure is different, hence, this function.
2113 * This is normally only called from i2c_w(). Note that this function
2114 * always succeeds regardless of whether the sensor is present and working.
2116 static int ov518_i2c_w(struct sd *sd,
2122 PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
2124 /* Select camera register */
2125 rc = reg_w(sd, R51x_I2C_SADDR_3, reg);
2129 /* Write "value" to I2C data port of OV511 */
2130 rc = reg_w(sd, R51x_I2C_DATA, value);
2134 /* Initiate 3-byte write cycle */
2135 rc = reg_w(sd, R518_I2C_CTL, 0x01);
2139 /* wait for write complete */
2141 return reg_r8(sd, R518_I2C_CTL);
2145 * returns: negative is error, pos or zero is data
2147 * The OV518 I2C I/O procedure is different, hence, this function.
2148 * This is normally only called from i2c_r(). Note that this function
2149 * always succeeds regardless of whether the sensor is present and working.
2151 static int ov518_i2c_r(struct sd *sd, __u8 reg)
2155 /* Select camera register */
2156 rc = reg_w(sd, R51x_I2C_SADDR_2, reg);
2160 /* Initiate 2-byte write cycle */
2161 rc = reg_w(sd, R518_I2C_CTL, 0x03);
2165 /* Initiate 2-byte read cycle */
2166 rc = reg_w(sd, R518_I2C_CTL, 0x05);
2169 value = reg_r(sd, R51x_I2C_DATA);
2170 PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value);
2174 static int ovfx2_i2c_w(struct sd *sd, __u8 reg, __u8 value)
2178 ret = usb_control_msg(sd->gspca_dev.dev,
2179 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2181 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2182 (__u16)value, (__u16)reg, NULL, 0, 500);
2185 PDEBUG(D_ERR, "i2c 0x%02x -> [0x%02x] failed", value, reg);
2189 PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
2193 static int ovfx2_i2c_r(struct sd *sd, __u8 reg)
2197 ret = usb_control_msg(sd->gspca_dev.dev,
2198 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2200 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2201 0, (__u16)reg, sd->gspca_dev.usb_buf, 1, 500);
2204 ret = sd->gspca_dev.usb_buf[0];
2205 PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, ret);
2207 PDEBUG(D_ERR, "i2c read [0x%02x] failed", reg);
2212 static int i2c_w(struct sd *sd, __u8 reg, __u8 value)
2216 if (sd->sensor_reg_cache[reg] == value)
2219 switch (sd->bridge) {
2221 case BRIDGE_OV511PLUS:
2222 ret = ov511_i2c_w(sd, reg, value);
2225 case BRIDGE_OV518PLUS:
2227 ret = ov518_i2c_w(sd, reg, value);
2230 ret = ovfx2_i2c_w(sd, reg, value);
2232 case BRIDGE_W9968CF:
2233 ret = w9968cf_i2c_w(sd, reg, value);
2238 /* Up on sensor reset empty the register cache */
2239 if (reg == 0x12 && (value & 0x80))
2240 memset(sd->sensor_reg_cache, -1,
2241 sizeof(sd->sensor_reg_cache));
2243 sd->sensor_reg_cache[reg] = value;
2249 static int i2c_r(struct sd *sd, __u8 reg)
2253 if (sd->sensor_reg_cache[reg] != -1)
2254 return sd->sensor_reg_cache[reg];
2256 switch (sd->bridge) {
2258 case BRIDGE_OV511PLUS:
2259 ret = ov511_i2c_r(sd, reg);
2262 case BRIDGE_OV518PLUS:
2264 ret = ov518_i2c_r(sd, reg);
2267 ret = ovfx2_i2c_r(sd, reg);
2269 case BRIDGE_W9968CF:
2270 ret = w9968cf_i2c_r(sd, reg);
2275 sd->sensor_reg_cache[reg] = ret;
2280 /* Writes bits at positions specified by mask to an I2C reg. Bits that are in
2281 * the same position as 1's in "mask" are cleared and set to "value". Bits
2282 * that are in the same position as 0's in "mask" are preserved, regardless
2283 * of their respective state in "value".
2285 static int i2c_w_mask(struct sd *sd,
2293 value &= mask; /* Enforce mask on value */
2294 rc = i2c_r(sd, reg);
2297 oldval = rc & ~mask; /* Clear the masked bits */
2298 value |= oldval; /* Set the desired bits */
2299 return i2c_w(sd, reg, value);
2302 /* Temporarily stops OV511 from functioning. Must do this before changing
2303 * registers while the camera is streaming */
2304 static inline int ov51x_stop(struct sd *sd)
2308 PDEBUG(D_STREAM, "stopping");
2310 switch (sd->bridge) {
2312 case BRIDGE_OV511PLUS:
2313 return reg_w(sd, R51x_SYS_RESET, 0x3d);
2315 case BRIDGE_OV518PLUS:
2316 return reg_w_mask(sd, R51x_SYS_RESET, 0x3a, 0x3a);
2318 return reg_w(sd, OV519_SYS_RESET1, 0x0f);
2320 return reg_w_mask(sd, 0x0f, 0x00, 0x02);
2321 case BRIDGE_W9968CF:
2322 ret = reg_w(sd, 0x3c, 0x0a05); /* stop USB transfer */
2323 ret += reg_w(sd, 0x39, 0x0000); /* disable JPEG encoder */
2324 ret += reg_w(sd, 0x16, 0x0000); /* stop video capture */
2331 /* Restarts OV511 after ov511_stop() is called. Has no effect if it is not
2332 * actually stopped (for performance). */
2333 static inline int ov51x_restart(struct sd *sd)
2337 PDEBUG(D_STREAM, "restarting");
2342 /* Reinitialize the stream */
2343 switch (sd->bridge) {
2345 case BRIDGE_OV511PLUS:
2346 return reg_w(sd, R51x_SYS_RESET, 0x00);
2348 case BRIDGE_OV518PLUS:
2349 rc = reg_w(sd, 0x2f, 0x80);
2352 return reg_w(sd, R51x_SYS_RESET, 0x00);
2354 return reg_w(sd, OV519_SYS_RESET1, 0x00);
2356 return reg_w_mask(sd, 0x0f, 0x02, 0x02);
2357 case BRIDGE_W9968CF:
2358 return reg_w(sd, 0x3c, 0x8a05); /* USB FIFO enable */
2364 static int ov51x_set_slave_ids(struct sd *sd, __u8 slave);
2366 /* This does an initial reset of an OmniVision sensor and ensures that I2C
2367 * is synchronized. Returns <0 on failure.
2369 static int init_ov_sensor(struct sd *sd, __u8 slave)
2373 if (ov51x_set_slave_ids(sd, slave) < 0)
2376 /* Reset the sensor */
2377 if (i2c_w(sd, 0x12, 0x80) < 0)
2380 /* Wait for it to initialize */
2383 for (i = 0; i < i2c_detect_tries; i++) {
2384 if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f &&
2385 i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) {
2386 PDEBUG(D_PROBE, "I2C synced in %d attempt(s)", i);
2390 /* Reset the sensor */
2391 if (i2c_w(sd, 0x12, 0x80) < 0)
2393 /* Wait for it to initialize */
2395 /* Dummy read to sync I2C */
2396 if (i2c_r(sd, 0x00) < 0)
2402 /* Set the read and write slave IDs. The "slave" argument is the write slave,
2403 * and the read slave will be set to (slave + 1).
2404 * This should not be called from outside the i2c I/O functions.
2405 * Sets I2C read and write slave IDs. Returns <0 for error
2407 static int ov51x_set_slave_ids(struct sd *sd,
2412 switch (sd->bridge) {
2414 return reg_w(sd, OVFX2_I2C_ADDR, slave);
2415 case BRIDGE_W9968CF:
2416 sd->sensor_addr = slave;
2420 rc = reg_w(sd, R51x_I2C_W_SID, slave);
2423 return reg_w(sd, R51x_I2C_R_SID, slave + 1);
2426 static int write_regvals(struct sd *sd,
2427 const struct ov_regvals *regvals,
2433 rc = reg_w(sd, regvals->reg, regvals->val);
2441 static int write_i2c_regvals(struct sd *sd,
2442 const struct ov_i2c_regvals *regvals,
2448 rc = i2c_w(sd, regvals->reg, regvals->val);
2456 /****************************************************************************
2458 * OV511 and sensor configuration
2460 ***************************************************************************/
2462 /* This initializes the OV2x10 / OV3610 / OV3620 */
2463 static int ov_hires_configure(struct sd *sd)
2467 if (sd->bridge != BRIDGE_OVFX2) {
2468 PDEBUG(D_ERR, "error hires sensors only supported with ovfx2");
2472 PDEBUG(D_PROBE, "starting ov hires configuration");
2474 /* Detect sensor (sub)type */
2475 high = i2c_r(sd, 0x0a);
2476 low = i2c_r(sd, 0x0b);
2477 /* info("%x, %x", high, low); */
2478 if (high == 0x96 && low == 0x40) {
2479 PDEBUG(D_PROBE, "Sensor is an OV2610");
2480 sd->sensor = SEN_OV2610;
2481 } else if (high == 0x36 && (low & 0x0f) == 0x00) {
2482 PDEBUG(D_PROBE, "Sensor is an OV3610");
2483 sd->sensor = SEN_OV3610;
2485 PDEBUG(D_ERR, "Error unknown sensor type: 0x%02x%02x",
2490 /* Set sensor-specific vars */
2495 /* This initializes the OV8110, OV8610 sensor. The OV8110 uses
2496 * the same register settings as the OV8610, since they are very similar.
2498 static int ov8xx0_configure(struct sd *sd)
2502 PDEBUG(D_PROBE, "starting ov8xx0 configuration");
2504 /* Detect sensor (sub)type */
2505 rc = i2c_r(sd, OV7610_REG_COM_I);
2507 PDEBUG(D_ERR, "Error detecting sensor type");
2510 if ((rc & 3) == 1) {
2511 sd->sensor = SEN_OV8610;
2513 PDEBUG(D_ERR, "Unknown image sensor version: %d", rc & 3);
2517 /* Set sensor-specific vars */
2521 /* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses
2522 * the same register settings as the OV7610, since they are very similar.
2524 static int ov7xx0_configure(struct sd *sd)
2529 PDEBUG(D_PROBE, "starting OV7xx0 configuration");
2531 /* Detect sensor (sub)type */
2532 rc = i2c_r(sd, OV7610_REG_COM_I);
2535 * it appears to be wrongly detected as a 7610 by default */
2537 PDEBUG(D_ERR, "Error detecting sensor type");
2540 if ((rc & 3) == 3) {
2541 /* quick hack to make OV7670s work */
2542 high = i2c_r(sd, 0x0a);
2543 low = i2c_r(sd, 0x0b);
2544 /* info("%x, %x", high, low); */
2545 if (high == 0x76 && low == 0x73) {
2546 PDEBUG(D_PROBE, "Sensor is an OV7670");
2547 sd->sensor = SEN_OV7670;
2549 PDEBUG(D_PROBE, "Sensor is an OV7610");
2550 sd->sensor = SEN_OV7610;
2552 } else if ((rc & 3) == 1) {
2553 /* I don't know what's different about the 76BE yet. */
2554 if (i2c_r(sd, 0x15) & 1) {
2555 PDEBUG(D_PROBE, "Sensor is an OV7620AE");
2556 sd->sensor = SEN_OV7620;
2558 PDEBUG(D_PROBE, "Sensor is an OV76BE");
2559 sd->sensor = SEN_OV76BE;
2561 } else if ((rc & 3) == 0) {
2562 /* try to read product id registers */
2563 high = i2c_r(sd, 0x0a);
2565 PDEBUG(D_ERR, "Error detecting camera chip PID");
2568 low = i2c_r(sd, 0x0b);
2570 PDEBUG(D_ERR, "Error detecting camera chip VER");
2576 PDEBUG(D_PROBE, "Sensor is an OV7630/OV7635");
2578 "7630 is not supported by this driver");
2581 PDEBUG(D_PROBE, "Sensor is an OV7645");
2582 sd->sensor = SEN_OV7640; /* FIXME */
2585 PDEBUG(D_PROBE, "Sensor is an OV7645B");
2586 sd->sensor = SEN_OV7640; /* FIXME */
2589 PDEBUG(D_PROBE, "Sensor is an OV7648");
2590 sd->sensor = SEN_OV7640; /* FIXME */
2593 PDEBUG(D_PROBE, "Unknown sensor: 0x76%x", low);
2597 PDEBUG(D_PROBE, "Sensor is an OV7620");
2598 sd->sensor = SEN_OV7620;
2601 PDEBUG(D_ERR, "Unknown image sensor version: %d", rc & 3);
2605 /* Set sensor-specific vars */
2609 /* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */
2610 static int ov6xx0_configure(struct sd *sd)
2613 PDEBUG(D_PROBE, "starting OV6xx0 configuration");
2615 /* Detect sensor (sub)type */
2616 rc = i2c_r(sd, OV7610_REG_COM_I);
2618 PDEBUG(D_ERR, "Error detecting sensor type");
2622 /* Ugh. The first two bits are the version bits, but
2623 * the entire register value must be used. I guess OVT
2624 * underestimated how many variants they would make. */
2627 sd->sensor = SEN_OV6630;
2629 "WARNING: Sensor is an OV66308. Your camera may have");
2630 PDEBUG(D_ERR, "been misdetected in previous driver versions.");
2633 sd->sensor = SEN_OV6620;
2634 PDEBUG(D_PROBE, "Sensor is an OV6620");
2637 sd->sensor = SEN_OV6630;
2638 PDEBUG(D_PROBE, "Sensor is an OV66308AE");
2641 sd->sensor = SEN_OV66308AF;
2642 PDEBUG(D_PROBE, "Sensor is an OV66308AF");
2645 sd->sensor = SEN_OV6630;
2647 "WARNING: Sensor is an OV66307. Your camera may have");
2648 PDEBUG(D_ERR, "been misdetected in previous driver versions.");
2651 PDEBUG(D_ERR, "FATAL: Unknown sensor version: 0x%02x", rc);
2655 /* Set sensor-specific vars */
2661 /* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */
2662 static void ov51x_led_control(struct sd *sd, int on)
2667 switch (sd->bridge) {
2668 /* OV511 has no LED control */
2669 case BRIDGE_OV511PLUS:
2670 reg_w(sd, R511_SYS_LED_CTL, on ? 1 : 0);
2673 case BRIDGE_OV518PLUS:
2674 reg_w_mask(sd, R518_GPIO_OUT, on ? 0x02 : 0x00, 0x02);
2677 reg_w_mask(sd, OV519_GPIO_DATA_OUT0, !on, 1); /* 0 / 1 */
2682 static int ov51x_upload_quan_tables(struct sd *sd)
2684 const unsigned char yQuanTable511[] = {
2685 0, 1, 1, 2, 2, 3, 3, 4,
2686 1, 1, 1, 2, 2, 3, 4, 4,
2687 1, 1, 2, 2, 3, 4, 4, 4,
2688 2, 2, 2, 3, 4, 4, 4, 4,
2689 2, 2, 3, 4, 4, 5, 5, 5,
2690 3, 3, 4, 4, 5, 5, 5, 5,
2691 3, 4, 4, 4, 5, 5, 5, 5,
2692 4, 4, 4, 4, 5, 5, 5, 5
2695 const unsigned char uvQuanTable511[] = {
2696 0, 2, 2, 3, 4, 4, 4, 4,
2697 2, 2, 2, 4, 4, 4, 4, 4,
2698 2, 2, 3, 4, 4, 4, 4, 4,
2699 3, 4, 4, 4, 4, 4, 4, 4,
2700 4, 4, 4, 4, 4, 4, 4, 4,
2701 4, 4, 4, 4, 4, 4, 4, 4,
2702 4, 4, 4, 4, 4, 4, 4, 4,
2703 4, 4, 4, 4, 4, 4, 4, 4
2706 /* OV518 quantization tables are 8x4 (instead of 8x8) */
2707 const unsigned char yQuanTable518[] = {
2708 5, 4, 5, 6, 6, 7, 7, 7,
2709 5, 5, 5, 5, 6, 7, 7, 7,
2710 6, 6, 6, 6, 7, 7, 7, 8,
2711 7, 7, 6, 7, 7, 7, 8, 8
2714 const unsigned char uvQuanTable518[] = {
2715 6, 6, 6, 7, 7, 7, 7, 7,
2716 6, 6, 6, 7, 7, 7, 7, 7,
2717 6, 6, 6, 7, 7, 7, 7, 8,
2718 7, 7, 7, 7, 7, 7, 8, 8
2721 const unsigned char *pYTable, *pUVTable;
2722 unsigned char val0, val1;
2723 int i, size, rc, reg = R51x_COMP_LUT_BEGIN;
2725 PDEBUG(D_PROBE, "Uploading quantization tables");
2727 if (sd->bridge == BRIDGE_OV511 || sd->bridge == BRIDGE_OV511PLUS) {
2728 pYTable = yQuanTable511;
2729 pUVTable = uvQuanTable511;
2732 pYTable = yQuanTable518;
2733 pUVTable = uvQuanTable518;
2737 for (i = 0; i < size; i++) {
2743 rc = reg_w(sd, reg, val0);
2752 rc = reg_w(sd, reg + size, val0);
2762 /* This initializes the OV511/OV511+ and the sensor */
2763 static int ov511_configure(struct gspca_dev *gspca_dev)
2765 struct sd *sd = (struct sd *) gspca_dev;
2768 /* For 511 and 511+ */
2769 const struct ov_regvals init_511[] = {
2770 { R51x_SYS_RESET, 0x7f },
2771 { R51x_SYS_INIT, 0x01 },
2772 { R51x_SYS_RESET, 0x7f },
2773 { R51x_SYS_INIT, 0x01 },
2774 { R51x_SYS_RESET, 0x3f },
2775 { R51x_SYS_INIT, 0x01 },
2776 { R51x_SYS_RESET, 0x3d },
2779 const struct ov_regvals norm_511[] = {
2780 { R511_DRAM_FLOW_CTL, 0x01 },
2781 { R51x_SYS_SNAP, 0x00 },
2782 { R51x_SYS_SNAP, 0x02 },
2783 { R51x_SYS_SNAP, 0x00 },
2784 { R511_FIFO_OPTS, 0x1f },
2785 { R511_COMP_EN, 0x00 },
2786 { R511_COMP_LUT_EN, 0x03 },
2789 const struct ov_regvals norm_511_p[] = {
2790 { R511_DRAM_FLOW_CTL, 0xff },
2791 { R51x_SYS_SNAP, 0x00 },
2792 { R51x_SYS_SNAP, 0x02 },
2793 { R51x_SYS_SNAP, 0x00 },
2794 { R511_FIFO_OPTS, 0xff },
2795 { R511_COMP_EN, 0x00 },
2796 { R511_COMP_LUT_EN, 0x03 },
2799 const struct ov_regvals compress_511[] = {
2810 PDEBUG(D_PROBE, "Device custom id %x", reg_r(sd, R51x_SYS_CUST_ID));
2812 rc = write_regvals(sd, init_511, ARRAY_SIZE(init_511));
2816 switch (sd->bridge) {
2818 rc = write_regvals(sd, norm_511, ARRAY_SIZE(norm_511));
2822 case BRIDGE_OV511PLUS:
2823 rc = write_regvals(sd, norm_511_p, ARRAY_SIZE(norm_511_p));
2829 /* Init compression */
2830 rc = write_regvals(sd, compress_511, ARRAY_SIZE(compress_511));
2834 rc = ov51x_upload_quan_tables(sd);
2836 PDEBUG(D_ERR, "Error uploading quantization tables");
2843 /* This initializes the OV518/OV518+ and the sensor */
2844 static int ov518_configure(struct gspca_dev *gspca_dev)
2846 struct sd *sd = (struct sd *) gspca_dev;
2849 /* For 518 and 518+ */
2850 const struct ov_regvals init_518[] = {
2851 { R51x_SYS_RESET, 0x40 },
2852 { R51x_SYS_INIT, 0xe1 },
2853 { R51x_SYS_RESET, 0x3e },
2854 { R51x_SYS_INIT, 0xe1 },
2855 { R51x_SYS_RESET, 0x00 },
2856 { R51x_SYS_INIT, 0xe1 },
2861 const struct ov_regvals norm_518[] = {
2862 { R51x_SYS_SNAP, 0x02 }, /* Reset */
2863 { R51x_SYS_SNAP, 0x01 }, /* Enable */
2874 const struct ov_regvals norm_518_p[] = {
2875 { R51x_SYS_SNAP, 0x02 }, /* Reset */
2876 { R51x_SYS_SNAP, 0x01 }, /* Enable */
2893 /* First 5 bits of custom ID reg are a revision ID on OV518 */
2894 PDEBUG(D_PROBE, "Device revision %d",
2895 0x1F & reg_r(sd, R51x_SYS_CUST_ID));
2897 rc = write_regvals(sd, init_518, ARRAY_SIZE(init_518));
2901 /* Set LED GPIO pin to output mode */
2902 rc = reg_w_mask(sd, R518_GPIO_CTL, 0x00, 0x02);
2906 switch (sd->bridge) {
2908 rc = write_regvals(sd, norm_518, ARRAY_SIZE(norm_518));
2912 case BRIDGE_OV518PLUS:
2913 rc = write_regvals(sd, norm_518_p, ARRAY_SIZE(norm_518_p));
2919 rc = ov51x_upload_quan_tables(sd);
2921 PDEBUG(D_ERR, "Error uploading quantization tables");
2925 rc = reg_w(sd, 0x2f, 0x80);
2932 static int ov519_configure(struct sd *sd)
2934 static const struct ov_regvals init_519[] = {
2935 { 0x5a, 0x6d }, /* EnableSystem */
2937 { 0x54, 0xff }, /* set bit2 to enable jpeg */
2941 /* Set LED pin to output mode. Bit 4 must be cleared or sensor
2942 * detection will fail. This deserves further investigation. */
2943 { OV519_GPIO_IO_CTRL0, 0xee },
2944 { 0x51, 0x0f }, /* SetUsbInit */
2947 /* windows reads 0x55 at this point*/
2950 return write_regvals(sd, init_519, ARRAY_SIZE(init_519));
2953 static int ovfx2_configure(struct sd *sd)
2955 static const struct ov_regvals init_fx2[] = {
2967 return write_regvals(sd, init_fx2, ARRAY_SIZE(init_fx2));
2970 /* this function is called at probe time */
2971 static int sd_config(struct gspca_dev *gspca_dev,
2972 const struct usb_device_id *id)
2974 struct sd *sd = (struct sd *) gspca_dev;
2975 struct cam *cam = &gspca_dev->cam;
2978 sd->bridge = id->driver_info & BRIDGE_MASK;
2979 sd->invert_led = id->driver_info & BRIDGE_INVERT_LED;
2981 switch (sd->bridge) {
2983 case BRIDGE_OV511PLUS:
2984 ret = ov511_configure(gspca_dev);
2987 case BRIDGE_OV518PLUS:
2988 ret = ov518_configure(gspca_dev);
2991 ret = ov519_configure(sd);
2994 ret = ovfx2_configure(sd);
2995 cam->bulk_size = OVFX2_BULK_SIZE;
2996 cam->bulk_nurbs = MAX_NURBS;
2999 case BRIDGE_W9968CF:
3000 ret = w9968cf_configure(sd);
3001 cam->reverse_alts = 1;
3008 ov51x_led_control(sd, 0); /* turn LED off */
3010 /* The OV519 must be more aggressive about sensor detection since
3011 * I2C write will never fail if the sensor is not present. We have
3012 * to try to initialize the sensor to detect its presence */
3015 if (init_ov_sensor(sd, OV7xx0_SID) >= 0) {
3016 if (ov7xx0_configure(sd) < 0) {
3017 PDEBUG(D_ERR, "Failed to configure OV7xx0");
3021 } else if (init_ov_sensor(sd, OV6xx0_SID) >= 0) {
3022 if (ov6xx0_configure(sd) < 0) {
3023 PDEBUG(D_ERR, "Failed to configure OV6xx0");
3027 } else if (init_ov_sensor(sd, OV8xx0_SID) >= 0) {
3028 if (ov8xx0_configure(sd) < 0) {
3029 PDEBUG(D_ERR, "Failed to configure OV8xx0");
3032 /* Test for 3xxx / 2xxx */
3033 } else if (init_ov_sensor(sd, OV_HIRES_SID) >= 0) {
3034 if (ov_hires_configure(sd) < 0) {
3035 PDEBUG(D_ERR, "Failed to configure high res OV");
3039 PDEBUG(D_ERR, "Can't determine sensor slave IDs");
3043 switch (sd->bridge) {
3045 case BRIDGE_OV511PLUS:
3047 cam->cam_mode = ov511_vga_mode;
3048 cam->nmodes = ARRAY_SIZE(ov511_vga_mode);
3050 cam->cam_mode = ov511_sif_mode;
3051 cam->nmodes = ARRAY_SIZE(ov511_sif_mode);
3055 case BRIDGE_OV518PLUS:
3057 cam->cam_mode = ov518_vga_mode;
3058 cam->nmodes = ARRAY_SIZE(ov518_vga_mode);
3060 cam->cam_mode = ov518_sif_mode;
3061 cam->nmodes = ARRAY_SIZE(ov518_sif_mode);
3066 cam->cam_mode = ov519_vga_mode;
3067 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3069 cam->cam_mode = ov519_sif_mode;
3070 cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3074 if (sd->sensor == SEN_OV2610) {
3075 cam->cam_mode = ovfx2_ov2610_mode;
3076 cam->nmodes = ARRAY_SIZE(ovfx2_ov2610_mode);
3077 } else if (sd->sensor == SEN_OV3610) {
3078 cam->cam_mode = ovfx2_ov3610_mode;
3079 cam->nmodes = ARRAY_SIZE(ovfx2_ov3610_mode);
3080 } else if (!sd->sif) {
3081 cam->cam_mode = ov519_vga_mode;
3082 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3084 cam->cam_mode = ov519_sif_mode;
3085 cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3088 case BRIDGE_W9968CF:
3089 cam->cam_mode = w9968cf_vga_mode;
3090 cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode);
3094 /* w9968cf needs initialisation once the sensor is known */
3095 if (w9968cf_init(sd) < 0)
3099 sd->brightness = BRIGHTNESS_DEF;
3100 if (sd->sensor == SEN_OV6630 || sd->sensor == SEN_OV66308AF)
3101 sd->contrast = 200; /* The default is too low for the ov6630 */
3103 sd->contrast = CONTRAST_DEF;
3104 sd->colors = COLOR_DEF;
3105 sd->hflip = HFLIP_DEF;
3106 sd->vflip = VFLIP_DEF;
3107 sd->autobrightness = AUTOBRIGHT_DEF;
3108 if (sd->sensor == SEN_OV7670) {
3109 sd->freq = OV7670_FREQ_DEF;
3110 gspca_dev->ctrl_dis = 1 << FREQ_IDX;
3112 sd->freq = FREQ_DEF;
3113 gspca_dev->ctrl_dis = (1 << HFLIP_IDX) | (1 << VFLIP_IDX) |
3114 (1 << OV7670_FREQ_IDX);
3116 if (sd->sensor == SEN_OV7640 || sd->sensor == SEN_OV7670)
3117 gspca_dev->ctrl_dis |= 1 << AUTOBRIGHT_IDX;
3118 /* OV8610 Frequency filter control should work but needs testing */
3119 if (sd->sensor == SEN_OV8610)
3120 gspca_dev->ctrl_dis |= 1 << FREQ_IDX;
3121 /* No controls for the OV2610/OV3610 */
3122 if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610)
3123 gspca_dev->ctrl_dis |= 0xFF;
3127 PDEBUG(D_ERR, "OV519 Config failed");
3131 /* this function is called at probe and resume time */
3132 static int sd_init(struct gspca_dev *gspca_dev)
3134 struct sd *sd = (struct sd *) gspca_dev;
3136 /* initialize the sensor */
3137 switch (sd->sensor) {
3139 if (write_i2c_regvals(sd, norm_2610, ARRAY_SIZE(norm_2610)))
3141 /* Enable autogain, autoexpo, awb, bandfilter */
3142 if (i2c_w_mask(sd, 0x13, 0x27, 0x27) < 0)
3146 if (write_i2c_regvals(sd, norm_3620b, ARRAY_SIZE(norm_3620b)))
3148 /* Enable autogain, autoexpo, awb, bandfilter */
3149 if (i2c_w_mask(sd, 0x13, 0x27, 0x27) < 0)
3153 if (write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20)))
3158 if (write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30)))
3162 /* case SEN_OV7610: */
3163 /* case SEN_OV76BE: */
3164 if (write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610)))
3166 if (i2c_w_mask(sd, 0x0e, 0x00, 0x40))
3170 if (write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620)))
3174 if (write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640)))
3178 if (write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670)))
3182 if (write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610)))
3189 /* Set up the OV511/OV511+ with the given image parameters.
3191 * Do not put any sensor-specific code in here (including I2C I/O functions)
3193 static int ov511_mode_init_regs(struct sd *sd)
3195 int hsegs, vsegs, packet_size, fps, needed;
3197 struct usb_host_interface *alt;
3198 struct usb_interface *intf;
3200 intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3201 alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3203 PDEBUG(D_ERR, "Couldn't get altsetting");
3207 packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3208 reg_w(sd, R51x_FIFO_PSIZE, packet_size >> 5);
3210 reg_w(sd, R511_CAM_UV_EN, 0x01);
3211 reg_w(sd, R511_SNAP_UV_EN, 0x01);
3212 reg_w(sd, R511_SNAP_OPTS, 0x03);
3214 /* Here I'm assuming that snapshot size == image size.
3215 * I hope that's always true. --claudio
3217 hsegs = (sd->gspca_dev.width >> 3) - 1;
3218 vsegs = (sd->gspca_dev.height >> 3) - 1;
3220 reg_w(sd, R511_CAM_PXCNT, hsegs);
3221 reg_w(sd, R511_CAM_LNCNT, vsegs);
3222 reg_w(sd, R511_CAM_PXDIV, 0x00);
3223 reg_w(sd, R511_CAM_LNDIV, 0x00);
3225 /* YUV420, low pass filter on */
3226 reg_w(sd, R511_CAM_OPTS, 0x03);
3228 /* Snapshot additions */
3229 reg_w(sd, R511_SNAP_PXCNT, hsegs);
3230 reg_w(sd, R511_SNAP_LNCNT, vsegs);
3231 reg_w(sd, R511_SNAP_PXDIV, 0x00);
3232 reg_w(sd, R511_SNAP_LNDIV, 0x00);
3234 /******** Set the framerate ********/
3236 sd->frame_rate = frame_rate;
3238 switch (sd->sensor) {
3240 /* No framerate control, doesn't like higher rates yet */
3244 /* Note once the FIXME's in mode_init_ov_sensor_regs() are fixed
3245 for more sensors we need to do this for them too */
3249 if (sd->gspca_dev.width == 320)
3255 switch (sd->frame_rate) {
3258 /* Not enough bandwidth to do 640x480 @ 30 fps */
3259 if (sd->gspca_dev.width != 640) {
3263 /* Fall through for 640x480 case */
3277 sd->clockdiv = (sd->clockdiv + 1) * 2 - 1;
3278 /* Higher then 10 does not work */
3279 if (sd->clockdiv > 10)
3285 /* No framerate control ?? */
3290 /* Check if we have enough bandwidth to disable compression */
3291 fps = (interlaced ? 60 : 30) / (sd->clockdiv + 1) + 1;
3292 needed = fps * sd->gspca_dev.width * sd->gspca_dev.height * 3 / 2;
3293 /* 1400 is a conservative estimate of the max nr of isoc packets/sec */
3294 if (needed > 1400 * packet_size) {
3295 /* Enable Y and UV quantization and compression */
3296 reg_w(sd, R511_COMP_EN, 0x07);
3297 reg_w(sd, R511_COMP_LUT_EN, 0x03);
3299 reg_w(sd, R511_COMP_EN, 0x06);
3300 reg_w(sd, R511_COMP_LUT_EN, 0x00);
3303 reg_w(sd, R51x_SYS_RESET, OV511_RESET_OMNICE);
3304 reg_w(sd, R51x_SYS_RESET, 0);
3309 /* Sets up the OV518/OV518+ with the given image parameters
3311 * OV518 needs a completely different approach, until we can figure out what
3312 * the individual registers do. Also, only 15 FPS is supported now.
3314 * Do not put any sensor-specific code in here (including I2C I/O functions)
3316 static int ov518_mode_init_regs(struct sd *sd)
3318 int hsegs, vsegs, packet_size;
3319 struct usb_host_interface *alt;
3320 struct usb_interface *intf;
3322 intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3323 alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3325 PDEBUG(D_ERR, "Couldn't get altsetting");
3329 packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3330 ov518_reg_w32(sd, R51x_FIFO_PSIZE, packet_size & ~7, 2);
3332 /******** Set the mode ********/
3343 if (sd->bridge == BRIDGE_OV518) {
3344 /* Set 8-bit (YVYU) input format */
3345 reg_w_mask(sd, 0x20, 0x08, 0x08);
3347 /* Set 12-bit (4:2:0) output format */
3348 reg_w_mask(sd, 0x28, 0x80, 0xf0);
3349 reg_w_mask(sd, 0x38, 0x80, 0xf0);
3351 reg_w(sd, 0x28, 0x80);
3352 reg_w(sd, 0x38, 0x80);
3355 hsegs = sd->gspca_dev.width / 16;
3356 vsegs = sd->gspca_dev.height / 4;
3358 reg_w(sd, 0x29, hsegs);
3359 reg_w(sd, 0x2a, vsegs);
3361 reg_w(sd, 0x39, hsegs);
3362 reg_w(sd, 0x3a, vsegs);
3364 /* Windows driver does this here; who knows why */
3365 reg_w(sd, 0x2f, 0x80);
3367 /******** Set the framerate ********/
3370 /* Mode independent, but framerate dependent, regs */
3371 /* 0x51: Clock divider; Only works on some cams which use 2 crystals */
3372 reg_w(sd, 0x51, 0x04);
3373 reg_w(sd, 0x22, 0x18);
3374 reg_w(sd, 0x23, 0xff);
3376 if (sd->bridge == BRIDGE_OV518PLUS) {
3377 switch (sd->sensor) {
3379 if (sd->gspca_dev.width == 320) {
3380 reg_w(sd, 0x20, 0x00);
3381 reg_w(sd, 0x21, 0x19);
3383 reg_w(sd, 0x20, 0x60);
3384 reg_w(sd, 0x21, 0x1f);
3388 reg_w(sd, 0x21, 0x19);
3391 reg_w(sd, 0x71, 0x17); /* Compression-related? */
3393 /* FIXME: Sensor-specific */
3394 /* Bit 5 is what matters here. Of course, it is "reserved" */
3395 i2c_w(sd, 0x54, 0x23);
3397 reg_w(sd, 0x2f, 0x80);
3399 if (sd->bridge == BRIDGE_OV518PLUS) {
3400 reg_w(sd, 0x24, 0x94);
3401 reg_w(sd, 0x25, 0x90);
3402 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
3403 ov518_reg_w32(sd, 0xc6, 540, 2); /* 21ch */
3404 ov518_reg_w32(sd, 0xc7, 540, 2); /* 21ch */
3405 ov518_reg_w32(sd, 0xc8, 108, 2); /* 6ch */
3406 ov518_reg_w32(sd, 0xca, 131098, 3); /* 2001ah */
3407 ov518_reg_w32(sd, 0xcb, 532, 2); /* 214h */
3408 ov518_reg_w32(sd, 0xcc, 2400, 2); /* 960h */
3409 ov518_reg_w32(sd, 0xcd, 32, 2); /* 20h */
3410 ov518_reg_w32(sd, 0xce, 608, 2); /* 260h */
3412 reg_w(sd, 0x24, 0x9f);
3413 reg_w(sd, 0x25, 0x90);
3414 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
3415 ov518_reg_w32(sd, 0xc6, 381, 2); /* 17dh */
3416 ov518_reg_w32(sd, 0xc7, 381, 2); /* 17dh */
3417 ov518_reg_w32(sd, 0xc8, 128, 2); /* 80h */
3418 ov518_reg_w32(sd, 0xca, 183331, 3); /* 2cc23h */
3419 ov518_reg_w32(sd, 0xcb, 746, 2); /* 2eah */
3420 ov518_reg_w32(sd, 0xcc, 1750, 2); /* 6d6h */
3421 ov518_reg_w32(sd, 0xcd, 45, 2); /* 2dh */
3422 ov518_reg_w32(sd, 0xce, 851, 2); /* 353h */
3425 reg_w(sd, 0x2f, 0x80);
3431 /* Sets up the OV519 with the given image parameters
3433 * OV519 needs a completely different approach, until we can figure out what
3434 * the individual registers do.
3436 * Do not put any sensor-specific code in here (including I2C I/O functions)
3438 static int ov519_mode_init_regs(struct sd *sd)
3440 static const struct ov_regvals mode_init_519_ov7670[] = {
3441 { 0x5d, 0x03 }, /* Turn off suspend mode */
3442 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3443 { 0x54, 0x0f }, /* bit2 (jpeg enable) */
3444 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3448 { 0x37, 0x00 }, /* SetUsbInit */
3449 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3450 /* Enable both fields, YUV Input, disable defect comp (why?) */
3454 { 0x17, 0x50 }, /* undocumented */
3455 { 0x37, 0x00 }, /* undocumented */
3456 { 0x40, 0xff }, /* I2C timeout counter */
3457 { 0x46, 0x00 }, /* I2C clock prescaler */
3458 { 0x59, 0x04 }, /* new from windrv 090403 */
3459 { 0xff, 0x00 }, /* undocumented */
3460 /* windows reads 0x55 at this point, why? */
3463 static const struct ov_regvals mode_init_519[] = {
3464 { 0x5d, 0x03 }, /* Turn off suspend mode */
3465 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3466 { 0x54, 0x0f }, /* bit2 (jpeg enable) */
3467 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3471 { 0x37, 0x00 }, /* SetUsbInit */
3472 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3473 /* Enable both fields, YUV Input, disable defect comp (why?) */
3475 { 0x17, 0x50 }, /* undocumented */
3476 { 0x37, 0x00 }, /* undocumented */
3477 { 0x40, 0xff }, /* I2C timeout counter */
3478 { 0x46, 0x00 }, /* I2C clock prescaler */
3479 { 0x59, 0x04 }, /* new from windrv 090403 */
3480 { 0xff, 0x00 }, /* undocumented */
3481 /* windows reads 0x55 at this point, why? */
3484 /******** Set the mode ********/
3485 if (sd->sensor != SEN_OV7670) {
3486 if (write_regvals(sd, mode_init_519,
3487 ARRAY_SIZE(mode_init_519)))
3489 if (sd->sensor == SEN_OV7640) {
3490 /* Select 8-bit input mode */
3491 reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10);
3494 if (write_regvals(sd, mode_init_519_ov7670,
3495 ARRAY_SIZE(mode_init_519_ov7670)))
3499 reg_w(sd, OV519_R10_H_SIZE, sd->gspca_dev.width >> 4);
3500 reg_w(sd, OV519_R11_V_SIZE, sd->gspca_dev.height >> 3);
3501 if (sd->sensor == SEN_OV7670 &&
3502 sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3503 reg_w(sd, OV519_R12_X_OFFSETL, 0x04);
3505 reg_w(sd, OV519_R12_X_OFFSETL, 0x00);
3506 reg_w(sd, OV519_R13_X_OFFSETH, 0x00);
3507 reg_w(sd, OV519_R14_Y_OFFSETL, 0x00);
3508 reg_w(sd, OV519_R15_Y_OFFSETH, 0x00);
3509 reg_w(sd, OV519_R16_DIVIDER, 0x00);
3510 reg_w(sd, OV519_R25_FORMAT, 0x03); /* YUV422 */
3511 reg_w(sd, 0x26, 0x00); /* Undocumented */
3513 /******** Set the framerate ********/
3515 sd->frame_rate = frame_rate;
3517 /* FIXME: These are only valid at the max resolution. */
3519 switch (sd->sensor) {
3521 switch (sd->frame_rate) {
3524 reg_w(sd, 0xa4, 0x0c);
3525 reg_w(sd, 0x23, 0xff);
3528 reg_w(sd, 0xa4, 0x0c);
3529 reg_w(sd, 0x23, 0x1f);
3532 reg_w(sd, 0xa4, 0x0c);
3533 reg_w(sd, 0x23, 0x1b);
3536 reg_w(sd, 0xa4, 0x04);
3537 reg_w(sd, 0x23, 0xff);
3541 reg_w(sd, 0xa4, 0x04);
3542 reg_w(sd, 0x23, 0x1f);
3546 reg_w(sd, 0xa4, 0x04);
3547 reg_w(sd, 0x23, 0x1b);
3553 switch (sd->frame_rate) {
3554 default: /* 15 fps */
3556 reg_w(sd, 0xa4, 0x06);
3557 reg_w(sd, 0x23, 0xff);
3560 reg_w(sd, 0xa4, 0x06);
3561 reg_w(sd, 0x23, 0x1f);
3564 reg_w(sd, 0xa4, 0x06);
3565 reg_w(sd, 0x23, 0x1b);
3569 case SEN_OV7670: /* guesses, based on 7640 */
3570 PDEBUG(D_STREAM, "Setting framerate to %d fps",
3571 (sd->frame_rate == 0) ? 15 : sd->frame_rate);
3572 reg_w(sd, 0xa4, 0x10);
3573 switch (sd->frame_rate) {
3575 reg_w(sd, 0x23, 0xff);
3578 reg_w(sd, 0x23, 0x1b);
3582 reg_w(sd, 0x23, 0xff);
3591 static int mode_init_ov_sensor_regs(struct sd *sd)
3593 struct gspca_dev *gspca_dev;
3594 int qvga, xstart, xend, ystart, yend;
3597 gspca_dev = &sd->gspca_dev;
3598 qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 1;
3600 /******** Mode (VGA/QVGA) and sensor specific regs ********/
3601 switch (sd->sensor) {
3603 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3604 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3605 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
3606 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
3607 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3608 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
3609 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3613 xstart = (1040 - gspca_dev->width) / 2 + (0x1f << 4);
3614 ystart = (776 - gspca_dev->height) / 2;
3616 xstart = (2076 - gspca_dev->width) / 2 + (0x10 << 4);
3617 ystart = (1544 - gspca_dev->height) / 2;
3619 xend = xstart + gspca_dev->width;
3620 yend = ystart + gspca_dev->height;
3621 /* Writing to the COMH register resets the other windowing regs
3622 to their default values, so we must do this first. */
3623 i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0xf0);
3624 i2c_w_mask(sd, 0x32,
3625 (((xend >> 1) & 7) << 3) | ((xstart >> 1) & 7),
3627 i2c_w_mask(sd, 0x03,
3628 (((yend >> 1) & 3) << 2) | ((ystart >> 1) & 3),
3630 i2c_w(sd, 0x17, xstart >> 4);
3631 i2c_w(sd, 0x18, xend >> 4);
3632 i2c_w(sd, 0x19, ystart >> 3);
3633 i2c_w(sd, 0x1a, yend >> 3);
3636 /* For OV8610 qvga means qsvga */
3637 i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5);
3638 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3639 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3640 i2c_w_mask(sd, 0x2d, 0x00, 0x40); /* from windrv 090403 */
3641 i2c_w_mask(sd, 0x28, 0x20, 0x20); /* progressive mode on */
3644 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3645 i2c_w(sd, 0x35, qvga?0x1e:0x9e);
3646 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3647 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3651 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3652 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3653 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
3654 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
3655 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3656 i2c_w_mask(sd, 0x67, qvga ? 0xb0 : 0x90, 0xf0);
3657 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3658 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3659 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3660 if (sd->sensor == SEN_OV76BE)
3661 i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
3664 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3665 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3666 /* i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a); */
3667 /* i2c_w(sd, 0x25, qvga ? 0x30 : 0x60); */
3668 /* i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40); */
3669 /* i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0); */
3670 /* i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20); */
3671 i2c_w_mask(sd, 0x12, 0x04, 0x04); /* AWB: 1 */
3674 /* set COM7_FMT_VGA or COM7_FMT_QVGA
3675 * do we need to set anything else?
3676 * HSTART etc are set in set_ov_sensor_window itself */
3677 i2c_w_mask(sd, OV7670_REG_COM7,
3678 qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA,
3679 OV7670_COM7_FMT_MASK);
3680 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3681 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_AWB,
3683 if (qvga) { /* QVGA from ov7670.c by
3684 * Jonathan Corbet */
3695 /* OV7670 hardware window registers are split across
3696 * multiple locations */
3697 i2c_w(sd, OV7670_REG_HSTART, xstart >> 3);
3698 i2c_w(sd, OV7670_REG_HSTOP, xend >> 3);
3699 v = i2c_r(sd, OV7670_REG_HREF);
3700 v = (v & 0xc0) | ((xend & 0x7) << 3) | (xstart & 0x07);
3701 msleep(10); /* need to sleep between read and write to
3703 i2c_w(sd, OV7670_REG_HREF, v);
3705 i2c_w(sd, OV7670_REG_VSTART, ystart >> 2);
3706 i2c_w(sd, OV7670_REG_VSTOP, yend >> 2);
3707 v = i2c_r(sd, OV7670_REG_VREF);
3708 v = (v & 0xc0) | ((yend & 0x3) << 2) | (ystart & 0x03);
3709 msleep(10); /* need to sleep between read and write to
3711 i2c_w(sd, OV7670_REG_VREF, v);
3714 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3715 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3716 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3720 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3721 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3727 /******** Clock programming ********/
3728 i2c_w(sd, 0x11, sd->clockdiv);
3733 static void sethvflip(struct sd *sd)
3735 if (sd->sensor != SEN_OV7670)
3737 if (sd->gspca_dev.streaming)
3739 i2c_w_mask(sd, OV7670_REG_MVFP,
3740 OV7670_MVFP_MIRROR * sd->hflip
3741 | OV7670_MVFP_VFLIP * sd->vflip,
3742 OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP);
3743 if (sd->gspca_dev.streaming)
3747 static int set_ov_sensor_window(struct sd *sd)
3749 struct gspca_dev *gspca_dev;
3751 int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale;
3754 /* mode setup is fully handled in mode_init_ov_sensor_regs for these */
3755 if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610 ||
3756 sd->sensor == SEN_OV7670)
3757 return mode_init_ov_sensor_regs(sd);
3759 gspca_dev = &sd->gspca_dev;
3760 qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 1;
3761 crop = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 2;
3763 /* The different sensor ICs handle setting up of window differently.
3764 * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */
3765 switch (sd->sensor) {
3776 vwsbase = vwebase = 0x05;
3785 if (sd->sensor == SEN_OV66308AF && qvga)
3786 /* HDG: this fixes U and V getting swapped */
3796 hwsbase = 0x2f; /* From 7620.SET (spec is wrong) */
3798 vwsbase = vwebase = 0x05;
3803 vwsbase = vwebase = 0x03;
3809 switch (sd->sensor) {
3813 if (qvga) { /* QCIF */
3818 vwscale = 1; /* The datasheet says 0;
3823 if (qvga) { /* QSVGA */
3831 default: /* SEN_OV7xx0 */
3832 if (qvga) { /* QVGA */
3841 ret = mode_init_ov_sensor_regs(sd);
3845 i2c_w(sd, 0x17, hwsbase);
3846 i2c_w(sd, 0x18, hwebase + (sd->sensor_width >> hwscale));
3847 i2c_w(sd, 0x19, vwsbase);
3848 i2c_w(sd, 0x1a, vwebase + (sd->sensor_height >> vwscale));
3853 /* -- start the camera -- */
3854 static int sd_start(struct gspca_dev *gspca_dev)
3856 struct sd *sd = (struct sd *) gspca_dev;
3859 /* Default for most bridges, allow bridge_mode_init_regs to override */
3860 sd->sensor_width = sd->gspca_dev.width;
3861 sd->sensor_height = sd->gspca_dev.height;
3863 switch (sd->bridge) {
3865 case BRIDGE_OV511PLUS:
3866 ret = ov511_mode_init_regs(sd);
3869 case BRIDGE_OV518PLUS:
3870 ret = ov518_mode_init_regs(sd);
3873 ret = ov519_mode_init_regs(sd);
3875 /* case BRIDGE_OVFX2: nothing to do */
3876 case BRIDGE_W9968CF:
3877 ret = w9968cf_mode_init_regs(sd);
3883 ret = set_ov_sensor_window(sd);
3887 setcontrast(gspca_dev);
3888 setbrightness(gspca_dev);
3889 setcolors(gspca_dev);
3891 setautobrightness(sd);
3894 ret = ov51x_restart(sd);
3897 ov51x_led_control(sd, 1);
3900 PDEBUG(D_ERR, "camera start error:%d", ret);
3904 static void sd_stopN(struct gspca_dev *gspca_dev)
3906 struct sd *sd = (struct sd *) gspca_dev;
3909 ov51x_led_control(sd, 0);
3912 static void ov511_pkt_scan(struct gspca_dev *gspca_dev,
3913 struct gspca_frame *frame, /* target */
3914 __u8 *in, /* isoc packet */
3915 int len) /* iso packet length */
3917 struct sd *sd = (struct sd *) gspca_dev;
3919 /* SOF/EOF packets have 1st to 8th bytes zeroed and the 9th
3920 * byte non-zero. The EOF packet has image width/height in the
3921 * 10th and 11th bytes. The 9th byte is given as follows:
3924 * 6: compression enabled
3925 * 5: 422/420/400 modes
3926 * 4: 422/420/400 modes
3928 * 2: snapshot button on
3932 if (!(in[0] | in[1] | in[2] | in[3] | in[4] | in[5] | in[6] | in[7]) &&
3936 if ((in[9] + 1) * 8 != gspca_dev->width ||
3937 (in[10] + 1) * 8 != gspca_dev->height) {
3938 PDEBUG(D_ERR, "Invalid frame size, got: %dx%d,"
3939 " requested: %dx%d\n",
3940 (in[9] + 1) * 8, (in[10] + 1) * 8,
3941 gspca_dev->width, gspca_dev->height);
3942 gspca_dev->last_packet_type = DISCARD_PACKET;
3945 /* Add 11 byte footer to frame, might be usefull */
3946 gspca_frame_add(gspca_dev, LAST_PACKET, frame, in, 11);
3950 gspca_frame_add(gspca_dev, FIRST_PACKET, frame, in, 0);
3955 /* Ignore the packet number */
3958 /* intermediate packet */
3959 gspca_frame_add(gspca_dev, INTER_PACKET, frame, in, len);
3962 static void ov518_pkt_scan(struct gspca_dev *gspca_dev,
3963 struct gspca_frame *frame, /* target */
3964 __u8 *data, /* isoc packet */
3965 int len) /* iso packet length */
3967 struct sd *sd = (struct sd *) gspca_dev;
3969 /* A false positive here is likely, until OVT gives me
3970 * the definitive SOF/EOF format */
3971 if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) {
3972 frame = gspca_frame_add(gspca_dev, LAST_PACKET, frame, data, 0);
3973 gspca_frame_add(gspca_dev, FIRST_PACKET, frame, data, 0);
3977 if (gspca_dev->last_packet_type == DISCARD_PACKET)
3980 /* Does this device use packet numbers ? */
3983 if (sd->packet_nr == data[len])
3985 /* The last few packets of the frame (which are all 0's
3986 except that they may contain part of the footer), are
3988 else if (sd->packet_nr == 0 || data[len]) {
3989 PDEBUG(D_ERR, "Invalid packet nr: %d (expect: %d)",
3990 (int)data[len], (int)sd->packet_nr);
3991 gspca_dev->last_packet_type = DISCARD_PACKET;
3996 /* intermediate packet */
3997 gspca_frame_add(gspca_dev, INTER_PACKET, frame, data, len);
4000 static void ov519_pkt_scan(struct gspca_dev *gspca_dev,
4001 struct gspca_frame *frame, /* target */
4002 __u8 *data, /* isoc packet */
4003 int len) /* iso packet length */
4005 /* Header of ov519 is 16 bytes:
4006 * Byte Value Description
4010 * 3 0xXX 0x50 = SOF, 0x51 = EOF
4011 * 9 0xXX 0x01 initial frame without data,
4012 * 0x00 standard frame with image
4013 * 14 Lo in EOF: length of image data / 8
4017 if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) {
4019 case 0x50: /* start of frame */
4024 if (data[0] == 0xff || data[1] == 0xd8)
4025 gspca_frame_add(gspca_dev, FIRST_PACKET, frame,
4028 gspca_dev->last_packet_type = DISCARD_PACKET;
4030 case 0x51: /* end of frame */
4032 gspca_dev->last_packet_type = DISCARD_PACKET;
4033 gspca_frame_add(gspca_dev, LAST_PACKET, frame,
4039 /* intermediate packet */
4040 gspca_frame_add(gspca_dev, INTER_PACKET, frame,
4044 static void ovfx2_pkt_scan(struct gspca_dev *gspca_dev,
4045 struct gspca_frame *frame, /* target */
4046 __u8 *data, /* isoc packet */
4047 int len) /* iso packet length */
4049 /* A short read signals EOF */
4050 if (len < OVFX2_BULK_SIZE) {
4051 gspca_frame_add(gspca_dev, LAST_PACKET, frame, data, len);
4052 gspca_frame_add(gspca_dev, FIRST_PACKET, frame, NULL, 0);
4055 gspca_frame_add(gspca_dev, INTER_PACKET, frame, data, len);
4058 static void sd_pkt_scan(struct gspca_dev *gspca_dev,
4059 struct gspca_frame *frame, /* target */
4060 __u8 *data, /* isoc packet */
4061 int len) /* iso packet length */
4063 struct sd *sd = (struct sd *) gspca_dev;
4065 switch (sd->bridge) {
4067 case BRIDGE_OV511PLUS:
4068 ov511_pkt_scan(gspca_dev, frame, data, len);
4071 case BRIDGE_OV518PLUS:
4072 ov518_pkt_scan(gspca_dev, frame, data, len);
4075 ov519_pkt_scan(gspca_dev, frame, data, len);
4078 ovfx2_pkt_scan(gspca_dev, frame, data, len);
4080 case BRIDGE_W9968CF:
4081 w9968cf_pkt_scan(gspca_dev, frame, data, len);
4086 /* -- management routines -- */
4088 static void setbrightness(struct gspca_dev *gspca_dev)
4090 struct sd *sd = (struct sd *) gspca_dev;
4093 val = sd->brightness;
4094 switch (sd->sensor) {
4102 i2c_w(sd, OV7610_REG_BRT, val);
4105 /* 7620 doesn't like manual changes when in auto mode */
4106 if (!sd->autobrightness)
4107 i2c_w(sd, OV7610_REG_BRT, val);
4111 * i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_AEC); */
4112 i2c_w(sd, OV7670_REG_BRIGHT, ov7670_abs_to_sm(val));
4117 static void setcontrast(struct gspca_dev *gspca_dev)
4119 struct sd *sd = (struct sd *) gspca_dev;
4123 switch (sd->sensor) {
4126 i2c_w(sd, OV7610_REG_CNT, val);
4130 i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f);
4133 static const __u8 ctab[] = {
4134 0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f
4137 /* Use Y gamma control instead. Bit 0 enables it. */
4138 i2c_w(sd, 0x64, ctab[val >> 5]);
4142 static const __u8 ctab[] = {
4143 0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57,
4144 0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff
4147 /* Use Y gamma control instead. Bit 0 enables it. */
4148 i2c_w(sd, 0x64, ctab[val >> 4]);
4152 /* Use gain control instead. */
4153 i2c_w(sd, OV7610_REG_GAIN, val >> 2);
4156 /* check that this isn't just the same as ov7610 */
4157 i2c_w(sd, OV7670_REG_CONTRAS, val >> 1);
4162 static void setcolors(struct gspca_dev *gspca_dev)
4164 struct sd *sd = (struct sd *) gspca_dev;
4168 switch (sd->sensor) {
4175 i2c_w(sd, OV7610_REG_SAT, val);
4178 /* Use UV gamma control instead. Bits 0 & 7 are reserved. */
4179 /* rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e);
4182 i2c_w(sd, OV7610_REG_SAT, val);
4185 i2c_w(sd, OV7610_REG_SAT, val & 0xf0);
4188 /* supported later once I work out how to do it
4189 * transparently fail now! */
4190 /* set REG_COM13 values for UV sat auto mode */
4195 static void setautobrightness(struct sd *sd)
4197 if (sd->sensor == SEN_OV7640 || sd->sensor == SEN_OV7670 ||
4198 sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610)
4201 i2c_w_mask(sd, 0x2d, sd->autobrightness ? 0x10 : 0x00, 0x10);
4204 static void setfreq(struct sd *sd)
4206 if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610)
4209 if (sd->sensor == SEN_OV7670) {
4211 case 0: /* Banding filter disabled */
4212 i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_BFILT);
4215 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
4217 i2c_w_mask(sd, OV7670_REG_COM11, 0x08, 0x18);
4220 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
4222 i2c_w_mask(sd, OV7670_REG_COM11, 0x00, 0x18);
4224 case 3: /* Auto hz */
4225 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
4227 i2c_w_mask(sd, OV7670_REG_COM11, OV7670_COM11_HZAUTO,
4233 case 0: /* Banding filter disabled */
4234 i2c_w_mask(sd, 0x2d, 0x00, 0x04);
4235 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4237 case 1: /* 50 hz (filter on and framerate adj) */
4238 i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4239 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4240 /* 20 fps -> 16.667 fps */
4241 if (sd->sensor == SEN_OV6620 ||
4242 sd->sensor == SEN_OV6630 ||
4243 sd->sensor == SEN_OV66308AF)
4244 i2c_w(sd, 0x2b, 0x5e);
4246 i2c_w(sd, 0x2b, 0xac);
4248 case 2: /* 60 hz (filter on, ...) */
4249 i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4250 if (sd->sensor == SEN_OV6620 ||
4251 sd->sensor == SEN_OV6630 ||
4252 sd->sensor == SEN_OV66308AF) {
4253 /* 20 fps -> 15 fps */
4254 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4255 i2c_w(sd, 0x2b, 0xa8);
4257 /* no framerate adj. */
4258 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4265 static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val)
4267 struct sd *sd = (struct sd *) gspca_dev;
4269 sd->brightness = val;
4270 if (gspca_dev->streaming)
4271 setbrightness(gspca_dev);
4275 static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val)
4277 struct sd *sd = (struct sd *) gspca_dev;
4279 *val = sd->brightness;
4283 static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val)
4285 struct sd *sd = (struct sd *) gspca_dev;
4288 if (gspca_dev->streaming)
4289 setcontrast(gspca_dev);
4293 static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val)
4295 struct sd *sd = (struct sd *) gspca_dev;
4297 *val = sd->contrast;
4301 static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val)
4303 struct sd *sd = (struct sd *) gspca_dev;
4306 if (gspca_dev->streaming)
4307 setcolors(gspca_dev);
4311 static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val)
4313 struct sd *sd = (struct sd *) gspca_dev;
4319 static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val)
4321 struct sd *sd = (struct sd *) gspca_dev;
4324 if (gspca_dev->streaming)
4329 static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val)
4331 struct sd *sd = (struct sd *) gspca_dev;
4337 static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val)
4339 struct sd *sd = (struct sd *) gspca_dev;
4342 if (gspca_dev->streaming)
4347 static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val)
4349 struct sd *sd = (struct sd *) gspca_dev;
4355 static int sd_setautobrightness(struct gspca_dev *gspca_dev, __s32 val)
4357 struct sd *sd = (struct sd *) gspca_dev;
4359 sd->autobrightness = val;
4360 if (gspca_dev->streaming)
4361 setautobrightness(sd);
4365 static int sd_getautobrightness(struct gspca_dev *gspca_dev, __s32 *val)
4367 struct sd *sd = (struct sd *) gspca_dev;
4369 *val = sd->autobrightness;
4373 static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val)
4375 struct sd *sd = (struct sd *) gspca_dev;
4378 if (gspca_dev->streaming) {
4380 /* Ugly but necessary */
4381 if (sd->bridge == BRIDGE_W9968CF)
4382 w9968cf_set_crop_window(sd);
4387 static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val)
4389 struct sd *sd = (struct sd *) gspca_dev;
4395 static int sd_querymenu(struct gspca_dev *gspca_dev,
4396 struct v4l2_querymenu *menu)
4398 struct sd *sd = (struct sd *) gspca_dev;
4401 case V4L2_CID_POWER_LINE_FREQUENCY:
4402 switch (menu->index) {
4403 case 0: /* V4L2_CID_POWER_LINE_FREQUENCY_DISABLED */
4404 strcpy((char *) menu->name, "NoFliker");
4406 case 1: /* V4L2_CID_POWER_LINE_FREQUENCY_50HZ */
4407 strcpy((char *) menu->name, "50 Hz");
4409 case 2: /* V4L2_CID_POWER_LINE_FREQUENCY_60HZ */
4410 strcpy((char *) menu->name, "60 Hz");
4413 if (sd->sensor != SEN_OV7670)
4416 strcpy((char *) menu->name, "Automatic");
4424 /* sub-driver description */
4425 static const struct sd_desc sd_desc = {
4426 .name = MODULE_NAME,
4428 .nctrls = ARRAY_SIZE(sd_ctrls),
4429 .config = sd_config,
4433 .pkt_scan = sd_pkt_scan,
4434 .querymenu = sd_querymenu,
4437 /* -- module initialisation -- */
4438 static const __devinitdata struct usb_device_id device_table[] = {
4439 {USB_DEVICE(0x041e, 0x4003), .driver_info = BRIDGE_W9968CF },
4440 {USB_DEVICE(0x041e, 0x4052), .driver_info = BRIDGE_OV519 },
4441 {USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 },
4442 {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 },
4443 {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 },
4444 {USB_DEVICE(0x041e, 0x4064),
4445 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4446 {USB_DEVICE(0x041e, 0x4067), .driver_info = BRIDGE_OV519 },
4447 {USB_DEVICE(0x041e, 0x4068),
4448 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4449 {USB_DEVICE(0x045e, 0x028c), .driver_info = BRIDGE_OV519 },
4450 {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 },
4451 {USB_DEVICE(0x054c, 0x0155), .driver_info = BRIDGE_OV519 },
4452 {USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 },
4453 {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 },
4454 {USB_DEVICE(0x05a9, 0x0519), .driver_info = BRIDGE_OV519 },
4455 {USB_DEVICE(0x05a9, 0x0530), .driver_info = BRIDGE_OV519 },
4456 {USB_DEVICE(0x05a9, 0x2800), .driver_info = BRIDGE_OVFX2 },
4457 {USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 },
4458 {USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 },
4459 {USB_DEVICE(0x05a9, 0xa511), .driver_info = BRIDGE_OV511PLUS },
4460 {USB_DEVICE(0x05a9, 0xa518), .driver_info = BRIDGE_OV518PLUS },
4461 {USB_DEVICE(0x0813, 0x0002), .driver_info = BRIDGE_OV511PLUS },
4462 {USB_DEVICE(0x0b62, 0x0059), .driver_info = BRIDGE_OVFX2 },
4463 {USB_DEVICE(0x0e96, 0xc001), .driver_info = BRIDGE_OVFX2 },
4464 {USB_DEVICE(0x1046, 0x9967), .driver_info = BRIDGE_W9968CF },
4465 {USB_DEVICE(0x8020, 0xEF04), .driver_info = BRIDGE_OVFX2 },
4469 MODULE_DEVICE_TABLE(usb, device_table);
4471 /* -- device connect -- */
4472 static int sd_probe(struct usb_interface *intf,
4473 const struct usb_device_id *id)
4475 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
4479 static struct usb_driver sd_driver = {
4480 .name = MODULE_NAME,
4481 .id_table = device_table,
4483 .disconnect = gspca_disconnect,
4485 .suspend = gspca_suspend,
4486 .resume = gspca_resume,
4490 /* -- module insert / remove -- */
4491 static int __init sd_mod_init(void)
4494 ret = usb_register(&sd_driver);
4497 PDEBUG(D_PROBE, "registered");
4500 static void __exit sd_mod_exit(void)
4502 usb_deregister(&sd_driver);
4503 PDEBUG(D_PROBE, "deregistered");
4506 module_init(sd_mod_init);
4507 module_exit(sd_mod_exit);
4509 module_param(frame_rate, int, 0644);
4510 MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)");