2 * Driver for the ov9650 sensor
4 * Copyright (C) 2008 Erik Andrén
5 * Copyright (C) 2007 Ilyes Gouta. Based on the m5603x Linux Driver Project.
6 * Copyright (C) 2005 m5603x Linux Driver Project <m5602@x3ng.com.br>
8 * Portions of code to USB interface and ALi driver software,
9 * Copyright (c) 2006 Willem Duinker
10 * v4l2 interface modeled after the V4L2 driver
11 * for SN9C10x PC Camera Controllers
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation, version 2.
19 #include "m5602_ov9650.h"
21 /* Vertically and horizontally flips the image if matched, needed for machines
22 where the sensor is mounted upside down */
25 struct dmi_system_id ov9650_flip_dmi_table[] = {
29 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
30 DMI_MATCH(DMI_PRODUCT_NAME, "A6VC")
36 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
37 DMI_MATCH(DMI_PRODUCT_NAME, "A6VM")
43 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
44 DMI_MATCH(DMI_PRODUCT_NAME, "A6JC")
50 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
51 DMI_MATCH(DMI_PRODUCT_NAME, "A6J")
57 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
58 DMI_MATCH(DMI_PRODUCT_NAME, "A6Kt")
62 .ident = "Alienware Aurora m9700",
64 DMI_MATCH(DMI_SYS_VENDOR, "alienware"),
65 DMI_MATCH(DMI_PRODUCT_NAME, "Aurora m9700")
71 const static struct ctrl ov9650_ctrls[] = {
74 .id = V4L2_CID_EXPOSURE,
75 .type = V4L2_CTRL_TYPE_INTEGER,
80 .default_value = EXPOSURE_DEFAULT,
81 .flags = V4L2_CTRL_FLAG_SLIDER
83 .set = ov9650_set_exposure,
84 .get = ov9650_get_exposure
88 .type = V4L2_CTRL_TYPE_INTEGER,
93 .default_value = GAIN_DEFAULT,
94 .flags = V4L2_CTRL_FLAG_SLIDER
96 .set = ov9650_set_gain,
97 .get = ov9650_get_gain
100 .type = V4L2_CTRL_TYPE_INTEGER,
101 .name = "red balance",
105 .default_value = RED_GAIN_DEFAULT,
106 .flags = V4L2_CTRL_FLAG_SLIDER
108 .set = ov9650_set_red_balance,
109 .get = ov9650_get_red_balance
112 .type = V4L2_CTRL_TYPE_INTEGER,
113 .name = "blue balance",
117 .default_value = BLUE_GAIN_DEFAULT,
118 .flags = V4L2_CTRL_FLAG_SLIDER
120 .set = ov9650_set_blue_balance,
121 .get = ov9650_get_blue_balance
124 .id = V4L2_CID_HFLIP,
125 .type = V4L2_CTRL_TYPE_BOOLEAN,
126 .name = "horizontal flip",
132 .set = ov9650_set_hflip,
133 .get = ov9650_get_hflip
136 .id = V4L2_CID_VFLIP,
137 .type = V4L2_CTRL_TYPE_BOOLEAN,
138 .name = "vertical flip",
144 .set = ov9650_set_vflip,
145 .get = ov9650_get_vflip
148 .id = V4L2_CID_AUTO_WHITE_BALANCE,
149 .type = V4L2_CTRL_TYPE_BOOLEAN,
150 .name = "auto white balance",
156 .set = ov9650_set_auto_white_balance,
157 .get = ov9650_get_auto_white_balance
160 .id = V4L2_CID_AUTOGAIN,
161 .type = V4L2_CTRL_TYPE_BOOLEAN,
162 .name = "auto gain control",
168 .set = ov9650_set_auto_gain,
169 .get = ov9650_get_auto_gain
173 static struct v4l2_pix_format ov9650_modes[] = {
182 .colorspace = V4L2_COLORSPACE_SRGB,
192 .colorspace = V4L2_COLORSPACE_SRGB,
202 .colorspace = V4L2_COLORSPACE_SRGB,
212 .colorspace = V4L2_COLORSPACE_SRGB,
217 static void ov9650_dump_registers(struct sd *sd);
219 int ov9650_probe(struct sd *sd)
222 u8 prod_id = 0, ver_id = 0, i;
223 s32 *sensor_settings;
226 if (force_sensor == OV9650_SENSOR) {
227 info("Forcing an %s sensor", ov9650.name);
230 /* If we want to force another sensor,
231 don't try to probe this one */
235 info("Probing for an ov9650 sensor");
237 /* Run the pre-init to actually probe the unit */
238 for (i = 0; i < ARRAY_SIZE(preinit_ov9650) && !err; i++) {
239 u8 data = preinit_ov9650[i][2];
240 if (preinit_ov9650[i][0] == SENSOR)
241 err = m5602_write_sensor(sd,
242 preinit_ov9650[i][1], &data, 1);
244 err = m5602_write_bridge(sd,
245 preinit_ov9650[i][1], data);
251 if (m5602_read_sensor(sd, OV9650_PID, &prod_id, 1))
254 if (m5602_read_sensor(sd, OV9650_VER, &ver_id, 1))
257 if ((prod_id == 0x96) && (ver_id == 0x52)) {
258 info("Detected an ov9650 sensor");
266 sensor_settings = kmalloc(
267 ARRAY_SIZE(ov9650_ctrls) * sizeof(s32), GFP_KERNEL);
268 if (!sensor_settings)
271 sd->gspca_dev.cam.cam_mode = ov9650_modes;
272 sd->gspca_dev.cam.nmodes = ARRAY_SIZE(ov9650_modes);
273 sd->desc->ctrls = ov9650_ctrls;
274 sd->desc->nctrls = ARRAY_SIZE(ov9650_ctrls);
276 for (i = 0; i < ARRAY_SIZE(ov9650_ctrls); i++)
277 sensor_settings[i] = ov9650_ctrls[i].qctrl.default_value;
278 sd->sensor_priv = sensor_settings;
283 int ov9650_init(struct sd *sd)
289 ov9650_dump_registers(sd);
291 for (i = 0; i < ARRAY_SIZE(init_ov9650) && !err; i++) {
292 data = init_ov9650[i][2];
293 if (init_ov9650[i][0] == SENSOR)
294 err = m5602_write_sensor(sd, init_ov9650[i][1],
297 err = m5602_write_bridge(sd, init_ov9650[i][1], data);
300 if (dmi_check_system(ov9650_flip_dmi_table) && !err) {
301 info("vflip quirk active");
303 err = m5602_write_sensor(sd, OV9650_MVFP, &data, 1);
309 int ov9650_start(struct sd *sd)
313 struct cam *cam = &sd->gspca_dev.cam;
314 int width = cam->cam_mode[sd->gspca_dev.curr_mode].width;
315 int height = cam->cam_mode[sd->gspca_dev.curr_mode].height;
316 int ver_offs = cam->cam_mode[sd->gspca_dev.curr_mode].priv;
317 int hor_offs = OV9650_LEFT_OFFSET;
322 err = ov9650_init(sd);
326 /* Synthesize the vsync/hsync setup */
327 for (i = 0; i < ARRAY_SIZE(res_init_ov9650) && !err; i++) {
328 if (res_init_ov9650[i][0] == BRIDGE)
329 err = m5602_write_bridge(sd, res_init_ov9650[i][1],
330 res_init_ov9650[i][2]);
331 else if (res_init_ov9650[i][0] == SENSOR) {
332 u8 data = res_init_ov9650[i][2];
333 err = m5602_write_sensor(sd,
334 res_init_ov9650[i][1], &data, 1);
340 err = m5602_write_bridge(sd, M5602_XB_VSYNC_PARA,
341 ((ver_offs >> 8) & 0xff));
345 err = m5602_write_bridge(sd, M5602_XB_VSYNC_PARA, (ver_offs & 0xff));
349 err = m5602_write_bridge(sd, M5602_XB_VSYNC_PARA, 0);
353 err = m5602_write_bridge(sd, M5602_XB_VSYNC_PARA, (height >> 8) & 0xff);
357 err = m5602_write_bridge(sd, M5602_XB_VSYNC_PARA, (height & 0xff));
361 for (i = 0; i < 2 && !err; i++)
362 err = m5602_write_bridge(sd, M5602_XB_VSYNC_PARA, 0);
366 err = m5602_write_bridge(sd, M5602_XB_HSYNC_PARA,
367 (hor_offs >> 8) & 0xff);
371 err = m5602_write_bridge(sd, M5602_XB_HSYNC_PARA, hor_offs & 0xff);
375 err = m5602_write_bridge(sd, M5602_XB_HSYNC_PARA,
376 ((width + hor_offs) >> 8) & 0xff);
380 err = m5602_write_bridge(sd, M5602_XB_HSYNC_PARA,
381 ((width + hor_offs) & 0xff));
387 PDEBUG(D_V4L2, "Configuring camera for VGA mode");
389 data = OV9650_VGA_SELECT | OV9650_RGB_SELECT |
390 OV9650_RAW_RGB_SELECT;
392 err = m5602_write_sensor(sd, OV9650_COM7, &data, 1);
397 PDEBUG(D_V4L2, "Configuring camera for CIF mode");
399 data = OV9650_CIF_SELECT | OV9650_RGB_SELECT |
400 OV9650_RAW_RGB_SELECT;
402 err = m5602_write_sensor(sd, OV9650_COM7, &data, 1);
407 PDEBUG(D_V4L2, "Configuring camera for QVGA mode");
409 data = OV9650_QVGA_SELECT | OV9650_RGB_SELECT |
410 OV9650_RAW_RGB_SELECT;
412 err = m5602_write_sensor(sd, OV9650_COM7, &data, 1);
417 PDEBUG(D_V4L2, "Configuring camera for QCIF mode");
419 data = OV9650_QCIF_SELECT | OV9650_RGB_SELECT |
420 OV9650_RAW_RGB_SELECT;
422 err = m5602_write_sensor(sd, OV9650_COM7, &data, 1);
428 int ov9650_stop(struct sd *sd)
430 u8 data = OV9650_SOFT_SLEEP | OV9650_OUTPUT_DRIVE_2X;
431 return m5602_write_sensor(sd, OV9650_COM2, &data, 1);
434 int ov9650_power_down(struct sd *sd)
437 for (i = 0; i < ARRAY_SIZE(power_down_ov9650) && !err; i++) {
438 u8 data = power_down_ov9650[i][2];
439 if (power_down_ov9650[i][0] == SENSOR)
440 err = m5602_write_sensor(sd,
441 power_down_ov9650[i][1], &data, 1);
443 err = m5602_write_bridge(sd, power_down_ov9650[i][1],
450 void ov9650_disconnect(struct sd *sd)
453 ov9650_power_down(sd);
457 kfree(sd->sensor_priv);
460 int ov9650_get_exposure(struct gspca_dev *gspca_dev, __s32 *val)
462 struct sd *sd = (struct sd *) gspca_dev;
466 err = m5602_read_sensor(sd, OV9650_AECH, &i2c_data, 1);
469 *val |= (i2c_data << 2);
471 err = m5602_read_sensor(sd, OV9650_AECHM, &i2c_data, 1);
474 *val |= (i2c_data & 0x3f) << 10;
476 PDEBUG(D_V4L2, "Read exposure %d", *val);
481 int ov9650_set_exposure(struct gspca_dev *gspca_dev, __s32 val)
483 struct sd *sd = (struct sd *) gspca_dev;
487 PDEBUG(D_V4L2, "Set exposure to %d",
491 i2c_data = (val >> 10) & 0x3f;
492 err = m5602_write_sensor(sd, OV9650_AECHM,
497 /* The 8 middle bits */
498 i2c_data = (val >> 2) & 0xff;
499 err = m5602_write_sensor(sd, OV9650_AECH,
505 i2c_data = val & 0x03;
506 err = m5602_write_sensor(sd, OV9650_COM1, &i2c_data, 1);
511 int ov9650_get_gain(struct gspca_dev *gspca_dev, __s32 *val)
515 struct sd *sd = (struct sd *) gspca_dev;
517 err = m5602_read_sensor(sd, OV9650_VREF, &i2c_data, 1);
521 *val = (i2c_data & 0x03) << 8;
523 err = m5602_read_sensor(sd, OV9650_GAIN, &i2c_data, 1);
525 PDEBUG(D_V4L2, "Read gain %d", *val);
529 int ov9650_set_gain(struct gspca_dev *gspca_dev, __s32 val)
533 struct sd *sd = (struct sd *) gspca_dev;
536 /* Read the OV9650_VREF register first to avoid
537 corrupting the VREF high and low bits */
538 err = m5602_read_sensor(sd, OV9650_VREF, &i2c_data, 1);
542 /* Mask away all uninteresting bits */
543 i2c_data = ((val & 0x0300) >> 2) |
545 err = m5602_write_sensor(sd, OV9650_VREF, &i2c_data, 1);
550 i2c_data = val & 0xff;
551 err = m5602_write_sensor(sd, OV9650_GAIN, &i2c_data, 1);
555 int ov9650_get_red_balance(struct gspca_dev *gspca_dev, __s32 *val)
559 struct sd *sd = (struct sd *) gspca_dev;
561 err = m5602_read_sensor(sd, OV9650_RED, &i2c_data, 1);
564 PDEBUG(D_V4L2, "Read red gain %d", *val);
569 int ov9650_set_red_balance(struct gspca_dev *gspca_dev, __s32 val)
573 struct sd *sd = (struct sd *) gspca_dev;
575 PDEBUG(D_V4L2, "Set red gain to %d",
578 i2c_data = val & 0xff;
579 err = m5602_write_sensor(sd, OV9650_RED, &i2c_data, 1);
584 int ov9650_get_blue_balance(struct gspca_dev *gspca_dev, __s32 *val)
588 struct sd *sd = (struct sd *) gspca_dev;
590 err = m5602_read_sensor(sd, OV9650_BLUE, &i2c_data, 1);
593 PDEBUG(D_V4L2, "Read blue gain %d", *val);
598 int ov9650_set_blue_balance(struct gspca_dev *gspca_dev, __s32 val)
602 struct sd *sd = (struct sd *) gspca_dev;
604 PDEBUG(D_V4L2, "Set blue gain to %d",
607 i2c_data = val & 0xff;
608 err = m5602_write_sensor(sd, OV9650_BLUE, &i2c_data, 1);
613 int ov9650_get_hflip(struct gspca_dev *gspca_dev, __s32 *val)
617 struct sd *sd = (struct sd *) gspca_dev;
619 err = m5602_read_sensor(sd, OV9650_MVFP, &i2c_data, 1);
620 if (dmi_check_system(ov9650_flip_dmi_table))
621 *val = ((i2c_data & OV9650_HFLIP) >> 5) ? 0 : 1;
623 *val = (i2c_data & OV9650_HFLIP) >> 5;
624 PDEBUG(D_V4L2, "Read horizontal flip %d", *val);
629 int ov9650_set_hflip(struct gspca_dev *gspca_dev, __s32 val)
633 struct sd *sd = (struct sd *) gspca_dev;
635 PDEBUG(D_V4L2, "Set horizontal flip to %d", val);
636 err = m5602_read_sensor(sd, OV9650_MVFP, &i2c_data, 1);
640 if (dmi_check_system(ov9650_flip_dmi_table))
641 i2c_data = ((i2c_data & 0xdf) |
642 (((val ? 0 : 1) & 0x01) << 5));
644 i2c_data = ((i2c_data & 0xdf) |
645 ((val & 0x01) << 5));
647 err = m5602_write_sensor(sd, OV9650_MVFP, &i2c_data, 1);
652 int ov9650_get_vflip(struct gspca_dev *gspca_dev, __s32 *val)
656 struct sd *sd = (struct sd *) gspca_dev;
658 err = m5602_read_sensor(sd, OV9650_MVFP, &i2c_data, 1);
659 if (dmi_check_system(ov9650_flip_dmi_table))
660 *val = ((i2c_data & 0x10) >> 4) ? 0 : 1;
662 *val = (i2c_data & 0x10) >> 4;
663 PDEBUG(D_V4L2, "Read vertical flip %d", *val);
668 int ov9650_set_vflip(struct gspca_dev *gspca_dev, __s32 val)
672 struct sd *sd = (struct sd *) gspca_dev;
674 PDEBUG(D_V4L2, "Set vertical flip to %d", val);
675 err = m5602_read_sensor(sd, OV9650_MVFP, &i2c_data, 1);
679 if (dmi_check_system(ov9650_flip_dmi_table))
680 i2c_data = ((i2c_data & 0xef) |
681 (((val ? 0 : 1) & 0x01) << 4));
683 i2c_data = ((i2c_data & 0xef) |
684 ((val & 0x01) << 4));
686 err = m5602_write_sensor(sd, OV9650_MVFP, &i2c_data, 1);
691 int ov9650_get_brightness(struct gspca_dev *gspca_dev, __s32 *val)
695 struct sd *sd = (struct sd *) gspca_dev;
697 err = m5602_read_sensor(sd, OV9650_VREF, &i2c_data, 1);
700 *val = (i2c_data & 0x03) << 8;
702 err = m5602_read_sensor(sd, OV9650_GAIN, &i2c_data, 1);
704 PDEBUG(D_V4L2, "Read gain %d", *val);
709 int ov9650_set_brightness(struct gspca_dev *gspca_dev, __s32 val)
713 struct sd *sd = (struct sd *) gspca_dev;
715 PDEBUG(D_V4L2, "Set gain to %d", val & 0x3ff);
717 /* Read the OV9650_VREF register first to avoid
718 corrupting the VREF high and low bits */
719 err = m5602_read_sensor(sd, OV9650_VREF, &i2c_data, 1);
723 /* Mask away all uninteresting bits */
724 i2c_data = ((val & 0x0300) >> 2) | (i2c_data & 0x3F);
725 err = m5602_write_sensor(sd, OV9650_VREF, &i2c_data, 1);
730 i2c_data = val & 0xff;
731 err = m5602_write_sensor(sd, OV9650_GAIN, &i2c_data, 1);
736 int ov9650_get_auto_white_balance(struct gspca_dev *gspca_dev, __s32 *val)
740 struct sd *sd = (struct sd *) gspca_dev;
742 err = m5602_read_sensor(sd, OV9650_COM8, &i2c_data, 1);
743 *val = (i2c_data & OV9650_AWB_EN) >> 1;
744 PDEBUG(D_V4L2, "Read auto white balance %d", *val);
749 int ov9650_set_auto_white_balance(struct gspca_dev *gspca_dev, __s32 val)
753 struct sd *sd = (struct sd *) gspca_dev;
755 PDEBUG(D_V4L2, "Set auto white balance to %d", val);
756 err = m5602_read_sensor(sd, OV9650_COM8, &i2c_data, 1);
760 i2c_data = ((i2c_data & 0xfd) | ((val & 0x01) << 1));
761 err = m5602_write_sensor(sd, OV9650_COM8, &i2c_data, 1);
766 int ov9650_get_auto_gain(struct gspca_dev *gspca_dev, __s32 *val)
770 struct sd *sd = (struct sd *) gspca_dev;
772 err = m5602_read_sensor(sd, OV9650_COM8, &i2c_data, 1);
773 *val = (i2c_data & OV9650_AGC_EN) >> 2;
774 PDEBUG(D_V4L2, "Read auto gain control %d", *val);
779 int ov9650_set_auto_gain(struct gspca_dev *gspca_dev, __s32 val)
783 struct sd *sd = (struct sd *) gspca_dev;
785 PDEBUG(D_V4L2, "Set auto gain control to %d", val);
786 err = m5602_read_sensor(sd, OV9650_COM8, &i2c_data, 1);
790 i2c_data = ((i2c_data & 0xfb) | ((val & 0x01) << 2));
791 err = m5602_write_sensor(sd, OV9650_COM8, &i2c_data, 1);
796 static void ov9650_dump_registers(struct sd *sd)
799 info("Dumping the ov9650 register state");
800 for (address = 0; address < 0xa9; address++) {
802 m5602_read_sensor(sd, address, &value, 1);
803 info("register 0x%x contains 0x%x",
807 info("ov9650 register state dump complete");
809 info("Probing for which registers that are read/write");
810 for (address = 0; address < 0xff; address++) {
811 u8 old_value, ctrl_value;
812 u8 test_value[2] = {0xff, 0xff};
814 m5602_read_sensor(sd, address, &old_value, 1);
815 m5602_write_sensor(sd, address, test_value, 1);
816 m5602_read_sensor(sd, address, &ctrl_value, 1);
818 if (ctrl_value == test_value[0])
819 info("register 0x%x is writeable", address);
821 info("register 0x%x is read only", address);
823 /* Restore original value */
824 m5602_write_sensor(sd, address, &old_value, 1);