2 em28xx-core.c - driver for Empia EM2800/EM2820/2840 USB video capture devices
4 Copyright (C) 2005 Ludovico Cavedon <cavedon@sssup.it>
5 Markus Rechberger <mrechberger@gmail.com>
6 Mauro Carvalho Chehab <mchehab@infradead.org>
7 Sascha Sommer <saschasommer@freenet.de>
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 #include <linux/init.h>
25 #include <linux/list.h>
26 #include <linux/module.h>
27 #include <linux/usb.h>
28 #include <linux/vmalloc.h>
32 /* #define ENABLE_DEBUG_ISOC_FRAMES */
34 static unsigned int core_debug;
35 module_param(core_debug,int,0644);
36 MODULE_PARM_DESC(core_debug,"enable debug messages [core]");
38 #define em28xx_coredbg(fmt, arg...) do {\
40 printk(KERN_INFO "%s %s :"fmt, \
41 dev->name, __func__ , ##arg); } while (0)
43 static unsigned int reg_debug;
44 module_param(reg_debug,int,0644);
45 MODULE_PARM_DESC(reg_debug,"enable debug messages [URB reg]");
47 #define em28xx_regdbg(fmt, arg...) do {\
49 printk(KERN_INFO "%s %s :"fmt, \
50 dev->name, __func__ , ##arg); } while (0)
52 static int alt = EM28XX_PINOUT;
53 module_param(alt, int, 0644);
54 MODULE_PARM_DESC(alt, "alternate setting to use for video endpoint");
57 #define em28xx_isocdbg(fmt, arg...) do {\
59 printk(KERN_INFO "%s %s :"fmt, \
60 dev->name, __func__ , ##arg); } while (0)
63 * em28xx_read_reg_req()
64 * reads data from the usb device specifying bRequest
66 int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg,
70 int pipe = usb_rcvctrlpipe(dev->udev, 0);
72 if (dev->state & DEV_DISCONNECTED)
75 if (len > URB_MAX_CTRL_SIZE)
79 printk( KERN_DEBUG "(pipe 0x%08x): "
80 "IN: %02x %02x %02x %02x %02x %02x %02x %02x ",
82 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
85 len & 0xff, len >> 8);
88 mutex_lock(&dev->ctrl_urb_lock);
89 ret = usb_control_msg(dev->udev, pipe, req,
90 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
91 0x0000, reg, dev->urb_buf, len, HZ);
95 mutex_unlock(&dev->ctrl_urb_lock);
100 memcpy(buf, dev->urb_buf, len);
102 mutex_unlock(&dev->ctrl_urb_lock);
108 for (byte = 0; byte < len; byte++)
109 printk(" %02x", (unsigned char)buf[byte]);
117 * em28xx_read_reg_req()
118 * reads data from the usb device specifying bRequest
120 int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg)
125 ret = em28xx_read_reg_req_len(dev, req, reg, &val, 1);
132 int em28xx_read_reg(struct em28xx *dev, u16 reg)
134 return em28xx_read_reg_req(dev, USB_REQ_GET_STATUS, reg);
138 * em28xx_write_regs_req()
139 * sends data to the usb device, specifying bRequest
141 int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf,
145 int pipe = usb_sndctrlpipe(dev->udev, 0);
147 if (dev->state & DEV_DISCONNECTED)
150 if ((len < 1) || (len > URB_MAX_CTRL_SIZE))
156 printk( KERN_DEBUG "(pipe 0x%08x): "
157 "OUT: %02x %02x %02x %02x %02x %02x %02x %02x >>>",
159 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
161 reg & 0xff, reg >> 8,
162 len & 0xff, len >> 8);
164 for (byte = 0; byte < len; byte++)
165 printk(" %02x", (unsigned char)buf[byte]);
169 mutex_lock(&dev->ctrl_urb_lock);
170 memcpy(dev->urb_buf, buf, len);
171 ret = usb_control_msg(dev->udev, pipe, req,
172 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
173 0x0000, reg, dev->urb_buf, len, HZ);
174 mutex_unlock(&dev->ctrl_urb_lock);
176 if (dev->wait_after_write)
177 msleep(dev->wait_after_write);
182 int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len)
186 rc = em28xx_write_regs_req(dev, USB_REQ_GET_STATUS, reg, buf, len);
188 /* Stores GPO/GPIO values at the cache, if changed
189 Only write values should be stored, since input on a GPIO
190 register will return the input bits.
191 Not sure what happens on reading GPO register.
194 if (reg == dev->reg_gpo_num)
195 dev->reg_gpo = buf[0];
196 else if (reg == dev->reg_gpio_num)
197 dev->reg_gpio = buf[0];
203 /* Write a single register */
204 int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val)
206 return em28xx_write_regs(dev, reg, &val, 1);
210 * em28xx_write_reg_bits()
211 * sets only some bits (specified by bitmask) of a register, by first reading
214 static int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val,
220 /* Uses cache for gpo/gpio registers */
221 if (reg == dev->reg_gpo_num)
222 oldval = dev->reg_gpo;
223 else if (reg == dev->reg_gpio_num)
224 oldval = dev->reg_gpio;
226 oldval = em28xx_read_reg(dev, reg);
231 newval = (((u8) oldval) & ~bitmask) | (val & bitmask);
233 return em28xx_write_regs(dev, reg, &newval, 1);
237 * em28xx_is_ac97_ready()
238 * Checks if ac97 is ready
240 static int em28xx_is_ac97_ready(struct em28xx *dev)
244 /* Wait up to 50 ms for AC97 command to complete */
245 for (i = 0; i < 10; i++, msleep(5)) {
246 ret = em28xx_read_reg(dev, EM28XX_R43_AC97BUSY);
254 em28xx_warn("AC97 command still being executed: not handled properly!\n");
260 * write a 16 bit value to the specified AC97 address (LSB first!)
262 static int em28xx_read_ac97(struct em28xx *dev, u8 reg)
265 u8 addr = (reg & 0x7f) | 0x80;
268 ret = em28xx_is_ac97_ready(dev);
272 ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
276 ret = dev->em28xx_read_reg_req_len(dev, 0, EM28XX_R40_AC97LSB,
277 (u8 *)&val, sizeof(val));
281 return le16_to_cpu(val);
285 * em28xx_write_ac97()
286 * write a 16 bit value to the specified AC97 address (LSB first!)
288 static int em28xx_write_ac97(struct em28xx *dev, u8 reg, u16 val)
291 u8 addr = reg & 0x7f;
294 value = cpu_to_le16(val);
296 ret = em28xx_is_ac97_ready(dev);
300 ret = em28xx_write_regs(dev, EM28XX_R40_AC97LSB, (u8 *) &value, 2);
304 ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
311 struct em28xx_vol_table {
312 enum em28xx_amux mux;
316 static struct em28xx_vol_table inputs[] = {
317 { EM28XX_AMUX_VIDEO, AC97_VIDEO_VOL },
318 { EM28XX_AMUX_LINE_IN, AC97_LINEIN_VOL },
319 { EM28XX_AMUX_PHONE, AC97_PHONE_VOL },
320 { EM28XX_AMUX_MIC, AC97_MIC_VOL },
321 { EM28XX_AMUX_CD, AC97_CD_VOL },
322 { EM28XX_AMUX_AUX, AC97_AUX_VOL },
323 { EM28XX_AMUX_PCM_OUT, AC97_PCM_OUT_VOL },
326 static int set_ac97_input(struct em28xx *dev)
329 enum em28xx_amux amux = dev->ctl_ainput;
331 /* EM28XX_AMUX_VIDEO2 is a special case used to indicate that
332 em28xx should point to LINE IN, while AC97 should use VIDEO
334 if (amux == EM28XX_AMUX_VIDEO2)
335 amux = EM28XX_AMUX_VIDEO;
337 /* Mute all entres but the one that were selected */
338 for (i = 0; i < ARRAY_SIZE(inputs); i++) {
339 if (amux == inputs[i].mux)
340 ret = em28xx_write_ac97(dev, inputs[i].reg, 0x0808);
342 ret = em28xx_write_ac97(dev, inputs[i].reg, 0x8000);
345 em28xx_warn("couldn't setup AC97 register %d\n",
351 static int em28xx_set_audio_source(struct em28xx *dev)
356 if (dev->board.is_em2800) {
357 if (dev->ctl_ainput == EM28XX_AMUX_VIDEO)
358 input = EM2800_AUDIO_SRC_TUNER;
360 input = EM2800_AUDIO_SRC_LINE;
362 ret = em28xx_write_regs(dev, EM2800_R08_AUDIOSRC, &input, 1);
367 if (dev->board.has_msp34xx)
368 input = EM28XX_AUDIO_SRC_TUNER;
370 switch (dev->ctl_ainput) {
371 case EM28XX_AMUX_VIDEO:
372 input = EM28XX_AUDIO_SRC_TUNER;
375 input = EM28XX_AUDIO_SRC_LINE;
380 ret = em28xx_write_reg_bits(dev, EM28XX_R0E_AUDIOSRC, input, 0xc0);
385 switch (dev->audio_mode.ac97) {
389 ret = set_ac97_input(dev);
395 struct em28xx_vol_table outputs[] = {
396 { EM28XX_AOUT_MASTER, AC97_MASTER_VOL },
397 { EM28XX_AOUT_LINE, AC97_LINE_LEVEL_VOL },
398 { EM28XX_AOUT_MONO, AC97_MASTER_MONO_VOL },
399 { EM28XX_AOUT_LFE, AC97_LFE_MASTER_VOL },
400 { EM28XX_AOUT_SURR, AC97_SURR_MASTER_VOL },
403 int em28xx_audio_analog_set(struct em28xx *dev)
408 if (!dev->audio_mode.has_audio)
411 /* It is assumed that all devices use master volume for output.
412 It would be possible to use also line output.
414 if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
415 /* Mute all outputs */
416 for (i = 0; i < ARRAY_SIZE(outputs); i++) {
417 ret = em28xx_write_ac97(dev, outputs[i].reg, 0x8000);
419 em28xx_warn("couldn't setup AC97 register %d\n",
424 xclk = dev->board.xclk & 0x7f;
428 ret = em28xx_write_reg(dev, EM28XX_R0F_XCLK, xclk);
433 /* Selects the proper audio input */
434 ret = em28xx_set_audio_source(dev);
437 if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
440 /* LSB: left channel - both channels with the same level */
441 vol = (0x1f - dev->volume) | ((0x1f - dev->volume) << 8);
443 /* Mute device, if needed */
448 for (i = 0; i < ARRAY_SIZE(outputs); i++) {
449 if (dev->ctl_aoutput & outputs[i].mux)
450 ret = em28xx_write_ac97(dev, outputs[i].reg,
453 em28xx_warn("couldn't setup AC97 register %d\n",
460 EXPORT_SYMBOL_GPL(em28xx_audio_analog_set);
462 int em28xx_audio_setup(struct em28xx *dev)
464 int vid1, vid2, feat, cfg;
467 if (dev->chip_id == CHIP_ID_EM2874) {
468 /* Digital only device - don't load any alsa module */
469 dev->audio_mode.has_audio = 0;
470 dev->has_audio_class = 0;
471 dev->has_alsa_audio = 0;
475 /* If device doesn't support Usb Audio Class, use vendor class */
476 if (!dev->has_audio_class)
477 dev->has_alsa_audio = 1;
479 dev->audio_mode.has_audio = 1;
481 /* See how this device is configured */
482 cfg = em28xx_read_reg(dev, EM28XX_R00_CHIPCFG);
484 cfg = EM28XX_CHIPCFG_AC97; /* Be conservative */
486 em28xx_info("Config register raw data: 0x%02x\n", cfg);
488 if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
489 EM28XX_CHIPCFG_I2S_3_SAMPRATES) {
490 em28xx_info("I2S Audio (3 sample rates)\n");
491 dev->audio_mode.i2s_3rates = 1;
493 if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
494 EM28XX_CHIPCFG_I2S_5_SAMPRATES) {
495 em28xx_info("I2S Audio (5 sample rates)\n");
496 dev->audio_mode.i2s_5rates = 1;
499 if (!(cfg & EM28XX_CHIPCFG_AC97)) {
500 dev->audio_mode.ac97 = EM28XX_NO_AC97;
504 dev->audio_mode.ac97 = EM28XX_AC97_OTHER;
506 vid1 = em28xx_read_ac97(dev, AC97_VENDOR_ID1);
508 /* Device likely doesn't support AC97 */
509 em28xx_warn("AC97 chip type couldn't be determined\n");
513 vid2 = em28xx_read_ac97(dev, AC97_VENDOR_ID2);
517 vid = vid1 << 16 | vid2;
519 dev->audio_mode.ac97_vendor_id = vid;
520 em28xx_warn("AC97 vendor ID = 0x%08x\n", vid);
522 feat = em28xx_read_ac97(dev, AC97_RESET);
526 dev->audio_mode.ac97_feat = feat;
527 em28xx_warn("AC97 features = 0x%04x\n", feat);
529 /* Try to identify what audio processor we have */
530 if ((vid == 0xffffffff) && (feat == 0x6a90))
531 dev->audio_mode.ac97 = EM28XX_AC97_EM202;
532 else if ((vid >> 8) == 0x838476)
533 dev->audio_mode.ac97 = EM28XX_AC97_SIGMATEL;
536 /* Reports detected AC97 processor */
537 switch (dev->audio_mode.ac97) {
539 em28xx_info("No AC97 audio processor\n");
541 case EM28XX_AC97_EM202:
542 em28xx_info("Empia 202 AC97 audio processor detected\n");
544 case EM28XX_AC97_SIGMATEL:
545 em28xx_info("Sigmatel audio processor detected(stac 97%02x)\n",
546 dev->audio_mode.ac97_vendor_id & 0xff);
548 case EM28XX_AC97_OTHER:
549 em28xx_warn("Unknown AC97 audio processor detected!\n");
555 return em28xx_audio_analog_set(dev);
557 EXPORT_SYMBOL_GPL(em28xx_audio_setup);
559 int em28xx_colorlevels_set_default(struct em28xx *dev)
561 em28xx_write_reg(dev, EM28XX_R20_YGAIN, 0x10); /* contrast */
562 em28xx_write_reg(dev, EM28XX_R21_YOFFSET, 0x00); /* brightness */
563 em28xx_write_reg(dev, EM28XX_R22_UVGAIN, 0x10); /* saturation */
564 em28xx_write_reg(dev, EM28XX_R23_UOFFSET, 0x00);
565 em28xx_write_reg(dev, EM28XX_R24_VOFFSET, 0x00);
566 em28xx_write_reg(dev, EM28XX_R25_SHARPNESS, 0x00);
568 em28xx_write_reg(dev, EM28XX_R14_GAMMA, 0x20);
569 em28xx_write_reg(dev, EM28XX_R15_RGAIN, 0x20);
570 em28xx_write_reg(dev, EM28XX_R16_GGAIN, 0x20);
571 em28xx_write_reg(dev, EM28XX_R17_BGAIN, 0x20);
572 em28xx_write_reg(dev, EM28XX_R18_ROFFSET, 0x00);
573 em28xx_write_reg(dev, EM28XX_R19_GOFFSET, 0x00);
574 return em28xx_write_reg(dev, EM28XX_R1A_BOFFSET, 0x00);
577 int em28xx_capture_start(struct em28xx *dev, int start)
581 if (dev->chip_id == CHIP_ID_EM2874) {
582 /* The Transport Stream Enable Register moved in em2874 */
584 rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE,
586 EM2874_TS1_CAPTURE_ENABLE);
590 /* Enable Transport Stream */
591 rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE,
592 EM2874_TS1_CAPTURE_ENABLE,
593 EM2874_TS1_CAPTURE_ENABLE);
598 /* FIXME: which is the best order? */
599 /* video registers are sampled by VREF */
600 rc = em28xx_write_reg_bits(dev, EM28XX_R0C_USBSUSP,
601 start ? 0x10 : 0x00, 0x10);
606 /* disable video capture */
607 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x27);
611 /* enable video capture */
612 rc = em28xx_write_reg(dev, 0x48, 0x00);
614 if (dev->mode == EM28XX_ANALOG_MODE)
615 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67);
617 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x37);
624 int em28xx_set_outfmt(struct em28xx *dev)
628 ret = em28xx_write_reg_bits(dev, EM28XX_R27_OUTFMT,
629 dev->format->reg | 0x20, 0x3f);
633 ret = em28xx_write_reg(dev, EM28XX_R10_VINMODE, 0x10);
637 return em28xx_write_reg(dev, EM28XX_R11_VINCTRL, 0x11);
640 static int em28xx_accumulator_set(struct em28xx *dev, u8 xmin, u8 xmax,
643 em28xx_coredbg("em28xx Scale: (%d,%d)-(%d,%d)\n",
644 xmin, ymin, xmax, ymax);
646 em28xx_write_regs(dev, EM28XX_R28_XMIN, &xmin, 1);
647 em28xx_write_regs(dev, EM28XX_R29_XMAX, &xmax, 1);
648 em28xx_write_regs(dev, EM28XX_R2A_YMIN, &ymin, 1);
649 return em28xx_write_regs(dev, EM28XX_R2B_YMAX, &ymax, 1);
652 static int em28xx_capture_area_set(struct em28xx *dev, u8 hstart, u8 vstart,
653 u16 width, u16 height)
657 u8 overflow = (height >> 7 & 0x02) | (width >> 8 & 0x01);
659 em28xx_coredbg("em28xx Area Set: (%d,%d)\n",
660 (width | (overflow & 2) << 7),
661 (height | (overflow & 1) << 8));
663 em28xx_write_regs(dev, EM28XX_R1C_HSTART, &hstart, 1);
664 em28xx_write_regs(dev, EM28XX_R1D_VSTART, &vstart, 1);
665 em28xx_write_regs(dev, EM28XX_R1E_CWIDTH, &cwidth, 1);
666 em28xx_write_regs(dev, EM28XX_R1F_CHEIGHT, &cheight, 1);
667 return em28xx_write_regs(dev, EM28XX_R1B_OFLOW, &overflow, 1);
670 static int em28xx_scaler_set(struct em28xx *dev, u16 h, u16 v)
673 /* the em2800 scaler only supports scaling down to 50% */
674 if (dev->board.is_em2800)
675 mode = (v ? 0x20 : 0x00) | (h ? 0x10 : 0x00);
680 em28xx_write_regs(dev, EM28XX_R30_HSCALELOW, (char *)buf, 2);
683 em28xx_write_regs(dev, EM28XX_R32_VSCALELOW, (char *)buf, 2);
684 /* it seems that both H and V scalers must be active
686 mode = (h || v)? 0x30: 0x00;
688 return em28xx_write_reg_bits(dev, EM28XX_R26_COMPR, mode, 0x30);
691 /* FIXME: this only function read values from dev */
692 int em28xx_resolution_set(struct em28xx *dev)
695 width = norm_maxw(dev);
696 height = norm_maxh(dev) >> 1;
698 em28xx_set_outfmt(dev);
699 em28xx_accumulator_set(dev, 1, (width - 4) >> 2, 1, (height - 4) >> 2);
700 em28xx_capture_area_set(dev, 0, 0, width >> 2, height >> 2);
701 return em28xx_scaler_set(dev, dev->hscale, dev->vscale);
704 int em28xx_set_alternate(struct em28xx *dev)
706 int errCode, prev_alt = dev->alt;
708 unsigned int min_pkt_size = dev->width * 2 + 4;
710 /* When image size is bigger than a certain value,
711 the frame size should be increased, otherwise, only
712 green screen will be received.
714 if (dev->width * 2 * dev->height > 720 * 240 * 2)
717 for (i = 0; i < dev->num_alt; i++) {
718 /* stop when the selected alt setting offers enough bandwidth */
719 if (dev->alt_max_pkt_size[i] >= min_pkt_size) {
722 /* otherwise make sure that we end up with the maximum bandwidth
723 because the min_pkt_size equation might be wrong...
725 } else if (dev->alt_max_pkt_size[i] >
726 dev->alt_max_pkt_size[dev->alt])
730 if (dev->alt != prev_alt) {
731 em28xx_coredbg("minimum isoc packet size: %u (alt=%d)\n",
732 min_pkt_size, dev->alt);
733 dev->max_pkt_size = dev->alt_max_pkt_size[dev->alt];
734 em28xx_coredbg("setting alternate %d with wMaxPacketSize=%u\n",
735 dev->alt, dev->max_pkt_size);
736 errCode = usb_set_interface(dev->udev, 0, dev->alt);
738 em28xx_errdev("cannot change alternate number to %d (error=%i)\n",
746 int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio)
753 if (dev->mode != EM28XX_SUSPEND) {
754 em28xx_write_reg(dev, 0x48, 0x00);
755 if (dev->mode == EM28XX_ANALOG_MODE)
756 em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67);
758 em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x37);
762 /* Send GPIO reset sequences specified at board entry */
763 while (gpio->sleep >= 0) {
764 if (gpio->reg >= 0) {
765 rc = em28xx_write_reg_bits(dev,
780 int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode)
782 if (dev->mode == set_mode)
785 if (set_mode == EM28XX_SUSPEND) {
786 dev->mode = set_mode;
788 /* FIXME: add suspend support for ac97 */
790 return em28xx_gpio_set(dev, dev->board.suspend_gpio);
793 dev->mode = set_mode;
795 if (dev->mode == EM28XX_DIGITAL_MODE)
796 return em28xx_gpio_set(dev, dev->board.dvb_gpio);
798 return em28xx_gpio_set(dev, INPUT(dev->ctl_input)->gpio);
800 EXPORT_SYMBOL_GPL(em28xx_set_mode);
802 /* ------------------------------------------------------------------
804 ------------------------------------------------------------------*/
807 * IRQ callback, called by URB callback
809 static void em28xx_irq_callback(struct urb *urb)
811 struct em28xx_dmaqueue *dma_q = urb->context;
812 struct em28xx *dev = container_of(dma_q, struct em28xx, vidq);
815 /* Copy data from URB */
816 spin_lock(&dev->slock);
817 rc = dev->isoc_ctl.isoc_copy(dev, urb);
818 spin_unlock(&dev->slock);
820 /* Reset urb buffers */
821 for (i = 0; i < urb->number_of_packets; i++) {
822 urb->iso_frame_desc[i].status = 0;
823 urb->iso_frame_desc[i].actual_length = 0;
827 urb->status = usb_submit_urb(urb, GFP_ATOMIC);
829 em28xx_isocdbg("urb resubmit failed (error=%i)\n",
835 * Stop and Deallocate URBs
837 void em28xx_uninit_isoc(struct em28xx *dev)
842 em28xx_isocdbg("em28xx: called em28xx_uninit_isoc\n");
844 dev->isoc_ctl.nfields = -1;
845 for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
846 urb = dev->isoc_ctl.urb[i];
850 if (dev->isoc_ctl.transfer_buffer[i]) {
851 usb_buffer_free(dev->udev,
852 urb->transfer_buffer_length,
853 dev->isoc_ctl.transfer_buffer[i],
857 dev->isoc_ctl.urb[i] = NULL;
859 dev->isoc_ctl.transfer_buffer[i] = NULL;
862 kfree(dev->isoc_ctl.urb);
863 kfree(dev->isoc_ctl.transfer_buffer);
865 dev->isoc_ctl.urb = NULL;
866 dev->isoc_ctl.transfer_buffer = NULL;
867 dev->isoc_ctl.num_bufs = 0;
869 em28xx_capture_start(dev, 0);
871 EXPORT_SYMBOL_GPL(em28xx_uninit_isoc);
874 * Allocate URBs and start IRQ
876 int em28xx_init_isoc(struct em28xx *dev, int max_packets,
877 int num_bufs, int max_pkt_size,
878 int (*isoc_copy) (struct em28xx *dev, struct urb *urb))
880 struct em28xx_dmaqueue *dma_q = &dev->vidq;
887 em28xx_isocdbg("em28xx: called em28xx_prepare_isoc\n");
889 /* De-allocates all pending stuff */
890 em28xx_uninit_isoc(dev);
892 dev->isoc_ctl.isoc_copy = isoc_copy;
893 dev->isoc_ctl.num_bufs = num_bufs;
895 dev->isoc_ctl.urb = kzalloc(sizeof(void *)*num_bufs, GFP_KERNEL);
896 if (!dev->isoc_ctl.urb) {
897 em28xx_errdev("cannot alloc memory for usb buffers\n");
901 dev->isoc_ctl.transfer_buffer = kzalloc(sizeof(void *)*num_bufs,
903 if (!dev->isoc_ctl.transfer_buffer) {
904 em28xx_errdev("cannot allocate memory for usbtransfer\n");
905 kfree(dev->isoc_ctl.urb);
909 dev->isoc_ctl.max_pkt_size = max_pkt_size;
910 dev->isoc_ctl.buf = NULL;
912 sb_size = max_packets * dev->isoc_ctl.max_pkt_size;
914 /* allocate urbs and transfer buffers */
915 for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
916 urb = usb_alloc_urb(max_packets, GFP_KERNEL);
918 em28xx_err("cannot alloc isoc_ctl.urb %i\n", i);
919 em28xx_uninit_isoc(dev);
922 dev->isoc_ctl.urb[i] = urb;
924 dev->isoc_ctl.transfer_buffer[i] = usb_buffer_alloc(dev->udev,
925 sb_size, GFP_KERNEL, &urb->transfer_dma);
926 if (!dev->isoc_ctl.transfer_buffer[i]) {
927 em28xx_err("unable to allocate %i bytes for transfer"
930 in_interrupt()?" while in int":"");
931 em28xx_uninit_isoc(dev);
934 memset(dev->isoc_ctl.transfer_buffer[i], 0, sb_size);
936 /* FIXME: this is a hack - should be
937 'desc.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK'
938 should also be using 'desc.bInterval'
940 pipe = usb_rcvisocpipe(dev->udev,
941 dev->mode == EM28XX_ANALOG_MODE ? 0x82 : 0x84);
943 usb_fill_int_urb(urb, dev->udev, pipe,
944 dev->isoc_ctl.transfer_buffer[i], sb_size,
945 em28xx_irq_callback, dma_q, 1);
947 urb->number_of_packets = max_packets;
948 urb->transfer_flags = URB_ISO_ASAP;
951 for (j = 0; j < max_packets; j++) {
952 urb->iso_frame_desc[j].offset = k;
953 urb->iso_frame_desc[j].length =
954 dev->isoc_ctl.max_pkt_size;
955 k += dev->isoc_ctl.max_pkt_size;
959 init_waitqueue_head(&dma_q->wq);
961 em28xx_capture_start(dev, 1);
963 /* submit urbs and enables IRQ */
964 for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
965 rc = usb_submit_urb(dev->isoc_ctl.urb[i], GFP_ATOMIC);
967 em28xx_err("submit of urb %i failed (error=%i)\n", i,
969 em28xx_uninit_isoc(dev);
976 EXPORT_SYMBOL_GPL(em28xx_init_isoc);